WO2023201564A1 - 微孔阵列芯片及其使用方法和检测装置 - Google Patents

微孔阵列芯片及其使用方法和检测装置 Download PDF

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Publication number
WO2023201564A1
WO2023201564A1 PCT/CN2022/087880 CN2022087880W WO2023201564A1 WO 2023201564 A1 WO2023201564 A1 WO 2023201564A1 CN 2022087880 W CN2022087880 W CN 2022087880W WO 2023201564 A1 WO2023201564 A1 WO 2023201564A1
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microwell array
reaction chamber
array chip
reference plane
sub
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PCT/CN2022/087880
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English (en)
French (fr)
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WO2023201564A9 (zh
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丁丁
徐健
邓林
刘祝凯
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京东方科技集团股份有限公司
北京京东方技术开发有限公司
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Priority to CN202280000822.2A priority Critical patent/CN117279714A/zh
Priority to PCT/CN2022/087880 priority patent/WO2023201564A1/zh
Publication of WO2023201564A1 publication Critical patent/WO2023201564A1/zh
Publication of WO2023201564A9 publication Critical patent/WO2023201564A9/zh

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01LCHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N33/00Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00

Definitions

  • Embodiments of the present disclosure relate to a microwell array chip and its use method and detection device.
  • PCR Polymerase chain reaction
  • Digital PCR technology is a new technology for absolute quantification of nucleic acid molecules. It does not rely on standard curves and reference samples. Set up a control to directly detect the copy number of the target molecule.
  • the principle of digital PCR technology is to distribute low-template reagents into a large number of microwells. After statistical analysis, it is found that there is no or only one target molecule in most microwells. After amplification is completed, it is counted through the optical detection module, which is the initial Template volume.
  • digital PCR technology has higher sensitivity, specificity, high tolerance and accuracy. This technology has already been used in the detection of very small amounts of nucleic acid samples, CNV analysis and gene expression detection of complex samples. widely used.
  • a microwell array chip is a substrate that includes an array of multiple microwells. Each microwell can be used as a small test tube for detecting or selecting a specific compound from many compounds. Therefore, digital PCR technology can use microwell array chips for detection by squeezing reagents into the chip channels and distributing the reagents into a large number of microwells.
  • Embodiments of the present disclosure provide a microhole array chip and its use method and detection device.
  • the microwell array chip includes a microwell array substrate.
  • the microwell array substrate includes a first main surface and a second main surface arranged oppositely, n reaction chambers and a virtual idle area; n reaction chamber arrays are arranged on the microwell array.
  • a virtual idle area is set around n reaction chambers; the reaction chamber is configured to accommodate the sample to be tested, and the area of the virtual idle area is divided into n' virtual units.
  • the reaction chamber is located on the first main surface.
  • the shape of the orthographic projection on the first reference plane is a regular N-gon, and the shape of the orthographic projection of the virtual unit on the first reference plane is the same as the shape of the orthographic projection of the reaction chamber on the first reference plane.
  • the microwell array chip efficiently utilizes the area of the microwell array substrate to increase the volume of a single reaction chamber, thereby improving the sensitivity of the microwell array chip and reducing the detection limit of the microwell array chip.
  • a microwell array chip which includes: a microwell array substrate, including a first main surface and a second main surface arranged oppositely; n reaction chambers, the array is arranged in the microwell array In the substrate and configured to accommodate the sample to be measured, the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located is a regular N-gon; and a virtual idle area surrounding n
  • the reaction chambers are set up; the area of the virtual idle area is divided into n' virtual units, and the shape of the orthographic projection of the virtual unit on the first reference plane is consistent with the shape of the reaction chamber on the
  • the orthographic projection on the first reference plane has the same shape, and the total volume V of n reaction chambers satisfies the following formula:
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate
  • h is the depth of the reaction chamber in the direction perpendicular to the first reference plane
  • N is greater than or equal to A positive integer of 3
  • X is 1/2 the size of the distance between adjacent reaction chambers on the line connecting the centers of the adjacent reaction chambers.
  • the microwell array chip provided by an embodiment of the present disclosure also includes a support area configured to provide a support structure, and the total volume V of n reaction chambers satisfies the following formula:
  • S support is the area of the support area.
  • a microwell array chip provided by an embodiment of the present disclosure further includes: a reaction area arranged around the support area, and the n reaction chambers are located in the reaction area.
  • the center distances of orthographic projections of two adjacent reaction chambers on the first reference plane are equal.
  • the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located and the shape of the virtual unit on the first are all regular hexagons, and the total volume V of the n reaction chambers satisfies the following formula:
  • the value range of X is 10-20 microns
  • the value range of h is 190-320 microns.
  • the value range of n is 8000-100000.
  • the total volume V of n reaction chambers satisfies the following formula:
  • the microhole array chip provided by an embodiment of the present disclosure further includes: a first hydrophobic layer located on the first main surface, and the orthographic projection of the first hydrophobic layer on the first reference plane is consistent with the first hydrophobic layer. Orthographic projections of the reaction chambers on the first reference plane are arranged at intervals.
  • the microwell array chip provided by an embodiment of the present disclosure further includes: a second hydrophobic layer located on the second main surface, and the second hydrophobic layer extends to the edge of the reaction chamber.
  • the microhole array chip provided by an embodiment of the present disclosure further includes: the orthographic projection of the second hydrophobic layer on the second reference plane where the second main surface is located includes an opening, and the edge of the opening is in contact with the The edges of the reaction chamber on the second reference plane coincide with each other.
  • the microwell array chip provided by an embodiment of the present disclosure further includes: a second hydrophobic layer located on the second main surface, and the reaction chamber runs through the first reference plane in a direction perpendicular to the first reference plane.
  • Microwell array substrate, the second hydrophobic layer spans the reaction chamber, and the orthographic projection of the reaction chamber on the second reference plane where the second main surface is located falls into the second hydrophobic layer on within the orthographic projection on the second reference plane.
  • the reaction chamber is recessed from the first main surface into the microwell array substrate and has a cavity located in the microwell array substrate. Bottom, the distance between the bottom of the cavity and the first reference plane is less than the thickness of the microhole array substrate.
  • the contact angle between the first hydrophobic layer and the sample to be tested is smaller than the critical angle of the reaction chamber, and the critical angle is The angle between the extension line of the side wall of the chamber and the tangent line of the surface where the sample to be tested contacts the side wall of the reaction chamber.
  • the bottom of the cavity includes at least one exhaust hole, and each of the exhaust holes penetrates the cavity in a direction perpendicular to the first reference plane. bottom of body.
  • the bottom of the cavity includes one exhaust hole, and the exhaust hole is located directly on the second reference plane where the second main surface is located.
  • the projection is located at the center of the orthographic projection of the cavity bottom on the second reference plane.
  • the bottom of the cavity includes a plurality of exhaust holes, and the exhaust holes are located on the second reference plane where the second main surface is located.
  • the orthographic projection is arranged around the center of the orthographic projection of the cavity bottom on the second reference plane.
  • the microwell array chip provided by an embodiment of the present disclosure further includes: a dialysis membrane; and a second hydrophobic layer, the reaction chamber penetrating the microwell array substrate in a direction perpendicular to the first reference plane, The second hydrophobic layer extends to the edge of the reaction chamber, and the dialysis membrane spans the reaction chamber.
  • the orthographic projection of the reaction chamber on the second reference plane where the second main surface is located falls into the dialysis membrane on the second reference plane. Within the orthographic projection on the plane.
  • the dialysis membrane is a flexible dialysis membrane.
  • the dialysis membrane is located on a side of the second hydrophobic layer close to the second main surface.
  • the dialysis membrane is located on a side of the second hydrophobic layer away from the second main surface.
  • the angle between the inner surface of the reaction chamber and the first main surface is greater than 90 degrees.
  • the inner surface of the reaction chamber includes a first sub-surface and a second sub-surface in a direction perpendicular to the first reference plane.
  • the second sub-surface is located on the side of the first sub-surface away from the first main surface, the angle between the first sub-surface and the first main surface is greater than 90 degrees, and the second sub-surface is The angle between the second major surfaces is greater than 90 degrees.
  • the inner surface of the reaction chamber includes a first sub-surface, a second sub-surface and a third sub-surface in a direction perpendicular to the first reference plane.
  • the second sub-surface is located on a side of the first sub-surface away from the first main surface
  • the third sub-surface is located on a side of the second sub-surface away from the first sub-surface
  • the angle between the first sub-surface and the first main surface is greater than 90 degrees
  • the plane where the second sub-surface is located is perpendicular to the first reference plane
  • the third sub-surface is connected to the second main surface.
  • the angle between the surfaces is greater than 90 degrees.
  • the inner surface of the reaction chamber includes a first sub-surface, a second sub-surface and a third sub-surface in a direction perpendicular to the first reference plane.
  • the second sub-surface is located on a side of the first sub-surface away from the first main surface
  • the third sub-surface is located on a side of the second sub-surface away from the first sub-surface
  • the angle between the first sub-surface and the first main surface is greater than 90 degrees
  • the second sub-surface is an arc surface and is recessed toward the microhole array substrate
  • the third sub-surface is in contact with the microhole array substrate.
  • the angle between the second main surfaces is greater than 90 degrees.
  • a first hydrophilic membrane and a second hydrophilic membrane are provided on the inner surface of the reaction chamber, and the first hydrophilic membrane and the third hydrophilic membrane are disposed on the inner surface of the reaction chamber.
  • Two hydrophilic membranes are arranged adjacently in a direction perpendicular to the first reference plane, and the surface of the first hydrophilic membrane away from the inner surface of the reaction chamber is convex toward the central axis of the reaction chamber.
  • the surface of the second hydrophilic membrane away from the inner surface of the reaction chamber is an arc surface that is convex toward the central axis of the reaction chamber.
  • the inner surface of the reaction chamber is a plane
  • the first hydrophilic membrane has different thicknesses in a direction perpendicular to the inner surface
  • the surface of the first hydrophilic film away from the inner surface of the reaction chamber is an arc surface
  • the thickness of the second hydrophilic film in a direction perpendicular to the inner surface is different, so that the The surface of the second hydrophilic membrane away from the inner surface of the reaction chamber is an arc surface.
  • the inner surface of the reaction chamber includes a first sub-surface and a second sub-surface in a direction perpendicular to the first reference plane.
  • the second sub-surface is located on the side of the first sub-surface away from the first main surface, and the first sub-surface is convex toward the central axis of the reaction chamber, so that the first hydrophilic membrane is away from the first main surface.
  • the surface of the inner surface of the reaction chamber is an arc surface
  • the second sub-surface is convex toward the central axis of the reaction chamber, so that the second hydrophilic membrane is away from the inner surface of the reaction chamber.
  • the surface is an arc surface.
  • the shape of the orthographic projection of the reaction chamber on the first reference plane is virtually one of a circle, a regular hexagon, and a regular octagon. .
  • the shape of the orthographic projection of the reaction chamber on the first reference plane is virtually a triangle.
  • the microhole array chip provided by an embodiment of the present disclosure further includes: a first packaging film located on the side of the first main surface away from the second main surface; a second packaging film located on the second main surface. On the side of the surface away from the first main surface, the first encapsulation film and the second encapsulation film are attached to the microhole array substrate through static electricity or colloid.
  • the microhole array chip provided by an embodiment of the present disclosure further includes: light-curing oil located at the opening of the reaction chamber near the first main surface, the light-curing oil includes a boss structure, The boss structure is disposed in contact with the first main surface and is located on a side of the first hydrophobic layer close to the central axis of the reaction chamber.
  • the microwell array substrate is a flexible substrate.
  • the microwell array substrate further includes: a liquid inlet flow channel, n reaction chambers are connected to the liquid inlet flow channel, and each of the n reaction chambers is connected to the liquid inlet flow channel.
  • a unidirectional membrane is provided between the reaction chamber and the liquid inlet flow channel.
  • the liquid inlet flow channel includes: a liquid inlet main channel; n liquid inlet branch channels, each of which is connected to the main liquid inlet channel, and the n
  • the liquid inlet branch channels and the n reaction chambers are arranged in one-to-one correspondence.
  • the microwell array substrate further includes: an inlet flow channel, including a plurality of sub-inlet flow channels that communicate with each other, and the plurality of sub-inlet flow channels The heights of the channels are different, and each sub-inlet flow channel is connected to multiple reaction chambers.
  • the heights of the plurality of sub-inlet flow channels are sequentially reduced.
  • the heights of the plurality of liquid inlet channels decrease sequentially from the middle to both sides.
  • a microwell array chip provided by an embodiment of the present disclosure further includes: a first substrate located on one side of the microwell array substrate and spaced apart from the first main surface; and a second substrate located on the A side of the microwell array substrate away from the first substrate, the second substrate includes a heating electrode, the orthographic projection of the heating electrode on the first reference plane is in contact with at least part of the n reaction chambers Orthographic projections on said first reference plane overlap.
  • the first substrate includes: a first base substrate; a third hydrophobic layer located on a side of the first base substrate close to the second substrate. side.
  • the second substrate further includes: a second base substrate; a control electrode located on the second base substrate; and a first insulating layer located on the second base substrate. a side of the control electrode away from the second base substrate; and a second insulating layer, the first insulating layer includes a connection hole, the connection hole exposes at least a portion of the control electrode, and the heating electrode is located at the The first insulating layer is on a side away from the second base substrate and connected to the control electrode through the connection hole. The second insulating layer is located on a side of the heating electrode away from the first insulating layer. On the other side, the microhole array substrate is located on the second insulating layer.
  • the microwell array chip provided by an embodiment of the present disclosure further includes: a photosensitive sensor located on a side of the second substrate away from the first substrate, and the photosensitive sensor is configured to detect the microhole array substrate.
  • the reaction chamber emits light.
  • At least one embodiment of the present disclosure also provides a detection device, including the microwell array chip described in any one of the above.
  • the detection device further includes: a first housing located on one side of the microhole array chip and spaced apart from the microhole array chip; and a second housing located on the microhole array chip.
  • the array chip is away from one side of the first housing and is spaced apart from the microhole array chip.
  • the distance between the microhole array chip and the second housing is greater than or equal to the thickness of the microhole array chip.
  • the second housing includes a support structure, the support structure includes a first platform part and a second platform part, and the height of the second platform part is greater than the height of the third platform part.
  • the height of a platform portion, the first platform portion is configured to contact the bottom surface of the microwell array chip, and the second platform portion is configured to contact the side surface of the microwell array chip.
  • the shape of the orthographic projection of the first platform portion on the first main surface includes an arc triangle, and the second platform portion is on the first main surface.
  • the shape of the orthographic projection on the surface includes a semicircle, the base of the arcuate triangle connected to the semicircle is a straight line, and the other two sides of the arcuate triangle are arcs.
  • the second housing further includes a positioning circular platform configured to be in contact with the side surface of the microhole array chip.
  • At least one embodiment of the present disclosure also provides a method of using a microhole array chip.
  • the microhole array chip includes a microhole array substrate.
  • the method of use includes: passing a sample to be tested into the microhole array substrate. ; Encapsulating the sample to be tested in the microwell array substrate, the microwell array substrate includes n reaction chambers and idle areas, and the n reaction chamber arrays are arranged on the microwell array substrate and is configured to accommodate the sample to be measured; the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located is a regular N-gon, and the idle area surrounds n
  • the reaction chamber is configured; the area of the idle area is divided into n' virtual units, and the shape of the orthographic projection of the virtual unit on the first reference plane is consistent with the shape of the reaction chamber on the first reference plane.
  • the shape of the orthographic projection on the plane is the same, and the total volume V of n reaction chambers satisfies the following formula:
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate
  • h is the depth of the reaction chamber in the direction perpendicular to the first reference plane
  • N is greater than or equal to A positive integer of 3
  • X is 1/2 the size of the distance between adjacent reaction chambers on the line connecting the centers of the adjacent reaction chambers.
  • encapsulating the sample to be measured in the microwell array substrate includes: passing the sample to be measured into the microwell array substrate. After the sample is collected, the first packaging film is attached to the side of the first main surface away from the second main surface through static electricity or colloid, and the second packaging film is attached to the side of the second main surface away from the second main surface. One side of a main surface.
  • encapsulating the sample to be measured in the microwell array substrate includes: passing the sample to be measured into the microwell array substrate. After taking the sample, apply light-curing oil to the opening of the reaction chamber near the first main surface; and use ultraviolet light to solidify the light-curing oil.
  • the microwell array substrate includes a first sub-flexible microwell array substrate and a second sub-flexible microwell array substrate, and the first sub-flexible microwell array substrate A plurality of sample flow channels are included between the microwell array substrate and the second sub-flexible microwell array substrate. Passing the sample to be tested into the microwell array substrate includes: passing through the plurality of sample flow channels Sample to be tested.
  • the method of using the microwell array chip provided by an embodiment of the present disclosure further includes: using a vacuum method to introduce the sample to be measured into the plurality of sample flow channels.
  • encapsulating the sample to be tested in the microwell array substrate includes: using rollers to separate each of the sample flow channels. Multiple reaction chambers are formed and sealed.
  • Figure 1 is a schematic plan view of a microhole array chip provided by an embodiment of the present disclosure
  • Figure 2 is a schematic cross-sectional view of a microhole array chip provided by an embodiment of the present disclosure
  • Figure 3A is a schematic plan view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure
  • Figure 3B is a schematic cross-sectional view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure
  • Figure 4A is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 4B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 5 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 6A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 6B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 7A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 7B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • FIG. 8A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 8B is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 9A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 9B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 10A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 10B is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 11A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 11B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 11C is a three-dimensional schematic view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 12A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 12B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 12C is a three-dimensional schematic view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 13A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 13B is a three-dimensional schematic diagram of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 13C is a three-dimensional schematic view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure
  • Figure 14A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 14B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 14C is a three-dimensional schematic view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure.
  • Figure 15 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 16 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 17 is a schematic structural diagram of a microhole array chip provided by an embodiment of the present disclosure.
  • Figure 18 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 19 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 20 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 21 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 22 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 23 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 24 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 25 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 26 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • Figure 27 is a schematic diagram of a detection device provided by an embodiment of the present disclosure.
  • Figure 28 is a schematic diagram of another detection device provided by an embodiment of the present disclosure.
  • FIG. 29 is a schematic plan view of a second housing in a detection device according to an embodiment of the present disclosure.
  • features such as “parallel”, “perpendicular” and “identical” used in the embodiments of the present disclosure include “parallel”, “perpendicular”, “identical” and the like in the strict sense, as well as “approximately parallel”, “Approximately perpendicular”, “approximately the same”, etc. include certain errors.
  • the above “approximately” may mean that the difference between the compared objects is 10% of the average value of the compared objects, or within 5%.
  • the quantity of a component or element is not specified in the following embodiments of the present disclosure, it means that the component or element can be one or more, or it can be understood as at least one.
  • At least one means one or more, and “plurality” means at least two.
  • “Same layer arrangement” in the embodiment of the present disclosure refers to the relationship between multiple film layers formed of the same material after going through the same step (for example, one-step patterning process). “Same layer” here does not always mean that the thickness of multiple film layers is the same or that the height of the multiple film layers in the cross-sectional view is the same.
  • the inventor of this application noticed that the main problem of the current digital PCR chip is how to improve the sensitivity and how to reduce the detection limit of the chip; from a chemical point of view, the volume of a single chamber is large enough, and the larger the sample, the larger the sample size. If sufficient, the reaction will be more complete; on the other hand, if the volume of a single reaction chamber is large, it will cause a waste of chamber volume per unit area of the chip. Therefore, the requirements of the reaction chamber are controlled within a certain range.
  • microwell array chip includes a microwell array substrate.
  • the microwell array substrate includes a first main surface and a second main surface arranged oppositely, n reaction chambers and idle areas; n reaction chamber arrays are arranged on the microhole array substrate.
  • the idle area is arranged around n reaction chambers; the reaction chamber is configured to accommodate the sample to be tested, and the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located is the area of the positive idle area Divided into n' virtual units, the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located and the orthographic projection shape of the virtual unit on the first reference plane are both regular N-gons, n
  • the total volume V of the reaction chamber satisfies the following formula:
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate
  • h is the depth of the reaction chamber in the direction perpendicular to the first reference plane
  • N is a positive integer greater than or equal to 3
  • X The distance between adjacent reaction chambers is 1/2 the size of the line connecting the centers of adjacent reaction chambers.
  • the microwell array chip since the total volume V of the n reaction chambers satisfies the above formula, the microwell array chip can efficiently utilize the area of the microwell array substrate, so that in the reaction chamber If the number is sufficient, increasing the volume of a single reaction chamber can thereby improve the sensitivity of the microwell array chip and reduce the detection limit of the microwell array chip.
  • FIG. 1 is a schematic plan view of a microhole array chip provided by an embodiment of the present disclosure.
  • FIG. 2 is a schematic cross-sectional view of a microhole array chip provided by an embodiment of the present disclosure.
  • the microwell array chip 100 includes a microwell array substrate 110 ; the microwell array substrate 110 includes oppositely arranged first main surfaces 110A and second main surfaces 110B, n reaction chambers 120 and Idle area 130; an array of n reaction chambers 120 is arranged in the microwell array substrate 110, and the idle area 130 is arranged around the n reaction chambers 120; the reaction chamber 120 is configured to accommodate the sample to be tested, and the reaction chamber 120 is in The shape of the orthographic projection on the first reference plane 201 where the first main surface 110A is located is a regular N-gon. The area of the idle area 130 is divided into n' virtual units 132. The virtual units 132 are on the first reference plane 201. The orthographic projection shape is the same as the orthographic projection shape of the reaction chamber 120 on the first reference plane 201, and the total volume V of the n reaction chambers 120 satisfies the following formula:
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate 110
  • h is the depth of the reaction chamber 120 in the direction perpendicular to the first reference plane 201
  • N is a positive value greater than or equal to 3.
  • An integer is 1/2 of the size of the distance between adjacent reaction chambers 120 on the line connecting the centers of adjacent reaction chambers 120 .
  • the above-mentioned regular N polygon can be circular; in addition, the size and number of reaction chambers in the microhole array substrate shown in Figure 1 are only illustrative. , the number of reaction chambers can be set according to actual needs.
  • the microwell array chip since the total volume V of the n reaction chambers satisfies the above formula, the microwell array chip can efficiently utilize the area of the microwell array substrate, so that in the reaction chamber If the number is sufficient, increasing the volume of a single reaction chamber can thereby improve the sensitivity of the microwell array chip and reduce the detection limit of the microwell array chip.
  • the total volume V of n reaction chambers satisfies the following formula:
  • the microhole array chip can efficiently utilize the area of the microhole array substrate, improve the sensitivity of the microhole array chip, and reduce the detection limit of the microhole array chip.
  • the microwell array chip 110 further includes a support region 140 configured to provide a support structure.
  • the total volume V of the n reaction chambers 120 satisfies the following formula:
  • S support is the area of the support area 140 .
  • the support area can be used to be in contact with the support structure (such as the support structure of the base), so that there is a certain gap between the microwell array substrate and the base, which is convenient for liquids (such as the sample to be tested). ), allowing the microhole array substrate to be oil-sealed.
  • the support area in Figure 1 adopts different filling patterns, but the material of the support area and other areas can be the same, that is, the surface of the support area and the surface of the surrounding idle area can be the same.
  • embodiments of the present disclosure include but are not limited to this.
  • the surface of the support area in contact with the support structure can also be coated with other materials or structures, or surface treated to increase friction or other characteristics to better contact with the support structure. set up.
  • the microwell array chip 100 further includes a reaction region 150 ; the reaction region 150 is disposed around the support region 140 , and n reaction chambers 120 are disposed in the reaction region 150 . Therefore, no reaction chamber is provided in the support area of the microwell array chip, and the reaction area is arranged around the support area, so that the area of the microwell array substrate can be fully utilized.
  • the four support regions 140 are located at the four edges of the microwell array substrate 110 and are located in the middle of the edges respectively; the reaction region 150 is disposed in the middle region of the microwell array substrate 110 and is located at the middle region of the microwell array substrate 110 . Support area 140 perimeter.
  • the virtual unit is set up to calculate the area of the idle area and the area occupied by the reaction chamber as a unit. Therefore, the virtual unit and the reaction chamber are Not only are the shapes the same, but the way they are arranged relative to each other is also the same. For example, the distance between adjacent dummy units and reaction chambers, the distance between adjacent reaction chambers and reaction chambers, and the distance between adjacent dummy units may all be the same. For another example, when the reaction chambers are arranged in a certain period to form a reaction chamber group (for example, forming a reaction chamber row or a reaction chamber column), the virtual units can also be arranged in a certain period to form a virtual group.
  • the virtual units are also regularly arranged or staggered to separate the reaction areas and idle areas on the entire microwell array substrate. filling. It is worth noting that when the microwell array chip includes a support area, the virtual units only need to avoid the support area, and the arrangement of the virtual units in the idle area is still the same as the arrangement of the reaction chamber.
  • the center distances of the orthographic projections of two adjacent reaction chambers 120 on the first reference plane 201 are equal. That is to say, the barriers between adjacent reaction chambers in the reaction area are equal and evenly distributed.
  • the microwell array chip can ensure that the volume of liquid (such as the sample to be tested) entering each reaction chamber is consistent, making the reaction more accurate.
  • the shape of the orthographic projection of each reaction chamber 120 on the first reference plane 201 is a regular hexagon, so that while having a larger volume, the liquid (eg, The sample to be tested) enters the reaction chamber more easily.
  • the shapes of the orthographic projections of each reaction chamber 120 on the first reference plane 201 may also be circles, regular octagons, regular pentagons, squares, triangles, etc.
  • the shape of the orthographic projection of each reaction chamber on the first reference plane may be a triangle. Since the angles of each corner of the triangle are smaller, the surface tension of the sample to be tested can be destroyed, making it easier for the test sample to enter the reaction chamber.
  • the shape of the orthographic projection of the reaction chamber 120 on the first reference plane 201 where the first major surface 110A is located and the orthographic shape of the virtual unit 132 on the first reference plane 201 The projected shapes are all regular hexagons, and the total volume V of n reaction chambers satisfies the following formula:
  • the value range of X is 10-20 microns
  • the value range of h is 190-320 microns.
  • the shape of the orthographic projection of each reaction chamber on the first reference plane is a regular hexagon, and since the total volume V of the n reaction chambers satisfies the above formula, the microwell The array chip can efficiently utilize the area of the microwell array substrate, thereby increasing the volume of a single reaction chamber, thereby improving the sensitivity of the microwell array chip and reducing the detection limit of the microwell array chip.
  • the size of the spacing between adjacent reaction chambers 120 on the center line of the adjacent reaction chambers 120 may range from 20 to 40 microns, for example, 24 microns, 26 microns, 28 microns, 30 microns. micron, 32 micron, 34 micron or 36 micron.
  • the depth of reaction chamber 120 in a direction perpendicular to first reference plane 201 may be 200 microns, 220 microns, 240 microns, 260 microns, 280 microns, or 300 microns.
  • the number of reaction chambers 120 on one microwell array substrate 110 may be 8,000-100,000. As a result, the microwell array chip has higher detection accuracy.
  • the number of reaction chambers 120 on one microwell array substrate 110 may be 8,000, 10,000, 20,000, 40,000, 60,000, 80,000, or 100,000.
  • FIG. 3A is a schematic plan view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure
  • FIG. 3B is a schematic cross-sectional view of a reaction chamber in another microwell array chip provided by an embodiment of the present disclosure.
  • the microwell array chip 100 further includes a first hydrophobic layer 161 , which is disposed on the first main surface 110A; the first hydrophobic layer 161 is located directly on the first reference plane 201 .
  • the projection is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the first hydrophobic layer has hydrophobic and lipophilic properties, thereby making it easier for liquid (such as a sample to be tested) to enter each reaction chamber defined by the microwell array substrate.
  • the material of the first hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the first hydrophobic layer can also be made of other suitable inorganic or organic materials, as long as the side of the first hydrophobic layer away from the microhole array substrate is hydrophobic.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the shape of the orthographic projection of the reaction chamber 120 on the first reference plane 201 is a regular hexagon
  • the shape of the first opening 1610 is a regular hexagon
  • the sides of the first opening 1610 is longer than the side length of the orthographic projection of the reaction chamber 120 on the first reference plane 201 .
  • the reaction chamber 120 is in a direction perpendicular to the microwell array substrate 110 (ie, a direction perpendicular to the first reference plane 201 ). penetrating the microwell array substrate 110 . That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a second hydrophobic layer 162; the second hydrophobic layer 162 is located on the second main surface 110B; the second hydrophobic layer 162 extends to the reaction chamber The edge of 120.
  • the second hydrophobic layer has hydrophobic and lipophilic properties, thereby making it easier for liquid (such as a sample to be tested) to enter each reaction chamber defined by the microwell array substrate.
  • the material of the second hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the second hydrophobic layer can also be made of other suitable inorganic or organic materials, as long as the side of the second hydrophobic layer away from the microhole array substrate is hydrophobic.
  • the orthographic projection of the second hydrophobic layer 162 on the second reference plane 202 where the second major surface 110B is located includes a second opening 1620 , and the edge of the second opening 1620 is in contact with the reaction chamber.
  • the edges of the chamber 120 coincide on the second reference plane 202 . That is, the second hydrophobic layer is located just between adjacent reaction chambers.
  • the shape of the orthographic projection of the reaction chamber 120 on the first reference plane 201 is a regular hexagon
  • the shape of the second opening 1620 is a regular hexagon
  • the sides of the second opening 1620 The length is equal to the side length of the orthographic projection of the reaction chamber 120 on the first reference plane 201 .
  • FIG. 4A is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 4B is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwells in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201 ).
  • Array substrate 110 That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is located on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the first hydrophobic layer has hydrophobic and lipophilic properties, thereby making it easier for liquid (such as a sample to be tested) to enter each reaction chamber defined by the microwell array substrate.
  • the material of the first hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the first hydrophobic layer can also be prepared using other suitable inorganic or organic materials, as long as the side of the first hydrophobic layer away from the microhole array substrate is hydrophobic.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a second hydrophobic layer 162 located on the second main surface 110B; the second hydrophobic layer 162 spans the reaction chamber 120 .
  • the orthographic projection of 120 on the second reference plane 202 of the second major surface 110B falls within the orthographic projection of the second hydrophobic layer 162 on the second reference plane 202 . That is to say, the microwell array chip can seal the side of the reaction chamber located on the second main surface through the second hydrophobic layer, thereby forming a blind hole in the reaction chamber.
  • the orthographic projection of the reaction chamber 120 on the first reference plane 201 is a regular hexagon; at this time, the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201
  • the shape of the first opening 1610 is also a regular hexagon, and the side length of the first opening 1610 is greater than the side length of the orthographic projection of the reaction chamber 120 on the first reference plane 201 .
  • Figure 5 is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 is recessed into the microwell array substrate 110 from the first main surface 110A and has a cavity bottom 122 located in the microwell array substrate 110 , between the cavity bottom 122 and the first reference plane 201 The distance between them is less than the thickness of the microhole array substrate 110.
  • the reaction chamber is a blind hole.
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A.
  • the contact angle ⁇ e between the first hydrophobic layer 161 and the sample to be tested is smaller than the critical angle ⁇ t0 of the reaction chamber 120 .
  • the critical angle ⁇ e is the extension line of the side wall of the reaction chamber 120 and the distance between the sample to be tested and the reaction chamber 120 . The angle between tangents to the surfaces where the side walls contact. Therefore, the microwell array chip can allow the sample to be tested to enter the reaction chamber better.
  • two adjacent reaction chambers 120 are arranged along the first direction, and the side wall between the two adjacent reaction chambers 120 is along the first direction on the first reference plane 201 .
  • the size of the side wall between two adjacent reaction chambers 120 along the first direction on the second reference plane 202 is Wtb, and the bottom 122 of the reaction chamber 120 is on the second reference plane 202
  • the dimension of the orthographic projection along the first direction is St, and the angle between the side wall of the reaction chamber 120 and the direction perpendicular to the second reference plane 202 is ⁇ t ; at this time, the critical angle ⁇ of the reaction chamber t0 satisfies the following formula:
  • FIG. 6A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 6B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 is recessed into the microwell array substrate 110 from the first main surface 110A and has a cavity bottom 122 located in the microwell array substrate 110 , and the cavity bottom 122 is in contact with the first reference plane.
  • the distance between 201 is less than the thickness of the microwell array substrate 110 .
  • the reaction chamber is a blind hole.
  • the cavity bottom 122 includes at least one exhaust hole 1220 , and each exhaust hole 1220 runs through the cavity bottom 122 in a direction perpendicular to the first reference plane 201 . Therefore, when a liquid (such as a sample to be tested) enters the reaction chamber, the exhaust hole can be used to discharge gas, thereby making it easier for the liquid to enter the reaction chamber and increasing the speed of the liquid entering the reaction chamber.
  • a liquid such as a sample to be tested
  • the bottom 122 of the cavity includes an exhaust hole 1220
  • the orthographic projection of the exhaust hole 1220 on the second reference plane 202 where the second main surface 110B is located is located at the bottom of the cavity.
  • 122 is the center of the orthographic projection on the second reference plane 202 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the first hydrophobic layer has hydrophobic and lipophilic properties, thereby making it easier for liquid (such as a sample to be tested) to enter each reaction chamber defined by the microwell array substrate.
  • the material of the first hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the first hydrophobic layer can also be made of other suitable inorganic or organic materials, as long as the side of the first hydrophobic layer away from the microhole array substrate is hydrophobic.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a second hydrophobic layer 162 located on the second main surface 110B; the second hydrophobic layer 162 also includes an exhaust opening 1625 . 1625 is connected with the above-mentioned exhaust hole 1220.
  • FIG. 7A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 7B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 is recessed into the microwell array substrate 110 from the first main surface 110A and has a cavity bottom 122 located in the microwell array substrate 110 , and the cavity bottom 122 is in contact with the first reference plane.
  • the distance between 201 is less than the thickness of the microwell array substrate 110 .
  • the reaction chamber is a blind hole.
  • the cavity bottom 122 includes a plurality of exhaust holes 1220 , each exhaust hole 1220 penetrating the cavity bottom 122 in a direction perpendicular to the first reference plane 201 ; a plurality of exhaust holes 1220 .
  • the orthographic projection of the exhaust hole 1220 on the second reference plane 202 where the second main surface 110B is located is disposed around the center of the orthographic projection of the cavity bottom 122 on the second reference plane 202 . Therefore, when a liquid (such as a sample to be tested) enters the reaction chamber, multiple exhaust holes can be used to discharge gas at the same time, thereby making it easier for the liquid to enter the reaction chamber and increasing the speed of the liquid entering the reaction chamber.
  • the shape of the orthogonal projection of the reaction chamber 120 on the second reference plane 202 is a regular hexagon; at this time, the orthogonal projection of the six exhaust holes 1220 on the second reference plane 202 is The projections are set at the six corners of the orthographic projection of the reaction chamber 120 on the second reference plane 202 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a second hydrophobic layer 162 located on the second main surface 110B; the second hydrophobic layer 162 includes a plurality of exhaust openings 1625 , a plurality of The exhaust opening 1625 is provided in one-to-one correspondence with the plurality of exhaust openings 1220, and each exhaust opening 1625 is connected with the corresponding exhaust hole 1220.
  • FIG. 8A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 8B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwell array in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201 ).
  • Substrate 110 that is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a dialysis membrane 170 and a second hydrophobic layer 162 ; the reaction chamber 120 runs through the microwells in a direction perpendicular to the first reference plane 201 On the array substrate 110, the second hydrophobic layer 162 extends to the edge of the reaction chamber 120, and the dialysis membrane 170 spans the reaction chamber 120.
  • the dialysis membrane allows the gas in the reaction chamber to be discharged, but does not allow the liquid in the reaction chamber to flow out, thereby increasing the speed of the liquid (such as the sample to be tested) entering the reaction chamber while preventing the liquid from flowing out of the reaction chamber. room outflow.
  • the orthographic projection of the reaction chamber 120 on the second reference plane 202 where the second major surface 110B is located falls into the orthographic projection of the dialysis membrane 170 on the second reference plane 202 within.
  • dialysis membrane 170 is a flexible dialysis membrane.
  • the dialysis membrane is a flexible dialysis membrane, it can better contact with the liquid (such as the sample to be tested), thereby discharging the gas in the reaction chamber.
  • the embodiments of the present disclosure include but are not limited to this, and the dialysis membrane may also be a thin film with certain rigidity.
  • FIG. 9A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 9B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwell array in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201 ).
  • Substrate 110 that is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is located on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edges of the chambers 120 on the first reference plane 201 are spaced apart and located outside the edges of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a dialysis membrane 170 and a second hydrophobic layer 162 ; the reaction chamber 120 runs through the microwells in a direction perpendicular to the first reference plane 201 On the array substrate 110, the second hydrophobic layer 162 extends to the edge of the reaction chamber 120, and the dialysis membrane 170 spans the reaction chamber 120. The dialysis membrane 170 is located on the side of the second hydrophobic layer 162 close to the second main surface 110B.
  • FIG. 10A is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure
  • FIG. 10B is a schematic cross-sectional view of another microhole array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwell array in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201 ).
  • Substrate 110 that is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference surface 110A.
  • the orthographic projection on the plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the orthographic projection of the first hydrophobic layer 161 on the first reference plane 201 where the first major surface 110A is located includes the first opening 1610 , and the edge of the first opening 1610 is in contact with the reaction chamber.
  • the edge of the chamber 120 on the first reference plane 201 is spaced apart and located outside the edge of the reaction chamber 120 on the first reference plane 201 .
  • the microwell array chip 100 further includes a dialysis membrane 170 and a second hydrophobic layer 162 ; the reaction chamber 120 runs through the microwells in a direction perpendicular to the first reference plane 201 On the array substrate 110, the second hydrophobic layer 162 extends to the edge of the reaction chamber 120, and the dialysis membrane 170 spans the reaction chamber 120. The dialysis membrane 170 is located on the side of the second hydrophobic layer 162 away from the second main surface 110B.
  • FIG. 11A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure
  • FIG. 11B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • FIG. 11C is a schematic view of the reaction chamber of the microwell array chip provided by an embodiment of the present disclosure.
  • An embodiment provides a three-dimensional schematic diagram of a reaction chamber in another microwell array chip.
  • the reaction chamber 120 runs through the microwell array substrate 110 in a direction perpendicular to the first reference plane 201 .
  • Microwell array substrate 110 that is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference plane 201
  • the orthographic projection on is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the microwell array chip 100 further includes a second hydrophobic layer 162 ; the second hydrophobic layer 162 is located on the second main surface 110B; the second hydrophobic layer 162 extends to the reaction chamber 120 edge.
  • the angle ⁇ between the inner surface 126 of the reaction chamber 120 and the first major surface 110A is greater than 90 degrees. That is, the size of the portion of the reaction chamber 120 close to the first major surface 110A is larger. Therefore, the reaction chamber facilitates the entry of liquid, thereby increasing the speed at which liquid (eg, a sample to be tested) enters the reaction chamber.
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is circular; the reaction chamber 120 is taken by a section where the second main surface 110B is located.
  • the shape of the cross section taken by the second reference plane 202 is circular; and the diameter of the cross section of the reaction chamber 120 taken by the first reference plane 201 is larger than the diameter of the cross section taken by the second reference plane 202 of the reaction chamber 120 .
  • the shape of the section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is a regular hexagon; the reaction chamber 120 is a regular hexagon by the second main surface 110B.
  • the shape of the cross section cut by the second reference plane 202 is a regular hexagon; and the side length of the cross section of the reaction chamber 120 cut by the first reference plane 201 is larger than the side length of the reaction chamber 120 cut by the second reference plane 202 The side length of the section.
  • Figure 12A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure
  • Figure 12B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 12C is a schematic view of the reaction chamber of the microwell array chip provided by an embodiment of the present disclosure
  • An embodiment provides a three-dimensional schematic diagram of a reaction chamber in another microwell array chip.
  • the reaction chamber 120 runs through the microwell array substrate 110 in a direction perpendicular to the first reference plane 201 .
  • Microwell array substrate 110 That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference plane 201
  • the orthographic projection on is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the microwell array chip 100 further includes a second hydrophobic layer 162 ; the second hydrophobic layer 162 is located on the second main surface 110B; the second hydrophobic layer 162 extends to the reaction chamber 120 edge.
  • the inner surface 126 of the reaction chamber 120 includes a first subsurface 1261 and a second subsurface 1262 in a direction perpendicular to the first reference plane 201.
  • the second sub-surface 1262 is located on the side of the first sub-surface 1261 away from the first main surface 110A.
  • the angle between the first sub-surface 1261 and the first main surface 110A is greater than 90 degrees.
  • the angle between the second sub-surface 1262 and the second main surface 110B is greater than 90 degrees. The angle is greater than 90 degrees.
  • the size of the portion of the reaction chamber 120 close to the first main surface 110A is larger, the size of the portion of the reaction chamber 120 close to the second main surface 110B is larger, and the size of the middle portion of the reaction chamber 120 is smaller. Therefore, the reaction chamber is conducive to the entry of liquid on the one hand, and the discharge of gas on the other hand, thereby further increasing the speed at which liquid (such as the sample to be tested) enters the reaction chamber.
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is circular; the reaction chamber 120 is taken by a section where the second main surface 110B is located.
  • the shape of the cross section taken by the second reference plane 202 is circular; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located at the third of the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section taken by the reference plane 203 is circular; and the diameter of the cross section of the reaction chamber 120 taken by the first reference plane 201 and the diameter of the cross section taken by the second reference plane 202 of the reaction chamber 120 are both larger than The diameter of the cross section of the reaction chamber 120 taken by the third reference plane 203 that is parallel to the first reference plane 201 and the second reference plane 202 and located at the first reference plane 201 and the second reference plane 202 .
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is a regular hexagon; the reaction chamber 120 is cut by the second main surface 110B.
  • the shape of the cross section taken by the second reference plane 202 is a regular hexagon; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located between the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section cut by the third reference plane 203 is a regular hexagon; and, the side length of the cross section of the reaction chamber 120 by the first reference plane 201 and the cross section of the reaction chamber 120 by the second reference plane 202 The side lengths of are all larger than the side length of the cross section of the reaction chamber 120 cut by the third reference plane 203 .
  • Figure 13A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure
  • Figure 13B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 13C is a schematic view of the reaction chamber of the microwell array chip provided by an embodiment of the present disclosure.
  • An embodiment provides a three-dimensional schematic diagram of a reaction chamber in another microwell array chip.
  • the reaction chamber 120 runs through the microwell array substrate 110 in a direction perpendicular to the first reference plane 201 .
  • Microwell array substrate 110 that is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference plane 201
  • the orthographic projection on is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the microwell array chip 100 further includes a second hydrophobic layer 162 ; the second hydrophobic layer 162 is located on the second main surface 110B; the second hydrophobic layer 162 extends to the reaction chamber 120 edge.
  • the inner surface 126 of the reaction chamber 120 includes a first subsurface 1261, a second subsurface 1262, and a third subsurface in a direction perpendicular to the first reference plane 201.
  • the third sub-surface 1263, the second sub-surface 1262 is located on the side of the first sub-surface 1261 away from the first main surface 110A, and the third sub-surface 1263 is located on the side of the second sub-surface 1262 away from the first sub-surface 1261.
  • the angle between the first sub-surface 1261 and the first main surface 110A is greater than 90 degrees
  • the plane of the second sub-surface 1262 is perpendicular to the first reference plane 201
  • the angle between the third sub-surface 1263 and the second main surface 110B is greater than 90 degrees.
  • the size of the portion of the reaction chamber 120 close to the first main surface 110A is larger
  • the size of the portion of the reaction chamber 120 close to the second main surface 110B is larger
  • the size of the middle portion of the reaction chamber 120 is larger. Small. Therefore, the reaction chamber is conducive to the entry of liquid on the one hand, and the discharge of gas on the other hand, thereby further increasing the speed at which liquid (such as the sample to be tested) enters the reaction chamber.
  • the middle part of the reaction chamber is convenient for storing liquid.
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is circular; the reaction chamber 120 is taken by a section where the second main surface 110B is located.
  • the shape of the cross section taken by the second reference plane 202 is circular; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located at the third of the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section taken by the reference plane 203 is circular; and the diameter of the cross section of the reaction chamber 120 taken by the first reference plane 201 and the diameter of the cross section taken by the second reference plane 202 of the reaction chamber 120 are both larger than The diameter of the cross section of the reaction chamber 120 taken by the third reference plane 203 that is parallel to the first reference plane 201 and the second reference plane 202 and located at the first reference plane 201 and the second reference plane 202 .
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is a regular hexagon; the reaction chamber 120 is taken by the second main surface 110B.
  • the shape of the cross section taken by the second reference plane 202 is a regular hexagon; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located between the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section cut by the third reference plane 203 is a regular hexagon; and, the side length of the cross section of the reaction chamber 120 by the first reference plane 201 and the cross section of the reaction chamber 120 by the second reference plane 202 The side lengths of are all larger than the side length of the cross section of the reaction chamber 120 cut by the third reference plane 203 .
  • Figure 14A is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure
  • Figure 14B is a three-dimensional schematic view of a reaction chamber in a microwell array chip provided by an embodiment of the present disclosure
  • Figure 14C is a schematic view of the reaction chamber of the microwell array chip provided by an embodiment of the present disclosure.
  • An embodiment provides a three-dimensional schematic diagram of a reaction chamber in another microwell array chip.
  • the reaction chamber 120 runs through the microwell array substrate 110 in a direction perpendicular to the first reference plane 201 .
  • Microwell array substrate 110 That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference plane 201
  • the orthographic projection on is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the microwell array chip 100 further includes a second hydrophobic layer 162 ; the second hydrophobic layer 162 is located on the second main surface 110B; the second hydrophobic layer 162 extends to the reaction chamber 120 edge.
  • the inner surface 126 of the reaction chamber 120 includes a first subsurface 1261, a second subsurface 1262, and a third subsurface in a direction perpendicular to the first reference plane 201.
  • the third sub-surface 1263, the second sub-surface 1262 is located on the side of the first sub-surface 1261 away from the first main surface 110A, and the third sub-surface 1263 is located on the side of the second sub-surface 1262 away from the first sub-surface 1261.
  • the angle between the first sub-surface 1261 and the first main surface 110A is greater than 90 degrees.
  • the second sub-surface 1262 is an arc surface and is recessed toward the microhole array substrate 110 .
  • the third sub-surface 1263 and the second main surface 110B are The angle is greater than 90 degrees.
  • the size of the portion of the reaction chamber 120 close to the first main surface 110A is larger
  • the size of the portion of the reaction chamber 120 close to the second main surface 110B is larger
  • the size of the middle portion of the reaction chamber 120 is larger. Small. Therefore, the reaction chamber is conducive to the entry of liquid on the one hand, and the discharge of gas on the other hand, thereby further increasing the speed at which liquid (such as the sample to be tested) enters the reaction chamber.
  • the second sub-surface is an arc surface and is recessed toward the microhole array substrate, the middle part of the reaction chamber is convenient for storing liquid.
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is circular; the reaction chamber 120 is taken by a section where the second main surface 110B is located.
  • the shape of the cross section taken by the second reference plane 202 is circular; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located at the third of the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section taken by the reference plane 203 is circular; and the diameter of the cross section of the reaction chamber 120 taken by the first reference plane 201 and the diameter of the cross section taken by the second reference plane 202 of the reaction chamber 120 are both larger than The diameter of the cross section of the reaction chamber 120 taken by the third reference plane 203 that is parallel to the first reference plane 201 and the second reference plane 202 and located at the first reference plane 201 and the second reference plane 202 .
  • the shape of the cross section of the reaction chamber 120 taken by the first reference plane 201 where the first main surface 110A is located is a regular hexagon; the reaction chamber 120 is a regular hexagon by the second main surface 110B.
  • the shape of the cross section taken by the second reference plane 202 is a regular hexagon; the reaction chamber 120 is parallel to the first reference plane 201 and the second reference plane 202, and is located between the first reference plane 201 and the second reference plane 202.
  • the shape of the cross section cut by the third reference plane 203 is a regular hexagon; and, the side length of the cross section of the reaction chamber 120 by the first reference plane 201 and the cross section of the reaction chamber 120 by the second reference plane 202 The side lengths of are all larger than the side length of the cross section of the reaction chamber 120 cut by the third reference plane 203 .
  • FIG. 15 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwell array substrate 110 in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201 ). That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • a first hydrophilic film 181 and a second hydrophilic film 182 are provided on the inner surface 126 of the reaction chamber 120 .
  • the first hydrophilic film 181 and the second hydrophilic film 182 are opposite each other in a direction perpendicular to the first reference plane 201 .
  • the surface of the first hydrophilic film 181 away from the inner surface 126 of the reaction chamber 120 is an arc surface convex toward the central axis of the reaction chamber 120
  • the second hydrophilic film 182 is away from the inner surface of the reaction chamber 120
  • the surface of 126 is an arc surface convex toward the central axis of the reaction chamber 120 . Therefore, on the one hand, the first hydrophilic membrane and the second hydrophilic membrane can facilitate the entry of liquid (such as the sample to be tested) into the reaction chamber and facilitate the storage of liquid; on the other hand, the first hydrophilic membrane is far away from the reaction chamber.
  • the surface of the inner surface is an arc surface convex toward the central axis of the reaction chamber, which makes the size of the part of the reaction chamber close to the first main surface larger, which is more conducive to the liquid entering the reaction chamber; similarly, the second surface
  • the surface of the water film away from the inner surface of the reaction chamber is arc-shaped, so that the size of the part of the reaction chamber close to the second main surface is larger, which is conducive to gas discharge; at the same time, the first hydrophilic membrane and the second hydrophilic membrane
  • a recessed portion that is, the adjacent portion of the first hydrophilic membrane and the second hydrophilic membrane
  • the microwell array substrate can also be formed therebetween, which is more conducive to storing liquid.
  • the inner surface 126 of the reaction chamber 120 is a plane, and the first hydrophilic film 181 has different thicknesses in a direction perpendicular to the inner surface 126 , so that the first hydrophilic film 181 is farther away from the inner surface 126 .
  • the surface of the inner surface 126 of the reaction chamber 120 is an arc surface, and the thickness of the second hydrophilic film 182 in the direction perpendicular to the inner surface 126 is different, so that the second hydrophilic film 182 is away from the inner surface of the reaction chamber 120
  • the surface is an arc surface.
  • FIG. 16 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the reaction chamber 120 penetrates the microwell array substrate 110 in a direction perpendicular to the microwell array substrate 110 (that is, in a direction perpendicular to the first reference plane 201). That is to say, the reaction chamber 120 is a through hole penetrating the microhole array substrate 110 .
  • a first hydrophilic film 181 and a second hydrophilic film 182 are provided on the inner surface 126 of the reaction chamber 120 .
  • the first hydrophilic film 181 and the second hydrophilic film 182 are opposite each other in a direction perpendicular to the first reference plane 201 .
  • the inner surface 126 of the reaction chamber 120 includes a first sub-surface 1261 and a second sub-surface 1262 in a direction perpendicular to the first reference plane 201.
  • the second sub-surface 1262 is located away from the first sub-surface 1261 and away from the first main surface.
  • the first sub-surface 1261 protrudes toward the central axis of the reaction chamber 120, so that the surface of the first hydrophilic membrane 181 away from the inner surface 126 of the reaction chamber 120 is an arc surface
  • the second sub-surface 1262 protrudes toward the central axis of the reaction chamber 120 so that the surface of the second hydrophilic membrane 182 away from the inner surface 126 of the reaction chamber 120 is an arc surface.
  • the first hydrophilic membrane and the second hydrophilic membrane can facilitate the entry of liquid (such as the sample to be tested) into the reaction chamber and facilitate the storage of liquid; on the other hand, the first hydrophilic membrane is far away from the reaction chamber.
  • the surface of the inner surface is an arc surface convex toward the central axis of the reaction chamber, which makes the size of the part of the reaction chamber close to the first main surface larger, which is more conducive to the liquid entering the reaction chamber; similarly, the second surface
  • the surface of the water film away from the inner surface of the reaction chamber is arc-shaped, so that the size of the part of the reaction chamber close to the second main surface is larger, which is conducive to gas discharge; at the same time, the first hydrophilic membrane and the second hydrophilic membrane
  • a recessed portion that is, the adjacent portion of the first hydrophilic membrane and the second hydrophilic membrane
  • the microwell array substrate can also be formed therebetween, which is more conducive to storing liquid.
  • FIG. 17 is a schematic structural diagram of a microwell array chip provided by an embodiment of the present disclosure.
  • the microhole array chip 100 also includes a first packaging film 191 and a second packaging film 192; the first packaging film 191 is located on the side of the first main surface 110A away from the second main surface 110B; the second packaging film 191 is located on the side of the first main surface 110A away from the second main surface 110B.
  • the film 192 is located on the side of the second main surface 110B away from the first main surface 110A; the first encapsulation film 191 and the second encapsulation film 192 are attached to the microhole array substrate 110 through static electricity or colloid. Therefore, the microhole array chip is more convenient to use.
  • the first packaging film and the second packaging film can be attached to the microhole array substrate through electrostatic adsorption or colloid. on the microwell array substrate.
  • the microwell array chip 100 further includes a first hydrophobic layer 161 and a second hydrophobic layer 162 ; the first hydrophobic layer 161 is disposed on the first main surface 110A; the first hydrophobic layer 161
  • the orthographic projection on the first reference plane 201 is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201; the second hydrophobic layer 162 is located on the second main surface 110B.
  • the first encapsulation film 191 is located on the side of the first hydrophobic layer 161 away from the second main surface 110B; the second encapsulation film 192 is located on the side of the second hydrophobic layer 162 away from the first main surface 110A.
  • the first encapsulation film and the second encapsulation film can better encapsulate the microhole array substrate.
  • the first hydrophobic layer has hydrophobic and lipophilic properties, thereby making it easier for liquid (such as a sample to be tested) to enter each reaction chamber defined by the microwell array substrate.
  • the material of the first hydrophobic layer and the second hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the first hydrophobic layer and the second hydrophobic layer can also be prepared using other suitable inorganic or organic materials.
  • Figure 18 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the microhole array chip 100 further includes light-cured oil 210 ; the light-cured oil 210 is located at the opening of the reaction chamber 120 near the first main surface 110A.
  • the microhole array chip can encapsulate the reaction chamber with light-cured oil.
  • the light-curing oil can be first introduced into the reaction chamber near the opening of the first main surface, and then the light-curing oil is solidified through a light-curing process, thereby encapsulating the reaction chamber.
  • the microwell array chip 100 further includes a first hydrophobic layer 161 disposed on the first main surface 110A; the first hydrophobic layer 161 is on the first reference plane 201
  • the orthographic projection on is spaced apart from the orthographic projection of the reaction chamber 120 on the first reference plane 201 . That is to say, the first hydrophobic layer 161 does not extend to the edge of the reaction chamber 120, thereby preventing samples or reagents from remaining in areas outside the reaction chamber while facilitating the entry of samples or reagents into the reaction chamber.
  • the light-cured oil 210 includes a boss structure 212 , which is disposed in contact with the first main surface 110A and is located on the first hydrophobic layer 161 close to the central axis of the reaction chamber 120 one side.
  • FIG. 19 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the microwell array substrate 110 is a flexible substrate.
  • the microwell array substrate 110 may include a first flexible microwell array substrate 115A and a second flexible microwell array substrate 115B.
  • the first flexible microwell array substrate 115A and the second flexible microwell array substrate 115B are in contact with each other.
  • a plurality of reaction chambers 120 are formed between the first flexible microwell array substrate 115A and the second flexible microwell array substrate 115B.
  • FIG. 20 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • the microwell array substrate 110 includes a liquid inlet flow channel 128; n reaction chambers 120 are connected with the liquid inlet flow channel 128, and a single reaction chamber 120 is provided between each reaction chamber 120 and the liquid inlet flow channel 128.
  • the microwell array chip can pass liquid (such as the sample to be tested) into the reaction chamber through the liquid inlet flow channel, and at the same time, it can prevent the test sample in the reaction chamber from returning to the liquid inlet flow channel through the unidirectional membrane, thereby Crosstalk between different reaction chambers can be prevented.
  • the embodiments of the present disclosure include but are not limited to this, and a unidirectional membrane may not be provided between each reaction chamber and the inlet flow channel.
  • the liquid inlet flow channel 128 includes a liquid inlet main channel 1282 and n liquid inlet branch channels 1284, which are respectively connected with the liquid inlet main channel 1282; n liquid inlet branch channels 1284 and n
  • the reaction chambers 120 are arranged in one-to-one correspondence. Therefore, the microwell array chip can pass liquid (such as the sample to be tested) into the reaction chamber through the main liquid inlet channel and the liquid inlet branch channel.
  • liquid inlet branch channels 1284 are disposed on both sides of the liquid inlet main channel 1282 , and the plurality of liquid inlet branch channels 1284 located on the first side of the liquid inlet main channel 1282 are connected with each other on the first side of the liquid inlet main channel 1282 .
  • the plurality of liquid inlet branch channels 1284 on the second side of the main liquid inlet channel 1282 are arranged in a staggered manner.
  • FIG 21 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • the microwell array substrate 110 includes an inlet flow channel 128; the inlet flow channel 128 includes a plurality of parallel inlet main channels 1282 and n inlet branch channels 1284; each inlet main channel 1282 There are a plurality of liquid inlet branch channels 1284 connected with the main liquid inlet channel 1282 on both sides of Therefore, the microwell array chip can pass liquid (such as the sample to be tested) into the reaction chamber through the liquid inlet flow channel.
  • FIG. 22 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • the microwell array substrate 110 includes an inlet flow channel 128; the inlet flow channel 128 includes a plurality of sub-inlet flow channels 1285 that communicate with each other, and each sub-inlet flow channel 1285 is connected to a plurality of reaction chambers. Room 120 is connected.
  • the height of the sub-inlet flow channel 1285 is greater than the heights of the plurality of reaction chambers 120 connected thereto. Therefore, the liquid can flow into the reaction chamber from the sub-inlet liquid flow channel by gravity.
  • the above-mentioned “height” refers to the distance between the bottom of the sub-inlet flow channel or the reaction chamber and the second main surface of the microwell array substrate.
  • the multiple sub-inlet flow channels 1285 have different heights. Since the heights of the multiple sub-inlet flow channels are different, the microwell array chip can use gravity to make the liquid (such as the sample to be tested) flow from the sub-inlet flow channel with a higher height to the sub-inlet flow channel with a lower height. , thus entering all reaction chambers. It should be noted that the above-mentioned "the heights of the plurality of sub-inlet flow channels are different" means that the distances between the bottoms of the sub-inlet flow channels and the second main surface of the microwell array substrate are different.
  • multiple sub-liquid inlet flow channels 1285 are arranged in sequence, and the heights of the multiple sub-liquid inlet flow channels 1285 are sequentially reduced along the arrangement direction of the multiple sub-liquid inlet flow channels 1285 .
  • embodiments of the present disclosure include but are not limited to this, and the heights of the plurality of liquid inlet flow channels 1285 can also be sequentially reduced from the middle to both sides.
  • Figure 23 is a schematic plan view of another microhole array chip provided by an embodiment of the present disclosure.
  • the microwell array substrate 110 includes a liquid inlet flow channel 128; the shape of the orthographic projection of the liquid inlet flow channel 128 on the first reference plane 201 where the first main surface 110A of the microhole array substrate 110 is located is curved. bend curve. Therefore, the microwell array chip can directly introduce liquid (such as the sample to be tested) into the reaction chamber through the liquid inlet flow channel.
  • Figure 24 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the microhole array chip 100 also includes a first substrate 310 and a second substrate 320; the first substrate 220 is located on one side of the microhole array substrate 110 and is connected to the first main surface of the microhole array substrate 110. 110A are arranged at intervals; the second substrate 320 is located on the side of the microhole array substrate 110 away from the first substrate 310; the second substrate 320 includes a heating electrode 325, and the heating electrode 325 is located on the first main surface 110A of the microhole array substrate 110.
  • the orthographic projection on a reference plane 201 overlaps with the orthographic projection on the first reference plane 201 of at least part of the n reaction chambers 120 . Therefore, the microwell array chip can heat at least part of the n reaction chambers through the heating electrode, thereby integrating the heating function into the microwell array chip.
  • the first substrate 310 includes a first substrate substrate 311 and a third hydrophobic layer 312 ; the third hydrophobic layer 312 is located on a side of the first substrate substrate 311 close to the second substrate 320 . Therefore, the third hydrophobic layer 312 has hydrophobic and lipophilic properties, thereby making it easier for liquids (such as samples to be tested) to enter each reaction chamber 120 defined by the microwell array substrate 110 .
  • the material of the third hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the third hydrophobic layer can also be made of other suitable inorganic or organic materials, as long as the side of the third hydrophobic layer facing the second substrate is hydrophobic.
  • the first substrate 310 and the second substrate 310 can form an accommodating space 340 through a sealant 330; the microhole array substrate 110 is disposed in the accommodating space 340; the first substrate 310 also It includes at least one inlet 315 that penetrates the first substrate 311 and the third hydrophobic layer 312 and is connected to the accommodating space 340 .
  • the microwell array chip can pass liquid into the microwell array substrate through the injection port.
  • the first substrate 310 further includes at least one sample outlet 317 , which penetrates the first substrate substrate 311 and the third hydrophobic layer 312 and is connected to the accommodating space 340 .
  • the microwell array chip can discharge liquid through the sample outlet.
  • the second substrate 320 further includes a second substrate substrate 321 , a control electrode 322 , a first insulating layer 323 and a second insulating layer 324 ;
  • the control electrode 322 is located on the second substrate substrate 321 on;
  • the first insulating layer 323 is located on the side of the control electrode 322 away from the second substrate 321;
  • the first insulating layer 323 includes a connection hole 323H, the connection hole 323H exposes at least a portion of the control electrode 322;
  • the heating electrode 325 is located on the first insulating layer
  • the layer 323 is located on the side away from the second substrate substrate 321 and connected to the control electrode 322 through the connection hole 323H;
  • the second insulating layer 324 is located on the side of the heating electrode 325 away from the first insulating layer 323, and the microhole array substrate 100 is located on the side of the heating electrode 325 away from the first insulating layer 323.
  • the microhole array chip can apply voltage to the heating electrode through the control electrode to drive the heating electrode to generate heat.
  • the second insulating layer is located on the side of the heating electrode away from the first insulating layer, so the second insulating layer can be used to protect the heating electrode from water and oxygen erosion, thereby increasing the service life of the heating electrode.
  • the second insulating layer can also play the role of insulation and planarization.
  • the first insulating layer 323 and the second insulating layer 324 can be made of the same material or different materials.
  • the first insulating layer 323 and the second insulating layer 324 may be made of inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, or organic insulating materials such as resin and polyimide.
  • the microwell array chip 100 further includes a photosensitive sensor 380 ; the photosensitive sensor 380 is located on a side of the second substrate 320 away from the first substrate 310 and is configured to detect the microwell array substrate 110 The light emitted from the reaction chamber 120.
  • the microhole array chip can determine whether and the extent of the reaction in the reaction chamber through the photosensitive sensor; and the microhole array chip integrates the photosensitive sensor into the chip, thereby further improving the integration level.
  • FIG 25 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the microhole array chip 100 also includes a first substrate 310 and a second substrate 320; the first substrate 220 is located on one side of the microhole array substrate 110 and is connected to the first main surface of the microhole array substrate 110. 110A interval setting.
  • the microwell array chip 100 includes a plurality of microwell array substrates 110 arranged in a direction parallel to the first substrate 310 or the second substrate 320 . Therefore, the microwell array chip can achieve high-throughput detection by arranging multiple microwell array chips.
  • the embodiments of the present disclosure do not specifically limit the planar layout structure of multiple microhole array chips.
  • multiple microwell array substrates may form a matrix, or multiple microwell array substrates may be arranged around one microwell array substrate.
  • the second substrate 320 may include a heating electrode 325 on the first main surface of the microwell array substrate 110
  • the orthographic projection on the first reference plane 201 where 110A is located overlaps with the orthographic projection on the first reference plane 201 of at least part of the n reaction chambers 120 in the hole array substrate 110 . Therefore, the microwell array chip can heat at least part of at least one of the n reaction chambers in the well array substrate through the heating electrode, thereby integrating the heating function in the microwell array chip.
  • the microwell array chip can also be provided with multiple heating electrodes, and the multiple heating electrodes are arranged in one-to-one correspondence with the multiple microwell array substrates.
  • the first substrate 310 includes a first substrate substrate 311 and a third hydrophobic layer 312 ; the third hydrophobic layer 312 is located on a side of the first substrate substrate 311 close to the second substrate 320 . Therefore, the third hydrophobic layer 312 has hydrophobic and lipophilic properties, thereby making it easier for liquids (such as samples to be tested) to enter each reaction chamber 120 defined by the microwell array substrate 110 .
  • the material of the third hydrophobic layer may be resin or silicon nitride, such as epoxy resin.
  • the third hydrophobic layer can also be made of other suitable inorganic or organic materials, as long as the side of the third hydrophobic layer facing the second substrate is hydrophobic.
  • the first substrate 310 and the second substrate 310 can form an accommodating space 340 through a sealant 330; the microhole array substrate 110 is disposed in the accommodating space 340; the first substrate 310 also It includes at least one inlet 315 that penetrates the first substrate 311 and the third hydrophobic layer 312 and is connected to the accommodating space 340 . Therefore, the microwell array chip can pass liquid into multiple microwell array substrates through the injection port.
  • the first substrate 310 further includes at least one sample outlet 317 , which penetrates the first substrate substrate 311 and the third hydrophobic layer 312 and is connected to the accommodating space 340 .
  • the microwell array chip can discharge liquid through the sample outlet.
  • the second substrate 320 further includes a second substrate substrate 321 , a control electrode 322 , a first insulating layer 323 and a second insulating layer 324 ;
  • the control electrode 322 is located on the second substrate substrate 321 on;
  • the first insulating layer 323 is located on the side of the control electrode 322 away from the second substrate 321;
  • the first insulating layer 323 includes a connection hole 323H, the connection hole 323H exposes at least a portion of the control electrode 322;
  • the heating electrode 325 is located on the first insulating layer
  • the layer 323 is located on the side away from the second substrate substrate 321 and connected to the control electrode 322 through the connection hole 323H;
  • the second insulating layer 324 is located on the side of the heating electrode 325 away from the first insulating layer 323, and the microhole array substrate 100 is located on the side of the heating electrode 325 away from the first insulating layer 323.
  • the microhole array chip can apply voltage to the heating electrode through the control electrode to drive the heating electrode to generate heat.
  • the second insulating layer is located on the side of the heating electrode away from the first insulating layer, so the second insulating layer can be used to protect the heating electrode from water and oxygen erosion, thereby increasing the service life of the heating electrode.
  • the second insulating layer can also play the role of insulation and planarization.
  • the first insulating layer 323 and the second insulating layer 324 can be made of the same material or different materials.
  • the first insulating layer 323 and the second insulating layer 324 may be made of inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, or organic insulating materials such as resin and polyimide.
  • the microwell array chip 100 further includes a photosensitive sensor 380 ; the photosensitive sensor 380 is located on a side of the second substrate 320 away from the first substrate 310 and is configured to detect the microwell array substrate 110 The light emitted from the reaction chamber 120.
  • the microhole array chip can determine whether and the extent of the reaction in the reaction chamber through the photosensitive sensor; and the microhole array chip integrates the photosensitive sensor into the chip, thereby further improving the integration level.
  • microwell array chip shown in Figure 25 achieves high-throughput detection by arranging multiple microwell array substrates in a direction parallel to the first substrate or the second substrate.
  • embodiments of the present disclosure include but are not limited to this.
  • the microwell array chip can also achieve high-throughput detection by arranging multiple microwell array substrates in a direction perpendicular to the first substrate or the second substrate.
  • Figure 26 is a schematic cross-sectional view of another microwell array chip provided by an embodiment of the present disclosure.
  • the microwell array chip 100 includes a microwell array substrate 110 ; the microwell array substrate 110 includes oppositely arranged first main surfaces 110A and second main surfaces 110B, n reaction chambers 120 and idle areas 130 ; An array of n reaction chambers 120 is provided in the microwell array substrate 110, and each reaction chamber 120 is configured to accommodate the sample to be tested.
  • the microwell array chip 100 also includes an electrohydrophilicity changing layer 190, which is disposed on the inner surface 126 of the reaction chamber 120; the electrohydrophilicity changing layer 190 is connected to an external circuit through a conductive structure (such as a wire), thereby
  • the hydrophilicity can be changed by applying electricity (for example, reducing the hydrophilicity or changing from hydrophilic to hydrophobic), so that the liquid in the reaction chamber 120 can be automatically drained.
  • the microwell array substrate in the microwell array chip can be made of anti-biomaterials, so that it can be reused.
  • the microwell array substrate in the microwell array chip can be made of materials that bypass the fluorescence excitation band, thereby preventing interference with fluorescence detection and improving detection accuracy.
  • the total volume V of the n reaction chambers 120 in the above-mentioned microwell array chip shown in FIGS. 1 to 26 can satisfy the following formula, so that the area of the microwell array substrate can be efficiently utilized, thereby Increasing the volume of a single reaction chamber can thereby increase the sensitivity of the microwell array chip and reduce the detection limit of the microwell array chip.
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate 110
  • h is the depth of the reaction chamber 120 in the direction perpendicular to the first reference plane 201
  • N is a positive value greater than or equal to 3.
  • An integer is 1/2 the size of the gap between adjacent reaction chambers 120 . It should be noted that when the value of N is infinite, the above-mentioned regular N-gon can be a circle.
  • FIG. 27 is a schematic diagram of a detection device provided by an embodiment of the present disclosure.
  • the detection device 500 includes the microwell array chip 100 provided by any of the above examples. Since the above-mentioned microwell array chip can efficiently utilize the area of the microwell array substrate, thereby increasing the volume of a single reaction chamber, the sensitivity of the microwell array chip can be improved and the detection limit of the microwell array chip can be reduced. Therefore, the detection device including the microwell array chip also has higher sensitivity and lower detection limit.
  • Figure 28 is a schematic diagram of another detection device provided by an embodiment of the present disclosure.
  • the detection device 500 also includes a first housing 510 and a second housing 520; the first housing 510 is located on one side of the microhole array chip 100 and is spaced apart from the first main surface 110A; the second housing 520 It is located on the side of the microhole array chip 100 away from the first housing 510 and is spaced apart from the second main surface 110B.
  • the distance between the second main surface 110B and the second housing 520 is greater than or equal to the thickness of the microhole array chip 100 .
  • the detection device can facilitate the entry of liquid into the microwell array chip.
  • FIG. 29 is a schematic plan view of a second housing in a detection device according to an embodiment of the present disclosure.
  • the second housing 520 includes a support structure 525.
  • the support structure 525 includes a first platform portion 525A and a second platform portion 525B.
  • the height of the second platform portion 525B is greater than the height of the first platform portion 525A.
  • the portion 525A is configured to be in contact with the bottom surface of the microwell array chip 100
  • the second platform portion 525B is configured to be in contact with the side surface of the microwell array chip 100 . Therefore, the detection device can support the microhole array chip through the first platform part and position the microhole array chip through the second platform part, thereby improving detection accuracy.
  • the shape of the orthographic projection of the first platform portion 525A on the first reference plane 201 where the first major surface 110A is located includes an arc triangle, and the second platform portion 525B is on the first major surface.
  • the shape of the orthographic projection on the first reference plane 201 (the first reference plane can be seen in Figure 27) where 110A is located includes a semicircle, the base of the arc triangle connected to the semicircle is a straight line, and the other two sides of the arc triangle are The edges are arcs.
  • the second housing 520 further includes a positioning circular platform 528 configured to be in contact with the side of the microhole array chip 100 to further position the microhole array chip to improve detection accuracy.
  • At least one embodiment of the present disclosure also provides a method of using a microwell array chip.
  • the microwell array chip includes a microwell array substrate; the use method includes the following steps S101-S103.
  • Step S101 Pass the sample to be tested into the microwell array substrate.
  • Step S102 Encapsulate the sample to be tested in a microwell array substrate.
  • the microwell array substrate includes a first main surface and a second main surface that are arranged oppositely.
  • the microwell array substrate includes n reaction chambers and idle areas, n
  • the reaction chamber array is arranged in the microwell array substrate and is configured to accommodate the sample to be measured;
  • the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located is a regular N-gon, and the idle area Set around n reaction chambers;
  • the area of the idle area is divided into n' virtual units, and the shape of the orthographic projection of the virtual unit on the first reference plane is the same as the shape of the orthographic projection of the reaction chamber on the first reference plane.
  • the total volume V of n reaction chambers satisfies the following formula:
  • (1- ⁇ ) is the confidence level
  • S chip is the area of the microhole array substrate
  • h is the depth of the reaction chamber in the direction perpendicular to the first reference plane
  • N is a positive integer greater than or equal to 3
  • X It is 1/2 the size of the distance between adjacent reaction chambers on the line connecting the centers of adjacent reaction chambers.
  • the method of use can efficiently utilize the area of the microwell array substrate, so that in the reaction chamber When the number of reaction chambers is large enough, the volume of a single reaction chamber can be increased, thereby improving the sensitivity of the microwell array chip and reducing the detection limit of the microwell array chip.
  • the total volume V of n reaction chambers satisfies the following formula:
  • the microhole array chip can efficiently utilize the area of the microhole array substrate, improve the sensitivity of the microhole array chip, and reduce the detection limit of the microhole array chip.
  • the microwell array chip further includes a support region configured to provide a support structure.
  • the total volume V of n reaction chambers satisfies the following formula:
  • S support is the area of the support area.
  • the support area can be used to be in contact with the support structure (such as the support structure of the base), so that there is a certain gap between the microhole array substrate and the base, which is convenient for the sample to be tested entry, allowing the microwell array substrate to be oil-sealed.
  • the support structure such as the support structure of the base
  • the shape of the orthographic projection of the reaction chamber on the first reference plane where the first main surface is located and the shape of the orthographic projection of the virtual unit on the first reference plane are both regular hexagons, and n reaction chambers
  • the total volume V satisfies the following formula:
  • the value range of X is 10-20 microns
  • the value range of h is 190-320 microns.
  • the shape of the orthographic projection of each reaction chamber on the first reference plane is a regular hexagon, and since the total volume V of the n reaction chambers satisfies the above formula, the microwell The array chip can efficiently utilize the area of the microwell array substrate, thereby increasing the volume of a single reaction chamber, thereby improving the sensitivity of the microwell array chip and reducing the detection limit of the microwell array chip.
  • the size of the spacing between adjacent reaction chambers on a line connecting the centers of adjacent reaction chambers may range from 20 to 40 microns, for example, 24 microns, 26 microns, 28 microns, 30 microns, 32 micron, 34 micron or 36 micron.
  • the depth of the reaction chamber in a direction perpendicular to the first reference plane may be 200 microns, 220 microns, 240 microns, 260 microns, 280 microns, or 300 microns.
  • the number of reaction chambers on one microwell array substrate may range from 8,000 to 100,000. As a result, the microwell array chip has higher detection accuracy.
  • the number of reaction chambers on one microwell array substrate may be 8,000, 10,000, 20,000, 40,000, 60,000, 80,000, or 100,000.
  • encapsulating the sample to be tested in the microhole array substrate includes: after passing the sample to be tested into the microhole array substrate, attaching the first encapsulation film away from the first main surface through static electricity or colloid. On one side of the second main surface, attach the second packaging film to the side of the second main surface away from the first main surface. Therefore, the microhole array chip can simply package the microhole array substrate with high efficiency.
  • encapsulating the sample to be tested in the microwell array substrate includes: after passing the sample to be tested into the microwell array substrate, applying light curing at an opening position of the reaction chamber near the first main surface. oil; and using ultraviolet light to cure light-curing oil. Therefore, the microhole array chip can use light-curing oil and light-curing technology to encapsulate the microhole array substrate, which has the advantages of simplicity, efficiency, and good encapsulation effect.
  • the microwell array substrate when the microwell array substrate adopts a flexible substrate as shown in Figure 19, the microwell array substrate may include a first sub-flexible microwell array substrate and a second sub-flexible microwell array substrate, and the first sub-flexible microwell array substrate A plurality of sample flow channels are included between the microwell array substrate and the second sub-flexible microwell array substrate. Passing the sample to be tested into the microwell array substrate includes: passing the sample to be tested through multiple sample flow channels.
  • vacuum adsorption, pumping, etc. can be used to pass the sample to be tested into multiple sample flow channels.
  • encapsulating the sample to be tested in the microwell array substrate includes: using rollers to separate each sample flow channel to form multiple reaction chambers, and sealing the multiple reaction chambers.
  • the roller has a heating function, and the first flexible microwell array substrate and the second flexible microwell array substrate are combined together by heating at certain distances, so that each sample flow channel can be separated to form multiple reaction chambers. room.

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Abstract

一种微孔阵列芯片及其使用方法和检测装置。该微孔阵列芯片包括微孔阵列基板,微孔阵列基板包括相对设置的第一主表面和第二主表面、n个反应腔室和闲置区域;n个反应腔室阵列设置在微孔阵列基板之中,闲置区域围绕n个反应腔室设置;反应腔室被配置为容纳待测样品,反应腔室在第一主表面所在的第一参考平面上的正投影的形状为正N边形,闲置区域的面积被划分为n'个虚拟单元,虚拟单元在第一参考平面上的正投影形状与反应腔室在第一参考平面上的正投影的形状相同。该微孔阵列芯片通过高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。

Description

微孔阵列芯片及其使用方法和检测装置 技术领域
本公开的实施例涉及一种微孔阵列芯片及其使用方法和检测装置。
背景技术
聚合酶链式反应(PCR)是一种可将DNA片段体外扩增的分子生物技术,数字PCR技术(dPCR)是一种核酸分子绝对定量的新技术,它不依赖标准曲线和参照样本,无需设对照,可直接检测出目标分子的拷贝数。数字PCR技术的原理是将低模板的试剂分配到大量微孔中,经过统计学分析,大部分微孔中没有或者只有1个目标分子,扩增完成后,通过光学检测模块计数,即为初始模板量。相比于传统的定量PCR,数字PCR技术具有更高的灵敏度、特异性、高耐受性和精确性,此项技术已经在极微量核酸样本检测、CNV分析和复杂样本基因表达检测等方面有着广泛应用。
微孔阵列芯片是一种包括多个微孔(microwell)形成的阵列的基板,各微孔可作为小试管,用于从许多化合物中检测或选择特定化合物。因此,数字PCR技术可采用微孔阵列芯片进行检测,通过将试剂挤入芯片孔道内,并使得试剂分配到大量微孔中。
发明内容
本公开实施例提供一种微孔阵列芯片及其使用方法和检测装置。该微孔阵列芯片包括微孔阵列基板,微孔阵列基板包括相对设置的第一主表面和第二主表面、n个反应腔室和虚拟闲置区域;n个反应腔室阵列设置在微孔阵列基板之中,虚拟闲置区域围绕n个反应腔室设置;反应腔室被配置为容纳待测样品,虚拟闲置区域的面积被划分为n’个虚拟单元,反应腔室在第一主表面所在的第一参考平面上的正投影的形状为正N边形,而虚拟单元在第一参考平面上的正投影形状与反应腔室在第一参考平面上的正投影的形状相同。该微孔阵列芯片通过高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
本公开至少一个实施例提供一种微孔阵列芯片,其包括:微孔阵列基板,包括相对设置的第一主表面和第二主表面;n个反应腔室,阵列设置在所述微 孔阵列基板之中,并被配置为容纳待测样品,所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状为正N边形;以及虚拟闲置区域,围绕n个所述反应腔室设置;所述虚拟闲置区域的面积被划分为n’个虚拟单元,所述虚拟单元在所述第一参考平面上的正投影的形状与所述反应腔室在所述第一参考平面上的正投影的形状相同,n个所述反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000001
其中,(1-α)为置信度水平,S chip为所述微孔阵列基板的面积,h为所述反应腔室在垂直于所述第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻的所述反应腔室之间的间隔在相邻的所述反应腔室的中心连线的尺寸的1/2。
例如,本公开一实施例提供的微孔阵列芯片还包括支撑区域,被配置为设置支撑结构,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000002
其中,S support为所述支撑区域的面积。
例如,本公开一实施例提供的微孔阵列芯片还包括:反应区域,设置在所述支撑区域的周边,所述n个所述反应腔室位于所述反应区域。
例如,在本公开一实施例提供的微孔阵列芯片中,在所述反应区域,相邻两个所述反应腔室在所述第一参考平面上的正投影的中心距离相等。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状和所述虚拟单元在所述第一参考平面上的正投影的形状均为正六边形,n个所述反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000003
其中,X的取值范围为10-20微米,h的取值范围为190-320微米。
例如,在本公开一实施例提供的微孔阵列芯片中,n的取值范围为 8000-100000。
例如,在本公开一实施例提供的微孔阵列芯片中,n个所述反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000004
例如,本公开一实施例提供的微孔阵列芯片还包括:第一疏水层,位于所述第一主表面上,所述第一疏水层在所述第一参考平面上的正投影与所述反应腔室在所述第一参考平面上的正投影间隔设置。
例如,本公开一实施例提供的微孔阵列芯片还包括:第二疏水层,位于所述第二主表面上,所述第二疏水层延伸至所述反应腔室的边缘。
例如,本公开一实施例提供的微孔阵列芯片还包括:所述第二疏水层在所述第二主表面所在的第二参考平面上的正投影包括开口,所述开口的边缘与所述反应腔室在所述第二参考平面上的边缘重合。
例如,本公开一实施例提供的微孔阵列芯片还包括:第二疏水层,位于所述第二主表面上,所述反应腔室在垂直于所述第一参考平面的方向上贯穿所述微孔阵列基板,所述第二疏水层横跨所述反应腔室,所述反应腔室在所述第二主表面所在的第二参考平面上的正投影落入所述第二疏水层在所述第二参考平面上的正投影之内。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室从所述第一主表面凹入所述微孔阵列基板并具有位于所述微孔阵列基板之中的腔体底部,所述腔体底部与所述第一参考平面之间的距离小于所述微孔阵列基板的厚度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述第一疏水层与所述待测样品的接触角小于所述反应腔室的临界角,所述临界角为所述反应腔室的侧壁的延长线与所述待测样品与所述反应腔室的侧壁接触的表面的切线之间的角度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述腔体底部包括至少一个排气孔,各所述排气孔在垂直于所述第一参考平面的方向上贯穿所述腔体底部。
例如,在本公开一实施例提供的微孔阵列芯片中,所述腔体底部包括一个 所述排气孔,所述排气孔在所述第二主表面所在的第二参考平面上的正投影位于所述腔体底部在所述第二参考平面上的正投影的中心。
例如,在本公开一实施例提供的微孔阵列芯片中,所述腔体底部包括多个所述排气孔,所述排气孔在所述第二主表面所在的第二参考平面上的正投影围绕所述腔体底部在所述第二参考平面上的正投影的中心设置。
例如,本公开一实施例提供的微孔阵列芯片还包括:透析膜;以及第二疏水层,所述反应腔室在垂直于所述第一参考平面的方向上贯穿所述微孔阵列基板,所述第二疏水层延伸至所述反应腔室的边缘,所述透析膜横跨所述反应腔室。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室在所述第二主表面所在的第二参考平面上的正投影落入所述透析膜在所述第二参考平面上的正投影之内。
例如,在本公开一实施例提供的微孔阵列芯片中,所述透析膜为柔性透析膜。
例如,在本公开一实施例提供的微孔阵列芯片中,所述透析膜位于所述第二疏水层靠近所述第二主表面的一侧。
例如,在本公开一实施例提供的微孔阵列芯片中,所述透析膜位于所述第二疏水层远离所述第二主表面的一侧。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面与所述第一主表面的夹角大于90度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面和第二子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面与所述第二主表面的夹角大于90度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面、第二子表面和第三子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第三子表面位于所述第二子表面远离所述第一子表面的一侧,所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面所在的平面与所述第一参考平面垂直,所述第三子表面与所述第二主表面的夹角大于90度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面、第二子表面和第三子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第三子表面位于所述第二子表面远离所述第一子表面的一侧,所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面为圆弧面,且向所述为微孔阵列基板凹陷,所述第三子表面与所述第二主表面的夹角大于90度。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面上设置有第一亲水膜和第二亲水膜,所述第一亲水膜和所述第二亲水膜在垂直于所述第一参考平面的方向上相邻设置,所述第一亲水膜远离所述反应腔室的内侧表面的表面为向所述反应腔室的中心轴凸起的圆弧面,所述第二亲水膜远离所述反应腔室的内侧表面的表面为向所述反应腔室的中心轴凸起的圆弧面。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的所述内侧表面为平面,所述第一亲水膜在垂直于所述内侧表面的方向上的厚度不同,以使得所述第一亲水膜远离所述反应腔室的内侧表面的表面为圆弧面,所述第二亲水膜在垂直于所述内侧表面的方向上的厚度不同,以使得所述第二亲水膜远离所述反应腔室的内侧表面的表面为圆弧面。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面和第二子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第一子表面向所述反应腔室的中心轴凸起,以使得所述第一亲水膜远离所述反应腔室的内侧表面的表面为圆弧面,所述第二子表面向所述反应腔室的中心轴凸起,以使得所述第二亲水膜远离所述反应腔室的内侧表面的表面为圆弧面。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室在所述第一参考平面上的正投影的形状虚拟为圆形、正六边形、正八边形中的一种。
例如,在本公开一实施例提供的微孔阵列芯片中,所述反应腔室在所述第一参考平面上的正投影的形状虚拟为三角形。
例如,本公开一实施例提供的微孔阵列芯片还包括:第一封装膜,位于所述第一主表面远离所述第二主表面的一侧;第二封装膜,位于所述第二主表面远离所述第一主表面的一侧,所述第一封装膜和所述第二封装膜通过静电或者胶体贴附在所述微孔阵列基板上。
例如,本公开一实施例提供的微孔阵列芯片还包括:光固化油,位于所述反应腔室靠近所述第一主表面的开口位置处,所述光固化油包括凸台结构,所述凸台结构与第一主表面接触设置,且位于所述第一疏水层靠近所述反应腔室的中心轴的一侧。
例如,在本公开一实施例提供的微孔阵列芯片中,所述微孔阵列基板为柔性基板。
例如,在本公开一实施例提供的微孔阵列芯片中,所述微孔阵列基板还包括:进液流道,n个所述反应腔室与所述进液流道相连通,各所述反应腔室与所述进液流道之间设置有单向膜。
例如,在本公开一实施例提供的微孔阵列芯片中,所述进液流道包括:进液主流道;n个进液支流道,分别与所述进液主流道相连通,所述n个进液支流道和所述n个反应腔室一一对应设置。
例如,在本公开一实施例提供的微孔阵列芯片中,所述微孔阵列基板还包括:进液流道,包括多个相互相通的多个子进液流道,所述多个子进液流道的高度不同,各子进液流道与多个反应腔室相连通。
例如,在本公开一实施例提供的微孔阵列芯片中,所述多个子进液流道的高度依次降低。
例如,在本公开一实施例提供的微孔阵列芯片中,所述多个进液流道的高度从中间向两侧依次降低。
例如,本公开一实施例提供的微孔阵列芯片还包括:第一基板,位于所述微孔阵列基板的一侧,且与所述第一主表面间隔设置;以及第二基板,位于所述微孔阵列基板远离所述第一基板的一侧,所述第二基板包括加热电极,所述加热电极在所述第一参考平面上的正投影与n个所述反应腔室中的至少部分在所述第一参考平面上的正投影交叠。
例如,在本公开一实施例提供的微孔阵列芯片中,所述第一基板包括:第一衬底基板;第三疏水层,位于所述第一衬底基板靠近所述第二基板的一侧。
例如,在本公开一实施例提供的微孔阵列芯片中,所述第二基板还包括:第二衬底基板;控制电极,位于所述第二衬底基板上;第一绝缘层,位于所述控制电极远离所述第二衬底基板的一侧;以及第二绝缘层,所述第一绝缘层包括连接孔,所述连接孔暴露所述控制电极的至少一部分,所述加热电极位于所述第一绝缘层远离所述第二衬底基板的一侧,并通过所述连接孔与所述控制电 极相连,所述第二绝缘层位于所述加热电极远离所述第一绝缘层的一侧,所述微孔阵列基板位于所述第二绝缘层上。
例如,本公开一实施例提供的微孔阵列芯片还包括:光敏传感器,位于所述第二基板远离所述第一基板的一侧,所述光敏传感器被配置为检测所述微孔阵列基板中所述反应腔室发出的光。
本公开至少一个实施例还提供一种检测装置,包括上述任一项所述的微孔阵列芯片。
例如,本公开一实施例提供的检测装置还包括:第一外壳,位于所述微孔阵列芯片的一侧,且与所述微孔阵列芯片间隔设置;以及第二外壳,位于所述微孔阵列芯片远离所述第一外壳的一侧,且与所述微孔阵列芯片间隔设置,所述微孔阵列芯片与所述第二外壳之间的距离大于等于所述微孔阵列芯片的厚度。
例如,在本公开一实施例提供的检测装置中,所述第二外壳包括支撑结构,所述支撑结构包括第一平台部和第二平台部,所述第二平台部的高度大于所述第一平台部的高度,所述第一平台部被配置为与所述微孔阵列芯片的底面接触,所述第二平台部配置为与所述微孔阵列芯片的侧面接触。
例如,在本公开一实施例提供的检测装置中,所述第一平台部在所述第一主表面上的正投影的形状包括弧线三角形,所述第二平台部在所述第一主表面上的正投影的形状包括半圆形,所述弧线三角形与所述半圆形相连的底边为直线,所述弧线三角形的另外两条边为弧线。
例如,在本公开一实施例提供的检测装置中,所述第二外壳还包括定位圆台,被配置为与所述微孔阵列芯片的侧面接触设置。
本公开至少一个实施例还提供一种微孔阵列芯片的使用方法,所述微孔阵列芯片包括微孔阵列基板,所述使用方法包括:在所述微孔阵列基板之中通入待测样品;将所述待测样品封装在所述微孔阵列基板之中,所述微孔阵列基板包括n个反应腔室和闲置区域,所述n个反应腔室阵列设置在所述微孔阵列基板之中,并被配置为容纳待测样品;所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状为正N边形,所述闲置区域围绕n个所述反应腔室设置;所述闲置区域的面积被划分为n’个虚拟单元,所述虚拟单元在所述第一参考平面上的正投影的形状与所述反应腔室在所述第一参考平面上的正投影的形状相同,n个所述反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000005
其中,(1-α)为置信度水平,S chip为所述微孔阵列基板的面积,h为所述反应腔室在垂直于所述第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻的所述反应腔室之间的间隔在相邻的所述反应腔室的中心连线的尺寸的1/2。
例如,在本公开一实施例提供的微孔阵列芯片的使用方法中,将所述待测样品封装在所述微孔阵列基板之中包括:在所述微孔阵列基板之中通入待测样品之后,通过静电或者胶体将第一封装膜贴附在所述第一主表面远离所述第二主表面的一侧,将第二封装膜贴附在所述第二主表面远离所述第一主表面的一侧。
例如,在本公开一实施例提供的微孔阵列芯片的使用方法中,将所述待测样品封装在所述微孔阵列基板之中包括:在所述微孔阵列基板之中通入待测样品之后,在所述反应腔室靠近所述第一主表面的开口位置处涂覆光固化油;以及采用紫外光将所述光固化油固化。
例如,在本公开一实施例提供的微孔阵列芯片的使用方法中,所述微孔阵列基板包括第一子柔性微孔阵列基板和第二子柔性微孔阵列基板,所述第一子柔性微孔阵列基板和所述第二子柔性微孔阵列基板之间包括多个样品流道,在所述微孔阵列基板之中通入待测样品包括:在所述多个样品流道通入待测样品。
例如,本公开一实施例提供的微孔阵列芯片的使用方法还包括:采用抽真空方式将在所述多个样品流道通入待测样品。
例如,在本公开一实施例提供的微孔阵列芯片的使用方法中,将所述待测样品封装在所述微孔阵列基板之中包括:采用辊轮将各所述样品流道进行分隔以形成多个反应腔室,并将多个反应腔室密封。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为本公开实施例一实施例提供的一种微孔阵列芯片的平面示意图;
图2为本公开一实施例提供的一种微孔阵列芯片的剖面示意图;
图3A为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的平面示意图;
图3B为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的剖面示意图;
图4A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图4B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图5为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图6A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图6B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图7A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图7B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图8A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图8B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图9A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图9B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图10A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图10B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图11A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图11B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;
图11C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图;
图12A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图12B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;
图12C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图;
图13A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图13B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示 意图;
图13C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图;
图14A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图14B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;
图14C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图;
图15为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图16为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图17为本公开一实施例提供的一种微孔阵列芯片的结构示意图;
图18为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图19为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图20为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图21为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图22为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图23为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;
图24为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图25为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图26为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;
图27为本公开一实施例提供的一种检测装置的示意图;
图28为本公开一实施例提供的另一种检测装置的示意图;以及
图29为本公开一实施例提供的一种检测装置中第二外壳的平面示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领 域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。
除非另外定义,本公开实施例中使用的“平行”、“垂直”和“相同”等特征均包括严格意义上的“平行”、“垂直”、“相同”等情况,以及“大致平行”、“大致垂直”、“大致相同”等包含一定误差的情况。例如,上述的“大致”可表示所比较的对象的差值为所比较的对象的平均值的10%,或者5%之内。在本公开实施例的下文中没有特别指出一个部件或元件的数量时,意味着该部件或元件可以是一个也可以是多个,或可理解为至少一个。“至少一个”指一个或多个,“多个”指至少两个。本公开实施例中的“同层设置”指同一材料在经过同一步骤(例如,一步图案化工艺)后形成的多个膜层之间的关系。这里的“同层”并不总是指多个膜层的厚度相同或者多个膜层在截面图中的高度相同。
在研究中,本申请的发明人注意到,当前的数字PCR芯片的主要问题是如何提升灵敏度,如何降低芯片的检出限;从化学的角度来说,单个腔室的体积足够大,样品越充分,则反应则越完全;另一方面,如果单个反应腔室的体积若较大,则会造成芯片单位面积下的腔室体积的浪费。因此,反应腔室的需要控制在一定范围之内。
对此,本公开实施例提供一种微孔阵列芯片及其使用方法和检测装置。该微孔阵列芯片包括微孔阵列基板,微孔阵列基板包括相对设置的第一主表面和第二主表面、n个反应腔室和闲置区域;n个反应腔室阵列设置在微孔阵列基板之中,闲置区域围绕n个反应腔室设置;反应腔室被配置为容纳待测样品,反应腔室在第一主表面所在的第一参考平面上的正投影的形状为正闲置区域的面积被划分为n’个虚拟单元,反应腔室在第一主表面所在的第一参考平面上的正投影的形状和虚拟单元在第一参考平面上的正投影形状均为正N边形,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000006
其中,(1-α)为置信度水平,S chip为微孔阵列基板的面积,h为反应腔室在垂直于第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻的反应腔室之间的间隔在相邻的反应腔室的中心连线的尺寸的1/2。
在本公开实施例提供的微孔阵列芯片中,由于n个反应腔室的总体积V满足上述的公式,该微孔阵列芯片可高效地利用微孔阵列基板的面积,从而在反应腔室的数量足够多的前提下增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
下面,结合附图对本公开实施例提供的微孔阵列芯片及其使用方法和检测装置进行详细的说明。
本公开一实施例提供一种微孔阵列芯片。图1为本公开实施例一实施例提供的一种微孔阵列芯片的平面示意图。图2为本公开一实施例提供的一种微孔阵列芯片的剖面示意图。
如图1和图2所示,该微孔阵列芯片100包括微孔阵列基板110;微孔阵列基板110包括相对设置的第一主表面110A和第二主表面110B、n个反应腔室120和闲置区域130;n个反应腔室120阵列设置在微孔阵列基板110之中,闲置区域130围绕n个反应腔室120设置;反应腔室120被配置为容纳待测样品,反应腔室120在第一主表面110A所在的第一参考平面201上的正投影的形状为正N边形,闲置区域130的面积被划分为n’个虚拟单元132,虚拟单元132在第一参考平面201上的正投影形状与反应腔室120在第一参考平面201上的正投影的形状相同,n个反应腔室120的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000007
其中,(1-α)为置信度水平,S chip为微孔阵列基板110的面积,h为反应腔室120在垂直于第一参考平面201的方向上的深度,N为大于等于3的正整数,X为相邻反应腔室120之间的间隔在相邻反应腔室120的中心连线上的尺寸的1/2。需要说明的是,当N的取值为无限大时,上述的正N边形可为圆形;另外,图1所示的微孔阵列基板中的反应腔室的大小和数量仅是示意性的,反应腔室的数量可根据实际需要进行设置。
在本公开实施例提供的微孔阵列芯片中,由于n个反应腔室的总体积V满足上述的公式,该微孔阵列芯片可高效地利用微孔阵列基板的面积,从而在反 应腔室的数量足够多的前提下增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000008
由此,该微孔阵列芯片可高效地利用微孔阵列基板的面积,可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,如图1和图2所示,该微孔阵列芯片110还包括支撑区域140,支撑区域140被配置为设置支撑结构。此时,n个反应腔室120的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000009
其中,S support为支撑区域140的面积。
在该示例提供的微孔阵列芯片中,支撑区域可用于与支撑结构(例如底座的支撑结构)接触设置,从而使得微孔阵列基板与底座之间具有一定的空隙,方便液体(例如待测样品)的进入,从而使得微孔阵列基板可进行油封。需要说明的是,图1中支撑区域采用的不同的填充图案,但是该支撑区域与其他区域的材料可以相同,即支撑区域的表面与周边的闲置区域的表面可以相同。当然,本公开实施例包括但不限于此,支撑区域与支撑结构接触的表面也可涂覆其他材料或结构、或者进行表面处理,以增加摩擦力或者其他特性,以更好地与支撑结构接触设置。
在一些示例中,如图1和图2所示,该微孔阵列芯片100还包括反应区域150;反应区域150设置在支撑区域140的周边,n个反应腔室120设置在反应区域150之中。由此,该微孔阵列芯片的支撑区域不设置反应腔室,并且反应区域设置在支撑区域的周边,可充分地利用该微孔阵列基板的面积。
例如,如图1和图2所示,四个支撑区域140位于微孔阵列基板110的四个边缘,且分别位于边缘的中间;反应区域150设置在微孔阵列基板110的中间区域,且位于支撑区域140的周边。
需要说明的是,在本公开实施例提供的微孔阵列芯片中,虚拟单元的设置是为了将闲置区域的面积也将反应腔室所占的面积作为单元进行计算,因此虚 拟单元与反应腔室不仅形状相同,并且其相互的排布方式也相同。例如,相邻的虚拟单元与反应腔室之间的间距、相邻的反应腔室与反应腔室之间的间距、相邻的虚拟单元之间的间距均可相同。又例如,当反应腔室按照一定周期进行排布以形成反应腔室组(例如形成反应腔室行或者反应腔室列)时,虚拟单元也可按照一定周期进行排布以形成虚拟组。又例如,当反应腔室因其采用的形状进行规则排布或者错位排布时,虚拟单元也同样进行规则排布或者错位排布,以将整个微孔阵列基板上的反应区域和闲置区域进行填充。值得注意的是,当该微孔阵列芯片包括支撑区域时,虚拟单元仅需避开该支撑区域即可,闲置区域的虚拟单元的排布仍然与反应腔室的排布相同。
在一些示例中,如图1和图2所示,在反应区域150,相邻的两个反应腔室120在第一参考平面201上的正投影的中心距离相等。也就是说,反应区域中的相邻反应腔室之间壁垒相等,分布均匀。由此,该微孔阵列芯片可保证进入各个反应腔室的液体(例如待测样品)的体积一致,使得反应更加精准。
在一些示例中,如图1和图2所示,各反应腔室120在第一参考平面201上的正投影的形状为正六边形,从而可在具有较大体积的同时,使得液体(例如待测样品)更容易进入反应腔室。当然,本公开实施例包括但不限于此,各反应腔室120在第一参考平面201的正投影的形状还可为圆形、正八边形、正五边形、正方形和三角形等。
例如,各反应腔室在第一参考平面上的正投影的形状可为三角形。由于三角形的各个角的角度较小,从而可破坏待测样本的表面张力,从而更利于测试样品进入反应腔室。
在一些示例中,如图1和图2所示,反应腔室120在第一主表面110A所在的第一参考平面201上的正投影的形状和虚拟单元132在第一参考平面201上的正投影的形状均为正六边形,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000010
其中,X的取值范围为10-20微米,h的取值范围为190-320微米。
在该示例提供的微孔阵列芯片中,各反应腔室在第一参考平面上的正投影的形状为正六边形,并且由于n个反应腔室的总体积V满足上述的公式,该微孔阵列芯片可高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体 积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,相邻反应腔室120之间的间隔在相邻反应腔室120的中心连线上的尺寸的范围可为20-40微米,例如,24微米、26微米、28微米、30微米、32微米、34微米或36微米。
在一些示例中,反应腔室120在垂直于第一参考平面201的方向上的深度可为200微米、220微米、240微米、260微米、280微米或300微米。
在一些示例中,一个微孔阵列基板110上的反应腔室120的数量可为8000-100000个。由此,该微孔阵列芯片具有更高的检测精度。
在一些示例中,一个微孔阵列基板110上的反应腔室120的数量可为8000个、10000个、20000个、40000个、60000个、80000个或100000个。
图3A为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的平面示意图;图3B为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的剖面示意图。
如图3A和3B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。需要说明的是,第一疏水层具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板所限定的各反应腔室中。
例如,第一疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第一疏水层也可以采用其他合适的无机或有机材料制备,只要保证第一疏水层远离微孔阵列基板的的一侧具有疏水性即可。
在一些示例中,如图3A和3B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图3A所示,反应腔室120在第一参考平面201上的正投影的形状为正六边形,第一开口1610的形状为正六边形,且第一开口1610的边长大于反应腔室120在第一参考平面201上的正投影的边长。
在一些示例中,如图3A和3B所示,在该微孔阵列芯片100中,反应腔 室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图3A和3B所示,该微孔阵列芯片100还包括第二疏水层162;第二疏水层162位于第二主表面110B上;第二疏水层162延伸至反应腔室120的边缘。需要说明的是,第二疏水层具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板所限定的各反应腔室中。
例如,第二疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第二疏水层也可以采用其他合适的无机或有机材料制备,只要保证第二疏水层远离微孔阵列基板的的一侧具有疏水性即可。
在一些示例中,如图3A和3B所示,第二疏水层162在第二主表面110B所在的第二参考平面202上的正投影包括第二开口1620,第二开口1620的边缘与反应腔室120在第二参考平面202上的边缘重合。也就是说,第二疏水层刚好位于相邻的反应腔室之间。
在一些示例中,如图3A所示,反应腔室120在第一参考平面201上的正投影的形状为正六边形,第二开口1620的形状为正六边形,且第二开口1620的边长等于反应腔室120在第一参考平面201上的正投影的边长。
图4A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;图4B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图4A和图4B所示,在该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图4A和4B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。需要说明的是,第一疏水层具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板所限定的各反应腔室中。
例如,第一疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第一疏水层也可以采用其他合适的无机或有机材料制备,只要保证第一疏水层远离微 孔阵列基板的的一侧具有疏水性即可。
在一些示例中,如图4A和4B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图4A和4B所示,该微孔阵列芯片100还包括第二疏水层162,位于第二主表面110B上;第二疏水层162横跨反应腔室120,反应腔室120在第二主表面110B的第二参考平面202上的正投影落入第二疏水层162在第二参考平面202上的正投影之内。也就是说,该微孔阵列芯片可通过第二疏水层将反应腔室位于第二主表面的一侧密封,从而使得反应腔室形成盲孔。
在一些示例中,如图4A所示,反应腔室120在第一参考平面201上的正投影的形状为正六边形;此时,第一疏水层161在第一参考平面201上的正投影的第一开口1610的形状也为正六边形,且第一开口1610的边长大于反应腔室120在第一参考平面201上的正投影的边长。
图5为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图5所示,反应腔室120从第一主表面110A凹入微孔阵列基板110并具有位于微孔阵列基板110之中的腔体底部122,腔体底部122与第一参考平面201之间的距离小于微孔阵列基板110的厚度。也就是说,反应腔室为盲孔。
在一些示例中,如图5所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上。第一疏水层161与待测样品的接触角θ e小于反应腔室120的临界角θ t0,临界角θ e为反应腔室120的侧壁的延长线与待测样品与反应腔室120的侧壁接触的表面的切线之间的角度。由此,该微孔阵列芯片可若使得待测样品更好地进入反应腔室。
在一些示例中,如图5所示,相邻两个反应腔室120沿第一方向设置,相邻两个反应腔室120之间的侧壁在第一参考平面201上沿第一方向上的尺寸为Wtt,相邻两个反应腔室120之间的侧壁在第二参考平面202上沿第一方向上的尺寸为Wtb,反应腔室120的腔体底部122在第二参考平面202上的正投影沿第一方向上的尺寸为St,反应腔室120的侧壁与垂直于第二参考平面202的方向之间的夹角为α t;此时,反应腔室的临界角θ t0满足下列公式:
Figure PCTCN2022087880-appb-000011
图6A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;图6B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图6A和6B所示,反应腔室120从第一主表面110A凹入微孔阵列基板110并具有位于微孔阵列基板110之中的腔体底部122,腔体底部122与第一参考平面201之间的距离小于微孔阵列基板110的厚度。也就是说,反应腔室为盲孔。
在一些示例中,如图6A和图6B所示,腔体底部122包括至少一个排气孔1220,各排气孔1220在垂直于第一参考平面201的方向上贯穿腔体底部122。由此,在液体(例如待测样品)进入反应腔室时,排气孔可用于气体的排出,从而使得液体更容易进入反应腔室,提升液体进入反应腔室的速度。
在一些示例中,如图6A和图6B所示,腔体底部122包括一个排气孔1220,排气孔1220在第二主表面110B所在的第二参考平面202上的正投影位于腔体底部122在第二参考平面202上的正投影的中心。由此,空气可迅速地从反应腔室的排气孔排出,从而提升液体(例如待测样品)进入反应腔室的速度。
在一些示例中,如图6A和6B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。需要说明的是,第一疏水层具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板所限定的各反应腔室中。
例如,第一疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第一疏水层也可以采用其他合适的无机或有机材料制备,只要保证第一疏水层远离微孔阵列基板的的一侧具有疏水性即可。
在一些示例中,如图6A和6B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图6A和6B所示,该微孔阵列芯片100还包括第二疏 水层162,位于第二主表面110B上;第二疏水层162也包括排气开口1625,排气开口1625与上述的排气孔1220相连通。
图7A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;图7B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图7A和7B所示,反应腔室120从第一主表面110A凹入微孔阵列基板110并具有位于微孔阵列基板110之中的腔体底部122,腔体底部122与第一参考平面201之间的距离小于微孔阵列基板110的厚度。也就是说,反应腔室为盲孔。
在一些示例中,如图7A和图7B所示,腔体底部122包括多个排气孔1220,各排气孔1220在垂直于第一参考平面201的方向上贯穿腔体底部122;多个排气孔1220在第二主表面110B所在的第二参考平面202上的正投影围绕腔体底部122在第二参考平面202上的正投影的中心设置。由此,在液体(例如待测样品)进入反应腔室时,多个排气孔可同时用于气体的排出,从而使得液体更容易进入反应腔室,提升液体进入反应腔室的速度。
在一些示例中,如图7A所示,反应腔室120在第二参考平面202上的正投影的形状为正六边形;此时,六个排气孔1220在第二参考平面202上的正投影设置在反应腔室120在第二参考平面202上的正投影的六个角。
在一些示例中,如图7A和7B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图7A和7B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图7A和7B所示,该微孔阵列芯片100还包括第二疏水层162,位于第二主表面110B上;第二疏水层162包括多个排气开口1625,多个排气开口1625与多个排气开口1220一一对应设置,各排气开口1625与对应的排气孔1220相连通。
图8A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;图8B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图8A和图8B所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图8A和8B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图8A和8B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图8A和图8B所示,该微孔阵列芯片100还包括透析膜170和第二疏水层162;反应腔室120在垂直于第一参考平面201的方向上贯穿微孔阵列基板110,第二疏水层162延伸至反应腔室120的边缘,透析膜170横跨反应腔室120。由此,透析膜允许反应腔室中的气体排出,但是不允许反应腔室中的液体流出,从而可在提升液体(例如待测样品)进入反应腔室的速度的同时,防止液体从反应腔室流出。
在一些示例中,如图8A和图8B所示,反应腔室120在第二主表面110B所在的第二参考平面202上的正投影落入透析膜170在第二参考平面202上的正投影之内。
在一些示例中,如图8A和图8B所示,透析膜170为柔性透析膜。当透析膜为柔性透析膜时,可更好地与液体(例如待测样品)接触,从而将反应腔室中的气体排出。当然,本公开实施例包括但不限于此,透析膜也可为具有一定刚性的薄膜。
图9A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;图9B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图9A和图9B所示,该微孔阵列芯片100中,反应腔室120在垂直于 微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图9A和9B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图9A和9B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120在第一参考平面201上的边缘的外侧。
在一些示例中,如图9A和图9B所示,该微孔阵列芯片100还包括透析膜170和第二疏水层162;反应腔室120在垂直于第一参考平面201的方向上贯穿微孔阵列基板110,第二疏水层162延伸至反应腔室120的边缘,透析膜170横跨反应腔室120。透析膜170位于第二疏水层162靠近第二主表面110B的一侧。
图10A为本公开一实施例提供的另一种微孔阵列芯片的平面示意图;图10B为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。
如图10A和图10B所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图10A和10B所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图10A和10B所示,第一疏水层161在第一主表面110A所在的第一参考平面201上的正投影包括第一开口1610,第一开口1610的边缘与反应腔室120在第一参考平面201上的边缘间隔设置,且位于反应腔室120 在第一参考平面201上的边缘的外侧。
在一些示例中,如图10A和图10B所示,该微孔阵列芯片100还包括透析膜170和第二疏水层162;反应腔室120在垂直于第一参考平面201的方向上贯穿微孔阵列基板110,第二疏水层162延伸至反应腔室120的边缘,透析膜170横跨反应腔室120。透析膜170位于第二疏水层162远离第二主表面110B的一侧。
图11A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;图11B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;图11C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图。
如图11A、图11B和图11C所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图11A所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图11A所示,该微孔阵列芯片100还包括第二疏水层162;第二疏水层162位于第二主表面110B上;第二疏水层162延伸至反应腔室120的边缘。
在一些示例中,如图11A、图11B和图11C所示,反应腔室120的内侧表面126与第一主表面110A的夹角γ大于90度。也就是说,反应腔室120靠近第一主表面110A的部分的尺寸较大。由此,该反应腔室有利于液体的进入,从而可提升液体(例如待测样品)进入反应腔室的速度。
在一些示例中,如图11B所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为圆形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为圆形;并且,反应腔室120被第一参考平面201所截的截面的直径大于反应腔室120被第二参考平面202所截的截面的直径。
在一些示例中,如图11C所示,反应腔室120被第一主表面110A所在的 第一参考平面201所截的截面的形状为正六边形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为正六边形;并且,反应腔室120被第一参考平面201所截的截面的边长大于反应腔室120被第二参考平面202所截的截面的边长。
图12A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;图12B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;图12C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图。
如图12A、图12B和图12C所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图12A所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图12A所示,该微孔阵列芯片100还包括第二疏水层162;第二疏水层162位于第二主表面110B上;第二疏水层162延伸至反应腔室120的边缘。
在一些示例中,如图12A、图12B和图12C所示,反应腔室120的内侧表面126在垂直于第一参考平面201的方向上包括第一子表面1261和第二子表面1262,第二子表面1262位于第一子表面1261远离第一主表面110A的一侧,第一子表面1261与第一主表面110A的夹角大于90度,第二子表面1262与第二主表面110B的夹角大于90度。也就是说,反应腔室120靠近第一主表面110A的部分的尺寸较大,反应腔室120靠近第二主表面110B的部分的尺寸较大,反应腔室120中间的部分的尺寸较小。由此,该反应腔室一方面有利于液体的进入,另一方面有利于气体的排出,从而可进一步提升液体(例如待测样品)进入反应腔室的速度。
在一些示例中,如图12B所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为圆形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为圆形;反应腔室120被平行于第 一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为圆形;并且,反应腔室120被第一参考平面201所截的截面的直径和反应腔室120被第二参考平面202所截的截面的直径均大于反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的直径。
在一些示例中,如图12C所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为正六边形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为正六边形;反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为正六边形;并且,反应腔室120被第一参考平面201所截的截面的边长和反应腔室120被第二参考平面202所截的截面的边长均大于反应腔室120被第三参考平面203所截的截面的边长。
图13A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;图13B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;图13C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图。
如图13A、图13B和图13C所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图13A所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图13A所示,该微孔阵列芯片100还包括第二疏水层162;第二疏水层162位于第二主表面110B上;第二疏水层162延伸至反应腔室120的边缘。
在一些示例中,如图13A、图13B和图13C所示,反应腔室120的内侧表面126在垂直于第一参考平面201的方向上包括第一子表面1261、第二子表面 1262和第三子表面1263,第二子表面1262位于第一子表面1261远离第一主表面110A的一侧,第三子表面1263位于第二子表面1262远离第一子表面1261的一侧。第一子表面1261与第一主表面110A的夹角大于90度,第二子表面1262的平面与第一参考平面201垂直,第三子表面1263与第二主表面110B的夹角大于90度。在这种情况下,反应腔室120靠近第一主表面110A的部分的尺寸较大,反应腔室120靠近第二主表面110B的部分的尺寸较大,反应腔室120中间的部分的尺寸较小。由此,该反应腔室一方面有利于液体的进入,另一方面有利于气体的排出,从而可进一步提升液体(例如待测样品)进入反应腔室的速度。另外,由于第二子表面的平面与第一参考平面垂直,该反应腔室的中部便于存储液体。
在一些示例中,如图13B所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为圆形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为圆形;反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为圆形;并且,反应腔室120被第一参考平面201所截的截面的直径和反应腔室120被第二参考平面202所截的截面的直径均大于反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的直径。
在一些示例中,如图13C所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为正六边形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为正六边形;反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为正六边形;并且,反应腔室120被第一参考平面201所截的截面的边长和反应腔室120被第二参考平面202所截的截面的边长均大于反应腔室120被第三参考平面203所截的截面的边长。
图14A为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图;图14B为本公开一实施例提供的一种微孔阵列芯片中反应腔室的立体示意图;图14C为本公开一实施例提供的另一种微孔阵列芯片中反应腔室的立体示意图。
如图14A、图14B和图14C所示,该微孔阵列芯片100中,反应腔室120 在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。
在一些示例中,如图14A所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图14A所示,该微孔阵列芯片100还包括第二疏水层162;第二疏水层162位于第二主表面110B上;第二疏水层162延伸至反应腔室120的边缘。
在一些示例中,如图14A、图14B和图14C所示,反应腔室120的内侧表面126在垂直于第一参考平面201的方向上包括第一子表面1261、第二子表面1262和第三子表面1263,第二子表面1262位于第一子表面1261远离第一主表面110A的一侧,第三子表面1263位于第二子表面1262远离第一子表面1261的一侧。第一子表面1261与第一主表面110A的夹角大于90度,第二子表面1262为圆弧面,且向为微孔阵列基板110凹陷,第三子表面1263与第二主表面110B的夹角大于90度。在这种情况下,反应腔室120靠近第一主表面110A的部分的尺寸较大,反应腔室120靠近第二主表面110B的部分的尺寸较大,反应腔室120中间的部分的尺寸较小。由此,该反应腔室一方面有利于液体的进入,另一方面有利于气体的排出,从而可进一步提升液体(例如待测样品)进入反应腔室的速度。另外,由于第二子表面为圆弧面,且向为微孔阵列基板凹陷,该反应腔室的中部便于存储液体。
在一些示例中,如图14B所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为圆形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为圆形;反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为圆形;并且,反应腔室120被第一参考平面201所截的截面的直径和反应腔室120被第二参考平面202所截的截面的直径均大于反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截 的截面的直径。
在一些示例中,如图14C所示,反应腔室120被第一主表面110A所在的第一参考平面201所截的截面的形状为正六边形;反应腔室120被第二主表面110B所在的第二参考平面202所截的截面的形状为正六边形;反应腔室120被平行于第一参考平面201和第二参考平面202,且位于第一参考平面201和第二参考平面202的第三参考平面203所截的截面的形状为正六边形;并且,反应腔室120被第一参考平面201所截的截面的边长和反应腔室120被第二参考平面202所截的截面的边长均大于反应腔室120被第三参考平面203所截的截面的边长。
图15为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图15所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。反应腔室120的内侧表面126上设置有第一亲水膜181和第二亲水膜182,第一亲水膜181和第二亲水膜182在垂直于第一参考平面201的方向上相邻设置,第一亲水膜181远离反应腔室120的内侧表面126的表面为向反应腔室120的中心轴凸起的圆弧面,第二亲水膜182远离反应腔室120的内侧表面126的表面为向反应腔室120的中心轴凸起的圆弧面。由此,一方面,第一亲水膜和第二亲水膜可便于液体(例如待测样品)进入反应腔室,并且利于存储液体;另一方面,第一亲水膜远离反应腔室的内侧表面的表面为向反应腔室的中心轴凸起的圆弧面,使得反应腔室靠近第一主表面的部分的尺寸较大,更有利于液体进入反应腔室;类似地,第二亲水膜远离反应腔室的内侧表面的表面为圆弧形,使得反应腔室靠近第二主表面的部分的尺寸较大,有利于气体排出;同时,第一亲水膜和第二亲水膜之间还能形成向微孔阵列基板凹陷的凹陷部(即第一亲水膜和第二亲水膜相邻的部分),从而更有利于存储液体。
在一些示例中,如图15所示,反应腔室120的内侧表面126为平面,第一亲水膜181在垂直于内侧表面126的方向上的厚度不同,以使得第一亲水膜181远离反应腔室120的内侧表面126的表面为圆弧面,第二亲水膜182在垂直于内侧表面126的方向上的厚度不同,以使得第二亲水膜182远离反应腔室120的内侧表面的表面为圆弧面。
图16为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图 16所示,该微孔阵列芯片100中,反应腔室120在垂直于微孔阵列基板110的方向上(也即垂直于第一参考平面201的方向)贯穿该微孔阵列基板110。也就是说,反应腔室120为贯穿微孔阵列基板110的通孔。反应腔室120的内侧表面126上设置有第一亲水膜181和第二亲水膜182,第一亲水膜181和第二亲水膜182在垂直于第一参考平面201的方向上相邻设置,反应腔室120的内侧表面126在垂直于第一参考平面201的方向上包括第一子表面1261和第二子表面1262,第二子表面1262位于第一子表面1261远离第一主表面110A的一侧,第一子表面1261向反应腔室120的中心轴凸起,以使得第一亲水膜181远离反应腔室120的内侧表面126的表面为圆弧面,第二子表面1262向反应腔室120的中心轴凸起,以使得第二亲水膜182远离反应腔室120的内侧表面126的表面为圆弧面。由此,一方面,第一亲水膜和第二亲水膜可便于液体(例如待测样品)进入反应腔室,并且利于存储液体;另一方面,第一亲水膜远离反应腔室的内侧表面的表面为向反应腔室的中心轴凸起的圆弧面,使得反应腔室靠近第一主表面的部分的尺寸较大,更有利于液体进入反应腔室;类似地,第二亲水膜远离反应腔室的内侧表面的表面为圆弧形,使得反应腔室靠近第二主表面的部分的尺寸较大,有利于气体排出;同时,第一亲水膜和第二亲水膜之间还能形成向微孔阵列基板凹陷的凹陷部(即第一亲水膜和第二亲水膜相邻的部分),从而更有利于存储液体。
图17为本公开一实施例提供的一种微孔阵列芯片的结构示意图。如图17所示,该微孔阵列芯片100还包括第一封装膜191和第二封装膜192;第一封装膜191位于第一主表面110A远离第二主表面110B的一侧;第二封装膜192位于第二主表面110B远离第一主表面110A的一侧;第一封装膜191和第二封装膜192通过静电或者胶体贴附在微孔阵列基板110上。由此,该微孔阵列芯片的使用较为方便,在微孔阵列基板中通入液体(例如待测样品)之后,即可通过静电吸附或者胶体将第一封装膜和第二封装膜贴附在微孔阵列基板上。
在一些示例中,如图17所示,该微孔阵列芯片100还包括第一疏水层161和第二疏水层162;第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置;第二疏水层162,位于第二主表面110B上。此时,第一封装膜191位于第一疏水层161远离第二主表面110B的一侧;第二封装膜192位于第二疏水层162远离第一主表面110A的一侧。由此,第一封装膜和第二 封装膜可更好地将微孔阵列基板封装。另外,第一疏水层具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板所限定的各反应腔室中。
例如,第一疏水层和第二疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第一疏水层和第二疏水层也可以采用其他合适的无机或有机材料制备。
图18为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图18所示,该微孔阵列芯片100还包括光固化油210;光固化油210位于反应腔室120靠近第一主表面110A的开口位置处。由此,该微孔阵列芯片可通过光固化油将反应腔室封装。需要说明的是,可先在反应腔室靠近第一主表面的开口位置处通入光固化油,然后在通过光固化工艺将光固化油固化,从而将反应腔室封装。
在一些示例中,如图18所示,该微孔阵列芯片100还包括第一疏水层161,第一疏水层161设置在第一主表面110A上;第一疏水层161在第一参考平面201上的正投影与反应腔室120在第一参考平面201上的正投影间隔设置。也就是说,第一疏水层161并不延伸至反应腔室120的边缘,从而可在防止样品或试剂残留于反应腔室之外的区域的同时,方便样品或试剂进入反应腔室。
在一些示例中,如图18所示,光固化油210包括凸台结构212,凸台结构212与第一主表面110A接触设置,且位于第一疏水层161靠近反应腔室120的中心轴的一侧。
图19为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图19所示,微孔阵列基板110为柔性基板。此时,微孔阵列基板110可包括第一子柔性微孔阵列基板115A和第二子柔性微孔阵列基板115B,第一子柔性微孔阵列基板115A和第二子柔性微孔阵列基板115B接触设置,并在第一子柔性微孔阵列基板115A和第二柔性微孔阵列基板115B之间形成多个反应腔室120。
图20为本公开一实施例提供的另一种微孔阵列芯片的平面示意图。如图20所示,该微孔阵列基板110包括进液流道128;n个反应腔室120与进液流道128相连通,各反应腔室120与进液流道128之间设置有单向膜129。由此,该微孔阵列芯片可通过进液流道向反应腔室通入液体(例如待测样品),同时还可通过单向膜防止反应腔室中的测试样品返回进液流道,从而可防止不同反应腔室之间的串扰。当然,本公开实施例包括但不限于此,各反应腔室与进液 流道之间也可不设置单向膜。
在一些示例中,如图20所示,进液流道128包括进液主流道1282和n个进液支流道1284,分别与进液主流道1282相连通;n个进液支流道1284和n个反应腔室120一一对应设置。由此,该微孔阵列芯片可通过进液主流道和进液支流道向反应腔室通入液体(例如待测样品)。
在一些示例中,如图20所示,n个进液支流道1284设置在进液主流道1282的两侧,并且位于进液主流道1282的第一侧的多个进液支流道1284与位于进液主流道1282的第二侧的多个进液支流道1284错位设置。
图21为本公开一实施例提供的另一种微孔阵列芯片的平面示意图。如图21所示,该微孔阵列基板110包括进液流道128;进液流道128包括多个平行设置的进液主流道1282和n个进液支流道1284;各进液主流道1282的两侧设置有与该进液主流道1282相连通的多个进液支流道1284;n个进液支流道1284和n个反应腔室120一一对应设置。由此,该微孔阵列芯片可通过进液流道向反应腔室通入液体(例如待测样品)。
图22为本公开一实施例提供的另一种微孔阵列芯片的平面示意图。如图22所示,该微孔阵列基板110包括进液流道128;进液流道128包括多个相互相通的多个子进液流道1285,各子进液流道1285与多个反应腔室120相连通。子进液流道1285的高度大于与其相连的多个反应腔室120的高度。由此,液体可利用重力从子进液流道流入反应腔室之中。需要说明的是,上述的“高度”是指子进液流道或反应腔室的底部与微孔阵列基板的第二主表面的距离。
在一些示例中,多个子进液流道1285的高度不同。由于,多个子进液流道的高度不同,因此该微孔阵列芯片可利用重力使得液体(例如待测样品)从高度较高的子进液流道向高度较低的子进液流道流动,从而进入所有的反应腔室。需要说明的是,上述的“多个子进液流道的高度不同”是指子进液流道的底部与微孔阵列基板的第二主表面的距离不同。
在一些示例中,如图22所示,多个子进液流道1285依次排列设置,多个子进液流道1285的高度沿着多个子进液流道1285的排列方向依次降低。当然,本公开实施例包括但不限于此,多个进液流道1285的高度也可从中间向两侧依次降低。
图23为本公开一实施例提供的另一种微孔阵列芯片的平面示意图。如图23所示,该微孔阵列基板110包括进液流道128;进液流道128在微孔阵列基 板110的第一主表面110A所在第一参考平面201上的正投影的形状为弯折曲线。由此,该微孔阵列芯片可通过进液流道直接向反应腔室通入液体(例如待测样品)。
图24为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图24所示,该微孔阵列芯片100还包括第一基板310和第二基板320;第一基板220位于微孔阵列基板110的一侧,且与微孔阵列基板110的第一主表面110A间隔设置;第二基板320位于微孔阵列基板110远离第一基板310的一侧;第二基板320包括加热电极325,加热电极325在微孔阵列基板110的第一主表面110A所在的第一参考平面201上的正投影与n个反应腔室120中的至少部分在第一参考平面201上的正投影交叠。由此,该微孔阵列芯片可通过加热电极对n个反应腔室中的至少部分反应腔室进行加热,从而将加热功能集成在微孔阵列芯片中。
在一些示例中,如图24所示,加热电极325在微孔阵列基板110的第一主表面110A所在的第一参考平面201上的正投影与n个反应腔室120在第一参考平面201上的正投影交叠。由此,该微孔阵列芯片可通过加热电极对n个反应腔室同时进行加热。
在一些示例中,如图24所示,第一基板310包括第一衬底基板311和第三疏水层312;第三疏水层312位于第一衬底基板311靠近第二基板320的一侧。由此,第三疏水层312具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板110所限定的各反应腔室120中。
例如,第三疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第三疏水层也可以采用其他合适的无机或有机材料制备,只要保证第三疏水层面向第二基板的一侧具有疏水性即可。
在一些示例中,如图24所示,第一基板310与第二基板310可通过密封胶330形成容置空间340;微孔阵列基板110设置在容置空间340之中;第一基板310还包括至少一个进样口315,进样口315贯穿第一衬底基板311和第三疏水层312,并与容置空间340连通。由此,该微孔阵列芯片可通过进样口向微孔阵列基板通入液体。
在一些示例中,如图24所示,第一基板310还包括至少一个出样口317,出样口317贯穿第一衬底基板311和第三疏水层312,并与容置空间340连通。由此,该微孔阵列芯片可通过出样口排出液体。
在一些示例中,如图24所示,第二基板320还包括第二衬底基板321、控制电极322、第一绝缘层323和第二绝缘层324;控制电极322位于第二衬底基板321上;第一绝缘层323位于控制电极322远离第二衬底基板321的一侧;第一绝缘层323包括连接孔323H,连接孔323H暴露控制电极322的至少一部分;加热电极325位于第一绝缘层323远离第二衬底基板321的一侧,并通过连接孔323H与控制电极322相连;第二绝缘层324位于加热电极325远离第一绝缘层323的一侧,微孔阵列基板100位于第二绝缘层324上。由此,该微孔阵列芯片可通过控制电极向加热电极施加电压,以驱动加热电极发热。另一方面,第二绝缘层位于加热电极远离第一绝缘层的一侧,因此第二绝缘层可用于保护加热电极,防止水氧的侵蚀,从而提高加热电极的使用寿命。并且,第二绝缘层还可起到绝缘和平坦化的作用。
例如,第一绝缘层323和第二绝缘层324的材料可采用相同的材料制作,也可采用不同的材料制作。第一绝缘层323和第二绝缘层324的材料可采用氧化硅、氮化硅、氮氧化硅等无机绝缘材料,也可采用树脂、聚酰亚胺等有机绝缘材料。
在一些示例中,如图24所示,该微孔阵列芯片100还包括光敏传感器380;光敏传感器380位于第二基板320远离第一基板310的一侧,并被配置为检测微孔阵列基板110中的反应腔室120发出的光。由此,该微孔阵列芯片可通过光敏传感器判断反应腔室中的反应是否发生以及反应发生的程度;并且,该微孔阵列芯片将光敏传感器集成在芯片之中,从而进一步提高了集成度。
图25为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图25所示,该微孔阵列芯片100还包括第一基板310和第二基板320;第一基板220位于微孔阵列基板110的一侧,且与微孔阵列基板110的第一主表面110A间隔设置。该微孔阵列芯片100包括多个微孔阵列基板110,沿平行于第一基板310或第二基板320的方向上排列。由此,该微孔阵列芯片可通过设置多个微孔阵列芯片来实现高通量检测。需要说明的是,本公开实施例对于多个微孔阵列芯片的平面布局结构不作具体限制。例如,多个微孔阵列基板可形成矩阵,或者多个微孔阵列基板围绕一个微孔阵列基板设置。
在一些示例中,如图25所示,当微孔阵列芯片包括多个微孔阵列基板110时,第二基板320可包括加热电极325,加热电极325在微孔阵列基板110的第一主表面110A所在的第一参考平面201上的正投影与至少一个为孔阵列基 板110中的n个反应腔室120中的至少部分在第一参考平面201上的正投影交叠。由此,该微孔阵列芯片可通过加热电极对至少一个为孔阵列基板中的n个反应腔室中的至少部分反应腔室进行加热,从而将加热功能集成在微孔阵列芯片中。需要说明的是,该微孔阵列芯片也可设置多个加热电极,多个加热电极与多个微孔阵列基板一一对应设置。
在一些示例中,如图25所示,第一基板310包括第一衬底基板311和第三疏水层312;第三疏水层312位于第一衬底基板311靠近第二基板320的一侧。由此,第三疏水层312具有疏水亲油的特性,从而可使液体(例如待测样品)更容易进入微孔阵列基板110所限定的各反应腔室120中。
例如,第三疏水层的材料可为树脂或硅氮化物,例如,环氧树脂。第三疏水层也可以采用其他合适的无机或有机材料制备,只要保证第三疏水层面向第二基板的一侧具有疏水性即可。
在一些示例中,如图25所示,第一基板310与第二基板310可通过密封胶330形成容置空间340;微孔阵列基板110设置在容置空间340之中;第一基板310还包括至少一个进样口315,进样口315贯穿第一衬底基板311和第三疏水层312,并与容置空间340连通。由此,该微孔阵列芯片可通过进样口向多个微孔阵列基板通入液体。
在一些示例中,如图25所示,第一基板310还包括至少一个出样口317,出样口317贯穿第一衬底基板311和第三疏水层312,并与容置空间340连通。由此,该微孔阵列芯片可通过出样口排出液体。
在一些示例中,如图25所示,第二基板320还包括第二衬底基板321、控制电极322、第一绝缘层323和第二绝缘层324;控制电极322位于第二衬底基板321上;第一绝缘层323位于控制电极322远离第二衬底基板321的一侧;第一绝缘层323包括连接孔323H,连接孔323H暴露控制电极322的至少一部分;加热电极325位于第一绝缘层323远离第二衬底基板321的一侧,并通过连接孔323H与控制电极322相连;第二绝缘层324位于加热电极325远离第一绝缘层323的一侧,微孔阵列基板100位于第二绝缘层324上。由此,该微孔阵列芯片可通过控制电极向加热电极施加电压,以驱动加热电极发热。另一方面,第二绝缘层位于加热电极远离第一绝缘层的一侧,因此第二绝缘层可用于保护加热电极,防止水氧的侵蚀,从而提高加热电极的使用寿命。并且,第二绝缘层还可起到绝缘和平坦化的作用。
例如,第一绝缘层323和第二绝缘层324的材料可采用相同的材料制作,也可采用不同的材料制作。第一绝缘层323和第二绝缘层324的材料可采用氧化硅、氮化硅、氮氧化硅等无机绝缘材料,也可采用树脂、聚酰亚胺等有机绝缘材料。
在一些示例中,如图25所示,该微孔阵列芯片100还包括光敏传感器380;光敏传感器380位于第二基板320远离第一基板310的一侧,并被配置为检测微孔阵列基板110中的反应腔室120发出的光。由此,该微孔阵列芯片可通过光敏传感器判断反应腔室中的反应是否发生以及反应发生的程度;并且,该微孔阵列芯片将光敏传感器集成在芯片之中,从而进一步提高了集成度。
值得注意的是,图25示出的微孔阵列芯片通过将多个微孔阵列基板在平行于第一基板或第二基板的方向上进行排列,从而实现高通量检测。但本公开实施例包括但不限于此,该微孔阵列芯片也可通过将多个微孔阵列基板在垂直于第一基板或第二基板的方向上进行排列来实现高通量检测。
图26为本公开一实施例提供的另一种微孔阵列芯片的剖面示意图。如图26所示,该微孔阵列芯片100包括微孔阵列基板110;微孔阵列基板110包括相对设置的第一主表面110A和第二主表面110B、n个反应腔室120和闲置区域130;n个反应腔室120阵列设置在微孔阵列基板110之中,各反应腔室120被配置为容纳待测样品。该微孔阵列芯片100还包括电致亲水性改变层190,设置在反应腔室120的内侧表面126上;电致亲水性改变层190通过导电结构(例如导线)与外部电路相连,从而可通过通电改变亲水性(例如,降低亲水性或者从亲水性变为疏水性),从而可自动将反应腔室120中的液体排出。
在一些示例中,该微孔阵列芯片中的微孔阵列基板可采用抗生物材料制作,从而可实现重复利用。
在一些示例中,该微孔阵列芯片中的微孔阵列基板可采用绕开荧光激发波段的材料制作,从而防止对荧光检测造成干扰,提高检测精度。
需要说明的是,上述的图1-图26所示的微孔阵列芯片中的n个反应腔室120的总体积V均可满足下列公式,以可高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
Figure PCTCN2022087880-appb-000012
其中,(1-α)为置信度水平,S chip为微孔阵列基板110的面积,h为反应腔室120在垂直于第一参考平面201的方向上的深度,N为大于等于3的正整数,X为相邻反应腔室120之间的间隔的尺寸的1/2。需要说明的是,当N的取值为无限大时,上述的正N边形可为圆形。
本公开至少一个实施例还提供一种检测装置。图27为本公开一实施例提供的一种检测装置的示意图。如图27所示,该检测装置500包括上述任一示例提供的微孔阵列芯片100。由于上述的微孔阵列芯片可高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。由此,包括该微孔阵列芯片的检测装置同样具有较高的灵敏度和较低的检出限。
图28为本公开一实施例提供的另一种检测装置的示意图。如图28所示,该检测装置500还包括第一外壳510和第二外壳520;第一外壳510位于微孔阵列芯片100的一侧,且与第一主表面110A间隔设置;第二外壳520位于微孔阵列芯片100远离第一外壳510的一侧,且与第二主表面110B间隔设置。第二主表面110B与第二外壳520之间的距离大于等于微孔阵列芯片100的厚度。由此,该检测装置可有利于液体进入微孔阵列芯片。
图29为本公开一实施例提供的一种检测装置中第二外壳的平面示意图。如图28所示,第二外壳520包括支撑结构525,支撑结构525包括第一平台部525A和第二平台部525B,第二平台部525B的高度大于第一平台部525A的高度,第一平台部525A被配置为与微孔阵列芯片100的底面接触,第二平台部525B配置为与微孔阵列芯片100的侧面接触。由此,该检测装置可通过第一平台部来支撑微孔阵列芯片,并通过第二平台部对微孔阵列芯片进行定位,从而提高检测精度。
在一些示例中,如图29所示,第一平台部525A在第一主表面110A所在的第一参考平面201上的正投影的形状包括弧线三角形,第二平台部525B在第一主表面110A所在的第一参考平面201(第一参考平面可参见图27)上的正投影的形状包括半圆形,弧线三角形与半圆形相连的底边为直线,弧线三角形的另外两条边为弧线。
在一些示例中,如图29所示,第二外壳520还包括定位圆台528,被配置为与微孔阵列芯片100的侧面接触设置,从而进一步对微孔阵列芯片进行定位,以提高检测精度。
本公开至少一个实施例还提供一种微孔阵列芯片的使用方法。该微孔阵列芯片包括微孔阵列基板;该使用方法包括以下步骤S101-S103。
步骤S101:在微孔阵列基板之中通入待测样品;以及
步骤S102:将待测样品封装在微孔阵列基板之中,微孔阵列基板包括相对设置的第一主表面和第二主表面;微孔阵列基板包括n个反应腔室和闲置区域,n个反应腔室阵列设置在微孔阵列基板之中,并被配置为容纳待测样品;反应腔室在第一主表面所在的第一参考平面上的正投影的形状为正N边形,闲置区域围绕n个反应腔室设置;闲置区域的面积被划分为n’个虚拟单元,虚拟单元在第一参考平面上的正投影的形状与反应腔室在第一参考平面上的正投影的形状相同,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000013
其中,(1-α)为置信度水平,S chip为微孔阵列基板的面积,h为反应腔室在垂直于第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻反应腔室之间的间隔在相邻反应腔室的中心连线上的尺寸的1/2。
在本公开实施例提供的微孔阵列芯片的使用方法中,由于n个反应腔室的总体积V满足上述的公式,该使用方法可高效地利用微孔阵列基板的面积,从而在反应腔室的数量足够多的情况下增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000014
由此,该微孔阵列芯片可高效地利用微孔阵列基板的面积,可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,该微孔阵列芯片还包括支撑区域,支撑区域被配置为设置支撑结构。此时,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000015
其中,S support为支撑区域的面积。
在该示例提供的微孔阵列芯片的使用方法中,支撑区域可用于与支撑结构(例如底座的支撑结构)接触设置,从而使得微孔阵列基板与底座之间具有一定的空隙,方便待测样品的进入,从而使得微孔阵列基板可进行油封。
在一些示例中,反应腔室在第一主表面所在的第一参考平面上的正投影的形状和虚拟单元在第一参考平面上的正投影的形状均为正六边形,n个反应腔室的总体积V满足下列公式:
Figure PCTCN2022087880-appb-000016
其中,X的取值范围为10-20微米,h的取值范围为190-320微米。
在该示例提供的微孔阵列芯片中,各反应腔室在第一参考平面上的正投影的形状为正六边形,并且由于n个反应腔室的总体积V满足上述的公式,该微孔阵列芯片可高效地利用微孔阵列基板的面积,从而增加单个反应腔室的体积,进而可提高该微孔阵列芯片的灵敏度,并降低该微孔阵列芯片的检出限。
在一些示例中,相邻反应腔室之间的间隔在相邻反应腔室的中心连线上的尺寸的范围可为20-40微米,例如,24微米、26微米、28微米、30微米、32微米、34微米或36微米。
在一些示例中,反应腔室在垂直于第一参考平面的方向上的深度可为200微米、220微米、240微米、260微米、280微米或300微米。
在一些示例中,一个微孔阵列基板上的反应腔室的数量可为8000-100000个。由此,该微孔阵列芯片具有更高的检测精度。
在一些示例中,一个微孔阵列基板上的反应腔室的数量可为8000个、10000个、20000个、40000个、60000个、80000个或100000个。
在一些示例中,将待测样品封装在微孔阵列基板之中包括:在微孔阵列基板之中通入待测样品之后,通过静电或者胶体将第一封装膜贴附在第一主表面远离第二主表面的一侧,将第二封装膜贴附在所述第二主表面远离第一主表面的一侧。由此,该微孔阵列芯片可简单地对微孔阵列基板进行封装,效率较高。
在一些示例中,将待测样品封装在微孔阵列基板之中包括:在微孔阵列基 板之中通入待测样品之后,在反应腔室靠近第一主表面的开口位置处涂覆光固化油;以及采用紫外光将光固化油固化。由此,该微孔阵列芯片可利用光固化油和光固化工艺对微孔阵列基板进行封装,具有简单、高效、且封装效果好等优势。
在一些示例中,当微孔阵列基板采用如图19所示的柔性基板时,微孔阵列基板可包括第一子柔性微孔阵列基板和第二子柔性微孔阵列基板,且第一子柔性微孔阵列基板和第二子柔性微孔阵列基板之间包括多个样品流道。在微孔阵列基板之中通入待测样品包括:在多个样品流道通入待测样品。
例如,可采用真空吸附、泵送等方式将待测样品通入多个样品流道之中。
在一些示例中,将待测样品封装在微孔阵列基板之中包括:采用辊轮将各样品流道进行分隔以形成多个反应腔室,并将多个反应腔室密封。例如,辊轮具有加热功能,每隔一定距离将第一子柔性微孔阵列基板和第二柔性微孔阵列基板通过加热结合在一起,从而可将各样品流道进行分隔以形成多个反应腔室。
有以下几点需要说明:
(1)本公开实施例附图中,只涉及到与本公开实施例涉及到的结构,其他结构可参考通常设计。
(2)在不冲突的情况下,本公开同一实施例及不同实施例中的特征可以相互组合。
以上,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以权利要求的保护范围为准。

Claims (55)

  1. 一种微孔阵列芯片,包括:
    微孔阵列基板,包括相对设置的第一主表面和第二主表面;
    n个反应腔室,阵列设置在所述微孔阵列基板之中,并被配置为容纳待测样品,所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状为正N边形;以及
    闲置区域,围绕n个所述反应腔室设置;
    其中,所述闲置区域的面积被划分为n’个虚拟单元,所述虚拟单元在所述第一参考平面上的正投影的形状与反应腔室的在第一参考平面上的正投影的形状相同,n个所述反应腔室的总体积V满足下列公式:
    Figure PCTCN2022087880-appb-100001
    其中,(1-α)为置信度水平,S chip为所述微孔阵列基板的面积,h为所述反应腔室在垂直于所述第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻的所述反应腔室之间的间隔在相邻的所述反应腔室的中心连线的尺寸的1/2。
  2. 根据权利要求1所述的微孔阵列芯片,还包括:
    支撑区域,被配置为设置支撑结构,
    其中,n个所述反应腔室的总体积V满足下列公式:
    Figure PCTCN2022087880-appb-100002
    其中,S support为所述支撑区域的面积。
  3. 根据权利要求2所述的微孔阵列芯片,还包括:
    反应区域,设置在所述支撑区域的周边,
    其中,所述n个所述反应腔室位于所述反应区域。
  4. 根据权利要求3所述的微孔阵列芯片,其中,在所述反应区域,相邻两个所述反应腔室在所述第一参考平面上的正投影的中心距离相等。
  5. 根据权利要求1-4中任一项所述的微孔阵列芯片,其中,所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状为正六边形,n个 所述反应腔室的总体积V满足下列公式:
    Figure PCTCN2022087880-appb-100003
    其中,X的取值范围为10-20微米,h的取值范围为190-320微米。
  6. 根据权利要求1-4中任一项所述的微孔阵列芯片,其中,n的取值范围为8000-100000。
  7. 根据权利要求1-4中任一项所述的微孔阵列芯片,其中,n个所述反应腔室的总体积V满足下列公式:
    Figure PCTCN2022087880-appb-100004
  8. 根据权利要求1-7中任一项所述的微孔阵列芯片,还包括:
    第一疏水层,位于所述第一主表面上,
    其中,所述第一疏水层在所述第一参考平面上的正投影与所述反应腔室在所述第一参考平面上的正投影间隔设置。
  9. 根据权利要求8所述的微孔阵列芯片,其中,所述第一疏水层在所述第一参考平面上的正投影包括第一开口,所述第一开口的边缘与所述反应腔室在所述第一参考平面上的边缘间隔设置。
  10. 根据权利要求8所述的微孔阵列芯片,还包括:
    第二疏水层,位于所述第二主表面上,
    其中,所述第二疏水层延伸至所述反应腔室的边缘。
  11. 根据权利要求10所述的微孔阵列芯片,其中,所述第二疏水层在所述第二主表面所在的第二参考平面上的正投影包括第二开口,所述第二开口的边缘与所述反应腔室在所述第二参考平面上的边缘重合。
  12. 根据权利要求8所述的微孔阵列芯片,还包括:
    第二疏水层,位于所述第二主表面上,
    其中,所述反应腔室在垂直于所述第一参考平面的方向上贯穿所述微孔阵列基板,所述第二疏水层横跨所述反应腔室,所述反应腔室在所述第二主表面所在的第二参考平面上的正投影落入所述第二疏水层在所述第二参考平面上的正投影之内。
  13. 根据权利要求1-7中任一项所述的微孔阵列芯片,其中,所述反应腔室从所述第一主表面凹入所述微孔阵列基板并具有位于所述微孔阵列基板之中的腔体底部,所述腔体底部与所述第一参考平面之间的距离小于所述微孔阵列基板的厚度。
  14. 根据权利要求8所述的微孔阵列芯片,其中,所述反应腔室从所述第一主表面凹入所述微孔阵列基板并具有位于所述微孔阵列基板之中的腔体底部,所述腔体底部与所述第一参考平面之间的距离小于所述微孔阵列基板的厚度。
  15. 根据权利要求14所述的微孔阵列芯片,其中,所述第一疏水层与所述待测样品的接触角小于所述反应腔室的临界角,所述临界角为所述反应腔室的侧壁的延长线与所述待测样品与所述反应腔室的侧壁接触的表面的切线之间的角度。
  16. 根据权利要求14所述的微孔阵列芯片,其中,所述腔体底部包括至少一个排气孔,各所述排气孔在垂直于所述第一参考平面的方向上贯穿所述腔体底部。
  17. 根据权利要求16所述的微孔阵列芯片,其中,所述腔体底部包括一个所述排气孔,所述排气孔在所述第二主表面所在的第二参考平面上的正投影位于所述腔体底部在所述第二参考平面上的正投影的中心。
  18. 根据权利要求16所述的微孔阵列芯片,其中,所述腔体底部包括多个所述排气孔,所述排气孔在所述第二主表面所在的第二参考平面上的正投影围绕所述腔体底部在所述第二参考平面上的正投影的中心设置。
  19. 根据权利要求8所述的微孔阵列芯片,还包括:
    透析膜;以及
    第二疏水层,
    其中,所述反应腔室在垂直于所述第一参考平面的方向上贯穿所述微孔阵列基板,所述第二疏水层延伸至所述反应腔室的边缘,所述透析膜横跨所述反应腔室。
  20. 根据权利要求19所述的微孔阵列芯片,其中,所述反应腔室在所述第二主表面所在的第二参考平面上的正投影落入所述透析膜在所述第二参考平面上的正投影之内。
  21. 根据权利要求19所述的微孔阵列芯片,其中,所述透析膜为柔性透 析膜。
  22. 根据权利要求19所述的微孔阵列芯片,其中,所述透析膜位于所述第二疏水层靠近所述第二主表面的一侧。
  23. 根据权利要求19所述的微孔阵列芯片,其中,所述透析膜位于所述第二疏水层远离所述第二主表面的一侧。
  24. 根据权利要求1-23中任一项所述的微孔阵列芯片,其中,所述反应腔室的内侧表面与所述第一主表面的夹角大于90度。
  25. 根据权利要求1-24中任一项所述的微孔阵列芯片,其中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面和第二子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,
    所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面与所述第二主表面的夹角大于90度。
  26. 根据权利要求1-25中任一项所述微孔阵列芯片,其中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面、第二子表面和第三子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第三子表面位于所述第二子表面远离所述第一子表面的一侧,
    所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面所在的平面与所述第一参考平面垂直,所述第三子表面与所述第二主表面的夹角大于90度。
  27. 根据权利要求1-26中任一项所述微孔阵列芯片,其中,
    所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面、第二子表面和第三子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,所述第三子表面位于所述第二子表面远离所述第一子表面的一侧,
    所述第一子表面与所述第一主表面的夹角大于90度,所述第二子表面为圆弧面,且向所述为微孔阵列基板凹陷,所述第三子表面与所述第二主表面的夹角大于90度。
  28. 根据权利要求1-27中任一项所述的微孔阵列芯片,其中,所述反应腔室的内侧表面上设置有第一亲水膜和第二亲水膜,所述第一亲水膜和所述第二亲水膜在垂直于所述第一参考平面的方向上相邻设置,所述第一亲水膜远离所述反应腔室的内侧表面的表面为向所述反应腔室的中心轴凸起的圆弧面,所 述第二亲水膜远离所述反应腔室的内侧表面的表面为向所述反应腔室的中心轴凸起的圆弧面。
  29. 根据权利要求28所述的微孔阵列芯片,其中,所述反应腔室的所述内侧表面为平面,所述第一亲水膜在垂直于所述内侧表面的方向上的厚度不同,以使得所述第一亲水膜远离所述反应腔室的内侧表面的表面为圆弧面,所述第二亲水膜在垂直于所述内侧表面的方向上的厚度不同,以使得所述第二亲水膜远离所述反应腔室的内侧表面的表面为圆弧面。
  30. 根据权利要求28所述的微孔阵列芯片,其中,所述反应腔室的内侧表面在垂直于所述第一参考平面的方向上包括第一子表面和第二子表面,所述第二子表面位于所述第一子表面远离所述第一主表面的一侧,
    所述第一子表面向所述反应腔室的中心轴凸起,以使得所述第一亲水膜远离所述反应腔室的内侧表面的表面为圆弧面,所述第二子表面向所述反应腔室的中心轴凸起,以使得所述第二亲水膜远离所述反应腔室的内侧表面的表面为圆弧面。
  31. 根据权利要求1-30中任一项所述的微孔阵列芯片,其中,所述反应腔室在所述第一参考平面上的正投影的形状虚拟为圆形、正六边形、正八边形中的一种。
  32. 根据权利要求1-30中任一项所述的微孔阵列芯片,其中,所述反应腔室在所述第一参考平面上的正投影的形状虚拟为三角形。
  33. 根据权利要求1-30中任一项所述的微孔阵列芯片,还包括:
    第一封装膜,位于所述第一主表面远离所述第二主表面的一侧;
    第二封装膜,位于所述第二主表面远离所述第一主表面的一侧,
    其中,所述第一封装膜和所述第二封装膜通过静电或者胶体贴附在所述微孔阵列基板上。
  34. 根据权利要求8所述的微孔阵列芯片,还包括:
    光固化油,位于所述反应腔室靠近所述第一主表面的开口位置处,
    其中,所述光固化油包括凸台结构,所述凸台结构与第一主表面接触设置,且位于所述第一疏水层靠近所述反应腔室的中心轴的一侧。
  35. 根据权利要求1-34中任一项所述的微孔阵列芯片,其中,所述微孔阵列基板为柔性基板。
  36. 根据权利要求1-35中任一项所述的微孔阵列芯片,其中,所述微孔 阵列基板还包括:
    进液流道,
    n个所述反应腔室与所述进液流道相连通,各所述反应腔室与所述进液流道之间设置有单向膜。
  37. 根据权利要求36所述的微孔阵列芯片,其中,所述进液流道包括:
    进液主流道;
    n个进液支流道,分别与所述进液主流道相连通,
    其中,所述n个进液支流道和所述n个所述反应腔室一一对应设置。
  38. 根据权利要求1-4中任一项所述的微孔阵列芯片,其中,所述微孔阵列基板还包括:
    进液流道,包括多个相互相通的多个子进液流道,
    其中,各子进液流道与多个所述反应腔室相连通,并且所述子进液流道的高度大于对应的多个所述反应腔室的高度。
  39. 根据权利要求38所述的微孔阵列芯片,其中,所述多个子进液流道的高度依次降低。
  40. 根据权利要求38所述的微孔阵列芯片,其中,所述多个进液流道的高度从中间向两侧依次降低。
  41. 根据权利要求1-40中任一项所述的微孔阵列芯片,还包括:
    第一基板,位于所述微孔阵列基板的一侧,且与所述第一主表面间隔设置;以及
    第二基板,位于所述微孔阵列基板远离所述第一基板的一侧,
    其中,所述第二基板包括加热电极,所述加热电极在所述第一参考平面上的正投影与n个所述反应腔室中的至少部分在所述第一参考平面上的正投影交叠。
  42. 根据权利要求41所述的微孔阵列芯片,其中,所述第一基板包括:
    第一衬底基板;
    第三疏水层,位于所述第一衬底基板靠近所述第二基板的一侧。
  43. 根据权利要求41所述的微孔阵列芯片,其中,所述第二基板还包括:
    第二衬底基板;
    控制电极,位于所述第二衬底基板上;
    第一绝缘层,位于所述控制电极远离所述第二衬底基板的一侧;以及
    第二绝缘层,
    其中,所述第一绝缘层包括连接孔,所述连接孔暴露所述控制电极的至少一部分,所述加热电极位于所述第一绝缘层远离所述第二衬底基板的一侧,并通过所述连接孔与所述控制电极相连,所述第二绝缘层位于所述加热电极远离所述第一绝缘层的一侧,所述微孔阵列基板位于所述第二绝缘层上。
  44. 根据权利要求41所述的微孔阵列芯片,还包括:
    光敏传感器,位于所述第二基板远离所述第一基板的一侧,
    其中,所述光敏传感器被配置为检测所述微孔阵列基板中所述反应腔室发出的光。
  45. 一种检测装置,包括根据权利要求1-44中任一项所述的微孔阵列芯片。
  46. 根据权利要求45所述的检测装置,还包括:
    第一外壳,位于所述微孔阵列芯片的一侧,且与所述微孔阵列芯片间隔设置;以及
    第二外壳,位于所述微孔阵列芯片远离所述第一外壳的一侧,且与所述微孔阵列芯片间隔设置,
    其中,所述微孔阵列芯片与所述第二外壳之间的距离大于等于所述微孔阵列芯片的厚度。
  47. 根据权利要求46所述的检测装置,其中,所述第二外壳包括支撑结构,所述支撑结构包括第一平台部和第二平台部,所述第二平台部的高度大于所述第一平台部的高度,所述第一平台部被配置为与所述微孔阵列芯片的底面接触,所述第二平台部配置为与所述微孔阵列芯片的侧面接触。
  48. 根据权利要求47所述的检测装置,其中,所述第一平台部在所述第一主表面上的正投影的形状包括弧线三角形,所述第二平台部在所述第一主表面上的正投影的形状包括半圆形,所述弧线三角形与所述半圆形相连的底边为直线,所述弧线三角形的另外两条边为弧线。
  49. 根据权利要求47所述的检测装置,其中,所述第二外壳还包括定位圆台,被配置为与所述微孔阵列芯片的侧面接触设置。
  50. 一种微孔阵列芯片的使用方法,其中,所述微孔阵列芯片包括微孔阵列基板,所述使用方法包括:
    在所述微孔阵列基板之中通入待测样品;
    将所述待测样品封装在所述微孔阵列基板之中,
    其中,所述微孔阵列基板包括n个反应腔室和闲置区域,所述n个反应腔室阵列设置在所述微孔阵列基板之中,并被配置为容纳待测样品;所述反应腔室在所述第一主表面所在的第一参考平面上的正投影的形状为正N边形,所述虚拟闲置区域围绕n个所述反应腔室设置;所述虚拟闲置区域的面积被划分为n’个虚拟单元,所述虚拟单元在所述第一参考平面上的正投影的形状与所述反应腔室在所述第一参考平面上的正投影的形状相同,n个所述反应腔室的总体积V满足下列公式:
    Figure PCTCN2022087880-appb-100005
    其中,(1-α)为置信度水平,S chip为所述微孔阵列基板的面积,h为所述反应腔室在垂直于所述第一参考平面的方向上的深度,N为大于等于3的正整数,X为相邻的所述反应腔室之间的间隔在相邻的所述反应腔室的中心连线的尺寸的1/2。
  51. 根据权利要求50所述微孔阵列芯片的使用方法,其中,将所述待测样品封装在所述微孔阵列基板之中包括:
    在所述微孔阵列基板之中通入待测样品之后,通过静电或者胶体将第一封装膜贴附在所述第一主表面远离所述第二主表面的一侧,将第二封装膜贴附在所述第二主表面远离所述第一主表面的一侧。
  52. 根据权利要求50所述的微孔阵列芯片的使用方法,其中,将所述待测样品封装在所述微孔阵列基板之中包括:
    在所述微孔阵列基板之中通入待测样品之后,在所述反应腔室靠近所述第一主表面的开口位置处涂覆光固化油;以及
    采用紫外光将所述光固化油固化。
  53. 根据权利要求50-52中任一项所述的微孔阵列芯片的使用方法,其中,所述微孔阵列基板包括第一子柔性微孔阵列基板和第二子柔性微孔阵列基板,所述第一子柔性微孔阵列基板和所述第二子柔性微孔阵列基板之间包括多个样品流道,在所述微孔阵列基板之中通入待测样品包括:
    在所述多个样品流道通入待测样品。
  54. 根据权利要求53所述的微孔阵列芯片的使用方法,还包括:
    采用抽真空方式将在所述多个样品流道通入待测样品。
  55. 根据权利要求53所述的微孔阵列芯片的使用方法,其中,将所述待测样品封装在所述微孔阵列基板之中包括:采用辊轮将各所述样品流道进行分隔以形成多个反应腔室,并将多个反应腔室密封。
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CN102665916A (zh) * 2009-11-23 2012-09-12 3M创新有限公司 微孔阵列制品及使用方法
WO2016140327A1 (ja) * 2015-03-04 2016-09-09 国立研究開発法人産業技術総合研究所 マイクロチャンバーアレイプレート
US20160296928A1 (en) * 2013-08-21 2016-10-13 The University Of Tokyo High-density microchamber array and manufacturing method thereof
CN111229348A (zh) * 2020-03-19 2020-06-05 京东方科技集团股份有限公司 一种检测芯片、其修饰方法及反应系统
WO2021169650A1 (zh) * 2020-02-26 2021-09-02 京东方科技集团股份有限公司 检测芯片及其制备方法、反应系统

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060182655A1 (en) * 2003-03-04 2006-08-17 Fanglin Zou Integrating analysis chip with minimized reactors and its application
CN102665916A (zh) * 2009-11-23 2012-09-12 3M创新有限公司 微孔阵列制品及使用方法
US20160296928A1 (en) * 2013-08-21 2016-10-13 The University Of Tokyo High-density microchamber array and manufacturing method thereof
WO2016140327A1 (ja) * 2015-03-04 2016-09-09 国立研究開発法人産業技術総合研究所 マイクロチャンバーアレイプレート
WO2021169650A1 (zh) * 2020-02-26 2021-09-02 京东方科技集团股份有限公司 检测芯片及其制备方法、反应系统
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