WO2023195598A1 - Appareil pour supprimer une distorsion de courant et un courant de circulation d'un onduleur triphasé à deux niveaux en parallèle et procédé de fonctionnement de l'appareil - Google Patents

Appareil pour supprimer une distorsion de courant et un courant de circulation d'un onduleur triphasé à deux niveaux en parallèle et procédé de fonctionnement de l'appareil Download PDF

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Publication number
WO2023195598A1
WO2023195598A1 PCT/KR2022/020039 KR2022020039W WO2023195598A1 WO 2023195598 A1 WO2023195598 A1 WO 2023195598A1 KR 2022020039 W KR2022020039 W KR 2022020039W WO 2023195598 A1 WO2023195598 A1 WO 2023195598A1
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inverter
phase
current
control device
obtaining
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PCT/KR2022/020039
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English (en)
Korean (ko)
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박용순
최승보
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광주과학기술원
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/123—Suppression of common mode voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Definitions

  • the present disclosure relates to a device for suppressing current distortion and circulating current of a three-phase, two-level inverter connected in parallel. More specifically, it relates to a device that controls a second inverter by receiving a minimum control signal from the first inverter.
  • a current controller is implemented by sensing the output current of all inverters, the data required to communicate between master and slave increases because the output current of all inverters must be known. Therefore, a correction method is needed that can prevent distortion of output current between circulating current and inverter, increase energy conversion efficiency delivered to the system, and reduce communication burden.
  • the control method of the second inverter for suppressing the circulating current of the second inverter connected in parallel with the first inverter includes the three-phase command voltage of the first inverter generated by the control device of the first inverter. receiving, obtaining a three-phase compensation voltage based on the three-phase zero phase current of the second inverter, and obtaining a three-phase command voltage of the second inverter based on the three-phase command voltage and the three-phase compensation voltage of the first inverter. It includes the step of obtaining, and the step of operating the second inverter based on the three-phase command voltage of the second inverter.
  • the step of acquiring the three-phase compensation voltage of the control method includes obtaining a three-phase target current signal, measuring the three-phase current of the second inverter, and measuring the three-phase current of the second inverter. Obtaining a three-phase zero-phase current of the second inverter based on the three-phase zero-phase current of the second inverter, obtaining a three-phase estimated current of the first inverter based on the three-phase zero-phase current of the second inverter and the three-phase target current signal, Obtaining a three-phase error current for the second inverter based on the phase estimate current and the three-phase current of the second inverter, and obtaining a three-phase compensation voltage based on the three-phase error current for the second inverter. Includes.
  • the step of acquiring the 3-phase estimated current of the first inverter in the control method according to an embodiment of the present disclosure is to subtract the 3-phase zero phase current of the second inverter from the 3-phase target current signal to obtain the 3-phase estimated current of the first inverter. Includes acquisition steps.
  • the step of acquiring the 3-phase error current for the second inverter in the control method according to an embodiment of the present disclosure is to subtract the 3-phase estimated current of the first inverter from the 3-phase current of the second inverter to obtain 3-phase error current for the second inverter. and obtaining phase error current.
  • the step of acquiring the three-phase compensation voltage of the control method according to an embodiment of the present disclosure is performed according to the equation below,
  • the step of acquiring the three-phase command voltage of the second inverter in the control method includes obtaining the three-phase command voltage of the second inverter by adding the three-phase command voltage of the first inverter to the three-phase compensation voltage. Includes steps.
  • the step of acquiring the three-phase zero phase current of the second inverter in the control method includes the measured current of phase A of the second inverter, the measured current of phase B of the second inverter, and the measured current of phase B of the second inverter. It includes obtaining the average of the currents of phase C as the three-phase zero phase current of the second inverter.
  • the step of acquiring the three-phase estimated current of the first inverter in the control method includes measuring the three-phase zero phase current using a sensor included in the second inverter.
  • the step of acquiring the three-phase estimated current of the first inverter in the control method includes the step of obtaining a predetermined three-phase zero phase current, and the magnitude of the three-phase zero phase current is greater than or equal to zero. .
  • a control device for the second inverter for suppressing the circulating current of the second inverter connected in parallel with the first inverter includes a processor and a memory, and the processor receives the three-phase command voltage of the first inverter generated by the control device of the first inverter based on instructions stored in the memory, and Obtain a three-phase compensation voltage based on the three-phase zero-phase current, obtain a three-phase command voltage of the second inverter based on the three-phase command voltage and three-phase compensation voltage of the first inverter, and obtain a three-phase command of the second inverter.
  • the second inverter is operated based on the voltage.
  • the control device of the second inverter includes a processor acquiring a three-phase target current signal based on an instruction stored in a memory, measuring the three-phase current of the second inverter, and controlling the three-phase current of the second inverter. Obtain the three-phase zero phase current of the second inverter based on the phase current, obtain the three-phase estimated current of the first inverter based on the three-phase zero phase current of the second inverter and the three-phase target current signal, and obtain the three-phase estimated current of the first inverter.
  • a three-phase error current for the second inverter is obtained based on the three-phase estimated current and the three-phase current of the second inverter, and a three-phase compensation voltage is obtained based on the three-phase error current for the second inverter.
  • the method for suppressing current distortion and circulating current in a three-phase, two-level inverter parallel operation system of the present invention is to eliminate physical differences caused by delays caused by differences in the nonlinear turn-on, turn-off, and parasitic capacitance of the inverter. It has a corrective effect.
  • inverters such as grid-connected inverters, renewable energy generation, and large-capacity motor drives.
  • FIG. 1 is a diagram showing a conventional method of controlling inverters connected in parallel.
  • Figure 2 shows a circuit diagram of a control device in one embodiment of the present disclosure.
  • FIG. 3 is a diagram for explaining why circulating current occurs in the master inverter and slave inverter according to an embodiment of the present disclosure.
  • FIG. 4 is a diagram for explaining why circulating current occurs in the master inverter and slave inverter according to an embodiment of the present disclosure.
  • FIG. 5 is a diagram to explain why circulating current occurs in the master inverter and slave inverter according to an embodiment of the present disclosure.
  • Figure 6 This is a diagram showing the process of deriving .
  • Figure 7 discloses the hardware configuration of a control device according to an embodiment of the present disclosure.
  • Figure 8 is a flowchart showing the operation of a control device according to an embodiment of the present disclosure.
  • Figure 9 is a flowchart showing the operation of a control device according to an embodiment of the present disclosure.
  • Figure 10 is a waveform diagram showing the effect of a control device according to an embodiment of the present disclosure.
  • FIG. 11 is a waveform diagram showing the effect of a control device according to an embodiment of the present disclosure.
  • Figure 12 is a waveform diagram showing the effect of the control device according to an embodiment of the present disclosure.
  • unit refers to a software or hardware component, and the “unit” performs certain roles. However, “wealth” is not limited to software or hardware.
  • the “copy” may be configured to reside on an addressable storage medium and may be configured to run on one or more processors.
  • part refers to software components, such as object-oriented software components, class components, and task components, processes, functions, properties, procedures, Includes subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables.
  • the functionality provided within the components and “parts” may be combined into smaller numbers of components and “parts” or may be further separated into additional components and “parts”.
  • unit may be implemented with a processor and memory.
  • processor should be interpreted broadly to include general purpose processors, central processing units (CPUs), microprocessors, digital signal processors (DSPs), controllers, microcontrollers, state machines, etc.
  • processor may refer to an application-specific integrated circuit (ASIC), programmable logic device (PLD), field programmable gate array (FPGA), etc.
  • ASIC application-specific integrated circuit
  • PLD programmable logic device
  • FPGA field programmable gate array
  • processor refers to a combination of processing devices, for example, a combination of a DSP and a microprocessor, a combination of a plurality of microprocessors, a combination of one or more microprocessors in combination with a DSP core, or any other such combination of configurations. It may also refer to
  • memory should be interpreted broadly to include any electronic component capable of storing electronic information.
  • the terms memory include random access memory (RAM), read-only memory (ROM), non-volatile random access memory (NVRAM), programmable read-only memory (PROM), erasable-programmable read-only memory (EPROM), electrical may refer to various types of processor-readable media, such as erasable PROM (EEPROM), flash memory, magnetic or optical data storage, registers, etc.
  • RAM random access memory
  • ROM read-only memory
  • NVRAM non-volatile random access memory
  • PROM programmable read-only memory
  • EPROM erasable-programmable read-only memory
  • electrical may refer to various types of processor-readable media, such as erasable PROM (EEPROM), flash memory, magnetic or optical data storage, registers, etc.
  • EEPROM erasable PROM
  • flash memory magnetic or optical data storage, registers, etc.
  • FIG. 1 is a diagram showing a conventional method of controlling inverters connected in parallel.
  • Inverter #1 represents the first inverter or master inverter.
  • Inverter #2 represents the second inverter or slave inverter.
  • the slave inverter could be controlled only by knowing information about the output current of the master inverter. In other words, when the size of communication data between the slave inverter and the master inverter is large, when there is a communication delay due to the distance between the master inverter and the slave inverter, and when it is difficult to immediately respond to signal changes and control of the slave inverter becomes difficult. There was.
  • the purpose of the slave inverter control method according to the present disclosure is to allow the slave inverter to be controlled normally while significantly reducing the amount of communication data between the master inverter and the slave inverter control device. More specifically, the present disclosure describes a control method for preventing circulating current from occurring between the master inverter and the slave inverter by controlling the slave inverter while reducing the amount of communication data.
  • Figure 2 shows a circuit diagram of a control device in one embodiment of the present disclosure.
  • 3 to 5 are diagrams to explain why circulating current occurs in the master inverter and slave inverter according to an embodiment of the present disclosure.
  • Figure 2 shows a parallel operation system of a three-phase, two-level inverter according to an embodiment of the present disclosure.
  • the master inverter is the same as the first inverter 220.
  • the slave inverter is the same as the second inverter 240.
  • Inverter #1 in FIG. 2 represents the first inverter or master inverter.
  • Inverter #2 in FIG. 2 represents a second inverter or slave inverter.
  • IGBT Insulated Gate Bipolar Transistor
  • an ideal PWM signal can be created as shown in Figure 3.
  • the A-phase command voltage of the first inverter 220 may be included in the three-phase command voltage of the first inverter.
  • the control device of the first inverter is Compare to triangle wave A signal like this can be obtained. If is the PWM signal of the positive switch 221 of phase A, may be a PWM signal of the A-phase cathode switch 222. Is It may be complementary to The positive and negative switches can be IGBTs.
  • Figure 4 shows the voltage around the inverter when the first inverter is assumed to be ideal and there is a non-linear element in the second inverter.
  • a voltage difference occurs between one phase of the first inverter and one phase of the second inverter, and a circulating current may occur due to the voltage difference.
  • Figure 4(A) shows a case where the direction of the current flowing through the switch of the first inverter is positive.
  • the direction of the current flowing through the switch of the second inverter may also be positive.
  • Figure 4(B) shows a case where the direction of the current flowing through the switch of the first inverter is negative.
  • the direction of the current flowing through the switch of the first inverter is negative, the direction of the current flowing through the switch of the second inverter may also be negative.
  • Figure 4 represents the output voltage of the first inverter 220. Since the first inverter 220 was assumed to be ideal, can have a perfect square wave. The output voltage of the first inverter 220 may refer to the voltage between point A1 and point N in FIG. 2.
  • the output voltage of the second inverter 240 may refer to the voltage between point A2 and point N in FIG. 2. Since the output voltage of the second inverter 240 is not ideal, a delay may occur.
  • the output voltage of the second inverter 240 may be the same as the waveform 411.
  • the output voltage of the second inverter 240 may be the same as the waveform 421.
  • the output voltage of the second inverter 240 when the output voltage of the second inverter 240 is the same as the waveform 411, the output voltage of the first inverter 220 and the second inverter 240 The difference in output voltage ( ) may be the same as waveform 412.
  • the output voltage of the second inverter 240 when the output voltage of the second inverter 240 is the same as the waveform 421, the output voltage of the first inverter 220 and the second inverter ( 240) difference in output voltage ( ) may be the same as waveform 422.
  • the difference between the output voltage of the first inverter 220 and the output voltage of the second inverter 240 ( ) a circulating current may be generated between the first inverter 220 and the second inverter 240.
  • the output voltage of the second inverter 240 when the output voltage of the second inverter 240 is the same as the waveform 431, the output voltage of the first inverter 220 and the second inverter ( 240) difference in output voltage ( ) may be the same as waveform 432.
  • the output voltage of the first inverter 220 and the second inverter ( 240) difference in output voltage ( ) when the output voltage of the second inverter 240 is the same as the waveform 441, the output voltage of the first inverter 220 and the second inverter ( 240) difference in output voltage ( ) may be the same as waveform 442.
  • the difference between the output voltage of the first inverter 220 and the output voltage of the second inverter 240 ( ) a circulating current may be generated between the first inverter 220 and the second inverter 240.
  • Figure 4 focuses on phase A, but since the same description can be applied to phases B and C, overlapping descriptions will be omitted.
  • the inverter output voltages of the first inverter and the second inverter are (A) in FIG. It may appear as in (B) in 4. Due to the non-linear elements of the inverter, a difference occurs in the inverter output voltage depending on the current direction of the second inverter every switching cycle, and this can be expressed as Equations 1 and 2 in FIG. 5. Referring to FIG. 5, the output voltage of the first inverter 220 can be expressed as follows.
  • the output voltage of the second inverter 240 can be expressed as follows.
  • Equation 2 is the voltage caused by the nonlinearity delay of the switch according to the direction of the output current of the A-phase inverter of the second inverter 240, which is , , , , All delays caused by can be included.
  • Figure 6 shows that in Equation 2 This is a diagram showing the process of deriving . can be expressed as equation (610) in FIG. 6. Figure 6 is explained focusing on phase A, but since the same description can be applied to phases B and C, overlapping descriptions will be omitted.
  • the voltage that causes a circulating current from point (A1, B1, or C1) of the first inverter 220 in FIG. 2 to point (A2, B2, or C2) through point (A, B, or C) is generated. If expressed as an equation, it can be as follows.
  • Equation 3 can be modified as Equation 3-1 to reflect this.
  • Figure 7 discloses the hardware configuration of a control device according to an embodiment of the present disclosure.
  • the control device 700 may include a processor 710 and a memory 720.
  • the processor 710 may execute instructions stored in the memory 720.
  • the control device 700 may control the second inverter 240 based on commands stored in the memory 720.
  • the control device 700 may be implemented as hardware or software.
  • the control device 700 may be implemented with only hardware to perform the corresponding function. However, it is not limited to this, and the control device 700 may be implemented with a general-purpose processor 710, and the general-purpose processor 710 of the control device 700 may be implemented to execute a program stored in the memory 720.
  • the control device of the first inverter may include the same configuration as the control device 700 of the second inverter.
  • the control device 700 of the first inverter and the second inverter may include a communication unit.
  • the control device of the first inverter and the control device 700 of the second inverter can communicate wired or wirelessly.
  • the control device 700 of the second inverter may receive the three-phase command voltage of the first inverter 220 from the control device of the first inverter.
  • one control device can control both the first inverter and the second inverter.
  • simply referring to the control device 700 may refer to the control device of the second inverter.
  • Figure 8 is a flowchart showing the operation of a control device according to an embodiment of the present disclosure.
  • the second inverter 240 may be connected in parallel with the first inverter 220.
  • the first inverter 220 may be a master inverter
  • the second inverter 240 may be a slave inverter.
  • Master inverter and slave inverter can be determined by the administrator.
  • the master inverter can be controlled independently without receiving control signals from the slave inverter.
  • the slave inverter can be controlled by receiving a control signal from the master inverter.
  • the control device 700 of the second inverter 240 may perform the following control method to suppress circulating current between the second inverter 240 and the first inverter 220.
  • the control device 700 of the second inverter 240 controls the three-phase command voltage ( ) may be performed (step 810). More specifically, the control device 700 of the second inverter 240 controls the three-phase command voltage of the first inverter 220 generated by the control block 210 ( ) may be performed (step 810).
  • the control device of the first inverter 220 can generate a three-phase command voltage. For example, the three-phase command voltage of the first inverter 220 may be generated by the block 210.
  • the three-phase command voltage of the first inverter 220 is , ,and may include. is the command voltage of phase A, is the command voltage of phase B, may be the command voltage of phase C.
  • the control device of the first inverter 220 may generate a pulse wave by comparing the three-phase command voltage of the first inverter 220 with a triangle wave, and transmit the pulse wave to the switch (IGBT; Insulated Gate) of the first inverter 220. Bipolar Transistor). Additionally, the control device of the first inverter 220 may transmit the three-phase command voltage of the first inverter 220 to the control device 700 of the second inverter 240. The control device 700 of the second inverter 240 may receive the three-phase command voltage of the first inverter 220.
  • the control device 700 controls the three-phase zero phase current of the second inverter ( )
  • a step 820 of acquiring a three-phase compensation voltage can be performed.
  • the control device 700 may perform the following steps to obtain the three-phase zero phase current of the second inverter.
  • the control device 700 obtains the average of the measured current in phase A of the second inverter, the measured current in phase B of the second inverter, and the measured current in phase C of the second inverter as the three-phase zero phase current of the second inverter. You can follow the steps. More specifically, the three-phase zero phase current of the second inverter ( ) can be obtained by the following equation.
  • Equation 4 may be the current flowing from point A2 to point A. may be the current flowing from point B2 to point B. may be the current flowing from point C2 to point C.
  • the control device 700 of the second inverter controls the three-phase zero phase current (700) of the second inverter without the need for communication with the control device of the first inverter. ) can be obtained.
  • the control device 700 measures the current using a sensor included in the second inverter 240 and determines the three-phase zero phase current ( ) can be obtained.
  • the control device 700 controls the three-phase zero phase current ( ) can be obtained.
  • 3-phase zero current ( ) may have a value set by the user.
  • the control device of the first inverter or the control device 700 of the second inverter controls three-phase zero phase current ( ) can be input from the user.
  • Pre-stored three-phase zero current ( ) can have a value greater than or equal to 0.
  • Pre-stored three-phase zero current ( ) may be smaller than the target current signal or the three-phase target current signal in the dq coordinate system. Accordingly, the size of communication data of the first inverter 220 to the second inverter 240 can be reduced, and control errors of the second inverter 240 due to communication delay can be reduced. Step 820 will be described in detail with reference to FIG. 9.
  • the three-phase compensation voltage may be configured to obtain the three-phase command voltage of the second inverter 240 by compensating for the three-phase command voltage of the first inverter 220.
  • the control device 700 controls the three-phase command voltage of the first inverter ( , ,and ) and three-phase compensation voltage ( , , ) Based on the three-phase command voltage of the second inverter ( , ,and ) can be performed (step 830).
  • the control device 700 may further perform the following steps to perform the step 830 of acquiring the three-phase command voltage of the second inverter.
  • the control device 700 uses a three-phase compensation voltage ( , , ) to the three-phase command voltage of the first inverter ( , ,and ) is added to obtain the three-phase command voltage of the second inverter ( , ,and ) can be performed.
  • step 840 of operating the second inverter based on the three-phase command voltage of the second inverter may be performed. More specifically, the control device 700 of the second inverter 240 controls the three-phase command voltage of the second inverter 240 ( , ,and ) can be compared with a triangle wave to generate a pulse PWM signal, and the PWM signal can be input to the positive and negative switches included in the second inverter 240.
  • Figure 9 is a flowchart showing the operation of a control device according to an embodiment of the present disclosure.
  • FIG. 9 is a flowchart specifying step 820 of FIG. 8.
  • the step 820 of acquiring a three-phase compensation voltage may further include the following processes.
  • the control device 700 may perform step 910 of acquiring a three-phase target current signal.
  • the three-phase target current signal may refer to the current supplied to the load 250 by the first inverter 220 or the second inverter 240.
  • the three-phase target current signal obtained by the control device 700 of the second inverter 240 is , , and may include.
  • the three-phase target current signal may be a predetermined value.
  • the three-phase target current signal can be set by the manager of the control device 700.
  • the control device 700 of the second inverter 240 may perform control using the dq coordinate system. That is, the target current signal in the predetermined dq coordinate system is and It may be the same as may be the d-axis component of the target current signal. also, may be the q-axis component of the target current signal.
  • the control device 700 of the second inverter 240 may convert the target current signal in the dq coordinate system into a three-phase target current signal.
  • the control device of the first inverter 220 and the control device of the second inverter 240 may share the target current signal in the d-q coordinate system.
  • the control device of the first inverter 220 and the control device of the second inverter 240 may communicate using a target current signal in the d-q coordinate system.
  • the control device of the first inverter 220 and the control device of the second inverter 240 may transmit and receive a target current signal in the d-q coordinate system.
  • the control device of the first inverter 220 and the control device of the second inverter 240 perform a step 910 of converting the target current signal in the d-q coordinate system into a three-phase target current signal to obtain the three-phase target current signal. It can be done.
  • the d-axis and q-axis components can be expressed as DC components. Therefore, when communicating using a target current signal in the d-q coordinate system, the control device of the first inverter 220 and the control device of the second inverter 240 can transmit and receive a constant value regardless of the communication period. However, since three phases are changing alternating current components, when the control device of the first inverter 220 and the control device of the second inverter 240 exchange a three-phase target current signal, the three-phase target current signal affects the communication cycle. This may cause problems. Therefore, the control device of the first inverter 220 and the control device of the second inverter 240 of the present disclosure can stably operate the system by transmitting and receiving the target current signal in the d-q coordinate system.
  • a three-phase target current signal ( , , and ) is the target current signal ( and ) can be derived from
  • the control device 700 controls the three-phase current of the second inverter ( , , ) can be performed (920).
  • the control device 700 uses the sensor included in the second inverter 240 to control the flow from point A2 to point A. obtains and flows from point B2 to point B. obtains and flows from point C2 to point C. can be obtained.
  • the control device 700 of the second inverter 240 may perform step 930 of measuring the three-phase zero phase current of the second inverter.
  • the control device 700 controls the three-phase current of the second inverter measured in step 920 ( , , ) based on the three-phase zero-phase current ( ) can be obtained.
  • the control device 700 measures the measured current of phase A of the second inverter ( ), the measured current of phase B of the second inverter ( ), and the measured current of phase C of the second inverter ( ) is the average of the three-phase zero phase current of the second inverter ( ), you can perform the acquisition steps. More specifically, the control device 700 controls the three-phase zero phase current ( ) can be obtained.
  • the control device 700 of the second inverter 240 controls the three-phase zero phase current of the second inverter ( ) and the target current signal in the dq coordinate system ( and ) Based on the three-phase estimated current of the first inverter ( ) can be performed (940).
  • the control device 700 of the second inverter 240 controls the three-phase zero phase current of the second inverter ( ) and three-phase target current signal ( , , and ) Based on the three-phase estimated current of the first inverter ( ) can be performed (940).
  • the control device 700 of the second inverter 240 controls the three-phase estimated current of the first inverter ( ), you can perform the following process to obtain:
  • the control device 700 receives a three-phase target current signal ( , , and ), the three-phase zero phase current of the second inverter 240 ( ) is subtracted to obtain the three-phase estimated current of the first inverter ( ) can be performed.
  • the control device 700 controls the A-phase target current signal ( ), the three-phase zero phase current of the second inverter 240 ( ) is subtracted to obtain the estimated current of phase A of the first inverter ( ) can be performed.
  • control device 700 provides a B-phase target current signal ( ), the three-phase zero phase current of the second inverter 240 ( ) is subtracted to obtain the estimated phase B current of the first inverter ( ) can be performed.
  • control device 700 provides a C-phase target current signal ( ), the three-phase zero phase current of the second inverter 240 ( ) is subtracted to obtain the estimated C phase current of the first inverter ( ) can be performed.
  • the control device 700 controls the three-phase zero phase current ( ) to the three-phase target current signal ( , , and ) is subtracted to obtain the three-phase estimated current of the first inverter ( ) can also be performed.
  • the three-phase zero current of the second inverter 240 ( ) is estimated to also flow to the first inverter 240. This is because the three-phase zero phase current of the second inverter 240 ( ) is assumed to be a circulating current flowing in the first inverter 220 and the second inverter 240.
  • the first inverter 220 and the second inverter 240 provide a three-phase target current signal ( , , and ) must be provided to the load 250, but the three-phase zero phase current ( ) is measured, so the three-phase zero phase current ( It can be assumed that a current subtracted by ) is flowing. Because the three-phase zero current ( ) is a circular current, so it will flow from point A2 to A and then to A1.
  • the three-phase zero phase current measured in the second inverter ( ) is the three-phase target current signal of the second inverter 240 ( , , and ) is added to the three-phase target current signal of the first inverter 220 ( , , and ) can be deducted. Based on this estimate, the control device 700 calculates the three-phase estimated current of the first inverter ( ) can be obtained.
  • the control device 700 of the second inverter controls the three-phase estimated current of the first inverter ( ), so there is no need to receive three-phase current from the control device of the first inverter. Accordingly, data transmission and reception between the control device 700 of the second inverter and the control device of the first inverter can be minimized. Additionally, the control signal for the second inverter 240 may not have an error due to communication delay, and the control device 700 of the second inverter can quickly generate the control signal for the second inverter 240. .
  • the control device 700 of the second inverter 240 controls the three-phase estimated current of the first inverter ( ) and the three-phase current of the second inverter ( , , ) based on the three-phase error current for the second inverter ( , , ) can be performed (950). More specifically, the control device 700 may perform the following steps to perform the step 950 of acquiring the three-phase error current for the second inverter. The control device 700 controls the three-phase current of the second inverter ( , , ), the three-phase estimated current of the first inverter 220 ( ) is subtracted to obtain the three-phase error current for the second inverter ( , , ) can be performed.
  • control device 700 calculates the three-phase estimated current of the first inverter 220 ( ), the three-phase current of the second inverter ( , , ) is subtracted to obtain the three-phase error current for the second inverter ( , , ) can also be performed.
  • steps 910 to 950 of FIG. 9 are summarized in an equation, the three-phase error current for the second inverter ( , , ) can be expressed as follows.
  • Equation 7 is the d-axis current command of the inverter.
  • is the inverter’s q-axis current command is the zero phase current of the second inverter 240.
  • Equation 7 may be the same as Equation 6.
  • the control device 700 of the second inverter 240 does not require separate reception of the output current of the first inverter 220, and the burden of communication can be reduced.
  • the control device 700 uses a three-phase compensation voltage ( , , ), the following steps can be further performed for the step 960 of obtaining.
  • each phase can be expressed as a PI controller as shown in Equation 8. That is, step 960 can be performed according to Equation 8 below.
  • the three-phase compensation voltage is a predetermined proportional gain, is a predetermined integral gain, is the command current for the three-phase error current for the second inverter, s is the Laplace operator, may be a three-phase error current for the second inverter. 1/s may refer to the integrator.
  • Command current for the three-phase error current for the second inverter ( ) may be a command current for the three-phase error current for the first inverter. Additionally, the command current for the three-phase error current for the second inverter may be 0. This is because the target current can be reached only when the 3-phase error current is reduced to 0.
  • Equation 8 can be as follows.
  • the control device 700 of the second inverter 240 receives the three-phase command voltage ( , ,and ), there is no need to receive any other signals. Therefore, the amount of data transmitted and received between the first inverter 220 and the second inverter 240 may not be large. Therefore, delay due to communication can be minimized. Additionally, by estimating the current of the first inverter, the zero phase current can be dramatically reduced and heat generation can be reduced.
  • FIG. 10 is a waveform diagram showing the effect of a control device according to an embodiment of the present disclosure.
  • FIG. 10A shows current distortion and zero-phase current occurring in the second inverter 240 due to nonlinearity between the first inverter 220 and the second inverter 240.
  • (A) of Figure 10 is the A-phase current included in the three-phase current of the second inverter, is the B-phase current included in the three-phase current of the second inverter, represents the C-phase current included in the three-phase current of the second inverter. represents the three-phase zero phase current of the second inverter.
  • Figure 10 (A) is the A-phase current included in the three-phase current of the first inverter, is the B-phase current included in the three-phase current of the first inverter, represents the C-phase current included in the three-phase current of the first inverter. represents the three-phase zero phase current of the first inverter.
  • Figure 10 (A) Is It can be confirmed that it is the reverse image of .
  • the three-phase zero phase current of the first inverter ( ) and the three-phase zero phase current of the second inverter ( ) it can be confirmed that there is distortion in the three-phase current of the first inverter and the three-phase current of the second inverter.
  • Figure 10(B) shows removal of the zero-sequence current using the prior art.
  • the prior art removes the zero-sequence current circulating in parallel inverters, but the zero-sequence current in the second inverter 240 is removed. It does not eliminate current distortion.
  • FIG. 10C shows the results of the control device 700 of the present disclosure suppressing zero phase current and current distortion of the second inverter 240 according to FIGS. 2, 8, and 9.
  • FIG. 11 is a waveform diagram showing the effect of a control device according to an embodiment of the present disclosure.
  • Figure 11 (A) shows the case where there is no compensation voltage. Referring to (A) of FIG. 11, it can be seen that there is a difference between the rising time and falling time of the inverter output voltage due to the difference in nonlinearity.
  • Figure 11 (B) shows a case of using a zero-phase current controller according to the prior art. Referring to (B) in FIG. 11, it can be seen that the difference in the inverter output voltage increases at rising time and falling time because the compensation voltage is added to all phases rather than calculating the compensation voltage for each phase. .
  • Figure 11 (C) shows a case of using the compensation voltage according to the present disclosure.
  • the control device 700 of the present disclosure calculates and adds the compensation voltage for each phase, the difference between the inverter output voltage at rising time and falling time is (A) of FIG. 11 and FIG. It can be seen that there is an improvement compared to 11(B).
  • Figure 12 is a waveform diagram showing the effect of the control device according to an embodiment of the present disclosure.
  • Figure 12 (B) shows a waveform according to the control device 700 of the present disclosure.
  • a three-phase compensation voltage ( , , ) can be seen to be different for each phase.
  • 3-phase compensation voltage ( , , ) is determined separately for each phase by equation (8). According to the control device 700 of the present disclosure, it can be confirmed that the distortion of the inverter output current is reduced and there is no difference between the inverter output currents.
  • the above-described embodiments of the present invention can be written as a program that can be executed on a computer, and can be implemented in a general-purpose digital computer that operates the program using a computer-readable recording medium.
  • the computer-readable recording media includes storage media such as magnetic storage media (eg, ROM, floppy disk, hard disk, etc.) and optical read media (eg, CD-ROM, DVD, etc.).

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Abstract

La présente invention concerne un procédé de commande d'un second onduleur, le procédé comprenant les étapes de : la réception d'une tension de commande triphasée d'un premier onduleur, qui est générée par un dispositif de commande ; l'acquisition d'une tension de compensation triphasée sur la base d'un courant triphasé homopolaire du second onduleur ; l'acquisition d'une tension de commande triphasée du second onduleur sur la base de la tension de commande triphasée du premier onduleur et de la tension de compensation triphasée ; et la commande du second onduleur sur la base de la tension de commande triphasée du second onduleur.
PCT/KR2022/020039 2022-04-04 2022-12-09 Appareil pour supprimer une distorsion de courant et un courant de circulation d'un onduleur triphasé à deux niveaux en parallèle et procédé de fonctionnement de l'appareil WO2023195598A1 (fr)

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KR1020220041727A KR20230142990A (ko) 2022-04-04 2022-04-04 병렬 3상 2-레벨 인버터의 전류 왜곡 및 순환전류 억제 장치 및 장치의 동작 방법
KR10-2022-0041727 2022-04-04

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010088162A (ja) * 2008-09-30 2010-04-15 Hitachi Ltd インバータ装置
EP2879287A1 (fr) * 2013-11-14 2015-06-03 ABB Oy Procédé et appareil pour minimiser un courant circulant ou une tension de mode commun d'un inverseur
KR20160121314A (ko) * 2015-04-10 2016-10-19 삼성중공업 주식회사 3상 부하의 전류제어장치
US20160373044A1 (en) * 2015-06-18 2016-12-22 Delta Electronics, Inc. Circulating current and oscillating current suppressing method and parallel inverter driver system
JP2017028763A (ja) * 2015-07-16 2017-02-02 株式会社デンソー 電力変換装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010088162A (ja) * 2008-09-30 2010-04-15 Hitachi Ltd インバータ装置
EP2879287A1 (fr) * 2013-11-14 2015-06-03 ABB Oy Procédé et appareil pour minimiser un courant circulant ou une tension de mode commun d'un inverseur
KR20160121314A (ko) * 2015-04-10 2016-10-19 삼성중공업 주식회사 3상 부하의 전류제어장치
US20160373044A1 (en) * 2015-06-18 2016-12-22 Delta Electronics, Inc. Circulating current and oscillating current suppressing method and parallel inverter driver system
JP2017028763A (ja) * 2015-07-16 2017-02-02 株式会社デンソー 電力変換装置

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