WO2023195450A1 - Ceramic electronic component - Google Patents

Ceramic electronic component Download PDF

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Publication number
WO2023195450A1
WO2023195450A1 PCT/JP2023/013831 JP2023013831W WO2023195450A1 WO 2023195450 A1 WO2023195450 A1 WO 2023195450A1 JP 2023013831 W JP2023013831 W JP 2023013831W WO 2023195450 A1 WO2023195450 A1 WO 2023195450A1
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Prior art keywords
conductor
conductor pattern
pattern
electronic component
ceramic electronic
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PCT/JP2023/013831
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French (fr)
Japanese (ja)
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裕史 大家
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株式会社村田製作所
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Publication of WO2023195450A1 publication Critical patent/WO2023195450A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 

Definitions

  • the present invention relates to ceramic electronic components.
  • This coil component includes a laminate in which a plurality of ceramic layers are laminated, and a coil formed by a wiring pattern is formed inside the laminate.
  • the wiring pattern may be formed by screen printing on each ceramic layer.
  • the plurality of ceramic layers are pressed in a stacked state.
  • the wiring pattern formed by screen printing is crushed when the laminate is pressed.
  • the wiring pattern located close to the conductive via is not crushed much because the surrounding conductor density is high, but the wiring pattern located far from the conductive via is pressed by the ceramic layer and crushed. Therefore, even if one looks at a single wiring pattern, the thickness will be different between the central part far from the conductive via and the end part close to the conductive via.
  • both ends in the width direction are sharp like a beak, and electrolysis tends to concentrate on these sharp parts. If electrolysis concentrates at such a sharp end, energy will be lost and the Q value will deteriorate.
  • the wiring patterns may be arranged in the same layer. If a wiring pattern located far from a conductive via, that is, a wiring pattern located far from a conductive via, is crushed by the ceramic layer and spreads in the width direction, the distance between adjacent wiring patterns placed on the same layer becomes narrower. If the distance between adjacent wiring patterns changes, the characteristics of the coil will also change.
  • an object of the present invention is to provide a ceramic electronic component that can suppress collapse of wiring that forms part of a coil.
  • a ceramic electronic component based on the present invention includes a main body including a structure in which a plurality of ceramic layers are stacked in a first direction.
  • a coil is formed inside the main body.
  • the coil includes a first conductor via and a second conductor via which are spaced apart from each other in a second direction perpendicular to the first direction and extend in the first direction inside the main body. , a first conductor pattern, and a second conductor pattern. At least a portion of each of the first conductor pattern and the second conductor pattern has a linear shape extending in the second direction inside the main body.
  • the first conductor via and the second conductor via are connected by the first conductor pattern.
  • the first conductor via and the second conductor via are also connected by the second conductor pattern.
  • the middle of the section between the first conductor via and the second conductor via in the first conductor pattern, and between the first conductor via and the second conductor in the second conductor pattern It is connected to the middle of the section existing in , by one or more intermediate conductor vias.
  • the middle of the section existing between the first conductive via and the second conductive via in the first conductive pattern and between the first conductive via and the second conductive via in the second conductive pattern Since the middle of the section existing in is connected by one or more intermediate conductor vias, it is possible to suppress collapse of the wiring forming a part of the coil.
  • FIG. 1 is a perspective view of a ceramic electronic component in Embodiment 1 based on the present invention.
  • 1 is a partial perspective view of a coil included in a ceramic electronic component in Embodiment 1 based on the present invention.
  • 1 is a partial cross-sectional view of a ceramic electronic component in Embodiment 1 based on the present invention.
  • FIG. 2 is an explanatory diagram of the first step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention.
  • FIG. 3 is an explanatory diagram of the second step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. It is an explanatory view of the third process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention.
  • FIG. 1 is a perspective view of a ceramic electronic component in Embodiment 1 based on the present invention.
  • 1 is a partial perspective view of a coil included in a ceramic electronic component in Embodiment
  • FIG. 7 is an explanatory diagram of the fourth step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. It is an explanatory view of the 5th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention.
  • FIG. 7 is an explanatory diagram of the sixth step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. It is an explanatory view of the 7th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. It is an explanatory view of the 8th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention.
  • FIG. 3 is an explanatory diagram of a state in which the first conductor pattern and the second conductor pattern are crushed and deformed by press working.
  • FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is one.
  • FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is three.
  • FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is five.
  • FIG. 3 is a partial plan view of a coil included in a ceramic electronic component according to a second embodiment of the present invention. It is a perspective view of the ceramic electronic component in Embodiment 2 based on this invention.
  • FIG. 7 is a partial cross-sectional view of a ceramic electronic component in Embodiment 3 based on the present invention.
  • FIG. 7 is an explanatory diagram of a first ceramic green sheet used for manufacturing a ceramic electronic component in Embodiment 3 based on the present invention.
  • FIG. 7 is an explanatory diagram of a second ceramic green sheet used for manufacturing a ceramic electronic component in Embodiment 3 based on the present invention.
  • top or bottom do not necessarily mean absolute top or bottom, but may mean relative top or bottom within the illustrated posture. .
  • FIG. 1 shows a perspective view of the internal structure of a ceramic electronic component 101 in this embodiment.
  • the ceramic electronic component 101 includes a main body 1 including a structure in which a plurality of ceramic layers are stacked in a first direction 91.
  • a coil is formed inside the main body 1.
  • Figure 2 shows a portion of this coil taken out.
  • FIG. 3 shows a partial cross-sectional view of the ceramic electronic component 101 in which a portion of this coil is visible. What is shown in FIGS. 2 and 3 corresponds to a portion of one turn of the coil.
  • This coil includes a first conductor via 41 and a second conductor arranged in a second direction 92 perpendicular to the first direction 91 inside the main body 1 so as to be spaced apart from each other and extending in the first direction 91.
  • Via 42 is included.
  • this coil includes a first conductor pattern 51 and a second conductor pattern 52. At least a portion of each of the first conductor pattern 51 and the second conductor pattern 52 has a linear shape extending in the second direction 92 inside the main body 1 .
  • the first conductor via 41 and the second conductor via 42 are connected by a first conductor pattern 51.
  • the first conductive via 41 and the second conductive via 42 are also connected by a second conductive pattern 52.
  • the direction of the winding axis of this coil is the third direction 93.
  • the third direction 93 is a direction perpendicular to both the first direction 91 and the second direction 92.
  • the first conductor pattern 51 and the second conductor pattern 52 are connected even when the laminate is pressed. It is possible to prevent the intermediate portion from collapsing. That is, it is possible to suppress collapse of the wiring that forms part of the coil. Thereby, deterioration of the Q value can be suppressed. Furthermore, it is possible to reduce characteristic variations due to coil coupling variations.
  • the first conductor pattern 51 and the second conductor pattern 52 have the same shape and the same size. By adopting this configuration, design becomes easy.
  • a ceramic green sheet 21 is prepared. Ceramic green sheet 21 is held by carrier film 20. In FIG. 4, a ceramic green sheet 21 is arranged to cover the lower surface of the carrier film 20.
  • a through hole 22 is formed.
  • the through hole 22 is formed so as to penetrate the carrier film 20 and the ceramic green sheet 21 all at once.
  • the through hole 22 can be formed by laser processing, for example.
  • the through holes 22 are filled with conductive paste 23 and dried.
  • a conductor pattern 24 is formed on the surface of the ceramic green sheet 21 as necessary.
  • the conductive pattern 24 can be formed on the surface of the ceramic green sheet 21 by, for example, screen printing a conductive paste.
  • the conductor pattern 24 may be formed by other methods.
  • the conductor pattern 24 will later become a first conductor pattern 51, a second conductor pattern 52, conductor patterns 5, 8, etc.
  • the ceramic green sheet 21 is peeled off from the carrier film 20 and laminated. By stacking a plurality of ceramic green sheets 21, a laminate is formed as shown in FIG. 8.
  • the plurality of ceramic green sheets 21 become the plurality of insulating layers 2.
  • Each process is progressing as a collective substrate corresponding to multiple ceramic electronic components.
  • the laminate extends to the left and right, but a portion corresponding to one ceramic electronic component 101 is displayed in the center.
  • FIG. 8 shows the state of the collective substrate before it is cut into individual product sizes.
  • the cut surface 13 is also shown. The cut surface 13 is a surface to be cut later.
  • the lower end of the first conductor via 41 is connected to the conductor pattern 8.
  • the upper end of the first conductor via 41 is connected to the first conductor pattern 51.
  • the second conductor pattern 52 is connected to the middle of the first conductor via 41 .
  • the upper end of the second conductor via 42 is connected to the first conductor pattern 51.
  • the second conductor pattern 52 is connected to the middle of the second conductor via 42 .
  • the lower end of the second conductor via 42 is connected to the conductor pattern 5.
  • the conductor pattern 5 is arranged below the conductor pattern 8.
  • the conductor pattern 5 and the conductor pattern 6 are connected by a conductor via 7.
  • the conductor pattern 6 is arranged on the lower surface of the laminate and exposed to the outside.
  • the steps up to this point were carried out with the assembled substrate 11 as shown in FIG.
  • the collective substrate 11 is held by a carrier sheet 25 having adhesive properties.
  • the aggregate substrate 11 is cut at the cutting surface 13 .
  • the cutting may be performed, for example, by dicing.
  • a plurality of element bodies 12 are obtained as shown in FIG.
  • This element body 12 is subjected to barrel polishing.
  • the corners of the element body 12 become rounded as shown in FIG.
  • a plating film 10 is formed to cover the conductor pattern 6 on the lower surface.
  • the plating film 10 has, for example, a two-layer structure.
  • the plating film 10 includes a first plating film 10a and a second plating film 10b.
  • the first conductor pattern 51 and the second conductor pattern 52 are crushed and deformed to a state as shown in FIG. 14.
  • the first conductor pattern 51 and the second conductor pattern 52 do not deform much in the vicinity of the first conductor via 41, intermediate conductor via 4, and second conductor via 42, but deform significantly in locations far from these.
  • Near the center between the first conductor via 41 and the intermediate conductor via 4, the first conductor pattern 51 and the second conductor pattern 52 each become locally thinner, and the difference between the first conductor pattern 51 and the second conductor pattern 52 becomes thinner. The distance between them is a little narrower. The same applies to the vicinity of the center between the intermediate conductor via 4 and the second conductor via 42.
  • the amount of deformation is kept small by the rigidity of these conductor vias, so the distance A and the distance B are approximately equal.
  • the distance B between the first conductor pattern 51 and the second conductor pattern 52 at the center of the first conductor pattern 51 and the second conductor pattern 52 is It is approximately equal to the distance A between the first conductor pattern 51 and the second conductor pattern 52.
  • At least one of the one or more intermediate conductor vias 4 is located in a section of the first conductor pattern 51 that exists between the first conductor via 41 and the second conductor via 42. Preferably, it is centrally connected.
  • 15 shows an example with one intermediate conductor via 4
  • FIG. 16 shows an example with three intermediate conductor vias 4
  • FIG. 17 shows an example with five intermediate conductor vias 4. It is preferable that the number of intermediate conductor vias 4 increases because the rigidity increases and the first conductor pattern 51 and the second conductor pattern 52 become less likely to deform during press working.
  • at least one of the one or more intermediate conductor vias 4 is located between the first conductor via 41 and the second conductor via 42 in the first conductor pattern 51. Connected to the center of the existing section.
  • one or more intermediate conductor vias are preferably arranged so as to equally divide the section between the first conductor via 41 and the second conductor via 42. By arranging them in this manner, the force acting during press working is distributed as evenly as possible, so that deformation can be efficiently prevented.
  • FIG. 18 shows a part of the coil included in the ceramic electronic component 102 in this embodiment.
  • FIG. 19 shows a plan view of the portion shown in FIG. 18, that is, a view from the first direction 91.
  • FIG. 20 shows a perspective view of the internal structure of the ceramic electronic component 102.
  • the diameter of the intermediate conductor via 4 is larger than the diameters of the first conductor via 41 and the second conductor via 42.
  • each of the one or more intermediate conductor vias 4 is arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52. .
  • the number of intermediate conductor vias 4 is one, but the same applies even if two or more intermediate conductor vias 4 are provided.
  • the effects described in Embodiment 1 can be obtained.
  • the distance D in FIG. 20 becomes shorter.
  • Distance D is the distance between one turn and an adjacent turn of a coil included in ceramic electronic component 102 . If the distance D changes, the characteristics of the coil will change.
  • each of the one or more intermediate conductor vias 4 is arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52. This kind of situation can be avoided.
  • the shape of the intermediate conductor via 4 is not limited to a cylinder.
  • the shape of the intermediate conductor via 4 may be, for example, an elliptical cylinder or a square cylinder. Even in the case of these shapes, it is preferable that they are arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52.
  • FIG. 21 shows a part of the coil included in the ceramic electronic component in this embodiment.
  • the first conductor via 41 includes a portion 41a and a portion 41b.
  • the second conductor via 42 includes a portion 42a and a portion 42b.
  • Three intermediate conductor vias 4 are arranged between the first conductor pattern 51 and the second conductor pattern 52.
  • the number of intermediate conductor vias 4 is three, but the number of intermediate conductor vias 4 is not limited to this. It is sufficient that one or more intermediate conductor vias 4 are arranged.
  • the ratio of pores included in one or more intermediate conductor vias 4 is determined by the ratio of pores in the first conductor via 41 and the second conductor via 42 other than the portion between the first conductor pattern 51 and the second conductor pattern 52. Small compared to the pore ratio. That is, the ratio of pores included in intermediate conductor via 4 is smaller than the ratio of pores included in portions 41a and 42a.
  • a pore is a void. These voids are formed due to the resin component contained in the conductive paste 23 that is filled into the through hole 22 to form the conductive via. The resin component is intentionally mixed in order to bring the shrinkage rate of the conductive paste 23 during firing closer to that of the surrounding ceramic.
  • the resin component contained in the conductive paste 23 is small, the difference in shrinkage rate will be large compared to the surrounding ceramic, so cracks may occur.
  • one or more intermediate conductors The resin component contained in the conductive paste 23 for forming the via 4 is deliberately made small. As a result, the ratio of pores included in one or more intermediate conductor vias 4 is reduced as described above.
  • the conductive paste 23 containing a large amount of resin component 26 is used, as shown in FIG. It will be done.
  • the conductive paste 23 containing less resin component 26 is used, as shown in FIG. It will be done.
  • 22 and 23 show a state in which the ceramic green sheet 21 is held by the carrier film 20. Actually, the ceramic green sheet 21 is peeled off from the carrier film 20, and a plurality of ceramic green sheets 21 are stacked.
  • the effects described in Embodiment 1 can be obtained.
  • the fact that the pore ratio is small in one or more intermediate conductor vias 4 means that the degree of shrinkage during firing is small, and this is due to the small deformation during press working. It also leads to Since one or more intermediate conductor vias 4 can be stretched with sufficient rigidity, the shape of the coil can be stabilized.
  • a ceramic electronic component is used in which the winding axis of the coil included in the main body is parallel to the main surface of the laminated insulating layers, that is, perpendicular to the lamination direction.
  • the direction of the winding axis of the coil included in the main body is not limited to this.
  • the matters described in each of the above embodiments also apply to a ceramic electronic component in which the winding axis of the coil included in the main body is parallel to the lamination direction, that is, perpendicular to the main surface of the laminated insulating layers.
  • a coil is formed inside the main body,
  • the coil includes a first conductor via and a second conductor via arranged in a second direction perpendicular to the first direction inside the main body so as to be spaced apart from each other and extending in the first direction.
  • first conductor pattern and a second conductor pattern At least a portion of each of the first conductor pattern and the second conductor pattern is linear extending in the second direction inside the main body,
  • the first conductor via and the second conductor via are connected by the first conductor pattern,
  • the first conductor via and the second conductor via are also connected by the second conductor pattern, In the middle of a section of the first conductor pattern that exists between the first conductor via and the second conductor via, and in the second conductor pattern between the first conductor via and the second conductor via.
  • a ceramic electronic component that is connected to the middle of the section by one or more intermediate conductor vias.
  • At least one of the one or more intermediate conductor vias is connected to the center of a section of the first conductor pattern that exists between the first conductor via and the second conductor via, Ceramic electronic components listed.
  • each of the one or more intermediate conductor vias is arranged so as not to protrude in the width direction from either the first conductor pattern or the second conductor pattern. , the ceramic electronic component according to appendix 1 or 2.
  • the ratio of pores included in the one or more intermediate conductor vias is determined by the ratio of pores in the first conductor via and the second conductor via in a portion other than the portion between the first conductor pattern and the second conductor pattern.
  • the ceramic electronic component according to any one of Supplementary Notes 1 to 4 which is smaller than the pore ratio.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

A ceramic electronic component (101) is provided with a body (1) having a structure in which a plurality of ceramic layers are stacked in a first direction (91). A coil is formed inside the body (1). The coil includes: a first conductor via (41) and a second conductor via (42) which are spaced apart from each other in a second direction (92) perpendicular to the first direction (91) inside the body (1) and are disposed to extend in the first direction (91); a first conductor pattern (51); and a second conductor pattern (52). At least a part of each of the first conductor pattern (51) and the second conductor pattern (52) is in the shape of a line extending in the second direction (92) inside the body (1). The first conductor via (41) and the second conductor via (42) are connected by both the first conductor pattern (51) and the second conductor pattern (52). A portion of the first conductor pattern (51) midway between the first conductor via (41) and the second conductor via (42) and a portion of the second conductor pattern (52) midway between the first conductor via (41) and the second conductor via (42) are connected by one or more central conductor vias (4).

Description

セラミック電子部品ceramic electronic components
 本発明は、セラミック電子部品に関するものである。 The present invention relates to ceramic electronic components.
 コイル部品の一例が、国際公開WO2021/053915A1(特許文献1)に記載されている。このコイル部品は、複数のセラミック層が積層された積層体を備え、積層体の内部には、配線パターンによるコイルが形成されている。 An example of the coil component is described in International Publication WO2021/053915A1 (Patent Document 1). This coil component includes a laminate in which a plurality of ceramic layers are laminated, and a coil formed by a wiring pattern is formed inside the laminate.
国際公開WO2021/053915A1International publication WO2021/053915A1
 配線パターンは各セラミック層に対するスクリーン印刷によって形成される場合がある。複数のセラミック層は積層された状態でプレスされる。スクリーン印刷で形成された配線パターンは、積層体をプレスした際に潰れる。この際に、導体ビアに近い位置にある配線パターンは、周辺の導体密度が高いのであまり潰れないが、導体ビアから遠い位置にある配線パターンは、セラミック層に押されて潰れてしまう。したがって、ひとつづきの配線パターンに注目しても、導体ビアから遠い中央部と、導体ビアに近い端部とで、厚みが異なる状態となる。配線パターンが著しく潰れた箇所においては、配線パターンの断面形状に注目すると、幅方向の両端がくちばしのように尖った状態となり、この尖った部分に電解が集中しやすくなる。このように尖った端に電解が集中すると、エネルギー損失となり、Q値が悪化する。 The wiring pattern may be formed by screen printing on each ceramic layer. The plurality of ceramic layers are pressed in a stacked state. The wiring pattern formed by screen printing is crushed when the laminate is pressed. At this time, the wiring pattern located close to the conductive via is not crushed much because the surrounding conductor density is high, but the wiring pattern located far from the conductive via is pressed by the ceramic layer and crushed. Therefore, even if one looks at a single wiring pattern, the thickness will be different between the central part far from the conductive via and the end part close to the conductive via. At a location where the wiring pattern is significantly crushed, paying attention to the cross-sectional shape of the wiring pattern, both ends in the width direction are sharp like a beak, and electrolysis tends to concentrate on these sharp parts. If electrolysis concentrates at such a sharp end, energy will be lost and the Q value will deteriorate.
 また、コイルの巻回軸がセラミック層に平行である場合、配線パターン同士が同じ層の中に並ぶ構成となりうる。導体ビアから遠い位置にある配線パターンすなわち導体ビアから遠い位置にある配線パターンがセラミック層に押されて潰れたことによって幅方向に広がった場合、同じ層に配置された隣りの配線パターンとの距離が狭くなる。隣りにある配線パターンとの距離が変化すると、コイルとしての特性も変化してしまう。 Furthermore, if the winding axis of the coil is parallel to the ceramic layer, the wiring patterns may be arranged in the same layer. If a wiring pattern located far from a conductive via, that is, a wiring pattern located far from a conductive via, is crushed by the ceramic layer and spreads in the width direction, the distance between adjacent wiring patterns placed on the same layer becomes narrower. If the distance between adjacent wiring patterns changes, the characteristics of the coil will also change.
 そこで、本発明は、コイルの一部をなす配線の潰れを抑制することができるセラミック電子部品を提供することを目的とする。 Therefore, an object of the present invention is to provide a ceramic electronic component that can suppress collapse of wiring that forms part of a coil.
 上記目的を達成するため、本発明に基づくセラミック電子部品は、複数のセラミック層が第1の方向に積層された構造を含む本体を備える。上記本体の内部にコイルが形成されている。上記コイルは、上記本体の内部において上記第1の方向に垂直な第2の方向に互いに離隔して上記第1の方向に延在するように配置された第1導体ビアおよび第2導体ビアと、第1導体パターンと、第2導体パターンとを含む。上記第1導体パターンおよび上記第2導体パターンの各々の少なくとも一部は、上記本体の内部において上記第2の方向に延在する線状である。上記第1導体ビアと上記第2導体ビアとは、上記第1導体パターンによって接続されている。上記第1導体ビアと上記第2導体ビアとは、上記第2導体パターンによっても接続されている。上記第1導体パターンのうち上記第1導体ビアと上記第2導体ビアとの間に存在する区間の途中と、上記第2導体パターンのうち上記第1導体ビアと上記第2導体ビアとの間に存在する区間の途中とは、1以上の中間導体ビアによって接続されている。 In order to achieve the above object, a ceramic electronic component based on the present invention includes a main body including a structure in which a plurality of ceramic layers are stacked in a first direction. A coil is formed inside the main body. The coil includes a first conductor via and a second conductor via which are spaced apart from each other in a second direction perpendicular to the first direction and extend in the first direction inside the main body. , a first conductor pattern, and a second conductor pattern. At least a portion of each of the first conductor pattern and the second conductor pattern has a linear shape extending in the second direction inside the main body. The first conductor via and the second conductor via are connected by the first conductor pattern. The first conductor via and the second conductor via are also connected by the second conductor pattern. In the middle of the section between the first conductor via and the second conductor via in the first conductor pattern, and between the first conductor via and the second conductor in the second conductor pattern It is connected to the middle of the section existing in , by one or more intermediate conductor vias.
 本発明によれば、第1導体パターンのうち第1導体ビアと第2導体ビアとの間に存在する区間の途中と、第2導体パターンのうち第1導体ビアと第2導体ビアとの間に存在する区間の途中とは、1以上の中間導体ビアによって接続されているので、コイルの一部をなす配線の潰れを抑制することができる。 According to the present invention, in the middle of the section existing between the first conductive via and the second conductive via in the first conductive pattern and between the first conductive via and the second conductive via in the second conductive pattern. Since the middle of the section existing in is connected by one or more intermediate conductor vias, it is possible to suppress collapse of the wiring forming a part of the coil.
本発明に基づく実施の形態1におけるセラミック電子部品の斜視図である。1 is a perspective view of a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品に含まれるコイルの部分斜視図である。1 is a partial perspective view of a coil included in a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の部分断面図である。1 is a partial cross-sectional view of a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第1の工程の説明図である。FIG. 2 is an explanatory diagram of the first step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第2の工程の説明図である。FIG. 3 is an explanatory diagram of the second step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第3の工程の説明図である。It is an explanatory view of the third process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第4の工程の説明図である。FIG. 7 is an explanatory diagram of the fourth step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第5の工程の説明図である。It is an explanatory view of the 5th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第6の工程の説明図である。FIG. 7 is an explanatory diagram of the sixth step of the method for manufacturing a ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第7の工程の説明図である。It is an explanatory view of the 7th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第8の工程の説明図である。It is an explanatory view of the 8th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第9の工程の説明図である。It is an explanatory view of the 9th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. 本発明に基づく実施の形態1におけるセラミック電子部品の製造方法の第10の工程の説明図である。It is an explanatory view of the 10th process of the manufacturing method of the ceramic electronic component in Embodiment 1 based on the present invention. プレス加工によって第1導体パターンおよび第2導体パターンが押し潰されて変形した状態の説明図である。FIG. 3 is an explanatory diagram of a state in which the first conductor pattern and the second conductor pattern are crushed and deformed by press working. 中間導体ビアの数が1である例の説明図である。FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is one. 中間導体ビアの数が3である例の説明図である。FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is three. 中間導体ビアの数が5である例の説明図である。FIG. 3 is an explanatory diagram of an example in which the number of intermediate conductor vias is five. 本発明に基づく実施の形態2におけるセラミック電子部品に含まれるコイルの部分斜視図である。It is a partial perspective view of the coil contained in the ceramic electronic component in Embodiment 2 based on this invention. 本発明に基づく実施の形態2におけるセラミック電子部品に含まれるコイルの部分平面図である。FIG. 3 is a partial plan view of a coil included in a ceramic electronic component according to a second embodiment of the present invention. 本発明に基づく実施の形態2におけるセラミック電子部品の斜視図である。It is a perspective view of the ceramic electronic component in Embodiment 2 based on this invention. 本発明に基づく実施の形態3におけるセラミック電子部品の部分断面図である。FIG. 7 is a partial cross-sectional view of a ceramic electronic component in Embodiment 3 based on the present invention. 本発明に基づく実施の形態3におけるセラミック電子部品を作製するために用いられる第1のセラミックグリーンシートの説明図である。FIG. 7 is an explanatory diagram of a first ceramic green sheet used for manufacturing a ceramic electronic component in Embodiment 3 based on the present invention. 本発明に基づく実施の形態3におけるセラミック電子部品を作製するために用いられる第2のセラミックグリーンシートの説明図である。FIG. 7 is an explanatory diagram of a second ceramic green sheet used for manufacturing a ceramic electronic component in Embodiment 3 based on the present invention.
 図面において示す寸法比は、必ずしも忠実に現実のとおりを表しているとは限らず、説明の便宜のために寸法比を誇張して示している場合がある。以下の説明において、上または下の概念に言及する際には、絶対的な上または下を意味するとは限らず、図示された姿勢の中での相対的な上または下を意味する場合がある。 The dimensional ratios shown in the drawings do not necessarily faithfully represent the reality, and the dimensional ratios may be exaggerated for convenience of explanation. In the following description, references to the concepts of top or bottom do not necessarily mean absolute top or bottom, but may mean relative top or bottom within the illustrated posture. .
 (実施の形態1)
 図1~図3を参照して、本発明に基づく実施の形態1におけるセラミック電子部品について説明する。本実施の形態におけるセラミック電子部品101の内部構造を透視した斜視図を図1に示す。
(Embodiment 1)
A ceramic electronic component according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG. 1 shows a perspective view of the internal structure of a ceramic electronic component 101 in this embodiment.
 セラミック電子部品101は、複数のセラミック層が第1の方向91に積層された構造を含む本体1を備える。本体1の内部にコイルが形成されている。このコイルの一部を取り出したところを図2に示す。このコイルの一部が見える状態でのセラミック電子部品101の部分断面図を図3に示す。図2および図3に示したものは、コイルの1巻きのうちの一部に相当する。 The ceramic electronic component 101 includes a main body 1 including a structure in which a plurality of ceramic layers are stacked in a first direction 91. A coil is formed inside the main body 1. Figure 2 shows a portion of this coil taken out. FIG. 3 shows a partial cross-sectional view of the ceramic electronic component 101 in which a portion of this coil is visible. What is shown in FIGS. 2 and 3 corresponds to a portion of one turn of the coil.
 このコイルは、本体1の内部において第1の方向91に垂直な第2の方向92に互いに離隔して第1の方向91に延在するように配置された第1導体ビア41および第2導体ビア42を含む。さらに、このコイルは、第1導体パターン51と、第2導体パターン52とを含む。第1導体パターン51および第2導体パターン52の各々の少なくとも一部は、本体1の内部において第2の方向92に延在する線状である。第1導体ビア41と第2導体ビア42とは、第1導体パターン51によって接続されている。第1導体ビア41と第2導体ビア42とは、第2導体パターン52によっても接続されている。第1導体パターン51のうち第1導体ビア41と第2導体ビア42との間に存在する区間の途中と、第2導体パターン52のうち第1導体ビア41と第2導体ビア42との間に存在する区間の途中とは、1以上の中間導体ビア4によって接続されている。 This coil includes a first conductor via 41 and a second conductor arranged in a second direction 92 perpendicular to the first direction 91 inside the main body 1 so as to be spaced apart from each other and extending in the first direction 91. Via 42 is included. Furthermore, this coil includes a first conductor pattern 51 and a second conductor pattern 52. At least a portion of each of the first conductor pattern 51 and the second conductor pattern 52 has a linear shape extending in the second direction 92 inside the main body 1 . The first conductor via 41 and the second conductor via 42 are connected by a first conductor pattern 51. The first conductive via 41 and the second conductive via 42 are also connected by a second conductive pattern 52. In the middle of the section existing between the first conductor via 41 and the second conductor via 42 in the first conductor pattern 51 and between the first conductor via 41 and the second conductor via 42 in the second conductor pattern 52 The intermediate conductor vias 4 are connected to the middle of the section existing in the section.
 なお、このコイルの巻回軸の方向は、第3の方向93である。第3の方向93は、第1の方向91および第2の方向92のいずれに対しても垂直をなす方向である。 Note that the direction of the winding axis of this coil is the third direction 93. The third direction 93 is a direction perpendicular to both the first direction 91 and the second direction 92.
 本実施の形態では、第1導体パターン51のうち第1導体ビア41と第2導体ビア42との間に存在する区間の途中と、第2導体パターン52のうち第1導体ビア41と第2導体ビア42との間に存在する区間の途中とが、1以上の中間導体ビア4によって接続されているので、積層体がプレスされたときにも第1導体パターン51および第2導体パターン52の中間部分が潰れることを抑制することができる。すなわち、コイルの一部をなす配線の潰れを抑制することができる。これにより、Q値の劣化を抑制することができる。また、コイル結合ばらつきによる特性ばらつきの低減も図ることができる。 In this embodiment, in the middle of the section between the first conductor via 41 and the second conductor via 42 in the first conductor pattern 51, and in the section between the first conductor via 41 and the second conductor via in the second conductor pattern 52, Since the middle of the section existing between the conductor via 42 is connected by one or more intermediate conductor vias 4, the first conductor pattern 51 and the second conductor pattern 52 are connected even when the laminate is pressed. It is possible to prevent the intermediate portion from collapsing. That is, it is possible to suppress collapse of the wiring that forms part of the coil. Thereby, deterioration of the Q value can be suppressed. Furthermore, it is possible to reduce characteristic variations due to coil coupling variations.
 なお、第1の方向91から見たとき、第1導体パターン51と第2導体パターン52とは、同じ形状で同じサイズであることが好ましい。この構成を採用することにより、設計が容易となる。 Note that, when viewed from the first direction 91, it is preferable that the first conductor pattern 51 and the second conductor pattern 52 have the same shape and the same size. By adopting this configuration, design becomes easy.
 (製造方法)
 セラミック電子部品101を得るための製造方法について、説明する。
(Production method)
A manufacturing method for obtaining the ceramic electronic component 101 will be explained.
 まず、図4に示すように、セラミックグリーンシート21を用意する。セラミックグリーンシート21は、キャリアフィルム20に保持されている。図4では、キャリアフィルム20の下面を覆うようにセラミックグリーンシート21が配置されている。 First, as shown in FIG. 4, a ceramic green sheet 21 is prepared. Ceramic green sheet 21 is held by carrier film 20. In FIG. 4, a ceramic green sheet 21 is arranged to cover the lower surface of the carrier film 20.
 次に、図5に示すように、貫通孔22を形成する。貫通孔22は、キャリアフィルム20とセラミックグリーンシート21とを一括して貫通するように形成される。貫通孔22は、たとえばレーザ加工によって形成することができる。図6に示すように、貫通孔22に導電性ペースト23を充填し、乾燥させる。 Next, as shown in FIG. 5, a through hole 22 is formed. The through hole 22 is formed so as to penetrate the carrier film 20 and the ceramic green sheet 21 all at once. The through hole 22 can be formed by laser processing, for example. As shown in FIG. 6, the through holes 22 are filled with conductive paste 23 and dried.
 次に、図7に示すように、セラミックグリーンシート21の表面に必要に応じて導体パターン24を形成する。セラミックグリーンシート21の表面に対して、たとえば導電性ペーストをスクリーン印刷することによって、導体パターン24を形成することができる。導体パターン24の形成は、他の方法によってもよい。導体パターン24は、のちに、第1導体パターン51、第2導体パターン52、導体パターン5,8などになるものである。 Next, as shown in FIG. 7, a conductor pattern 24 is formed on the surface of the ceramic green sheet 21 as necessary. The conductive pattern 24 can be formed on the surface of the ceramic green sheet 21 by, for example, screen printing a conductive paste. The conductor pattern 24 may be formed by other methods. The conductor pattern 24 will later become a first conductor pattern 51, a second conductor pattern 52, conductor patterns 5, 8, etc.
 セラミックグリーンシート21をキャリアフィルム20から剥がし、積層する。複数のセラミックグリーンシート21が積層されることによって、図8に示すように積層体が形成される。複数のセラミックグリーンシート21は、複数の絶縁層2となる。複数のセラミック電子部品に相当する集合基板として、各工程が進められている。図8では、左右にも積層体が延在しているが、中央には1つのセラミック電子部品101に対応する部分が表示されている。図8では、個別の製品のサイズに切り分ける前の集合基板の状態を示している。図8では、切断面13も示されている。切断面13は、のちに切断される予定の面である。 The ceramic green sheet 21 is peeled off from the carrier film 20 and laminated. By stacking a plurality of ceramic green sheets 21, a laminate is formed as shown in FIG. 8. The plurality of ceramic green sheets 21 become the plurality of insulating layers 2. Each process is progressing as a collective substrate corresponding to multiple ceramic electronic components. In FIG. 8, the laminate extends to the left and right, but a portion corresponding to one ceramic electronic component 101 is displayed in the center. FIG. 8 shows the state of the collective substrate before it is cut into individual product sizes. In FIG. 8, the cut surface 13 is also shown. The cut surface 13 is a surface to be cut later.
 図8に示すように、第1導体ビア41の下端は導体パターン8に接続されている。第1導体ビア41の上端は、第1導体パターン51に接続されている。第2導体パターン52は、第1導体ビア41の途中に接続されている。第2導体ビア42の上端は、第1導体パターン51に接続されている。第2導体パターン52は、第2導体ビア42の途中に接続されている。第2導体ビア42の下端は、導体パターン5に接続されている。導体パターン5は、導体パターン8より下側に配置されている。導体パターン5と導体パターン6とは導体ビア7によって接続されている。導体パターン6は、積層体の下面に配置されており、外部に露出している。 As shown in FIG. 8, the lower end of the first conductor via 41 is connected to the conductor pattern 8. The upper end of the first conductor via 41 is connected to the first conductor pattern 51. The second conductor pattern 52 is connected to the middle of the first conductor via 41 . The upper end of the second conductor via 42 is connected to the first conductor pattern 51. The second conductor pattern 52 is connected to the middle of the second conductor via 42 . The lower end of the second conductor via 42 is connected to the conductor pattern 5. The conductor pattern 5 is arranged below the conductor pattern 8. The conductor pattern 5 and the conductor pattern 6 are connected by a conductor via 7. The conductor pattern 6 is arranged on the lower surface of the laminate and exposed to the outside.
 図8に示していた積層体に対して、プレス加工を施す。図9に示すように、下面に配置されていた導体パターン6が最下層の絶縁層2の中にめり込む。 Pressing is performed on the laminate shown in FIG. 8. As shown in FIG. 9, the conductor pattern 6 disposed on the lower surface sinks into the lowermost insulating layer 2.
 ここまでの工程は、図10に示すように集合基板11の状態で行なったものである。集合基板11は、粘着性を有するキャリアシート25によって保持される。集合基板11に対して、切断面13において切断を行なう。切断はたとえばダイシングによって行なってもよい。集合基板11を切断し、キャリアシート25から取り外した結果、図11に示すように複数の素体12が得られる。この素体12に対してバレル研磨を行なう。その結果、図12に示すように素体12の角が丸くなる。 The steps up to this point were carried out with the assembled substrate 11 as shown in FIG. The collective substrate 11 is held by a carrier sheet 25 having adhesive properties. The aggregate substrate 11 is cut at the cutting surface 13 . The cutting may be performed, for example, by dicing. As a result of cutting the collective substrate 11 and removing it from the carrier sheet 25, a plurality of element bodies 12 are obtained as shown in FIG. This element body 12 is subjected to barrel polishing. As a result, the corners of the element body 12 become rounded as shown in FIG.
 さらにめっき処理を行なう。その結果、図13に示すように、下面にある導体パターン6を覆うようにめっき膜10が形成される。めっき膜10は、たとえば2層構造となっている。ここで示す例では、めっき膜10は、第1めっき膜10aと第2めっき膜10bとを含む。 Further plating treatment is performed. As a result, as shown in FIG. 13, a plating film 10 is formed to cover the conductor pattern 6 on the lower surface. The plating film 10 has, for example, a two-layer structure. In the example shown here, the plating film 10 includes a first plating film 10a and a second plating film 10b.
 なお、プレス加工において、第1導体パターン51および第2導体パターン52は、押し潰されて変形し、図14に示すような状態になる。第1導体パターン51および第2導体パターン52は、第1導体ビア41、中間導体ビア4および第2導体ビア42の近傍においては、あまり大きく変形しないが、これらから遠い箇所においては大きく変形する。第1導体ビア41と中間導体ビア4との間の中央付近では、第1導体パターン51および第2導体パターン52はそれぞれ局所的に薄くなり、第1導体パターン51と第2導体パターン52との間の距離はやや狭くなる。中間導体ビア4と第2導体ビア42との間の中央付近においても同様である。第1導体ビア41、中間導体ビア4および第2導体ビア42の近傍では、これらの導体ビアの剛性によって変形量は小さく抑えられるので、距離Aと距離Bはほぼ等しい状態となっている。第1導体パターン51および第2導体パターン52の中央部における第1導体パターン51と第2導体パターン52との間の距離Bは、第1導体パターン51および第2導体パターン52の両端部における第1導体パターン51と第2導体パターン52との間の距離Aにほぼ等しい。図14では、説明の便宜のため、1つの中間導体ビア4のみが配置されている例を示して説明した。 In addition, in the press working, the first conductor pattern 51 and the second conductor pattern 52 are crushed and deformed to a state as shown in FIG. 14. The first conductor pattern 51 and the second conductor pattern 52 do not deform much in the vicinity of the first conductor via 41, intermediate conductor via 4, and second conductor via 42, but deform significantly in locations far from these. Near the center between the first conductor via 41 and the intermediate conductor via 4, the first conductor pattern 51 and the second conductor pattern 52 each become locally thinner, and the difference between the first conductor pattern 51 and the second conductor pattern 52 becomes thinner. The distance between them is a little narrower. The same applies to the vicinity of the center between the intermediate conductor via 4 and the second conductor via 42. In the vicinity of the first conductor via 41, the intermediate conductor via 4, and the second conductor via 42, the amount of deformation is kept small by the rigidity of these conductor vias, so the distance A and the distance B are approximately equal. The distance B between the first conductor pattern 51 and the second conductor pattern 52 at the center of the first conductor pattern 51 and the second conductor pattern 52 is It is approximately equal to the distance A between the first conductor pattern 51 and the second conductor pattern 52. In FIG. 14, for convenience of explanation, an example in which only one intermediate conductor via 4 is arranged has been described.
 図15~図17に示すように、1以上の中間導体ビア4のうち少なくとも1つは、第1導体パターン51のうち第1導体ビア41と第2導体ビア42との間に存在する区間の中央に接続されていることが好ましい。図15では、1つの中間導体ビア4を備える例、図16では、3つの中間導体ビア4を備える例、図17では、5つの中間導体ビア4を備える例を示す。中間導体ビア4の数が多くなればなるほど、剛性が増し、プレス加工の際に、第1導体パターン51および第2導体パターン52が変形しにくくなるので好ましい。図15~図17に示したいずれの例においても、1以上の中間導体ビア4のうち少なくとも1つは、第1導体パターン51のうち第1導体ビア41と第2導体ビア42との間に存在する区間の中央に接続されている。 As shown in FIGS. 15 to 17, at least one of the one or more intermediate conductor vias 4 is located in a section of the first conductor pattern 51 that exists between the first conductor via 41 and the second conductor via 42. Preferably, it is centrally connected. 15 shows an example with one intermediate conductor via 4, FIG. 16 shows an example with three intermediate conductor vias 4, and FIG. 17 shows an example with five intermediate conductor vias 4. It is preferable that the number of intermediate conductor vias 4 increases because the rigidity increases and the first conductor pattern 51 and the second conductor pattern 52 become less likely to deform during press working. In any of the examples shown in FIGS. 15 to 17, at least one of the one or more intermediate conductor vias 4 is located between the first conductor via 41 and the second conductor via 42 in the first conductor pattern 51. Connected to the center of the existing section.
 図15~図17に示したように、1以上の中間導体ビアは、第1導体ビア41と第2導体ビア42との間の区間を等分するように配置されていることが好ましい。このように配置されていることにより、プレス加工時に作用する力がなるべく均等に分散されるので、効率良く変形を防止することができる。 As shown in FIGS. 15 to 17, one or more intermediate conductor vias are preferably arranged so as to equally divide the section between the first conductor via 41 and the second conductor via 42. By arranging them in this manner, the force acting during press working is distributed as evenly as possible, so that deformation can be efficiently prevented.
 (実施の形態2)
 図18~図20を参照して、本発明に基づく実施の形態2におけるセラミック電子部品について説明する。本実施の形態におけるセラミック電子部品102に含まれるコイルの一部を図18に示す。図18に示した部分の平面図すなわち第1の方向91から見たところを図19に示す。セラミック電子部品102の内部構造を透視した斜視図を図20に示す。図18および図19に示すように、中間導体ビア4の径は、第1導体ビア41および第2導体ビア42の径に比べて大きくなっている。
(Embodiment 2)
A ceramic electronic component according to a second embodiment of the present invention will be described with reference to FIGS. 18 to 20. FIG. 18 shows a part of the coil included in the ceramic electronic component 102 in this embodiment. FIG. 19 shows a plan view of the portion shown in FIG. 18, that is, a view from the first direction 91. FIG. 20 shows a perspective view of the internal structure of the ceramic electronic component 102. As shown in FIGS. 18 and 19, the diameter of the intermediate conductor via 4 is larger than the diameters of the first conductor via 41 and the second conductor via 42.
 第1の方向91から見たとき、1以上の中間導体ビア4の各々は、第1導体パターン51および第2導体パターン52のいずれに対しても幅方向にはみ出さないように配置されている。本実施の形態では、中間導体ビア4の数が1つであるが、2つ以上の中間導体ビア4が設けられている場合であっても同様である。 When viewed from the first direction 91, each of the one or more intermediate conductor vias 4 is arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52. . In this embodiment, the number of intermediate conductor vias 4 is one, but the same applies even if two or more intermediate conductor vias 4 are provided.
 本実施の形態においても、実施の形態1で述べたような効果を得ることができる。一般的に、中間導体ビア4が第1導体パターン51または第2導体パターン52から幅方向にはみ出すと、図20における距離Dが短くなってしまう。距離Dは、セラミック電子部品102に含まれるコイルの1つの巻きと隣りの巻きとの間の距離である。距離Dが変わってしまうと、コイルとしての特性が変動してしまう。しかし、本実施の形態では、1以上の中間導体ビア4の各々は、第1導体パターン51および第2導体パターン52のいずれに対しても幅方向にはみ出さないように配置されているので、このような事態を避けることができる。 Also in this embodiment, the effects described in Embodiment 1 can be obtained. Generally, when the intermediate conductor via 4 protrudes from the first conductor pattern 51 or the second conductor pattern 52 in the width direction, the distance D in FIG. 20 becomes shorter. Distance D is the distance between one turn and an adjacent turn of a coil included in ceramic electronic component 102 . If the distance D changes, the characteristics of the coil will change. However, in the present embodiment, each of the one or more intermediate conductor vias 4 is arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52. This kind of situation can be avoided.
 なお、ここでは、中間導体ビア4の形状が円柱である例を示したが、中間導体ビア4の形状は円柱とは限らない。中間導体ビア4の形状は、たとえば楕円柱、四角柱などであってもよい。これらの形状である場合であっても、第1導体パターン51および第2導体パターン52のいずれに対しても幅方向にはみ出さないように配置されていることが好ましい。 Although an example in which the shape of the intermediate conductor via 4 is a cylinder is shown here, the shape of the intermediate conductor via 4 is not limited to a cylinder. The shape of the intermediate conductor via 4 may be, for example, an elliptical cylinder or a square cylinder. Even in the case of these shapes, it is preferable that they are arranged so as not to protrude in the width direction from either the first conductor pattern 51 or the second conductor pattern 52.
 (実施の形態3)
 図21~図23を参照して、本発明に基づく実施の形態3におけるセラミック電子部品について説明する。本実施の形態におけるセラミック電子部品に含まれるコイルの一部を図21に示す。
(Embodiment 3)
A ceramic electronic component according to a third embodiment of the present invention will be described with reference to FIGS. 21 to 23. FIG. 21 shows a part of the coil included in the ceramic electronic component in this embodiment.
 第1導体ビア41は、部分41aと部分41bとを含む。第2導体ビア42は、部分42aと部分42bとを含む。第1導体パターン51と第2導体パターン52との間には、3つの中間導体ビア4が配置されている。ここでは一例として中間導体ビア4の数は3つであるが、中間導体ビア4の数はこれに限らない。1以上の中間導体ビア4が配置されていればよい。 The first conductor via 41 includes a portion 41a and a portion 41b. The second conductor via 42 includes a portion 42a and a portion 42b. Three intermediate conductor vias 4 are arranged between the first conductor pattern 51 and the second conductor pattern 52. Here, as an example, the number of intermediate conductor vias 4 is three, but the number of intermediate conductor vias 4 is not limited to this. It is sufficient that one or more intermediate conductor vias 4 are arranged.
 1以上の中間導体ビア4に含まれるポアの比率は、第1導体ビア41および第2導体ビア42のうち、第1導体パターン51と第2導体パターン52との間にある部分以外の部分におけるポアの比率に比べて小さい。すなわち、中間導体ビア4に含まれるポアの比率は、部分41aおよび部分42aに含まれるポアの比率に比べて小さい。ポアとは空隙である。これらの空隙は、導体ビアを形成するために貫通孔22に充填される導電性ペースト23に含まれる樹脂成分に由来して形成される。樹脂成分は、導電性ペースト23の焼成時の収縮率を、周辺のセラミックの収縮率に近づけるために意図的に混入されるものである。導電性ペースト23に含まれる樹脂成分が少ない場合には、周辺のセラミックに比べて収縮率の差が大きくなるので、クラックが発生するおそれがあるが、本実施の形態では、1以上の中間導体ビア4を形成するための導電性ペースト23に含まれる樹脂成分をあえて小さくしている。その結果、1以上の中間導体ビア4に含まれるポアの比率が上述のように小さくなっている。 The ratio of pores included in one or more intermediate conductor vias 4 is determined by the ratio of pores in the first conductor via 41 and the second conductor via 42 other than the portion between the first conductor pattern 51 and the second conductor pattern 52. Small compared to the pore ratio. That is, the ratio of pores included in intermediate conductor via 4 is smaller than the ratio of pores included in portions 41a and 42a. A pore is a void. These voids are formed due to the resin component contained in the conductive paste 23 that is filled into the through hole 22 to form the conductive via. The resin component is intentionally mixed in order to bring the shrinkage rate of the conductive paste 23 during firing closer to that of the surrounding ceramic. If the resin component contained in the conductive paste 23 is small, the difference in shrinkage rate will be large compared to the surrounding ceramic, so cracks may occur. However, in this embodiment, one or more intermediate conductors The resin component contained in the conductive paste 23 for forming the via 4 is deliberately made small. As a result, the ratio of pores included in one or more intermediate conductor vias 4 is reduced as described above.
 部分41aおよび部分42aを形成するためのセラミックグリーンシート21に形成された貫通孔22に導電性ペースト23を充填する際には図22に示すように、樹脂成分26が多い導電性ペースト23が用いられる。部分41bおよび部分42bを形成するためのセラミックグリーンシート21に形成された貫通孔22に導電性ペースト23を充填する際には図23に示すように、樹脂成分26が少ない導電性ペースト23が用いられる。図22および図23においては、セラミックグリーンシート21がキャリアフィルム20に保持された状態が示されている。実際には、セラミックグリーンシート21はキャリアフィルム20から剥がされ、複数のセラミックグリーンシート21が積み重ねられる。 When filling the conductive paste 23 into the through holes 22 formed in the ceramic green sheet 21 for forming the portions 41a and 42a, the conductive paste 23 containing a large amount of resin component 26 is used, as shown in FIG. It will be done. When filling the conductive paste 23 into the through holes 22 formed in the ceramic green sheet 21 to form the portions 41b and 42b, the conductive paste 23 containing less resin component 26 is used, as shown in FIG. It will be done. 22 and 23 show a state in which the ceramic green sheet 21 is held by the carrier film 20. Actually, the ceramic green sheet 21 is peeled off from the carrier film 20, and a plurality of ceramic green sheets 21 are stacked.
 本実施の形態においても、実施の形態1で述べたような効果を得ることができる。さらに、本実施の形態では、1以上の中間導体ビア4でポアの比率が小さくなっているということは、焼成時に収縮した度合いが小さいということであり、これはプレス加工時の変形の小ささにもつながる。1以上の中間導体ビア4が十分な剛性を以て突っ張ることができるので、コイルの形状を安定させることができる。 Also in this embodiment, the effects described in Embodiment 1 can be obtained. Furthermore, in this embodiment, the fact that the pore ratio is small in one or more intermediate conductor vias 4 means that the degree of shrinkage during firing is small, and this is due to the small deformation during press working. It also leads to Since one or more intermediate conductor vias 4 can be stretched with sufficient rigidity, the shape of the coil can be stabilized.
 なお、これまでに述べた各実施の形態では、本体に含まれるコイルの巻回軸が、積層される絶縁層の主面に平行、すなわち、積層方向に垂直であるようなセラミック電子部品を例に説明してきたが、本体に含まれるコイルの巻回軸の方向はこれに限らない。本体に含まれるコイルの巻回軸が、積層方向に平行、すなわち、積層される絶縁層の主面に垂直であるようなセラミック電子部品においても、上記各実施の形態で述べた事項はあてはまる。 In each of the embodiments described so far, a ceramic electronic component is used in which the winding axis of the coil included in the main body is parallel to the main surface of the laminated insulating layers, that is, perpendicular to the lamination direction. However, the direction of the winding axis of the coil included in the main body is not limited to this. The matters described in each of the above embodiments also apply to a ceramic electronic component in which the winding axis of the coil included in the main body is parallel to the lamination direction, that is, perpendicular to the main surface of the laminated insulating layers.
 なお、上記実施の形態のうち複数を適宜組み合わせて採用してもよい。
[付記1]
 複数のセラミック層が第1の方向に積層された構造を含む本体を備え、
 前記本体の内部にコイルが形成されており、
 前記コイルは、前記本体の内部において前記第1の方向に垂直な第2の方向に互いに離隔して前記第1の方向に延在するように配置された第1導体ビアおよび第2導体ビアと、第1導体パターンと、第2導体パターンとを含み、
 前記第1導体パターンおよび前記第2導体パターンの各々の少なくとも一部は、前記本体の内部において前記第2の方向に延在する線状であり、
 前記第1導体ビアと前記第2導体ビアとは、前記第1導体パターンによって接続されており、
 前記第1導体ビアと前記第2導体ビアとは、前記第2導体パターンによっても接続されており、
 前記第1導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の途中と、前記第2導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の途中とは、1以上の中間導体ビアによって接続されている、セラミック電子部品。
[付記2]
 前記1以上の中間導体ビアのうち少なくとも1つは、前記第1導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の中央に接続されている、付記1に記載のセラミック電子部品。
[付記3]
 前記第1の方向から見たとき、前記1以上の中間導体ビアの各々は、前記第1導体パターンおよび前記第2導体パターンのいずれに対しても幅方向にはみ出さないように配置されている、付記1または2に記載のセラミック電子部品。
[付記4]
 前記1以上の中間導体ビアは、前記第1導体ビアと前記第2導体ビアとの間の区間を等分するように配置されている、付記1から3のいずれか1項に記載のセラミック電子部品。
[付記5]
 前記1以上の中間導体ビアに含まれるポアの比率は、前記第1導体ビアおよび前記第2導体ビアのうち、前記第1導体パターンと前記第2導体パターンとの間にある部分以外の部分におけるポアの比率に比べて小さい、付記1から4のいずれか1項に記載のセラミック電子部品。
[付記6]
 前記第1の方向から見たとき、前記第1導体パターンと前記第2導体パターンとは、同じ形状で同じサイズである、付記1から5のいずれか1項に記載のセラミック電子部品。
Note that a combination of a plurality of the above embodiments may be adopted as appropriate.
[Additional note 1]
a body including a structure in which a plurality of ceramic layers are stacked in a first direction;
A coil is formed inside the main body,
The coil includes a first conductor via and a second conductor via arranged in a second direction perpendicular to the first direction inside the main body so as to be spaced apart from each other and extending in the first direction. , including a first conductor pattern and a second conductor pattern,
At least a portion of each of the first conductor pattern and the second conductor pattern is linear extending in the second direction inside the main body,
The first conductor via and the second conductor via are connected by the first conductor pattern,
The first conductor via and the second conductor via are also connected by the second conductor pattern,
In the middle of a section of the first conductor pattern that exists between the first conductor via and the second conductor via, and in the second conductor pattern between the first conductor via and the second conductor via. A ceramic electronic component that is connected to the middle of the section by one or more intermediate conductor vias.
[Additional note 2]
At least one of the one or more intermediate conductor vias is connected to the center of a section of the first conductor pattern that exists between the first conductor via and the second conductor via, Ceramic electronic components listed.
[Additional note 3]
When viewed from the first direction, each of the one or more intermediate conductor vias is arranged so as not to protrude in the width direction from either the first conductor pattern or the second conductor pattern. , the ceramic electronic component according to appendix 1 or 2.
[Additional note 4]
The ceramic electronic according to any one of Supplementary Notes 1 to 3, wherein the one or more intermediate conductor vias are arranged so as to equally divide the section between the first conductor via and the second conductor via. parts.
[Additional note 5]
The ratio of pores included in the one or more intermediate conductor vias is determined by the ratio of pores in the first conductor via and the second conductor via in a portion other than the portion between the first conductor pattern and the second conductor pattern. The ceramic electronic component according to any one of Supplementary Notes 1 to 4, which is smaller than the pore ratio.
[Additional note 6]
The ceramic electronic component according to any one of Supplementary Notes 1 to 5, wherein the first conductor pattern and the second conductor pattern have the same shape and the same size when viewed from the first direction.
 なお、今回開示した上記実施の形態はすべての点で例示であって制限的なものではない。本発明の範囲は請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更を含むものである。 Note that the above-described embodiments disclosed herein are illustrative in all respects and are not restrictive. The scope of the present invention is indicated by the claims, and includes meanings equivalent to the claims and all changes within the range.
 1 本体、2 絶縁層、4 中間導体ビア、5,6,8 導体パターン、7 導体ビア、10 めっき膜、10a 第1めっき膜、10b 第2めっき膜、11 集合基板、12 素体、13 切断面、20 キャリアフィルム、21 セラミックグリーンシート、22 貫通孔、23 導電性ペースト、24 導体パターン、25 キャリアシート、26 樹脂成分、41 第1導体ビア、41a,41b 部分、42 第2導体ビア、42a,42b 部分、51 第1導体パターン、52 第2導体パターン、91 第1の方向、92 第2の方向、93 第3の方向、101,102 セラミック電子部品。 1 Main body, 2 Insulating layer, 4 Intermediate conductor via, 5, 6, 8 Conductor pattern, 7 Conductor via, 10 Plating film, 10a First plating film, 10b Second plating film, 11 Collective substrate, 12 Element body, 13 Cutting surface, 20 carrier film, 21 ceramic green sheet, 22 through hole, 23 conductive paste, 24 conductor pattern, 25 carrier sheet, 26 resin component, 41 first conductor via, 41a, 41b portion, 42 second conductor via, 42a , 42b part, 51 first conductor pattern, 52 second conductor pattern, 91 first direction, 92 second direction, 93 third direction, 101, 102 ceramic electronic component.

Claims (6)

  1.  複数のセラミック層が第1の方向に積層された構造を含む本体を備え、
     前記本体の内部にコイルが形成されており、
     前記コイルは、前記本体の内部において前記第1の方向に垂直な第2の方向に互いに離隔して前記第1の方向に延在するように配置された第1導体ビアおよび第2導体ビアと、第1導体パターンと、第2導体パターンとを含み、
     前記第1導体パターンおよび前記第2導体パターンの各々の少なくとも一部は、前記本体の内部において前記第2の方向に延在する線状であり、
     前記第1導体ビアと前記第2導体ビアとは、前記第1導体パターンによって接続されており、
     前記第1導体ビアと前記第2導体ビアとは、前記第2導体パターンによっても接続されており、
     前記第1導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の途中と、前記第2導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の途中とは、1以上の中間導体ビアによって接続されている、セラミック電子部品。
    a body including a structure in which a plurality of ceramic layers are stacked in a first direction;
    A coil is formed inside the main body,
    The coil includes a first conductor via and a second conductor via arranged in a second direction perpendicular to the first direction inside the main body so as to be spaced apart from each other and extending in the first direction. , including a first conductor pattern and a second conductor pattern,
    At least a portion of each of the first conductor pattern and the second conductor pattern is linear extending in the second direction inside the main body,
    The first conductor via and the second conductor via are connected by the first conductor pattern,
    The first conductor via and the second conductor via are also connected by the second conductor pattern,
    In the middle of a section of the first conductor pattern that exists between the first conductor via and the second conductor via, and in the second conductor pattern between the first conductor via and the second conductor via. A ceramic electronic component that is connected to the middle of the section by one or more intermediate conductor vias.
  2.  前記1以上の中間導体ビアのうち少なくとも1つは、前記第1導体パターンのうち前記第1導体ビアと前記第2導体ビアとの間に存在する区間の中央に接続されている、請求項1に記載のセラミック電子部品。 At least one of the one or more intermediate conductor vias is connected to the center of a section of the first conductor pattern that exists between the first conductor via and the second conductor via. Ceramic electronic components described in .
  3.  前記第1の方向から見たとき、前記1以上の中間導体ビアの各々は、前記第1導体パターンおよび前記第2導体パターンのいずれに対しても幅方向にはみ出さないように配置されている、請求項1または2に記載のセラミック電子部品。 When viewed from the first direction, each of the one or more intermediate conductor vias is arranged so as not to protrude in the width direction from either the first conductor pattern or the second conductor pattern. , The ceramic electronic component according to claim 1 or 2.
  4.  前記1以上の中間導体ビアは、前記第1導体ビアと前記第2導体ビアとの間の区間を等分するように配置されている、請求項1から3のいずれか1項に記載のセラミック電子部品。 The ceramic according to any one of claims 1 to 3, wherein the one or more intermediate conductor vias are arranged to equally divide a section between the first conductor via and the second conductor via. electronic components.
  5.  前記1以上の中間導体ビアに含まれるポアの比率は、前記第1導体ビアおよび前記第2導体ビアのうち、前記第1導体パターンと前記第2導体パターンとの間にある部分以外の部分におけるポアの比率に比べて小さい、請求項1から4のいずれか1項に記載のセラミック電子部品。 The ratio of pores included in the one or more intermediate conductor vias is determined by the ratio of pores in the first conductor via and the second conductor via in a portion other than the portion between the first conductor pattern and the second conductor pattern. The ceramic electronic component according to any one of claims 1 to 4, wherein the ceramic electronic component is small compared to the proportion of pores.
  6.  前記第1の方向から見たとき、前記第1導体パターンと前記第2導体パターンとは、同じ形状で同じサイズである、請求項1から5のいずれか1項に記載のセラミック電子部品。 The ceramic electronic component according to any one of claims 1 to 5, wherein the first conductor pattern and the second conductor pattern have the same shape and the same size when viewed from the first direction.
PCT/JP2023/013831 2022-04-04 2023-04-03 Ceramic electronic component WO2023195450A1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02256208A (en) * 1988-12-16 1990-10-17 Murata Mfg Co Ltd Laminated chip coil
JP2018050022A (en) * 2016-09-20 2018-03-29 サムソン エレクトロ−メカニックス カンパニーリミテッド. Coil electronic component

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02256208A (en) * 1988-12-16 1990-10-17 Murata Mfg Co Ltd Laminated chip coil
JP2018050022A (en) * 2016-09-20 2018-03-29 サムソン エレクトロ−メカニックス カンパニーリミテッド. Coil electronic component

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