WO2023189326A1

WO2023189326A1 - Non-volatile storage device, recording device, and recording method

Info

Publication number: WO2023189326A1
Application number: PCT/JP2023/008863
Authority: WO
Inventors: 勇雄加藤; 卓治前田
Original assignee: パナソニックＩｐマネジメント株式会社
Priority date: 2022-03-30
Filing date: 2023-03-08
Publication date: 2023-10-05

Abstract

This non-volatile storage device comprises: a memory; an interface unit for communicating with a recording device; and a memory control unit for recording data to the memory. The interface unit receives, from the recording device, a control command which includes a start command instructing speed-guaranteed recording, and a notification command relating to the guaranteed speed of continuous stream recording. The memory control unit sets an operation speed on the basis of the notification command included in the control command. After receiving the control command, the interface unit receives a data write command and data. The memory control unit records the received data to memory on the basis of the set operation speed and the data write command.

Description

Nonvolatile storage device, recording device, and recording method

The present disclosure relates to a nonvolatile storage device, a recording device, and a recording method.

Patent Document 1 discloses a technique that makes it possible to request a memory card to perform data recording with a guaranteed minimum recording speed.

Patent Document 1 discloses a procedure for reading and writing data between a host device and a memory card.

In Patent Document 1, the interface conforms to the PCI Express standard, and the protocol for accessing nonvolatile memory conforms to the NVMe standard.

Specifically, the imaging device that is the host device and the memory card are connected via a PCI Express interface, and the NVMe standard protocol is used to read data from/write data to the memory card. .

JP2020-177413A

When recording moving images continuously on a non-volatile storage device with a guaranteed minimum recording speed, the host device (recording device) that records the moving image data on the non-volatile storage device, and the moving image from the host device (recording device). The temperature of the nonvolatile storage device that stores data may rise and exceed the operating temperature range due to heat generated by both the nonvolatile storage device and the nonvolatile storage device that stores data. Therefore, there is a need for a technique to prevent the occurrence of events such as video recording not being able to be performed correctly or video recording stopping.

An object of the present disclosure is to provide a technique for suppressing a temperature rise in a nonvolatile storage device when data is recorded in the nonvolatile storage device with a guaranteed minimum recording speed.

A device according to an exemplary embodiment of the present disclosure is a nonvolatile storage device capable of recording data in a recording mode in which a minimum recording speed is guaranteed, the nonvolatile storage device being removable from the recording device. It is possible.

The nonvolatile storage device includes a memory, an interface unit that communicates with the recording device, and a memory control unit that records data in the memory.

The interface unit receives from the recording device a control command including a start command for instructing speed guaranteed recording and a notification command regarding guaranteed speed for continuous stream recording.

The memory control unit sets the operating speed based on the notification command included in the control command.

After receiving the control command, the interface section receives a data write command and data.

The memory control unit records the received data in the memory based on the set operating speed and the data write command.

Another device according to an exemplary embodiment of the present disclosure is a recording device that records data on a non-volatile storage device in a recording mode in which a minimum recording speed is guaranteed.

The recording device includes an interface section that communicates with the nonvolatile storage device, and a system control section.

The interface unit receives from the nonvolatile storage device a plurality of operating speed candidates at which the nonvolatile storage device can operate.

The system control unit selects one operation speed candidate from among the plurality of operation speed candidates as the guaranteed speed for continuous stream recording.

The interface unit transmits a control command including a start command for instructing speed guarantee recording and a notification command regarding the selected operation speed candidate to the nonvolatile storage device, and after transmitting the control command, Send data write commands and data.

A method according to an exemplary embodiment of the present disclosure is a recording method for recording data in a non-volatile storage device in a recording mode in which a minimum recording speed is guaranteed, the non-volatile storage device being removable from the recording device. It is.

The recording method is
receiving from the recording device a control command including a start command for instructing speed guaranteed recording and a notification command regarding guaranteed speed for continuous stream recording;
setting an operating speed based on the notification command included in the control command;
after receiving the control command, receiving a data write command and data;
The received data is recorded based on the set operating speed and the data write command.

When recording data with a guaranteed minimum recording speed on the nonvolatile storage device according to the present disclosure, information regarding the guaranteed speed is transmitted (presented) from the recording device to the nonvolatile storage device in advance. Then, the nonvolatile storage device shifts to an operation mode with the minimum performance necessary and sufficient to guarantee speed, and performs continuous data recording based on the subsequent data write command. This makes it possible to minimize heat generation during continuous recording operations.

Configuration diagram of storage system according to the present disclosure Configuration diagram of a storage system according to an exemplary embodiment Configuration diagram of a storage system according to an exemplary embodiment Diagram showing an overview of the configuration of the input/output stage circuit of a full-duplex interface Diagram showing an overview of the configuration of the input/output stage circuit of a half-duplex interface A diagram illustrating an example hardware configuration of a terminal portion of an exemplary memory card. Diagram showing the relationship between video speed class and interface speed mode in an SD memory card Diagram showing the relationship between capacity and card type in an SD memory card Diagram showing the relationship between video speed class and clock condition in SD memory cards Diagram showing the relationship between video speed class and data transfer rate in SD memory cards Diagram showing SDR and DDR data transfer methods Diagram showing the relationship between data transfer rate and clock frequency of UHS-II interface in SD memory card Diagram showing the relationship between SD memory card bus speed mode and maximum power consumption Diagram showing the relationship between SD memory card video speed class and power consumption limit Diagram showing the data structure of the SD memory card “CMD20” A diagram showing an example of a control command for transmitting (presenting) guaranteed speed information from a recording device to a nonvolatile storage device, developed by the inventors. Diagram showing an example of a command sequence during speed guaranteed recording on an SD memory card A diagram showing an example of a command sequence developed by the present inventors to realize transmission (presentation) of guaranteed speed information from a recording device to a nonvolatile storage device in an SD memory card. 8-bit DSPEC (stream ID), 4-bit "SCC" of "CMD20", and 3-bit "CNT/ID" are described in DSPEC (16 bits) of the data write command of the NVMe standard. Diagram showing that Diagram showing a specific example of parameters when assigning the function of "CMD20" to the NVMe standard data write command

Hereinafter, embodiments will be described in detail with reference to the drawings as appropriate. However, more detailed explanation than necessary may be omitted. For example, detailed explanations of well-known matters or redundant explanations of substantially the same configurations may be omitted. This is to avoid unnecessary redundancy in the following description and to facilitate understanding by those skilled in the art.

The inventors have provided the accompanying drawings and the following description in order for those skilled in the art to fully understand the present disclosure, and they are not intended to limit the subject matter recited in the claims. do not have.

[1. Storage system configuration]
FIG. 1 shows the configuration of a storage system 1 according to the present disclosure. The storage system 1 includes a recording device 10, which is a host device, and a nonvolatile storage device 20. In the storage system 1, the recording device 10 can write data to the nonvolatile storage device 20, and can read data stored in the nonvolatile storage device 20.

For example, a storage system 1 having a PCIe/NVMe SSD as the nonvolatile storage device 20 and a PC as the recording device 10 can be considered. A PCIe/NVMe SSD is an SSD (Solid State Drive) that adopts the PCIe (PCI express) standard as a connection interface and the NVMe (Non-Volatile Memory Express) standard as a data transfer protocol. Another example is a storage system 1 that has an SD Express memory card as the nonvolatile storage device 20 and a video recording device as the recording device 10. The SD Express memory card is a memory card that has a PCIe interface added to the SD memory card that has a conventional connection interface. The conventional SD memory card connection interface and the PCIe interface are used exclusively. In other words, the SD Express memory card operates as an SD memory card when inserted into the SD memory card slot. On the other hand, when an SD Express memory card is installed in an SD Express compatible device having a PCIe interface, it is connected according to the PCIe standard, and data is exchanged using a protocol defined by the NVMe standard.

The recording device 10 includes a system control section 12, a buffer memory 14, and an interface section 16. These components are interconnected by a bus 11 and are capable of transmitting and receiving data.

The system control unit 12 is a controller composed of a semiconductor integrated circuit. The system control unit 12 controls the recording apparatus 10 as a whole. The system control unit 12 controls issuing (transmission) of commands to the nonvolatile storage device 20 via the interface unit 16, and controls responses from the nonvolatile storage device 20. The system control unit 12 also prepares data to be written to the nonvolatile storage device 20, specifically, stores data to be written to the nonvolatile storage device 20 in the buffer memory 14. The system control unit 12 processes data read from the nonvolatile storage device 20 and stored in the buffer memory 14 .

The buffer memory 14 temporarily stores data written to the nonvolatile storage device 20 and/or data read from the nonvolatile storage device 20.

The interface unit 16 is composed of a semiconductor integrated circuit, and communicates with the interface unit 26 of the nonvolatile memory device 20. Specifically, the interface unit 16 sends commands to the nonvolatile storage device 20, receives responses from the nonvolatile storage device 20, writes data to the nonvolatile storage device 20, and/or sends commands to the nonvolatile storage device 20. It is a general term for interfaces that send and receive data read from.

The nonvolatile storage device 20 includes a controller 22, a buffer memory 24, an interface section 26, a memory control section 28, and a nonvolatile memory 30. These components are interconnected by a bus 21 and are capable of transmitting and receiving data.

The controller 22 is composed of a semiconductor integrated circuit, and controls the overall operation of the nonvolatile memory device 20. The buffer memory 24 is a memory that temporarily stores data received from the recording device 10 and written to the nonvolatile memory 30 and/or data read from the nonvolatile memory 30 and transmitted to the recording device 10. .

The interface unit 26 is composed of a semiconductor integrated circuit, and communicates with the interface unit 16 of the recording device 10. Specifically, the interface unit 26 receives commands from the recording device 10 and transmits responses to the recording device 10. The interface unit 26 also transmits and receives data to be written and/or read data to and from the interface unit 16 of the recording device 10 . The interface unit 26 is a general term for interfaces that can perform these operations.

The memory control unit 28 is a semiconductor integrated circuit that controls writing data to the nonvolatile memory 30 and controlling reading data from the nonvolatile memory 30.

The nonvolatile memory 30 is a nonvolatile memory that can hold data even when it is not energized, and is, for example, a flash memory.

Next, a more specific example of the configuration of the storage system 1 will be described with reference to FIG. 2.

FIG. 2 shows the configuration of the storage system 2 according to the exemplary embodiment. The storage system 2 includes a video recording device 100 that is a host device, and an SD Express memory card 200 (hereinafter abbreviated as "memory card 200") that is a nonvolatile storage device. The video recording device 100 is, for example, a digital camera, a digital movie camera, or a drive recorder.

As described above, the memory card 200 is configured by adding a PCIe interface to an SD memory card that has a connection interface based on the conventional SD standard. Memory card 200 supports a conventional SD interface and can be used with conventional SD host devices. Furthermore, the memory card 200 employs a PCIe interface to meet the needs for high-speed, large-capacity storage, and has specifications compatible with the PCI Express standard. The specific hardware configuration of the memory card 200 will be described later.

The video recording device 100 includes an interface unit 102, a PCIe/NVMe driver 104, an SD driver 106, a file system 108, and application software 110. Among these, the PCIe/NVMe driver 104, the SD driver 106, the file system 108, and the application software 110 function as a software layer of the video recording device 100.

The interface unit 102 corresponds to an interface part in the hardware of the video recording device 100, for example, an SoC (System on Chip), which is a semiconductor product such as LSI or VLSI. The interface unit 102 includes a PCIe interface 102a, an SD host 102b, and a selector 102c.

The PCIe interface 102a is an interface for connecting in accordance with the PCIe standard. When transferring data, the PCIe interface 102a sends and receives data using a protocol compliant with the NVMe standard.

The SD host 102b is an interface for connecting in accordance with the SD standard. When transferring data, the SD host 102b sends and receives data using a protocol compliant with the SD standard. The selector 102c is a switch that realizes exclusive use of the PCIe interface 102a and the SD host 102b.

The memory card 200 includes a card controller 210 and a NAND flash memory 220.

The card controller 210 includes a CPU 212, a PCIe interface 214a, an SD interface 214b, a buffer memory 216, and a NAND control section 218.

The CPU 212 corresponds to the controller 22 in FIG. 1 and controls the overall operation of the memory card 200. The PCIe interface 214a is an interface for connecting in accordance with the PCIe standard. When transferring data, the PCIe interface 214a sends and receives data using a protocol compliant with the NVMe standard.

The SD interface 214b is an interface for connecting in accordance with the SD standard. When transferring data, the SD interface 214b sends and receives data using a protocol compliant with the SD standard.

The buffer memory 216 is a memory that temporarily stores data received from the video recording device 100 and written to the NAND flash memory 220 and/or data read from the NAND flash memory 220 and transmitted to the video recording device 100. It is.

The NAND control unit 218 controls writing data to and/or reading data from the NAND flash memory 220.

Next, the specific configuration of the PCIe interface 214a and the SD interface 214b of the memory card 200 will be described with reference to FIG. 6.

FIG. 6 shows an example of the hardware configuration regarding the terminal portion of the exemplary memory card 200. The memory card 200 has a terminal group 232 (terminal No. 1 to No. 9) which is a connection interface according to the SD standard, and a terminal group 234 (terminal No. 10 to No. 17) which is a connection interface according to the PCIe standard. are doing. The configuration example in FIG. 6 complies with the SD Express card standard (SD Ver. 7.0).

The data bus of the SD interface consists of 4 bits, and bit 0 (DAT0) of the data line is the terminal number. 7, Bit 1 (DAT1) is terminal No. 8, bit 2 (DAT2) is terminal No. 9, bit 3 (DAT3) is terminal No. It is assigned to 1.

The data bus of the PCIe interface consists of two sets of transmission lines using a differential transmission method, and the + signal of the Tx transmission line (host device output/card input) is connected to terminal No. 11. The - signal of the Tx transmission line (host device output/card input) is connected to terminal No. 12, + signal of Rx transmission line (host device input/card output) is connected to terminal No. 16, - signal of Rx transmission line (host device input/card output) is connected to terminal No. It is assigned to 15.

Note that according to the SD Express card standard, the transmission path for sending commands to the memory card, responses from the memory card, and writing and/or reading data to the memory card is connected to the terminal group 234 using the PCIe interface. The four signals assigned to the terminal group 232 are a PCIe reset signal called PERST#, a PCIe clock request signal called CLKREQ#, and a PCIe differential clock signal pair called REFCLK+/REFCLK-. terminal no. 1.Terminal No. 9.Terminal No. 16, Terminal No. 15, and is a standard that uses signals by switching between when operating with an SD interface and when operating with a PCIe interface.

Next, another more specific configuration example of the storage system 1 will be described with reference to FIG. 3.

FIG. 3 shows the configuration of the storage system 3 according to the exemplary embodiment. The storage system 3 includes a video recording device 100 that is a host device, and an SD memory card 200 (hereinafter abbreviated as “memory card 200”) that is a nonvolatile storage device. The video recording device 100 is, for example, a digital camera, a digital movie camera, or a drive recorder.

As described above, the memory card 200 is configured by adding a UHS-II interface specified by the SD memory card standard to an SD memory card having a connection interface according to the conventional SD standard. Memory card 200 supports a conventional SD interface and can be used with conventional SD host devices. Furthermore, the memory card 200 employs a UHS-II interface to meet the needs for high-speed, large-capacity storage. The specific hardware configuration of the memory card 200 will be described later.

The video recording device 100 includes an interface unit 102, a UHS-II driver 304, an SD driver 106, a file system 108, and application software 110. Of these, the UHS-II driver 304, the SD driver 106, the file system 108, and the application software 110 function as a software layer of the video recording device 100.

The interface unit 302 corresponds to an interface part in the hardware of the video recording device 100, for example, an SoC which is a semiconductor product such as LSI or VLSI. The interface unit 302 includes a UHS-II interface 302a, an SD host 302b, and a selector 302c.

The UHS-II interface 302a is an interface for connecting in accordance with the UHS-II Addendum of the SD memory card standard. When transferring data, the UHS-II interface 302a sends and receives data using a protocol that complies with the UHS-II Addendum of the SD memory card standard.

The SD host 302b is an interface for connecting in accordance with the SD standard. When transferring data, the SD host 302b sends and receives data using a protocol that complies with the SD standard. The selector 302c is a switch that realizes exclusive use with the UHS-II interface 302a and the SD host 302b.

The memory card 200 includes a card controller 210 and a NAND flash memory 220.

The card controller 210 includes a CPU 212, a UHS-II interface 314a, an SD interface 314b, a buffer memory 216, and a NAND control section 218.

The CPU 212 corresponds to the controller 22 in FIG. 1 and controls the overall operation of the memory card 200. The UHS-II interface 314a is an interface for connecting in accordance with the UHS-II Addendum of the SD memory card standard. When transferring data, the UHS-II interface 314a sends and receives data using a protocol that complies with the UHS-II Addendum of the SD memory card standard.

The SD interface 314b is an interface for connecting in accordance with the SD standard. When transferring data, the SD interface 314b sends and receives data using a protocol compliant with the SD standard.

Next, the specific configurations of the UHS-II interface 314a and the SD interface 314b of the memory card 200 will be described with reference to FIG.

FIG. 6 shows an example of the hardware configuration regarding the terminal portion of the exemplary memory card 200. The memory card 200 has a terminal group 232 (terminal No. 1 to No. 9) which is a connection interface according to the SD standard, and a terminal group 234 (terminal No. 10 to No. 9) which is a connection interface according to the UHS-II Addendum of the SD memory card standard. No. 17). The configuration example in FIG. 6 complies with the SD memory card standard (SD Ver. 4.0 or later).

The data bus of the UHS-II interface consists of two sets of transmission lines using a differential transmission method, and the + signal of transmission line 0 is connected to terminal No. 11, - signal of transmission line 0 is connected to terminal No. 12, + signal of transmission line 1 is terminal No. 16, Transmission line No. 1 - signal is terminal No. It is assigned to 15.

In addition, in the SD memory card standard, in the UHS-II interface, the transmission path for sending commands to the memory card, responses from the memory card, and writing and/or reading data to the memory card is a group of terminals. However, two signals that are a UHS-II differential clock signal pair called RCLK+/RCLK- are assigned to terminal No. 234 of terminal group 232. 7 and terminal no. 8, and the standard uses signals that are switched between when operating with the SD interface and when operating with the UHS-II interface.

When the UHS-II interface specifications were established in the SD memory card standard (SD Ver. 4.0), a new terminal group 234 was provided, and later, in the SD Express card standard (SD Ver. 7.0), the PCIe When the specifications to introduce the interface are formulated, the SD Ver. The terminal group 234 newly created for the UHS-II interface in 4.0 was used as is, and the signals of the PCIe interface were assigned.

When the memory card 200 in FIG. 6 is an SD Express card, the maximum transmission speed is 8 Gbit/s, and when it is a UHS-II card, the maximum transmission speed is about 6 Gbit/s.

[2. Speed guarantee of SD memory card standard]
In the SD memory card standard, when shooting and recording video, the purpose is to prevent interruptions in video recording due to fluctuations or decreases in recording speed, and to prevent the occurrence of "dropped frames" (dropped frames), where, for example, one frame of a video is not recorded. , specifications regarding minimum recording speed guarantee (hereinafter abbreviated as "speed guarantee") are defined.

The latest SD memory card speed guarantee specifications are called Video Speed Class (VSC), and "VSC6" is a class that guarantees a minimum recording speed of 6 MB/s, and "VSC10" is a class that guarantees a minimum recording speed of 10 MB/s. "VSC30" is a class that guarantees a minimum recording speed of 30 MB/s, "VSC60" is a class that guarantees a minimum recording speed of 60 MB/s, "VSC90" is a class that guarantees a minimum recording speed of 90 MB/s. This is a class that guarantees a minimum recording speed of seconds.

FIG. 7 shows the relationship between the interface speed mode between the host device (recording device) and the SD memory card, the video speed class, and the types of SD memory cards that support the video speed class.

In the HS mode (High Speed Mode) of the SD interface, VSC6 and VSC10 are supported, which means that a minimum recording speed of up to 10 megabytes/second (MB/s) can be guaranteed.

In the UHS-I mode of the SD interface, VSC6, VSC10, and VSC30 are supported, which means that a minimum recording speed of up to 30 megabytes/second (MB/s) can be guaranteed.

Furthermore, in the UHS-II mode using the UHS-II interface, VSC6, VSC10, VSC30, VSC60, and VSC90 are supported, which means that a minimum recording speed of up to 90 megabytes/second (MB/s) can be guaranteed.

As shown on the right side of FIG. 7, the video speed class is supported by SDHC cards, SDXC cards, and SDUC cards, and does not apply to SD cards.

Figure 8 shows the relationship between the types of SD memory cards and their memory capacities. Cards with capacities greater than 32 gigabytes and up to 2 terabytes, SDUC cards with capacities greater than 2 terabytes and up to 128 terabytes, and video speed class are supported on cards with capacities greater than 2 gigabytes.

FIG. 9 is a table showing the clock conditions for measuring the speed of each video speed class.

For example, in the case of VSC10, the clock frequency of the SD clock is 40 MHz in the HS mode of the SD interface, the clock frequency of the SD clock is 40 MHz in the UHS-I SDR25 mode of the SD interface, and the clock frequency of the SD clock is 40 MHz in the DDR50 mode, and the clock frequency of the SD clock is 40 MHz in the HS mode of the SD interface. In the SDR50 mode and the SDR104 mode, the guaranteed speed is measured when the clock frequency of the SD clock is 80 MHz.

In addition, in the case of VSC10, the reference clock (RCLK) is 35 MHz in PLL range A in FD (Full Duplex) mode of the UHS-II interface, 26 MHz in PLL range B in FD mode, and 26 MHz in PLL range B in FD mode. The guaranteed speed is measured with a reference clock of 35 MHz in PLL range A in half-duplex mode, and with a reference clock of 26 MHz in PLL range B in HD mode.

[3. UHS-II transmission method]
Here, the FD mode and HD mode of the UHS-II interface will be briefly explained with reference to the drawings.

Figure 4 is a schematic diagram of the configuration of the input/output stage circuit in a general FD interface of the differential transmission method.In order to make the characteristics of full-duplex communication easier to understand, the diagram is shown in a simplified manner, with particular attention to the transmission direction. It is.

The transmitting circuit 411 of the host device 100 sends commands and/or write data to nonvolatile memory from the host device 100 to the memory card 200, and the receiving circuit 421 of the memory card 200 sends commands sent from the host device 100. and/or receive write data to non-volatile memory.

FIG. 4 shows that transmission through an interface (transmission/reception function) consisting of a transmission circuit 411 of the host device 100 and a reception circuit 421 of the memory card 200 is unidirectional transmission from the host device 100 to the memory card 200. It shows.

The transmitting circuit 422 of the memory card 200 transmits a response to a command and/or read data from the non-volatile memory from the memory card 200 to the host device 100, and the receiving circuit 412 of the host device 100 transmits a response to the command and/or data read from the nonvolatile memory. A response to a command sent from the non-volatile memory and/or data read from the non-volatile memory is received.

FIG. 4 shows that the transmission by the interface (transmission/reception function) composed of the transmission circuit 422 of the memory card 200 and the reception circuit 412 of the host device 100 is unidirectional transmission from the memory card 200 to the host device 100. It shows.

The FD mode of the UHS-II interface is a mode in which the interface (transmission/reception function) composed of the transmitting circuit and the receiving circuit is always oriented in one direction.

Figure 5 is a schematic diagram of the configuration of the input/output stage circuit in a general HD interface using the differential transmission method.To make it easier to understand the characteristics of half-duplex communication, the diagram is shown in a simplified manner, paying particular attention to the transmission direction. It is a diagram.

The transmitting circuit 511 of the host device 100 sends commands and/or write data to nonvolatile memory from the host device 100 to the memory card 200, and the receiving circuit 521 of the memory card 200 sends commands sent from the host device 100. and/or receive write data to non-volatile memory.

The transmitting circuit 523 of the memory card 200 transmits a response to a command and/or read data from the nonvolatile memory from the memory card 200 to the host device 100, and the receiving circuit 513 of the host device 100 transmits a response to the command and/or data read from the nonvolatile memory. A response to a command sent from the non-volatile memory and/or data read from the non-volatile memory is received.

Up to this point, the configuration is similar to that of the input/output stage circuit in FIG. 4 described above, and the function is the same.

On the other hand, in the HD interface shown in FIG. 5, a receiving circuit 512 of the host device 100 is connected to a transmitting circuit 511 of the host device 100, and a receiving circuit 522 of the memory card 200 is connected to a receiving circuit 521 of the memory card. There is.

Further, the receiving circuit 524 of the memory card 200 is connected to the transmitting circuit 523 of the memory card 200, and the transmitting circuit 514 of the host device 100 is connected to the receiving circuit 513 of the host device 100.

The transmitting circuit 511 and receiving circuit 512 of the host device 100 operate exclusively, and the receiving circuit 521 and transmitting circuit 522 of the memory card 200 are also controlled to operate exclusively.

In addition, when operating the transmitting circuit 511 of the host device 100, the receiving circuit 521 of the memory card 200 is operated, and when operating the transmitting circuit 522 of the memory card 200, the receiving circuit 512 of the host device 100 is operated. controlled to operate.

Similarly, the transmitting circuit 523 and receiving circuit 524 of the memory card 200 operate exclusively, and the receiving circuit 513 and transmitting circuit 514 of the host device 100 are also controlled to operate exclusively.

In addition, when operating the transmitting circuit 523 of the memory card 200, the receiving circuit 513 of the host device 100 is operated, and when operating the transmitting circuit 514 of the host device 100, the receiving circuit 524 of the memory card 200 is operated. controlled to operate.

With the above-described configuration and control shown in FIG. 5, in the HD mode of the UHS-II interface, it is possible to operate by switching the direction of the transmission path.

Here, the SD memory card protocol of the SD memory card standard will be briefly explained using an example of writing data to an SD memory card.

When the host device issues (sends) a data write command to the SD memory card, a response to the data write command is sent back (sent) from the SD memory card to the host device. Therefore, write data to the nonvolatile memory is transmitted from the host device to the SD memory card.

Note that the host device cannot issue the next command until the write data transmission by one data write command issued (sent) from the host device to the SD memory card is completed.

Therefore, in the FD communication with the configuration shown in FIG. 4, while writing data is being sent by the data write command, data transmission by the interface (transmission/reception function) consisting of the transmission circuit 422 of the memory card 200 and the reception circuit 513 of the host device 100 is not possible. , nothing is done.

On the other hand, in the HD communication with the configuration shown in FIG. 5, while writing data is being sent by a data write command, data is not transmitted through the interface (transmission/reception function) consisting of the transmission circuit 511 of the host device 100 and the reception circuit 521 of the memory card 200. In addition, it is possible to simultaneously perform data transmission through an interface (transmission/reception function) consisting of the transmission circuit 514 of the host device 100 and the reception circuit 524 of the memory card 200, and write data from the host device 100 to the memory card 200. The transmission speed can be increased to twice that of FD communication with the configuration shown in FIG.

Next, PLL range A and PLL range B of the UHS-II interface will be briefly explained with reference to the drawings.

FIG. 12 shows the relationship between the PLL range of the UHS-II interface, the frequency of the reference clock (RCLK), the PLL multiplication rate, and the transmission speed (bit rate).

The frequency of the reference clock is variable, and its range is from 26 MHz to 52 MHz for both PLL range A and PLL range B.

On the other hand, the PLL multiplication rate is 15 times for PLL range A and 30 times for PLL range B, and the transmission speed (bit rate) is from 390 Mbit/s (= 26 MHz x 15) to 780 Mbit/s for PLL range A. (=52 MHz x 15), and the PLL range B is from 780 Mbit/s (=26 MHz x 30) to 1.56 Gbit/s (=52 MHz x 30).

[4. UHS-I transmission method]
The above-mentioned UHS-II interface employs a differential transmission method, and UHS-II differential transmission signals are assigned to the terminal group 234 shown in FIG.

On the other hand, the UHS-I adopts the same single-end transmission method as the conventional SD interface, and the UHS-I single-end transmission signal is assigned to the terminal group 232 shown in FIG.

Both UHS-I and conventional SD interfaces use a single-end transmission method, but while the conventional SD interface uses a signal voltage of 3.3V, UHS-I uses a signal voltage of 3.3V to increase speed and reduce unnecessary radiation. The voltage is lowered to 1.8V.

FIG. 11 is a diagram showing data transfer in SDR mode and DDR mode of UHS-I.

In SDR (Single Data Rate) mode, data is transferred at the timing of one edge of the clock, and in DDR (Double Data Rate) mode, data is transferred at the timing of both edges of the clock, so the clock frequency is the same. If there is, data can be transferred at twice the speed in DDR mode as in SDR mode.

[5. SD memory card standard speed guarantee class and interface data transfer rate]
FIG. 10 shows the data transfer rate of the video speed class and interface in the SD memory card based on the above-mentioned UHS-II transmission method and UHS-I transmission method and the clock conditions of the video speed class shown in FIG. FIG.

In the table of FIG. 10, the top row of each cell is the clock frequency shown in FIG. 9 in megahertz, and the bottom row of each cell is the data transfer rate of the interface in megabytes/second.

Hereinafter, the overall view of the table in FIG. 10 will be presented by explaining the data transfer rate of the interface calculated from the clock condition in the case of "VSC10" as an example.

In the HS mode of the SD interface, the clock frequency of the SD clock is 40 MHz, so the transfer rate by the 4-bit bus of the SD interface is 20 MB/s, and in the UHS-I SDR25 mode, the transfer rate is also 20 MB/s. In the DDR50 mode, the clock frequency of the SD clock is 40 MHz and data transfer is performed using the DDR shown in FIG. 11, so the transfer rate by the 4-bit bus is 40 MB/sec.

On the other hand, in PLL range A of the UHS-II interface FD mode, the reference clock frequency is 35 MHz and the PLL multiplication rate is 15 times, so the transmission rate is 525 Mbit/s by simple calculation, but with the UHS-II interface Since 8b10b encoding is adopted and 8-bit data is converted (modulated) into 10-bit data for transmission, the actual data transmission rate is 525 Mbit/s x (8/10) = 420 Mbit/s. Converting this to bytes/second, the data transfer rate is 420 megabits/second ÷ 8 bits = 52.5 megabytes/second.

In addition, in PLL range B of UHS-II interface FD mode, the reference clock frequency is 26 MHz and the PLL multiplication rate is 30 times, so the transmission rate is 780 Mbit/s by simple calculation, but with UHS-II interface Since 8b10b encoding is adopted and 8-bit data is converted (modulated) to 10 bits for transmission, the actual data transmission rate is 780 Mbit/s x (8/10) = 624 Mbit/s. Converting this to bytes/second, the data transfer rate is 624 megabits/second ÷ 8 bits = 78 megabytes/second.

Regarding the UHS-II interface HD mode, as explained in "3. UHS-II transmission method," it is possible to achieve a data transfer rate twice that of the UHS-II interface FD mode. The data transfer rate is 105 MB/sec in range A and 156 MB/sec in PLL range B.

[6. SD memory card standard speed guarantee class, power consumption and thermal issues]
FIG. 13 shows the relationship between bus speed mode and maximum power consumption in the SD memory card standard, and FIG. 14 shows the relationship between video speed class and power consumption limit in the SD memory card standard.

Figure 13 shows that maximum power consumption increases as the bus speed increases, and Figure 14 shows that as the guaranteed speed of the video speed class increases, the power consumption limit is relaxed, i.e., more power consumption is allowed. This indicates that

When the power consumption of the SD memory card increases, the amount of heat generated increases in both the host device 100 shown in FIGS. 2 and 3 that supplies power to the SD memory card, and the memory card 200 shown in FIGS. 2 and 3 that consumes power. .

As power consumption increases, the amount of heat generated by the host device 100 and memory card 200 increases, and if the temperature of the memory card 200 exceeds the operating temperature range, video recording may be interrupted or, for example, one frame of a video may be lost. There is a possibility that a "frame drop" that is not recorded may occur, and in the worst case, the controller configuring the memory card 200 or the NAND flash memory may be destroyed.

Note that the SD memory card standard defines the operating temperature range of an SD memory card as -25°C to 85°C.

In the case of a digital camera, which is an example of a host device, it is common that once a still image is taken and the image data is recorded on an SD memory card, writing to the SD memory card will not occur for a while. Therefore, the average power consumption of the host device and the SD memory card per unit for a certain period of time becomes low, and an extreme temperature rise of the host device and the SD memory card does not occur.

On the other hand, when recording video continuously while guaranteeing the recording speed with a digital movie camera, which is an example of a host device, or a digital camera equipped with a video shooting function, the SD Since data is written to the memory card, the average power consumption per unit for a certain period of time of the host device and the SD memory card becomes high.If shooting continues for a long time, the temperature of both the host device and the SD memory card increases. Rise. result. Events have occurred where the operating temperature range of SD memory cards, which is 85° C., has been significantly exceeded, and this has become a problem.

Digital movie cameras and digital cameras, which are examples of host devices, are equipped with image sensors such as CMOS sensors and image processing engines (SoCs, which are semiconductor products such as VLSI that perform image processing) due to the recent trends toward higher pixel counts and higher image quality. etc.) generate a large amount of heat, and the demand for smaller equipment requires high-density mounting, making heat dissipation difficult, making thermal design a major issue.

[7. Realization of requested guaranteed speed notification method from host device to memory card]
Due to the above-mentioned background, there is a need for a technique for keeping power consumption as low as possible when performing speed-guaranteed recording.

Therefore, the present inventors focused on the fact that in the current speed guarantee recording standard, there is no mechanism for notifying (presenting) information regarding the requested guaranteed speed from the host device to the memory card.

For example, if an SD memory card compatible with VSC90 (Video Speed Class 90) is installed in the host device and the host device shoots a VSC10 (Video Speed Class 10) video, the information In other words, since there is no way for the host device to notify the SD memory card that the guaranteed speed that the host device requests from the SD memory card is 10 megabytes/second, the SD memory card will not respond as soon as speed guarantee recording starts. , as shown in FIG. 14, there is a possibility of operating in the UHS-II mode and within the power consumption range of up to 1.80 W allowed when recording with VSC90.

On the other hand, the guaranteed speed of 10 megabytes/second (VSC10) required by the host device requires a power consumption of up to 0.72W in UHS-I mode or a power consumption of up to 0.72W in HS mode, as shown in Figure 14. It is possible to achieve the guaranteed speed of 10 MB/s (VSC10) required by the host device with less than half the power consumption limit of 1.8 W when operating in UHS-II mode. .

In order to solve the above-mentioned problems, the present inventors provided a new means for notifying (presenting) information regarding the guaranteed speed requested from the host device to the memory card, thereby ensuring that the memory card does not meet the guaranteed speed requested by the host. We investigated technology that would reduce the power consumption of memory cards by operating with the minimum performance necessary to achieve speed.

First, with reference to FIG. 17, the guaranteed speed recording realized by the current SD memory card will be explained.

FIG. 17 shows an example of a command sequence when speed guaranteed recording is performed on an SD memory card. In the example shown in FIG. 17, the command is written as "CMD" and is sent from the host device to the SD memory card. "CMD20" is a control command issued when performing speed guaranteed recording in the SD memory card. FIG. 15 shows a data structure 600 of "CMD20". Speed guarantee recording is realized by parameters specified by "Speed Class Control (SCC)", "CNT/ID", and "ADDR" of "CMD20".

Refer to FIG. 17 again. For example, the first "CMD20" 700-1 notifies the SD memory card of the directory entry position of the data stream to be written from the host device ("SCC"=0001b in FIG. 15). In the directory entry, the file name, attributes, etc. of the data stream 703 to be written are recorded. Thereafter, "CMD24" 800-1 is issued, and writing (recording) to the directory entry is performed.

Note that "CMD24" of the SD memory card standard is a command for writing data in a single block (1 block = 512 bytes).

Next, "CMD20" 700-3 specifies the location of an allocation unit (AU) for performing speed guaranteed recording from the host device to the SD memory card ("SCC"=0111b in FIG. 15).

During speed-guaranteed recording, the SD memory card standard stipulates that the data stream is written for each free allocation unit (free AU). At this time, the number of free allocation units (vacant AUs) that can be consecutively secured is specified in the "CNT/ID" field (FIG. 15). The maximum number that can be specified is 8, and the "CNT/ID" field is 3 bits long.

Thereafter, "CMD20" 700-4 instructs the SD memory card from the host device to start speed guaranteed recording ("SCC"=0000b in FIG. 15).

Thereafter, speed guaranteed recording, which is represented as a "speed class recording section" in FIG. 17, is performed. In the speed class recording section, data write commands "CMD25" 800-2 and 800-4 are issued from the host device to the SD memory card, and speed guarantee data to be written, such as photographed video data, is transmitted.

Note that "CMD25" of the SD memory card standard is a command for writing multi-block (n blocks = 512 x n bytes) data.

In addition, while the speed guarantee data to be written, such as shooting video data, is being continuously written to the SD memory card, the file system 108 of the host device shown in FIGS. The FAT (File Allocation Table) updated as appropriate according to the existing data is written to the SD memory card by issuing "CMD25" 800-3 and 800-5.

The "speed class recording section" ends when another write command is issued.

The present inventors discovered that in the above-described sequence of speed guaranteed recording, at least before the start of speed guaranteed recording is instructed, that is, "CMD20" 700-4 (Start Recording) in FIG. 17 is issued. By notifying (presenting) the guaranteed speed requested by the host device to the SD memory card before the guaranteed speed requested by the host, the SD memory card operates at the minimum performance necessary to achieve the guaranteed speed requested by the host. The idea was that it would be possible to keep the power consumption of memory cards low.

As for the means of notifying (presenting) the guaranteed speed required by the host device to the SD memory card, there is a method of using an unused (Reserved) argument of an existing command (CMD) specified in the SD memory card standard, or, Various concrete methods can be considered, such as a method of newly defining commands that are not specified in the SD memory card standard.

In the embodiment of the present invention, a method of using an unused code (value) of an existing "CMD20" argument defined in the SD memory card standard will be disclosed as an example.

FIG. 16 shows an example of assigning information regarding the guaranteed speed requested by the host device to an unused code (value) of "Speed Class Control (SCC)" which is an argument of the existing "CMD20" specified in the SD memory card standard. It shows.

"SCC" = 1001b in FIG. 16 notifies (presents) to the SD memory card that the guaranteed speed requested by the host device is 6 megabytes/second, that is, recording in video speed class 6. shows.

"SCC"=1010b indicates that the SD memory card is notified (presented) that the guaranteed speed requested by the host device is 10 megabytes/second, that is, recording in video speed class 10.

"SCC"=1011b indicates that the SD memory card is notified (presented) that the guaranteed speed requested by the host device is 30 megabytes/second, that is, recording in video speed class 30.

"SCC"=1100b indicates that the SD memory card is notified (presented) that the guaranteed speed requested by the host device is 60 megabytes/second, that is, recording in video speed class 60.

"SCC" = 1101b indicates that the SD memory card is notified (presented) that the guaranteed speed requested by the host device is 90 MB/s, that is, recording in video speed class 90. There is.

Next, with reference to FIG. 18, an example will be described in which the guaranteed speed requested by the host device is notified (presented) to the SD memory card and then speed guaranteed recording is executed.

FIG. 18 shows an example of a command sequence in the case of notifying (presenting) the guaranteed speed requested by the host device to the SD memory card and then executing speed guarantee recording.

In the example shown in FIG. 18, the command is written as "CMD" and is sent from the host device to the SD memory card.

"CMD20" is a control command issued when performing speed guaranteed recording in the SD memory card.

FIG. 16 shows the data structure 600 of "CMD20". Speed guarantee recording is realized by parameters specified by "Speed Class Control (SCC)", "CNT/ID", and "ADDR" of "CMD20". As shown in FIG. 16, in "speed class control (SCC)",

VSCs

6, 10, 30, 60, and 90 (notification commands) are provided in the same area as StartRecording (start command).

Refer to FIG. 18 again. For example, the first "CMD20" 700-1 notifies the SD memory card of the directory entry position of the data stream to be written from the host device ("SCC"=0001b in FIG. 16). The file name, attributes, etc. of the data stream to be written are recorded in the directory entry. Thereafter, "CMD24" 800-1 is issued and writing to the directory entry is performed.

Next, the "CMD20" 700-2 notifies (presents) the guaranteed speed requested by the host device to the SD memory card. Note that the nonvolatile storage device 20 transmits in advance a plurality of operating speed candidates (

VSC

6, 10, 30, 60, 90) at which the recording device 10 can operate to the interface unit 16 of the recording device 10. In the example of FIG. 18, the system control unit 12 of the recording device 10 selects one operating speed candidate (VSC 10) from among the plurality of operating speed candidates as the guaranteed speed for continuous stream recording. It is notified that the guaranteed speed requested by the host device is 10 megabytes/second (VSC10) ("SCC" = 1010b in FIG. 16). That is, the recording device 10 transmits “CMD20” 700-2 including information indicating the selected operating speed candidate (VSC10) to the nonvolatile storage device 20.

When the SD memory card receives "CMD20" 700-2 and recognizes that the guaranteed speed requested by the host device is 10 MB/s, the SD memory card is required to achieve the write rate of 10 MB/s. The memory card operates at the minimum performance possible and shifts to an operating mode that keeps the memory card's power consumption low, expressed as the "optimal performance operating period."

For example, as shown in Figure 14, for the interface between the host device and the SD memory card, before receiving "CMD20" 700-2, the power consumption is limited to 1.44W or less in UHS-I SDR104 mode. In the "optimal performance operation section" after receiving "CMD20" 700-2, power saving control may be considered, such as operating in UHS-I SDR25 mode where power consumption is limited to 0.72W or less.

In addition, in a nonvolatile storage device including an SD memory card mounted with a NAND flash memory, the power consumption of the

interface

214a, 214b, 314a, or 314b with the host device shown in FIGS. 2 and 3 is generally Compared to this, the total power consumption of the CPU 212, buffer memory 216, and NAND control unit 218 inside the controller 210 shown in FIGS. 2 and 3, and the power consumption of the NAND flash memory 220 are larger.

These circuit blocks inside the controller 210 and the NAND flash memory generally operate with a clock that is multiplied and/or divided based on the clock generated (transmitted) by the oscillator 219 shown in FIGS. 2 and 3. .

When a command is not issued from the host device for a certain period of time, the controller 210 lowers the clock frequency by dividing the clock supplied to the circuit blocks inside the controller 210 in order to keep power consumption as low as possible. As a result, a mechanism for transitioning to power saving mode is widely and generally provided.

Therefore, before receiving "CMD20" 700-2, the clock supplied to the circuit block inside the controller 210 is set to the maximum clock frequency, and after receiving "CMD20" 700-2, the clock supplied to the circuit block inside the controller 210 is set to the maximum clock frequency. In the "operation section", power saving control may be considered, such as setting the clock frequency to the minimum required to achieve a write rate of 10 megabytes/second.

Next, "CMD20" 700-3 specifies the location of an allocation unit (AU) for speed guaranteed recording from the host device to the SD memory card ("SCC"=0111b in FIG. 16).

During speed-guaranteed recording, the SD memory card standard stipulates that the data stream is written for each free allocation unit (free AU). At this time, the number of free allocation units (vacant AUs) that can be consecutively secured is specified in the "CNT/ID" field (FIG. 16). The maximum number that can be specified is 8, and the "CNT/ID" field is 3 bits long.

Thereafter, "CMD20" 700-4 instructs the SD memory card from the host device to start speed guaranteed recording ("SCC"=0000b in FIG. 16). That is, the interface unit 26 of the nonvolatile storage device 20 receives “CMD20” (control command) from the recording device 10. "CMD20" includes "CMD20" 700-4 (start command) for instructing speed guaranteed recording, and "CMD20" 700-2 (notification command) regarding guaranteed speed for continuous stream recording. The memory control unit 28 of the nonvolatile storage device 20 sets the operating speed based on "CMD20" 700-2. More specifically, the memory control unit 28 sets the operating speed based on the operating speed candidate (VSC10) included in "CMD20" 700-2.

Thereafter, speed guaranteed recording, which is represented as a "speed class recording section" in FIG. 18, is performed. In the speed class recording section, data write commands "CMD25" 800-2 and 800-4 are issued from the host device to the SD memory card, and speed guarantee data to be written, such as photographed video data, is transmitted. That is, after receiving "CMD20", the interface section 26 receives "CMD25" 800-2 and 800-4 (data write command). Furthermore, the interface section 26 receives data.

Note that "CMD25" of the SD memory card standard is a command for writing multi-block (multiple blocks: n blocks = 512 x n bytes) data.

In addition, while the speed guarantee data to be written, such as shooting video data, is being continuously written to the SD memory card, the file system 108 of the host device shown in FIGS. The FAT (File Allocation Table) updated as appropriate according to the existing data is written to the SD memory card by issuing "CMD25" 800-3 and 800-5. That is, the memory control unit 28 records the received data in the nonvolatile memory 30 based on the set operating speed and "CMD25" 800-2 and 800-4. The memory control unit 28 records data in the nonvolatile memory 30 in accordance with the Non-Volatile Memory Express (NVMe) standard or the Secure Digital (SD) memory card standard.

The "speed class recording section" ends when another write command is issued.

As mentioned above, by establishing a specification in advance in which the host device notifies (presents) the guaranteed speed requested by the host device to the SD memory card, the SD memory card can receive the guaranteed speed requested by the host. It operates with the minimum performance necessary to achieve this, and the power consumption of the memory card is kept low, making it possible to suppress the heat generation of the host device and the SD memory card.

In the embodiment of the present invention, a method using "CMD20" of the SD memory card standard was shown as an example of means for notifying (presenting) the guaranteed speed required by the host device to the memory card, but the NVMe standard Regarding memory cards that comply with the NVMe standard, the present inventors have devised a mechanism to realize the function of "CMD20" in the SD memory card standard using commands that comply with the NVMe standard, as shown in FIGS. 19 and 20. , This makes it possible to notify (present) the guaranteed speed requested by the host device to the memory card.

Specifically, the SCC, CNT/ID, and ADDR in "CMD20" of the SD memory card standard shown in FIG. 28 (a 4-bit area), bits 26 to 24 of Dword 13 (a 3-bit area), bits 5 to 0 of Dword 10, and bits 31 to 10 of Dword 11 (a total of 28 bits area).

In addition, for both memory cards compliant with the SD memory card standard and/or memory cards compliant with the NVMe standard, control commands other than "CMD20" in the SD memory card standard, control registers in the memory card, NAND flash memory, etc. It is also possible to notify (present) the guaranteed speed requested by the host device to the memory card by using a write command.

(Summary of embodiment)
(1) The recording device of the present disclosure is a recording device that records data on a nonvolatile storage device in a recording mode in which a minimum recording speed is guaranteed,
The nonvolatile storage device is removable from the recording device and has a memory that records data in accordance with the NVMe standard and/or the SD memory card standard.

Memory has a guaranteed recording speed for continuous stream recording.

The recording device includes an interface section that is physically connected to the nonvolatile storage device and can send at least data write commands and control commands to the nonvolatile storage device.

The interface unit is capable of transmitting control commands including a data write command for recording data, a command for instructing speed-guaranteed recording, and/or a command for reading and writing registers in the nonvolatile storage device. be.

The control command includes information regarding the guaranteed speed of continuous stream recording.

The interface unit sends a control command to the nonvolatile storage device to notify information regarding guaranteed speed and instruct speed guaranteed recording, and also sends data to perform continuous stream recording using a data write command. do.

(2) The nonvolatile storage device of the present disclosure is a nonvolatile storage device that can record data in a recording mode with a guaranteed minimum recording speed.

The nonvolatile storage device is removable from the recording device.

The nonvolatile storage device includes a memory, an interface unit that communicates with the recording device, and a memory control unit that records data in the memory in accordance with the NVMe standard and/or the SD memory card standard.

Memory has a guaranteed recording speed for continuous stream recording.

The nonvolatile storage device includes an interface unit that is physically connected to the recording device and can receive at least data write commands and control commands from the recording device.

The interface unit receives control commands from the recording device, including a data write command for recording data, a command for instructing speed-guaranteed recording, and/or a command for reading and writing registers in the nonvolatile storage device. is possible.

The interface unit receives a control command, and then receives a data write command and data for recording data.

Based on the information regarding the guaranteed speed included in the control command, the memory control unit shifts to an operation mode necessary and sufficient to guarantee the speed, and performs continuous data recording based on the data write command.

(3) The recording method of the present disclosure is a recording method executed in a recording device that records data on a nonvolatile storage device in a recording mode in which a minimum recording speed is guaranteed.

The nonvolatile storage device is removable from the recording device and has a memory that records data in accordance with the NVMe standard and/or the SD memory card standard.

Memory has a guaranteed recording speed for continuous stream recording.

The recording device includes an interface unit that is physically connected to the nonvolatile storage device and can send at least a data write command and a control command to the nonvolatile storage device.

The interface unit is capable of transmitting control commands including a data write command for performing data recording, a command for instructing speed-guaranteed recording, and/or a command for reading and writing registers in the nonvolatile storage device. It is.

The recording method is such that the interface unit sends a control command to the nonvolatile storage device to notify information regarding the guaranteed speed and instruct the speed guaranteed recording, and to record continuous data after the speed guaranteed recording instruction. This includes sending data write commands and data to be performed.

The present disclosure can be suitably used in a storage system that uses a recording device that is a host device and a nonvolatile storage device 20.

10 Recording device 11 Bus 12 System control section 14 Buffer memory 16 Interface section 20 Nonvolatile storage device 21 Bus 22 Controller 24 Buffer memory 26 Interface section 28 Memory control section 30 Nonvolatile memory 100 Video recording device 102 Interface section 102a PCIe interface 102b SD Host 102c Selector 104 PCIe/NVMe driver 106 SD driver 108 File system 110 Application software 200 Memory card 210 Card controller 212 CPU

214a PCIe interface

214b SD interface 216 Buffer memory 218

NAND control unit

232, 234 Terminal group 304 UHS-II driver 302 Interface unit 302a UHS-II interface 302b SD host 302c Selector 314a UHS-II interface 314b SD interface 411, 422, 511, 514, 522, 523 Transmission circuit 412, 421, 512, 513, 521, 524 Receiving circuit 600 Data structure 700-1, 700-3, 700-4 CMD20
800-1 CMD24
800-2, 800-4, 800-3, 800-5 CMD25

Claims

A non-volatile storage device capable of recording data in a recording mode with a guaranteed minimum recording speed,
The nonvolatile storage device is removable from a recording device,
memory and
an interface unit that communicates with the recording device;
and a memory control unit that records data in the memory,
The interface unit receives from the recording device a control command including a start command for instructing speed guaranteed recording and a notification command regarding guaranteed speed for continuous stream recording;
The memory control unit sets an operating speed based on the notification command included in the control command,
After receiving the control command, the interface unit receives a data write command and data;
The memory control unit is a nonvolatile storage device that records the received data in the memory based on the set operating speed and the data write command.
The memory control unit records the data in the memory in accordance with the Non-Volatile Memory Express (NVMe) standard or the Secure Digital (SD) memory card standard.
The nonvolatile storage device according to claim 1.
The notification command is provided in the same area as the start command,
The nonvolatile storage device according to claim 1.
The memory control unit sets the operating speed before the interface unit receives the data write command.
The nonvolatile storage device according to claim 1.
the interface unit transmits a plurality of operating speed candidates at which the nonvolatile storage device can operate to the recording device;
The nonvolatile storage device according to claim 1.
The notification command includes information indicating one operating speed candidate selected by the recording device from among the plurality of operating speed candidates as the guaranteed speed for the continuous stream recording.
The nonvolatile storage device according to claim 5.
A recording device that records data on a nonvolatile storage device in a recording mode that guarantees a minimum recording speed,
an interface unit that communicates with the nonvolatile storage device;
Equipped with a system control section and
The interface unit receives from the nonvolatile storage device a plurality of operating speed candidates at which the nonvolatile storage device can operate,
The system control unit selects one operating speed candidate from the plurality of operating speed candidates as a guaranteed speed for continuous stream recording;
The interface unit connects the nonvolatile storage device with
transmitting a control command including a start command for instructing speed guarantee recording and a notification command regarding the selected operation speed candidate;
A recording device that transmits a data write command and data after transmitting the control command.
The data is recorded in the non-volatile storage device in accordance with the Non-Volatile Memory Express (NVMe) standard or the Secure Digital (SD) memory card standard.
The recording device according to claim 7.
The notification command is provided in the same area as the start command,
The recording device according to claim 7.
A recording method for recording data on a nonvolatile storage device in a recording mode that guarantees a minimum recording speed,
The nonvolatile storage device is removable from a recording device,
receiving from the recording device a control command including a start command for instructing speed guaranteed recording and a notification command regarding guaranteed speed for continuous stream recording;
setting an operating speed based on the notification command included in the control command;
after receiving the control command, receiving a data write command and data;
A recording method that records the received data based on the set operating speed and the data write command.
The data is recorded in accordance with the Non-Volatile Memory Express (NVMe) standard or the Secure Digital (SD) memory card standard.
The recording method according to claim 10.
The notification command is provided in the same area as the start command,
The recording method according to claim 10.
the operating speed is set before receiving the data write command;
The recording method according to claim 10.
Before receiving the control command, transmitting a plurality of operating speed candidates at which the nonvolatile storage device can operate to the recording device;
The recording method according to claim 10.
The notification command includes information indicating one operating speed candidate selected by the recording device from among the plurality of operating speed candidates as the guaranteed speed for the continuous stream recording.
The recording method according to claim 14.