CN114461557A - Interface expansion device and method - Google Patents

Interface expansion device and method Download PDF

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Publication number
CN114461557A
CN114461557A CN202210262653.1A CN202210262653A CN114461557A CN 114461557 A CN114461557 A CN 114461557A CN 202210262653 A CN202210262653 A CN 202210262653A CN 114461557 A CN114461557 A CN 114461557A
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interface
communication protocol
expansion
interfaces
downlink
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Inventor
王江
李树青
孙华锦
李幸远
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Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
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Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
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Priority to CN202210262653.1A priority Critical patent/CN114461557A/en
Publication of CN114461557A publication Critical patent/CN114461557A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0032Serial ATA [SATA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/38Universal adapter
    • G06F2213/3852Converter between protocols

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)

Abstract

The invention provides an interface extension device and method, wherein the device comprises: the system comprises a plurality of expansion nodes, a plurality of network nodes and a plurality of network nodes, wherein each expansion node comprises an uplink interface and at least two downlink interfaces; the uplink interface is preset with a first communication protocol and is in communication connection with at least two downlink interfaces, at least one downlink interface is reserved in the downlink interfaces and is used for being cascaded with the uplink interfaces of other expansion nodes and carrying out first communication protocol communication, and the other downlink interfaces are preset with conversion protocols of the first communication protocol as expansion interfaces. The interface expansion device or the method not only has stronger expansion performance, but also avoids the compatibility problem between the board cards, and for the host, the equipment accessed through the downlink interface is presented as standard third communication protocol equipment, and the upstream host can realize equipment access through the standard third communication protocol drive carried by the operating system, so that additional host drive software is not required to be developed, and the expansion work of the equipment is facilitated.

Description

Interface expansion device and method
Technical Field
The present invention relates to the field of computer communication technologies, and in particular, to an interface extension apparatus and method.
Background
In the storage field, NVMe (NVM Express) interface based on PCIe (peripheral component interconnect Express, a high speed Serial computer expansion bus standard) is continuously becoming strong, and market shares of SAS interface (Serial Attached SCSI) and SATA interface (Serial ATA ) are continuously being eaten by silkworms, wherein the flash memory field is the most, however, SAS and SATA are still dominant in terms of magnetic media storage (HDD, mechanical hard disk).
In terms oF interface expansion, the NVMe interface may be capacity expanded through a local PCIe switch chip or a private network (NVMe-od). But the SATA interface typically exists in adherence to the SAS interface. In the disk expansion mode, firstly, a RAID card or HBA card is required to convert the PCIe bus into the SAS bus protocol, and then more disks are connected through the SAS expander, which has the advantage of flexible expansion, but the following defects still exist:
1. due to the low performance requirement of the HDD, the utilization rate of the SAS interface supporting high bandwidth is low, and the cost performance is not high;
2. compatibility and interoperability between RAID/HBA cards and SAS Expander of different manufacturers are poor, and the RAID/HBA cards and the SAS Expander can only select products of the same manufacturer.
Another expansion method of the SATA interface is to implement expansion by using a dedicated port multiplexer device, but the port multiplexer expansion also has the following defects:
1. without wide interface support (SAS Expander support), only expansion can be performed by port multiplexer down through lane of X1;
2. the single-lane downward expansion disk can be cascaded with a plurality of port multipliers, but only 15 SATA disks can be expanded at most;
3. port Multiplier long-term type is micro, optional chips are rare, and generally only 5-7 interfaces are supported.
It can be seen from the above analysis that, two SATA interface expansion schemes commonly used at present have obvious defects, and in the face of increasing PCIe devices, the SATA disk is also not beneficial to the control and management of the upstream PCIe device. Therefore, there is a need for a SATA interface expansion apparatus or method that can comprehensively solve the above-mentioned technical problems.
Disclosure of Invention
To solve the above technical problem, in an aspect of the present invention, an interface extension apparatus is provided, including: a plurality of expansion nodes, each of which comprises an uplink interface and at least two downlink interfaces; the uplink interface is preset with a first communication protocol and is in communication connection with the at least two downlink interfaces, at least one downlink interface is reserved in the downlink interfaces and is used for being cascaded with the uplink interfaces of other extension nodes and carrying out first communication protocol communication, and the conversion protocol of the first communication protocol is preset in the other downlink interfaces as an extension interface.
In one or more embodiments, the extension node comprises: the first communication protocol extension chip is configured to provide an uplink interface and at least two downlink interfaces; and the interface conversion module is preset with a conversion protocol of the first communication protocol and is configured to be in communication connection with at least one downlink interface of the first communication protocol expansion chip to serve as an externally expanded SATA interface.
In one or more embodiments, the extension node further comprises: a dual mode interface; the dual-mode interface is respectively connected with the interface conversion module and other downlink interfaces of the first communication protocol expansion chip and serves as an external expansion interface.
In one or more embodiments, the interface conversion module is configured to connect a plurality of devices; the device includes a mechanical hard disk having a second communication protocol interface.
In one or more embodiments, the dual mode interface is configured to connect a plurality of second communication protocol devices or first communication protocol devices; the second communication protocol device comprises a mechanical hard disk with a second communication protocol interface; the first communication protocol device comprises a solid state disk or other expansion node having a third communication protocol interface.
In one or more embodiments, the interface expansion apparatus includes a multi-layer cascade relationship with multiple expansion nodes in each layer.
In one or more embodiments, the extension node is a field programmable gate array module, and the field programmable gate array module is preset with a first communication protocol and a conversion protocol of the first communication protocol.
In a second aspect of the present invention, an interface extension method is provided, where the method includes: receiving a plurality of signals from a plurality of downlink interfaces in parallel through an uplink first communication protocol bus, wherein the plurality of signals comprise second communication protocol signals and third communication protocol signals; forwarding the third communication protocol signal to the uplink first communication protocol bus to cascade other first communication protocol devices; and converting the plurality of second communication protocol signals into third communication protocol signals and sending the third communication protocol signals to the uplink first communication protocol bus so that the plurality of downlink interfaces receiving the second communication protocol signals are used as second communication protocol extension interfaces.
In one or more embodiments, the plurality of downstream interfaces acquire the plurality of signals through a plurality of dual-mode interfaces.
In one or more embodiments, the other first communication protocol device includes: a processing module; and a storage module storing an executable computer program for implementing the steps of the second communication protocol interface extension method according to claim 8 or 9 when executed by the processing module.
The beneficial effects of the invention include: the interface expansion device or the method not only has stronger expansion performance, but also avoids the compatibility problem between the board cards, and for the host, the equipment accessed through the downlink interface is presented as standard third communication protocol equipment, and the upstream host can realize equipment access through the standard third communication protocol drive carried by the operating system, so that additional host drive software is not required to be developed, and the expansion work of the equipment is facilitated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a SATA interface expansion device according to the present invention;
FIG. 2 is a schematic diagram of a topology of a SATA interface expansion device according to a first embodiment of the present invention;
FIG. 3 is a diagram illustrating a topology of a SATA interface expansion device according to a second embodiment of the present invention;
fig. 4 is a flowchart of the SATA interface expansion method of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
Fig. 1 is a schematic structural diagram of a SATA interface expansion device according to the present invention. As shown in fig. 1, the SATA interface expansion apparatus of the present invention includes: a plurality of expansion nodes, each of which comprises an uplink interface and at least two downlink interfaces; the uplink interfaces are preset with PCIe communication protocols and are in communication connection with the at least two downlink interfaces, at least one downlink interface is reserved in the downlink interfaces and is used for being cascaded with the uplink interfaces of other expansion nodes and carrying out PCIe communication, and the other downlink interfaces are preset with NVMe-SATA conversion protocols as expanded SATA interfaces.
In this embodiment, each extension node has at least two downlink interfaces, one of which is directly mounted on the uplink interface, and the other of which is converted by the NVMe-SATA conversion protocol, and then converts the SATA signal into an NVMe signal, and sends the NVMe signal to the uplink interface in the form of an NVMe signal. The uplink interface preset with the PCIe communication protocol may be considered as a PCIe bus, or may also be considered as an interface which can communicate with the PCIe bus and is preset with the PCIe communication protocol.
Compared with the prior art, the embodiment of the invention avoids the compatibility problem between the SAS Expander (SAS board card) and the HBA board card or the RAID board card, and for the upstream host connected with the uplink interface, the equipment accessed through the downlink interface is the standard NVMe equipment, and the upstream host can realize equipment access through the standard NVMe drive of the operating system, and does not need to develop additional host drive software, thereby greatly facilitating the expansion work of related equipment.
In one implementation, the SATA interface expansion apparatus of the present invention is used for disk expansion, and the expanded disk may be an SSD hard disk using an NVMe interface or an HDD hard disk using a SATA interface. The SSD hard disk adopting the NVMe interface can be directly mounted on the uplink interface through the first downlink interface, and the HDD hard disk adopting the SATA interface needs to be converted through the NVMe-SATA conversion protocol through the second downlink interface, converts the SATA signals into NVMe signals and then sends the NVMe signals to the uplink interface in the form of NVMe signals.
In some embodiments, the expansion node of the present invention may be built up by a plurality of chips or modules, and the specific form is as follows:
in one embodiment, an extension node comprises: the PCIe expansion chip is configured to provide an uplink interface and at least two downlink interfaces; and the NVMe-SATA interface conversion module is preset with an NVMe-SATA conversion protocol and is configured to be in communication connection with at least one downlink interface of the PCIe expansion chip to serve as an externally expanded SATA interface.
In a further embodiment, the NVMe-SATA interface conversion module includes a PCIe EP sub-module, an NVMe-target interface sub-module, and a SATA controller. The NVMe-target interface sub-module is used for acquiring SATA signals under the control of the SATA controller and converting the SATA signals into NVMe signals; and the PCIe EP sub-module is used for acquiring the NVMe signal and sending the NVMe signal to a corresponding downlink interface of the PCIe expansion chip.
In this embodiment, the NVMe-SATA interface conversion module may be used as an externally-extended SATA interface for connecting a plurality of SAS devices, such as a HDD hard disk drive having a SATA interface. And the downlink interfaces of other PCIe expansion chips which are not connected with the NVMe-SATA interface conversion module can be used for connecting other PCIe devices.
In another implementation, the extension node further includes a PCIe-SATA dual-mode interface, and the PCIe-SATA dual-mode interface is connected to the NVMe-SATA interface conversion module and the other downlink interfaces of the PCIe extension chip, and serves as an external extension interface. In the embodiment, the PCIe-SATA dual-mode interface is added, so that the expansion node is externally shown to have a multifunctional interface. Accordingly, the PCIe-SATA dual mode interface may be used to connect multiple SAS devices or PCIe devices, such as HDD hard disks with SATA interfaces, SSD hard disks with NVMe interfaces, or other expansion nodes.
In other implementations, the extension node may be an FPGA module, and at this time, the FPGA module is preset with a PCIe communication protocol and an NVMe-SATA conversion protocol. Optionally, the FPGA module may selectively convert the signals according to the signals transmitted by the downlink interface by using an NVMe-SATA conversion protocol or directly forward the signals to the uplink port. Optionally, the expansion node further includes a PCIe-SATA dual-mode interface, configured to serve as an external expansion interface.
In another alternative embodiment, the FPGA module may also perform dynamic bandwidth allocation according to the type of signals received by the PCIe-SATA dual mode interface; specifically, a wider bandwidth is allocated to the interface receiving the PCIe signal and the NVMe, and a relatively smaller bandwidth is allocated to the interface receiving the SATA signal. Through the embodiment, the SATA interface expansion device can effectively solve the problem of low bandwidth utilization rate of the downlink port caused by low requirement on transmission performance of equipment connected with the downlink interface.
In the two implementation modes of the expansion node provided by the embodiments, the multi-chip or module building mode has the advantages of low cost, easy building and good expandability, while the FPGA module implementation mode has flexible configuration, and the downlink port of the FPGA module can be configured with conversion protocols of various other communication protocols and PCIe communication protocols, thereby implementing expansion of devices with various other interface types. However, no matter which implementation manner of the expansion node is adopted, the uplink interface adopts the PCIe communication manner, and thus the expansion node has a strong expansion capability.
In the following embodiments, several topologies composed of a plurality of expansion nodes connected to each other will be given, and the expansion capability of the present invention will be described.
Fig. 2 is a schematic view of a topology structure of a SATA interface expansion device according to a first embodiment of the present invention. As shown in fig. 2, taking a PCIe Gen 5-based expansion chip with 64 lanes as an example, considering the bandwidth characteristics of the SATAHDD (i.e., HDD hard disk with SATA interface), an upstream bandwidth of X8 (8 lanes need to be occupied), that is, 8 lanes can be accessed simultaneously for each read and write.
The expansion node connected with a host CPU, a RAID board card or an HBA board card is taken as a first layer, the first layer is provided with an expansion node, 8 lanes are configured to be used as uplink interfaces, 48 lanes are configured to be used as SATA expansion interfaces, at most 48 SATA HDDs can be connected, the rest 8 lanes are respectively connected with the uplink interface of an expansion node of a second layer, 1 expansion node of the second layer can be connected with 48 SATA HDDs, the rest 8 lanes are connected with 1 expansion node of a third layer, and the like, and each expansion node added with one layer can expand 48 SATA interfaces.
Fig. 3 is a schematic view of a topology structure of a SATA interface expansion device according to a second embodiment of the present invention. As shown in fig. 3, in this implementation, unlike the scheme of extending the SATA interface at each layer in the previous embodiment, the expansion node at each layer is used to connect to other expansion nodes, and the SATA interface is extended by the expansion node at the last layer. The device is composed of 3 layers of expansion nodes, 7 expansion nodes are connected to the second layer, 7 multiplied by 7 expansion nodes are connected to the third layer, each expansion node can expand 56 SATA interfaces at most, and therefore the expansion nodes of the third layer can expand 49 multiplied by 56 to equal 2744 SATA interfaces.
It should be noted that the above two embodiments are only used to illustrate the expansion capability of different topologies of the SATA interface expansion device of the present invention, and do not limit the present invention in any number. Each expansion node can use a PCIe-based expansion chip with more lanes, and the upstream bandwidth can also be set arbitrarily according to needs, such as X4 or X16.
The SATA interface expansion device of the invention also has the following beneficial technical effects that:
1. for the SATA disk expansion scenario, a larger upstream bandwidth is provided (PCIe Gen3/4/5 of X4/X8/X16) compared with that of Port Multiplier which only supports X1 (under SATA3 protocol, each Lane supports 6Gbps bandwidth at most);
2. aiming at the SATA disk expansion scene, compared with a Port Multiplier single Lane which is expanded by 15 disks at most, hundreds of disk expansion quantity is provided;
3. aiming at the compatibility problem of RAID/HBA card and SAS Expander brought by different manufacturers, the PCIe Switch realizes the seamless expansion of full transparency.
In a second aspect of the present invention, a SATA interface expansion method is also provided. Fig. 4 is a flowchart of the SATA interface expansion method of the present invention. As shown in fig. 4, the SATA interface expansion method of the present invention includes: step S1, receiving a plurality of signals from a plurality of downstream interfaces in parallel through an upstream PCIe bus, where the plurality of signals include SATA signals and NVMe signals; step S2, the NVMe signals are forwarded to the upstream PCIe bus to cascade other PCIe devices; step S3, converting the plurality of SATA signals into NVMe signals, and sending the NVMe signals to the upstream PCIe bus, so that the plurality of downstream interfaces receiving the SATA signals serve as SATA extension interfaces.
In a further embodiment, the plurality of downstream interfaces acquire the plurality of signals through a plurality of PCIe-SATA dual mode interfaces.
In a further embodiment, the other PCIe devices in the above embodiments include: a processing module; and a storage module, in which an executable computer program is stored, and the computer program is used for implementing the steps of the SATA interface expansion method in the above embodiments when being executed by the processing module. In an alternative embodiment, the PCIe device is an FPGA.
In the implementation, the SATA signal is received through the downstream interface, and the SATA signal is converted into the Nvme signal to be sent to the upstream interface, so that the problem of compatibility between an SAS Expander (SAS board) and an HBA board or an RAID board is solved, and the Nvme signal conforms to the PCIe protocol, so that the upstream interface can directly communicate with the upstream host through the PCIe protocol, and further, the SATA device expanded by the SATA interface expansion device of the present invention presents a standard Nvme device to the upstream host, and further, each Nvme device can be driven by the standard Nvme carried by the operating system, and an additional host software drive does not need to be developed, so that the expansion work of the SATA device can be facilitated; moreover, since the PCIe bus has a large bandwidth, a plurality of SATA devices and a plurality of expansion nodes can be mounted below the expansion node communicating with the upstream host.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims (10)

1. An interface expansion apparatus, comprising:
a plurality of expansion nodes, each of which comprises an uplink interface and at least two downlink interfaces;
the uplink interface is preset with a first communication protocol and is in communication connection with the at least two downlink interfaces, at least one downlink interface is reserved in the downlink interfaces and is used for being cascaded with the uplink interfaces of other extension nodes and carrying out first communication protocol communication, and the conversion protocol of the first communication protocol is preset in the other downlink interfaces as an extension interface.
2. The interface expansion apparatus of claim 1, wherein the expansion node comprises:
the first communication protocol extension chip is configured to provide an uplink interface and at least two downlink interfaces; and
and the interface conversion module is preset with a conversion protocol of the first communication protocol and is configured to be in communication connection with at least one downlink interface of the first communication protocol expansion chip to serve as an externally expanded SATA interface.
3. The interface expansion apparatus of claim 2, wherein the expansion node further comprises:
a dual mode interface;
the dual-mode interface is respectively connected with the interface conversion module and other downlink interfaces of the first communication protocol expansion chip and serves as an external expansion interface.
4. The interface expansion apparatus of claim 2, wherein the interface conversion module is configured to connect to a plurality of devices;
the device includes a mechanical hard disk having a second communication protocol interface.
5. The interface extension apparatus of claim 3, wherein the dual mode interface is configured to connect a plurality of second communication protocol devices or first communication protocol devices;
the second communication protocol device comprises a mechanical hard disk with a second communication protocol interface;
the first communication protocol device comprises a solid state disk or other expansion node with a third communication protocol interface.
6. The interface expansion apparatus of claim 1, wherein the interface expansion apparatus comprises a multi-layer cascade relationship with multiple expansion nodes in each layer.
7. The interface expansion apparatus according to claim 1, wherein the expansion node is a field programmable gate array module, and the field programmable gate array module is pre-configured with a first communication protocol and a conversion protocol of the first communication protocol.
8. A method for interface expansion, the method comprising:
receiving a plurality of signals from a plurality of downlink interfaces in parallel through an uplink first communication protocol bus, wherein the plurality of signals comprise a second communication protocol signal and a third communication protocol signal;
forwarding the third communication protocol signal to the uplink first communication protocol bus to cascade other first communication protocol devices;
and converting the plurality of second communication protocol signals into third communication protocol signals and sending the third communication protocol signals to the uplink first communication protocol bus so that the plurality of downlink interfaces receiving the second communication protocol signals are used as second communication protocol extension interfaces.
9. The interface expansion method of claim 8, wherein the plurality of downstream interfaces acquire the plurality of signals through a plurality of dual-mode interfaces.
10. The interface expansion method according to claim 8, wherein the other first communication protocol device includes:
a processing module; and
a storage module storing an executable computer program for implementing the steps of the second communication protocol interface extension method according to claim 8 or 9 when executed by the processing module.
CN202210262653.1A 2022-03-17 2022-03-17 Interface expansion device and method Pending CN114461557A (en)

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CN117708028A (en) * 2024-02-05 2024-03-15 成都电科星拓科技有限公司 SATA RAID bridging chip
CN117708028B (en) * 2024-02-05 2024-04-26 成都电科星拓科技有限公司 SATA RAID bridging chip

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