WO2023185740A1 - 驱动电路和显示设备 - Google Patents

驱动电路和显示设备 Download PDF

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Publication number
WO2023185740A1
WO2023185740A1 PCT/CN2023/084106 CN2023084106W WO2023185740A1 WO 2023185740 A1 WO2023185740 A1 WO 2023185740A1 CN 2023084106 W CN2023084106 W CN 2023084106W WO 2023185740 A1 WO2023185740 A1 WO 2023185740A1
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Prior art keywords
transistor
control signal
voltage
driving
control
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Application number
PCT/CN2023/084106
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English (en)
French (fr)
Inventor
梁博
贺虎
Original Assignee
华为技术有限公司
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Publication of WO2023185740A1 publication Critical patent/WO2023185740A1/zh

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0819Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/088Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements using a non-linear two-terminal element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving

Definitions

  • the present application relates to the field of semiconductor technology, and more specifically, to a control circuit and a display device.
  • the display device may include a plurality of light-emitting devices (such as light-emitting diodes, etc.) and a plurality of driving circuits for driving the light-emitting diodes.
  • This application provides a drive circuit and a display device.
  • the change in the control electrode voltage of the switch tube will not couple the control electrode voltage of the drive tube, thereby reducing the forward gamma voltage of the light-emitting diode, increasing the brightness of the light-emitting diode, and thereby reducing the drive circuit power consumption.
  • the present application provides a driving circuit, which may include a first transistor (as a driving tube), a second transistor (as a switching tube), a third transistor (as a switching tube), and a fourth transistor (as a switching tube). and storage capacitor.
  • a driving circuit which may include a first transistor (as a driving tube), a second transistor (as a switching tube), a third transistor (as a switching tube), and a fourth transistor (as a switching tube). and storage capacitor.
  • the first transistor may be used to be electrically connected to the first power supply, the second power supply, the first node and the third node.
  • the second transistor may be used to electrically connect with the third node, the light emitting control circuit, and the light emitting diode.
  • the third transistor may be used to electrically connect the first node, the first control circuit and the second node.
  • the fourth transistor may be used to electrically connect the second node, the second control circuit, and the third power supply.
  • the storage capacitor can be used to be electrically connected to the second power supply and the first node (that is, the storage capacitor can be electrically connected between the second power supply and the first node), and the second node is also used to be electrically connected to the third node. It is conceivable that the voltage of the second node may be equal to the voltage of the third node.
  • the storage capacitor may be used to store the first voltage provided by the first power supply through the first transistor.
  • the second voltage can be a DC voltage
  • the storage capacitor has the function of blocking the DC voltage
  • the first transistor may be used to control the voltage of the third node according to the first voltage stored in the storage capacitor and the second voltage provided by the second power supply.
  • the second transistor may be used to control the driving current of the light-emitting diode according to the light-emitting control signal provided by the light-emitting control circuit and the voltage of the third node.
  • the third transistor may be used to control the gate voltage of the first transistor according to the first control signal provided by the first control circuit and the voltage of the second node. It can also be used to compensate the threshold voltage of the first transistor according to the first control signal and the first voltage provided by the first power supply.
  • the fourth transistor may be used to control the voltage of the second node according to the second control signal provided by the second control circuit and the third voltage provided by the third power supply.
  • the control electrode of the transistor T1 as the driving tube is electrically connected to the node N1, and the control electrode of the transistor T3 as the switching tube is connected to the first control circuit C1. Then, the voltage of the control electrode of the transistor T3 will not change.
  • the control electrode voltage of the coupling transistor T1 reduces the forward gamma voltage of the light-emitting diode, thereby enhancing the brightness of the light-emitting diode, thereby reducing the power consumption of the driving circuit.
  • the number of driving pulses in the first control signal is greater than or equal to the number of driving pulses in the second control signal.
  • the number of times the third transistor is turned on may be greater than or equal to the number of times the fourth transistor is turned on. If the number of times the third transistor is turned on is equal to the number of times the fourth transistor is turned on, the threshold voltage of the first transistor can be compensated as quickly as possible.
  • the number of driving pulses in the light emission control signal may be greater than or equal to 2.
  • the driving circuit provided by this application may further include a fifth transistor and a sixth transistor.
  • the first electrode of the fifth transistor can be used to be electrically connected to the second power supply
  • the control electrode of the fifth transistor can be used to be electrically connected to the lighting control circuit
  • the second electrode of the fifth transistor can be used to be electrically connected to the fourth node. connect.
  • the first pole of the sixth transistor can be used to be electrically connected to the first power supply
  • the control pole of the sixth transistor can be used to be electrically connected to the third control circuit
  • the second pole of the sixth transistor can be used to be electrically connected to the fourth node.
  • the fourth node is also used to be electrically connected to the first transistor.
  • the fifth transistor may be used to control the voltage of the fourth node according to the lighting control signal and the second voltage.
  • the sixth transistor may be used to control the voltage of the fourth node according to the third control signal and the first voltage provided by the third control circuit.
  • the frequency of the driving pulse in the third control signal may be equal to the image refresh frequency
  • the functions of the fifth transistor and the sixth transistor are to control the voltage of the fourth node, the fifth transistor and the sixth transistor are not turned on at the same time.
  • the fifth transistor may be in a conductive state
  • the voltage of the fourth node may be equal to the second voltage.
  • the sixth transistor may be in a conductive state, the voltage of the fourth node may be equal to the first voltage.
  • the first transistor may be specifically used to: control the voltage of the third node according to the voltage of the fourth node and the gate voltage of the first transistor.
  • the driving circuit provided by this application may also include a seventh transistor and an eighth transistor.
  • the first pole of the seventh transistor can be used to be electrically connected to the anode of the light-emitting diode
  • the second pole of the seventh transistor can be used to be electrically connected to the fifth power supply
  • the first pole of the eighth transistor can be used to be electrically connected to the third power supply.
  • the node is electrically connected
  • the second pole of the eighth transistor can be used to be electrically connected to the sixth power supply.
  • the control electrode of the seventh transistor and the control electrode of the eighth transistor can be used to be electrically connected to the fourth control circuit respectively, or the control electrode of the seventh transistor can be used to be electrically connected to the fifth control circuit, and the control electrode of the eighth transistor can be used to be electrically connected to the fifth control circuit. Can be used to electrically connect with the fourth control circuit.
  • control electrode of the seventh transistor and the control electrode of the eighth transistor can be used to be electrically connected to the same control circuit, or can also be connected to different control circuits respectively.
  • the seventh transistor may be used to control the anode voltage of the light-emitting diode according to the fourth control signal provided by the fourth control circuit and the fifth voltage provided by the fifth power supply.
  • the anode voltage of the light-emitting diode is controlled according to the fifth control signal and the fifth voltage provided by the fifth control circuit.
  • the eighth transistor may be used to control the voltage of the third node according to the fourth control signal and the sixth voltage provided by the sixth power supply.
  • the seventh transistor can be used to control the anode voltage of the light-emitting diode, that is, to reset the anode voltage of the light-emitting diode.
  • the voltage of the third node can be controlled through the eighth transistor, that is, the voltage of the third node can be reset.
  • the voltage of the third node can be controlled by the sixth voltage, so that the source voltage and drain voltage of the first transistor are controllable (can also be understood as reset), which can enhance
  • the negative bias temperature stress of the first transistor that is, controlling the drift of the threshold voltage of the first transistor, can avoid display screen flickering when the display device switches between different image refresh frequencies, and can avoid display at a lower image refresh frequency.
  • the screen flickers can avoid display flickering when the display device switches between different image refresh frequencies, and can avoid display at a lower image refresh frequency.
  • the number of driving pulses in the fourth control signal may be greater than or equal to the number of driving pulses in the light-emitting control signal, and the frequency of the driving pulses in the fifth control signal Can be equal to the image refresh frequency.
  • the frequency of the driving pulse in the third control signal may be equal to the image refresh frequency
  • the frequency of the driving pulse in the fifth control signal may be equal to the frequency of the driving pulse in the third control signal, and both Equal to the image refresh frequency
  • the frequency of the driving pulse in the fourth control signal may be N/2 times the frequency of the driving pulse in the third control signal.
  • N ⁇ 2 the frequency of the driving pulse in the third control signal.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 60 Hz, the frequency of the driving pulses in the control signal S3n may be 60 Hz, 40 Hz, 30 Hz, 24 Hz, etc.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 120 Hz, the frequency of the driving pulses in the control signal S3n may be 120 Hz, 80 Hz, 60 Hz, etc.
  • the fourth control signal and the third control signal can use different timings, and the driving pulse in the fourth control signal can be a higher frequency such as 360 Hz, because the frequency of the driving pulse in the third control signal can be image Refresh frequency, then different image refresh frequencies such as 120Hz, 90Hz, 72Hz, etc. can be achieved, which not only enables dynamic switching between different image refresh frequencies, but also avoids switching between different image refresh frequencies or at low refresh rates.
  • the display screen flickers when the image is maintained under the frequency, improving the stability of the displayed image (screen).
  • the first transistor, the second transistor, the fifth transistor, and the sixth transistor may respectively be low-temperature polysilicon thin film transistors.
  • the third transistor and the fourth transistor may each be an oxide thin film transistor.
  • the seventh transistor and the eighth transistor may respectively be low-temperature polysilicon thin film transistors.
  • the falling edge of the first driving pulse in the fourth control signal may be after the rising edge of the first driving pulse in the light emitting control signal.
  • the falling edge of the last driving pulse in the fourth control signal may be after the falling edge of the last driving pulse in the first control signal.
  • the rising edge of the last driving pulse in the fourth control signal may be before the falling edge of the first driving pulse in the light emitting control signal.
  • the falling edge of the driving pulse in the fifth control signal may be before the falling edge of the last driving pulse in the fourth control signal
  • the rising edge of the driving pulse in the fifth control signal may be before the falling edge of the last driving pulse in the fourth control signal. after the rising edge of the last drive pulse in .
  • the seventh transistor and the eighth transistor are low-temperature polysilicon thin film transistors respectively. Therefore, the driving circuit provided in this application can be used in dynamic display devices with high image refresh frequencies such as mobile phones and tablet computers.
  • the seventh transistor and the eighth transistor may respectively be oxide thin film transistors.
  • the rising edge of the first driving pulse in the fourth control signal may be after the rising edge of the first driving pulse in the light emitting control signal.
  • the rising edge of the last driving pulse in the fourth control signal may be after the falling edge of the last driving pulse in the first control signal.
  • the falling edge of the last driving pulse in the fourth control signal is before the falling edge of the first driving pulse in the light emitting control signal.
  • the rising edge of the driving pulse in the fifth control signal may be before the rising edge of the last driving pulse in the fourth control signal.
  • the falling edge of the driving pulse in the fifth control signal may be after the falling edge of the last driving pulse in the fourth control signal.
  • the seventh transistor and the eighth transistor are respectively made of oxide thin film transistors. Therefore, they can be suitable for static display devices with low image refresh frequencies such as watches and e-book readers.
  • This application can realize the control of the driving current of the light-emitting diode through the above-mentioned control timing of each control signal in the above two examples, that is, realize the driving of the light-emitting diode to make the light-emitting diode emit light.
  • the rising edge of the driving pulse in the third control signal may precede the falling edge of the last driving pulse in the first control signal.
  • the number of driving pulses of the first control signal, the second control signal, the third control signal and the fifth control signal is respectively in the high level period of the first driving pulse of the light emitting control signal.
  • the present application provides a display device, which may include a first power supply, a second power supply, a third power supply, a light-emitting control circuit, a first control circuit, a second control circuit, a plurality of light-emitting diodes and a plurality of the above-mentioned third power sources.
  • a display device which may include a first power supply, a second power supply, a third power supply, a light-emitting control circuit, a first control circuit, a second control circuit, a plurality of light-emitting diodes and a plurality of the above-mentioned third power sources.
  • driver circuits On the one hand and its possible implementations are provided driver circuits.
  • the first power supply, the second power supply, the third power supply, the light emitting control circuit, the first control circuit and the second control circuit can be respectively used to be electrically connected to each of the plurality of driving circuits, and the plurality of light emitting diodes can be used. To be electrically connected to multiple drive circuits in one-to-one correspondence.
  • each driving circuit can be used to: control the driving current of the corresponding light-emitting diode to realize driving of the light-emitting diode.
  • each driving circuit can compensate the threshold voltage of the first transistor according to the third transistor, and different driving circuits can eliminate the difference in the turn-on voltage of the corresponding light-emitting diodes, so that the display brightness of the display device is uniform, and the display brightness is uniform. That is, the display brightness is as consistent as possible.
  • Figure 1 is a schematic structural diagram of a display device in an embodiment of the present application.
  • Figure 2 is a schematic structural diagram of the driving circuit in the embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of the driving circuit in the embodiment of the present application.
  • Figure 4 is a schematic structural diagram of the driving circuit in the embodiment of the present application.
  • FIG. 5 is a schematic timing diagram of control signals in the embodiment of the present application.
  • Figure 6 is a schematic timing diagram of control signals in the embodiment of the present application.
  • Figure 7 is a schematic timing diagram of control signals in the embodiment of the present application.
  • Figure 8 is a schematic timing diagram of control signals in the embodiment of the present application.
  • Figure 9 is a schematic timing diagram of control signals in the embodiment of the present application.
  • Figure 10 is a schematic timing diagram of control signals in the embodiment of the present application.
  • At least one (item) refers to one or more, and “plurality” refers to two or more.
  • “And/or” is used to describe the relationship between associated objects, indicating that there can be three relationships. For example, “A and/or B” can mean: only A exists, only B exists, and A and B exist simultaneously. , where A and B can be singular or plural. The character “/” generally indicates that the related objects are in an "or” relationship. “At least one of the following” or similar expressions thereof refers to any combination of these items, including any combination of a single item (items) or a plurality of items (items).
  • At least one of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c” ”, where a, b, c can be single or multiple.
  • display devices can be divided into dynamic display devices (such as mobile phones, laptops, tablets and other dynamic display-based devices) and static display devices (such as watches, e-book readers, electronic billboards, Wall-mounted windows and other devices that mainly display static displays).
  • dynamic devices require a higher image refresh frequency
  • static devices require a lower image refresh frequency.
  • the image refresh frequency refers to the number of times the electron beam repeatedly scans the image on the display screen. The higher the image refresh frequency, the better the stability of the displayed image or screen.
  • the display device 1 may include a first power supply (PS) 1, a third power supply PS3, a second power supply PS2, a lighting control circuit CEM, a first control circuit C1, a second control circuit C2, N driving circuits, and N A light emitting diode (LED), as shown in Figure 1.
  • the N driving circuits may include the driving circuit 11, the driving circuit 12, ..., the driving circuit 1N.
  • the N light-emitting diodes may include LED1, LED2, ..., LEDN.
  • N driving circuits can be electrically connected to N light-emitting diodes in one-to-one correspondence.
  • the driving circuit 11 may be electrically connected correspondingly to the anode of the LED 1 .
  • the driving circuit 12 may be electrically connected correspondingly to the anode of the LED 2 .
  • the driving circuit 1N may be electrically connected correspondingly to the anode of the LEDN.
  • the respective cathodes of LED1 to LEDN can be connected to the common ground terminal VSS.
  • the power supply PS1, power supply PS2, power supply PS3, light emitting control circuit CEM, control circuit C1 and control circuit C2 can be used to electrically connect with each driving circuit respectively (simple diagram in Figure 1).
  • the first power supply PS1 can be used to provide each driving circuit with a first voltage V data (which can be understood as a data voltage).
  • the second power supply PS2 can be used to provide a second voltage V DD (which can be understood as an operating voltage) for each driving circuit.
  • the third power supply PS3 can be used to provide a third voltage V 3 (which can be understood as an initialization voltage) for each driving circuit.
  • the light-emitting control circuit CEM can be used to provide each driving circuit with a light-emitting control signal EM (which can be expressed as a logic level).
  • the first control circuit C1 may be used to provide each driving circuit with a control signal S1n (which may be represented by a logic level).
  • the second control circuit C2 may be used to provide each driving circuit with a control signal S2n (which may be represented by a logic level).
  • the driving circuit 11 can be used to: control the driving current of LED1 according to the first voltage V data , the second voltage V DD , the third voltage V 3 , the lighting control signal EM, the control signal S1n and the control signal S2n, that is, to drive the LED1 glow.
  • the driving circuit 12 may be used to: control the driving current of the LED 2 according to the first voltage V data , the second voltage V DD , the third voltage V 3 , the lighting control signal EM, the control signal S1n and the control signal S2n, that is, driving LED2 emits light.
  • the driving circuit 1N can be used to control the driving current of the LEDN according to the first voltage V data , the second voltage V DD , the third voltage V 3 , the lighting control signal EM, the control signal S1n and the control signal S2n, that is, driving the LEDN to emit light.
  • each driving circuit may include a transistor T1 (that is, a first transistor, serving as a driving tube), a transistor T2 (that is, a second transistor, serving as a switching tube), a transistor T3 (that is, the third transistor serves as a switching tube), transistor T4 (that is, the fourth transistor serves as a switching tube) and the storage capacitor Cst.
  • a transistor T1 that is, a first transistor, serving as a driving tube
  • a transistor T2 that is, a second transistor, serving as a switching tube
  • a transistor T3 that is, the third transistor serves as a switching tube
  • transistor T4 that is, the fourth transistor serves as a switching tube
  • the transistor T1 may be used to be electrically connected to the first power supply PS1, the second power supply PS2, the node N1 (ie, the first node) and the node N3 (ie, the third node).
  • the first electrode (which may be the source) of the transistor T1 may be used to be electrically connected to the first power supply PS1
  • the control electrode (may be the gate) of the transistor T1 may be used to be electrically connected to the node N1 (the gate of the transistor T1
  • the voltage of the transistor T1 may be equal to the voltage of the node N1)
  • the second pole (which may be the drain) of the transistor T1 may be used to be electrically connected to the node N3.
  • the transistor T2 can be used to electrically connect the node N3, the lighting control circuit CEM and the LED1.
  • the first electrode (which may be a source electrode) of the transistor T2 may be used to be electrically connected to the node N3, and the control electrode (may be a gate electrode) of the transistor T2 may be used to be electrically connected to the light-emitting control circuit CEM.
  • the second electrode (which may be the drain) of the transistor T2 may be used to be electrically connected to the anode of LED1, and the cathode of LED1 may be used to be electrically connected to the common ground terminal VSS.
  • the transistor T3 may be used to electrically connect the node N1, the first control circuit C1 and the node N2 (ie, the second node). Specifically, the first electrode (which may be a drain) of the transistor T3 may be used to be electrically connected to the node N1, and the control electrode (may be a gate) of the transistor T2 may be used to be electrically connected to the first control circuit C1. The second electrode (which may be the source electrode) may be used to be electrically connected to the node N2.
  • the transistor T4 may be used to electrically connect the node N2, the second control circuit C2 and the third power supply PS3.
  • the first electrode (which may be a drain) of the transistor T4 may be used to be electrically connected to the node N2, and the control electrode (may be a gate) of the transistor T4 may be used to be electrically connected to the second control circuit C2.
  • the second electrode (which may be a source electrode) may be used for electrical connection with the third power supply PS3.
  • the storage capacitor Cst may be used to be electrically connected to the second power supply PS2 and the node N1 (that is, the storage capacitor Cst may be electrically connected between the second power supply PS2 and the node N1). Since the second voltage V DD can be a DC voltage, and the storage capacitor Cst has the function of blocking the DC voltage, then, when the driving circuit 11 drives LED1, the second voltage V DD is blocked by the storage capacitor Cst, and the second voltage V DD is not It will have an impact on the voltage of node N1.
  • node N2 may also be used to be electrically connected to node N3. Then, the voltage of node N2 can be equal to the voltage of node N3.
  • the transistor T1, the transistor T2, the transistor T3 and the transistor T4 may be an organic thin film transistor and an inorganic thin film transistor respectively.
  • the transistor T1 and the transistor T2 may respectively be a low temperature polysilicon thin film transistor (LTPS TFT), referred to as an LTPS transistor for short.
  • LTPS TFT low temperature polysilicon thin film transistor
  • the transistor T1 and the transistor T2 can also be other types of transistors, which are not limited in the embodiments of this application.
  • the transistor T3 and the transistor T4 may respectively be an oxide thin film transistor (oxide thin film transistor, oxide TFT).
  • oxide thin film transistor oxide thin film transistor
  • the transistor T3 and the transistor T4 can also be other types of transistors, which are not limited in the embodiments of this application.
  • the storage capacitor Cst may be used to store the first voltage V data through the transistor T1.
  • the transistor T1 may be used to control the voltage of the node N3 according to the first voltage V data and the second voltage V DD stored in the storage capacitor Cst.
  • the transistor T1 is a driving transistor and the transistor T2 is a switching transistor
  • the node N3 is electrically connected to the transistor T1 and the transistor T2. Then, when the transistor T2 is in the on state, the transistor T1 controls the voltage of the node N3, which is also the anode voltage of the LED1.
  • the transistor T2 may be used to control the driving current of the LED1 according to the light emission control signal EM and the voltage of the node N3.
  • the transistor T2 can be an LTPS transistor, when the lighting control signal EM is at a low level, the transistor T2 is in a conducting state; when the lighting control signal EM is at a high level, the transistor T2 is in a conducting state. shutdown state. Then, when the transistor T2 is in the on state, the current between the drain and the source of the transistor T1 (which can be represented by I ds ) can be the driving current of LED1.
  • the transistor T4 may be used to control the voltage of the node N2 according to the second control signal S2n and the third voltage V3 .
  • the transistor T4 can be an oxide thin film transistor, when the control signal S2n is at a high level, the transistor T4 is in a conducting state; when the control signal S2n is at a low level, the transistor T4 is in shutdown state. Then, when the transistor T4 is in the on state, the voltage of the node N2 may be equal to the third voltage V 3 .
  • the voltage of node N2 can be equal to the voltage of node N3, and the transistor T1 and the transistor T4 are not in the on state at the same time, then the voltage of the node N2 can be controlled by the transistor T1 or by the transistor T1. T4 control.
  • the transistor T3 can be used to: control the gate voltage of the transistor T1 (that is, the gate voltage, which can be represented by V g ) according to the control signal S1n and the voltage of the node N2, and compensate the threshold of the transistor T1 according to the control signal S1n and the first voltage V data .
  • voltage the threshold voltage of transistor T1 compensated by transistor T3 can be expressed as V th1 ).
  • the transistor T3 can be an oxide thin film transistor, when the control signal S1n is at a high level, the transistor T3 is in the on state; when the control signal S1n is at a low level, the transistor T3 is in the off state. state.
  • the transistor T3 When the transistor T3 is in the on state, the voltage of the node N2 may be equal to the voltage of the node N1. Therefore, the role of transistor T3 can be divided into the following two aspects:
  • the voltage of the node N1 can be controlled by the third voltage V 3 , that is, the gate voltage V g of the transistor T1 can be controlled.
  • the transistor T3 may compensate the threshold voltage of the transistor T1 according to the first voltage V data .
  • k is a coefficient
  • V gs represents the voltage between the drain and source of transistor T1
  • V th2 represents the threshold voltage of transistor T1 (that is, the turn-on voltage of transistor T1).
  • each drive circuit can compensate the threshold voltage of the internal transistor T1 according to the internal transistor T3.
  • Different drive circuits can eliminate the difference in the turn-on voltage of the corresponding LED, making the display brightness of the display device uniform, and also That is, the display brightness is as consistent as possible.
  • the control electrode of the transistor T1 as the driving tube is electrically connected to the node N1, and the control electrode of the transistor T3 as the switching tube is connected to the first control circuit C1. Then, the voltage of the control electrode of the transistor T3 will not change.
  • the gate voltage of the coupling transistor T1 reduces the forward gamma voltage of the light-emitting diode, causing the light-emitting diode to The brightness is enhanced, thereby reducing the power consumption of the driving circuit.
  • the driving circuit uses a combination of oxide thin film transistors and LTPS transistors to support more gears at the same time.
  • the image refresh frequency also realizes the senseless switching between different image refresh frequencies.
  • the driving circuit 11 may also include a transistor T5 (ie, a fifth transistor, serving as a switch tube) and a transistor T6 (ie, a sixth transistor, serving as a switch tube).
  • a transistor T5 ie, a fifth transistor, serving as a switch tube
  • a transistor T6 ie, a sixth transistor, serving as a switch tube
  • the first electrode of the transistor T5 (which may be the source) may be used to electrically connect with the second power supply PS2, and the control electrode of the transistor T5 (which may be the gate) may be used to connect with the light-emitting control circuit CEM.
  • the second electrode (which may be the drain electrode) of the transistor T5 may be used to be electrically connected to the node N4 (ie, the fourth node).
  • the first electrode of the transistor T6 (which may be a source electrode) may be used to be electrically connected to the first power supply PS1, the control electrode of the transistor T6 may be used to be electrically connected to the third control circuit C3, and the second electrode of the transistor T6 (may be a drain electrode). pole) may be used for electrical connection with node N4, and node N4 may also be used for electrical connection with the first pole of transistor T1.
  • the transistor T5, the transistor T6 and the transistor T1 are electrically connected to the node N4 respectively. It can also be said that the transistor T5 is electrically connected to the transistor T1 through the node N4. Similarly, the transistor T6 is also electrically connected to the transistor T1 through the node N4.
  • the transistor T5 and the transistor T6 may also be organic thin film transistors and inorganic thin film transistors respectively.
  • the transistor T5 and the transistor T6 may respectively be LTPS transistors.
  • the transistor T5 and the transistor T6 can also be other types of transistors, which are not limited in the embodiment of this application.
  • the transistor T5 may be used to control the voltage of the node N4 according to the light emission control signal EM and the second voltage VDD . That is to say, when the thyristor T5 is in a conductive state according to the light emission control signal EM, the voltage of the node N4 may be equal to the second voltage V DD .
  • the transistor T6 may be used to control the voltage of the node N4 according to the third control signal S3n and the first voltage V data provided by the third control circuit C3. That is to say, when the thyristor T6 is in the conducting state according to the third control signal S3n, the voltage of the node N4 may be equal to the first voltage Vdata.
  • the transistor T5 and the transistor T6 can respectively be LTPS transistors, the transistor T5 can be in a conductive state when the light emission control signal EM is at a low level; when the light emission control signal EM is at a high level, the transistor T5 can be in a conducting state. , transistor T5 may be in an off state. Similarly, when the third control signal is at a low level, the transistor T6 may be in an on state; when the third control signal is at a high level, the transistor T6 may be in an off state.
  • the transistor T3 can compensate the threshold voltage of the transistor T1 according to the first voltage V data . Then, during the stage where the transistor T3 compensates the threshold voltage of the transistor T1 (which can be called the threshold compensation stage, please refer to the introduction below), the transistor T3 and the transistor T6 can be in a conductive state respectively. It should be noted that thyristor T6 will be in a conductive state during the threshold compensation stage.
  • the driving current of LED1 can be related to the second voltage V DD . Since LED1 emits light under the action of the driving current, during the light-emitting phase of LED1, the transistor T1 and the transistor T2 can be in the on state, the transistor T5 can also be in the on state, and the voltage of the node N4 can be equal to the second voltage. VDD . Furthermore, the transistor T1 can control the node according to the voltage of the node N4 and the gate voltage of the transistor T1. N3 voltage.
  • the transistor T5 and the transistor T6 both control the voltage of the node N4, the transistor T5 and the transistor T6 are not turned on at the same time.
  • the transistor T5 may be in a conductive state
  • the voltage of the node N4 may be equal to the second voltage V DD .
  • the transistor T6 may be in a conductive state
  • the voltage of the node N4 may be equal to the first voltage V data .
  • the driving circuit 11 may also include a transistor T7 (ie, a seventh transistor, serving as a switch tube) and a transistor T8 (ie, an eighth transistor, serving as a switch tube).
  • a transistor T7 ie, a seventh transistor, serving as a switch tube
  • a transistor T8 ie, an eighth transistor, serving as a switch tube
  • the first electrode of the transistor T7 (which may be a source electrode) is used to electrically connect with the anode of LED1
  • the second electrode of the transistor T7 (which may be a drain electrode) may be used to electrically connect with the fifth power supply PS5. connect.
  • the first electrode (which may be a drain electrode) of the transistor T8 may be used to be electrically connected to the sixth power supply PS6, and the second electrode (may be a source electrode) of the transistor T8 may be used to be electrically connected to the node N3.
  • control electrode of the transistor T7 and the control electrode of the transistor T8 are respectively used to be electrically connected to the fourth control circuit C4. That is to say, the respective control electrodes of the transistor T7 and the transistor T8 are connected to the same control circuit (ie, the fourth control circuit C4).
  • the transistor T7 and the transistor T8 may be respectively LTPS transistors, or both may be respectively oxide thin film transistors.
  • the transistor T7 and the transistor T8 can also be other types of transistors, which are not limited in the embodiment of this application.
  • the transistor T7 may be used to control the anode voltage of the LED1 according to the fourth control signal S4n provided by the fourth control circuit C4 and the fifth voltage V5 provided by the fifth power supply PS5. That is to say, when the transistor T7 is in the on state according to the fourth control signal S4n, the anode voltage of the LED1 may be equal to the fifth voltage V 5 .
  • the transistor T8 may be used to control the voltage of the node N3 according to the fourth control signal C4 and the sixth voltage V6 provided by the sixth power supply PS6. That is, when the transistor T8 is in the on state according to the fourth control signal S4n, the voltage of the node N3 may be equal to the sixth voltage V 6 .
  • the embodiment of the present application provides a second example of the driving circuit 11 (as shown in FIG. 4 ).
  • the control electrode of the transistor T7 in Figure 4 can be used to be electrically connected to the fifth control circuit C5, and the control electrode of the transistor T8 can be used to be electrically connected to the fourth control circuit C4. That is to say, the respective control electrodes of the transistor T7 and the transistor T8 can be connected to different control circuits.
  • the transistor T7 can be used to control the anode voltage of the LED1 according to the fifth control signal S5n provided by the fifth control circuit C5 and the fifth voltage V5 provided by the fifth power supply PS5. That is to say, when the transistor T7 is in the on state according to the fifth control signal S5n, the anode voltage of the LED1 may be equal to the fifth voltage V 5 .
  • the transistor T8 can also be used to control the voltage of the node N3 according to the fourth control signal C4 and the sixth voltage V 6 provided by the sixth power supply PS6. That is, when the transistor T8 is in the on state according to the fourth control signal S4n, the voltage of the node N3 may be equal to the sixth voltage V 6 .
  • the voltage of the node N3 can be controlled by the sixth voltage V6 , so that the source voltage of the transistor T1 (that is, the voltage of the node N4, which can be the sixth voltage V6 ) and the drain
  • the pole voltage that is, the voltage of node N3 is controllable (can also be understood as reset), which can enhance the negative bias temperature stress (positive bias temperature stress, PBTS) of transistor T1, that is, control the drift of the threshold voltage of transistor T1, which can avoid
  • PBTS positive bias temperature stress
  • the display screen flickers when the display device switches between different image refresh frequencies, and can avoid the display screen flickering at a lower image refresh frequency.
  • the display screen flashes.
  • the transistor T7 and the transistor T8 in the embodiment of the present application respectively adopt oxide thin film transistors.
  • the driving circuit 11 can support a lower image refresh frequency (such as 1/60Hz, etc.), that is, the driving circuit 11 can be used in scenarios with a lower image refresh frequency.
  • the transistor T1 and the transistor T2 are respectively LTPS transistors, and the transistor T3 and the transistor T4 are respectively an oxide thin film transistor, taking the transistor T7 and the transistor T8 respectively as an LTPS transistor as an example.
  • the control timing of the driving circuit 11 provided in Figure 3 of the embodiment of this application is introduced.
  • the transistor T7 and the transistor T8 can respectively be LTPS transistors, so with regard to FIG. 3 , when the fourth control signal S4n is low level, the transistor T7 and the transistor T8 can be in a conductive state respectively; in the fourth When the control signal S4n is at a high level, the transistor T7 and the transistor T8 may be in an off state respectively.
  • the transistor T8 when the fourth control signal S4n is low level, the transistor T8 may be in the on state; when the fourth control signal S4n is high level, the transistor T8 may be in the off state. .
  • the transistor T7 When the fifth control signal S5n is at a low level, the transistor T7 may be in an on state; when the fifth control signal S5n is at a high level, the transistor T7 may be in an off state.
  • the entire light-emitting process of the driving circuit 11 driving LED1 (that is, the driving circuit 11 controls the driving current of LED1) can be divided into a first initialization phase t1, a second initialization phase t2,
  • the specific timing diagram of the threshold compensation stage t3, the third initialization stage t4 and the light-emitting stage t5 (only part of the light-emitting stage t5 is shown) can be shown in Figure 5.
  • the light emission control signal EM and the control signal S3n are respectively high level, so the transistor T2, the transistor T5 and the transistor T6 are respectively turned off.
  • the control signal S1n and the control signal S2n are respectively at low level, and the transistor T3 and the transistor T4 are respectively turned off.
  • the control signal S4n changes from high level to low level, and then from low level to high level.
  • the transistor T7 and the transistor T8 respectively change from off to on, and then from on to off respectively.
  • the transistor T7 and the transistor T8 are turned on, realizing the control of the voltage of the node N3 (making the voltage of the node N3 be the sixth voltage V 6 ) and the control of the anode voltage of LED1 (making the voltage of LED1
  • the anode voltage is the fifth voltage V 5 ), that is, the node N3 voltage and the LED1 anode voltage are reset.
  • the control signal S1n and the control signal S2n respectively change from low level to high level, and then from high level to low level respectively.
  • the transistor T3 and the transistor T4 respectively change from off to on, and then from on to off respectively.
  • the light emission control signal EM, the control signal S3n and the control signal S4n respectively maintain a high level, so the transistors T2, T5, T6, T7 and T8 are respectively turned off.
  • the transistor T1, the transistor T3 and the transistor T4 are respectively turned on, realizing the voltage control of the node N2 and the voltage control of the node N1. Since the transistor T3 and the transistor T4 are respectively used as switching tubes, the node N1 is electrically connected to the control electrode of the transistor T1, and the node N2 is electrically connected to the node N3. Therefore, the control electrode voltage control of the transistor T1, the voltage control of the node N1, and the voltage control of the node N2 are realized.
  • Voltage control and voltage control of node N3 (making the gate voltage of transistor T1, the voltage of node N1, the voltage of node N2 and the voltage of node N3 respectively the third voltage V 3 ), that is, realizing the gate voltage of transistor T1 , the voltage of node N1, the voltage of node N2 and the respective voltage of node N3 are reset.
  • the control signal S1n changes from low level to high level, and then from high level to low level again. level.
  • the transistor T3 changes from off to on, and then from on to off.
  • the control signal S3n changes from high level to low level, and then from low level to high level.
  • the transistor T6 changes from on to off, and then from off to on.
  • the light emission control signal EM and the control signal S4n respectively maintain a high level, and the control signal S2n maintains a low level.
  • the transistor T2, the transistor T4, the transistor T5, the transistor T7, and the transistor T8 are respectively turned off.
  • the transistor T6 the transistor T3 and the transistor T1 are respectively turned on, thereby realizing the storage of the first voltage V data in the storage capacitor Cst, and realizing the compensation of the threshold voltage of the transistor T1.
  • the compensation process of the threshold voltage of the transistor T1 can be considered as the process of the transistor T1 changing from the on state to the off state.
  • the control signal S4n changes from high level to low level, and then from low level to high level.
  • the transistor T7 and the transistor T8 respectively change from off to on, and then from on to off.
  • the light emission control signal EM and the control signal S3n respectively maintain a high level, and the control signal S1n and the control signal S2n respectively maintain a low level. Therefore, the transistor T1, the transistor T2, the transistor T3, the transistor T4, the transistor T5 and the transistor T6 are respectively closed.
  • the transistor T7 and the transistor T8 are turned on respectively, realizing the voltage control of the node N3 (making the voltage of the node N3 be the sixth voltage V 6 ) and the anode voltage control of LED1 (making the LED1
  • the anode voltage is the fifth voltage V 5 ), that is, the node N3 voltage and the anode voltage of LED1 are reset.
  • the light-emitting control signal EM changes from high level to low level, and the transistor T2 and the transistor T5 are turned on respectively.
  • the control signal S1n and the control signal S2n are respectively at low level, and the transistor T3 and the transistor T4 are respectively turned off.
  • the control signal S3n and the control signal S4n are respectively at high level, and the transistor T6, the transistor T7 and the transistor T8 are respectively turned off.
  • the transistor T5 the transistor T1 and the transistor T2 are turned on respectively, realizing the driving current control of LED1, that is, realizing the driving of LED1 and making LED1 emit light.
  • control signal S3n can have one driving pulse, and since the first voltage V data can be the data voltage, it is conceivable that within an image refresh cycle, the control signal The frequency of the drive pulses in signal S3n may be equal to the image refresh frequency.
  • the control signal S4n may have two driving pulses, and the control signal S3n may have one driving pulse. Therefore, it is conceivable that the frequency of the driving pulses in the control signal S4n may be twice the frequency of the driving pulses in the control signal S3n.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 60 Hz, the frequency of the driving pulses in the control signal S3n may be 60 Hz, 40 Hz, 30 Hz, 24 Hz, etc.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 120 Hz, the frequency of the driving pulses in the control signal S3n may be 120 Hz, 80 Hz, 60 Hz, etc.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 180 Hz, the frequency of the driving pulses in the control signal S3n may be 120 Hz, 90 Hz, 72 Hz, etc.
  • the driving pulse in the control signal S4n when the frequency of the driving pulse in the control signal S4n is 240 Hz, the driving pulse in the control signal S3n
  • the frequency of dynamic pulse can be 120Hz, 96Hz, 80Hz, etc.
  • the frequency of the driving pulses in the control signal S4n when the frequency of the driving pulses in the control signal S4n is 360Hz, the frequency of the driving pulses in the control signal S3n may be 144Hz, 120Hz, 102.86Hz, 90Hz, 80Hz, etc.
  • the frequency of the driving pulses in the control signal S4n may be N/2 times the frequency of the driving pulses in the control signal S3n; where N ⁇ 2, and N is an integer.
  • the control signal S4n and the control signal S3n in the embodiment of the present application can adopt different timings.
  • the driving pulse in the control signal S4n can be a higher frequency such as 360Hz. Since the frequency of the driving pulse in the control signal S3n can be the image refresh frequency, Then different image refresh frequencies such as 120Hz, 90Hz, 72Hz, etc. can be achieved, which not only enables dynamic switching between different image refresh frequencies, but also avoids display flickering when switching between different image refresh frequencies or maintaining the picture at a low refresh frequency. , improve the stability of the displayed image (screen).
  • the falling edge of the first driving pulse in the control signal S4n may be after the rising edge of the first driving pulse in the light emission control signal EM. That is to say, during the image refresh period, the transistors T2 and T7 are turned off only after the transistors T7 and T8 are turned on.
  • the falling edge of the second driving pulse (ie, the last driving pulse in the driving process) in the control signal S4n may be after the falling edge of the second driving pulse (ie, the last driving pulse) in the control signal S1n. That is to say, during the image refresh period, after the transistor T3 is turned off for the second time, the transistor T7 and the transistor T8 are turned on respectively.
  • the rising edge of the second driving pulse in the control signal S4n may be before the falling edge of the first driving pulse in the light emission control signal EM. That is to say, during the image refresh period, after the transistor T7 and the transistor T8 are respectively turned off, the transistor T2 and the transistor T7 are respectively turned on for the first time.
  • the rising edge of the driving pulse in the control signal S3n may be before the falling edge of the second driving pulse in the control signal S1n. That is to say, during the image refresh period, the transistor T3 is turned off only after the transistor T6 is turned off.
  • the numbers of the driving pulses of the control signal S1n, the control signal S2n, and the control signal S3n are respectively in the high level period of the first driving pulse of the emission control signal EM. That is to say, within an image refresh period, the state switching of the transistor T3, the transistor T4, the transistor T6, the transistor T7 and the transistor T8 is performed when the transistor T5 and the transistor T2 are respectively in the off state.
  • the luminescence control signal EM can have 4 driving pulses in an image refresh period (in the embodiment of this application, the luminescence control signal EM has 4 driving pulses in the image refresh period T corresponding to the image refresh frequency of 120 Hz). Take an example to illustrate).
  • the first driving pulse of the light-emitting control signal EM corresponds to the five stages of the driving process
  • the second to fourth driving pulses of the light-emitting control signal EM correspond to the light-emitting maintenance stage.
  • the control signal S4n has two driving pulses during the high-level period of the first driving pulse of the light-emitting control signal EM, and the control signal S4n may have one driving pulse during the high-level period of the third driving pulse of the light-emitting control signal EM. That is, within an image refresh week During this period, the control signal S4n can have three driving pulses.
  • ta in Figure 6 represents the duration of the first two driving pulses in the low-level period in the control signal S4n (corresponding to the conduction duration of the transistor T7 and the transistor T8), and t b represents the driving duration in the light-emitting control signal EM.
  • the duration of the pulse in the low level period (corresponding to the conduction duration of transistor T2 and transistor T5).
  • the pulse widths of the first two driving pulses in the control signal S4n can be the same, and the pulse width of the third driving pulse can be greater than the pulse widths of the first two driving pulses.
  • the entire lighting process of the driving circuit 11 driving the LED1 can also be divided into a first initialization stage t1, a second initialization stage t2, a threshold compensation stage t3, and a third initialization stage.
  • the specific timing diagram of the stage t4 and the light-emitting stage t5 (only part of the light-emitting stage t5 is also shown) can be shown in Figure 7 .
  • the falling edge of the driving pulse in the control signal S5n may be before the falling edge of the second driving pulse in the control signal S4n.
  • the rising edge of the driving pulse in the control signal S5n may follow the rising edge of the second driving pulse in the control signal S4n. That is to say, after the transistor T7 is turned on, the transistor T8 can be turned on for the second time. And after the transistor T8 is turned off for the second time, the transistor T7 can be turned off.
  • the timing of the light-emitting control signal EM, the control signal S1n, the control signal S2n, the control signal S3n, and the control signal S4n in FIG. 7 is the same as that of the light-emitting control signal EM, the control signal S1n, the control signal S2n, and the control signal in FIG. 5
  • the timing of the signal S3n and the control signal S4n is the same, and will not be described again in the embodiment of this application.
  • the transistor T7 and the transistor T8 use LTPS transistors. Therefore, they can be applied to dynamic displays with high image refresh frequencies such as mobile phones and tablet computers. equipment.
  • the transistor T1 and the transistor T8 are respectively LTPS transistors and the transistor T3 and the transistor T4 are respectively an oxide thin film transistor, the transistor T7 and the transistor T8 are respectively an oxide thin film transistor.
  • the control timing of the drive circuit 11 provided in Figure 3 of the embodiment of the present application is introduced.
  • the transistor T7 and the transistor T8 can respectively be oxide thin film transistors, with reference to FIG. 3 , when the fourth control signal S4n is low level, the transistor T7 and the transistor T8 can be in the off state respectively; in When the fourth control signal S4n is high level, the transistor T7 and the transistor T8 may be in a conductive state respectively.
  • the transistor T8 when the fourth control signal S4n is at a low level, the transistor T8 may be in an off state; when the fourth control signal S4n is at a high level, the transistor T8 may be in an on state. .
  • the transistor T7 When the fifth control signal S5n is at a low level, the transistor T7 may be in an off state; when the fifth control signal S5n is at a high level, the transistor T7 may be in an on state.
  • the entire lighting process of LED1 driven by the driving circuit 11 can also be divided into a first initialization stage t1, a second initialization stage t2, and a threshold compensation stage t3.
  • the third initialization stage t4 and the light-emitting stage t5 (only part of the light-emitting stage t5 is also shown), the specific timing diagram can be shown in Figure 8.
  • the rising edge of the first driving pulse in the control signal S4n may be after the rising edge of the first driving pulse in the light emission control signal EM. That is to say, within an image refresh period, after the transistor T2 and the transistor T5 are respectively turned off, the transistor T7 and the transistor T8 can be turned on respectively.
  • the rising edge of the second driving pulse in the control signal S4n may follow the falling edge of the second driving pulse in the control signal S1n. That is to say, within an image refresh cycle, after the transistor T3 is turned off for the second time, the transistor T7 and the transistor T8 can be turned on respectively.
  • the falling edge of the second driving pulse in the control signal S4n may precede the falling edge of the first driving pulse in the light emitting control signal EM. That is to say, within an image refresh period, after the transistor T7 and the transistor T8 are respectively turned off for the second time, the transistor T2 and the transistor T5 can be turned on respectively.
  • the rising edge of the driving pulse in the control signal S3n may be before the falling edge of the second driving pulse in the control signal S1n. That is to say, during the image refresh period, the transistor T3 is turned off only after the transistor T6 is turned off.
  • the numbers of the driving pulses of the control signal S1n, the control signal S2n, and the control signal S3n are respectively in the high level period of the first driving pulse of the emission control signal EM. That is to say, within an image refresh period, the state switching of the transistor T3, the transistor T4, the transistor T6, the transistor T7 and the transistor T8 is performed when the transistor T5 and the transistor T2 are respectively in the off state.
  • the entire lighting process of the driving circuit 11 driving the LED1 can also be divided into a first initialization stage t1, a second initialization stage t2, a threshold compensation stage t3, and a third initialization stage t3.
  • Three initialization stages t4 and light-emitting stages t5 (only part of the light-emitting stage t5 is shown), the specific timing diagram can be shown in Figure 9.
  • the rising edge of the driving pulse in the control signal S5n may be before the rising edge of the second driving pulse in the control signal S4n.
  • the falling edge of the driving pulse in the control signal S5n may follow the falling edge of the second driving pulse in the control signal S4n. That is to say, after the transistor T7 is turned on, the transistor T8 can be turned on for the second time. And after the transistor T8 is turned off for the second time, the transistor T7 can be turned off.
  • the timing of the light-emitting control signal EM, the control signal S1n, the control signal S2n, the control signal S3n, and the control signal S4n in FIG. 9 is the same as that of the light-emitting control signal EM, the control signal S1n, the control signal S2n, and the control signal in FIG. 5
  • the timing of the signal S3n and the control signal S4n is the same, and will not be described again in the embodiment of this application.
  • the number of driving pulses in the control signal S1n can be greater than the number of driving pulses in the control signal S2n.
  • the number of driving pulses in the control signal S1n may also be equal to the number of driving pulses in the control signal S2n.
  • control signal S2n has one drive pulse
  • control signal S1n may also have one drive pulse. Therefore, during the entire driving process of the LED, the transistor T3 can be turned on once, and the compensation of the threshold voltage of the transistor T1 can be completed as quickly as possible.
  • the transistor T7 and the transistor T8 use oxide thin film transistors. Therefore, they can be applied to watches, e-book readers and other devices with low image refresh frequencies. Static display device.
  • the disclosed systems and devices can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application can be integrated into one processing unit, each unit can exist physically alone, or two or more units can be integrated into one unit.
  • the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application.
  • the aforementioned storage media include: U disk, mobile hard disk, Read Only Memory (ROM), Random Access Memory (RAM), magnetic disk or optical disk and other media that can store program code.

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Abstract

提供了一种驱动电路和显示设备,开关管(T2-T4)的控制极电压变化不会耦合驱动管(T1)的控制极电压,降低了发光二极管(LED1)的正向伽马电压,使得发光二极管(LED1)的亮度增强,进而降低了驱动电路的功耗。驱动电路可以同时支持不同档位的图像刷新频率,且实现了不同图像刷新频率之前的无感切换。驱动电路可以包括存储电容(Cst)、驱动管(T1)和开关管(T2-T4)。驱动管(T1)可以用于控制发光二极管(LED1)的驱动电流,开关管(T2-T4)可以控制驱动管(T1)的控制极电压,补偿驱动管(T1)的阈值电压。

Description

驱动电路和显示设备
本申请要求于2022年04月02日提交中国专利局、申请号为202210343133.3、申请名称为“驱动电路和显示设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及半导体技术领域,更具体地,涉及一种控制电路和显示设备。
背景技术
随着科技的飞速发展,半导体器件在显示设备(如手机、手表等)得到了广泛的应用。显示设备可以包括多个发光器件(如发光二极管等)和多个用于驱动发光二极管的驱动电路。
相关技术提供的驱动电路中,开关管(如晶体管等)的控制极电压变化会耦合驱动管(如晶体管等)的控制极电压,使发光二极管的正向伽马电压增大,也就是发光二极管的亮度减弱,导致驱动电路的功耗较大。
因此,亟需一种能够增强发光二极管的亮度、降低驱动电路功耗的技术方案。
发明内容
本申请提供了一种驱动电路和显示设备,开关管的控制极电压变化不会耦合驱动管的控制极电压,降低了发光二极管的正向伽马电压,使得发光二极管的亮度增强,进而降低驱动电路的功耗。
第一方面,本申请提供了一种驱动电路,可以包括第一晶体管(作为驱动管)、第二晶体管(作为开关管)、第三晶体管(作为开关管)、第四晶体管(作为开关管)和存储电容。
其中,第一晶体管可以用于与第一电源、第二电源、第一节点和第三节点电连接。第二晶体管可以用于与第三节点、发光控制电路和发光二极管电连接。第三晶体管可以用于与第一节点、第一控制电路和第二节点电连接。第四晶体管可以用于与第二节点、第二控制电路和第三电源电连接。存储电容可以用于与第二电源和第一节点电连接(也就是说,存储电容可以电连接于第二电源和第一节点之间),第二节点还用于与第三节点电连接。可以想到的是,第二节点的电压可以等于第三节点的电压。
根据上述电连接关系,可以进一步得到:
存储电容可以用于:通过第一晶体管存储第一电源提供的第一电压。
需要说明的是,由于第二电压可以为直流电压,存储电容具有隔断直流电压的作用,那么,在驱动电路驱动发光二极管的过程中,第二电压被存储电容阻止,第二电压不会对第一节点的电压有影响。
第一晶体管可以用于:根据存储电容存储的第一电压和第二电源提供的第二电压控制第三节点的电压。
第二晶体管可以用于:根据发光控制电路提供的发光控制信号和第三节点的电压控制发光二极管的驱动电流。
第三晶体管可以用于:根据第一控制电路提供的第一控制信号和第二节点的电压控制第一晶体管的控制极电压。还可以用于根据第一控制信号和第一电源提供的第一电压补偿第一晶体管的阈值电压。
第四晶体管可以用于:根据第二控制电路提供的第二控制信号和第三电源提供的第三电压控制第二节点的电压。
本申请提供的驱动电路中,作为驱动管的晶体管T1的控制极电连接到节点N1,作为开关管的晶体管T3的控制极连接第一控制电路C1,那么,晶体管T3的控制极电压变化不会耦合晶体管T1的控制极电压,降低了发光二极管的正向伽马电压,使得发光二极管的亮度增强,进而降低了驱动电路的功耗。
一示例中,在一个图像刷新周期内,第一控制信号中驱动脉冲的个数大于或等于第二控制信号中驱动脉冲的个数。
也就是说,在一个图像刷新周期内,第三晶体管的导通次数可以大于或等于第四晶体管的导通次数。若第三晶体管的导通次数等于第四晶体管的导通次数,则可以尽快补偿第一晶体管阈值电压。
另一示例中,在一个图像刷新周期内,发光控制信号中驱动脉冲的个数可以大于或等于2。
在一种可能的实现方式中,本申请提供的驱动电路还可以包括第五晶体管和第六晶体管。
其中,第五晶体管的第一极可以用于与第二电源电连接,第五晶体管的控制极可以用于与发光控制电路电连接,第五晶体管的第二极可以用于与第四节点电连接。
第六晶体管的第一极可以用于与第一电源电连接,第六晶体管的控制极可以用于与第三控制电路电连接,第六晶体管的第二极可以用于与第四节点电连接,第四节点还用于与第一晶体管电连接。
根据上述电连接关系,可以进一步得到:
第五晶体管可以用于:根据发光控制信号和第二电压控制第四节点的电压。
第六晶体管可以用于:根据第三控制电路提供的第三控制信号和第一电压控制第四节点的电压。
在本申请一些实施例中,一个图像刷新周期内,第三控制信号中的驱动脉冲的频率可以等于图像刷新频率。
可以理解的是,虽然第五晶体管和第六晶体管的作用都是控制第四节点的电压,但是,第五晶体管和第六晶体管并不会同时导通。在第五晶体管可以处于导通状态下,第四节点的电压可以等于第二电压。在第六晶体管可以处于导通状态下,第四节点的电压则可以等于第一电压。
于是,第一晶体管可以具体用于:根据第四节点的电压和第一晶体管的控制极电压控制第三节点的电压。
进一步地,本申请提供的驱动电路还可以包括第七晶体管和第八晶体管。
其中,第七晶体管的第一极可以用于与发光二极管的阳极电连接,第七晶体管的第二极可以用于与第五电源电连接,第八晶体管的第一极可以用于与第三节点电连接,第八晶体管的第二极可以用于与第六电源电连接。
第七晶体管的控制极和第八晶体管的控制极可以分别用于与第四控制电路电连接,或者,第七晶体管的控制极可以用于与第五控制电路电连接,第八晶体管的控制极可以用于与第四控制电路电连接。
也就是说,第七晶体管的控制极和第八晶体管的控制极可以用于与同一控制电路电连接,还可以分别连接不同控制电路。
根据上述电连接关系,可以进一步得到:
第七晶体管可以用于:根据第四控制电路提供的第四控制信号和第五电源提供的第五电压控制发光二极管的阳极电压。或者,根据第五控制电路提供的第五控制信号和第五电压控制发光二极管的阳极电压。
第八晶体管可以用于:根据第四控制信号和第六电源提供的第六电压控制第三节点的电压。
可以看出,通过第七晶体管可以实现发光二极管的阳极电压的控制,也就是实现发光二极管的阳极电压的重置。通过第八晶体管可以实现第三节点的电压的控制,也就是实现第三节点的电压的重置。
本申请实施例在第八晶体管导通的状态下,可以通过第六电压控制第三节点的电压,使第一晶体管的源极电压和漏极电压可控(也可以理解为复位),可以增强第一晶体管的负偏压温度应力,也就是控制第一晶体管阈值电压的漂移,能够避免显示设备在不同图像刷新频率之间切换过程中显示屏幕闪烁,且可以避免在较低图像刷新频率下显示屏幕闪烁。
在一种可能的实现方式中,一个图像刷新周期内,第四控制信号中的驱动脉冲的个数可以大于或等于发光控制信号中驱动脉冲的个数,第五控制信号中的驱动脉冲的频率可以等于图像刷新频率。
可以想到的是,由于第三控制信号中的驱动脉冲的频率可以等于图像刷新频率,所以,第五控制信号中的驱动脉冲的频率与第三控制信号中的驱动脉冲的频率可以相等,并且都等于图像刷新频率。
在本申请一些实施例中,第四控制信号中的驱动脉冲的频率可以为第三控制信号中驱动脉冲的频率的N/2倍。其中,N≥2,且N为整数。
例如,控制信号S4n中驱动脉冲的频率为60Hz时,控制信号S3n中驱动脉冲的频率可以为60Hz、40Hz、30Hz、24Hz等。
又例如,控制信号S4n中驱动脉冲的频率为120Hz时,控制信号S3n中驱动脉冲的频率可以为120Hz、80Hz、60Hz等。
可以想到的是,第四控制信号和第三控制信号可以采用不同的时序,第四控制信号可以中驱动脉冲可以为360Hz等较高的频率,由于第三控制信号中驱动脉冲的频率可以为图像刷新频率,那么可以实现120Hz、90Hz、72Hz等不同的图像刷新频率,不仅能够实现不同图像刷新频率之间的动态切换,而且能够避免不同图像刷新频率之间切换或在低刷新 频率下维持画面时显示屏闪烁,提高所显示图像(画面)的稳定性。
在一种可能的实现方式中,第一晶体管、第二晶体管、第五晶体管和第六晶体管分别可以为低温多晶硅薄膜晶体管。第三晶体管和第四晶体管分别可以为氧化物薄膜晶体管。
进一步地,在一示例中,第七晶体管和第八晶体管可以分别为低温多晶硅薄膜晶体管。
于是,第四控制信号中第一个驱动脉冲的下降沿可以在发光控制信号中的第一个驱动脉冲的上升沿之后。第四控制信号中的最后一个驱动脉冲的下降沿可以在第一控制信号中最后一个驱动脉冲的下降沿之后。第四控制信号中的最后一个驱动脉冲的上升沿可以在发光控制信号中的第一个驱动脉冲的下降沿之前。
在本申请一些实施例中,第五控制信号中驱动脉冲的下降沿可以在第四控制信号中最后一个驱动脉冲的下降沿之前,第五控制信号中驱动脉冲的上升沿可以在第四控制信号中最后一个驱动脉冲的上升沿之后。
可以想到的是,第七晶体管和第八晶体管分别为低温多晶硅薄膜晶体管,因此,本申请提供的驱动电路可以用于手机、平板电脑等图像刷新频率较高的动态显示设备。
在另一示例中,第七晶体管和第八晶体管可以分别为氧化物薄膜晶体管。
于是,第四控制信号中第一个驱动脉冲的上升沿可以在发光控制信号中的第一个驱动脉冲的上升沿之后。第四控制信号中最后一个驱动脉冲的上升沿可以在第一控制信号中最后一个驱动脉冲的下降沿之后。第四控制信号中最后一个驱动脉冲的下降沿在所述发光控制信号中的第一个驱动脉冲的下降沿之前。
在本申请一些实施例中,第五控制信号中驱动脉冲的上升沿可以在第四控制信号中最后一个驱动脉冲的上升沿之前。第五控制信号中驱动脉冲的下降沿可以在第四控制信号中最后一个驱动脉冲的下降沿之后。
可以想到的是,第七晶体管和第八晶体管分别为分别采用氧化物薄膜晶体管,因此,可以适用于手表、电子书阅读器等图像刷新频率较低的静态显示设备。
本申请可以通过上述两种示例中各控制信号的上述控制时序,实现发光二极管驱动电流的控制,也就是实现发光二级管的驱动,使发光二级管发光。
在一种可能的实现方式中,第三控制信号中驱动脉冲的上升沿可以第一控制信号中最后一个驱动脉冲的下降沿之前。
在本申请一些实施例中,第一控制信号、第二控制信号、第三控制信号和第五控制信号各自的驱动脉冲的个数分别在发光控制信号的第一个驱动脉冲的高电平时段。
第二方面,本申请提供了一种显示设备,可以包括第一电源、第二电源、第三电源、发光控制电路、第一控制电路、第二控制电路、多个发光二极管和多个上述第一方面及其可能的实现方式提供的驱动电路。
其中,第一电源、第二电源、第三电源、发光控制电路、第一控制电路和第二控制电路可以分别用于与多个驱动电路中每个驱动电路电连接,多个发光二极管可以用于与多个驱动电路一一对应地电连接。
于是,每个驱动电路可以用于:控制对应的发光二极管的驱动电流,实现发光二极管的驱动。
可以想到的是,每个驱动电路可以根据第三晶体管补偿第一晶体管的阈值电压,不同驱动电路可以消除对应的发光二极管的开启电压的差异,使显示设备的显示亮度均匀,也 就是显示亮度尽可能相同。
应当理解的是,本申请的第二方面与本申请的第一方面的技术方案一致,各方面及对应的可行实施方式所取得的有益效果相似,不再赘述。
附图说明
图1为本申请实施例中显示设备的一种示意性结构图;
图2为本申请实施例中驱动电路的一种示意性结构图;
图3为本申请实施例中驱动电路的一种示意性结构图;
图4为本申请实施例中驱动电路的一种示意性结构图;
图5为本申请实施例中控制信号的一种示意性时序图;
图6为本申请实施例中控制信号的一种示意性时序图;
图7为本申请实施例中控制信号的一种示意性时序图;
图8为本申请实施例中控制信号的一种示意性时序图;
图9为本申请实施例中控制信号的一种示意性时序图;
图10为本申请实施例中控制信号的一种示意性时序图。
具体实施方式
下面将结合附图,对本申请中的技术方案进行描述。
本申请的说明书实施例和权利要求书及附图中的术语“第一”、“第二”等仅用于区分描述的目的,而不能理解为指示或暗示相对重要性,也不能理解为指示或暗示顺序。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元。方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
应当理解,在本申请中,“至少一个(项)”是指一个或者多个,“多个”是指两个或两个以上。“和/或”,用于描述关联对象的关联关系,表示可以存在三种关系,例如,“A和/或B”可以表示:只存在A,只存在B以及同时存在A和B三种情况,其中A,B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达,是指这些项中的任意组合,包括单项(个)或复数项(个)的任意组合。例如,a,b或c中的至少一项(个),可以表示:a,b,c,“a和b”,“a和c”,“b和c”,或“a和b和c”,其中a,b,c可以是单个,也可以是多个。
随着科技的飞速发展,半导体器件(如晶体管)在显示设备得到了广泛的应用。按照显示设备的应用场景,显示设备可以分为动态显示设备(如手机、笔记本电脑、平板电脑等以动态显示为主的设备)和静态显示设备(如手表、电子书阅读器、电子广告牌、壁挂视窗等以静态显示为主的设备)。相比较而言,动态设备要求的图像刷新频率较高,而静态设备要求的图像刷新频率较低。其中,图像刷新频率是指电子束对显示屏幕上的图像重复扫描的次数。图像刷新频率越高,所显示的图像或画面稳定性就越好。
为了满足不同显示设备的图像刷新频率要求,本申请实施例提供了一种显示设备,如图1所示。显示设备1可以包括第一电源(power supply,PS)1、第三电源PS3、第二电源PS2、发光控制电路CEM、第一控制电路C1、第二控制电路C2、N个驱动电路和N 个发光二极管(light emitting diode,LED),如图1所示。N个驱动电路可以包括驱动电路11、驱动电路12、…、驱动电路1N。N个发光二极管可以包括LED1、LED2、…、LEDN。
其中,N个驱动电路可以与N个发光二极管一一对应地电连接。
例如,驱动电路11可以与LED1的阳极对应地电连接。
还例如,驱动电路12可以与LED2的阳极对应地电连接。
又例如,驱动电路1N可以与LEDN的阳极对应地电连接。
示例性的,LED1至LEDN各自阴极可以连接公共接地端VSS。
在本申请一些实施例中,电源PS1、电源PS2、电源PS3、发光控制电路CEM、控制电路C1和控制电路C2可以分别用于与每个驱动电路电连接(图1中简单示意)。
根据上述电连接关系,可以确定:
第一电源PS1可以用于:为每个驱动电路提供第一电压Vdata(可以理解为数据电压)。
第二电源PS2可以用于:为每个驱动电路提供第二电压VDD(可以理解为工作电压)。
第三电源PS3可以用于:为每个驱动电路提供第三电压V3(可以理解为初始化电压)。
发光控制电路CEM可以用于:为每个驱动电路提供发光控制信号EM(可以用逻辑电平表示)。
第一控制电路C1可以用于:为每个驱动电路提供控制信号S1n(可以用逻辑电平表示)。
第二控制电路C2可以用于:为每个驱动电路提供控制信号S2n(可以用逻辑电平表示)。
于是,驱动电路11可以用于:根据第一电压Vdata、第二电压VDD、第三电压V3、发光控制信号EM、控制信号S1n和控制信号S2n控制LED1的驱动电流,也就是驱动LED1发光。
类似地,驱动电路12可以用于:根据第一电压Vdata、第二电压VDD、第三电压V3、发光控制信号EM、控制信号S1n和控制信号S2n控制LED2的驱动电流,也就是驱动LED2发光。
驱动电路1N可以用于:根据第一电压Vdata、第二电压VDD、第三电压V3、发光控制信号EM、控制信号S1n和控制信号S2n控制LEDN的驱动电流,也就是驱动LEDN发光。
进一步地,如图2所示,每个驱动电路(以驱动电路11为例)可以包括晶体管T1(即第一晶体管,作为驱动管)、晶体管T2(即第二晶体管,作为开关管)、晶体管T3(即第三晶体管,作为开关管)、晶体管T4(即第四晶体管,作为开关管)和存储电容Cst。
在本申请一些实施例中,晶体管T1可以用于与第一电源PS1、第二电源PS2、节点N1(即第一节点)和节点N3(即第三节点)电连接。具体地,晶体管T1的第一极(可以为源极)可以用于与第一电源PS1电连接,晶体管T1的控制极(可以为栅极)可以用于与节点N1电连接(晶体管T1的栅极电压可以等于节点N1的电压),晶体管T1的第二极(可以为漏极)可以用于与节点N3电连接。
晶体管T2可以用于与节点N3、发光控制电路CEM和LED1电连接。具体地,晶体管T2的第一极(可以为源极)可以用于与节点N3电连接,晶体管T2的控制极(可以为栅极)可以用于与发光控制电路CEM电连接。晶体管T2的第二极(可以为漏极)可以用于与LED1的阳极电连接,LED1的阴极可以用于与公共接地端VSS电连接。
晶体管T3可以用于与节点N1、第一控制电路C1和节点N2(即第二节点)电连接。具体地,晶体管T3的第一极(可以为漏极)可以用于与节点N1电连接,晶体管T2的控制极(可以为栅极)可以用于与第一控制电路C1电连接,晶体管T2的第二极(可以为源极)可以用于与节点N2电连接。
晶体管T4可以用于与节点N2、第二控制电路C2和第三电源PS3电连接。具体地,晶体管T4的第一极(可以为漏极)可以用于与节点N2电连接,晶体管T4的控制极(可以为栅极)可以用于与第二控制电路C2电连接,晶体管T4的第二极(可以为源极)可以用于与第三电源PS3电连接。
存储电容Cst可以用于与第二电源PS2和节点N1电连接(也就是说,存储电容Cst可以电连接于第二电源PS2和节点N1之间)。由于第二电压VDD可以为直流电压,存储电容Cst具有隔断直流电压的作用,那么,在驱动电路11驱动LED1的过程中,第二电压VDD被存储电容Cst阻止,第二电压VDD不会对节点N1的电压有影响。
在另一些实施例中,节点N2还可以用于与节点N3电连接。那么,节点N2的电压则可以等于节点N3的电压。
示例性的,晶体管T1、晶体管T2、晶体管T3和晶体管T4可以分别为有机薄膜晶体管和无机薄膜晶体管。
在另一些实施例中,晶体管T1和晶体管T2可以分别为低温多晶硅薄膜晶体管(low temperature poly silicon thin film transistor,LTPS TFT),简称为LTPS晶体管。当然,晶体管T1和晶体管T2还可以为其他类型的晶体管,本申请实施例不做限定。
晶体管T3和晶体管T4可以分别为氧化物薄膜晶体管(oxide thin film transistor,oxide TFT)。当然,晶体管T3和晶体管T4还可以为其他类型的晶体管,本申请实施例不做限定。
根据上述电连接关系,可以进一步得到:
存储电容Cst可以用于:通过晶体管T1存储第一电压Vdata
可以理解的是,存储电容Cst存储第一电压Vdata的过程中,晶体管T1为导通状态。
晶体管T1可以用于:根据存储电容Cst存储的第一电压Vdata和第二电压VDD控制节点N3的电压。
可以理解的是,由于晶体管T1为驱动管,晶体管T2为开关管,节点N3与晶体管T1和晶体管T2电连接。那么,在晶体管T2处于导通状态下,晶体管T1控制节点N3的电压也就是控制LED1的阳极电压。
晶体管T2可以用于:根据发光控制信号EM和节点N3的电压控制LED1的驱动电流。
可以理解的是,由于晶体管T2可以为LTPS晶体管,所以在发光控制信号EM为低电平的情况下,晶体管T2处于导通状态;在发光控制信号EM为高电平的情况下,晶体管T2处于关断状态。那么,在晶体管T2处于导通状态下,晶体管T1的漏极和源极之间的电流(可以用Ids表示)则可以为LED1的驱动电流。
晶体管T4可以用于:根据第二控制信号S2n和第三电压V3控制节点N2的电压。
可以理解的是,由于晶体管T4可以为氧化物薄膜晶体管,所以在控制信号S2n为高电平的情况下,晶体管T4处于导通状态;在控制信号S2n为低电平的情况下,晶体管T4 处于关断状态。那么,在晶体管T4处于导通状态下,节点N2的电压则可以等于第三电压V3
还可以理解的是,由于节点N2的电压可以等于节点N3的电压,而且,晶体管T1和晶体管T4不会同时处于导通状态,那么,节点N2的电压即可以由晶体管T1控制,也可以由晶体管T4控制。
晶体管T3可以用于:根据控制信号S1n和节点N2的电压控制晶体管T1的控制极电压(即栅极电压,可以用Vg表示),根据控制信号S1n和第一电压Vdata补偿晶体管T1的阈值电压(晶体管T3补偿的晶体管T1的阈值电压可以用Vth1表示)。
具体地,由于晶体管T3可以为氧化物薄膜晶体管,所以在控制信号S1n为高电平的情况下,晶体管T3处于导通状态;在控制信号S1n为低电平的情况下,晶体管T3处于关断状态。在晶体管T3处于导通状态下,节点N2的电压则可以等于节点N1的电压。于是,晶体管T3的作用可以分为以下两个方面:
一方面,晶体管T3和晶体管T4都处于导通状态下,可以通过第三电压V3控制节点N1的电压,也就是控制晶体管T1的控制极电压Vg
那么,通过晶体管T3和晶体管T4控制晶体管T1的控制极电压Vg的过程可以理解为驱动电路11的初始化阶段t2(可以参考下文介绍)。
可以理解的是,只有在控制晶体管T1的控制极电压Vg的过程中,晶体管T3和晶体管T4才会分别处于导通状态。
另一方面,在晶体管T3处于导通状态且晶体管T4处于关断状态下,晶体管T3可以根据第一电压Vdata补偿晶体管T1的阈值电压。
在一示例中,晶体管T1的漏极和源极之间的电流Ids可以用以下公式(1)表示:
Ids=k(Vgs-Vth2)2    公式(1)
公式(1)中,k为系数,Vgs表示晶体管T1的漏极和源极之间的电压,Vth2表示晶体管T1的阈值电压(即晶体管T1的开启电压)。
由于Vgs=Vg-Vs,且Vg=Vdata+Vth1,那么,可以有以下公式(2):
Ids=k(Vgs-Vth2)2=k(Vdata+Vth1-VDD-Vth2)2    公式(2)
又由于晶体管T3补偿的晶体管T1的阈值电压Vth1可以与晶体管T1的开启电压Vth2抵消,于是,可以有以下公式(3):
Ids=k(Vdata-VDD)2    公式(3)
从公式(3)可以看出,晶体管T1的开启电压Vth2没有对晶体管T1的漏极和源极之间的电流Id产生影响。也就是说,晶体管T1的开启电压Vth2没有对LED1的驱动电流产生影响。
从上述晶体管T3的作用可以看出,每个驱动电路可以根据内部晶体管T3补偿内部晶体管T1的阈值电压,不同驱动电路可以消除对应的LED的开启电压的差异,使显示设备的显示亮度均匀,也就是显示亮度尽可能相同。
本申请提供的驱动电路中,作为驱动管的晶体管T1的控制极电连接到节点N1,作为开关管的晶体管T3的控制极连接第一控制电路C1,那么,晶体管T3的控制极电压变化不会耦合晶体管T1的控制极电压,降低了发光二极管的正向伽马电压,使得发光二极管 的亮度增强,进而降低了驱动电路的功耗。
另外,由于氧化物薄膜晶体管具有漏电流低的特点,LTPS晶体管具有电子迁移率高的特点,本申请实施例提供的驱动电路将氧化物薄膜晶体管和LTPS晶体管组合使用,可以同时支持更多档位的图像刷新频率,同时实现了不同图像刷新频率之前的无感切换。
在一种可能的实现方式中,如图3所示,驱动电路11还可以包括晶体管T5(即第五晶体管,作为开关管)和晶体管T6(即第六晶体管,作为开关管)。
在本申请一些实施例中,晶体管T5的第一极(可以为源极)可以用于与第二电源PS2电连接,晶体管T5的控制极(可以为栅极)可以用于与发光控制电路CEM电连接,晶体管T5的第二极(可以为漏极)可以用于与节点N4(即第四节点)电连接。
晶体管T6的第一极(可以为源极)可以用于与第一电源PS1电连接,晶体管T6的控制极可以用于与第三控制电路C3电连接,晶体管T6的第二极(可以为漏极)可以用于节点N4电连接,节点N4还可以用于与晶体管T1的第一极电连接。
从图3可以看出,晶体管T5、晶体管T6和晶体管T1分别与节点N4电连接。也可以说是晶体管T5通过节点N4与晶体管T1电连接,类似的,晶体管T6也通过节点N4与晶体管T1电连接。
在本申请另一些实施例中,晶体管T5和晶体管T6也可以分别为有机薄膜晶体管和无机薄膜晶体管。
进一步地,晶体管T5和晶体管T6可以分别为LTPS晶体管。当然,晶体管T5和晶体管T6还可以为其他类型的晶体管,本申请实施例不做限定。
根据上述电连接关系,可以进一步得到:
晶体管T5可以用于:根据发光控制信号EM和第二电压VDD控制节点N4的电压。也就是说,在晶闸管T5根据发光控制信号EM处于导通状态下,节点N4的电压可以等于第二电压VDD
晶体管T6可以用于:根据第三控制电路C3提供的第三控制信号S3n和第一电压Vdata控制节点N4的电压。也就是说,在晶闸管T6根据第三控制信号S3n处于导通状态下,节点N4的电压可以等于第一电压Vdata。
可以理解的,由于晶体管T5和晶体管T6可以分别为LTPS晶体管,所以在发光控制信号EM为低电平的情况下,晶体管T5可以处于导通状态;在发光控制信号EM为高电平的情况下,晶体管T5可以处于关断状态。类似的,在第三控制信号为低电平的情况下,晶体管T6可以处于导通状态;在第三控制信号为高电平的情况下,晶体管T6可以处于关断状态。
根据上文介绍可知,晶体管T3可以根据第一电压Vdata补偿晶体管T1的阈值电压。那么,在晶体管T3补偿晶体管T1的阈值电压阶段(可以叫作阈值补偿阶段,参考下文介绍),晶体管T3和晶体管T6可以分别处于导通状态。需要说明的是,晶闸管T6有在阈值补偿阶段会处于导通状态。
根据上文的公式(3)可以看出,LED1的驱动电流可以与第二电压VDD相关。由于LED1在驱动电流的作用下才会发光,那么,在LED1的发光阶段,晶体管T1和晶体管T2可以处于导通状态,晶体管T5也可以处于导通状态,节点N4的电压则可以等于第二电压VDD。进而,晶体管T1可以根据节点N4的电压和晶体管T1的控制极电压控制节点 N3的电压。
于是,可以理解的是,虽然晶体管T5和晶体管T6的作用都是控制节点N4的电压,但是,晶体管T5和晶体管T6并不会同时导通。在晶体管T5可以处于导通状态下,节点N4的电压可以等于第二电压VDD。在晶体管T6可以处于导通状态下,节点N4的电压则可以等于第一电压Vdata
进一步地,驱动电路11还可以包括晶体管T7(即第七晶体管,作为开关管)和晶体管T8(即第八晶体管,作为开关管)。
在本申请一些实施例中,晶体管T7的第一极(可以为源极)用于与LED1的阳极电连接,晶体管T7的第二极(可以为漏极)可以用于与第五电源PS5电连接。晶体管T8的第一极(可以为漏极)可以用于与第六电源PS6电连接,晶体管T8的第二极(可以为源极)可以用于与节点N3电连接。
在第一示例中,如图3所示,晶体管T7的控制极和晶体管T8的控制极分别用于与第四控制电路C4电连接。也就是说,晶体管T7和晶体管T8各自的控制极连接到同一个控制电路(即第四控制电路C4)。
在本申请一些实施例中,晶体管T7和晶体管T8可以分别为LTPS晶体管,或者两者可以分别为氧化物薄膜晶体管。当然,晶体管T7和晶体管T8还可以为其他类型的晶体管,本申请实施例不做限定。
根据上述电连接关系,可以进一步得到:
晶体管T7可以用于:根据第四控制电路C4提供的第四控制信号S4n和第五电源PS5提供的第五电压V5控制LED1的阳极电压。也就是说,在晶体管T7根据第四控制信号S4n处于导通状态下,LED1的阳极电压可以等于第五电压V5
晶体管T8可以用于:根据第四控制信号C4和第六电源PS6提供的第六电压V6控制节点N3的电压。也就是说,在晶体管T8根据第四控制信号S4n处于导通状态下,节点N3的电压可以等于第六电压V6
在本申请一些实施例中,本申请实施例提供了驱动电路11的第二示例(如图4所示)。与图3不同的是,图4中的晶体管T7的控制极可以用于与第五控制电路C5电连接,晶体管T8的控制极可以用于与第四控制电路C4电连接。也就是说,晶体管T7和晶体管T8各自的控制极可以连接到不同控制电路。
于是,晶体管T7可以用于:根据第五控制电路C5提供的第五控制信号S5n和第五电源PS5提供的第五电压V5控制LED1的阳极电压。也就是说,在晶体管T7根据第五控制信号S5n处于导通状态下,LED1的阳极电压可以等于第五电压V5
在本申请另一些实施例中,晶体管T8同样可以用于根据第四控制信号C4和第六电源PS6提供的第六电压V6控制节点N3的电压。也就是说,在晶体管T8根据第四控制信号S4n处于导通状态下,节点N3的电压可以等于第六电压V6
本申请实施例在晶体管T8导通的状态下,可以通过第六电压V6控制节点N3的电压,使晶体管T1的源极电压(即节点N4的电压,可以为第六电压V6)和漏极电压(即节点N3的电压)可控(也可以理解为复位),可以增强晶体管T1的负偏压温度应力(positive bias temperature stress,PBTS),也就是控制晶体管T1阈值电压的漂移,能够避免显示设备在不同图像刷新频率之间切换过程中显示屏幕闪烁,且可以避免在较低图像刷新频率下 显示屏幕闪烁。
另外,本申请实施例中的晶体管T7和晶体管T8分别采用了氧化物薄膜晶体管,在LED1的阳极电压控制和晶体管T1的源极电压控制过程中,减小了晶体管T7和晶体管T8各自的漏电流,使得驱动电路11能够支持较低(如1/60Hz等)的图像刷新频率,也就是驱动电路11可以用于较低的图像刷新频率的场景。
在一示例中,在晶体管T1、晶体管T2、晶体管T5和晶体管T6分别为LTPS晶体管且晶体管T3和晶体管T4分别为氧化物薄膜晶体管的基础上,以晶体管T7和晶体管T8分别为LTPS晶体管为例,介绍本申请实施例图3提供的驱动电路11的控制时序。
可以理解的,由于晶体管T7和晶体管T8可以分别为LTPS晶体管,所以针对图3,在第四控制信号S4n为低电平的情况下,晶体管T7和晶体管T8可以分别处于导通状态;在第四控制信号S4n为高电平的情况下,晶体管T7和晶体管T8可以分别处于关断状态。
类似的,针对图4,在第四控制信号S4n为低电平的情况下,晶体管T8可以处于导通状态;在第四控制信号S4n为高电平的情况下,晶体管T8可以处于关断状态。在第五控制信号S5n为低电平的情况下,晶体管T7可以处于导通状态;在第五控制信号S5n为高电平的情况下,晶体管T7可以处于关断状态。
在一种可能的实现方式中,针对图3,驱动电路11驱动LED1(也就是驱动电路11控制LED1的驱动电流)的整个发光的过程可以分为第一初始化阶段t1、第二初始化阶段t2、阈值补偿阶段t3、第三初始化阶段t4和发光阶段t5(发光阶段t5仅示出部分),具体时序图可以如图5所示。
(1)在第一初始化阶段t1中,发光控制信号EM和控制信号S3n分别为高电平,于是,晶体管T2、晶体管T5和晶体管T6分别关断。控制信号S1n和控制信号S2n分别为低电平,晶体管T3和晶体管T4分别关断。控制信号S4n从高电平变为低电平,又从低电平变为高电平。于是,晶体管T7和晶体管T8分别由关断变为导通,又分别由导通变为关断。
可以看出,在第一初始化阶段t1中,晶体管T7和晶体管T8导通,实现了节点N3电压的控制(使节点N3的电压为第六电压V6)和LED1的阳极电压的控制(使LED1的阳极电压为第五电压V5),也就是实现了节点N3电压和LED1阳极电压的重置。
(2)在第二初始化阶段t2中,控制信号S1n和控制信号S2n分别由低电平变为高电平,又分别由高电平变为低电平。于是,晶体管T3和晶体管T4分别由关断变为导通,又分别由导通变为关断。发光控制信号EM、控制信号S3n和控制信号S4n分别保持高电平,于是,晶体管T2、晶体管T5、晶体管T6、晶体管T7和晶体管T8分别关断。
可以看出,在第二初始化阶段t2中,晶体管T1、晶体管T3和晶体管T4分别导通,实现了节点N2的电压控制和节点N1的电压控制。由于晶体管T3和晶体管T4分别作为开关管,节点N1与晶体管T1的控制极电连接,节点N2与节点N3电连接,所以实现了晶体管T1的控制极电压控制、节点N1的电压控制、节点N2的电压控制和节点N3的电压控制(使晶体管T1的控制极电压、节点N1的电压、节点N2的电压和节点N3的电压分别为第三电压V3),也就是实现了晶体管T1的控制极电压、节点N1的电压、节点N2的电压和节点N3各自的电压重置。
(3)在阈值补偿阶段t3中,控制信号S1n由低电平变为高电平,又由高电平变为低 电平。于是,晶体管T3由关断变为导通,又由导通变为关断。控制信号S3n由高电平变为低电平,又由低电平变为高电平。于是,晶体管T6由导通变为关断,又由关断变为导通。发光控制信号EM和控制信号S4n分别保持高电平,控制信号S2n保持低电平。于是,晶体管T2、晶体管T4、晶体管T5、晶体管T7和晶体管T8分别关断。
可以看出,在阈值补偿阶段t3中,晶体管T6、晶体管T3和晶体管T1分别导通,实现了将第一电压Vdata存储于存储电容Cst,又实现了晶体管T1的阈值电压的补偿。晶体管T1的阈值电压的补偿过程可以认为是晶体管T1从导通状态变为关断状态的过程。
(4)在第三初始化阶段t4中,控制信号S4n由高电平变为低电平,又由低电平变为高电平。于是,晶体管T7和晶体管T8分别由关断变为导通,又由导通变为关断。发光控制信号EM和控制信号S3n分别保持高电平,控制信号S1n和控制信号S2n分别保持低电平,于是,晶体管T1、晶体管T2、晶体管T3、晶体管T4、晶体管T5和晶体管T6分别为闭。
可以看出,在第三初始化阶段t4中,晶体管T7和晶体管T8分别导通,实现了节点N3的电压控制(使节点N3的电压为第六电压V6)和LED1的阳极电压控制(使LED1的阳极电压为第五电压V5),也就是实现了节点N3电压和LED1的阳极电压的重置。
(5)在发光阶段t5中,发光控制信号EM由高电平变为低电平,晶体管T2和晶管T5分别导通。控制信号S1n和控制信号S2n分别为低电平,晶体管T3和晶体管T4分别关断。控制信号S3n和控制信号S4n分别为高电平,晶体管T6、晶体管T7和晶体管T8分别关断。
可以看出,在发光阶段t5中,晶体管T5、晶体管T1和晶体管T2分别导通,实现了LED1的驱动电流控制,也就是实现了LED1驱动,使LED1发光。
从图5可以理解的是,在LED1的整个驱动过程中,晶体管T3导通了两次(也就是控制信号S1n中驱动脉冲为2个),晶体管T4导通了一次(也就是控制信号S2n中驱动脉冲为1个)。那么,可以想到的是,在一个图像刷新周期(与图像刷新频率互为倒数,例如图像刷新频率为120Hz对应的图像刷新周期)内,控制信号S1n中驱动脉冲的个数可以大于控制信号S2n中驱动脉冲的个数。
从图5还可以看出,在整个驱动过程中,控制信号S3n可以有1个驱动脉冲,又由于第一电压Vdata可以为数据电压,所以可以想到的是,在一个图像刷新周期内,控制信号S3n中的驱动脉冲的频率可以等于图像刷新频率。
在本申请一些实施例中,在整个驱动过程中,控制信号S4n可以有2个驱动脉冲,控制信号S3n可以有1个驱动脉冲。所以可以想到的是,控制信号S4n中的驱动脉冲的频率可以为控制信号S3n中驱动脉冲的频率的2倍。
在一实施例中,控制信号S4n中驱动脉冲的频率为60Hz时,控制信号S3n中驱动脉冲的频率可以为60Hz、40Hz、30Hz、24Hz等。
在另一实施例中,控制信号S4n中驱动脉冲的频率为120Hz时,控制信号S3n中驱动脉冲的频率可以为120Hz、80Hz、60Hz等。
在又一实施例中,控制信号S4n中驱动脉冲的频率为180Hz时,控制信号S3n中驱动脉冲的频率可以为120Hz、90Hz、72Hz等。
在又一实施例中,控制信号S4n中驱动脉冲的频率为240Hz时,控制信号S3n中驱 动脉冲的频率可以为120Hz、96Hz、80Hz等。
在又一实施例中,控制信号S4n中驱动脉冲的频率为360Hz时,控制信号S3n中驱动脉冲的频率可以为144Hz、120Hz、102.86Hz、90Hz、80Hz等。
从上述示例可以看出,控制信号S4n中驱动脉冲的频率可以为控制信号S3n中驱动脉冲的频率的N/2倍;其中,N≥2,且N为整数。
本申请实施例中的控制信号S4n和控制信号S3n可以采用不同的时序,控制信号S4n可以中驱动脉冲可以为360Hz等较高的频率,由于控制信号S3n中驱动脉冲的频率可以为图像刷新频率,那么可以实现120Hz、90Hz、72Hz等不同的图像刷新频率,不仅能够实现不同图像刷新频率之间的动态切换,而且能够避免不同图像刷新频率之间切换或在低刷新频率下维持画面时显示屏闪烁,提高所显示图像(画面)的稳定性。
可以想到的是,由于在整个驱动过程中,发光控制信号EM中可以有2个、4个等多个驱动脉冲(可以参考下文介绍),而除了晶体管T8在发光阶段的维持过程中会动作(即改变状态,也就是控制信号S4n在发光阶段的维持过程中会有驱动脉冲),其他晶体管在发光阶段的维持过程中均不会改变状态(也就是说控制信号S1n、控制信号S2n、控制信号S3n等在发光阶段的维持过程中不会有驱动脉冲)。
因此,从图5可以看出,控制信号S4n中第一个驱动脉冲的下降沿可以在发光控制信号EM中的第一个驱动脉冲的上升沿之后。也就是说,在图像刷新周期内,晶体管T7和晶体管T8导通之后,晶体管T2和晶体管T7才关断。
控制信号S4n中第二个驱动脉冲(即驱动过程中的最后一个驱动脉冲)的下降沿可以在控制信号S1n中第二个驱动脉冲(即最后一个驱动脉冲)的下降沿之后。也就是说,在图像刷新周期内,晶体管T3第二次关断后,晶体管T7和晶体管T8才分别导通。
控制信号S4n中第二个驱动脉冲的上升沿可以在发光控制信号EM中第一个驱动脉冲的下降沿之前。也就是说,在图像刷新周期内,晶体管T7和晶体管T8分别关断后,晶体管T2和晶体管T7才分别第一次导通。
从图5还可以看出,控制信号S3n中驱动脉冲的上升沿可以在控制信号S1n中第二个驱动脉冲的下降沿之前。也就是说,在图像刷新周期内,晶体管T6关断后,晶体管T3才关断。
控制信号S1n、控制信号S2n、控制信号S3n各自的驱动脉冲的个数分别在发光控制信号EM的第一个驱动脉冲的高电平时段。也就是说,在一个图像刷新周期内,晶体管T3、晶体管T4、晶体管T6、晶体管T7和晶体管T8各自的状态切换分别在晶体管T5和晶体管T2处于关断状态下进行的。
在本申请一些实施例中,在一个图像刷新周期内,发光控制信号EM的驱动脉冲可以有2个或2个以上。如图6所示,发光控制信号EM在一个图像刷新周期内可以有4个驱动脉冲(本申请实施例以发光控制信号EM在图像刷新频率为120Hz对应的图像刷新周期T中有4个驱动脉冲为例进行说明)。
图6中,发光控制信号EM的第一个驱动脉冲对应驱动过程的5个阶段,发光控制信号EM的第二个驱动脉冲至第四驱动脉冲对应发光维持阶段。控制信号S4n在发光控制信号EM的第一个驱动脉冲的高电平时段具有2个驱动脉冲,控制信号S4n在发光控制信号EM的第三个驱动脉冲的高电平时段可以有一个驱动脉冲。也就是说,在一个图像刷新周 期内,控制信号S4n可以有3个驱动脉冲。
需要解释的是,图6中的ta表示控制信号S4n中前2个驱动脉冲在低电平时段的时长(对应晶体管T7和晶体管T8的导通时长),tb表示发光控制信号EM中驱动脉冲在低电平时段的时长(对应晶体管T2和晶体管T5的导通时长)。
从图6还可以看出,控制信号S4n中前2个驱动脉冲的脉冲宽度可以相同,第3个驱动脉冲的脉冲宽度可以大于前2个驱动脉冲的脉冲宽度。
在另一种实施例中,针对图4,与图5类似,驱动电路11驱动LED1的整个发光过程同样可以分为第一初始化阶段t1、第二初始化阶段t2、阈值补偿阶段t3、第三初始化阶段t4和发光阶段t5(发光阶段t5也仅示出部分),具体时序图可以如图7所示。
在本申请另一些实施例中,在阈值补偿阶段t3中,控制信号S5n中驱动脉冲的下降沿可以在控制信号S4n中第二个驱动脉冲的下降沿之前。控制信号S5n中驱动脉冲的上升沿可以在控制信号S4n中第二个驱动脉冲的上升沿之后。也就是说,晶体管T7导通后,晶体管T8可以第二次导通。且晶体管T8第二次关断后,晶体管T7可以关断。
需要说明的是,图7中的发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n、控制信号S4n各自的时序与图5中发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n、控制信号S4n各自的时序相同,本申请实施例不再赘述。
还需要说明的是,图5至图7示出的时序图对应的驱动电路中,晶体管T7和晶体管T8采用的LTPS晶体管,因此,可以适用于手机、平板电脑等图像刷新频率较高的动态显示设备。
在另一示例中,在晶体管T1、晶体管T2、晶体管T5和晶体管T6分别为LTPS晶体管且晶体管T3和晶体管T4分别为氧化物薄膜晶体管的基础上,以晶体管T7和晶体管T8分别为氧化物薄膜晶体管为例,介绍本申请实施例图3提供的驱动电路11的控制时序。
可以理解的,由于晶体管T7和晶体管T8可以分别为氧化物薄膜晶体管,所以针对图3,在第四控制信号S4n为低电平的情况下,晶体管T7和晶体管T8可以分别处于关断状态;在第四控制信号S4n为高电平的情况下,晶体管T7和晶体管T8可以分别处于导通状态。
类似的,针对图4,在第四控制信号S4n为低电平的情况下,晶体管T8可以处于关断状态;在第四控制信号S4n为高电平的情况下,晶体管T8可以处于导通状态。在第五控制信号S5n为低电平的情况下,晶体管T7可以处于关断状态;在第五控制信号S5n为高电平的情况下,晶体管T7可以处于导通状态。
在一种可能的实现方式中,针对图3,与图5和图7类似,驱动电路11驱动LED1的整个发光过程同样可以分为第一初始化阶段t1、第二初始化阶段t2、阈值补偿阶段t3、第三初始化阶段t4和发光阶段t5(发光阶段t5也仅示出部分),具体时序图可以如图8所示。
与图5不同的是,图8所示的时序图中,在在第一初始化阶段t1和第三初始化阶段t4中,控制信号S4n分别从低电平变为高电平,又分别从高电平变为低电平。但是,因为晶体管T7和晶体管T8分别为氧化物薄膜晶体管,与图5相同,所以晶体管T7和晶体管T8在第一初始化阶段t1和第三初始化阶段t4中还是分别由关断变为导通,又分别由导通变为关断。于是,图7所示的时序图同样可以实现节点N3电压和LED1阳极电压的重置。
从图8可以看出,控制信号S4n中第一个驱动脉冲的上升沿可以在发光控制信号EM中的第一个驱动脉冲的上升沿之后。也就是说,在一个图像刷新周期内,晶体管T2和晶体管T5分别关断后,晶体管T7和晶体管T8可以分别导通。
控制信号S4n中第二个驱动脉冲的上升沿可以在控制信号S1n中第二个驱动脉冲的下降沿之后。也就是说,在一个图像刷新周期内,晶体管T3第二次关断后,晶体管T7和晶体管T8可以分别导通。
控制信号S4n中第二个驱动脉冲的下降沿可以发光控制信号EM中的第一个驱动脉冲的下降沿之前。也就是说,在一个图像刷新周期内,晶体管T7和晶体管T8分别第二次关断后,晶体管T2和晶体管T5可以分别导通。
从图8也可以看出,控制信号S3n中驱动脉冲的上升沿可以在控制信号S1n中第二个驱动脉冲的下降沿之前。也就是说,在图像刷新周期内,晶体管T6关断后,晶体管T3才关断。
控制信号S1n、控制信号S2n、控制信号S3n各自的驱动脉冲的个数分别在发光控制信号EM的第一个驱动脉冲的高电平时段。也就是说,在一个图像刷新周期内,晶体管T3、晶体管T4、晶体管T6、晶体管T7和晶体管T8各自的状态切换分别在晶体管T5和晶体管T2处于关断状态下进行的。
需要说明的是,图8中的发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n各自的时序与图5和图6中发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n各自的时序相同,本申请实施例不再赘述。
在另一种可能的实现方式中,针对图4,与图8类似,驱动电路11驱动LED1的整个发光过程同样可以分为第一初始化阶段t1、第二初始化阶段t2、阈值补偿阶段t3、第三初始化阶段t4和发光阶段t5(发光阶段t5也仅示出部分),具体时序图可以如图9所示。
在本申请一些实施例中,在阈值补偿阶段t3中,控制信号S5n中驱动脉冲的上升沿可以在控制信号S4n中第二个驱动脉冲的上升沿之前。控制信号S5n中驱动脉冲的下降沿可以在控制信号S4n中第二个驱动脉冲的下降沿之后。也就是说,晶体管T7导通后,晶体管T8可以第二次导通。且晶体管T8第二次关断后,晶体管T7可以关断。
需要说明的是,图9中的发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n、控制信号S4n各自的时序与图5中发光控制信号EM、控制信号S1n、控制信号S2n、控制信号S3n、控制信号S4n各自的时序相同,本申请实施例不再赘述。
在上述实施例中,控制信号S1n中有2个驱动脉冲,控制信号S2n中有1个驱动脉冲,也就是说,控制信号S1n中驱动脉冲的个数可以大于控制信号S2n中驱动脉冲的个数。
在一种可能的实现方式中,控制信号S1n中驱动脉冲的个数也可以等于控制信号S2n中驱动脉冲的个数。
例如,如图10所示,控制信号S2n中有1个驱动脉冲,控制信号S1n中也可以有1个驱动脉冲。所以在LED的整个驱动过程中,晶体管T3可以导通一次,可以尽快完成晶体管T1阈值电压的补偿。
需要说明的是,图8至图10示出的时序图对应的驱动电路中,晶体管T7和晶体管T8采用氧化物薄膜晶体管,因此,可以适用于手表、电子书阅读器等图像刷新频率较低的静态显示设备。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统和装置,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括:U盘、移动硬盘、只读存储器(Read Only Memory,ROM)、随机存取存储器(Random Access Memory,RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应所述以权利要求的保护范围为准。

Claims (22)

  1. 一种驱动电路,其特征在于,包括第一晶体管、第二晶体管、第三晶体管、第四晶体管和存储电容;
    所述第一晶体管用于与第一电源、第二电源、第一节点和第三节点电连接,所述第二晶体管用于与所述第三节点、发光控制电路和发光二极管电连接,所述第三晶体管用于与所述第一节点、第一控制电路和第二节点电连接,所述第四晶体管用于与所述第二节点、第二控制电路和第三电源电连接,所述存储电容用于与所述第二电源和所述第一节点电连接,所述第二节点还用于与所述第三节点电连接;
    所述存储电容用于:通过所述第一晶体管存储所述第一电源提供的第一电压;
    所述第一晶体管用于:根据所述存储电容存储的所述第一电压和所述第二电源提供的第二电压控制所述第三节点的电压;
    所述第二晶体管用于:根据所述发光控制电路提供的发光控制信号和所述第三节点的电压控制所述发光二极管的驱动电流;
    所述第三晶体管用于:根据所述第一控制电路提供的第一控制信号和所述第二节点的电压控制所述第一晶体管的控制极电压,并根据所述第一控制信号和所述第一电源提供的第一电压补偿所述第一晶体管的阈值电压;
    所述第四晶体管用于:根据所述第二控制电路提供的第二控制信号和所述第三电源提供的第三电压控制所述第二节点的电压;
    所述第二节点的电压等于所述第三节点的电压。
  2. 根据权利要求1所述的驱动电路,其特征在于,在一个图像刷新周期内,所述第一控制信号中驱动脉冲的个数大于或等于所述第二控制信号中驱动脉冲的个数。
  3. 根据权利要求1或2所述的驱动电路,其特征在于,在一个图像刷新周期内,所述发光控制信号中驱动脉冲的个数大于或等于2。
  4. 根据权利要求1至3中任一项所述的驱动电路,其特征在于,所述驱动电路还包括第五晶体管和第六晶体管;
    所述第五晶体管的第一极用于与所述第二电源电连接,所述第五晶体管的控制极用于与所述发光控制电路电连接,所述第五晶体管的第二极用于与第四节点电连接;
    所述第六晶体管的第一极用于与所述第一电源电连接,所述第六晶体管的控制极用于与第三控制电路电连接,所述第六晶体管的第二极用于与所述第四节点电连接,所述第四节点还用于与所述第一晶体管电连接;
    所述第五晶体管用于:根据所述发光控制信号和所述第二电压控制所述第四节点的电压;
    所述第六晶体管用于:根据所述第三控制电路提供的第三控制信号和所述第一电压控制所述第四节点的电压。
  5. 根据权利要求4所述的驱动电路,其特征在于,所述第一晶体管具体用于:
    根据所述第四节点的电压和所述第一晶体管的控制极电压控制所述第三节点的电压。
  6. 根据权利要求4或5所述的驱动电路,其特征在于,在一个图像刷新周期内,所述第三控制信号中的驱动脉冲的频率等于图像刷新频率。
  7. 根据权利要求4至6中任一项所述的驱动电路,其特征在于,所述驱动电路还包括第七晶体管和第八晶体管;
    所述第七晶体管的第一极用于与所述发光二极管的阳极电连接,所述第七晶体管的第二极用于与第五电源电连接;所述第八晶体管的第一极用于与所述第三节点电连接,所述第八晶体管的第二极用于与第六电源电连接;
    所述第七晶体管的控制极和所述第八晶体管的控制极分别用于与第四控制电路电连接,或者,所述第七晶体管的控制极用于与第五控制电路电连接,所述第八晶体管的控制极用于与所述第四控制电路电连接;
    所述第七晶体管用于:根据所述第四控制电路提供的第四控制信号和所述第五电源提供的第五电压控制所述发光二极管的阳极电压;或者,根据所述第五控制电路提供的第五控制信号和所述第五电压控制所述发光二极管的阳极电压;
    所述第八晶体管用于:根据所述第四控制信号和所述第六电源提供的第六电压控制所述第三节点的电压。
  8. 根据权利要求7所述的驱动电路,其特征在于,在一个图像刷新周期内,所述第四控制信号中的驱动脉冲的个数大于或等于所述发光控制信号中驱动脉冲的个数。
  9. 根据权利要求8所述的驱动电路,其特征在于,在一个图像刷新周期内,所述第五控制信号中的驱动脉冲的频率等于图像刷新频率。
  10. 根据权利要求7至9中任一项所述的驱动电路,其特征在于,所述第四控制信号中的驱动脉冲的频率为所述第三控制信号中驱动脉冲的频率的N/2倍;其中,N≥2,且N为整数。
  11. 根据权利要求7至10中任一项所述的驱动电路,其特征在于,所述第一晶体管、所述第二晶体管、所述第五晶体管和所述第六晶体管分别为低温多晶硅薄膜晶体管;
    所述第三晶体管和所述第四晶体管分别为氧化物薄膜晶体管。
  12. 根据权利要求11所述的驱动电路,其特征在于,所述第七晶体管和所述第八晶体管分别为低温多晶硅薄膜晶体管。
  13. 根据权利要求12所述的驱动电路,其特征在于,所述第四控制信号中第一个驱动脉冲的下降沿在所述发光控制信号中的第一个驱动脉冲的上升沿之后。
  14. 根据权利要求12或13所述的驱动电路,其特征在于,所述第四控制信号中的最后一个驱动脉冲的下降沿在所述第一控制信号中最后一个驱动脉冲的下降沿之后;
    所述第四控制信号中的最后一个驱动脉冲的上升沿在所述发光控制信号中的第一个驱动脉冲的下降沿之前。
  15. 根据权利要求12至14中任一项所述的驱动电路,其特征在于,所述第五控制信号中驱动脉冲的下降沿在所述第四控制信号中最后一个驱动脉冲的下降沿之前;
    所述第五控制信号中驱动脉冲的上升沿在所述第四控制信号中最后一个驱动脉冲的上升沿之后。
  16. 根据权利要求11所述的驱动电路,其特征在于,所述第七晶体管和所述第八晶体管分别为氧化物薄膜晶体管。
  17. 根据权利要求16所述的驱动电路,其特征在于,所述第四控制信号中第一个驱动脉冲的上升沿在所述发光控制信号中的第一个驱动脉冲的上升沿之后。
  18. 根据权利要求16或17所述的驱动电路,其特征在于,所述第四控制信号中最后一个驱动脉冲的上升沿在所述第一控制信号中最后一个驱动脉冲的下降沿之后;
    所述第四控制信号中最后一个驱动脉冲的下降沿在所述发光控制信号中的第一个驱动脉冲的下降沿之前。
  19. 根据权利要求16至18中任一项所述的驱动电路,其特征在于,所述第五控制信号中驱动脉冲的上升沿在所述第四控制信号中最后一个驱动脉冲的上升沿之前;
    所述第五控制信号中驱动脉冲的下降沿在所述第四控制信号中最后一个驱动脉冲的下降沿之后。
  20. 根据权利要求12至19中任一项所述的驱动电路,其特征在于,所述第三控制信号中驱动脉冲的上升沿在所述第一控制信号中最后一个驱动脉冲的下降沿之前。
  21. 根据权利要求12至20中任一项所述的驱动电路,其特征在于,所述第一控制信号、所述第二控制信号、所述第三控制信号和所述第五控制信号各自的驱动脉冲的个数分别在所述发光控制信号的第一个驱动脉冲的高电平时段。
  22. 一种显示设备,其特征在于,包括第一电源、第二电源、第三电源、发光控制电路、第一控制电路、第二控制电路、多个发光二极管和多个如权利要求1至21中任一项所述的驱动电路;
    所述第一电源、所述第二电源、所述第三电源、所述发光控制电路、所述第一控制电路和所述第二控制电路分别用于与所述多个驱动电路中每个驱动电路电连接,所述多个发光二极管用于与多个驱动电路一一对应地电连接;
    所述每个驱动电路用于:控制对应的发光二极管的驱动电流。
PCT/CN2023/084106 2022-04-02 2023-03-27 驱动电路和显示设备 WO2023185740A1 (zh)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150103037A1 (en) * 2013-05-31 2015-04-16 Boe Technology Group Co., Ltd. Pixel circuit, driving method thereof, organic light-emitting display panel and display device
CN108288457A (zh) * 2018-01-19 2018-07-17 昆山国显光电有限公司 像素电路及其驱动方法、显示装置
CN109285500A (zh) * 2018-12-05 2019-01-29 武汉天马微电子有限公司 像素驱动电路和有机发光显示装置
WO2019184266A1 (zh) * 2018-03-29 2019-10-03 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路、驱动方法及终端
CN111754922A (zh) * 2020-07-24 2020-10-09 武汉华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150103037A1 (en) * 2013-05-31 2015-04-16 Boe Technology Group Co., Ltd. Pixel circuit, driving method thereof, organic light-emitting display panel and display device
CN108288457A (zh) * 2018-01-19 2018-07-17 昆山国显光电有限公司 像素电路及其驱动方法、显示装置
WO2019184266A1 (zh) * 2018-03-29 2019-10-03 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路、驱动方法及终端
CN109285500A (zh) * 2018-12-05 2019-01-29 武汉天马微电子有限公司 像素驱动电路和有机发光显示装置
CN111754922A (zh) * 2020-07-24 2020-10-09 武汉华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板

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