WO2023185195A1

WO2023185195A1 - Schottky diode and power circuit

Info

Publication number: WO2023185195A1
Application number: PCT/CN2023/070811
Authority: WO
Inventors: 王嘉乐; 樊宗荐; 张强; 侯朝昭; 董耀旗; 许俊豪
Original assignee: 华为技术有限公司
Priority date: 2022-03-28
Filing date: 2023-01-06
Publication date: 2023-10-05
Also published as: CN116864541A

Abstract

The present application relates to the technical field of semiconductors, and particularly relates to a Schottky diode and a power circuit. The Schottky diode comprises: a first layer; a second layer, which is in contact with the first layer, wherein the first layer is one of a semiconductor layer and a metal layer, the second layer is the other one of the semiconductor layer and the metal layer, and there is a Schottky barrier between the first layer and the second layer; and a carrier provision layer, which is coupled to the first layer and is used for increasing the proportion, in the total number of carriers in the first layer, of the number of first carriers in the first layer, wherein the energy of the first carriers is lower than the height of the Schottky barrier when the diode is in an off state, and when the Schottky diode enters an on state from the off state, the height of the Schottky barrier is reduced, such that the first carriers get over the Schottky barrier and enter the second layer, or the width of the Schottky barrier is reduced, such that the first carriers pass through the Schottky barrier in a tunneling manner and enter the second layer. The Schottky diode can realize quick switching from an off state to an on state.

Description

A kind of Schottky diode and power circuit

This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on March 28, 2022, with application number 202210313499.6 and the application title "A Schottky diode and power circuit", the entire content of which is incorporated by reference. in this application.

Technical field

This application relates to the field of semiconductor technology, and specifically to a Schottky diode and a power circuit.

Background technique

Schottky barrier diode (SBD), also known as Schottky diode, is a microelectronic device composed of metal and semiconductor. Among them, the rectification characteristics of the Schottky barrier formed by the contact between metal and semiconductor endows the Schottky diode with the ability to conduct in one direction, allowing the Schottky diode to be used as a microelectronic switching element for generation, control, and reception. , transform, amplify signals and convert energy, etc. For example, a Schottky diode can be combined with an insulated gate bipolar transistor (IGBT) to be used as a switching element in an inverter circuit to convert DC power into AC power to drive a motor.

Schottky diodes have a low conduction voltage that allows high-speed switching between the off and on states. Due to the limitation of the electronic state density distribution of the material that the Schottky diode is made of, the ideality factor of the Schottky diode is greater than 1, that is, the sub-threshold swing is greater than 60mV/dec. It is difficult to achieve the high speed between the off-state and the on-state allowed by the Schottky diode. Switching characteristics.

Contents of the invention

Embodiments of the present application provide a Schottky diode and a power circuit that can realize rapid switching from an off state to an on state.

In a first aspect, a Schottky diode is provided, including: a first layer; and a second layer in contact with the first layer, wherein the first layer is one of a semiconductor layer and a metal layer, and the second layer is a semiconductor layer and a metal layer. Another one of the metal layers, a Schottky barrier exists between the first layer and the second layer; a carrier providing layer coupled to the first layer for increasing the number of first carriers in the first layer The proportion of the total number of carriers in the first layer; where the energy of the first carrier is lower than the height of the Schottky barrier when the diode is in the off state; where, when the Schottky diode changes from When the off state enters the on state, the height of the Schottky barrier is reduced, allowing the first carrier to cross the Schottky barrier and enter the second layer; or, the width of the Schottky barrier is reduced, allowing the first carrier to cross the Schottky barrier and enter the second layer. The carriers tunnel through the Schottky barrier and enter the second layer.

Among them, the carriers mentioned here are the same type of carriers. It can be understood that carriers are divided into electrons and holes. The proportion of the number of first carriers in the first layer to the total number of carriers in the first layer specifically refers to: the number of first electrons in the first layer to the total number of electrons in the first layer Ratio, or the ratio of the number of first holes in the first layer to the total number of holes in the first layer.

Under the action of the carrier providing layer, the proportion of the first carriers in the first layer of the Schottky diode increases, and the energy of the first carriers is lower than the Schottky barrier at the Schottky barrier. The height of the Schottky diode when it is in the off state. Therefore, when the Schottky diode is in the off state, very few or even none of the first carriers in the first layer can cross or tunnel through the Schottky diode. barrier, most or even all of the first carriers remain in the first layer. When a voltage is applied to the Schottky diode that causes the Schottky diode to transition from the off-state to the on-state, the height of the Schottky barrier decreases, allowing the first carrier to cross the Schottky barrier, or, The width of the Schottky barrier is reduced, allowing the first carrier to tunnel through the Schottky barrier, thereby quickly generating a larger current, causing the Schottky diode to quickly enter the conduction state, showing a voltage lower than 60mV /dec sub-threshold swing to achieve fast switching of the Schottky diode from the off state to the on state.

In a possible implementation, the semiconductor layer is obtained by doping an intrinsic semiconductor layer with impurities. The material of the intrinsic semiconductor layer is at least one of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes. One; alternatively, the semiconductor layer is replaced by a carbon nanotube layer, wherein the carbon nanotube layer is made of carbon nanotubes.

In this embodiment, intrinsic semiconductors can be flexibly selected for doping to obtain a semiconductor layer for forming a Schottky barrier, which improves the flexibility of the solution and its compatibility with existing processes. In this implementation, a carbon nanotube layer may also be used instead of the semiconductor layer.

Among them, carbon nanotubes have ultra-high mobility and saturation speed, so that after the Schottky diode enters the conduction state, it has a large conduction current. Moreover, carbon nanotube materials have good ductility and are easily compatible with various device shapes, which is conducive to three-dimensional (3D) integration of devices.

In a possible implementation, the first layer is a semiconductor layer, the second layer is a metal layer, and the carrier providing layer includes a first semiconductor layer and a first conductor layer, wherein the first conductor layer is located on the first semiconductor layer and the first layer, the first semiconductor layer and the first layer are doped with impurities of different properties.

Doping impurities with different properties means that the types of impurities doped are different. It can be understood that for semiconductors, impurities can be divided into N-type impurities for providing electrons and P-type impurities for providing holes. When the two are doped with impurities of different properties, if one of the two is doped with N-type impurities, the other is doped with P-type impurities; if one of the two is doped with P-type impurities, the other is doped with N-type impurities. type impurities.

This embodiment provides a specific structure of the Schottky diode, which is simple and easy to prepare. Moreover, in this embodiment, the materials of the first semiconductor layer, the first conductor layer and the first layer are different, and the Fermi surfaces are different, which can introduce energy band dislocation between the multi-layer materials, so that the first semiconductor layer can move toward the first layer. The first carriers are provided, so that the proportion of the number of first carriers in the first layer to the total number of carriers in the first layer can be increased.

In a possible implementation, the carrier providing layer further includes a second semiconductor layer. The second semiconductor layer is located between the first conductor layer and the first layer. The second semiconductor layer and the first layer are doped with the same properties. impurities, and the doping concentration of the second semiconductor layer is greater than the doping concentration of the first layer.

In this embodiment, the second semiconductor layer and the first layer are doped with impurities of the same nature, and the doping concentration of the second semiconductor layer is larger, so that an ohmic contact can be formed between the first conductor layer and the first layer. , reducing the resistance of the first carrier flowing from the first conductor layer to the first layer.

In a possible implementation, the doping concentration of the second semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the first layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

When the doping concentration of the second semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 and the doping concentration of the first layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 , the first carrier flows from the first conductor to the first layer Encounter less resistance.

In a possible implementation, the doping concentration of the first semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the first layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

When the doping concentration of the first semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 and the doping concentration of the first layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 , the first semiconductor layer can provide more Therefore, the proportion of the first carriers in the first layer to the total number of carriers in the first layer can be increased to a greater extent.

In a possible implementation, the material of the first conductor layer is metal or silicide; or, the metal layer is replaced by a silicide layer or a transition metal disulfide layer.

In this embodiment, the material selection range of the first conductor layer is wide, so that different materials can be selected according to specific needs (such as process compatibility, availability of materials, etc.). There are many alternatives to the metal layer used to form the Schottky barrier, so that the metal layer used to form the Schottky barrier can be selected according to specific needs (such as process compatibility, availability of materials, etc.) Material.

In a possible implementation, the first layer is a metal layer, the second layer is a semiconductor layer, the carrier providing layer includes a third semiconductor layer, and the third semiconductor layer and the second layer are doped with impurities of different properties.

This embodiment provides a specific structure of the Schottky diode, which is simple and easy to prepare. Moreover, in this embodiment, the materials of the first layer, the second layer, and the third semiconductor layer are different, and the Fermi surfaces are different, which can introduce energy band dislocation between the multi-layer materials, so that the third semiconductor layer can provide the first layer with first carriers, thereby increasing the proportion of the number of first carriers in the first layer to the total number of carriers in the first layer.

In a possible implementation, the doping concentration of the third semiconductor layer is greater than the doping concentration of the second layer.

When the doping concentration of the third semiconductor layer is greater than the doping concentration of the second layer, the third semiconductor layer can provide more first carriers to the first layer, thereby increasing the concentration of the first layer to a greater extent. The proportion of first carriers to the total number of carriers in the first layer.

In a possible implementation, the doping concentration of the third semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the second layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

When the doping concentration of the third semiconductor layer is 10 ¹⁹ -10 ²¹ cm ^-3 and the doping concentration of the second layer is 10 ¹⁵ -10 ¹⁸ cm ^-3 , the third semiconductor layer can provide more for the first layer. The proportion of the number of first carriers in the first layer to the total number of carriers in the first layer can be significantly increased.

In a possible implementation, the Schottky diode further includes: an ohmic contact layer in contact with the second layer.

The ohmic contact layer can improve the electrical performance of the Schottky diode by reducing the resistance between the second layer and the device connected to the second layer (such as a power supply or driver circuit).

In a possible implementation, the metal layer is replaced by any one of a semi-metal layer, a cold metal layer, a silicide layer, and a transition metal disulfide layer.

In this embodiment, the metal layer used to form the Schottky barrier can have a variety of alternatives, so that the metal layer used to form the Schottky barrier can be selected according to specific needs (such as process compatibility, availability of materials, etc.) Schottky barrier material.

In a possible implementation, the first layer is a semiconductor layer, the second layer is a metal layer, the carrier providing layer includes a third layer, and the material of the third layer is a cold metal layer or a semi-metal layer.

This embodiment provides a specific structure of the Schottky diode, which is simple and easy to prepare.

In cold metallic or semi-metallic materials, the proportion of first carriers is high. Using cold metal or semi-metal as the carrier providing layer can provide more first carriers for the first layer, increasing the number of first carriers in the first layer and increasing the number of carriers in the first layer. Proportion of total quantity.

In this embodiment, the carrier providing layer further includes a fourth semiconductor layer, the fourth semiconductor layer is located between the third layer and the first layer, the fourth semiconductor layer and the first layer are doped with impurities of the same nature, and the fourth semiconductor layer is doped with impurities of the same nature. The doping concentration of the fourth semiconductor layer is greater than that of the first layer.

In this embodiment, the fourth semiconductor layer and the first layer are doped with impurities of the same nature, and the fourth semiconductor layer has a larger doping concentration, so that an ohmic contact can be formed between the third layer and the first layer. Reduce the resistance of the first carrier to flow from the third layer to the first layer.

In a possible implementation, the material of the first layer is an N-type semiconductor, and the material of the third layer is at least one of NbSe ₂ , NbTe ₂ , TaSe ₂ , TaTe ₂ , and P-type doped semimetal; Alternatively, the material of the first layer is P-type semiconductor, and the material of the third layer is at least one of NbS ₂ , TaS ₂ and N-type doped semi-metal.

In this embodiment, the third layer of different materials can be selected according to the impurities doped in the first layer, so that the third layer is more suitable for the first layer, thereby providing more first layers for the first layer. Carriers, the proportion of the first carriers in the first layer to the total number of carriers in the first layer is more significantly increased.

In a possible implementation, the metal layer is replaced by a suicide layer or a transition metal disulfide layer.

There are many alternatives to the metal layer used to form the Schottky barrier, so that the metal layer used to form the Schottky barrier can be selected according to specific needs (such as process compatibility, availability of materials, etc.) Material.

In a possible implementation, the first layer and the carrier providing layer are the same layer, and the second layer is a semiconductor layer, wherein the material of the first layer is a cold metal layer or a semi-metal layer.

In cold metallic or semi-metallic materials, the proportion of first carriers is high. Using cold metal or semi-metal as both the carrier providing layer and the first layer can increase the number of first carriers in the first layer to the maximum limit among the total number of carriers in the first layer. proportion.

A second aspect provides a power circuit, including the Schottky diode and field effect transistor provided in the first aspect.

The Schottky diode provided in the first aspect exhibits a sub-threshold swing lower than 60mV/dec and has a fast switching speed, thereby reducing the operating delay of the power circuit.

When the Schottky diode provided by the embodiment of the present application enters the on state from the off state, the current can be rapidly increased and the Schottky diode can quickly enter the on state, showing a sub-threshold swing lower than 60mV/dec, realizing the Schottky diode. The rapid switching of Terki diodes from the off state to the on state can be used to reduce the operating delay of electronic devices.

Description of drawings

Figure 1 is a schematic structural diagram of a Schottky diode provided by an embodiment of the present application;

Figure 2 is a schematic structural diagram of a Schottky diode provided by an embodiment of the present application;

Figure 3A is a schematic diagram of the energy band distribution of the Schottky diode shown in Figure 2 when it is in the off state;

Figure 3B is a schematic diagram of the energy band distribution of the Schottky diode shown in Figure 2 when it enters the conduction state;

Figure 4 is a schematic structural diagram of a Schottky diode provided by an embodiment of the present application;

Figure 5A is a schematic diagram of the energy band distribution of the Schottky diode shown in Figure 4 when it is in the off state;

Figure 5B is a schematic diagram of the energy band distribution of the Schottky diode shown in Figure 4 when it enters the conduction state;

Figure 6 is a schematic structural diagram of a Schottky diode provided by an embodiment of the present application;

Figure 7 is a schematic diagram of the carrier state density of the cold source metal under different energies;

Figure 8 is a schematic structural diagram of a Schottky diode provided by an embodiment of the present application;

Figure 9A is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 9B is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 10A is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 10B is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 11 is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 12 is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 13 is a flow chart of a method for preparing a Schottky diode provided by an embodiment of the present application;

Figure 14A is a volt-ampere characteristic curve of a Schottky diode provided by an embodiment of the present application;

Figure 14B is a volt-ampere characteristic curve of a Schottky diode provided by an embodiment of the present application;

Figure 15 is a schematic structural diagram of a power circuit provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments.

In the description of this specification, specific features, structures, materials or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

It can be understood that in the description of the embodiments of the present application, words such as “exemplary”, “for example” or “for example” are used to represent examples, illustrations or explanations. Any embodiment or design described as "exemplary," "such as," or "for example" in the embodiments of the present application is not to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the words "exemplary," "such as," or "for example" is intended to present the concepts in a concrete manner.

In the description of the embodiments of this application, the term "and/or" is only an association relationship describing associated objects, indicating that there can be three relationships. For example, A and/or B can mean: A alone exists, and A alone exists. There is B, and there are three situations A and B at the same time. In addition, unless otherwise stated, the term "plurality" means two or more.

In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, features defined as "first" and "second" may explicitly or implicitly include one or more of these features. The terms “including,” “includes,” “having,” and variations thereof all mean “including but not limited to,” unless otherwise specifically emphasized.

In addition, in the embodiment of this application, "contact" can be understood as "close to", which usually means that two block-shaped or sheet-shaped objects are next to each other, or that one of the two objects is located on the other object. s surface. In addition, in the embodiment of this application, "connection" may refer to direct contact between two objects. "Connection" can also refer to the connection between two objects through a third object, that is, one side or end of the third object contacts one of the two objects, and the other side or end of the third object contacts The other of these two objects.

Schottky diodes can be used as microelectronic switching elements in electronic devices. The speed of entering from the off state to the on state affects the operation delay of the electronic device. Among them, the off state refers to the off state, and the open state refers to the on state.

The speed at which the off state enters the on state depends on the opening speed of the forward current. The opening speed of the forward current is limited by the reduction efficiency of the Schottky barrier and the increase in the electronic state density of the source (source, S). efficiency. The efficiency of increasing the electronic density of states at the source is limited by the Boltzmann distribution, making it impossible for conventional Schottky diodes to turn on sub-threshold swings below 60mV/dec. Among them, the sub-threshold swing is a performance index that measures the mutual conversion rate between the off-state and on-state of the diode. The smaller the sub-threshold swing, the faster the mutual conversion rate between the off-state and on-state of the diode.

In the embodiment of the present application, the source end refers to the end that provides carriers when the Schottky diode is in the conductive state. That is, when the Schottky diode is turned on, the end of the Schottky diode that provides carriers is called the source end. The other end of the Schottky diode can be called the drain (D). The source and drain terminals have Schottky barriers. When the Schottky diode enters the on state from the off state, the Schottky barrier in the Schottky diode decreases, and more carriers can flow from the source end of the Schottky diode to the Schottky diode. drain terminal, thereby generating a current that can realize the conduction of the Schottky diode.

Carriers are charged particles of matter that can move freely. Among them, in the field of semiconductors, carriers generally refer to electrons and holes. That is, electrons and holes can be collectively called carriers, with electrons being one type of carrier and holes being another type of carrier. Among them, holes are also called electron holes, which refer to the vacancies left on the covalent bond after the loss of an electron from the covalent bond.

Embodiments of the present application provide a solution that can increase the proportion of the number of cold carriers in the source end to the total number of carriers in the source end. Among them, the carriers mentioned here are the same type of carriers, that is, either electrons or holes. Increasing the number of cold carriers as a proportion of the total number of carriers means increasing the number of cold electrons as a proportion of the total number of electrons, or increasing the number of cold holes as a proportion of holes. Proportion of total quantity.

In addition, it can be understood that the Schottky barrier is formed by the contact between the semiconductor layer and the metal layer. If the semiconductor layer forming the Schottky barrier is an N-type semiconductor, the cold carriers are electrons and can be called cold electrons. If the semiconductor layer forming the Schottky barrier is a P-type semiconductor, the cold carriers are holes and can be called cold holes.

The energy of the cold carriers is lower than the height of the Schottky barrier when the Schottky diode is in the off state, so that when the Schottky diode is in the off state, there are very few or even zero cold carriers at the source. can cross the Schottky barrier, and most or all of the cold carriers remain at the source. When a voltage is applied to the Schottky diode that causes the Schottky diode to go from the off state to the on state, the height of the Schottky barrier decreases, allowing a large number of cold carriers to cross the Schottky barrier, or, The width of the Schottky barrier is reduced, allowing a large number of cold carriers to tunnel through the Schottky barrier, which can quickly generate a large current, causing the Schottky diode to quickly enter the conduction state, showing low With a sub-threshold swing of 60mV/dec, the Schottky diode can quickly switch from the off state to the on state.

In the embodiments of the present application, the reduction in the height of the Schottky barrier can also be understood as the relative reduction in the height of the Schottky barrier. Specifically, when the energy of the carrier increases, even if the absolute height of the Schottky barrier does not change, or the height increase is smaller than the increase in carrier energy, it can also be called the height of the Schottky barrier. reduce. Of course, when the energy of carriers remains unchanged or decreases, the absolute height of Schottky barrier decreases, or the decrease in height of Schottky barrier is greater than the decrease in carrier energy, which can also be called Schottky potential. The height of the barrier is reduced.

Next, the solutions provided by the embodiments of the present application are illustrated with reference to the accompanying drawings.

Referring to FIG. 1 , an embodiment of the present application provides a Schottky diode 10 , including a layer 100 and a layer 200 . The layer 100 may be a semiconductor layer, and the layer 200 may be a metal layer; or the layer 100 may be a metal layer, and the layer 200 may be a semiconductor layer. That is, layer 100 may be one of a semiconductor layer and a metal layer, and layer 200 may be the other of a semiconductor layer and a metal layer. The layer 100 and the layer 200 are in contact, and their contact surface forms a Schottky junction, that is, there is a Schottky barrier between the layer 100 and the layer 200 .

In some embodiments, the semiconductor layer here may be obtained by doping an intrinsic semiconductor layer with impurities. The doped impurities may be N (negative) type impurities used to provide electrons, or P (positive) type impurities used to provide holes. The specific impurities to be doped will be introduced below and will not be described again here. The material of the intrinsic semiconductor layer is any one of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes. It can also be two of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes. one or a combination of two or more.

In some embodiments, the semiconductor layer here may be replaced by a carbon nanotube layer. The material of carbon nanotubes is carbon nanotubes.

In some embodiments, the metal layer may be made of metal, such as one or a combination of at least two of gold, silver, aluminum, platinum, nickel, titanium, etc.

In some embodiments, the metal layer may be replaced by a transition metal dichalcogenide layer. The material of the transition metal disulfide layer is transition metal disulfide (TMD).

In some embodiments, the metal layer may be replaced by a suicide layer. The material of the silicide layer may be metal silicide. Metal silicide refers to a compound formed by metals (such as nickel, titanium, cobalt, lithium, calcium, magnesium, iron, chromium, etc.) and silicon, which has excellent electrical and thermal conductivity. In one example, the material of the silicide layer is specifically one of NiSi ₂ , TiSi ₂ , and CoSi ₂ or a combination of at least two of them.

In some embodiments, the metallic layer may be replaced by a semi-metallic layer. The material of the semi-metal layer is semi-metal. The density of electronic states near the Fermi level of a semi-metal material whose conduction band and valence band are closely spaced is greater than that of an insulator and much smaller than that of a metal. Graphene, three-dimensional Bi, Na ₃ Bi, Cd ₃ As ₂ , carbon nanotubes, etc. are relatively typical semimetals.

In some embodiments, the metal layer may be replaced by a cold metal layer. The material of the cold metal layer is cold metal (clod metal). Cold metal refers to a type of material whose electronic state density decreases rapidly near the Fermi surface, such as NbSe ₂ , NbTe ₂ , TaSe ₂ , TaTe ₂ , NbS ₂ , and TaS ₂ . Among them, NbSe ₂ , NbTe ₂ , TaSe ₂ , and TaTe ₂ can be called cold electron metals and can provide electrons. It can be called a cold hole metal, and NbS ₂ and TaS ₂ can provide holes.

In some embodiments, the thickness of the metal layer is 3 nm-5 nm.

Layer 100 may serve as the source terminal of the Schottky diode 10, and accordingly, layer 200 may serve as the drain terminal of the Schottky diode.

When the layer 100 is a semiconductor layer and the layer 200 is a metal layer, the structure of the Schottky diode 10 is a forward-biased structure, and the Schottky diode 10 can be called a forward-biased diode, that is, the Schottky diode 10 operates at a forward bias voltage. conduction under the action of. Among them, when the layer 100 is an N-type semiconductor, the forward bias voltage is: the layer 100 is connected to a low potential, and the layer 200 is connected to a high potential. When layer 100 is a P-type semiconductor, the forward bias voltage is: layer 100 is connected to a high potential, and layer 200 is connected to a low potential.

When the layer 100 is a metal layer and the layer 200 is a semiconductor layer, the structure of the Schottky diode 10 is a reverse bias structure, and the Schottky diode 10 can be turned on under the action of a reverse bias voltage. Among them, when the layer 200 is an N-type semiconductor, the reverse bias voltage is: the layer 100 is connected to a low potential, and the layer 200 is connected to a high potential. When layer 200 is a P-type semiconductor, the reverse bias voltage is: layer 100 is connected to a high potential, and layer 200 is connected to a low potential.

Continuing to refer to FIG. 1 , the Schottky diode 10 also includes a carrier providing layer 300 . The carrier providing layer 300 may also be called a cold source. The carrier coupling of layer 300 to layer 100 may increase the ratio of the number of cold carriers in layer 100 to the number of carriers in layer 100 .

Next, in different embodiments, the structure and material of the carrier providing layer 300, as well as the implementation of the material of the layer 100 and the layer 200 are introduced.

Embodiment 1 adopts the Schottky diode 10 of the forward-biased structure A1.

Referring to FIG. 2 , Embodiment 1 provides a Schottky diode 10 using a forward-biased structure A1. In the forward-biased structure A1, the layer 100 is a semiconductor layer, the layer 200 can be a metal layer, and the carrier providing layer 300 can include a semiconductor layer 311 and a conductor layer 312. Wherein, the conductor layer 312 is located between the semiconductor layer 311 and the layer 100 .

In an illustrative example of Embodiment 1, layer 100 may be an N-type semiconductor, ie, a semiconductor doped with N-type impurities.

In an illustrative example of Embodiment 1, layer 100 may be a P-type semiconductor, ie, a semiconductor doped with P-type impurities.

Semiconductor layer 311 and layer 100 are doped with impurities of different properties. Doping impurities with different properties means that the types of impurities doped are different. It can be understood that for semiconductors, impurities can be divided into N-type impurities for providing electrons and P-type impurities for providing holes. When the two are doped with impurities of different properties, if one of the two is doped with N-type impurities, the other is doped with P-type impurities. If one of the two is doped with P-type impurities, the other is doped with N-type impurities. type impurities.

When the semiconductor layer 311 is a P-type semiconductor, that is, when the layer 100 is an N-type semiconductor, the carrier providing layer 300 is used to increase the proportion of the number of cold electrons in the layer 100 to the total number of electrons in the layer 100 . Among them, cold electrons refer to electrons with energy lower than the height of the Schottky barrier when the Schottky diode is in the off state.

Wherein, when the semiconductor layer 311 is an N-type semiconductor, that is, when the layer 100 is a P-type semiconductor, the carrier providing layer 300 is used to increase the proportion of the number of cold holes in the layer 100 to the total number of holes in the layer 100 . Among them, cold holes refer to holes whose energy is lower than the height of the Schottky barrier when the Schottky diode is in the off state.

In an illustrative example of Embodiment 1, semiconductor layer 311 is a heavily doped semiconductor. Heavily doped semiconductors are also called heavily doped semiconductors, which means more impurities are doped into the semiconductor. The counterpart to heavily doped semiconductors is lightly doped semiconductors. Lightly doped semiconductors, also known as lightly doped semiconductors, mean that fewer impurities are doped into the semiconductor. In other words, it can be divided into lightly doped and heavily doped according to the amount of impurities doped.

For example, the doping concentration of the semiconductor layer 311 is 10 ¹⁹ -10 ²¹ cm ^-3 . In one example, the doping concentration of the semiconductor layer 311 is 10 ²⁰ cm ^-3 . In one example, the doping concentration of the semiconductor layer 311 is 10 ^19.5 cm ^-3 . In one example, the doping concentration of the semiconductor layer 311 is 10 ^20.5 cm ^-3 .

In an illustrative example of Embodiment 1, the conductor layer 312 may be made of metal. Such as gold, silver, aluminum, platinum, etc.

In an illustrative example of Embodiment 1, the conductor layer 312 may be made of silicide. Specifically, the silicide may be metal silicide. For example, one or a combination of at least two of NiSi ₂ , TiSi ₂ , and CoSi ₂ .

In an illustrative example of Embodiment 1, the material of the metal layer may be one or a combination of at least two metals, such as gold, silver, aluminum, platinum, etc.

In an illustrative example of Embodiment 1, the metal layer may be replaced by a suicide layer. The material of the silicide layer may be metal silicide. Metal silicide refers to a compound formed by metals (such as nickel, titanium, cobalt, lithium, calcium, magnesium, iron, chromium, etc.) and silicon, which has excellent electrical and thermal conductivity. In one example, the material of the silicide layer is specifically one of NiSi ₂ , TiSi ₂ , and CoSi ₂ or a combination of at least two of them.

In an illustrative example of Embodiment 1, the metal layer may be replaced by a transition metal disulfide layer.

In an illustrative example of Embodiment 1, as shown in FIG. 2 , the carrier providing layer 300 may further include a semiconductor layer 313. Semiconductor layer 313 is located between conductor layer 312 and layer 100 . Among them, the semiconductor layer 312 and the layer 100 are doped with impurities of the same nature. The fact that they are doped with impurities of the same nature means that the types of impurities they are doped with are the same. Specifically, both are doped with N impurities at the same time, or P impurities are doped with them at the same time. The doping concentration of the semiconductor layer 312 may be greater than the doping concentration of the layer 100 , thereby forming an ohmic contact between the conductor 312 and the layer 100 and reducing the resistance of carriers flowing from the conductor 312 to the layer 100 .

For example, the doping concentration of the semiconductor layer 313 is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the layer 100 is 10 ¹⁵ -10 ¹⁸ cm ^-3 . In one example, the doping concentration of the semiconductor layer 313 is 10 ²⁰ cm ^-3 . In one example, the doping concentration of the semiconductor layer 313 is 10 ^19.5 cm ^-3 . In one example, the doping concentration of the semiconductor layer 313 is 10 ^20.5 cm ^-3 . In one example, layer 100 has a doping concentration of 10 ^17.5 cm ^-3 . In one example, layer 100 has a doping concentration of 10 ¹⁷ cm ^-3 . In one example, layer 100 has a doping concentration of 10 ^16.5 cm ^-3 . In one example, layer 100 has a doping concentration of 10 ¹⁶ cm ^-3 . In one example, layer 100 has a doping concentration of 10 ^15.5 cm ^-3 .

Next, taking the semiconductor layer 311 as a P-type semiconductor as an example, that is, taking the carriers as electrons, the carrier providing layer 300 increases the number of cold carriers in the layer 100 and increases the number of carriers in the layer 100. The physical principle of proportion of total quantity.

Due to the physical properties of materials, when materials with different Fermi surface positions come into contact, the Fermi surfaces of these materials will change in the same direction, thereby driving the energy bands of the material (including valence band and conduction band). Band (conduction band) changes, thereby introducing energy band misalignment between multi-layer materials. Among them, the valence band of the semiconductor layer 311, the valence band of the conductor layer 312, and the Fermi surface of the layer 100 (or the semiconductor layer 313) are different, and the three contact each other in sequence, which can lead to the valence band and conduction band distribution as shown in FIG. 3A. Among them, electrons in the semiconductor layer 311 whose energy is lower than the valence band energy Ev of the semiconductor layer 311 and higher than the conduction band energy of the layer 100 (or the semiconductor layer 313 and the layer 100) can enter the layer through the quantum tunneling effect. 100 (or, semiconductor layer 313 and layer 100). The energy of this part of electrons is lower than the energy Ev, and the energy of some or all of the electrons in this part of the electrons is lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state, that is, the electrons whose energy is lower than the energy EV The electron energy of some or all of the electrons is lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state. These electrons whose energy is lower than the energy Ev and lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state are cold electrons. At the same time, since the semiconductor layer 311 is a P-type semiconductor and there are fewer electrons in the conduction band of the semiconductor layer 311, the semiconductor layer 311 has less influence on the hot carrier concentration in the layer 100. In this way, the proportion of the number of cold electrons in the layer 100 to the total number of electrons in the layer 100 can be increased.

In addition, electrons with energy higher than the energy of cold carriers can be called hot carriers. Among them, hot carriers are carriers with higher average kinetic energy than cold carriers under zero electric field. Under zero electric field, when the hot carriers in the layer 100 gain sufficient kinetic energy, they can break through the constraints of the Schottky barrier and enter the layer 200, forming a leakage current in the off-state of the diode. The average kinetic energy of cold carriers is low and they cannot overcome the constraints of the Schottky barrier. They do not enter or very few enter the layer 200 under zero electric field. When the Schottky barrier is lowered, they quickly cross the Schottky barrier. base barrier, into layer 200, enabling ultra-low (below 60mV/dec) sub-threshold swing.

In addition, when the cold carriers are electrons, the corresponding hot carriers are also electrons. When cold carriers are holes, the corresponding hot carriers are also holes.

Specifically, as shown in FIG. 3A , when the potential or potential of layer 200 is low and there is not a high enough potential difference between layer 100 and layer 200 , the height of the Schottky barrier is high, and the height of the Schottky barrier in layer 100 is low. There are not enough high-energy carriers that can cross the Schottky barrier, so the current between layer 100 and layer 200 is very small, or only a leakage current exists.

As shown in Figure 3B, when the potential of layer 200 increases, the potential difference between layer 100 and layer 200 increases, and the height of the Schottky barrier is lower, allowing cold carriers to quickly cross the Schottky barrier. , enters the layer 200, thereby generating a larger current between the layer 100 and the layer 200, that is, the current between the layer 100 and the layer 200 increases rapidly, causing the Schottky diode 10 to quickly enter the on state from the off state, showing Ultra-low (less than 60mV/dec) sub-threshold swing.

In addition, when the carriers are holes, the physical principle of increasing the proportion of the number of cold carriers to the total number of carriers in the layer 100 is similar to the physical principle described above and will not be described again here.

Embodiment 2 adopts the Schottky diode 10 of the reverse bias structure B1.

Referring to FIG. 4 , Embodiment 2 provides a Schottky diode 10 using a reverse bias structure B1. In the reverse bias structure B1, the layer 100 is a metal layer, the layer 200 is a semiconductor layer, and the carrier providing layer 300 can be the semiconductor layer 300. Among them, the semiconductor layer 300 and the layer 200 are doped with impurities of different properties. That is, if the semiconductor layer 300 is a P-type semiconductor, the layer 200 is an N-type semiconductor. That is, if the semiconductor layer 300 is an N-type semiconductor, the layer 200 is a P-type semiconductor.

In an illustrative example of Embodiment 2, the doping concentration of semiconductor layer 300 is greater than the doping concentration of layer 200 . In other words, the semiconductor layer 300 is a heavily doped semiconductor, and the layer 200 is a lightly doped semiconductor. For example, the doping concentration of the semiconductor layer 300 is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the layer 200 is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

In one example, the doping concentration of the semiconductor layer 300 is 10 ²⁰ cm ^-3 . In one example, the doping concentration of the semiconductor layer 300 is 10 ^19.5 cm ^-3 . In one example, the doping concentration of the semiconductor layer 300 is 10 ^20.5 cm ^-3 . In one example, layer 200 has a doping concentration of 10 ^17.5 cm ^-3 . In one example, layer 200 has a doping concentration of 10 ¹⁷ cm ^-3 . In one example, layer 200 has a doping concentration of 10 ^16.5 cm ^-3 . In one example, layer 200 has a doping concentration of 10 ¹⁶ cm ^-3 . In one example, layer 200 has a doping concentration of 10 ^15.5 cm ^-3 .

In an illustrative example of Embodiment 2, the metal layer may be made of metal, such as one or a combination of at least two of gold, silver, aluminum, platinum, etc.

In an illustrative example of Embodiment 2, the metal layer may be replaced by a suicide layer. The material of the silicide layer may be metal silicide. Metal silicide refers to compounds of metals (such as nickel, titanium, cobalt, lithium, calcium, magnesium, iron, chromium, etc.) and has excellent electrical and thermal conductivity. In one example, the material of the silicide layer is specifically one of NiSi ₂ , TiSi ₂ , and CoSi ₂ or a combination of at least two of them.

In an illustrative example of Embodiment 2, the metallic layer may be replaced by a semi-metallic layer. The material of the semi-metal layer is semi-metal. The density of electronic states near the Fermi level of a semi-metal material whose conduction band and valence band are closely spaced is greater than that of an insulator and much smaller than that of a metal. Graphene, three-dimensional Bi, Na ₃ Bi, Cd ₃ As ₂ , carbon nanotubes, etc. are relatively typical semimetals.

In an illustrative example of Embodiment 2, the metal layer may be replaced by a cold metal layer. The material of the cold metal layer is cold metal (clod metal). Cold metal refers to a type of material whose electronic state density decreases rapidly near the Fermi surface, such as NbSe ₂ , NbTe ₂ , TaSe ₂ , TaTe ₂ , NbS ₂ , and TaS ₂ . Among them, NbSe ₂ , NbTe ₂ , TaSe ₂ , and TaTe ₂ can be called cold electron metals and can provide electrons. It can be called a cold hole metal, and NbS ₂ and TaS ₂ can provide holes.

In an illustrative example of Embodiment 2, the metal layer may be replaced by a transition metal dichalcogenide layer.

In an illustrative example of Embodiment 2, as shown in FIG. 4 , Schottky diode 10 further includes an ohmic contact layer. The ohmic contact layer is used to reduce the resistance between layer 200 and the device to which layer 200 is connected (such as a power supply or driver circuit). Exemplarily, the ohmic contact layer includes a semiconductor layer 411 and a conductor layer 412. The semiconductor layer 411 is located between the conductor layer 412 and the layer 200, and one side of the semiconductor layer 411 is in contact with the layer 200 and the other side is in contact with the conductor layer 412, thereby forming an ohmic contact layer.

Among them, the semiconductor layer 411 and the layer 200 are doped with impurities of the same nature. That is, if the layer 200 is an N-type semiconductor, the semiconductor layer 411 is also an N-type semiconductor. If layer 200 is a P-type semiconductor, then semiconductor layer 411 is also a P-type semiconductor. Furthermore, the doping concentration of the semiconductor layer 411 is greater than the doping concentration of the layer 200 . In other words, the semiconductor layer 411 is a heavily doped semiconductor, and the layer 200 is a lightly doped semiconductor. For example, the doping concentration of the semiconductor layer 411 is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the layer 200 is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

For example, the conductor layer 412 may be made of metal. Such as gold, silver, aluminum, platinum, etc. The conductor layer 412 may be made of silicide. Specifically, the silicide may be metal silicide. For example, one or a combination of at least two of NiSi ₂ , TiSi ₂ , and CoSi ₂ .

Next, taking the semiconductor layer 300 as a P-type semiconductor as an example, that is, taking the carriers as electrons, the carrier providing layer 300 increases the number of cold carriers in the layer 100 and increases the number of carriers in the layer 100. The physical principle of proportion of total quantity.

Due to the physical properties of materials, when materials with different Fermi surface positions come into contact, the Fermi surfaces of these materials will change in the direction of the same position, which will drive the energy band change of the material, thereby introducing energy band dislocation between multi-layer materials. Among them, the valence band of the semiconductor layer 300 and the Fermi surface of the layer 100 are different. Contact between the two can lead to the valence band and conduction band distribution as shown in FIG. 5A. Among them, electrons in the semiconductor layer 300 whose energy is lower than the valence band energy Ev of the semiconductor layer 300 and higher than the conduction band energy of the layer 100 can enter the layer 100 through the quantum tunneling effect. The energy of this part of electrons is lower than the energy Ev, and the energy of some or all of the electrons in this part of the electrons is lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state, that is, the electrons whose energy is lower than the energy EV The energy of some or all of the electrons is lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state. These electrons whose energy is lower than the energy Ev and lower than the height of the Schottky barrier when the Schottky diode 10 is in the off state are cold electrons. At the same time, since the semiconductor layer 300 is a P-type semiconductor and has fewer electrons in its conduction band, the semiconductor layer 300 has less influence on the hot carrier concentration in the layer 100 . In this way, the proportion of the number of cold electrons in the layer 100 to the total number of electrons in the layer 100 can be increased.

In addition, electrons with energy higher than the energy of cold carriers can be called hot carriers. Among them, hot carriers are carriers with higher average kinetic energy than cold carriers under zero electric field. Under zero electric field, when the hot carriers in the layer 100 gain sufficient kinetic energy, they can break through the constraints of the Schottky barrier and enter the layer 200, forming a leakage current in the off-state of the diode. The average kinetic energy of cold carriers is low and they cannot overcome the constraints of the Schottky barrier. They do not enter or very few enter the layer 200 under zero electric field. When the width of the Schottky barrier decreases, they can pass through the quantum barrier. Tunneling effect, tunneling across the Schottky barrier into layer 200, enabling ultra-low (less than 60mV/dec) sub-threshold swing.

Specifically, as shown in FIG. 5A , when the potential of layer 200 is low and there is not a high enough potential difference between layer 100 and layer 200 , the Schottky barrier is wider and tunneling through the Schottky barrier The base barrier has fewer carriers, so the current between layer 100 and layer 200 is very small, or there is only leakage current.

As shown in Figure 5B, when the potential of layer 200 increases, the potential difference between layer 100 and layer 200 increases, and the width of the Schottky barrier decreases, allowing cold carriers to pass through the quantum tunneling effect. Passing through the Schottky barrier and entering the layer 200, a large current is generated between the layer 100 and the layer 200, that is, the current between the layer 100 and the layer 200 increases rapidly, causing the Schottky diode 10 to quickly change from the off state. Enters the conduction state and exhibits ultra-low (less than 60mV/dec) sub-threshold swing.

Embodiment 3 adopts the Schottky diode 10 of the forward bias structure A2.

Referring to FIG. 6 , Embodiment 3 provides a Schottky diode 10 using a forward-biased structure A2. In the forward-biased structure A2, the layer 100 is a semiconductor layer, the layer 200 is a metal layer, and the carrier providing layer 300 may include a layer 611. The material of layer 611 can be semi-metal or cold metal. Semimetals are a type of material with a very close distance between the conduction band and the valence band. Their density of states near the Fermi level is larger than that of insulators and much smaller than that of metals. Cold metals are a type of material in which the density of electronic states decreases rapidly near the Fermi surface.

For convenience of description, in the following, when no special distinction is made between semimetals and cold metals, they may be simply referred to as cold source metals.

Figure 7 shows the carrier density of states at different energies for the metal and the cold source metal. The ordinate in Figure 7 is energy, and the constant coordinate is carrier density of states. The density of carrier states represents the density or proportion of carriers with corresponding energy. As shown in Figure 7, compared with metals, the proportion of carriers with energy lower than the Schottky barrier height is higher in the cold source metal. The height of the Schottky barrier here refers to the height of the Schottky barrier when the Schottky diode 10 is in the off state. In other words, compared with metals, the density or proportion of cold carriers in cold source metals is greater. Therefore, layer 611 can provide more cold carriers to layer 100 , thereby increasing the proportion of the number of cold carriers in layer 100 to the total number of carriers in layer 100 .

Depending on the semiconductor type of layer 100, the material of layer 611 varies.

When the layer 100 is an N-type semiconductor, the material of the layer 611 can be at least one of cold metals such as NbSe ₂ , NbTe ₂ , TaSe ₂ , TaTe _{2 ,} etc., or it can be a P-type doped semi-metal, or it can be NbSe. _2. A mixture of cold metals such as NbTe ₂ , TaSe ₂ , and TaTe ₂ and P-type doped semimetals. Among them, the semi-metal can be at least one of graphene, three-dimensional Bi, Na ₃ Bi, Cd ₃ As ₂ , etc. P-type doping can change the position of the Fermi surface of the semi-metal material, thereby obtaining a P-type doped semi-metal with a suitable carrier state density to prepare layer 611.

When the layer 100 is an N-type semiconductor, the material of the layer 611 can be at least one of cold metals such as NbS ₂ and TaS ₂ , or can be an N-type doped semi-metal, or can be a cold metal such as NbS ₂ and TaS ₂ . Mixture of metals and N-type doped semimetals. Among them, the semi-metal can be at least one of graphene, three-dimensional Bi, Na ₃ Bi, Cd ₃ As ₂ , etc. N-type doping can change the position of the Fermi surface of the semi-metal material, thereby obtaining an N-type doped semi-metal with a suitable carrier state density to prepare layer 611.

In an illustrative example of Embodiment 3, the metal layer may be replaced by a suicide layer. For details of the silicide layer, please refer to the above introduction and will not be repeated here.

In an illustrative example of Embodiment 3, the metal layer may be replaced by a transition metal dichalcogenide layer.

In an illustrative example of Embodiment 3, as shown in FIG. 6 , carrier providing layer 300 may include semiconductor layer 612 . Semiconductor layer 612 is located between layer 611 and layer 100 for reducing the resistance between layer 611 and layer 100 . The semiconductor layer 612 and the layer 100 are doped with impurities of the same nature, and the doping concentration of the semiconductor layer 612 is greater than the doping concentration of the layer 100 . In other words, the semiconductor layer 612 is a heavily doped semiconductor, and the layer 100 is a lightly doped semiconductor. For example, the doping concentration of the semiconductor layer 612 is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the layer 100 is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

In Embodiment 3, the carrier providing layer 300 can provide more cold carriers for the source end of the Schottky diode 10 (ie, the layer 100), thereby increasing the number of cold carriers in the source end. proportion of the total number of carriers. When the potential of the layer 200 of the Schottky diode is low, ie when the Schottky diode 10 is in the off state, the cold carriers do not cross or tunnel through the Schottky barrier, or only very few cold carriers Carriers cross or tunnel through the Schottky barrier. When the potential of the Schottky diode layer 200 increases, that is, when the Schottky diode 10 changes from the off state to the on state, the cold carriers quickly cross or tunnel through the Schottky barrier, causing the current to increase rapidly. Large, speed up the switching speed of Schottky diode 10 from off state to on state, exhibiting ultra-low (less than 60mV/dec) sub-threshold swing.

Embodiment 4 adopts the Schottky diode 10 with the reverse bias structure B2.

Referring to FIG. 8 , Embodiment 4 provides a Schottky diode 10 using a reverse bias structure B2. In the reverse bias structure B2, the layer 100 and the carrier providing layer 300 are the same layer, and the layer 200 is a semiconductor layer. The material of the layer 100 or the carrier providing layer 300 can be cold metal or semi-metal.

As mentioned above, compared with metals, the density or proportion of cold carriers in cold metals and semi-metals is larger. That is, the proportion of carriers with energy lower than the Schottky barrier height is higher in cold metals and semimetals. The height of the Schottky barrier here refers to the height of the Schottky barrier when the Schottky diode 10 is in the off state. Therefore, the layer 100 has more cold carriers, that is, the material of the layer 100 is cold metal or semi-metal, which increases the proportion of the number of cold carriers in the layer 100 to the total number of carriers in the layer 100 .

In an illustrative example of Embodiment 4, Schottky diode 10 further includes an ohmic contact layer in contact with layer 200 . The ohmic contact layer is used to reduce the resistance between layer 200 and the device to which layer 200 is connected (such as a power supply or driver circuit). Exemplarily, the ohmic contact layer includes a semiconductor layer 811 and a conductor layer 812. The semiconductor layer 811 is located between the conductor layer 812 and the layer 200, and one side of the semiconductor layer 811 is in contact with the layer 200, and the other side is in contact with the conductor layer 812, thereby forming an ohmic contact layer.

Among them, the semiconductor layer 811 and the layer 200 are doped with impurities of the same nature. That is, if the layer 200 is an N-type semiconductor, the semiconductor layer 811 is also an N-type semiconductor. If layer 200 is a P-type semiconductor, then semiconductor layer 811 is also a P-type semiconductor. Furthermore, the doping concentration of the semiconductor layer 811 is greater than the doping concentration of the layer 200 . In other words, the semiconductor layer 811 is a heavily doped semiconductor, and the layer 200 is a lightly doped semiconductor. For example, the doping concentration of the semiconductor layer 811 is 10 ¹⁹ -10 ²¹ cm ^-3 , and the doping concentration of the layer 200 is 10 ¹⁵ -10 ¹⁸ cm ^-3 .

For example, the conductor layer 812 may be made of metal. Such as gold, silver, aluminum, platinum, etc. The conductor layer 812 may be made of silicide. Specifically, the silicide may be metal silicide. For example, one or a combination of at least two of NiSi ₂ , TiSi ₂ , and CoSi ₂ .

In Embodiment 4, the proportion of cold carriers in the source end of the Schottky diode 10 (ie, the layer 100). When the potential of the layer 200 of the Schottky diode is low, ie when the Schottky diode 10 is in the off state, the cold carriers do not cross or tunnel through the Schottky barrier, or only very few cold carriers Carriers cross or tunnel through the Schottky barrier. When the potential of the Schottky diode layer 200 increases, that is, when the Schottky diode 10 changes from the off state to the on state, the cold carriers quickly cross or tunnel through the Schottky barrier, causing the current to increase rapidly. Large, speed up the switching speed of Schottky diode 10 from off state to on state, exhibiting ultra-low (less than 60mV/dec) sub-threshold swing.

The above example describes the structural form of the Schottky diode 10. It can be understood that the above description is the principle structure of the Schottky diode 10, and schematically describes the connection relationship, contact relationship, etc. of each component. The above description does not limit the specific shape of the Schottky diode 10 and the specific shapes, specific connection methods and contact methods of each component in the Schottky diode 10 . In actual production applications, the Schottky diode tube 100 can be implemented as a vertical structure, a horizontal structure, a laminated structure, etc.

Each semiconductor layer in the Schottky diode 10 described in the above embodiments may be obtained by doping an intrinsic semiconductor layer with impurities. Among them, the intrinsic semiconductor layer is made of a material that can realize the above-mentioned energy band dislocation. The material of the intrinsic semiconductor layer that can be used in the embodiments of the present application can be any one of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes. It can also be made of germanium, silicon germanium, gallium nitride, A combination of two or more of indium, gallium, arsenic and carbon nanotubes.

In some embodiments, the semiconductor layer forming the Schottky barrier in the Schottky diode 10 may be replaced by a carbon nanotube layer, and the metal layer may be replaced by a graphene layer. That is to say, the carbon nanotube layer can replace the semiconductor layer used to form the Schottky barrier, and the graphene layer can replace the metal layer used to form the Schottky barrier. That is, the interface between the carbon nanotube layer and the graphene layer forms the Schottky barrier of the Schottky diode 10 . Carbon nanotubes have both high electrical mobility and atomic layer quasi-one-dimensional structure. The mobility exceeds 1500cm ² /Vs and the saturation speed can reach 3×10 ⁷ cm/s. Therefore, after the Schottky diode enters the conductive state, it has Larger conduction current. Carbon nanotube materials have good ductility and are easily compatible with various device shapes, which is conducive to three-dimensional (3D) integration of devices.

In one example of these embodiments, the carbon nanotube layer is made of carbon nanotubes doped with impurities, the graphene layer is made of graphene doped with impurities, and the carbon nanotubes and graphene are doped with different properties. of impurities. Therefore, by doping impurities into carbon nanotubes and graphene, the Fermi surface of the carbon nanotube layer and the Fermi surface of the graphene layer can be adjusted to achieve energy band dislocation between the carbon nanotube layer and the graphene layer, and Create a Schottky barrier.

In another example of these embodiments, the carbon nanotube layer is made of carbon nanotubes, and the graphene layer is made of graphene. An additional gate (not shown) can be added to the Schottky diode 10, and the Fermi surface of the carbon nanotube layer and the Fermi surface of the graphene layer can be controlled through the gate to realize the connection between the carbon nanotube layer and the graphene layer. The energy band dislocation and the Schottky barrier are generated. In this example, no doping process is required, and the Fermi surface of the carbon nanotube layer and the Fermi surface of the graphene layer are controlled through the gate, allowing higher control flexibility.

The above example introduces the structure, material, and function implementation principle of the Schottky diode 10 . Next, the preparation scheme of the Schottky diode 10 is introduced as an example.

FIG. 9A shows a preparation scheme of the Schottky diode 10 using the forward-biased structure A1, and the specific process is as follows.

Obtain intrinsic semiconductor, that is, semiconductor that has not been doped with impurities, as a substrate. The intrinsic semiconductor layer may be any one of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes.

Corresponding impurities are injected into the intrinsic semiconductor and annealed and activated to prepare the semiconductor layer 311. Among them, in the embodiment of the present application, "implantation" can be understood as "doping", that is, the injected impurities are doping impurities.

A conductor layer 312 is grown on the semiconductor layer 311.

Semiconductor layer 313 may be deposited on conductor layer 312. Among them, this step is optional, that is, the semiconductor layer 313 may or may not be prepared.

Next, the layer 100 can be deposited on the semiconductor layer 313 (when the semiconductor layer 313 is prepared) or the conductor layer 312 (when the semiconductor layer 313 is not prepared), and an annealing process is performed to crystallize the layer 100 and the semiconductor layer 313. and activate doped impurities.

Layer 200 is prepared on layer 100 . Then, etching is performed. Among them, the upper surface of the semiconductor layer 311 is etched. The upper surface of the semiconductor layer 311 refers to the side of the semiconductor layer 311 that is away from the intrinsic semiconductor.

Then, a photoresist may be deposited, and the prepared part may be overetched to expose a partial area of the upper surface of the semiconductor layer 311, and an electrode may be deposited on the exposed area. Among them, the electrodes are in contact with the semiconductor layer 311 but not with the conductor layer 312 . The electrode may be a metal electrode.

Finally, the photoresist is washed away, and the Schottky diode 10 using the forward-biased structure A1 can be prepared.

The materials of each layer in the preparation process shown in Figure 9A can be referred to the above introduction to the embodiment shown in Figure 2, and will not be described again here.

FIG. 9B shows a preparation scheme of the Schottky diode 10 using the reverse bias structure B1, and the specific process is as follows.

Corresponding impurities are injected into the intrinsic semiconductor and annealed and activated to prepare a semiconductor layer 300, that is, the carrier providing layer 300.

Layer 100 is grown on semiconductor layer 300 .

Layer 200 may be deposited on layer 100 .

Next, semiconductor layer 411 may be deposited on layer 200. Among them, this step is optional.

An annealing process may be performed to crystallize layer 200 as well as semiconductor layer 411 and activate doped impurities.

In the case of preparing the semiconductor layer 411, the conductor layer 412 may be prepared on the semiconductor layer 411.

Then, etching is performed. Wherein, the upper surface of the semiconductor layer 300 is etched. The upper surface of the semiconductor layer 300 refers to the side of the semiconductor layer 300 facing away from the intrinsic semiconductor.

Then, a photoresist may be deposited, and the prepared part may be overetched to expose a partial area of the upper surface of the semiconductor layer 300, and an electrode may be deposited on the exposed area. Therein, the electrode is in contact with the semiconductor layer 300 but not with the layer 100. The electrode may be a metal electrode.

Finally, the photoresist is washed away, and the Schottky diode 10 using the reverse bias structure B1 can be prepared.

The materials of each layer in the preparation process shown in Figure 9B can refer to the above introduction to the embodiment shown in Figure 4, and will not be described again here.

FIG. 10A shows another preparation scheme of the Schottky diode 10 using the forward-biased structure A1, which can prepare the Schottky diode 10 of the horizontal structure. In the horizontally structured Schottky diode 10 , the conductor layer 312 may rest on the semiconductor layer 311 and the semiconductor layer 313 , or may be inserted between the semiconductor layer 311 and the semiconductor layer 313 . The program process is detailed as follows.

Obtain silicon on insulator (SOI). As shown in Figure 10A, SOI consists of a top layer of silicon, an oxide layer, and a back substrate that are connected in sequence.

Corresponding impurities may be implanted on one side of the top silicon to prepare the semiconductor layer 311.

Then, corresponding impurities are implanted into a region of the top silicon next to the semiconductor layer 311 and in contact with the semiconductor layer 311 to prepare the semiconductor layer 313 .

Afterwards, corresponding impurities are implanted into the area of the top silicon where impurities have not yet been implanted to prepare layer 100 .

Layer 200 may be deposited on layer 100 .

A conductor layer 312 may be prepared on the semiconductor layer 311 and the semiconductor layer 313. Both the semiconductor layer 311 and the semiconductor layer 313 are in contact with the prepared conductor layer 312, whereby the conductor layer 312 rests on the semiconductor layer 311 and the semiconductor layer 313.

Finally, electrodes can be prepared on the semiconductor layer 311. The prepared electrode is in contact with the semiconductor layer 311 and not in contact with the conductor layer 312 .

Thus, the Schottky diode 10 using the forward-biased structure A1 can be prepared.

The material of each layer in the preparation process shown in Figure 10A can be referred to the above introduction to the embodiment shown in Figure 2, and will not be described again here.

FIG. 10B shows another manufacturing scheme of the Schottky diode 10 using the reverse bias structure B1, which can prepare the Schottky diode 10 of the horizontal structure. In a horizontally structured Schottky diode 10 , layer 100 may rest on semiconductor layer 300 and layer 200 , or may be interposed between semiconductor layer 300 and layer 200 . The program process is detailed as follows.

An SOI is obtained, and corresponding impurities are implanted on one side of the top silicon of the SOI to prepare the semiconductor layer 300 .

Then, corresponding impurities are implanted into a region of the top silicon next to the semiconductor layer 300 and in contact with the semiconductor layer 300 to prepare the layer 200 .

After that, corresponding impurities are injected into the area of the top silicon where impurities have not yet been implanted to prepare the semiconductor layer 411.

Conductor layer 412 may be deposited on semiconductor layer 411.

Layer 100 may be prepared on semiconductor layer 300 and layer 200. Both the semiconductor layer 300 and the layer 200 are in contact with the prepared layer 100 , whereby the layer 100 rides on the semiconductor layer 300 and the layer 200 .

Finally, electrodes may be prepared on the semiconductor layer 300 . The prepared electrode is in contact with the semiconductor layer 300 but not in contact with the layer 100 .

Thus, the Schottky diode 10 using the reverse bias structure B1 can be prepared.

The materials of each layer in the preparation process shown in Figure 10B can be referred to the above introduction to the embodiment shown in Figure 4, and will not be described again here.

FIG. 11 shows another preparation scheme of the Schottky diode 10 using the reverse bias structure B1. The specific process is as follows.

Corresponding impurities are implanted on the intrinsic semiconductor and annealed and activated to prepare the layer 200 .

Layer 100 is grown on layer 200, and semiconductor layer 300 is deposited on layer 100 and annealed.

Then, photolithography or etching is used to remove the layer 100 and the semiconductor layer 300 on the partial area of the layer 200 to expose the partial area. Then, corresponding impurities are injected into the partial region and annealed to prepare a semiconductor layer 411 with a higher doping concentration than the layer 200 , wherein the semiconductor layer 411 is not in contact with the layer 100 .

Then, a conductor layer 412 is prepared on the semiconductor layer 411. Wherein, conductor layer 412 is not in contact with layer 200.

The material of each layer in the preparation process shown in Figure 11 can be referred to the above introduction to the embodiment shown in Figure 4, and will not be described again here.

FIG. 12 shows a preparation scheme of the Schottky diode 10 using the forward-biased structure A2. The specific process is as follows.

Corresponding impurities are implanted on the intrinsic semiconductor and annealed and activated to prepare the layer 100 .

Semiconductor layer 612 is deposited on layer 100 and layer 611 is grown on semiconductor layer 612 .

Layer 611 and semiconductor layer 612 are etched to expose portions of layer 100 . Layer 200 is then grown locally over the exposed areas of layer 100 . Therein, layer 200 is in contact with layer 100 but not with semiconductor layer 612 .

Electrodes are prepared on layer 611.

Thus, the Schottky diode 10 using the forward-biased structure A2 is obtained.

The materials of each layer in the preparation process shown in Figure 12 can be referred to the above introduction to the embodiment shown in Figure 6, and will not be described again here.

FIG. 13 shows a preparation scheme of the Schottky diode 10 using the reverse bias structure B2. The specific process is as follows.

Corresponding impurities are implanted on the intrinsic semiconductor and annealed and activated to prepare a semiconductor layer 811.

Layer 200 is deposited on semiconductor layer 811, and layer 100 is grown on layer 200.

Layer 100 and layer 200 are etched to expose portions of semiconductor layer 811 . Then, a conductor layer 812 is locally grown on the exposed area of the semiconductor layer 811 . Wherein, the conductor layer 812 is in contact with the semiconductor layer 811 but not with the layer 200 .

Electrodes can be prepared on layer 100 .

Thus, the Schottky diode 10 using the reverse bias structure B2 is obtained.

The materials of each layer in the preparation process shown in Figure 13 can be referred to the above introduction to the embodiment shown in Figure 8 and will not be described again here.

The preparation method described above has simple procedures, is easy for industrial operation, and can efficiently prepare the Schottky diode 10 .

The embodiment of the present application conducts a simulation test on the switching ratio of the Schottky diode 10 of the forward-biased structure A1 (that is, the ratio of the current in the diode's on state to the current in its off state), and obtains the volt-ampere as shown in Figure 14A Characteristic (IV) curve, it can be seen that compared with the traditional Schottky diode, the Schottky diode 10 of the forward-biased structure A1 has a steeper IV curve slope.

In this embodiment of the present application, the switching ratio of the Schottky diode 10 of the reverse bias structure B1 is simulated and tested, and the volt-ampere characteristic (IV) curve shown in Figure 14B is obtained. It can be seen that compared with the traditional Schottky diode, The Schottky diode 10 of the reverse biased structure B1 has a steeper IV curve slope.

It can be understood that the steeper the slope of the IV curve, the smaller the sub-threshold swing and the larger the on-off ratio. Therefore, the Schottky diode 10 provided by the embodiment of the present application has a smaller sub-threshold swing, a larger switching ratio, and can quickly enter the off-state to the on-state. When the Schottky diode 10 is used as a microelectronic switching element of an electronic device, the operation delay of the electronic device can be reduced.

The Schottky diode 10 provided in the embodiment of the present application can be applied to a variety of power circuits, such as inverter circuits, rectifier circuits, freewheeling circuits, etc.

Among them, Figure 15 shows a power circuit that can convert direct current into alternating current. The power circuit may be a three-phase inverter circuit including three bridge arms for generating U-phase, V-phase, and W-phase. Among them, two switching elements can be arranged in series on each bridge arm. By controlling the conduction and disconnection of the switching elements on different bridge arms, the direct current can be converted into alternating current, so that the AC motor can be driven. Wherein, the switching element on the bridge arm may be composed of a Schottky diode 10 and a field effect transistor. For example, the field effect transistor may be an insulated gate bipolar transistor (IGBT).

It can be understood that FIG. 15 is only used to illustrate the use of the Schottky diode 10 and is not limiting. The Schottky diode 10 can also be used in other aspects, which will not be listed here.

It can be understood that the above embodiments are only used to illustrate the technical solutions of the present application and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still The technical solutions described in each embodiment may be modified, or some of the technical features may be equivalently replaced; however, these modifications or substitutions do not cause the essence of the corresponding technical solutions to depart from the scope of the technical solutions in each embodiment of the present application.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present invention. should be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

A Schottky diode is characterized by including:

level one;

a second layer in contact with the first layer, wherein the first layer is one of a semiconductor layer and a metal layer, and the second layer is the other of the semiconductor layer and the metal layer, so There is a Schottky barrier between the first layer and the second layer;

a carrier providing layer coupled to the first layer for increasing the proportion of the number of first carriers in the first layer to the total number of carriers in the first layer; wherein , the energy of the first carrier is lower than the height of the Schottky barrier when the Schottky diode is in the off state;

Wherein, when the Schottky diode enters the on state from the off state, the height of the Schottky barrier decreases, so that the first carrier crosses the Schottky barrier and enters the second layer; or, the width of the Schottky barrier is reduced so that the first carrier tunnels through the Schottky barrier and enters the second layer.
The Schottky diode according to claim 1, characterized in that:

The semiconductor layer is obtained by doping impurities in the intrinsic semiconductor layer, and the material of the intrinsic semiconductor layer is at least one of germanium, silicon germanium, gallium nitride, indium gallium arsenide, and carbon nanotubes; or,

The semiconductor layer is replaced by a carbon nanotube layer.
The Schottky diode according to claim 1 or 2, wherein the first layer is the semiconductor layer, the second layer is the metal layer, and the carrier providing layer includes a first A semiconductor layer and a first conductor layer, wherein the first conductor layer is located between the first semiconductor layer and the first layer, and the first semiconductor layer and the first layer are doped with impurities of different properties. .
The Schottky diode according to claim 3, wherein the carrier providing layer further includes a second semiconductor layer located between the first conductor layer and the first layer. During this time, the second semiconductor layer and the first layer are doped with impurities of the same nature, and the doping concentration of the second semiconductor layer is greater than the doping concentration of the first layer.
The Schottky diode according to claim 4, wherein the doping concentration of the second semiconductor layer is 10 19 -10 21 cm -3 and the doping concentration of the first layer is 10 15 -10 18 cm -3 .
The Schottky diode according to any one of claims 3 to 5, wherein the doping concentration of the first semiconductor layer is 10 19 -10 21 cm -3 , and the doping concentration of the first layer is 10 19 -10 21 cm -3 . 10 15 -10 18 cm -3 .
The Schottky diode according to any one of claims 3 to 6, wherein the first conductor layer is made of metal or silicide; or, the metal layer is made of a silicide layer or a transition metal disulfide. Object layer replacement.
The Schottky diode according to claim 1, wherein the first layer is the metal layer, the second layer is the semiconductor layer, and the carrier providing layer includes a third semiconductor layer. , the third semiconductor layer and the second layer are doped with impurities of different properties.
The Schottky diode according to claim 8, wherein the doping concentration of the third semiconductor layer is greater than the doping concentration of the second layer.
The Schottky diode according to claim 9, wherein the doping concentration of the third semiconductor layer is 10 19 -10 21 cm -3 and the doping concentration of the second layer is 10 15 -10 18 cm -3 .
The Schottky diode according to any one of claims 8 to 10, characterized in that the Schottky diode further includes: an ohmic contact layer in contact with the second layer.
The Schottky diode according to any one of claims 8-11, characterized in that the metal layer is replaced by any one of a semi-metal layer, a cold metal layer, a silicide layer, and a transition metal disulfide layer. .
The Schottky diode according to claim 1, wherein the first layer is the semiconductor layer, the second layer is the metal layer, and the carrier providing layer includes a third layer, The material of the third layer is a cold metal layer or a semi-metal layer.
The Schottky diode according to claim 13, wherein the carrier providing layer further includes a fourth semiconductor layer, the fourth semiconductor layer is located between the third layer and the first layer. , the fourth semiconductor layer and the first layer are doped with impurities of the same nature, and the doping concentration of the fourth semiconductor layer is greater than the doping concentration of the first layer.
The Schottky diode according to claim 13 or 14, characterized in that:

The material of the first layer is N-type semiconductor, and the material of the third layer is at least one of NbSe 2 , NbTe 2 , TaSe 2 , TaTe 2 , and P-type doped semimetal; or,

The material of the first layer is P-type semiconductor, and the material of the third layer is at least one of NbS 2 , TaS 2 and N-type doped semi-metal.
The Schottky diode according to any one of claims 13 to 15, wherein the metal layer is replaced by a silicide layer or a transition metal disulfide layer.
The Schottky diode according to claim 1, wherein the first layer and the carrier providing layer are the same layer, and the second layer is a semiconductor layer, wherein the first layer The material is cold metal layer or semi-metal layer.
The Schottky diode according to claim 17, wherein the Schottky diode further includes: an ohmic contact layer in contact with the second layer.
A power circuit, characterized by including the Schottky diode and field effect transistor described in any one of claims 1-18.