WO2023178655A1 - Semiconductor light-emitting element and light-emitting device - Google Patents

Abstract

The present invention provides a semiconductor light-emitting element and a light-emitting device. A bonding pad of the semiconductor light-emitting element is designed to comprise tin layers and a copper layer located between the tin layers; in a die bonding process, copper atoms in the copper layer can participate in an intermetallic compound reaction of Au/Ni/Sn to generate a Cu/Au/Ni/Sn quaternary intermetallic compound (IMC) (CuNiAu) 6Sn5; and the quaternary compound is discontinuously distributed in a welding spot, and the tissue strength is close to that of the welding spot, thereby effectively enhancing the binding force between a chip and a support. Therefore, the stability of the semiconductor device is improved. The bonding pad can be designed to comprise two tin layers and one copper layer, or at least three tin layers and multiple copper layers; the design style is flexible and diversified; and the thickness and content of tin in the bonding pad can be ensured by means of changing the design style, thereby increasing the bonding force between the bonding pad and a die bonding support, and improving the stability of the device. Since copper has good thermal conductivity, the bonding pad containing the copper layer(s) can conduct heat and dissipate heat more quickly, so that the reliability of the semiconductor light-emitting element is improved.

Description

Semiconductor light-emitting element and light-emitting device Technical field

The present invention relates to the technical field of semiconductor devices, and in particular to a semiconductor light-emitting element and a light-emitting device.

Background technique

The packaging of ordinary size flip-chip LED chips mainly uses ordinary solder paste reflow. First, apply solder paste on the circuit board, and then place the chip in the corresponding position. The solder paste has a certain solidification effect and can fix the chip on the circuit board. However, when the size of the LED is too small, such as the smaller Mini-LED chip, the precision, thickness, and alignment accuracy of the steel mesh are required during die bonding, resulting in high mass production costs and difficulty; the amount of solder paste applied It is difficult to control accurately. The solder paste coated on the circuit board is easy to flow, and the positive and negative pads are easily connected through the flowing solder paste, causing a short circuit.

Some existing technologies use prefabricated tin electrodes to set the soldering pad to include a tin layer. After melting, the tin in the tin layer can diffuse into the metal layer on the circuit board. There is no need to apply solder paste on the circuit board for fixation, which reduces costs and Difficulty, thus preventing the solder paste from contacting the positive and negative electrode pads and causing a short circuit. However, prefabricated tin electrodes are limited by evaporation capabilities, and the thickness is generally around 10 μm. Compared with brush-coated solder paste, the amount of tin is less, resulting in poor bonding between the pad and the substrate and poor device stability.

In addition, conventional chips and circuit board pads have a gold layer on the surface as a protective layer to prevent the pads from being oxidized and corroded. Under the gold layer, there is a nickel layer as a tin barrier layer to prevent tin from diffusing into the chip or circuit board. Since Au/Ni/Sn will form a continuous and brittle ternary intermetallic compound (NiAu)Sn ₄ at the reflow temperature, especially when the thickness of the gold layer is thick, the ternary metal will form a relatively large compound. Thick thickness reduces the bonding force between the chip and the circuit board, affecting reliability.

Technical solutions

In view of the above-mentioned defects in the bonding process of the light-emitting element pads in the prior art, the present invention provides a semiconductor light-emitting element and a light-emitting device. The pad of the semiconductor light-emitting element is designed to include a tin layer and is located between the tin layers. During the solidification process of the copper layer, the copper atoms in the copper layer can participate in the Au/Ni/Sn intermetallic compound reaction to generate Cu/Au/Ni/Sn quaternary intermetallic compound (IMC, Intermetallic Compound), for example ( CuNiAu) ₆ Sn ₅ , this quaternary compound is distributed discontinuously in the solder joints, and its structural strength is close to that of the solder joints, which can effectively enhance the bonding force between the chip and the bracket.

According to an embodiment of the present invention, a semiconductor light-emitting element is provided, which includes:

A semiconductor layer, which includes, from bottom to top, a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked in sequence; and

a bonding pad, the bonding pad is located above the semiconductor layer, the bonding pad includes a first bonding pad and a second bonding pad, the first bonding pad is connected to the semiconductor layer of the first conductivity type, and the third bonding pad Two pads are connected to the semiconductor layer of the second conductivity type. The pads include multiple tin layers and at least one copper layer. The copper layer is located between the solder layers and is arranged parallel to the tin layer. .

Optionally, the percentage of copper atoms in the copper layer to the total atoms of the copper layer is at least 50%.

Optionally, the total thickness of the copper layer is between 0.05 μm~ 2.5 μm.

Optionally, the total thickness of the tin layer is between 4 μm and 20 μm.

Optionally, the bonding pad includes two tin layers and a copper layer located between the two tin layers.

Optionally, the bonding pad includes at least three tin layers and a copper layer located between every two tin layers.

Optionally, the outermost layer of the bonding pad away from the semiconductor layer is a tin layer.

Optionally, the copper layer and the tin layer are obtained through a step-by-step plating process.

Optionally, the copper layer is a copper layer with a copper atomic percentage higher than 90%.

Optionally, the atomic percentage of copper in the tin layer is lower than the atomic percentage of copper in the copper layer.

Optionally, the tin layer is a pure tin layer, and the copper layer is a pure copper layer.

Optionally, the length of at least one side of the chip does not exceed 200 μm.

Optionally, the bonding pad further includes a nickel layer, the nickel layer is closer to the semiconductor layer than the tin layer, and a copper layer is provided between the nickel layer and the tin layer, the The thickness of the copper layer shall not exceed 1 μm and shall not be less than 0.05 μm.

Optionally, there is a copper layer on the upper surface of the tin layer, and the thickness of the copper layer is no more than 1 μm and no less than 0.05 μm. According to another embodiment of the present invention, a semiconductor light-emitting element is provided, which includes:

A semiconductor layer, which includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked in sequence from bottom to top; and

a bonding pad, the bonding pad is located above the semiconductor layer, the bonding pad includes a first bonding pad and a second bonding pad, the first bonding pad is connected to the semiconductor layer of the first conductivity type, and the third bonding pad Two pads are connected to the semiconductor layer of the second conductivity type, and the pads include a tin layer, wherein tin is the main component of the tin layer, and after elemental analysis, at least one thickness position of the tin layer The atomic percentage of copper exceeds 10%.

Optionally, in at least one thickness position of the tin layer, the percentage content of the copper atoms does not exceed 30%.

Optionally, the copper and tin elements in the tin layer are obtained through a co-plating process.

Optionally, the thickness of the tin layer is between 4 μm and 20 μm.

According to another embodiment of the present invention, a light-emitting device is provided, which includes a substrate and a semiconductor light-emitting element, wherein,

The substrate includes a die bonding pad;

The semiconductor light-emitting element is the semiconductor light-emitting element of the present invention, and the semiconductor light-emitting element realizes the connection between the bonding pad and the solid crystal bonding pad through heating.

Optionally, before being connected to the semiconductor light emitting element, the die bonding pad has a surface layer, and the surface layer is a gold layer.

beneficial effects

As mentioned above, the semiconductor light-emitting element and light-emitting device of the present invention have the following beneficial effects:

The present invention designs the bonding pad of the semiconductor light-emitting element to include a tin layer and a copper layer located between the tin layers. During the solidification process, the copper atoms in the copper layer can participate in the intermetallic compound reaction of Au/Ni/Sn to generate Cu. /Au/Ni/Sn quaternary intermetallic compound (IMC, Intermetallic Compound), such as (CuNiAu) ₆ Sn ₅ , this quaternary compound is discontinuously distributed in the solder joints, and the structural strength is close to that of the solder joints, which can effectively strengthen the chip Bonding strength with the bracket. This improves the stability of the semiconductor device. Especially for substrates with thicker gold layers, the quaternary intermetallic compound can enhance the bonding force between the chip and the bracket.

The soldering pad of the present invention can be designed to include two layers of tin and one layer of copper, or at least three layers of tin and multiple layers of copper. The design styles are flexible and diverse, and the thickness and thickness of the tin in the pad can be ensured by changing the design style. content, which can increase the bonding force between the pad and the die-bonding bracket and improve the stability of the device.

In addition, since copper has good thermal conductivity, when the semiconductor light-emitting element is operating, the pad containing the copper layer can conduct heat and dissipate heat faster, thereby improving the reliability of the semiconductor light-emitting element.

Description of the drawings

Figures 1 and 2 show schematic diagrams of the solidification process of chips with gold electrodes in the prior art.

FIG. 3 shows a schematic diagram of the solidification process of a chip with prefabricated tin electrodes in the prior art.

Figure 4 shows a schematic diagram of the intermetallic compound formed between the die-bonding bracket and the chip electrode after die-bonding in the prior art.

FIG. 5 shows a schematic structural diagram of a semiconductor light-emitting element provided in Embodiment 1 of the present invention.

Figure 6a shows a schematic structural diagram of the pad shown in Figure 5 in an optional embodiment.

Figure 6b shows a schematic structural diagram of the pad shown in Figure 5 in another optional embodiment.

FIG. 7 shows a schematic structural diagram of a bonding pad of a semiconductor light-emitting element provided in Embodiment 2 of the present invention.

FIG. 8 shows a schematic diagram of the intermetallic compound formed between the die-bonding bracket and the pad of the semiconductor component of the present invention after the die-bonding.

FIG. 9 shows a comparison diagram of the thrust force between the bonding pads in Embodiments 1 and 2 of the present invention and the bonding pads and die-bonding brackets in the prior art.

FIG. 10 shows a schematic structural diagram of a light-emitting device provided in Embodiment 3 of the present invention.

Component label description

010 steel mesh; 020 solder paste; 030 die-hardening bracket; 031 die-hardening pad; 0311 substrate; 0312 anti-diffusion layer; 0313 anti-oxidation layer; 0314 intermetallic compound; 040 chip; 041 pad; 042 prefabricated tin electrode; 110 Semiconductor layer; 111 first conductive type semiconductor layer; 112 second conductive type semiconductor layer; 113 light emitting layer; 120 bonding pad; 121 first bonding pad; 122 second bonding pad; 1201 bonding pad base; 1201-1 titanium layer; 1201-2 aluminum layer; 1201-3 nickel layer; 1202 tin layer; 1203 copper layer; 131 first electrode; 132 second electrode; 140 crystal bonding pad; 1401 substrate; 1402 anti-diffusion layer; 1403 anti-oxidation layer; 1404 Intermetallic compound layer; 150 substrate.

Embodiments of the invention

The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

In the prior art, the method of brushing solder paste is usually used to achieve solid crystal. As shown in FIG. 1 , solder paste 020 is brushed on the die-bonding pad 031 of the die-bonding bracket 030 through the steel mesh 010 . Then, as shown in Figure 2, the chip 040 is fixed to the die-bonding bracket 030 coated with solder paste 020 through the pad 041. This method is suitable for larger-sized chips. For smaller-sized chips, such as Mini-LED chips, the precision, thickness, and alignment accuracy of the steel mesh are required when solidifying. If you use the method of brushing solder paste Die-bonding Mini-LED chips will lead to high mass production costs and difficulty. In addition, it is difficult to accurately control the amount of solder paste applied. The solder paste applied on the circuit board is easy to flow, and the positive and negative electrode pads are easily connected through the flowing solder paste, causing a short circuit.

In order to avoid various disadvantages of applying solder paste, as shown in Figure 3, in the prior art, tin electrodes 042 are also prefabricated on the pads 041 of the chip 040, and the chip 040 is fixed to the die-bonding bracket through the tin electrodes 042. 030 on. Although this solidification method can solve the various disadvantages of brushing solder paste, the prefabricated tin electrode is limited by process capabilities, and the thickness is generally about 10 μm. Compared with brushing solder paste, the amount of tin is less, resulting in the gap between the pad and the substrate. The binding force is poor and the device stability is poor.

In addition, as shown in Figure 4, the die-bonding pad 031 of the commonly used die-bonding bracket 030 is usually formed by a nickel-gold immersion process, and therefore includes a base 0311 formed of copper, an anti-diffusion layer 0312 formed of nickel, and an anti-oxidation layer 0312 formed of gold. Layer 0313. During the reflow soldering process, the solid crystal pad is connected to the solder paste 020 or the tin electrode 042. Au/Ni/Sn will form a continuous and brittle ternary intermetallic compound IMC (NiAu)Sn ₄ at the reflow soldering temperature. And due to the low tin content, IMC is difficult to diffuse, resulting in low bonding force between the chip and the bracket, affecting reliability.

Embodiment 1

In view of the above defects in the prior art, this embodiment provides a semiconductor light-emitting element. The semiconductor light-emitting element is preferably an LED chip with at least one side having a side length of no more than 300 μm.

The LED chip may be a small light emitting diode chip with a small horizontal area. The LED chip may have a horizontal cross-sectional area of about 200,000 μm ² or less, further, may have a horizontal cross-sectional area of about 90,000 μm ² or less, and further, may have a horizontal cross-sectional area of about 30,000 μm ² or more and about 65,000 μm ² or less. For example, the light emitting diode chip may have a size of 220 μm×180 μm or 250 μm×200 μm in lateral side length×longitudinal side length. However, the lateral side length and the longitudinal side length of the LED chip of this embodiment are not limited to the above dimensions. Moreover, the LED chip of this embodiment may be a small light-emitting diode chip with a thinner thickness. The length of at least one side of the LED chip does not exceed 300 μm. Furthermore, the LED chip may have a size of at least one side of less than 200 μm, and may have a size of at least one side of less than 100 μm. The thickness of the LED chip cannot exceed the length of any one side (that is, it does not exceed the length of the shortest side). For example, at least one side length of the LED chip can be approximately 150 μm or less, thus ensuring the cutting yield ( Especially laser cutting yield). Furthermore, when the side length is smaller, the thickness of the chip can be smaller, for example, the chip has a thickness of 90 μm or less, and further can have a thickness of about 40 μm or more and 90 μm or less. The LED chip of this embodiment has the above-mentioned horizontal cross-sectional area and thickness, so the LED chip can be easily applied to various electronic devices requiring small and/or thin light-emitting devices.

As shown in FIG. 5 , the LED chip includes a semiconductor layer 110 , which includes a first conductivity type semiconductor layer 111 , a light emitting layer 113 , and a second conductivity type semiconductor layer 112 stacked in sequence. The first conductivity type semiconductor layer 111 may be an N-type semiconductor layer, and the second conductivity type semiconductor layer 112 may be a P-type semiconductor layer. Of course, it is also possible that the first conductive type semiconductor layer is a P-type semiconductor layer and the second conductive type semiconductor layer is an N-type semiconductor layer. In an optional embodiment, the first conductivity type semiconductor layer 111 may be an n-type GaN layer, the light-emitting layer 113 may be a quantum well layer, and the second conductivity type semiconductor layer 112 may be a p-type GaN layer. Alternatively, the first conductivity type semiconductor layer 111 may be an n-type GaN layer, such as a Si-doped GaN layer; the light-emitting layer 113 may be an InGaN/GaN multiple quantum well, and the second conductivity type semiconductor layer 112 may be a p-type GaN layer. , such as a Mg-doped GaN layer. This embodiment shows a semiconductor light-emitting element that does not include a substrate. It should be understood that the semiconductor light-emitting element may include a substrate or similar structure according to actual needs or actual process requirements.

The LED chip may further include a substrate, which may be an insulating substrate or a conductive substrate. The substrate may be a growth substrate used to grow the semiconductor layer 110, and may include a sapphire substrate, a silicon carbide substrate, a silicon substrate, a gallium nitride substrate, an aluminum nitride substrate, etc. Furthermore, the substrate includes a plurality of protrusions formed on at least a part of the upper surface thereof. The plurality of protrusions of the substrate may be formed in regular and/or irregular patterns. In this embodiment, the substrate includes a patterned sapphire substrate (PSS), and the patterned sapphire substrate includes a plurality of protrusions formed on its upper surface.

It can be understood that structures such as a transparent conductive layer 114 and a current blocking layer may also be formed above the second conductivity type semiconductor layer 112 . The transparent conductive layer 114 is located on the second conductivity type semiconductor layer 112 . The transparent conductive layer 114 may be in ohmic contact with the second conductive type semiconductor layer 112 . The transparent conductive layer 114 may include a transparent electrode, which may include, for example, indium tin oxide (Indium Tin Oxide). Tin Oxide, ITO), zinc oxide (Zinc Oxide, ZnO), zinc indium tin oxide (Zinc Indium TinOxide (ZITO), Zinc Indium Oxide (ZIO), Zinc Tin Oxide (ZTO), Gallium Indium Tin Oxide (GITO), Gallium Indium Oxide (GIO) ), translucent conductive oxides such as Gallium Zinc Oxide (GZO), Aluminum doped Zinc Oxide (AZO), Fluorine Tin Oxide (FTO), etc., and such as At least one kind of translucent metal layer such as Ni/Au. The conductive oxide may also include various dopants. In this embodiment, the transparent conductive layer 114 is ITO.

Referring also to FIG. 5 , the semiconductor light-emitting element of this embodiment further includes a bonding pad 120 . The bonding pad 120 includes a first bonding pad 121 and a second bonding pad 122 . The first bonding pad 121 is connected to the first conductive type semiconductor layer 111 , the second pad 122 is connected to the second conductivity type semiconductor layer 112 . Referring also to FIG. 5 , the semiconductor light emitting element further includes a first electrode 131 formed on the mesa formed by the first conductive type semiconductor layer 111 , and a second electrode 132 formed on the transparent conductive layer 114 . Metal materials, such as Au, Ag, Al, Cu, Zn, etc., can be deposited on the mesa or in the hole to form the above-mentioned first electrode 131 . Similarly, Au, Ag, Al, Cu, Pt, Ti, Ni, etc. are deposited on the transparent conductive layer to form a second electrode. As shown in FIG. 5 , an insulating layer 115 is also formed on the surface of the semiconductor light-emitting element. The insulating layer 115 covers the exposed surface of the semiconductor light-emitting element and makes the surface of the semiconductor light-emitting element form a flat surface. The first bonding pad 121 and the second bonding pad 122 are formed above the insulating layer 115, wherein the first bonding pad 121 is connected to the first conductivity type semiconductor layer 111 through the through hole in the insulating layer 115 and the above-mentioned first electrode 131, The second pad 122 is connected to the second conductivity type semiconductor layer 112 through the through hole in the insulating layer 115 and the second electrode 132 . Optionally, the first electrode 131 and the second electrode 132 may be omitted, and the first bonding pad 121 and the second bonding pad 122 may be directly formed.

The above-mentioned bonding pad 120 includes a bonding pad base, a plurality of tin layers located above the bonding pad base, and at least one copper layer. The copper layer is located between the tin layers and is arranged parallel to the tin layer.

The thickness of the surface gold layer of the die-hard pad used to weld the chip is usually between 0.02 and 0.07 μm. During the reflow soldering process, the metal atoms in each layer of the pad 120 and the metal atoms in each layer of the die-die pad penetrate. , a metal compound layer is formed at the interface between the bonding pad and the die-hard bonding pad. For example, the metal compound layer is a quaternary intermetallic compound, including four elements: Cu, Ni, Au and Sn, such as (CuNiAu) ₆ Sn ₅ . The quaternary compound is distributed discontinuously in the solder joints, and its structural strength is close to that of the solder joints. It can effectively improve the bonding force between the soldering pad and the die-hardening pad, and improve the stability of the device.

Preferably, the number of tin layers in the pad 120 is greater than or equal to 2, and the number of copper layers is 1 or greater than or equal to 2.

Preferably, according to the thickness of the surface gold layer of the die-bonding pad of the welded chip, the total thickness of Cu in the pad 120 can be up to 2.5 μm.

In the pad 120, the total thickness of the multi-layer tin layer is at least 4 μm. The tin layer and the copper layer can be formed by evaporation or electroplating. The plating process is particularly suitable for small-sized chip products, and the electroplating process can achieve better High tin thickness ensures higher bonding strength. Because an excessively thick tin layer will cause warpage of the substrate, an excessively thick tin layer is not needed. For example, the total thickness of the tin layer should be between 4 μm and 20 μm. In particular, the smaller the side length of the chip, the smaller the thickness of the substrate. For example, taking a sapphire substrate as an example, the smaller the sapphire substrate, the more serious the warpage caused by an excessively thick tin layer. As an example, when at least one side length of the chip does not exceed 200 μm, or when the thickness of the chip does not exceed 90 μm, the thickness of the tin layer cannot exceed 20 μm.

The copper layer is inserted into the tin layer. Whether it is one layer or multiple layers, the total thickness of the copper layer is preferably between 0.05 μm and 2.5 μm.

In an optional embodiment of this embodiment, as shown in Figure 6a, the bonding pad 120 includes a bonding pad base 1201 and two tin layers 1202 located above the bonding pad base 1201, and a layer located between the two tin layers 1202. Copper layer 1203. The pad base 1201 is adjacent to the semiconductor layer 100 and is directly connected to the first electrode or the second electrode. The pad substrate 1201 may be composed of one or more metal layers such as titanium, aluminum, platinum or nickel layers. For example, the pad substrate 1201 shown in Figure 6a is a titanium layer 1201-1/aluminum layer 1201-2. of repeated stacks (usually 3 to 5 pairs of repeated stacks) and nickel layer 1201-3. The nickel layer 1201-3 is located on a repeated stack of titanium and aluminum layers. A tin layer 1202 is formed on the nickel layer 1201-3. On the one hand, the role of the nickel layer 1201-3 is to form a eutectic or intermetallic compound with tin during the reflow process, which is beneficial to soldering; on the other hand, the preferred thickness of the nickel layer 1201-3 is 200nm~500nm or nickel layer The thickness of the nickel layer 1201-3 further exceeds 500nm, which can prevent the tin element from diffusing into the interior. Preferably, the thickness of the nickel layer 1201-3 is between 500nm~850nm. An overly thick nickel layer 1201-3 will Causes stress problems and affects the die bonding yield.

After the bonding pad 120 is formed, the elemental analysis test of EDX (Energy Dispersive X-Ray Spectroscopy) or EDS (Energy Dispersive Spectrometer) shows that the proportion of copper atoms in the copper layer accounts for the copper The total atomic percentage of all elements in the layer is at least 50%. Preferably, the copper layer 1203 is a copper layer with an atomic percentage higher than 90%, or a pure copper layer with an atomic percentage close to or reaching 100%.

As an example, the tin layer is formed through an evaporation process, and there are 1 to 3 tin layers. The thickness of each tin layer 1202 is between 1.5 μm and 15 μm, preferably between 1 μm and 10 μm, and more. The total thickness of the tin layer 1202 is between 4 μm and 20 μm; the total thickness of the copper layer 1203 is between 0.05 μm and 2.5 μm, preferably between 0.05 and 1.0 μm. An excessively thick copper layer will affect the binding force of tin, and It ultimately affects the solidification ability, so an overly thick copper layer is not necessary. More preferably, the total thickness of the copper layer 1203 is between 0.1 μm ~ 0.5 μm, or between 0.5 μm ~ 1.0 μm. Preferably, the thickness of each copper layer 1203 is 0.05 μm to 1 μm, or more preferably, the thickness of each copper layer 1203 is 0.05 μm to 0.5 μm.

As an example, referring to FIG. 6a, in the bonding pad 120, there may be a layer of tin layer 1202 closest to the semiconductor layer (ie, close to the bonding pad base 1201 shown in FIG. 6a) that has a thickness greater than other layers relatively far away from the bonding pad base 1201. The thickness of the tin layer 1202. As an embodiment, the tin layer 1202 is two layers, and the copper layer 1203 is one layer. The thickness of the tin layer 1202 located immediately below the copper layer 1203 adjacent to the pad base 1201 is approximately 10 μm, and the thickness of the tin layer 1202 located above the copper layer 1203 away from the base pad 1201 is 2 μm, of which the thickness of the copper layer 1203 is 0.3 μm. . Therefore, the total thickness of the bonding pad 120 in this embodiment is between 1.7 μm and 12.5 μm.

In an optional embodiment, each layer of metal of the above-mentioned pad is formed by step-by-step plating, such as evaporation or electroplating. After the pad base 1201 is formed, Sn is first evaporated on the pad base 1201 to form a tin layer 1202. After reaching a predetermined thickness, Cu is evaporated on the tin layer 1202 to form a copper layer 1203 until the predetermined thickness is reached. Then, Sn is continued to be evaporated on top of the copper layer to form a tin layer 1202 to a predetermined thickness, and finally the bonding pad shown in Figure 6a is formed. The above-mentioned step-by-step evaporation method is used to form tin layers and copper layers arranged parallel to each other, and the purity of each tin layer and copper layer can be guaranteed, especially the purity of the copper layer. In this way, after the evaporation is completed, it can be ensured that the total percentage of copper atoms in the copper layer accounts for at least 50% of the total atomic percentage of the copper layer in the entire pad. Under microscope observation, such as TEM or SEM, there is an interface between the step-by-step evaporation of the tin layer and the copper layer, and the tin layer and the copper layer can be distinguished. The tin layer is preferably pure tin or a tin layer containing a small amount of other impurity elements or intentionally doped elements, such as silver. Tin is still the main element in the tin layer, and the preferred tin content in the tin layer is 90%. above.

As a preferred embodiment, in order to ensure the soldering effect of the tin layer 1202, the total thickness of the copper layer 1203 does not exceed 10% of the total thickness of the tin layer 1202.

As an optional embodiment, as shown in Figure 6b, there can be a copper layer 1203 between the nickel layer 1201-3 and the tin layer 1202. The thickness of the copper layer 1203 is preferably not more than 1 μm and not less than 0.05 μm, for example, between 0.05 μm ~0.1 μm, 0.1 μm ~0.5 μm or 0.5~1 μm.

Or as an optional embodiment, there is a copper layer 1203 on the upper surface of the tin layer 1202 (away from the upper surface of the nickel layer 1201-3). The thickness of the copper layer 1203 is preferably not more than 1 μm and not less than 1 μm. 0.05 μm, such as 0.05 μm ~0.1 μm, 0.1 μm ~0.5 μm or 0.5 μm ~1 μm.

When the semiconductor light-emitting element with the above-mentioned bonding pad 120 is fixed to the die-bonding bracket or the substrate, the tin layer of the pad 120 contacts the die-bonding pad of the substrate. The die-bonding pad is usually formed by a nickel immersion gold immersion process. It usually includes a base 1401 formed of Cu, an anti-diffusion layer 1402 formed of Ni, and an anti-oxidation layer 1403 formed of Au. The anti-oxidation layer 1403 forms the surface layer of the die-hardening pad. As shown in Figure 8, the tin layer of the bonding pad 120 is in contact with the Au layer of the surface layer of the die bonding pad. During the reflow soldering process, the metal atoms in each layer of the bonding pad 120 and the metal atoms in each layer of the die bonding pad Penetration occurs, and a metal compound layer 1404 is formed at the interface between the bonding pad and the die-hard bonding pad. The metal compound layer is Cu/Au/Ni/Sn quaternary intermetallic compound (CuNiAu) ₆ Sn ₅ . This quaternary compound is soldered during soldering. The distribution in the points is discontinuous, and the structural strength is close to that of the solder points, which can effectively improve the bonding force between the soldering pad and the die-bonding pad and improve the stability of the device.

In addition, copper has good thermal conductivity. When the semiconductor light-emitting element is operating, the pad containing the copper layer can conduct heat and dissipate heat faster, thereby improving the reliability of the semiconductor light-emitting element.

Embodiment 2

This embodiment also provides a semiconductor light-emitting element. The semiconductor light-emitting element is also preferably at least one LED chip with a side length of less than or equal to 300 μm.

Referring also to FIG. 5 , the LED chip includes a semiconductor layer 110 , which includes a first conductivity type semiconductor layer 111 , a light emitting layer 113 , and a second conductivity type semiconductor layer 112 stacked in sequence. The semiconductor light-emitting element of this embodiment also includes a bonding pad 120. The bonding pad 120 also includes a first bonding pad 121 and a second bonding pad 122. The first bonding pad 121 is connected to the first conductive type semiconductor layer 111, and the second bonding pad 120 is connected to the semiconductor layer 111 of the first conductivity type. The disk 122 is connected to the second conductivity type semiconductor layer 112 . The remaining similarities between the semiconductor light-emitting element of this embodiment and the light-emitting element of this embodiment will not be described again. The difference is that, as shown in FIG. 7 , the bonding pad 120 in this embodiment includes at least three tin layers 1202 and two Multiple copper layers 1203 between tin layers 1202 . The above-mentioned tin layer and copper layer are also formed by step-by-step evaporation. Referring also to FIG. 7 , the layer of the pad adjacent to the semiconductor layer is a tin layer, and the outermost layer away from the semiconductor layer is also a tin layer. In this embodiment, the thickness of each tin layer 1202 is between 2 μm and 5 μm, and the thickness of each copper layer 1203 is between 0.05 μm and 0.2 μm. As an example, the thickness of each layer of the copper layer 1203 is 0.1 μm, and the thickness of each layer of the tin layer 1202 is 3 μm.

In an optional embodiment, except for a tin layer 1202 immediately adjacent to the semiconductor layer (ie, the pad base 1201 shown in FIG. 7 ), the remaining tin layers 1202 have the same thickness, and the pad is adjacent to a layer of the semiconductor layer. The thickness of the first tin layer is greater than the thickness of the remaining tin layers remote from the semiconductor layer.

As mentioned above, the bonding pad of this embodiment adopts at least three layers of tin layers and multiple layers of copper layers, and the total thickness of the tin layer is set to 4 μm ~ 20 μm. This can increase the design of the pad structure and the thickness of each layer. Flexibility, the total thickness of the bonding pad 120 can be designed to be greater than 10 μm, thereby overcoming the problem that the prefabricated tin electrode in the existing technology is limited by process capabilities, has a small thickness, and a small amount of tin, resulting in the problem of the bonding pad and the die-bonding bracket. The problem of poor binding force and poor device stability improves the stability of the device.

Also as shown in Figure 8, the tin layer of the bonding pad 120 is in contact with the Au layer of the die bonding pad. During the reflow soldering process, the metal atoms in each layer of the bonding pad 120 and the metal atoms in each layer of the die bonding pad are generated. Penetration, a metal compound layer 1404 is formed at the interface between the bonding pad and the solid crystal bonding pad. The metal compound layer is Cu/Au/Ni/Sn quaternary intermetallic compound (CuNiAu) ₆ Sn ₅ . This quaternary compound is formed at the solder joint. The medium distribution is discontinuous, and the structural strength is close to that of the solder joint, which can effectively improve the bonding force between the solder pad and the die-hardening pad and improve the stability of the device. Similarly, when the semiconductor light-emitting element is operating, the pad containing the copper layer can dissipate heat faster and improve the reliability of the semiconductor light-emitting element.

In order to further verify the stability of the bonding pads in Embodiment 1 and 2 of the present invention on the die-bonding pad, the semiconductor light-emitting element is fixed on the package end (such as the die-bonding bracket) through reflow soldering, and then tested. Apply an external thrust to test the external force used to drop it. The external force is expressed as thrust. The magnitude of the thrust can visually represent the stability of the semiconductor light-emitting element at the package end. The greater the thrust, the more stable it is. Compare the thrust force of the soldering pads of the embodiment of the present invention and the second embodiment of the present invention and the prior art. The pad designs of Embodiment 1, Embodiment 2 and the prior art are as shown in Table 1 below:

Table 1 Prior art and embodiments of the present invention and pad structures of Embodiment 2

As shown in Figure 9, when solder paste is used to solidify the crystal in the prior art, the thrust force between the pad of the semiconductor light-emitting element and the die-solidating pad of the crystal-bonding bracket is only 6.8, while the method described in Embodiment 1 of the present invention includes a The thrust force between the copper layer pad and the die-bonding pad of the die-bonding bracket reaches 14.4. The thrust force between the bonding pad containing multiple copper layers and the die-bonding pad of the die-bonding bracket according to the second embodiment of the present invention is as high as 22. Obviously, the bonding pad of the present invention can improve the bonding strength between the semiconductor light-emitting element and the solid crystal bracket, thereby improving the stability of the device, and the copper layer is distributed in at least two layers, which is more effective than a design in which the copper layer is a single layer. good.

Embodiment 3

This embodiment also provides a semiconductor light-emitting element. The semiconductor light-emitting element is also preferably an LED chip with at least one side length not exceeding 300 μm.

Referring also to FIG. 5 , the LED chip includes a semiconductor layer 110 , which includes a first conductivity type semiconductor layer 111 , a light emitting layer 113 , and a second conductivity type semiconductor layer 112 stacked in sequence. The semiconductor light-emitting element of this embodiment also includes a bonding pad 120. The bonding pad 120 also includes a first bonding pad 121 and a second bonding pad 122. The first bonding pad 121 is connected to the first conductive type semiconductor layer 111, and the second bonding pad 120 is connected to the semiconductor layer 111 of the first conductivity type. The disk 122 is connected to the second conductivity type semiconductor layer 112 . The remaining similarities between the semiconductor light-emitting element of this embodiment and the light-emitting element of this embodiment will not be described again. The differences are as follows:

The bonding pad 120 includes a tin layer in which tin is the main component and also contains a certain amount of copper. The tin layer is formed using a co-plating process. During the co-plating process, the evaporation concentration of copper is controlled to ensure the content of copper in the tin layer. In an optional embodiment, it is known through elemental analysis such as EDS or EDX that the percentage of copper atoms at at least one position in the thickness direction of the tin layer is greater than or equal to 10%.

When co-plating or this layer is used, the thickness of the tin layer is preferably between 4 μm and 20 μm. μm.

As an embodiment, the percentage of copper atoms at at least one position in the thickness direction of the tin layer does not exceed 30%.

As mentioned above, in the tin layer obtained by the co-plating method, the percentage of copper atoms is greater than or equal to 10%, which effectively increases the percentage of copper atoms. During the reflow soldering process, the metal atoms, especially copper atoms, in the pad 120, And the metal atoms in each layer of the solid die pad penetrate, forming a metal compound layer at the interface between the die pad and the die solid pad. The metal compound layer is Cu/Au/Ni/Sn quaternary intermetallic compound (CuNiAu) ₆ Sn ₅ , this quaternary compound is distributed discontinuously in the solder joints, and its structural strength is close to that of the solder joints. It can effectively improve the bonding force between the solder pad and the die-hardening pad, and improve the stability of the device.

Similarly, when the semiconductor light-emitting element is operating, the pad containing the copper layer can dissipate heat faster and improve the reliability of the semiconductor light-emitting element.

Embodiment 4

This embodiment provides a light-emitting device. As shown in FIG. 10 , the light-emitting device includes a crystal-bonding bracket and a semiconductor light-emitting element fixed on the crystal-bonding bracket. The crystal-bonding bracket can be any suitable substrate or bracket such as a printed circuit board that can achieve crystal-bonding and electrical connection between the semiconductor light-emitting element and the outside world. In this embodiment, the die-bonding bracket is the substrate 150 .

There is a die bonding pad 140 on the substrate 150. Referring to FIG. 8, the die bonding pad 140 includes a base 1401, an anti-diffusion layer 1402 and an anti-oxidation layer 1403. The base 1401 is usually formed of Cu, the anti-diffusion layer 1402 is usually formed of Ni, and the anti-oxidation layer 1403 is usually formed of Au, and the anti-oxidation layer forms the surface layer of the die bonding pad. The semiconductor light-emitting element of this embodiment is preferably the semiconductor light-emitting element provided in Embodiment 1, Embodiment 2, or Embodiment 3.

The bonding pad 120 of the semiconductor light emitting element is placed on the die bonding pad 140 of the substrate 150, and then the die is solidified through a reflow soldering process. Referring also to Figure 8, the tin layer of the bonding pad 120 is in contact with the Au layer of the die-hard pad. During the reflow process, the metal atoms in each layer of the pad 120 and the metal atoms in each layer of the die-die pad penetrate. A metal compound layer 1404 is formed at the interface between the bonding pad and the die bonding pad. The metal compound layer is a Cu/Au/Ni/Sn quaternary intermetallic compound (CuNiAu) ₆ Sn ₅ . The quaternary compound is distributed in the solder joints. It is discontinuous, and the structural strength is close to that of the solder joint, which can effectively improve the bonding force between the pad and the die-bonding pad and improve the stability of the device. In addition, since copper has good thermal conductivity, when the above-mentioned light-emitting device is operating, the pad containing the above-mentioned copper layer can dissipate heat faster and improve the reliability of the device.

In this embodiment, the above-mentioned light-emitting device may be a display module, a display screen, and other devices used for display.

The above embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed in the present invention shall still be covered by the claims of the present invention.

Claims (20)

A semiconductor light-emitting element, characterized by including: A semiconductor layer, which includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked in sequence from bottom to top; and a bonding pad, the bonding pad is located above the semiconductor layer, the bonding pad includes a first bonding pad and a second bonding pad, the first bonding pad is connected to the semiconductor layer of the first conductivity type, and the third bonding pad Two pads are connected to the semiconductor layer of the second conductivity type. The pads include multiple tin layers and at least one copper layer. The copper layer is located between the tin layers and is arranged parallel to the tin layer. . The semiconductor light-emitting element according to claim 1, wherein the percentage of copper atoms in the copper layer accounts for at least 50% of the total atomic percentage of the copper layer. The semiconductor light-emitting element according to claim 1, wherein the total thickness of the copper layer is between 0.05 μm and 2.5 μm. The semiconductor light-emitting element according to claim 1, wherein the total thickness of the multiple tin layers is between 4 μm and 20 μm. The semiconductor light-emitting element according to claim 1, wherein the bonding pad includes two tin layers and a copper layer located between the two tin layers. The semiconductor light-emitting element according to claim 1, wherein the bonding pad includes at least three tin layers and a copper layer located between every two tin layers. The semiconductor light-emitting element according to claim 1, wherein the outermost layer of the bonding pad away from the semiconductor layer is a tin layer. The semiconductor light-emitting element according to claim 1, wherein the copper layer and the tin layer are obtained through a step-by-step plating process. The semiconductor light-emitting element according to claim 1, wherein the copper layer is a copper layer with a copper atomic percentage higher than 90%. The semiconductor light-emitting element according to claim 1, wherein the copper atomic percentage in the tin layer is lower than the copper atomic percentage in the copper layer. The semiconductor light-emitting element according to claim 1, wherein the tin layer is a pure tin layer, and the copper layer is a pure copper layer. The semiconductor light-emitting element according to claim 1, wherein the length of at least one side of the chip does not exceed 200 μm. The semiconductor light-emitting element according to claim 1, wherein the bonding pad further includes a nickel layer, the nickel layer is closer to the semiconductor layer than the tin layer, and the nickel layer is in contact with the tin layer. A copper layer is provided between the layers, and the thickness of the copper layer does not exceed 1 μm and is not less than 0.05 μm. The semiconductor light-emitting element according to claim 1, characterized in that there is a copper layer on the upper surface of the tin layer, and the thickness of the copper layer does not exceed 1 μm and is not less than 0.05 μm. A semiconductor light-emitting element, characterized by including: A semiconductor layer, which includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked in sequence from bottom to top; and a bonding pad, the bonding pad is located above the semiconductor layer, the bonding pad includes a first bonding pad and a second bonding pad, the first bonding pad is connected to the semiconductor layer of the first conductivity type, and the third bonding pad Two pads are connected to the semiconductor layer of the second conductivity type, the pads include a tin layer, the tin layer contains copper, wherein, at at least one thickness position of the tin layer, the copper Atomic percentage content exceeds 10%. The semiconductor light-emitting element according to claim 15, characterized in that, in at least one thickness position of the tin layer, the percentage content of the copper atoms does not exceed 30%. The semiconductor light-emitting element according to claim 15, wherein the copper and tin elements in the tin layer are obtained through a co-plating process. The semiconductor light-emitting element according to claim 15, wherein the thickness of the tin layer is between 4 μm and 20 μm. A light-emitting device, characterized by including a substrate and a semiconductor light-emitting element, wherein, The substrate includes a die bonding pad; The semiconductor light-emitting element is the semiconductor light-emitting element according to any one of claims 1 to 18, and the semiconductor light-emitting element realizes the connection between the bonding pad and the solid crystal bonding pad through heating. The light-emitting device according to claim 19, characterized in that, before being connected to the semiconductor light-emitting element, the die-hardening pad has a surface layer, and the surface layer is a gold layer.