CN208014741U - Pad structure and flip LED chips - Google Patents
Pad structure and flip LED chips Download PDFInfo
- Publication number
- CN208014741U CN208014741U CN201721854510.0U CN201721854510U CN208014741U CN 208014741 U CN208014741 U CN 208014741U CN 201721854510 U CN201721854510 U CN 201721854510U CN 208014741 U CN208014741 U CN 208014741U
- Authority
- CN
- China
- Prior art keywords
- layer
- led chips
- flip led
- pad
- pad structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
A kind of pad structure is disclosed, the pad structure is located on flip LED chips, and the flip LED chips include substrate, epitaxial layer, current extending, connection electrode, insulative reflective layer and pad structure from top to bottom, including:The pad structure is formed on the insulative reflective layer, and is electrically connected with the connection electrode by the trepanning on the insulative reflective layer;The pad structure includes the first contact layer, barrier layer and total layer gold sequentially formed;Wherein, the barrier layer is coating, and thickness is 0.5-5 μm, and the roughness of barrier layer is 10-30nm.The utility model additionally provides a kind of flip LED chips, solves the problems, such as that tin is extended to chip surface in reflow process, simple for process, at low cost, is convenient for mass production.
Description
Technical field
The utility model is related to semiconductor photolithography chip manufacturing technology, more particularly to a kind of pad structure and upside-down mounting
LED chip.
Background technology
Since early 1990s are commercialized, by development in twenties years, GaN base LED was widely used
In fields such as indoor and outdoor display screen, Projection Display lighting source, backlight, landscape brightening illumination, advertisement, traffic instructions, and
It is known as 21st century most competitive solid light source of new generation.However, for LED, to replace conventional light source into
Enter high-end lighting area, the raising of light emission luminance is vital.
The basic structure of flip LED chips is by packed LED chip face-down bonding in the good substrate of electrical and thermal conductivity performance
On, so that fever is compared the light emitting epitaxial layer of concentration closer to heat dispersion heat sink, so that most of heat is exported by substrate, without
It is by undesirable sapphire growth substrate export of radiating, this alleviates the heat dissipation problem of LED chip to a certain extent;And
And the light-emitting surface of flip LED chips and pad face two faces that be direction opposite, LED pads are avoided to LED chip light-emitting surface
Long-pending influence, i.e., in the case where LED chip area determines, compared with packed LED chip, the light-emitting area of flip LED chips
Bigger, luminous efficiency higher;Meanwhile flip LED chips can realize no gold chip scale package;To sum up, flip LED chips are because of tool
Have a good heat dissipation, lighting area is big, it can be achieved that the advantages such as wafer-level package, increasingly by LED field especially in high-power answer
With the attention and favor in market.
Flip LED chips have eutectic weldering and two kinds of welding procedures of Reflow Soldering, compared with eutectic welds, Reflow Soldering because production capacity is big,
The advantages that at low cost, is received by numerous LED encapsulation enterprise.Flip LED chips are inverted on substrate, in LED pads and substantially
Between tin cream is set, and place it in reflow ovens, make flip LED chips by modes such as preheating, constant temperature, reflux, coolings
Pad and substrate form total gold by tin cream, and the process for completing welding is golden tin Reflow Soldering.It is high in golden tin reflow process
The tin of temperature diffuses easily into chip surface, leads to chip failure, is one of the key factor for influencing flip LED yield, and industry is logical
The refractory metals such as nickel are often added in flip-chip pad to prevent tin from spreading.But the refractory metal evaporations rate such as nickel is very low,
Therefore generally only 1,000 Izods are right for nickel layer thickness, this thickness is difficult to prevent completely the diffusion of tin in reflow process, if encapsulation
Body reuses Reflow Soldering and is welded on wiring board, and tin can be spread again, further decreases the yield of flip LED chips, therefore falls
It is urgently to be resolved hurrily to fill caused tin diffusion problem in LED chip reflow process.
Utility model content
In view of the above problems, the purpose of this utility model is to provide a kind of pad structure and flip LED chips, to solve
The problem of causing tin to spread in reflow process.
It is according to the present utility model in a first aspect, providing a kind of pad structure, the pad structure is located at flip LED chips
On, the flip LED chips include substrate from top to bottom, epitaxial layer, current extending, connection electrode, insulative reflective layer and
Pad structure, including:The pad structure is set on the insulative reflective layer, and passes through opening on the insulative reflective layer
Hole is electrically connected with the connection electrode;The pad structure includes the first contact layer, barrier layer and total layer gold set gradually;Its
In, the barrier layer is set as coating, and thickness is 0.5-5 μm.
Preferably, the barrier layer is any one in nickel coating, CrNi alloy layers or TiW alloy layers.
Preferably, the roughness of the barrier layer is 10-30nm.
Preferably, first contact layer is that layer is arranged in titanium.
Preferably, the layer gold altogether is the setting of at least one of layer gold, tin layers or gold-tin alloy layer.
Preferably, the thickness of the layer gold altogether is 0.1-2 μm.
Preferably, plating auxiliary layer setting setting, is arranged between first contact layer and the barrier layer.
Preferably, the plating auxiliary layer is that layer is arranged in aluminium.
Another aspect according to the present utility model provides a kind of flip LED chips, including:Substrate;Epitaxial layer, it is described outer
It includes the first semiconductor layer, luminescent layer and the second semiconductor layer set gradually to prolong layer, and at least one is provided in the epitaxial layer
The groove of a exposure first semiconductor layer;Current extending is set on second semiconductor layer, the current expansion
The current extending trepanning of the exposure groove is provided in layer;First connection electrode and the second connection electrode, described first connects
Energization pole is located on the first semiconductor layer in the groove, and the second connection electrode is located on the current extending;Absolutely
Edge reflecting layer is set on the current extending, has the first insulative reflective layer trepanning of exposure the first connection electrode
The second insulative reflective layer trepanning of electrode is connected to exposure described second;First pad and the second pad, are set to the insulation
On reflecting layer, first pad is electrically connected by the first insulative reflective layer trepanning with the first connection electrode setting, described
Second pad is electrically connected by the second insulative reflective layer trepanning with the second connection electrode setting;Wherein, first pad
Include the first contact layer, barrier layer and the total layer gold set gradually with second pad;The barrier layer is set as coating,
Thickness is 0.5-5 μm.
Preferably, the barrier layer is any one in nickel coating, CrNi alloy layers or TiW alloy layers.
Preferably, the roughness of the barrier layer is 10-30nm.
Preferably, first contact layer is that layer is arranged in titanium.
Preferably, the layer gold altogether is at least one of layer gold, tin layers or gold-tin alloy layer.
Preferably, the thickness that the layer gold altogether is arranged is 0.1-2 μm.
Preferably, the flip LED chips, which are arranged, further includes:Auxiliary layer is electroplated, is located at first contact layer and described
It is arranged between barrier layer.
Preferably, the plating auxiliary layer is setting layer.
Preferably, the first connection electrode with described second be connected to electrode and includes the second contact layer for setting gradually with
Electric connection layer.
Preferably, second contact layer is that layer is arranged in chromium.
Preferably, the electric connection layer is the periodic multilayer metal film that setting is alternately distributed by least two metals, institute
It is 2-10 to state periodicity.
Preferably, the metal multilayer film is alternately distributed setting by aluminium film and nickel film.
Preferably, the metal multilayer film is alternately distributed setting by aluminium film, nickel film, golden film, nickel film.
Preferably, the thickness of the aluminium film and nickel film ratio is 3:1~10:1.
Preferably, the thickness of the golden film and nickel film ratio is 3:1~15:1.
Preferably, at least one layer of gold can be also set between the insulative reflective layer and first pad, the second pad
Belong to layer and at least one layer of insulating layer, wherein the metal layer and the insulating layer are alternately distributed.
Pad structure and flip LED chips provided by the utility model, by plating mode or chemical plating mode described
The barrier layer of 0.5-5 μ m thicks is set in pad structure, solves the problems, such as that tin is extended to chip surface in reflow process, technique
Simply, at low cost, it is convenient for mass production.
Further, the flip LED chips are also by regarding periodically alternatively distributed metal multilayer film as connection electricity
The electric connection layer of pole, and the ratio of each layer thickness of metal film is rationally set, alleviate the stress of connection electrode itself;According to being electrically connected
The material properties for connecing layer and current extending select the material of the first contact layer and the second contact layer to make the flip LED chips
Connection electrode and pad above and following semiconductor layer good physical connection is set and is electrically connected.
Further, be arranged between the insulative reflective layer and the first pad, the second pad at least one layer of metal layer and
At least one layer of insulating layer;Wherein, the metal layer and the insulating layer are alternately distributed, and also can further improve flip LED chips
Light emission luminance and uniformity of luminance.
Description of the drawings
By referring to the drawings to the description of the utility model embodiment, above-mentioned and other mesh of the utility model
, feature and advantage will be apparent from, in the accompanying drawings:
Fig. 1 is that the utility model embodiment one forms the vertical view after epitaxial layer;
Fig. 2 is the diagrammatic cross-section along the directions AA ' of Fig. 1;
Fig. 3 is the diagrammatic cross-section along the directions BB ' of Fig. 1;
Fig. 4 is that the utility model embodiment one forms the vertical view after groove;
Fig. 5 is the diagrammatic cross-section along the directions AA ' of Fig. 4;
Fig. 6 is the diagrammatic cross-section along the directions BB ' of Fig. 4;
Fig. 7 is that the utility model embodiment one forms the vertical view after current extending;
Fig. 8 is the diagrammatic cross-section along the directions AA ' of Fig. 7;
Fig. 9 is the diagrammatic cross-section along the directions BB ' of Fig. 7;
Figure 10 is that the utility model embodiment one forms the vertical view after the first connection electrode and the second connection electrode;
Figure 11 is the diagrammatic cross-section along the directions AA ' of Figure 10;
Figure 12 is the diagrammatic cross-section along the directions BB ' of Figure 10;
Figure 13 is that the utility model embodiment one forms the vertical view after insulative reflective layer;
Figure 14 is the diagrammatic cross-section along the directions AA ' of Figure 13;
Figure 15 is the diagrammatic cross-section along the directions BB ' of Figure 13;
Figure 16 is that the utility model embodiment one forms the vertical view after the first pad and the second pad;
Figure 17 is the diagrammatic cross-section along the directions AA ' of Figure 16;
Figure 18 is the diagrammatic cross-section along the directions BB ' of Figure 16;
Figure 19 is the first pad of the flip LED chips of the utility model embodiment one or cuing open for the second solder tray local amplification
Face schematic diagram;
Figure 20 a- Figure 20 c are the first connection electrode or the second connection of the flip LED chips of the utility model embodiment one
The diagrammatic cross-section of electrode partial enlargement.
Specific implementation mode
Hereinafter reference will be made to the drawings is more fully described the various embodiments of the utility model.In various figures, identical
Element is indicated using same or similar reference numeral.For the sake of clarity, the various pieces in attached drawing are not drawn to paint
System.
With reference to the accompanying drawings and examples, specific embodiment of the present utility model is described in further detail.
Embodiment one
As shown in Fig. 1~18, the flip LED chips include:Substrate 100, epitaxial layer 110, current extending 120, the
One connection electrode 131 is connected to electrode 132, insulative reflective layer 140, the first pad 151 and the second pad 152 with second.
The epitaxial layer 110 includes the first semiconductor layer 111, luminescent layer 112 and the second semiconductor layer set gradually
113, at least one groove 110a is provided on the epitaxial layer 110, the depth of the groove 110a is more than the luminescent layer 112
With the summation of 113 thickness of the second semiconductor layer less than the thickness of the epitaxial layer 110, i.e., the hair in the described groove 110a
Photosphere 112 and the second semiconductor layer 113 are removed completely, and the first semiconductor layer 111 is removed a part, the utility model pair
The shape of the groove 110a does not limit.
The current extending 120 is set on second semiconductor layer 113, is arranged in the current extending 120
There is the current extending trepanning 120a of the exposure groove 110a.In the present embodiment, the current extending trepanning 120a is
Strip, and its width is more than the width of the groove 110a.In the present embodiment, the material of the current extending 120 is
Tin indium oxide (Indium tin oxide, ITO), is formed by evaporating or sputtering mode.
The first connection electrode 131 is located on the first semiconductor layer 111 in the groove 11a, second connection
Electrode 132 is located on the current extending 120, and the first connection electrode 131 is connected to electrode 132 with second and is intervally arranged.
There is the insulative reflective layer 140 first insulative reflective layer of the presumptive area of exposure the first connection electrode 131 to open
Hole 141 is connected to the second insulative reflective layer trepanning 142 of the presumptive area of electrode 132 with exposure second.First dielectric reflective
Layer trepanning 141 is connected to the length that electrode 131 is connected to electrode 132 with second with the second insulative reflective layer trepanning 142 along described first
Direction is in staggered distribution, i.e., the described first insulative reflective layer trepanning 141 and the second insulative reflective layer trepanning 142 are neither in same level
Direction is not also in same vertical direction.
In the present embodiment, the first insulative reflective layer trepanning 141 and the second insulative reflective layer trepanning 142 are strip
Shape.
First pad, 151 and second pad 152 is set on the insulative reflective layer 140, first pad 151
It is electrically connected with the first connection formation of electrode 131 by the first insulative reflective layer trepanning 141, second pad 152 passes through
Second insulative reflective layer trepanning 142 is electrically connected with the second connection formation of electrode 132.
In the present embodiment, first pad 151 is connected to electrode 131 and second along described first with the second pad 152 and connects
The length direction of energization pole 132 is arranged above and below, and first pad 151 covers all first insulative reflective layer trepannings 141,
Second pad 152 covers all second insulative reflective layer trepannings 142.
In a preferred embodiment, in the insulative reflective layer 140 and first pad 151, the second pad 152
Between at least one layer of metal layer 160 and at least one layer of insulating layer 170 can be also set, wherein the metal layer 160 (does not show in figure
Go out) and 170 (not shown) of the insulating layer be alternately distributed.The metal layer 160 may include 161 He of third connecting electrode
There is the exposure third connecting electrode 161 to be connected to electrode 162 with the described 4th for 4th connection electrode 162, the insulating layer 170
Presumptive area 171 (not shown) of insulating layer perforating so that third connecting electrode 161 and the first pad 151 form electricity
Connection and the 4th connection electrode 162 are electrically connected with the formation of the second pad 152.
Figure 19 is the first pad of the flip LED chips of the utility model embodiment one or cuing open for the second solder tray local amplification
Face schematic diagram.As shown in figure 19, the first pad 151 described in the present embodiment and second pad 152 include sequentially forming
First contact layer 1511, barrier layer 1512 and total layer gold 1513.
In the present embodiment, first contact layer 1511, first contact layer are formed by evaporating or sputtering mode
1511 material is titanium Ti, and first pad 151 can be made to be connected to electrode 131 and second pad with described first
152 form good physical connection with the second connection electrode 132 and are electrically connected.
The barrier layer 1512 is usually formed by evaporation mode in the prior art, but can be used for the material such as nickel of barrier layer
It is all very high etc. usual fusing point.And the critical component for evaporating board only has 10KV left as the high pressure that high-voltage board is provided
The right side causes the evaporation rate of the refractory metals such as nickel very low.In addition, there is also splash source to nickel in evaporation process;And it steams
Hair rate is higher, evaporation time is longer, and the source phenomenon of splashing is more apparent, therefore generally only 1,000 Izods are right for nickel layer thickness, no
Only in this way, the not matter of the barrier layer formed by evaporation mode is than more loose, roughness 100nm-500nm, therefore pass through steaming
The barrier layer of the thickness and the roughness that originating party formula is formed is difficult to prevent completely in reflow process tin to chip surface
The problem of diffusion, so, the scheme that thicker barrier layer is formed by evaporation mode is unsuitable for large-scale production, even if with technology
Progress, the making of thicker barrier layer may be implemented by evaporation mode, by evaporation mode formed 100nm-500nm it is coarse
The improvement of the barrier layer of degree is not also notable.
Compared with evaporation mode, thicker barrier layer can be formed by plating or chemical plating mode, and roughness can be with
Reach 10nm-30nm;The thickness of the barrier layer 1512 formed by plating or chemical plating mode, which reaches 0.5 μm or more, to be reached
The effect spread to blocking tin to chip surface after being higher than 5 μm, is further added by resistance although the thicker blocking effect of barrier layer is better
Compartment thickness, blocking effect improve unobvious, and stripping difficulty, chip surface can be caused to have residue glue equivalent risk.
Therefore the present embodiment forms the barrier layer 1512, the material of the barrier layer 1512 by plating or chemical plating mode
For any one in nickel, CrNi alloys or TiW alloys, thickness is 0.5-5 μm, wherein the roughness of barrier layer is 10-
30nm, to prevent the tin of high temperature from being spread to chip surface.Wherein, compared with evaporation mode, since chemical plating mode belongs to chemistry
The limits of reaction, plating rate is related with liquid and catalyst, by the less-restrictive of device hardware, so chemical plating have plating rate it is fast,
The advantages that membrane uniformity is good, film surface is bright and clean smooth, may be implemented the plating of thicker nickel layer, to prevent the tin of high temperature to core
The problem of piece diffusion into the surface, generates, and is also easy to form good be physically connected to lower layer connection electrode and be electrically connected;Due to chemistry
Plating is that have the characteristics that isotropic plated film, therefore need to protect wafer rear gluing before plated film.In order to be smoothed out galvanizer
Skill, is also formed with plating auxiliary layer 1514 between first contact layer 1511 and the barrier layer 1512, and the plating is auxiliary
Layer 1514 is helped to be formed by evaporating or sputtering mode, the material of the plating auxiliary layer 1514 is aluminium Al.
Total layer gold 1513, the material of the layer gold altogether are formed by plating mode, chemical plating mode or thermal resistance evaporation mode
Material is at least one of gold Au, tin Sn or gold-tin alloy AuSn, because the thickness of layer gold 1513 will have altogether less than 0.1um altogether
The undesirable risk of gold, but the thickness for being above the total layer gold of increase after 2 μm will bring the increase of material cost, so layer gold altogether
1513 thickness is 0.1-2 μm, so that the first pad 151 and the second pad 152 form good gold altogether with flip-chip substrate.
Preferably, when the material of the layer gold 1513 altogether is gold Au, tin Sn, the layer gold 1513 altogether passes through plating or chemistry
Plating mode is formed.
Preferably, when the material of the layer gold 1513 altogether is gold-tin alloy AuSn, the layer gold 1513 altogether is steamed by thermal resistance
Originating party formula is formed.
Figure 20 a- Figure 20 c are the first connection electrode or the second connection of the flip LED chips of the utility model embodiment one
The diagrammatic cross-section of electrode partial enlargement.As shown in Figure 20 a- Figure 20 c, the first connection electrode 131 and institute described in the present embodiment
It includes the second contact layer 1311 sequentially formed and electric connection layer 1312 to state the second connection electrode 132.
In the present embodiment, second contact layer 1311, second contact layer are formed by evaporating or sputtering mode
1311 material is chromium Cr, and the first connection electrode 131 can be made to be connected to electricity with the first semiconductor layer 111 and described second
Pole 132 and the current extending 120 form good physical connection and electrical connection.
The electric connection layer 1312 is formed by evaporating or sputtering mode, the electric connection layer 1312 is by least two gold medals
Category is alternately distributed the periodic multilayer metal film to be formed, and periodicity is preferably 2-10.The material of the electric connection layer 1312 is aluminium
At least two in Al, nickel or gold Au, it alleviates the first connection electrode 131 and is connected to electrode 132 itself with described second
Stress.
As illustrated in fig. 20, the electric connection layer 1312 is that the periodic multilayer gold formed is alternately distributed by aluminium Al and nickel
Belong to film, periodicity 5.As shown in fig. 20b, the electric connection layer 1312 is to be alternately distributed the periodicity formed by golden Au and nickel
Metal multilayer film, periodicity 5.As shown in Figure 20 c, the electric connection layer 1312 is to be replaced by aluminium Al, nickel, gold Au, nickel
It is distributed the periodic multilayer metal film formed, periodicity 3.Wherein, the aluminium Al films, nickel film thickness ratio be 3:1~10:
1, the gold Au films, nickel film thickness ratio be 3:1~15:1.
Correspondingly, the present embodiment also provides a kind of flip LED chips production method, below in conjunction with the accompanying drawings to the utility model
The flip LED chips production method of proposition illustrates further.
First, a substrate 100 is provided.
Then, as shown in Figures 1 to 3, epitaxial layer 110 is formed on the substrate 100, the epitaxial layer 110 includes successively
The first semiconductor layer 111, luminescent layer 112 and the second semiconductor layer 113 formed.As shown in figures 4-6, pass through photoetching and quarter
Etching technique forms the groove 110a of at least one exposure first semiconductor layer 111 in the epitaxial layer 110.
Then, as shown in figs. 7-9, current extending 120 is formed on second semiconductor layer 113, the electric current expands
The current extending trepanning 120a of the exposure groove 110a is formed in exhibition layer 120.
Then, it as shown in Figure 10~12, forms the first connection electrode 131 and is connected to electrode 132, first connection with second
Electrode 131 is located on the first semiconductor layer 111 in the groove 110a, and the second connection electrode 132 is located at the electric current
On extension layer 120.
Then, as shown in Figure 13~15, insulative reflective layer 140, the insulative reflective layer are formed on current extending 120
140 there is the first insulative reflective layer trepanning 141 of the presumptive area of exposure the first connection electrode 131 to be connected to electrode with exposure second
Second insulative reflective layer trepanning 142 of 132 presumptive area.
Then, the first pad 151 and the second pad 152 are formed as shown in Figure 16~18, first pad 151 and the
Two pads 152 are formed on the insulative reflective layer 140.First pad 151 by the first insulative reflective layer trepanning 141 with
The first connection electrode 131 forms electrical connection, and then is electrically connected with the formation of the first semiconductor layer 111.Second pad 152
It is electrically connected with the second connection formation of electrode 132 by the second insulative reflective layer trepanning 142, and then passes through current extending
120 are electrically connected with the formation of the second semiconductor layer 113.Current extending 120 has preferable current expansion effect, the first pad
151 and second between pad 152 plus after voltage, the uniformity of luminance of LED chip can be improved.
Wherein, the first pad 151 described in the present embodiment and second pad 152 include the first contact sequentially formed
Layer 1511, barrier layer 1512 and total layer gold 1513.In the present embodiment, first contact is formed by evaporating or sputtering mode
The material of layer 1511, first contact layer 1511 is titanium Ti, and first pad 151 can be made to be connected to electrode with described first
131 and second pad 152 form good physical connection with the second connection electrode 132 and be electrically connected.
The problem of tin cannot being prevent completely to be spread to chip surface due to relatively thin or loose film quality barrier layer, and because by
The dual shadow of barrier material fusing point height and evaporation board hardware limitation (such as high-voltage board can only provide the high pressure of 10KV or so)
It rings, and barrier material evaporation is there is also splashing source problem, therefore the process program of thicker barrier layer is formed not by evaporation mode
Suitable for large-scale production.
Thicker barrier layer can be formed by plating or chemical plating mode, and roughness can reach 10nm-30nm;It is logical
It crosses plating or the thickness of barrier layer 1512 that chemical plating mode is formed reaches 0.5 μm or more can reach and stop tin to chip list
The effect of face diffusion after being higher than 5 μm, is further added by barrier layer thickness, blocking effect although the thicker blocking effect of barrier layer is better
Improve unobvious, and stripping difficulty, chip surface can be caused to have residue glue equivalent risk.
So the present embodiment forms the barrier layer 1512, the material of the barrier layer by plating or chemical plating mode
For nickel, thickness is 0.5-5 μm, roughness 10nm-30nm, to prevent the tin of high temperature from being spread to chip surface.Wherein, due to
Chemical plating mode belongs to chemical reaction scope, and plating rate is related with liquid and catalyst, by the less-restrictive of device hardware, so
Chemical plating has many advantages, such as that plating rate is fast, membrane uniformity is good, film surface is bright and clean smooth, and the plating of thicker nickel layer may be implemented,
To be generated the problem of preventing the tin of high temperature from being spread to chip surface, it is also easy to be connected to electrode with lower layer and forms good physical connection
In electrical connection;Since chemical plating is that have the characteristics that isotropic plated film, therefore need to protect wafer rear gluing before plated film.
In order to be smoothed out electroplating technology, it is also formed between first contact layer 1511 and the barrier layer 1512
Auxiliary layer 1514 is electroplated, the plating auxiliary layer 1514 is formed by evaporating or sputtering mode, the plating auxiliary layer 1514
Material is aluminium Al.
Total layer gold 1513 is formed by plating mode or thermal resistance evaporation mode, the material of the layer gold altogether is gold Au, tin
At least one of Sn or gold-tin alloy AuSn, because the thickness of layer gold 1513 will have the total undesirable wind of gold less than 0.1um altogether
Danger, but the thickness for being above the total layer gold of increase after 2 μm will bring the increase of material cost, so the thickness of layer gold 1513 is altogether
0.1-2 μm, so that the first pad 151 and the second pad 152 form good gold altogether with flip-chip substrate.
In addition, it includes the second contact layer sequentially formed that the first connection electrode 131 is connected to electrode 132 with described second
1311 and electric connection layer 1312.In the present embodiment, second contact layer 1311 is formed by evaporating or sputtering mode, it is described
The material of second contact layer 1311 is chromium Cr, can make the first connection electrode 131 and the first semiconductor layer 111 and described
Second connection electrode 132 and the current extending 120 form good physical connection and electrical connection.
The electric connection layer 1312 is formed by evaporating or sputtering mode, the electric connection layer 1312 is by least two gold medals
Category is alternately distributed the periodic multilayer metal film to be formed, and periodicity is preferably 2-10.The material of the electric connection layer 1312 is aluminium
At least two in Al, nickel or gold Au, it alleviates the first connection electrode 131 and is connected to electrode 132 itself with described second
Stress.
In a preferred embodiment, between the insulative reflective layer 140 and the first pad 151, the second pad 152
Form at least one layer of metal layer 160 and at least one layer of insulating layer 170;
Wherein, the metal layer 160 and the insulating layer 170 are alternately distributed.
The making side of the production method of pad structure provided by the utility model and the flip LED chips of application pad structure
Method, the electric connection layer of electrode is connected to by the way that periodically alternatively distributed metal multilayer film to be used as, and each layer gold is rationally arranged
Belong to the ratio of film thickness, alleviates the stress of connection electrode itself;It is selected according to the material properties of electric connection layer and current extending
Selecting the material of the first contact layer and the second contact layer makes the connection electrode of the flip LED chips with pad above and below
Semiconductor layer form good physical connection and electrical connection;Pass through type, the thickness of selection total layer gold material and barrier material
While degree and generation type make the pad and flip-chip substrate form good gold altogether, tin is solved in reflow process to core
It is the problem of piece extended surface, simple for process, at low cost, it is convenient for mass production.
It is as described above according to the embodiments of the present invention, these embodiments there is no all details of detailed descriptionthe,
The specific embodiment that the utility model is only described is not limited yet.Obviously, as described above, many modification and change can be made
Change.These embodiments are chosen and specifically described to this specification, is in order to preferably explain the principles of the present invention and actually to answer
With to enable skilled artisan to utilize the utility model and repairing on the basis of the utility model well
Change use.The utility model is limited only by the claims and their full scope and equivalents.
Claims (24)
1. a kind of pad structure, the pad structure is located on flip LED chips, and the flip LED chips include from top to bottom
Substrate, epitaxial layer, current extending, connection electrode, insulative reflective layer and pad structure, which is characterized in that including:
The pad structure is formed on the insulative reflective layer, and passes through trepanning on the insulative reflective layer and the company
Energization pole is electrically connected;
The pad structure includes the first contact layer, barrier layer and total layer gold set gradually;
Wherein, the barrier layer is coating, and thickness is 0.5-5 μm.
2. pad structure according to claim 1, which is characterized in that the barrier layer is nickel coating, CrNi alloy layers
Or any one in TiW alloy layers.
3. pad structure according to claim 1, which is characterized in that the roughness of the barrier layer is 10-30nm.
4. pad structure according to claim 1, which is characterized in that first contact layer is titanium layer.
5. pad structure according to claim 1, which is characterized in that the layer gold altogether is layer gold, tin layers or gold-tin alloy
At least one of layer.
6. pad structure according to claim 1, which is characterized in that the thickness of the layer gold altogether is 0.1-2 μm.
7. pad structure according to claim 1, which is characterized in that the pad structure further includes:
Auxiliary layer is electroplated, between first contact layer and the barrier layer.
8. pad structure according to claim 7, which is characterized in that the plating auxiliary layer is aluminium layer.
9. a kind of flip LED chips, which is characterized in that including:
Substrate;
Epitaxial layer, the epitaxial layer include the first semiconductor layer, luminescent layer and the second semiconductor layer set gradually, the extension
The groove of at least one exposure first semiconductor layer is provided in layer;
Current extending is set on second semiconductor layer, and the exposure groove is provided in the current extending
Current extending trepanning;
First connection electrode and the second connection electrode, the first connection electrode are located at the first semiconductor layer in the groove
On, the second connection electrode is located on the current extending;
Insulative reflective layer is set on the current extending, has the first dielectric reflective of exposure the first connection electrode
Layer trepanning is connected to the second insulative reflective layer trepanning of electrode with exposure described second;
First pad and the second pad, are set on the insulative reflective layer, and first pad passes through the first insulative reflective layer
Trepanning is electrically connected with the first connection electrode setting, and second pad passes through the second insulative reflective layer trepanning and described second
It is connected to electrode setting electrical connection;
Wherein, first pad and second pad include the first contact layer, barrier layer and the total layer gold set gradually;
The barrier layer is coating, and thickness is 0.5-5 μm.
10. flip LED chips according to claim 9, which is characterized in that the barrier layer is nickel coating, CrNi alloys
Any one in coating or TiW alloy layers.
11. flip LED chips according to claim 9, which is characterized in that the roughness of the barrier layer is 10-30nm.
12. flip LED chips according to claim 9, which is characterized in that first contact layer is titanium layer.
13. flip LED chips according to claim 9, which is characterized in that the layer gold altogether is layer gold, tin layers or golden tin
At least one of alloy-layer.
14. flip LED chips according to claim 9, which is characterized in that the thickness of the layer gold altogether is 0.1-2 μm.
15. flip LED chips according to claim 9, which is characterized in that further include:
Auxiliary layer is electroplated, between first contact layer and the barrier layer.
16. flip LED chips according to claim 15, which is characterized in that the plating auxiliary layer is aluminium layer.
17. flip LED chips according to claim 9, which is characterized in that the first connection electrode and described second connects
Be powered extremely includes the second contact layer and electric connection layer set gradually.
18. flip LED chips according to claim 17, which is characterized in that second contact layer is layers of chrome.
19. flip LED chips according to claim 17, which is characterized in that the electric connection layer is by least two gold medals
Belong to the periodic multilayer metal film for being alternately distributed setting, the periodicity is 2-10.
20. flip LED chips according to claim 19, which is characterized in that the metal multilayer film is by aluminium film and nickel film
It is alternately distributed setting.
21. flip LED chips according to claim 19, which is characterized in that the metal multilayer film by aluminium film, nickel film,
Golden film, nickel film are alternately distributed setting.
22. the flip LED chips according to claim 20 or 21, which is characterized in that the thickness of the aluminium film and nickel film ratio
It is 3:1~10:1.
23. flip LED chips according to claim 21, which is characterized in that the thickness of the golden film and nickel film ratio is 3:1
~15:1.
24. flip LED chips according to claim 9, which is characterized in that in the insulative reflective layer and first weldering
At least one layer of metal layer and at least one layer of insulating layer can be also set between disk, the second pad, wherein the metal layer and it is described absolutely
Edge layer is alternately distributed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201721854510.0U CN208014741U (en) | 2017-12-26 | 2017-12-26 | Pad structure and flip LED chips |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201721854510.0U CN208014741U (en) | 2017-12-26 | 2017-12-26 | Pad structure and flip LED chips |
Publications (1)
Publication Number | Publication Date |
---|---|
CN208014741U true CN208014741U (en) | 2018-10-26 |
Family
ID=63882037
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201721854510.0U Active CN208014741U (en) | 2017-12-26 | 2017-12-26 | Pad structure and flip LED chips |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN208014741U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108110126A (en) * | 2017-12-26 | 2018-06-01 | 杭州士兰明芯科技有限公司 | The production method of pad structure and the production method of flip LED chips |
CN111769190A (en) * | 2020-05-21 | 2020-10-13 | 华灿光电(浙江)有限公司 | Flip light-emitting diode chip and manufacturing method thereof |
-
2017
- 2017-12-26 CN CN201721854510.0U patent/CN208014741U/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108110126A (en) * | 2017-12-26 | 2018-06-01 | 杭州士兰明芯科技有限公司 | The production method of pad structure and the production method of flip LED chips |
CN111769190A (en) * | 2020-05-21 | 2020-10-13 | 华灿光电(浙江)有限公司 | Flip light-emitting diode chip and manufacturing method thereof |
WO2021233273A1 (en) * | 2020-05-21 | 2021-11-25 | 华灿光电(浙江)有限公司 | Light-emitting diode flip chip and manufacturing method therefor |
CN111769190B (en) * | 2020-05-21 | 2022-01-14 | 华灿光电(浙江)有限公司 | Flip light-emitting diode chip and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI397193B (en) | Light emitting diode chip element with heat dissipation substrate and method for making the same | |
US20120043576A1 (en) | Led package structure | |
US20110101392A1 (en) | Package substrate for optical element and method of manufacturing the same | |
CN1731592A (en) | Flip-chip bonded structure light-emitting diode and its manufacture method | |
CN102664227B (en) | Semiconductor light emitting diode device and forming method thereof | |
CN103378244A (en) | Light emitting diode device and manufacturing method thereof | |
WO2014064871A1 (en) | Light emitting device, method for manufacturing same, and body having light emitting device mounted thereon | |
CN102368528B (en) | Luminescent device with high heat dissipation performance and manufacturing method thereof | |
CN208014741U (en) | Pad structure and flip LED chips | |
CN102074558A (en) | Light-emitting device and lighting appliance | |
CN101005107A (en) | Flip-chip light emitting diode with metal convex spot array structure and its producing method | |
CN108963050B (en) | Micro-spacing LED chip and manufacturing method thereof | |
CN109148676A (en) | A kind of high density micro display LED component and preparation method thereof | |
CN101140963A (en) | Method for enhancing upside-down mounting welding core plate brightness | |
CN104638097B (en) | Manufacturing method of red-light LED (Light-Emitting Diode) flip chip | |
KR101719692B1 (en) | Printed Circuit Board, Manufacturing method thereof, LED module and LED lamp with using the same | |
CN108110127A (en) | The production method of pad structure and the production method of flip LED chips | |
CN102569586A (en) | Integral-face press-fit type inverted LED (Light Emitting Diode) and manufacturing method thereof | |
CN108110126A (en) | The production method of pad structure and the production method of flip LED chips | |
WO2023226457A1 (en) | Display panel, and light-emitting element and back plate for use in display panel | |
CN105633240B (en) | A kind of CSP packaged chip structures and production method | |
JP5134108B2 (en) | Manufacturing method of semiconductor element heat sink | |
CN208014740U (en) | Pad structure and flip LED chips | |
TW201205882A (en) | Manufacturing method for LED light emitting device | |
CN2849976Y (en) | Gallium nitride base LED chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |