WO2023176594A1 - セラミック電子部品 - Google Patents

セラミック電子部品 Download PDF

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Publication number
WO2023176594A1
WO2023176594A1 PCT/JP2023/008612 JP2023008612W WO2023176594A1 WO 2023176594 A1 WO2023176594 A1 WO 2023176594A1 JP 2023008612 W JP2023008612 W JP 2023008612W WO 2023176594 A1 WO2023176594 A1 WO 2023176594A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
electrode layer
electronic component
ceramic electronic
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/008612
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
翔太 池邉
康弘 西坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to CN202380018004.XA priority Critical patent/CN118575243A/zh
Priority to JP2024507786A priority patent/JP7711837B2/ja
Publication of WO2023176594A1 publication Critical patent/WO2023176594A1/ja
Priority to US18/766,895 priority patent/US20240363287A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/008—Selection of materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H01G4/2325—Terminals electrically connecting two or more layers of a stacked or rolled capacitor characterised by the material of the terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/40—Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations

Definitions

  • the present invention relates to ceramic electronic components, such as capacitors, inductors, and varistors, in which external electrodes are formed on the surface of a ceramic body containing internal electrode layers.
  • an external electrode that is electrically connected to the internal electrode layer is provided on the surface of a ceramic body containing an internal electrode layer.
  • the external electrode usually has a base electrode layer containing conductive metal and glass because it needs to be in close contact with the ceramic body. is covered with a Ni plating layer and further with a Sn plating layer.
  • the plating solution used in the plating process is highly reactive and elutes components with poor chemical resistance, it erodes the glass exposed on the surface of the base electrode layer, and the pores created by the erosion are filled with plating. There is a problem in that the heat resistance and moisture resistance of electronic components deteriorate due to the infiltration of liquid.
  • An object of the present invention is to provide a highly reliable ceramic electronic component that prevents the plating solution from entering the base electrode layer in the plating process for forming external electrodes and has excellent heat resistance and moisture resistance. do.
  • the present inventors conducted studies and found that SiO 2 -BaO-B 2 O 3 -CaO-based glass was blended into the base electrode layer of the external electrode, and the surface of the base electrode layer was exposed.
  • the surface of the SiO 2 -BaO-B 2 O 3 -CaO glass taken out was coated with at least one kind selected from the group consisting of P, S, C, Si, Ba, F, N, Al, Sr, and B.
  • the inventors have discovered that it is possible to prevent the plating solution from entering the base electrode layer by covering it with a protective layer containing an element, and have completed the present invention.
  • the present invention provides a ceramic electronic component comprising a ceramic body containing an internal electrode layer, and an external electrode disposed on the surface of the ceramic body and electrically connected to the internal electrode layer,
  • the external electrode includes a base electrode layer containing SiO 2 -BaO-B 2 O 3 -CaO-based glass; P, S, C, Si, Ba, F, N, Al, Sr, and B covering the surface of the SiO 2 -BaO-B 2 O 3 -CaO glass exposed on the surface of the base electrode layer.
  • a protective layer containing at least one element selected from the group consisting of; a Ni plating layer covering the base electrode layer and the protective layer;
  • the present invention is a ceramic electronic component characterized in that the protective layer contains P element.
  • the present invention is a ceramic electronic component characterized in that the thickness of the protective layer is 1 nm or more and 100 nm or less.
  • the present invention is a ceramic electronic component characterized in that the thickness of the thinnest part of the base electrode layer is 0.1 ⁇ m or more and 5 ⁇ m or less.
  • the present invention is a ceramic electronic component characterized in that the thickness of the dielectric layer is 0.3 ⁇ m or more and 0.45 ⁇ m or less.
  • the present invention it is possible to prevent the plating solution from entering the base electrode layer in the plating process for forming the external electrode, and to provide a highly reliable ceramic electronic component with excellent heat resistance and moisture resistance. It becomes possible.
  • FIG. 2 is a conceptual diagram of a cross section taken along line II in FIG. 1.
  • FIG. 1 is an external view of a ceramic electronic component 1.
  • FIG. 2 is a conceptual diagram of a cross section of the ceramic electronic component 1 shown in FIG. 1 taken along line II.
  • the ceramic electronic component 1 is an electronic component in which an external electrode that conducts with the internal electrode layer is provided on the surface of a ceramic body containing an internal electrode layer, and is incorporated into electronic circuits such as capacitors, inductors, and varistors, and is widely used. It is being utilized. Below, as an embodiment of a ceramic electronic component, a multilayer ceramic capacitor 1a will be described in detail as an example.
  • the multilayer ceramic capacitor 1a is a ceramic electronic component that has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2.
  • the laminate 2 includes an inner layer portion 9 in which a plurality of dielectric layers 7 and a plurality of internal electrode layers 8 are alternately stacked.
  • the direction in which the pair of external electrodes 3 of the multilayer ceramic capacitor 1a are provided is referred to as the length direction L, as a term representing the orientation of the multilayer ceramic capacitor 1a.
  • the direction in which the dielectric layer 7 and the internal electrode layer 8 are stacked is defined as a stacking direction T.
  • a direction that intersects both the length direction L and the stacking direction T is defined as the width direction W.
  • FIG. 1 shows an XYZ orthogonal coordinate system.
  • the width direction W is orthogonal to both the length direction L and the stacking direction T, but the relationship is not necessarily orthogonal to each other, and may be a relationship that intersects with each other.
  • a pair of outer surfaces facing each other in the stacking direction T is a first main surface A1 and a second main surface A2
  • a pair of outer surfaces facing each other in the width direction W is a first side surface.
  • B1 and a second side surface B2 and a pair of outer surfaces facing each other in the length direction L are a first end surface C1 and a second end surface C2.
  • the multilayer ceramic capacitor 1a of the embodiment is often used with the second main surface A2 side facing the mounting direction and the first main surface A1 facing upward.
  • first principal surface A1 and second principal surface A2 When there is no need to particularly distinguish and explain the first principal surface A1 and second principal surface A2, they are collectively referred to as principal surface A, and when there is no need to particularly distinguish and explain the first side surface B1 and the second side surface B2. , collectively referred to as side surface B, and unless it is necessary to specifically explain the first end surface C1 and second end surface C2 separately, they will be collectively described as end surface C.
  • each element listed as a component to be blended is a single element, a compound, a metal, an alloy, a solid solution, etc., regardless of the form, the specified element is blended in a predetermined part. That's fine.
  • the laminate 2 includes an inner layer part 9 and an outer layer part 10 that is arranged in the stacking direction so as to sandwich the inner layer part and forms a first main surface A1 and a second main surface A2.
  • the inner layer portion 9 includes a plurality of dielectric layers 7 and a plurality of internal electrode layers 8 stacked together.
  • the inner layer portion includes 5 or more and 100 or less dielectric layers and internal electrode layers, respectively.
  • the outer layer portion 10 is arranged to sandwich the inner layer portion 9 in the stacking direction T, and forms a first main surface A1 and a second main surface A2.
  • the outer layer section 10 can be made of the same ceramic material as the dielectric layer 7 of the inner layer section 9.
  • the dielectric layer 7 is made by adding a binder, additives such as a plasticizer and a dispersant, and an organic solvent to a mixture of ceramic powder, glass particles, and a sintering aid if necessary. It can be obtained by sintering a ceramic green sheet obtained by forming a slurry containing , into a sheet shape.
  • a ceramic material containing barium titanate (BaTiO 3 ) as a main component can be used as a main component.
  • the main component may be supplemented with subcomponents such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds.
  • the thickness of the dielectric layer 7 in the stacking direction T is preferably 0.3 ⁇ m or more and 0.45 ⁇ m or less. As a result, the multilayer ceramic capacitor can be made smaller by thinning the wall while maintaining capacitance, dielectric breakdown strength, and high-temperature load life.
  • the plurality of internal electrode layers 8 include a first internal electrode layer 8A and a second internal electrode layer 8B.
  • the first internal electrode layer 8A is exposed on the first end surface C1 and connected to the first external electrode 3A. Further, the second internal electrode layer 8B is exposed at the second end surface C2 and connected to the second external electrode 3B.
  • the first internal electrode layers 8A and the second internal electrode layers 8B are normally arranged alternately in the stacking direction T with dielectric layers interposed therebetween.
  • the internal electrode layer 8 is formed by applying an internal electrode paste to the surface of the ceramic green sheet that constitutes the dielectric layer and firing it together with the dielectric layer.
  • the internal electrode layer is not particularly limited, the thickness in the stacking direction T can be 0.2 ⁇ m or more and 2.0 ⁇ m or less.
  • any metal such as Ni, Cu, Ag, Pd, Ti, Cr, and Au, or an alloy of any of these metals can be used.
  • the external electrode 3 includes a first external electrode 3A provided on the first end surface C1 of the laminate 2, and a second external electrode 3B provided on the second end surface C2 of the laminate 2.
  • the external electrode 3 is formed by forming a base electrode layer by coating and baking a conductive paste on the entirety of both end faces C, both main faces A, and both side faces B, and then baking the base electrode layer. It can be obtained by forming a plating layer on top. Note that unless it is necessary to specifically explain the first external electrode 3A and the second external electrode 3B, they will be collectively described as the external electrode 3.
  • the base electrode layer 4 is formed by applying and baking a conductive paste containing conductive metal and glass.
  • the base electrode layer can be formed by a cofire method in which the laminate is fired at the same time as the laminate, or a postfire method in which a conductive paste is applied to the laminate after firing and then baked.
  • the thickness of the thinnest part of the base electrode layer in the length direction L is preferably 0.1 ⁇ m or more and 5 ⁇ m or less. This is because if the thickness of the thinnest part is less than 0.1 ⁇ m, it will be difficult to form a uniform base electrode layer in mass production, while if it exceeds 5 ⁇ m, the external electrode will become large, making it possible to miniaturize ceramic electronic components. This is because it becomes difficult to do so.
  • the thinnest portion of the base electrode layer refers to a portion exhibiting the smallest value in the thickness in the length direction L of the base electrode layer 4 that covers the end surface C of the laminate 2.
  • the conductive metal contained in the conductive paste is, for example, at least one metal selected from the group consisting of Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc., or an alloy that is a combination of any of these metals. can be used.
  • the conductive paste contains SiO 2 -BaO-B 2 O 3 -CaO glass, and by baking the conductive paste, a part of the SiO 2 -BaO-B 2 O 3 -CaO glass 4b is exposed to the surface.
  • the exposed base electrode layer 4 can be formed.
  • SiO 2 --BaO--B 2 O 3 --CaO-based glass easily reacts with P, S, C, Si, Ba, F, N, Al, and B, and a protective layer is easily formed thereon.
  • a protective layer 5 is formed to cover the surface of the SiO 2 --BaO--B 2 O 3 --CaO glass 4b exposed on the surface of the base electrode layer 4.
  • the protective layer contains at least one element selected from the group consisting of P, S, C, Si, Ba, F, N, Al, and B, and preferably contains P and B. .
  • the protective layer containing P or B can be formed as a film by substituting SiO 2 -BaO-B 2 O 3 -CaO-based glass by immersing the laminate on which the base electrode layer is formed in a phosphoric acid aqueous solution or a boric acid aqueous solution, respectively. It is formed.
  • the SiO 2 -BaO-B 2 O 3 -CaO glass 4b By covering the surface of the SiO 2 -BaO-B 2 O 3 -CaO glass 4b exposed on the surface of the base electrode layer 4 with the protective layer 5, the SiO 2 -BaO-B 2 O 3 -CaO of the plating solution is removed. It is possible to prevent corrosion of the base electrode layer and prevent a decrease in heat resistance and moisture resistance due to the formation of pores in the base electrode layer and the penetration of the plating solution.
  • the thickness of the protective layer in the length direction L is less than 1 nm, it will not be possible to reliably protect the SiO 2 -BaO-B 2 O 3 -CaO glass, while if it exceeds 100 nm, the external electrode will become large. Since it becomes difficult to miniaturize ceramic electronic components, it is preferable that the thickness be 1 nm or more and 100 nm or less.
  • a Ni plating layer 6a is formed to cover the surfaces of the base electrode layer 4 and the protective layer 5.
  • the Ni plating layer can be formed by electrolytic plating.
  • a Sn plating layer 6b can be formed on the surface of the Ni plating layer 6a by electrolytic plating to obtain a two-layer structure.
  • the plating layer can prevent the solder used when mounting the multilayer ceramic capacitor from corroding the underlying electrode layer.
  • the present invention is not limited thereto, and various modifications can be made. Further, the present invention is not limited to multilayer ceramic capacitors, but can be widely used in ceramic electronic components.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
PCT/JP2023/008612 2022-03-18 2023-03-07 セラミック電子部品 Ceased WO2023176594A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202380018004.XA CN118575243A (zh) 2022-03-18 2023-03-07 陶瓷电子部件
JP2024507786A JP7711837B2 (ja) 2022-03-18 2023-03-07 セラミック電子部品
US18/766,895 US20240363287A1 (en) 2022-03-18 2024-07-09 Ceramic electronic component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022-044135 2022-03-18
JP2022044135 2022-03-18

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US18/766,895 Continuation US20240363287A1 (en) 2022-03-18 2024-07-09 Ceramic electronic component

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Publication Number Publication Date
WO2023176594A1 true WO2023176594A1 (ja) 2023-09-21

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PCT/JP2023/008612 Ceased WO2023176594A1 (ja) 2022-03-18 2023-03-07 セラミック電子部品

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US (1) US20240363287A1 (https=)
JP (1) JP7711837B2 (https=)
CN (1) CN118575243A (https=)
WO (1) WO2023176594A1 (https=)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6451613A (en) * 1987-08-24 1989-02-27 Matsushita Electric Industrial Co Ltd Formation of external electrode terminal for leadless chip part
JP2004100014A (ja) * 2002-09-12 2004-04-02 Murata Mfg Co Ltd セラミック電子部品の製造方法、及びセラミック電子部品
JP2007242706A (ja) * 2006-03-06 2007-09-20 Tdk Corp セラミック電子部品の製造方法
JP2020072246A (ja) * 2018-10-29 2020-05-07 サムソン エレクトロ−メカニックス カンパニーリミテッド． キャパシタ部品
WO2020241122A1 (ja) * 2019-05-24 2020-12-03 株式会社村田製作所 表面改質ガラス、電子部品、及び、ケイ酸塩皮膜の形成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7115461B2 (ja) * 2019-12-12 2022-08-09 株式会社村田製作所 積層セラミックコンデンサ
JP2021182585A (ja) * 2020-05-19 2021-11-25 太陽誘電株式会社 積層セラミック電子部品の製造方法、積層セラミック電子部品及び回路基板
JP2022057919A (ja) * 2020-09-30 2022-04-11 株式会社村田製作所 積層セラミックコンデンサ
JP7655713B2 (ja) * 2020-09-30 2025-04-02 株式会社村田製作所 積層セラミックコンデンサ

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6451613A (en) * 1987-08-24 1989-02-27 Matsushita Electric Industrial Co Ltd Formation of external electrode terminal for leadless chip part
JP2004100014A (ja) * 2002-09-12 2004-04-02 Murata Mfg Co Ltd セラミック電子部品の製造方法、及びセラミック電子部品
JP2007242706A (ja) * 2006-03-06 2007-09-20 Tdk Corp セラミック電子部品の製造方法
JP2020072246A (ja) * 2018-10-29 2020-05-07 サムソン エレクトロ−メカニックス カンパニーリミテッド． キャパシタ部品
WO2020241122A1 (ja) * 2019-05-24 2020-12-03 株式会社村田製作所 表面改質ガラス、電子部品、及び、ケイ酸塩皮膜の形成方法

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Publication number Publication date
JP7711837B2 (ja) 2025-07-23
US20240363287A1 (en) 2024-10-31
CN118575243A (zh) 2024-08-30
JPWO2023176594A1 (https=) 2023-09-21

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