WO2023140010A1 - Circuit de source d'alimentation - Google Patents

Circuit de source d'alimentation Download PDF

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Publication number
WO2023140010A1
WO2023140010A1 PCT/JP2022/046824 JP2022046824W WO2023140010A1 WO 2023140010 A1 WO2023140010 A1 WO 2023140010A1 JP 2022046824 W JP2022046824 W JP 2022046824W WO 2023140010 A1 WO2023140010 A1 WO 2023140010A1
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Prior art keywords
circuit
input
winding
power supply
terminal
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PCT/JP2022/046824
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English (en)
Japanese (ja)
Inventor
規央 鈴木
晃郎 島田
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三菱電機株式会社
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Publication of WO2023140010A1 publication Critical patent/WO2023140010A1/fr

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present disclosure relates to power supply circuits.
  • a power supply circuit is a circuit that generates a constant voltage for a certain input voltage range.
  • a power supply circuit when generating 5V from an input voltage of AC 85V to 264V and when generating 5V from an input voltage of DC 24V, there is a large difference in input voltage range between the two, so it is common to use separate power supplies.
  • a non-insulated power supply (system power supply) is mainly used as a power supply for AC85V to 264V input voltage, and an isolated power supply is mainly used as a power supply for DC24V input voltage.
  • the reference potentials (grounds) of these power supplies are different. Therefore, when a plurality of input voltages are input to one electrical device and the same operation is performed, it is necessary to prepare a plurality of power sources and switching transformers.
  • Patent Document 1 a method of providing a plurality of input windings in one transformer is disclosed.
  • the power supply circuit described in Patent Document 1 requires two windings, one for generating the output voltage and the other for applying the input voltage. Furthermore, in the power supply circuit described in Patent Document 1, it is necessary to electrically separate the output voltage terminal and the input voltage terminal.
  • an object of the present disclosure is to provide a power supply circuit that can be driven by different input voltages of a plurality of grounds, that can generate a plurality of output voltages, and that at least one of the plurality of output voltage terminals is electrically shared with the input voltage terminal.
  • a power supply circuit of the present disclosure includes a switching transformer having a first winding, a second winding, and a third winding, a first circuit, a second circuit, and a third circuit.
  • the first circuit includes a positive input terminal and a negative input terminal configured to receive the voltage of the first power supply, a first switch that switches on or off the application of the input voltage to the first winding, and a first control circuit that controls the first switch.
  • the second circuit includes a second control circuit for switching between receiving the voltage of the second power supply and inducing power in the second winding, or outputting the power induced in the second winding to an external load according to the voltage applied to the first winding.
  • the third circuit includes an output positive terminal and an output negative terminal that output power induced in the third winding according to the voltage applied to the first winding or the second winding, and a feedback circuit that feeds back a feedback signal that varies according to the output voltage generated between the output positive terminal and the output negative terminal to the first control circuit and the second control circuit.
  • the power supply circuit of the present disclosure can be driven by a plurality of input voltages with different grounds, can generate a plurality of output voltages, and can electrically share at least one of the plurality of output voltage terminals with the input voltage terminal.
  • FIG. 1 is a diagram showing a configuration of a power supply circuit 100 according to Embodiment 1;
  • FIG. 3 is a diagram showing waveforms of voltage and current in power supply circuit 100 when input voltage Vin1 is input to first circuit 10 and input voltage Vin2 is not input to second circuit 20 in Embodiment 1.
  • FIG. 3 is a diagram showing waveforms of voltage and current in power supply circuit 100 when input voltage Vin2 is input to second circuit 20 and input voltage Vin1 is not input to first circuit 10 in Embodiment 1.
  • FIG. It is a figure which shows the structure of the power supply circuit of a reference example.
  • FIG. 10 is a diagram showing a configuration of a power supply circuit 200 according to a second embodiment;
  • FIG. 10 is a diagram showing waveforms of voltage and current in the power supply circuit 200 when the input voltage Vin1 is input to the first circuit 10A and the input voltage Vin2 is not input to the second circuit 20A in the second embodiment;
  • FIG. 10 is a diagram showing waveforms of voltage and current in power supply circuit 200 when input voltage Vin2 is input to second circuit 20A and input voltage Vin1 is not input to first circuit 10A in Embodiment 2;
  • FIG. 10 is a diagram showing a configuration of a power supply circuit 200A of a modified example of the second embodiment;
  • FIG. 10 is a diagram showing a configuration of a power supply circuit 300 according to a third embodiment;
  • FIG. 10 is a diagram showing waveforms of voltage and current in power supply circuit 300 when input voltage Vin2 is input to second circuit 20B and input voltage Vin1 is not input to first circuit 10A in Embodiment 3;
  • FIG. 13 is a diagram showing a configuration of a power supply circuit 400 according to a fourth embodiment;
  • FIG. 11 is a diagram showing waveforms of voltage and current in power supply circuit 400 when input voltage Vin2 is input to second circuit 20D and input voltage Vin1 is not input to first circuit 10A in Embodiment 4;
  • FIG. 13 is a diagram showing a configuration of a power supply circuit 400A of a modified example of the fourth embodiment;
  • FIG. 1 is a diagram showing the configuration of a power supply circuit 100 according to the first embodiment.
  • the power supply circuit 100 includes a switching transformer 3 , a first circuit 10 , a second circuit 20 and a third circuit 30 .
  • the switching transformer 3 includes a first winding N1, a second winding N2, and a third winding N3.
  • the winding directions of the first winding N1, the second winding N2 and the third winding N3 are the same.
  • a first end without a polarity point of the first winding N1 faces a second end with a polarity point of the third winding N3.
  • the second end of the first winding N1 with a polarity point faces the first end of the third winding N3 without a polarity point.
  • the first end of the first winding N1 without a polarity point faces the second end of the second winding N2 with a polarity point.
  • the second end of the first winding N1 with a polarity point faces the first end of the second winding N2 without a polarity point.
  • the polar point means the starting point of the winding.
  • the first circuit 10 is configured to be connectable with the first power supply 1 .
  • the first circuit 10 is configured to be able to receive an input voltage Vin1 from the first power supply 1 .
  • the second circuit 20 is configured to be connectable to the second power supply 2 .
  • the second circuit 20 is configured to receive the input voltage Vin2 from the second power supply 2 and to output the output voltage Vout1 to a load (not shown).
  • the third circuit 30 is configured to output the output voltage Vout2 to a load (not shown).
  • the first circuit 10 includes a positive input terminal P12, a negative input terminal N12, a capacitor (first capacitor) 12, a resistor (first resistor) 13, a capacitor (second capacitor) 14, a diode (first diode) 11, a diode (second diode) 15, a switch (first switch) 17, and a first control circuit 501.
  • the input positive terminal P12 and the input negative terminal N12 are connected to the first power supply positive terminal P11 and the first power supply negative terminal N11 of the first power supply 1, respectively.
  • the positive input terminal P12 and the negative input terminal N12 are configured to receive the input voltage Vin1 from the first power supply 1 .
  • the capacitor 12 is connected between the positive input terminal P12 and the negative input terminal N12, and receives the voltage of the first power supply 1 as the input voltage Vin1.
  • the cathode of the diode 11 is connected to the first end of the first winding N1.
  • the anode of diode 15 is connected to the second end of first winding N1.
  • the resistor 13 is connected between the positive input terminal P12 and the anode of the diode 11 and the cathode of the diode 15 .
  • Capacitor 14 is connected between input positive terminal P 12 and the anode of diode 11 and the cathode of diode 15 .
  • the first end of the resistor 13, the first end of the capacitor 14, and the anode of the diode 11 are connected to the positive input terminal P12.
  • a second end of resistor 13 and a second end of capacitor 14 are connected to the cathode of diode 15 .
  • the resistor 13, capacitor 14, and diode 15 constitute an RCD snubber circuit.
  • a first end of the switch 17 is connected to the second end of the first winding N1 and the anode of the diode 15.
  • a second end of the switch 17 is connected to the negative input terminal N12.
  • a switch 17 switches on or off the application of the input voltage to the first winding N1.
  • the first control circuit 501 monitors, for example, the voltage of the input positive terminal P12, and when the voltage of the first power supply 1 is input to the first circuit 10, transmits a detection signal DT indicating that the voltage of the first power supply 1 is input to the first circuit 10 to the second control circuit 502 in the second circuit 20.
  • the first control circuit 501 controls the switch 17 based on the feedback signal FB from the third circuit 30 .
  • a control signal CT1 that the first control circuit 501 outputs to the switch 17 is, for example, a PWM (Pulse Width Modulation) signal.
  • the first control circuit 501 is configured to be driven by power from the first power supply 1 .
  • the second circuit 20 includes a positive input/output terminal P22, a negative input/output terminal N22, a load resistor (fourth resistor) 23, a capacitor (third capacitor) 22, a switch (second switch) 24, a switch (third switch) 25, a diode (third diode) 21, and a second control circuit 502.
  • the input/output positive terminal P22 and the input/output negative terminal N22 are connected to the second power supply positive terminal P21 and the second power supply negative terminal N21 of the second power supply 2, respectively.
  • Input/output positive terminal P22 and input/output negative terminal N22 are configured to be able to receive the voltage of second power supply 2 and to output power induced in second winding N2 according to the voltage applied to first winding N1 to an external load (not shown).
  • the capacitor 22 and the load resistor 23 are connected between the input/output positive terminal P22 and the input/output negative terminal N22. Capacitor 22 and load resistor 23 output an output voltage Vout1 or receive an input voltage Vin2.
  • the switch 24 is configured to switch between outputting the power induced in the second winding N2 to the positive input/output terminal P22 and the negative input/output terminal N22, or inputting power from the second power supply 2 to the second winding N2.
  • the switch 24 has an output state terminal C1 and an input state terminal C2.
  • the input state terminal C2 is connected to the first end of the second winding N2 and the cathode of the diode 21.
  • Output state terminal C 1 is connected to the second end of second winding N 2 and to the first end of switch 25 .
  • the switch 24 switches between connecting the input/output positive terminal P22 to the output state terminal C1 or connecting it to the input state terminal C2 according to the control signal CT3 from the second control circuit 502 .
  • the second end of the switch 25 and the anode of the diode 21 are connected to the input/output negative terminal N22.
  • a switch 25 switches on or off the application of the input voltage to the second winding N2.
  • the input negative terminal N12 and the input/output negative terminal N22 are insulated by, for example, reinforced insulation, so that these potentials become different potentials.
  • the second control circuit 502 switches between receiving the voltage of the second power supply 2 and inducing power in the second winding N2, or outputting the power induced in the second winding N2 according to the voltage applied to the first winding N1 to an external load.
  • the second control circuit 502 controls the switch 24 with the control signal CT3.
  • the second control circuit 502 controls the switch 25 with the control signal CT2 based on the feedback signal FB from the third circuit 30.
  • the control signal CT2 output by the second control circuit 502 to the switch 25 is, for example, a PWM signal.
  • the second control circuit 502 is configured to be driven by power from the second power supply 2 or power (output voltage Vout1) induced in the second winding N2 according to the voltage applied to the first winding N1.
  • the third circuit 30 includes a positive output terminal P31 and a negative output terminal N31, a capacitor 32, a load resistor 33, a diode 31, and a feedback circuit 503.
  • the output positive terminal P31 and the output negative terminal N31 output power induced in the third winding N3 to an external load (not shown) according to the voltage applied to the first winding N1 or the second winding N2.
  • the capacitor 32 and the load resistor 33 are connected between the output positive terminal P31 and the output negative terminal N31. Capacitor 32 and load resistor 33 can output an output voltage Vout2.
  • a first end of the capacitor 32 and a first end of the load resistor 33 are connected to the output positive terminal P31 and the cathode of the diode 31 .
  • a second end of the capacitor 32 and a second end of the load resistor 33 are connected to the output negative terminal N31 and the first end of the third winding N3.
  • the output negative terminal N31 is connected to the first end of the third winding N3.
  • the anode of the diode 31 is connected to the second end of the third winding N3.
  • a cathode of the diode 31 is connected to the output positive terminal P31.
  • the feedback circuit 503 transmits a feedback signal FB that changes according to the output voltage Vout2 generated between the output positive terminal P31 and the output negative terminal N31 to the first control circuit 501 of the first circuit 10 and the second control circuit 502 of the second circuit 20.
  • an isolation element such as a photocoupler can be used.
  • the current of the first winding N1, the current of the second winding N2, and the current of the third winding N3 (hereinafter simply referred to as the N1 current, N2 current, and N3 current, respectively) are positive when flowing from the first end to the second end. In the following, the forward voltage of each diode is ignored for simplicity.
  • FIG. 2 is a diagram showing voltage and current waveforms in the power supply circuit 100 when the input voltage Vin1 is input to the first circuit 10 and the input voltage Vin2 is not input to the second circuit 20 in the first embodiment.
  • the first power supply positive terminal P11 and the input positive terminal P12 are connected, and the first power supply negative terminal N11 and the input negative terminal N12 are connected. At least one of the second power supply positive terminal P21 and the input/output positive terminal P22 and the second power supply negative terminal N21 and the input negative terminal N22 is not connected.
  • the positive input/output terminal P22 is connected to the output state terminal C1.
  • IP Vin1 ⁇ ton1/L1...(A1) Energy is accumulated in the switching transformer 3 by the triangular wave current flowing through the first winding N1.
  • N2 current flows through the circuit loop formed by second winding N2, output state terminal C1, capacitor 22, and diode 21 to produce output voltage Vout1 at positive input/output terminal P22.
  • N3 current flows through the circuit loop formed by third winding N3, diode 31 and capacitor 32 to produce output voltage Vout2 at output positive terminal P31.
  • the N1 current flows through the circuit loop formed by the first winding N1, diode 15, capacitor 14 and diode 11 and develops a snubber voltage across resistor 13 and capacitor 14.
  • the feedback circuit 503 included in the third circuit 30 transmits to the first control circuit 501, for example, a feedback signal FB that varies according to the output voltage Vout2 generated between the positive output terminal P31 and the negative output terminal N31.
  • the first control circuit 501 stabilizes the output voltage Vout2 by changing the flow time ton1 based on the feedback signal FB.
  • the voltage ratio between the output voltage Vout1 and the output voltage Vout2 is generally equal to the square root of the ratio of the inductance L2 of the second winding N2 and the inductance L3 of the third winding N3, as shown below.
  • the average current of the N2 current is equal to the average current flowing through the load resistor 23.
  • the average current of the N3 current is equal to the average current flowing through the load resistor 33.
  • the voltage V17 across the switch 17 after the switch 17 is turned off can be expressed by the following formula using the output voltage Vout2 of the third circuit 30 including the feedback circuit 503, the square root of the ratio between the inductance L1 of the first winding N1 and the inductance L3 of the third winding N3, and the input voltage Vin1.
  • the average value of the N2 current is equal to the sum of the average values of the currents flowing through the load resistor 23 and the external load.
  • the average value of the N3 current is equal to the sum of the average values of the currents flowing through the load resistor 33 and the external load.
  • FIG. 3 is a diagram showing voltage and current waveforms in power supply circuit 100 when input voltage Vin2 is input to second circuit 20 and input voltage Vin1 is not input to first circuit 10 in the first embodiment.
  • the second power supply positive terminal P21 and the input/output positive terminal P22 are connected, and the second power supply negative terminal N21 and the input negative terminal N22 are connected. At least one of the first power supply positive terminal P11 and the input/output positive terminal P12 and the first power supply negative terminal N11 and the input negative terminal N12 is not connected.
  • the second control circuit 502 drives the switch 24 with the control signal CT3 to connect the positive input/output terminal P22 to the input state terminal C2.
  • a peak current Ip2 of the N2 current is expressed by the following equation using the flow time ton2.
  • Ip2 Vin2 ⁇ ton2/L2...(B1) Energy is accumulated in the switching transformer 3 by the triangular wave current flowing through the second winding N2.
  • the stored energy causes a triangular wave current to flow through the first winding N1 and the third winding N3.
  • the N1 current flows through the circuit loop formed by the first winding N1, diode 11, capacitor 14 and diode 15 and develops a voltage across resistor 13 and capacitor 14.
  • FIG. N3 current flows through the circuit loop formed by third winding N3, diode 31 and capacitor 32 to produce output voltage Vout2 at output positive terminal P31.
  • a feedback circuit 503 included in the third circuit 30 transmits to the second control circuit 502, for example, a feedback signal FB that varies according to the output voltage Vout2 generated between the positive output terminal P31 and the negative output terminal N31.
  • the second control circuit 502 stabilizes the output voltage Vout2 by changing the flow time ton2 based on the feedback signal FB.
  • the average current of the N3 current is equal to the average current flowing through the load resistor 33.
  • the voltage V25 across the switch 25 after the switch 25 is turned off can be expressed by the following formula using the output voltage Vout2 of the third circuit including the feedback circuit 503, the square root of the ratio of the inductance L2 of the second winding N2 and the inductance L3 of the third winding N3, and the input voltage Vin2.
  • an external load can be connected to the output positive terminal P31 and the output negative terminal N31, so that the output voltage Vout2 can be provided to the outside and electric power can be supplied to the outside.
  • the average value of the N3 current is equal to the sum of the average values of the currents flowing through the load resistor 33 and the external load.
  • Input voltage Vin1 and input voltage Vin2 may be input at the same time.
  • the switch 24 is controlled by the first control circuit 501 and the second control circuit 502 so that the positive input/output terminal P22 is connected to the output state terminal C1.
  • Power is supplied from the first circuit 10 to the second circuit 20 and the third circuit 30 by the switch 17 driven by the first control circuit 501 and the switching transformer 3 .
  • power is supplied to the load resistor 23 from the input voltage Vin2 or the output voltage Vout2 generated by the second circuit 20, whichever is higher.
  • the power supply circuit 100 has been described above as including one first circuit 10, one second circuit 20, and one third circuit 30, it is not limited to this.
  • the power supply circuit 100 may include multiple first circuits 10 , multiple second circuits 20 , and multiple third circuits 30 .
  • the power supply circuit 100 becomes a multi-input/output power supply circuit. Even in this case, it is sufficient to increase the number of windings after the fourth winding in the switching transformer 3, and there is no need to provide a plurality of switching transformers unlike the conventional configuration shown in FIG.
  • the output voltage Vout1 and the output voltage Vout2 can be output.
  • voltage is applied from the first end of the second winding N2 that has no polarity point, and the second end of the second winding N2 that has a polarity point is switched, so that a step-up operation is possible, and even if the value of the input voltage Vin2 is small, it is possible to output an output voltage Vout2 that is greater than the square root of the ratio of the inductance L2 of the second winding N2 and the inductance L3 of the third winding N3 multiplied by the input voltage Vin2.
  • the positive input/output terminal P22 and the negative input/output terminal N22 have both a function as an input terminal for inputting the input voltage Vin2 and a function as an output terminal for outputting the output voltage Vout1.
  • the input terminal and the output terminal can be shared, so the number of terminals can be reduced. As a result, the power supply circuit can be miniaturized. Furthermore, according to the present embodiment, it is possible to allow the user to make a mistake in the wiring of the input/output terminals, thereby improving safety.
  • FIG. 4 is a diagram showing the configuration of the power supply circuit of the reference example.
  • An output voltage Vout1 is generated using the first circuit 40A, the third circuit 50A, and the switching transformer 3A, and the output voltage Vout1 is output from the second power supply positive terminal P21 and the second power supply negative terminal N21.
  • the second power positive terminal P21 and the second power negative terminal N21 are connected to the input/output positive terminal P22 and the input/output negative terminal N22, respectively.
  • An output voltage Vout2 is generated using the first circuit 40B, the third circuit 50B, and the switching transformer 3B, and the output voltage Vout2 is output from the output positive terminal P31 and the output negative terminal N31.
  • the power conversion efficiency of one power source is 80%
  • the power conversion efficiency of the other power source is 80%
  • the overall power conversion efficiency is 64%. Therefore, the power conversion efficiency of the power supply circuit of the reference example is poor.
  • the power supply circuit of the reference example has a problem that it generates a lot of heat. Since the power supply circuit of the reference example requires two switching transformers and two feedback circuits, there is a problem of an increase in size.
  • FIG. 5 is a diagram showing the configuration of the power supply circuit 200 according to the second embodiment.
  • the power supply circuit 200 includes a first circuit 10A, a second circuit 20A, a third circuit 30, and a switching transformer 3.
  • Third circuit 30 and switching transformer 3 are the same as third circuit 30 and switching transformer 3 included in power supply circuit 100 of the first embodiment, and therefore description thereof will not be repeated.
  • the first circuit 10A differs from the first circuit 10 of Embodiment 1 in that the first circuit 10A includes an n-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) 47 instead of the switch 17 as the first switch.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • the drain of the n-channel MOSFET 55 is connected to the second end of the first winding N1 and the anode of the diode 15.
  • the source of the n-channel MOSFET 55 is connected to the negative input terminal N12.
  • the second circuit 20A differs from the second circuit 20 of Embodiment 1 in that the second circuit 20A includes a relay 54 instead of the switch 24 as the second switch, and an n-channel MOSFET (first transistor) 55 instead of the switch 25 as the third switch.
  • the second circuit 20A further includes a Zener diode 56 connected in parallel with the n-channel MOSFET (first transistor) 55 .
  • the drain of the n-channel MOSFET 55 and the cathode of the Zener diode 56 are connected to the second terminal of the second winding N2 and the output state terminal C1.
  • the source of the n-channel MOSFET 55 and the anode of the Zener diode 56 are connected to the anode of the diode 21, the second end of the load resistor 23, the second end of the capacitor 22, and the input/output negative terminal N22.
  • the Zener voltage Vz of the Zener diode 56 is selected to be less than the drain-source voltage rated voltage of the n-channel MOSFET 55 .
  • the first control circuit 501 operates with the input voltage Vin1.
  • the second control circuit 502 operates with the input voltage Vin2.
  • the relay 54 has a c contact. Even when the power supply circuit 200 is in a non-energized state, the positive input/output terminal P22 is connected to the output state terminal C1. As a result, even when the input voltage Vin2 is not supplied to the second control circuit 502 and the second control circuit 502 is not operating, a loop circuit is formed and the output voltage Vout1 can be output. That is, the power supply circuit 200 can be activated only by the input voltage Vin1.
  • the second control circuit 502 When the input voltage Vin2 is connected to the second circuit 20A, the second control circuit 502 receives the input voltage Vin2 and starts up. When the second control circuit 502 detects that the detection signal DT is not sent from the first control circuit 501, that is, that the input voltage Vin1 is not connected, the second control circuit 502 drives the relay 54 by the control signal CT3 to connect the positive input/output terminal P22 to the input state terminal C2. This starts driving the n-channel MOSFET 55 .
  • the second control circuit 502 When the second control circuit 502 receives the detection signal DT from the first control circuit 501, the second control circuit 502 does not drive the relay 54 and maintains the state in which the positive input/output terminal P22 is connected to the output state terminal C1. This allows simultaneous input of the input voltage Vin1 and the input voltage Vin2.
  • FIG. 6 is a diagram showing voltage and current waveforms in the power supply circuit 200 when the input voltage Vin1 is input to the first circuit 10A and the input voltage Vin2 is not input to the second circuit 20A in the second embodiment.
  • FIG. 6 shows the drain-source voltage of the n-channel MOSFET 47 instead of the voltage across the switch 17 shown in FIG. Embodiment 1 shows the operation with an ideal switch and transformer. However, in an actual circuit, the switching transformer 3 has leakage inductance in each winding. Immediately after the n-channel MOSFET 47 is turned off, a surge voltage exceeding the voltage V17 of the above equation (A3) is generated. This surge voltage is suppressed below the drain-source rated voltage of n-channel MOSFET 47 by resistor 13, capacitor 14, and diode 15, which are RCD snubber circuits.
  • the drain-source voltage of the n-channel MOSFET 47 oscillates due to the parasitic capacitance between the drain and source of the n-channel MOSFET 47, the parasitic capacitance of the diode 11, and the inductance L1 of the first winding N1.
  • FIG. 7 is a diagram showing voltage and current waveforms in the power supply circuit 200 when the input voltage Vin2 is input to the second circuit 20A and the input voltage Vin1 is not input to the first circuit 10A in the second embodiment.
  • the Zener voltage Vz of the Zener diode 56 is selected to be lower than the drain-source voltage rated voltage of the n-channel MOSFET 55. Therefore, as shown in FIG. 7, the surge voltage is clamped at Vz, and the n-channel MOSFET 55 can be protected with a simple configuration.
  • FIG. 8 is a diagram showing a configuration of a power supply circuit 200A according to a modification of the second embodiment.
  • the power supply circuit 200A includes a first circuit 10A, a second circuit 20C, a third circuit 30, and a switching transformer 3.
  • Third circuit 30 and switching transformer 3 are the same as third circuit 30 and switching transformer 3 included in power supply circuit 100 of the first embodiment, and therefore description thereof will not be repeated. Since first circuit 10A is the same as first circuit 10A included in power supply circuit 200 of the second embodiment, description thereof will not be repeated.
  • the second circuit 20C differs from the second circuit 20A of the second embodiment in that the second circuit 20C includes an RCD snubber circuit 89 connected across the second winding N2 instead of the Zener diode 56.
  • the RCD snubber circuit 89 comprises a resistor 81, a capacitor 82 and a diode 83.
  • the anode of the diode 83 is connected to the second end of the second winding N2 and the output state terminal C1.
  • the cathode of diode 83 is connected to the first end of resistor 81 and the first end of capacitor 82 .
  • the second end of resistor 81 and the second end of capacitor 82 are connected to the first end of second winding N2, the cathode of diode 21, and input state terminal C2.
  • the effect of suppressing the drain-source voltage of the n-channel MOSFET 55 can be obtained, similar to the Zener diode 56 in the second embodiment.
  • FIG. 9 is a diagram showing the configuration of a power supply circuit 300 according to the third embodiment.
  • the power supply circuit 300 includes a first circuit 10A, a second circuit 20B, a third circuit 30, and a switching transformer 3.
  • Third circuit 30 and switching transformer 3 are the same as third circuit 30 and switching transformer 3 included in power supply circuit 100 of the first embodiment, and therefore description thereof will not be repeated. Since first circuit 10A is the same as first circuit 10A included in power supply circuit 200 of the second embodiment, description thereof will not be repeated.
  • the second circuit 20B differs from the second circuit 20A of the second embodiment in that instead of the relay 54, the second circuit 20B includes a diode (fourth diode) 61, a diode (fifth diode) 62, a p-channel MOSFET (second transistor) 63, an n-channel MOSFET (third transistor) 64, a resistor (second resistor) 65, and a resistor (third resistor) 66.
  • the second circuit 20B does not include the Zener diode 56.
  • a Zener diode 56 is provided to suppress a surge voltage generated across the n-channel MOSFET 55 when it is turned off.
  • the Zener diode 56 is not provided because a circuit for suppressing the surge voltage is not required.
  • the anode of the diode 62 is connected to the second end of the second winding N2 and the drain (first electrode) of the n-channel MOSFET 55.
  • the cathode of diode 62 is connected to the source (first electrode) of p-channel MOSFET 63, the first end of resistor 65, the first end of capacitor 22, the first end of load resistor 23, and input/output positive terminal P22.
  • the drain (second electrode) of the p-channel MOSFET 63 is connected to the anode of the diode 61 .
  • the cathode of diode 61 is connected to the first end of second winding N2 and the cathode of diode 21 .
  • a gate (control electrode) of the p-channel MOSFET 63 is connected to the second end of the resistor 65 and the first end of the resistor 66 .
  • a second end of resistor 66 is connected to the drain (first electrode) of n-channel MOSFET 64 .
  • the source (second electrode) of the n-channel MOSFET 64 is connected to the anode of the diode 21, the source (second electrode) of the n-channel MOSFET 55, the second end of the capacitor 22, the second end of the load resistor 23, and the negative input/output terminal N22.
  • a control signal CT4 from the second control circuit 502 is input to the gate (control electrode) of the n-channel MOSFET 64 and the gate (control electrode) of the n-channel MOSFET 55 .
  • the first control circuit 501 operates with the input voltage Vin1.
  • the second control circuit 502 operates with the input voltage Vin2.
  • the first control circuit 501 controls the n-channel MOSFET 47.
  • the N2 current flows through the circuit loop formed by the second winding N2, the diode 62, the capacitor 22, and the diode 21 to generate the output voltage Vout1 at the input/output positive terminal P22.
  • the circuit is formed and the output voltage Vout1 can be output. That is, the power supply circuit 300 can be activated only by the input voltage Vin1.
  • the power supply circuit 300 can be operated in the same manner as the power supply circuit 200 shown in the second embodiment.
  • FIG. 10 is a diagram showing voltage and current waveforms in power supply circuit 300 when input voltage Vin2 is input to second circuit 20B and input voltage Vin1 is not input to first circuit 10A in the third embodiment.
  • the second control circuit 502 receives the input voltage Vin2 and starts up.
  • the second control circuit 502 detects that the detection signal DT is not sent from the first control circuit 501, that is, that the input voltage Vin1 is not connected, it starts driving the n-channel MOSFET 55 and the n-channel MOSFET 64 by the control signal CT4.
  • the n-channel MOSFET 64 is provided to drive the gate of the p-channel MOSFET 63 .
  • the gate-source voltage of the p-channel MOSFET 63 is 0, and the p-channel MOSFET 63 is off.
  • the n-channel MOSFET 64 is on, the gate-source voltage of the p-channel MOSFET 63 becomes a value obtained by dividing Vin2 by the resistors 65 and 66, and the p-channel MOSFET 63 is turned on.
  • the resistor 66 is unnecessary and can be shorted. That is, the second terminal of the resistor 65 and the drain of the N-channel MOSFET 64 should be connected.
  • the n-channel MOSFET 55, the n-channel MOSFET 64, and the p-channel MOSFET 63 can be driven simultaneously.
  • the drain-source voltage of the n-channel MOSFET 55 is zero.
  • a triangular current corresponding to the inductance L2 and the input voltage Vin2 flows through the circuit loop formed by the capacitor 22, the p-channel MOSFET 63, the diode 61, the second winding N2, and the n-channel MOSFET 55.
  • the peak current Ip3 of the N2 current is expressed by the following equation using the flow time ton2, similarly to the power supply circuit 100 of the first embodiment and the power supply circuit 200 of the second embodiment.
  • Ip3 Vin2 ⁇ ton2/L2...(C1) As a result, energy is stored in the switching transformer 3 .
  • the stored energy causes a triangular wave current to flow through the first winding N1 and the third winding N3.
  • the voltage between the drain and source of the n-channel MOSFET 55 is equal to the input voltage Vin2 in the period when the n-channel MOSFET 55, the n-channel MOSFET 64, and the p-channel MOSFET 63 are all turned off (hereinafter referred to as "off period").
  • off period the period when the n-channel MOSFET 55, the n-channel MOSFET 64, and the p-channel MOSFET 63 are all turned off.
  • the drain-source voltage of the n-channel MOSFET 55 oscillates due to the parasitic capacitance between the drain and source of the n-channel MOSFET 55, the parasitic capacitance between the drain and source of the p-channel MOSFET 63, the parasitic capacitance of the diode 61, the parasitic capacitance of the diode 62, and the inductance L2 of the second winding N2.
  • the simultaneous input of the input voltage Vin1 and the input voltage Vin2 can be allowed by not driving the n-channel MOSFET 55 and the n-channel MOSFET 64.
  • the power supply circuit 300 of the third embodiment is a highly efficient power supply circuit as compared with the power supply circuit 200 of the second embodiment in which energy is consumed by the Zener diode 56 .
  • the limit value LM is represented by the following formula.
  • the power supply circuit 300 of the third embodiment does not need to drive the relay 54 when the input voltage Vin2 is input, so the power supply circuit 300 can be started at high speed. Since the power supply circuit 300 of the third embodiment does not need to drive the relay 54, the size of the second control circuit 502 can be reduced.
  • the relay 54 has been described as being configured by a relay having a c-contact, it is not limited to this.
  • the relay 54 may be configured by combining a relay having an a-contact and a relay having a b-contact.
  • As the relay 54 (a) a semiconductor analog switch, (b) a photoMOS relay, (c) a photovoltaic output photocoupler and MOSFET, (d) a photothyristor, or the like can be used.
  • a bipolar transistor can be used instead of a MOSFET.
  • the n-channel MOSFET can be composed of an NPN transistor
  • the p-channel MOSFET can be composed of a PNP transistor.
  • the resistance 65 can be reduced.
  • FIG. 11 is a diagram showing the configuration of a power supply circuit 400 according to the fourth embodiment.
  • the power supply circuit 400 includes a first circuit 10A, a second circuit 20D, a third circuit 30, and a switching transformer 3.
  • Third circuit 30 and switching transformer 3 are the same as third circuit 30 and switching transformer 3 included in power supply circuit 100 of the first embodiment, and therefore description thereof will not be repeated. Since first circuit 10A is the same as first circuit 10A included in power supply circuit 200 of the second embodiment, description thereof will not be repeated.
  • the second circuit 20D differs from the second circuit 20A of the second embodiment in that the second circuit 20D includes an inductor 74 instead of the relay 54, and an n-channel MOSFET 71 and an inverter 73 instead of the diode 21.
  • a first end of the inductor 74 without a polarity point is connected to the first end of the capacitor 22, the first end of the load resistor 23, and the input/output positive terminal P22.
  • the second poled end of inductor 74 is connected to the second poled end of second winding N 2 and the drain of n-channel MOSFET 55 . Let the inductance of the inductor 74 be L74.
  • the drain of the n-channel MOSFET 71 is connected to the non-polarized first end of the second winding N2.
  • the source of the n-channel MOSFET 71 is connected to the source of the n-channel MOSFET 55, the second end of the capacitor 22, the second end of the load resistor 23, and the positive input/output terminal P22.
  • the gate of n-channel MOSFET 71 is connected to the output of inverter 73 and the input of inverter 73 is connected to the gate of n-channel MOSFET 55 .
  • the n-channel MOSFET 55 is arranged between a first node ND1 between the second end of the second winding N2 having a polarity point and the inductor 74, and a second node ND2 between the input/output negative terminal N22 and the n-channel MOSFET 71.
  • a control signal CT5 from the second control circuit 502 is input to the gate (control electrode) of the n-channel MOSFET 55 and the input of the inverter 73 .
  • the first control circuit 501 operates with the input voltage Vin1.
  • the second control circuit 502 operates with the input voltage Vin2.
  • the first control circuit 501 controls the n-channel MOSFET 47.
  • the second control circuit 502 turns off the n-channel MOSFET 55 and turns on the n-channel MOSFET 71 .
  • the N2 current flows through the circuit loop formed by the second winding N2, the inductor 74, the capacitor 22, and the n-channel MOSFET 71 to generate the output voltage Vout1 at the input/output positive terminal P22.
  • the circuit is formed and the output voltage Vout1 can be output. That is, the power supply circuit 300 can be activated only by the input voltage Vin1.
  • the power supply circuit 300 can be operated in the same manner as the power supply circuit 200 shown in the second embodiment.
  • FIG. 12 is a diagram showing voltage and current waveforms in power supply circuit 300 when input voltage Vin2 is input to second circuit 20D and input voltage Vin1 is not input to first circuit 10A in the fourth embodiment.
  • the second control circuit 502 receives the input voltage Vin2 and starts up.
  • the control signal CT5 starts driving the n-channel MOSFET 55 and the n-channel MOSFET 71.
  • the inverter 73 causes the level of the gate signal of the n-channel MOSFET 71 to be the level of the gate signal of the n-channel MOSFET 55 inverted. Therefore, in this embodiment, the n-channel MOSFET 55 and the n-channel MOSFET 71 can be alternately driven.
  • the drain-source voltage of the n-channel MOSFET 55 is zero.
  • a triangular wave current corresponding to the inductance L74 and the input voltage Vin2 flows through the circuit loop formed by the capacitor 22, the inductor 74, and the n-channel MOSFET 55. Energy is thereby stored in the inductor 74 .
  • the voltage applied between the drain and source of the n-channel MOSFET 55 is the product of the square root of the ratio of the inductance L2 of the second winding N2 and the inductance L3 of the third winding N3 and the output voltage Vout2.
  • the drain-source voltage of the n-channel MOSFET 55 oscillates due to the parasitic capacitance between the drain and source of the n-channel MOSFET 55 and the inductance L74.
  • the n-channel MOSFET 71 is on, the inductance L74 and the inductance L2 of the second winding N2 are excited by the input voltage Vin2, the current of the inductor 74 increases, and the current of the second winding N2 decreases. After that, the n-channel MOSFET 55 is turned on again in the next period.
  • the simultaneous input of the input voltage Vin1 and the input voltage Vin2 can be allowed by not driving the n-channel MOSFET 55 and the n-channel MOSFET 71.
  • the power supply circuit 400 since the power supply circuit 400 has the inductor 74, it is possible to perform a step-up operation, and even when the value of the input voltage Vin2 is small, it is possible to output an output voltage Vout2 that is higher than the square root of the ratio of the inductance L2 of the second winding N2 and the inductance L3 of the third winding N3 multiplied by the input voltage Vin2.
  • the gate signal of the n-channel MOSFET 55 and the gate signal of the n-channel MOSFET 71 may be provided with a suitable dead time, or may be individually controlled by the second control circuit 502.
  • the ON time of the gate signal is smaller than the value obtained by subtracting ton3 from T shown in FIG.
  • FIG. 13 is a diagram showing a configuration of a power supply circuit 400A according to a modification of the fourth embodiment.
  • the power supply circuit 400A includes a first circuit 10A, a second circuit 20E, a third circuit 30, and a switching transformer 3.
  • Third circuit 30 and switching transformer 3 are the same as third circuit 30 and switching transformer 3 included in power supply circuit 200 of the first embodiment, and therefore description thereof will not be repeated. Since first circuit 10A is the same as first circuit 10A included in power supply circuit 200 of the second embodiment, description thereof will not be repeated.
  • the second circuit 20E differs from the second circuit 20D of the fourth embodiment in that the second circuit 20E includes a rectifier circuit 77 connected across the second winding N2.
  • a rectifier circuit 77 includes a capacitor 76 and an n-channel MOSFET 72 .
  • a capacitor 76 and an n-channel MOSFET 72 are connected in series between a first node ND1 and a second node ND2.
  • a first end of the capacitor 76 is connected to the second end of the second winding N2, the second end of the inductor 74, and the drain of the n-channel MOSFET 55.
  • a second end of capacitor 76 is connected to the drain of n-channel MOSFET 72 .
  • the source of the n-channel MOSFET 72 is connected to the sources of the n-channel MOSFET 71, the source of the n-channel MOSFET 55, the second end of the capacitor 22, the second end of the load resistor 23, and the positive input/output terminal P22.
  • a control signal CT6 from the second control circuit 502 is input to the gate (control electrode) of the n-channel MOSFET 72 .
  • the second control circuit 502 controls the n-channel MOSFET 72 with the control signal CT6 based on the detection signal DT from the first control circuit 501 of the first circuit 10.
  • the second control circuit 502 When the input voltage Vin1 is input, the second control circuit 502 receives the output voltage Vout1 and starts up. When the second control circuit 502 detects that the detection signal DT is sent from the first control circuit 501, that is, that the input voltage Vin1 is connected, the second control circuit 502 turns on the control signal CT6 to turn on the n-channel MOSFET 72.
  • the N2 current flows through the circuit loop composed of the second winding N2, the capacitor 76, and the n-channel MOSFET 72.
  • the influence of the inductor 74 which is a parasitic component for the inductance L2 of the second winding N2, can be suppressed, and a decrease in the output voltage Vout1 can be prevented.
  • the inductor 74 and the capacitor 22 form an LC filter for the output voltage Vout1, and obtain the effect of reducing the differential mode noise output to the output voltage Vout1.
  • the second control circuit 502 When the input voltage Vin2 is input, the second control circuit 502 receives the input voltage Vin2 and starts up. When the second control circuit 502 detects that the detection signal DT is not sent from the first control circuit 501, that is, that the input voltage Vin1 is not connected, the second control circuit 502 turns off the control signal CT6 to turn off the n-channel MOSFET 72 and disconnect the capacitor 76 from the circuit.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Un premier circuit (10) comprend une borne d'électrode positive d'entrée (P12) et une borne d'électrode négative d'entrée (N12) qui sont configurées de façon à pouvoir recevoir une tension d'une première source d'alimentation (1), ainsi qu'un premier commutateur (18) qui active et désactive l'application d'une tension d'entrée à un premier enroulement (N1). Un second circuit (20) comprend un deuxième circuit de commande (502) qui commute selon qu'une tension provenant d'une seconde source d'alimentation (2) est reçue et que la puissance est induite dans un deuxième enroulement (N2), ou que la puissance qui a été induite dans le deuxième enroulement (N2) en fonction de la tension appliquée au premier enroulement (N1) est émise vers une charge externe. Un troisième circuit (30) comprend une borne d'électrode positive de sortie (P31) et une borne d'électrode négative de sortie (N31) qui émettent la puissance induite dans un troisième enroulement (N3) en fonction de la tension appliquée au premier enroulement (N1) ou au deuxième enroulement (N2).
PCT/JP2022/046824 2022-01-20 2022-12-20 Circuit de source d'alimentation WO2023140010A1 (fr)

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JP2022007270 2022-01-20
JP2022-007270 2022-01-20

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11196573A (ja) * 1997-12-26 1999-07-21 Tohoku Ricoh Co Ltd スイッチング電源のスナバー回路
JP2004147404A (ja) * 2002-10-23 2004-05-20 Cosel Co Ltd 同期整流式フォワードコンバータのドライブ回路
JP2008206304A (ja) * 2007-02-20 2008-09-04 Tdk Corp スイッチング電源装置
JP2014183634A (ja) * 2013-03-18 2014-09-29 Panasonic Corp 電力変換器、パワーコンディショナ
JP2019221070A (ja) * 2018-06-20 2019-12-26 新電元工業株式会社 スイッチング電源装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11196573A (ja) * 1997-12-26 1999-07-21 Tohoku Ricoh Co Ltd スイッチング電源のスナバー回路
JP2004147404A (ja) * 2002-10-23 2004-05-20 Cosel Co Ltd 同期整流式フォワードコンバータのドライブ回路
JP2008206304A (ja) * 2007-02-20 2008-09-04 Tdk Corp スイッチング電源装置
JP2014183634A (ja) * 2013-03-18 2014-09-29 Panasonic Corp 電力変換器、パワーコンディショナ
JP2019221070A (ja) * 2018-06-20 2019-12-26 新電元工業株式会社 スイッチング電源装置

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