WO2023138229A1 - 量子电路的制备方法、装置、设备、介质及产品 - Google Patents

量子电路的制备方法、装置、设备、介质及产品 Download PDF

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WO2023138229A1
WO2023138229A1 PCT/CN2022/136344 CN2022136344W WO2023138229A1 WO 2023138229 A1 WO2023138229 A1 WO 2023138229A1 CN 2022136344 W CN2022136344 W CN 2022136344W WO 2023138229 A1 WO2023138229 A1 WO 2023138229A1
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quantum
circuit
quantum circuit
time
imaginary
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PCT/CN2022/136344
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French (fr)
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陈玉琴
张胜誉
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腾讯科技（深圳）有限公司
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Priority to JP2023551962A priority Critical patent/JP2024507393A/ja
Priority to US18/202,209 priority patent/US20240005192A1/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/15—Correlation function computation including computation of convolution operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/60—Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms

Definitions

  • the embodiments of the present application relate to the field of quantum technology, and in particular to a preparation method, device, equipment, medium and product of a quantum circuit.
  • quantum circuit prepared based on the time evolution of quantum imaginary numbers is provided, wherein the unitary approximation circuit is prepared according to the time evolution unitary approximation method of quantum imaginary numbers.
  • the unitary approximation method for the time evolution of quantum imaginary numbers needs to select a good enough unitary basis to ensure the accuracy after evolution mapping, and additionally solve a linear equation set at each step.
  • the unitary approximation method needs to be used to expand the unitary parameters and perform an approximation algorithm.
  • the quantum imaginary number time evolution unitary approximation method still needs to measure multiple observations to observe the evolution results of the quantum circuit. With the increase of the system and the requirements for accuracy, some observations will increase rapidly with the evolution. Therefore, in a large system, there will be a large number of measurements and difficult solutions, and this method will gradually lose its feasibility.
  • the depth of the circuit constructed by this method that is, the longest path in the quantum circuit, the path length is an integer, indicating the number of gates executed in the path when the circuit is measured
  • the depth of the circuit constructed by this method will also become deeper with the increase of the evolution length.
  • the embodiment of the present application provides a preparation method, device, equipment, medium and product of a quantum circuit, which can accelerate the process of quantum imaginary time evolution. Described technical scheme is as follows:
  • a method for preparing a quantum circuit comprising:
  • the periodic alternating circuit of the first quantum circuit and the second quantum circuit is used as the prepared quantum circuit.
  • a quantum circuit preparation device comprising:
  • Obtaining module for obtaining the combination of identity matrix and Pauli Z matrix as diagonal matrix base
  • a determination module configured to determine the dynamic evolution relationship of imaginary time diagonal control based on the dynamic evolution relationship of quantum imaginary number time control and the diagonal matrix basis;
  • the determining module is further configured to determine the first quantum circuit controlled by the imaginary time diagonal based on the dynamic evolution relationship of the imaginary time diagonal control;
  • the determination module is also used to determine the second quantum circuit based on the variational quantum approximation algorithm
  • the determining module is further configured to use the periodic alternating circuit of the first quantum circuit and the second quantum circuit as the prepared quantum circuit.
  • a computer device includes a processor and a memory, the memory stores at least one instruction, at least one section of program, code set or instruction set, and the at least one instruction, the at least one section of program, the code set or instruction set are loaded and executed by the processor to implement the above quantum circuit preparation method.
  • a computer-readable storage medium is provided, and at least one instruction, at least one section of program, code set or instruction set is stored in the storage medium, and the at least one instruction, the at least one section of program, the code set or instruction set are loaded and executed by the processor to implement the above-mentioned method for preparing a quantum circuit.
  • a computer program product or computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.
  • the processor of the computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the above method for preparing a quantum circuit.
  • FIG. 1 is a schematic diagram of a circuit preparation architecture provided by an exemplary embodiment of the present application
  • FIG. 2 is a flowchart of a method for preparing a quantum circuit provided by an embodiment of the present application
  • Fig. 3 is a schematic diagram of an alternate structure circuit provided by an exemplary embodiment of the present application.
  • Fig. 4 is a flowchart of a method for preparing a quantum circuit provided by another exemplary embodiment of the present application.
  • Fig. 5 is a schematic diagram of the acquisition process of the first quantum circuit provided by an exemplary embodiment of the present application.
  • Fig. 6 is a schematic diagram of observation and measurement changes provided by an embodiment of the present application.
  • Fig. 7 is a schematic diagram of a flat plateau provided by an exemplary embodiment of the present application.
  • Fig. 8 is an energy level change diagram of imaginary time control provided by an embodiment of the present application.
  • Fig. 9 is a schematic diagram of the number of imaginary time control convergence steps versus the energy difference provided by an embodiment of the present application.
  • Fig. 10 is a line diagram of the convergence comparison between the diagonal control algorithm provided by an embodiment of the present application and the original imaginary number time evolution algorithm;
  • Fig. 11 is a schematic diagram of the convergence comparison between the diagonal control algorithm provided by one embodiment of the present application and the original imaginary number time evolution algorithm;
  • FIG. 12 is a schematic diagram of an auxiliary bit diagonal matrix circuit provided by an embodiment of the present application.
  • Fig. 13 is a schematic diagram of a single-step control circuit provided by an embodiment of the present application.
  • Fig. 14 is a schematic diagram of a variable circuit provided by an embodiment of the present application.
  • Fig. 15 is a structural block diagram of a quantum circuit preparation device provided by an embodiment of the present application.
  • Fig. 16 is a structural block diagram of a quantum circuit preparation device provided by another embodiment of the present application.
  • Fig. 17 is a structural block diagram of a computer device provided by an embodiment of the present application.
  • Quantum computing Based on quantum logic computing, the basic unit of data storage is the quantum bit (qubit).
  • Qubit The basic unit of quantum computing. Traditional computers use 0 and 1 as the basic units of binary. The difference is that quantum computing can process 0 and 1 at the same time, and the system can be in a linear superposition state of 0 and 1:
  • ⁇ > ⁇
  • 2 represent the probability of being 0 and 1, respectively.
  • Hamiltonian A Hermitian matrix that describes the total energy of a quantum system.
  • the Hamiltonian is a physical vocabulary and an operator that describes the total energy of a system, usually denoted by H.
  • Quantum state In quantum mechanics, a quantum state is a microscopic state determined by a set of quantum numbers.
  • Eigenstate In quantum mechanics, the possible values of a mechanical quantity are all the eigenvalues of its operators. The state described by the eigenfunction is called the eigenstate of the operator. In an eigenstate, this mechanical quantity takes on a definite value, the eigenvalue to which this eigenstate belongs.
  • ⁇ > E
  • ⁇ > the solution that satisfies the equation: H
  • ⁇ > E
  • the ground state corresponds to the lowest energy eigenstate of the quantum system.
  • Quantum circuit also known as quantum circuit, a representation of quantum general-purpose computer, which represents the hardware implementation of the corresponding quantum algorithm/program under the quantum gate model. If the quantum circuit contains adjustable parameters to control the quantum gate, it is called a parameterized quantum circuit (Parameterized Quantum Circuit, referred to as PQC) or a variable quantum circuit (Variational Quantum Circuit, referred to as VQC), the two are the same concept.
  • PQC Parameterized Quantum Circuit
  • VQC Variational Quantum Circuit
  • Quantum gate In quantum computing, especially in the computing model of quantum circuits, a quantum gate (Quantum gate, or quantum logic gate) is a basic quantum circuit that operates a small number of qubits.
  • VQE Variational Quantum Eigensolver
  • Non-unitary A unitary matrix is a matrix that satisfies All matrices of , all evolution processes directly allowed by quantum mechanics can be described by unitary matrices. Among them, U is a unitary matrix (Unitary Matrix), is the conjugate transpose of U. In addition, matrices that do not meet this condition are non-unitary, which requires auxiliary means or even exponentially more resources to be realized experimentally, but non-unitary matrices often have stronger expressive power and faster ground state projection effects.
  • the above “exponentially large resources” means that the demand for resources increases exponentially with the increase in the number of qubits. The exponentially large resources can mean that the total number of quantum circuits that need to be measured is exponentially large, that is, correspondingly requires exponentially large computing time.
  • Pauli operator also known as Pauli matrix, is a set of three 2 ⁇ 2 unitary Hermitian complex matrices (also known as unitary matrices), generally represented by the Greek letter ⁇ (sigma). Among them, the Pauli X operator is The Pauli Y operator is The Pauli Z operator is
  • Quantum imaginary number time evolution process The evolution equation of quantum dynamics is replaced by real number time expression with imaginary number time expression to evolve, which is mainly used in finding the lowest eigenstate.
  • Quantum diagonal control control the quantum state evolution process by adding an adjustable diagonal Hamiltonian operator group, and use the properties of the diagonal matrix to achieve the reduction of observations.
  • Time-dependent non-unitary-approximate unitary transformation circuit preparation the time-dependent non-unitary evolution is mapped to the time-dependent unitary evolution by an approximation method so that it can be circuitized, and a circuit architecture that can be placed on the current quantum computer is realized.
  • Obtaining the ground state of a quantum system means obtaining the most stable state of the quantum system. It has very important applications in the research of the basic properties of quantum physics and quantum chemical systems, the solution of combinatorial optimization problems, and pharmaceutical research. An important application scenario of quantum computers is to efficiently solve or express the ground state of quantum systems.
  • the imaginary time evolution is a basic method to solve the ground state of a quantum system.
  • H is the Hamiltonian of the target quantum system
  • ⁇ (t) represents the quantum state of the target quantum system at time t
  • i is the unit of imaginary time
  • E ⁇ represents the eigenvalue at time ⁇ .
  • E i is the intrinsic energy
  • E 0 is the ground state energy
  • ci is the expansion coefficient
  • the core idea of the variational approximation method for quantum imaginary number time evolution is to find a set of unitary operators to approximate non-unitary evolution.
  • this method is to design the circuit structure in advance, and then convert the time evolution problem into the parameter evolution on the parameter circuit, and thereby transform the long circuit problem into a short circuit parameter problem.
  • the above-mentioned quantum imaginary number time evolution variational approximation method has a predetermined fixed circuit structure, but the fixed circuit structure usually faces trade-offs between accuracy, number of parameters, and length.
  • the trade-offs in circuit design also make the convergence accuracy of this method greatly affected by the selected circuit architecture, and this impact is difficult to estimate in advance.
  • approximating the matrix to be solved will also increase the number of measurements, especially in The measurement aspect of the circuit, because the number of measurements will increase according to the number of parameters.
  • the difficulty of solving linear equations will gradually increase as the system becomes larger and more complex and the Pauli matrix. Overall, the adaptability to large systems is largely determined by the design of the variable circuit, and there is currently no general design idea for the variable circuit.
  • FIG. 1 shows a schematic diagram of the circuit preparation architecture provided by an exemplary embodiment of the present application.
  • an approximate circuit 120 can be obtained through the unitary approximation method of quantum imaginary number time evolution, and the obtained quantum circuit has many measurements and deep circuits;
  • the variational circuit 130 can be obtained through the quantum imaginary number time variation approximation method, and the obtained quantum circuits have many measurements and poor precision;
  • Angle Matrix Circuit 140 can be obtained through the quantum imaginary number time variation approximation method, and the obtained quantum circuits have many measurements and poor precision.
  • the preparation method of the quantum circuit provided in the embodiment of the present application can be implemented by a classical computer (such as a PC), for example, the classical computer executes a corresponding computer program to realize the method; it can also be executed in a mixed device environment of the classical computer and the quantum computer, for example, the classical computer and the quantum computer cooperate to realize the method.
  • a quantum computer is used to solve the eigenstates in the embodiments of the present application
  • a classical computer is used to realize other steps in the embodiments of the present application except for solving the eigenstates.
  • the execution subject of each step is a computer device for introduction and description.
  • the computer device may be a classical computer, or may include a mixed execution environment of a classical computer and a quantum computer, which is not limited in this embodiment of the present application.
  • FIG. 2 shows a flowchart of a method for preparing a quantum circuit provided by an embodiment of the present application.
  • the execution subject of each step of the method may be a computer device.
  • the method can include:
  • Step 210 obtain the combination of the identity matrix and the Pauli Z matrix as the diagonal matrix basis.
  • Step 220 based on the diagonal matrix basis and the dynamic evolution relationship based on quantum imaginary time control, determine the dynamic evolution relationship of imaginary time diagonal control.
  • ⁇ represents imaginary time
  • ⁇ ( ⁇ )> represents imaginary time eigenstates
  • H d is a set of diagonal matrices composed of identity matrix and Pauli Z matrix, that is, the evolution operator determined based on the basis of the diagonal matrix
  • ⁇ d ( ⁇ ) represents real coefficients changing with time
  • E represents eigenenergy
  • E ⁇ ( ⁇ )
  • the real coefficients are determined based on the requirement of the first-order partial derivative of the Lyapunov function with respect to time, that is, the Lyapunov function can provide us with ideas for designing the ⁇ d ( ⁇ ) function.
  • V( ⁇ ( ⁇ )) ⁇ ( ⁇ )
  • E 0 is the smallest eigenvalue of H p
  • H p represents the original Hamiltonian operator, that is, E 0 is any value so that H p -E 0 is a positive semi-definite matrix.
  • ⁇ d ( ⁇ ) is as follows:
  • Step 230 Determine the first quantum circuit controlled by the imaginary time diagonal based on the dynamic evolution relationship of the imaginary time diagonal control.
  • the dynamic evolution relationship controlled by the imaginary time diagonal is subjected to unitary transformation to obtain a quantum circuit controlled by the imaginary time diagonal.
  • Step 240 determine the second quantum circuit based on the variational quantum approximation algorithm.
  • the second quantum circuit is determined by a quantum imaginary number time evolution variational approximation algorithm.
  • steps 220 to 230 and the above step 240 are parallel steps. Steps 220 to 230 may be executed first, or step 240 may be executed first, or steps 220 to 230 and step 240 may be executed at the same time.
  • step 250 the periodic alternating circuit of the first quantum circuit and the second quantum circuit is used as a prepared quantum circuit.
  • an alternating circuit in which the first quantum circuit and the second quantum circuit take the preset imaginary time step as the cycle period is used as the prepared quantum circuit.
  • the original imaginary time evolution is used with the alternating structure of the diagonal control method, and the original imaginary time evolution is replaced in its controllable range by using fewer diagonal control items to achieve circuit preparation to reduce the number of measurements. It is found through experiments that it can take advantage of the imaginary time control to achieve better accuracy with fewer evolutions. If the block of imaginary time evolution is constructed using the variable quantum approximation algorithm, because compared with the original pure variable quantum approximation unitary algorithm requires fewer evolution states, Simpler circuit structures such as fewer parameters and shallower circuit depths can thus also be used.
  • FIG. 3 shows a schematic diagram of an alternate structure circuit provided by an exemplary embodiment of the present application.
  • the circuit 310 is an evolutionary circuit constructed by a quantum unitary approximation algorithm; And during the alternation, each variation circuit 321 and diagonal control circuit 322 correspond to a preset imaginary time step ⁇ .
  • the circuit 310 and the circuit 320 shown in FIG. 3 have the same imaginary time step ⁇ , and in each imaginary time step ⁇ , the circuit length of the distribution of quantum gates is shorter, and the number of quantum gates is smaller. That is, the circuit 320 uses a shorter circuit structure to achieve the same evolution, and at the same time reduces the number of parameters and measurement requirements required by the variational circuit.
  • the method provided in this embodiment uses the control method to reduce the number of measurements and accelerate the time evolution of quantum imaginary numbers, and the circuit structure of the variational circuit and the diagonal control circuit are alternately cycled.
  • the quantum unitary approximation algorithm needs to find a set of unitary operators to act on the quantum state, and ensure that the state after the action is very similar to the result of the non-unitary evolution operator in imaginary time. Therefore, a set of unitary operators is first selected as the base, and a set of unitary operators is linearly combined from the pre-selected bases to approximate its evolution.
  • the selection of unitary operators is a random selection that cannot predict the effect.
  • Fig. 4 is a flowchart of a method for preparing a quantum circuit provided by another exemplary embodiment of the present application. As shown in Fig. 4, the method includes:
  • Step 410 obtaining the combination of the identity matrix and the Pauli Z matrix as the diagonal matrix basis.
  • Step 420 based on the diagonal matrix basis and the dynamic evolution relationship based on quantum imaginary time control, determine the dynamic evolution relationship of imaginary time diagonal control.
  • ⁇ represents imaginary time
  • ⁇ ( ⁇ )> represents imaginary time eigenstates
  • H d is a set of diagonal matrices composed of identity matrix and Pauli Z matrix, that is, the evolution operator determined based on the basis of the diagonal matrix
  • ⁇ d ( ⁇ ) represents real coefficients changing with time
  • E represents eigenenergy
  • E ⁇ ( ⁇ )
  • Step 430 Perform unitary transformation on the dynamic evolution relationship controlled by the imaginary time diagonal through the unitary approximation method of quantum imaginary time evolution, and obtain the first quantum circuit controlled by the imaginary time diagonal.
  • the dynamic evolution relationship controlled by the imaginary number time diagonal is converted into a candidate quantum circuit; the candidate quantum circuit is unitary converted by the unitary approximation method of quantum imaginary number time evolution, and the first quantum circuit controlled by the imaginary number time diagonal is obtained.
  • FIG. 5 shows a schematic diagram of the acquisition process of the first quantum circuit provided by an exemplary embodiment of the present application.
  • a unitary base 510 is pre-selected, and based on the unitary base, it is converted into a circuit form 520, and the circuit structure is converted through a quantum virtual-time unitary approximation algorithm to obtain a unitary approximation circuit module 530.
  • ⁇ ⁇ ⁇ is the pre-selected basis
  • x[l] ⁇ is the coefficient corresponding to its linear combination expansion
  • c[l] is the normalization coefficient
  • the goal is to find the value of x[l] ⁇ by solving the linear equation.
  • Step 440 determine the second quantum circuit based on the variational quantum approximation algorithm.
  • the second quantum circuit is determined by a quantum imaginary number time evolution variational approximation algorithm.
  • step 450 the periodic alternating circuit of the first quantum circuit and the second quantum circuit is used as a prepared quantum circuit.
  • an alternating circuit in which the first quantum circuit and the second quantum circuit take the preset imaginary time step as the cycle period is used as the prepared quantum circuit.
  • the method provided in this embodiment uses the control method to reduce the number of measurements and accelerate the time evolution of quantum imaginary numbers, and the circuit structure of the variational circuit and the diagonal control circuit alternate cycle, while using a shorter circuit structure to achieve the same evolution, it also reduces the number of parameters and measurement requirements required by the variational circuit.
  • the method provided in this embodiment (1) proves in numerical simulation that it can converge faster than the simple imaginary time evolution method in the case of cooperating with the imaginary number time evolution, so as to achieve the goal of shallower circuit depth; (2) use the properties of the diagonal matrix and Z measurement to reduce the number of measurements of e - ⁇ H[l] and imaginary number time quantum control in each step; (3)
  • the non-variational design idea provides its better convergence path, compared with the classical variational method may have convergence difficulties, especially with
  • FIG. 7 shows a schematic diagram of a flat plateau provided by an exemplary embodiment of the present application. As shown in FIG. 7 , as the circuit depth 710 increases, the plateau problem becomes more pronounced.
  • the measurement quantity is ⁇ ⁇ ⁇ v , H p ⁇ ⁇ , H p , Wait for the pentagonal measurement, use the symbols N p , N ⁇ to represent the measurement quantity of ⁇ ⁇ , H p and do not make the assumption of simplification of the observation measurement, then the measurement quantity of the pentagonal measurement can be expressed as N p , N p N ⁇ .
  • the total observation measurement can be expressed as:
  • the measurement quantity is converted into two different modules, one is the original five unitary approximation strategy observations, the other is ⁇ ⁇ ⁇ v , H d ⁇ ⁇ , ⁇ ⁇ (for unitary approximation) and H p , H d , H d H p (for control).
  • the measurement quantities of the six observations can be expressed as N ⁇ , N d N ⁇ , N p , N d , N d N p , N p N d Therefore, when the number of steps is S QCITE and S QC , the total observation measurement can be expressed as:
  • N d N p and N p N d have the same number of measurements, N p and N ⁇ are both included in N p N d , In the measurement of , it can finally be simplified as:
  • the overall reduction in the number of measurements is therefore approximately proportional to the reduction in the quantum unitary approximation convergence step size of the control method.
  • quantum imaginary time control can effectively reduce the convergence step in experimental testing, because it will adjust the energy difference of the original system, so that the imaginary time evolution can converge to the ground state at a faster speed.
  • the energy spectrum of hydrogen molecules changes with the imaginary time under the assistance of imaginary time control, as shown in the energy level change line diagram 810 and the line diagram 820. The greater the difference between the energy of the excited state and the energy of the ground state, the faster the convergence speed.
  • FIG. 10 it shows the convergence comparison line graph 1010 between the diagonal control algorithm and the original imaginary number time evolution algorithm. Obviously, the convergence speed of the diagonal control algorithm + imaginary number time evolution algorithm is obviously faster than that of the original imaginary number time evolution algorithm.
  • the acceleration property of quantum imaginary number time control can still be reflected, and the convergence circuit is reduced from the original 58-layer quantum imaginary number time evolution circuit to 8-layer quantum imaginary number time evolution plus 8-layer diagonal control circuit.
  • the overall measurement quantity is about 8/58 of the original and the circuit depth is also reduced to 16 layers.
  • the diagonal circuit part in the above structure can also be implemented with a shorter circuit structure after only one auxiliary bit is matched, such as the 3-bit diagonal matrix circuit 1110 shown in FIG. 11 .
  • the diagonal matrix circuit 1110 uses a post-selection method to match a control gate (Control gate), an X gate (X gate), and occurrences in the matrix Given a particular element placed on the diagonal matrix diag((7), we get As above, the auxiliary bit diagonal matrix circuit 1110 has 8 diagonal elements, so 8 Ry gates 1111 are needed to adjust one by one to realize non-unitary evolution.
  • the circuit is further reduced to a shorter fixed length according to the selected unit matrix and Pauli Z matrix combination.
  • the unit matrix and Pauli Z matrix combination structure half of the diagonal elements are adjusted by the Pauli Z matrix, while the remaining half remain unchanged.
  • the matrix circuit 1110 is simplified to the circuit 1210 shown in FIG. 12 .
  • the Pauli Z matrix adjusts the diagonal elements whose third bit is 1, while the other diagonal elements are not affected.
  • the continuous multi-step control circuit can be simplified into a single-step control circuit and implemented on a quantum computer with a shorter circuit structure similar to that shown in FIG. 12 .
  • a circuit 1310 is shown in FIG. 13 , which shows that a continuous two-layer circuit is simplified into a single-layer control circuit 1310 by switching. Among them, the two-layer circuit is implemented as:
  • the logic of the simplified single-layer control circuit 1310 is as follows:
  • a variational circuit can be used to shorten the circuit depth, such as the variational circuit 1410 shown in Figure 14.
  • the combination of the diagonal control circuit can reduce the circuit design requirements and retain its structural advantages of short circuits.
  • the variational circuit 1410 is first obtained, the variational circuit 1410 includes circuit parameters to be trained, such as: quantum gate parameters in the variational circuit 1410, etc., and a preset loss function is obtained, and the preset loss function is used to define the expected value of the circuit parameters of the variational circuit; based on the quantum operation result of the variational circuit 1410 and the preset loss function, the loss value of the variational circuit 1410 is determined; based on the loss value, the variational circuit 1410 is trained to obtain the second quantum circuit.
  • circuit parameters to be trained such as: quantum gate parameters in the variational circuit 1410, etc.
  • a preset loss function is obtained, and the preset loss function is used to define the expected value of the circuit parameters of the variational circuit
  • the loss value of the variational circuit 1410 is determined
  • the variational circuit 1410 is trained to obtain the second quantum circuit.
  • real-time control can also use a similar method and because of its unitary evolution, there is a more intuitive non-approximate circuit preparation method in circuit selection.
  • Fig. 15 is a structural block diagram of a quantum circuit preparation device provided by an exemplary embodiment of the present application. As shown in Fig. 15, the device includes:
  • Obtaining module 1510 for obtaining the combination of identity matrix and Pauli Z matrix as a diagonal matrix basis
  • the determination module 1520 is used to determine the dynamic evolution relationship of imaginary number time diagonal control based on the dynamic evolution relationship of quantum imaginary number time control and the diagonal matrix basis;
  • the determination module 1520 is further configured to determine the first quantum circuit of the imaginary time diagonal control based on the dynamic evolution relationship of the imaginary time diagonal control;
  • the determination module 1520 is further configured to determine the second quantum circuit based on a variational quantum approximation algorithm
  • the determination module 1520 is further configured to use the periodic alternating circuit of the first quantum circuit and the second quantum circuit as the prepared quantum circuit.
  • the determination module 1520 includes:
  • the conversion unit 1521 is configured to perform unitary conversion on the dynamic evolution relationship controlled by the imaginary time diagonal through an imaginary time evolution unitary approximation device to obtain the first quantum circuit.
  • the conversion unit 1521 is further configured to convert the dynamic evolution relationship controlled by the imaginary number time diagonal into a candidate quantum circuit; perform unitary conversion on the candidate quantum circuit through the quantum imaginary time evolution unitary approximation device to obtain the first quantum circuit controlled by the imaginary time diagonal.
  • the dynamic evolution relationship of the imaginary time diagonal control is as follows:
  • ⁇ represents imaginary time
  • ⁇ ( ⁇ )> represents imaginary time eigenstates
  • H d represents the evolution operator determined based on the diagonal matrix basis
  • ⁇ d ( ⁇ ) represents real coefficients changing with time
  • E represents eigenenergy.
  • the real number coefficient is determined based on the requirement of the first-order partial derivative of the Lyapunov function with respect to time.
  • the requirements for the first-order partial derivative of the Lyapunov function with respect to time are as follows:
  • E 0 is the minimum eigenvalue of H p .
  • the real number coefficients are as follows:
  • the determining module 1520 is further configured to alternately set the first quantum circuit and the second quantum circuit with a preset virtual time step as a cycle period to obtain the quantum circuit.
  • the device provided in this embodiment uses the control method to reduce the number of measurements and accelerate the time evolution of quantum imaginary numbers, and the circuit structure of the variational circuit and the diagonal control circuit alternate cycle, while using a shorter circuit structure to achieve the same evolution, it also reduces the number of parameters and measurement requirements required by the variational circuit.
  • the quantum circuit preparation device provided in the above embodiment is only illustrated by the division of the above functional modules. In practical applications, the above function allocation can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.
  • the quantum circuit manufacturing device and the quantum circuit manufacturing method embodiment provided by the above embodiment belong to the same idea, and the specific implementation process is detailed in the method embodiment, and will not be repeated here.
  • FIG. 17 shows a structural block diagram of a computer device 1700 provided by an embodiment of the present application.
  • the computer device 1700 may be a classical computer.
  • the computer equipment can be used to implement the method for preparing a quantum circuit provided in the above embodiments. Specifically:
  • the computer device 1700 includes a central processing unit (such as CPU (Central Processing Unit, central processing unit), GPU (Graphics Processing Unit, graphics processing unit) and FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array, etc.) 1704, and a system bus 1705 connecting the system memory 1704 and the central processing unit 1701.
  • the computer device 1700 also includes a basic input/output system (Input Output System, I/O system) 1706 that helps to transfer information between various devices in the server, and a mass storage device 1707 for storing operating systems 1713, application programs 1714 and other program modules 1715.
  • I/O system Input Output System
  • the basic input/output system 1706 includes a display 1708 for displaying information and input devices 1709 such as a mouse and a keyboard for users to input information.
  • both the display 1708 and the input device 1709 are connected to the central processing unit 1701 through the input and output controller 1710 connected to the system bus 1705 .
  • the basic input/output system 1706 may also include an input output controller 1710 for receiving and processing input from a number of other devices such as a keyboard, a mouse, or an electronic stylus.
  • input output controller 1710 also provides output to a display screen, printer, or other type of output device.
  • the mass storage device 1707 is connected to the central processing unit 1701 through a mass storage controller (not shown) connected to the system bus 1705 .
  • the mass storage device 1707 and its associated computer-readable media provide non-volatile storage for the computer device 1700 . That is to say, the mass storage device 1707 may include a computer-readable medium (not shown) such as a hard disk or a CD-ROM (Compact Disc Read-Only Memory, CD-ROM) drive.
  • a computer-readable medium such as a hard disk or a CD-ROM (Compact Disc Read-Only Memory, CD-ROM) drive.
  • the computer device 1700 can also run on a remote computer connected to the network through a network such as the Internet. That is, the computer device 1700 can be connected to the network 1712 through the network interface unit 1711 connected to the system bus 1705, or in other words, the network interface unit 1711 can also be used to connect to other types of networks or remote computer systems (not shown).
  • FIG. 17 does not constitute a limitation to the computer device 1700, and may include more or less components than shown in the figure, or combine some components, or adopt a different arrangement of components.
  • a computer-readable storage medium is also provided, wherein at least one instruction, at least one section of program, code set or instruction set is stored in the storage medium, and the at least one instruction, the at least one section of program, the code set or the instruction set are executed by a processor to implement the above method for preparing a quantum circuit.
  • a computer program product or computer program comprising computer instructions stored in a computer readable storage medium.
  • the processor of the computer device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the above-mentioned preparation method of the quantum circuit.

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Abstract

一种量子电路的制备方法、装置、设备、介质及产品，涉及量子技术领域，该方法包括：获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底(201)；基于对角矩阵基底和基于量子虚数时间控制的动力学演化关系，确定虚数时间对角控制的动力学演化关系(202)；基于虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路(203)；基于变分量子近似算法确定第二量子电路(204)；将第一量子电路和第二量子电路周期交替作为制备得到的量子电路(205)。

Description

量子电路的制备方法、装置、设备、介质及产品
本申请要求于2022年01月20日提交的申请号为202210066132.9、发明名称为“量子电路的制备方法、装置、设备、介质及产品”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及量子技术领域，特别涉及一种量子电路的制备方法、装置、设备、介质及产品。
背景技术
随着量子计算的快速发展，量子算法在很多领域都有着重要的应用，在相关技术中，提供了一种基于量子虚数时间演化制备的量子电路，其中，根据量子虚数时间演化幺正近似方法制备得到幺正近似电路。
然而，上述方式中，量子虚数时间演化幺正近似方法需要选足够好的幺正基底来保证演化映射后的精准度，在每一步骤还需要额外求解线性方程组。在构建线性方程组时，需要通过幺正近似方法对幺正参数展开并做近似算法，而即使在仅做二阶近似的情况下，该量子虚数时间演化幺正近似方法仍需要量测多项观量测以观测量子电路的演化结果，随着系统增大及对精准度的要求，部分观测量会随着演化的进行存在量测数据的急剧增加，因此大系统下，会面临量测数量大以及求解困难的问题，此方法也会渐渐失去可行性。此外，此方法所构建的电路深度(即量子电路中最长的路径，路径长度是一个整数，表示电路测量时在该路径中执行的门数)也将随着演化长度的增加而变深。
发明内容
本申请实施例提供了一种量子电路的制备方法、装置、设备、介质及产品，能够加速量子虚时间演化的过程。所述技术方案如下：
根据本申请实施例的一个方面，提供了一种量子电路的制备方法，所述方法包括：
获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底；
基于量子虚数时间控制的动力学演化关系和所述对角矩阵基底，确定虚数时间对角控制的动力学演化关系；
基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路；
基于变分量子近似算法确定第二量子电路；
将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路。
根据本申请实施例的一个方面，提供了一种量子电路的制备装置，所述装置包括：
获取模块，用于获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底；
确定模块，用于基于量子虚数时间控制的动力学演化关系和所述对角矩阵基底，确定虚数时间对角控制的动力学演化关系；
所述确定模块，还用于基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路；
所述确定模块，还用于基于变分量子近似算法确定第二量子电路；
所述确定模块，还用于将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路。
根据本申请实施例的一个方面，提供了一种计算机设备，所述计算机设备包括处理器和存储器，所述存储器中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或指令集由所述处理器加载并执行以实现上述量子电路的制备方法。
根据本申请实施例的一个方面，提供了一种计算机可读存储介质，所述存储介质中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或指令集由所述处理器加载并执行以实现上述量子电路的制备方法。
根据本申请实施例的一个方面，提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。计算机设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该计算机设备执行上述量子电路的制备方法。
本申请实施例提供的技术方案可以带来如下有益效果：
通过适用于量子虚数时间演化过程的量子对角控制方法，减少量测数量并加速量子虚数时间演化，且变分电路与对角控制电路交替循环的电路结构，利用更短的电路架构来实现相同的演化的同时，也降低变分电路所要求之参数数量及测量要求。变分电路与对角控制电路交替循环的电路结构，利用原本的虚数时间演化搭配对角控制方法的交替结构，利用较少的对角控制项，在其可控制区间替换原本的虚数时间演化来达到减少量测数量的电路制备，其中在泡利Z测量下由单位矩阵及泡利Z矩阵组合成的矩阵H d以及与其作用的H dH p,H dσ μ项相较于量子虚数时间演化幺正近似方法中的H dσ μ及σ μ都仅会增加少量的量测数量，因此在本申请实施例中，量测数量主要的贡献由σ μσ v，H p，σ μ决定，从五项变为主要的三项测量，降低了变分电路所要求之参数数量及测量次数。
附图说明
图1是本申请一个示例性实施例提供的电路制备架构示意图；
图2是本申请一个实施例提供的量子电路的制备方法的流程图；
图3是本申请一个示例性实施例提供的交替结构电路的示意图；
图4是本申请另一个示例性实施例提供的量子电路的制备方法的流程图；
图5是本申请一个示例性实施例提供的第一量子电路的获取过程示意图；
图6是本申请一个实施例提供的观量测变化示意图；
图7是本申请一个示例性实施例提供的平坦高原示意图；
图8是本申请一个实施例提供的虚数时间控制能阶变化图；
图9是本申请一个实施例提供的虚数时间控制收敛步数对比能量差示意图；
图10是本申请一个实施例提供的对角控制算法与原虚数时间演化算法的收敛比较线条图；
图11是本申请一个实施例提供的对角控制算法与原虚数时间演化算法收敛比较示意图；
图12是本申请一个实施例提供的辅助比特对角矩阵电路示意图；
图13是本申请一个实施例提供的单步的控制电路的示意图；
图14是本申请一个实施例提供的变分电路示意图；
图15是本申请一个实施例提供的量子电路的制备装置的结构框图；
图16是本申请另一个实施例提供的量子电路的制备装置的结构框图；
图17是本申请一个实施例提供的计算机设备的结构框图。
具体实施方式
在对本申请实施例进行介绍说明之前，首先对本申请中涉及的一些名词进行介绍说明。
1.量子计算：基于量子逻辑的计算方式，存储数据的基本单元是量子比特(qubit)。
2.量子比特：量子计算的基本单元。传统计算机使用0和1作为二进制的基本单元。不同的是量子计算可以同时处理0和1，系统可以处于0和1的线性叠加态：|ψ>＝α|0>+β|1>，α，β代表系统在0和1上的复数概率幅。它们的模平方|α| 2，|β| 2分别代表处于0和1的概率。
3.哈密顿量：描述量子系统总能量的一个厄密共轭的矩阵。哈密顿量是一个物理词汇，是一个描述系统总能量的算符，通常以H表示。
4.量子态：在量子力学中，量子态是由一组量子数所确定的微观状态。
5.本征态：在量子力学中，一个力学量所可能取的数值，就是它的算符的全部本征值。本征函数所描写的状态称为这个算符的本征态。在本征态中，这个力学量取确定值，即这个本征态所属的本征值。对于一个哈密顿量矩阵H，满足方程：H|ψ>＝E|ψ>的解称之为H的本征态|ψ>，具有本征能量E。基态则对应了量子系统能量最低的本征态。
6.量子线路：也称为量子电路，量子通用计算机的一种表示，代表了相应量子算法/程序在量子门模型下的硬件实现。若量子线路中包含可调的控制量子门的参数，则被称为参数化的量子线路(Parameterized Quantum Circuit，简称PQC)或变分量子线路(Variational Quantum Circuit，简称VQC)，两者为同一概念。
7.量子门：在量子计算，特别是量子线路的计算模型里面，一个量子门(Quantum gate，或量子逻辑门)是一个基本的，操作一个小数量量子比特的量子线路。
8.变分量子本征求解器(Variational Quantum Eigensolver，简称VQE)：通过变分线路(即PQC/VQC)实现特定量子系统基态能量的估计，是一种典型的量子经典混合计算范式，在量子化学领域有广泛的应用。
9.非幺正：幺正矩阵是指满足
Figure PCTCN2022136344-appb-000001
的全部矩阵，所有量子力学直接允许的演化过程都可以通过幺正矩阵描述。其中，U为幺正矩阵(Unitary Matrix)，
Figure PCTCN2022136344-appb-000002
是U的共轭转置。另外，不满足该条件的矩阵则是非幺正的，需要通过辅助手段甚至指数多的资源才可在实验上实现，但非幺正矩阵往往具有更强的表达能力和更快的基态投影效果。上述“指数多的资源”是指资源的需求量随着量子比特数量的增加，呈指数级增加，该指数多的资源可以是指需要测量的量子线路的总数是指数多个，也即相应需要指数多的计算时间。
10.泡利算符：也称为泡利矩阵，是一组三个2×2的幺正厄米复矩阵(又称酉矩阵)，一般都以希腊字母σ(西格玛)来表示。其中，泡利X算符为
Figure PCTCN2022136344-appb-000003
泡利Y算符为
Figure PCTCN2022136344-appb-000004
泡利Z算符为
Figure PCTCN2022136344-appb-000005
11.量子虚数时间演化过程：将量子动力学演化方程由实数时间表述替换为虚数时间表述 来演化，主要应用在寻找最低本征态中。
12.量子对角控制：通过添加可调整的对角哈密顿算符组来达到对量子态演化过程的控制，并利用对角矩阵的性质来实现观量测的减少。
13.含时非幺正-近似幺正变换电路制备：将含时非幺正演化以近似方法至映射含时幺正演化以使其可电路化，实现可放上当前量子计算机之电路架构。
获取一个量子系统的基态，代表着获取该量子系统最稳定的状态，在量子物理和量子化学体系基本性质研究、组合优化问题求解、制药研究等场景中具有非常重要的应用。量子计算机的一个重要应用场景就是有效地求解或者表达出量子系统的基态。虚时演化是求解量子系统基态的一种基本方法。
含时薛定谔方程为：
Figure PCTCN2022136344-appb-000006
其中H是目标量子系统的哈密顿量，ψ(t)表示目标量子系统在t时刻的量子态，i和
Figure PCTCN2022136344-appb-000007
为虚时单位。
将含时薛定谔方程中的实数时间t以虚数时间
Figure PCTCN2022136344-appb-000008
替换，并改写得到如下虚时间薛定谔方程：
Figure PCTCN2022136344-appb-000009
此时，该虚时间薛定谔方程的解为：
|ψ(τ)>＝e -Hτ|ψ(0)>
由于e -Hτ为非幺正算符，需要对其做归一化处理：
Figure PCTCN2022136344-appb-000010
|ψ(τ)>＝A(τ)e -Hτ|ψ(0)>
Figure PCTCN2022136344-appb-000011
其中，E τ表示τ时刻的本征值。
将虚时间薛定谔方程中的波函数以特征向量展开表示为：
Figure PCTCN2022136344-appb-000012
其中，E i为本征能量，E 0＜E i，E 0为基态能量，c i为展开系数。
由于E 0＜E i，当时间趋近无限时，其他本征态都会以指数速度消失，也即，随着ψ(τ)的演化，其它态会衰减的更快，最后只留下基态：
Figure PCTCN2022136344-appb-000013
因此，给定任意波函数，只要确保波函数与最低本征态交叠量c 0不为0，在时间τ时可得波函数：
Figure PCTCN2022136344-appb-000014
并由此能够反推得到初始最低本征态：
Figure PCTCN2022136344-appb-000015
由上述可知，量子虚数时间演化为当前寻找量子系统基态的有力工具，其在量子计算机上已经有多种可行的方案。以下，以量子虚数时间演化幺正近似方法和量子虚数时间演化变分近似方法为例进行说明：
(1)量子虚数时间演化幺正近似方法
为了将非幺正演化虚数时间动力学实现在量子计算机上，其中一个直观的方式为找到一组幺正算符作用在当前量子态上并保证作用后的态与虚数时间之非幺正演化算符作用后的结果相近。因此方案中，提出了一种近似的制备方法，需要先选出一组幺正算符作为基底，并从预选取的基底中利用近似的方法线性组合出一组非幺正算符来逼近其演化，以实现将其转换到量子电路上。
(2)量子虚数时间演化变分近似方法
相较于上述从预选基底构建求解线性系统之近似方法，量子虚数时间演化变分近似方法的核心思想也是找一组幺正算符来近似非幺正演化，不同的点在于此方法为预先将电路架构设计好，再将对时间演化问题转换为在参数电路上对参数演化，并借此将长电路问题转化为短电路的参数问题。
然而，上述量子虚数时间演化幺正近似方法需要选足够好的幺正基底来保证演化映射后的精准度，在每一步骤还需要额外求解线性方程组，而构建此线性方程组就算在对e -ΔτH[l]展开且仅做二阶近似的情况下仍需要量测σ μσ ν，H[l]σ μ，H[l] 2σ μ，H[l]，H[l] 2等五项观量测，随着系统增大及对精准度的要求，σ μ以及H[l]都会快速相对应的增加，因此大系统下，会面临大量测数量以及求解大型矩阵的困难，此方法也会渐渐失去可行性。此外，此方法所构建的电路深度也将随着演化长度变深。
上述量子虚数时间演化变分近似方法有预先决定的固定的电路结构，但固定的电路结构通常也面临精准度、参数数量及长度之间的取舍，电路设计的取舍也使得此方法的收敛精准度会极大地被所选定的电路架构影响，且此影响是很难预先估算的。除了精准度的影响外，假设选用较多参数来满足精准度需求，近似所需要求解的矩阵，也会提升量测数量，尤其在
Figure PCTCN2022136344-appb-000016
电路的量测方面，因为其量测数量会根据参数数量上升。此外，求解线性方程的难度也会随着因为系统变大变复杂及泡利矩阵而渐渐提高。整体而言对于大系统的适应性很大程度的根据变分电路的设计决定，目前也暂未有较为通用的变分电路的设计思路。
而本申请实施例中，通过研究量测相对简单的由单位矩阵及泡利Z矩阵组合而成的对角矩阵基底，藉由量子虚数时间控制来由此基底生成一组演化算符，并利用对角矩阵及量子控制的性质来达到相较于当前算法可以减少量测数量并减少电路深度的效果。
示意性的，请参考图1，其示出了本申请一个示例性实施例提供的电路制备架构示意图，如图1所示，基于虚时间演化函数110出发，通过量子虚数时间演化幺正近似方法能够得到近似电路120，得到的量子电路测量多且电路深；通过量子虚数时间变分近似方法能够得到 变分电路130，得到的量子电路测量多且精度差；本实施例中，通过对角控制算法使用模块判断，并选用对角模块，得到对角矩阵电路140。
在介绍本申请方法实施例之前，先对本申请方法的执行环境进行介绍说明。
本申请实施例提供的量子电路的制备方法，其可以由经典计算机(如PC)执行实现，例如通过经典计算机执行相应的计算机程序以实现该方法；也可以在经典计算机和量子计算机的混合设备环境下执行，例如由经典计算机和量子计算机配合来实现该方法。示例性地，量子计算机用于实现本申请实施例中对本征态的求解，经典计算机用于实现本申请实施例中除本征态求解问题之外的其他步骤。
在下述方法实施例中，为了便于说明，仅以各步骤的执行主体为计算机设备进行介绍说明。应当理解的是，该计算机设备可以是经典计算机，也可以包括经典计算机和量子计算机的混合执行环境，本申请实施例对此不作限定。
请参考图2，其示出了本申请一个实施例提供的量子电路的制备方法的流程图。该方法各步骤的执行主体可以是计算机设备。该方法可以包括：
步骤210，获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底。
也即，获取一组由单位矩阵及泡利Z矩阵组合而成的对角矩阵作为对角矩阵基底。
步骤220，基于对角矩阵基底和基于量子虚数时间控制的动力学演化关系，确定虚数时间对角控制的动力学演化关系。
示意性的，在虚数时间动力学表述下提出一特殊的量子动力学演化关系，并利用量子控制理论的思路来对其演化达到调控的目的，该虚数时间对角控制的动力学演化关系如下所示：
Figure PCTCN2022136344-appb-000017
其中，τ表示虚数时间，|ψ(τ)>表示虚时本征态，H d为一组由单位矩阵及泡利Z矩阵组合而成的对角矩阵，即基于所述对角矩阵基底确定的演化算符，β d(τ)表示随时间变化的实数系数，E表示本征能量，且E＝<ψ(τ)|β d(τ)H d|ψ(τ)>。此时需要设计β d(τ)来控制系统向H p最低本征态演化。
可选地，实数系数是基于李雅普诺夫函数对时间的一阶偏导要求确定的，也即，通过李雅普诺夫函数可以提供我们对于β d(τ)函数设计的思路。
首先从基于平均值的李雅普诺夫函数出发：
V(ψ(τ))＝<ψ(τ)|(H p-E 0)|ψ(τ)>
其中，E 0为H p最小本征值，H p表示原始哈密顿算符，也即，E 0为任意数值使得H p-E 0为半正定矩阵。通过李雅普诺夫函数对时间的一阶偏导可得：
Figure PCTCN2022136344-appb-000018
由于β d(τ)需要保证
Figure PCTCN2022136344-appb-000019
成立，在一些实施例中，β d(τ)如下：
β d(τ)＝(<ψ(τ)||{H d,H p}||ψ(τ)>-2<H d><H p>)
从而确保β d(0)＝0且
Figure PCTCN2022136344-appb-000020
步骤230，基于虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路。
可选地，通过量子序数时间演化幺正近似方法，对虚数时间对角控制的动力学演化关系进行幺正转换，得到虚数时间对角控制的量子电路。
步骤240，基于变分量子近似算法确定第二量子电路。
可选地，通过量子虚数时间演化变分近似算法确定第二量子电路。
值得注意的是，上述步骤220至步骤230与上述步骤240为并列步骤，可以先执行步骤220至步骤230，也可以先执行步骤240，还可以同时执行步骤220至步骤230和步骤240。
步骤250，将第一量子电路和第二量子电路的周期交替电路作为制备得到的量子电路。
可选地，将第一量子电路和第二量子电路以预设虚时间步长为循环周期的交替电路，作为制备得到的量子电路。
由于虚数时间对角控制的量子电路存在一定的局限性，其一是在H d的本征态为平衡态时会影响收敛，其二是起始态必需分布均匀，即为其向量上所有位置皆有数值，单纯的对角矩阵演化才能将其演化到空间上所有的位置，其三是为了组合出所有对角矩阵的组合，我们需要使用全部单位矩阵及泡利Z矩阵的组合，而此组合总共有2 n项，因此在大系统计算时，就算不量测很多次，仍然有在经典计算机上做后处理转换的计算需求，对整体收敛依然有相当的负担。
故，本申请实施例中，利用原本的虚数时间演化搭配对角控制方法的交替结构，利用较少的对角控制项，在其可控制区间替换原本的虚数时间演化来达到减少量测数量的电路制备，且实验下发现其能借用虚数时间控制的优势在更少的演化下达到更好的精准度，如果将虚数时间演化的区块用变分量子近似算法来构建，由于相较原本纯粹变分量子近似幺正算法所需要的演化的态更少，也能因此使用更简单的电路结构例如更少的参数及更浅的电路深度。
示意性的，请参考图3，其示出了本申请一个示例性实施例提供的交替结构电路的示意图，如图3所示，电路310为量子幺正近似算法所构建的演化电路；电路320为变分电路321和对角控制电路322的交替循环电路结构。且交替中，每次变分电路321和对角控制电路322对应预设的虚数时间步长Δτ。显然，如图3所示出的电路310和电路320，与电路310相比，在虚数时间步长Δτ相同的基础上，每个虚数时间步长Δτ中，量子门分布的电路长度更短，量子门数量更少，也即，电路320利用更短的电路架构来实现相同的演化的同时，也降低变分电路所要求之参数数量及测量要求。
综上所述，本实施例提供的方法，通过适用于量子虚数时间演化过程的量子对角控制方法，利用控制方法减少量测数量并加速量子虚数时间演化，且变分电路与对角控制电路交替循环的电路结构，与量子幺正近似算法构建得到的演化电路相比，利用更短的电路架构来实现相同的演化。另外，量子幺正近似算法需要找到一组幺正算符作用在量子态上，并保证作用后的态与虚数时间之非幺正演化算符作用后的结果非常相近，故先选出一组幺正算符作为基底，并从预选取的基底中利用近似的方法线性组合出一组幺正算符来逼近其演化，但幺正算符的选取是无法预估效果的随机选取，故在选取幺正基底后，当幺正基底的组合表现较弱的情况下，会影响演化映射后的精准度。此外，量子幺正近似算法在每一步骤还需要额外求解线性方程组，而构建此线性方程组就算在对e -ΔτH[l]展开且仅做二阶近似的情况下仍需要量测σ μσ ν，H[l]σ μ，H[l] 2σ μ，H[l]，H[l] 2等五项观量测，随着系统增大及对精准度的要求，σ μ以及H[l]都会快速相对应的增加，因此大系统下，会面临大量测数量以及求解大型矩阵的困难，而本实施例中，变分电路与对角控制电路交替循环的电路结构，利用原本的虚数时间演化搭配对角控制方法的交替结构，利用较少的对角控制项，在其可控制区间替换原本的虚数时间演化来达到减少量测数量的电路制备，其中在泡利Z测量下由单位矩阵及泡利Z矩阵组合成的矩阵H d以及与其作用的H dH p,H dσ μ项相较于原始的H dσ μ及σ μ都仅会增加少量的量测数量，因此在本申请实施例中，量测数量主要的贡献仅由σ μσ v，H p，σ μ 决定，从五项变为主要的三项测量，降低了变分电路所要求之参数数量及测量要求。
在一个可选的实施例中，第一量子电路是对虚数时间对角控制的动力学演化关系进行幺正转换得到的。图4是本申请另一个示例性实施例提供的量子电路的制备方法的流程图，如图4所示，该方法包括：
步骤410，获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底。
也即，获取一组由单位矩阵及泡利Z矩阵组合而成的对角矩阵作为对角矩阵基底。
步骤420，基于对角矩阵基底和基于量子虚数时间控制的动力学演化关系，确定虚数时间对角控制的动力学演化关系。
示意性的，在虚数时间动力学表述下提出一特殊的量子动力学演化关系，并利用量子控制理论的思路来对其演化达到调控的目的，该虚数时间对角控制的动力学演化关系如下所示：
Figure PCTCN2022136344-appb-000021
其中，τ表示虚数时间，|ψ(τ)>表示虚时本征态，H d为一组由单位矩阵及泡利Z矩阵组合而成的对角矩阵，即基于所述对角矩阵基底确定的演化算符，β d(τ)表示随时间变化的实数系数，E表示本征能量，且E＝<ψ(τ)|β d(τ)H d|ψ(τ)>。此时需要设计β d(τ)来控制系统演化向H p最低本征态。
步骤430，通过量子虚数时间演化幺正近似方法，对虚数时间对角控制的动力学演化关系进行幺正转换，得到虚数时间对角控制的第一量子电路。
可选地，将虚数时间对角控制的动力学演化关系转换为候选量子电路；通过量子虚数时间演化幺正近似方法对候选量子电路进行幺正转换，得到虚数时间对角控制的第一量子电路。
示意性的，请参考图5，其示出了本申请一个示例性实施例提供的第一量子电路的获取过程示意图，如图5所示，首先预选取幺正基底510，并基于幺正基底转换为电路形式520，对该电路结构通过量子虚时幺正近似算法进行转换，得到幺正近似电路模块530。
也即，藉由上述量子虚数时间演化变分近似方法，对上述虚数时间对角控制的动力学演化关系进行幺正转换，如下公式所示：
A[l]x[l]＝b[l]
Figure PCTCN2022136344-appb-000022
Figure PCTCN2022136344-appb-000023
其中{σ μ}为预选取基底，x[l] μ为其线性组合展开对应之系数，c[l]为归一化系数，目标为藉由求解线性方程来找x[l] μ的数值。首先，先确定
Figure PCTCN2022136344-appb-000024
的二阶近似，先将其作泰勒公式并展开至二阶项:
Figure PCTCN2022136344-appb-000025
由于每一个H d都是单纯的一个由单位矩阵及泡利Z矩阵的组合成的矩阵
Figure PCTCN2022136344-appb-000026
因此我们可以将上述的公式再改写为：
Figure PCTCN2022136344-appb-000027
此外，由于
Figure PCTCN2022136344-appb-000028
为正值，因此对于基于控制理论的
Figure PCTCN2022136344-appb-000029
演化项，不考虑
Figure PCTCN2022136344-appb-000030
项不 会影响
Figure PCTCN2022136344-appb-000031
的结论，所以可以忽略不考虑并重新改写b[l] μ为：
Figure PCTCN2022136344-appb-000032
如图6所示，量测由原本幺正近似610对应的σ μσ v，H pσ μ，
Figure PCTCN2022136344-appb-000033
H p，
Figure PCTCN2022136344-appb-000034
等五项观量测变为σ μσ v，H dσ μ，σ μ(幺正近似用)以及H p，H d，H dH p(控制用)，其中在泡利Z测量下由单位矩阵及泡利Z矩阵的组合成的矩阵H d以及与其作用的H dH p,H dσ μ项相较于原始的H dσ μ及σ μ都仅会增加少量的量测数量，因此在本申请实施例中，量测数量主要的贡献仅由σ μσ v，H p，σ μ决定。从五项变为主要的三项测量之外，更少了相对需要最多观察量的H dσ μ，
Figure PCTCN2022136344-appb-000035
三项并只多了相对较少量测的H dH p，H dσ μ及σ μ项。
步骤440，基于变分量子近似算法确定第二量子电路。
可选地，通过量子虚数时间演化变分近似算法确定第二量子电路。
也即，预先将电路架构设计好后，确定一组幺正算符近似非幺正演化，再将对时间演化问题转换为在参数电路上对参数演化，得到第二量子电路。
步骤450，将第一量子电路和第二量子电路的周期交替电路作为制备得到的量子电路。
可选地，将第一量子电路和第二量子电路以预设虚时间步长为循环周期的交替电路，作为制备得到的量子电路。
综上所述，本实施例提供的方法，通过适用于量子虚数时间演化过程的量子对角控制方法，利用控制方法减少量测数量并加速量子虚数时间演化，且变分电路与对角控制电路交替循环的电路结构，利用更短的电路架构来实现相同的演化的同时，也降低了变分电路所要求之参数数量及测量要求。
本实施例提供的方法，(1)在数值模拟上证明其在配合虚数时间演化的情况下能收敛的比单纯虚数时间演化方法快速，依此来达到较浅电路深度的目标；(2)利用对角矩阵及Z量测的性质减少对每一步骤中的e -ΔτH[l]及虚数时间量子控制的量测数量；(3)非变分的设计思路提供其较好的收敛路径，相较之下经典变分方法可能出现收敛困难，尤其是随电路加深会出现的平坦高原问题，如图7所示，其示出了本申请一个示例性实施例提供的平坦高原示意图。如图7所示，随着电路深度710增加，平台高原问题更明显。
本申请实施例提供的量子电路的制备方法至少包括如下有益效果：
1、降低电路更新时的量测数量
在量子幺正近似策略下，量测数量为σ μσ v，H pσ μ，
Figure PCTCN2022136344-appb-000036
H p，
Figure PCTCN2022136344-appb-000037
等五项观量测，用符号N p，N μ来表示σ μ，H p的量测数量并且不做观量测简化的假设，则五项观量测的量测数量可表示为N p，
Figure PCTCN2022136344-appb-000038
N pN μ。在总步数为S QITE的情况下，总观量测可表示为：
Figure PCTCN2022136344-appb-000039
在对角控制的协助下，量测数量转为两个不同的模块，一项为原本的五个幺正近似策略观量测，另一项为σ μσ v，H dσ μ，σ μ(幺正近似用)以及H p，H d，H dH p(控制用)，六项观量测的量测数量可表示为
Figure PCTCN2022136344-appb-000040
N μ，N dN μ，N p，N d，N dN p，N pN d因此步数为S QCITE及S QC的状况下，总观量测可表示为:
Figure PCTCN2022136344-appb-000041
其中N d在Z量测下没有额外量测，N dN p和N pN d两者的量测数量相等，N p及N μ皆包含于N pN d，
Figure PCTCN2022136344-appb-000042
的测量中，因此最终可简化为:
Figure PCTCN2022136344-appb-000043
两种方法的总收敛数量比较可表示为：
Figure PCTCN2022136344-appb-000044
因此总体减少量测数量约正比于控制方法所减少的量子幺正近似收敛步长。
2、降低收敛所需要的总步数量
利用量子虚数时间控制，在实验测试上能有效地减少收敛步长，因为其会调整原本系统之能量差值，使得虚数时间演化能用更快的速度收敛到基态，如图8所示，氢分子在虚数时间控制辅助下能谱随虚数时间的变化如能阶变化线形图810和线形图820所示，当激发态能量与基态能量相差越大，收敛速度就会越快。
如图9所示，由于量子虚数时间控制加速之性质，我们可以用更少的步数到达相同的精准度，线条图910中利用3SAT系统，演示总体控制算法能减少的步数随能量系统的变化。
如图10所示，其示出了对角控制算法与原虚数时间演化算法的收敛比较线条图1010，显然，对角控制算法+虚数时间演化算法的收敛速度明显快于原虚数时间演化算法的收敛速度。
此架构下量子虚数时间控制的加速性质依然可以体现出来，收敛电路由原本的58层量子虚数时间演化电路减少到8层量子虚数时间演化加上8层对角控制电路。整体量测数量约为原本的8/58且电路深度也减为16层。达到以较少收敛时间，较短电路，较少量测数量的方式收敛到目标精准度的结果。
3、相较于原本虚数时间方法降低电路复杂度
在上述架构中的对角电路部分还可以在仅使用一个辅助比特配合后选取下用更短的电路架构实现，如图11示出的3比特对角矩阵电路1110。如图11所示，该对角矩阵电路1110利用后选择方法搭配控制门(Control gate)，X门(X gate)，将
Figure PCTCN2022136344-appb-000045
矩阵中的出现
Figure PCTCN2022136344-appb-000046
給放到对角矩阵diag(…)上的特定元，得到
Figure PCTCN2022136344-appb-000047
如上辅助比特对角矩阵电路1110有8个对角元，因此需要8个Ry门1111来一一调整，实现非幺正演化。
本申请实施例中，还根据选取的单位矩阵和泡利Z矩阵组合进一步将电路缩减到更短的固定长度，如，在单位矩阵及泡利Z矩阵组合架构下有一半的對角元被泡利Z矩阵调整，而剩余一半不变，例如两个单位矩阵和一个泡利Z矩阵组合得到的IIZ组合矩阵，只对第三比特为1的元即(001，011，101，111)4项作用，其电路可由上图11所示出的对角矩阵电路1110简化为如图12所示的电路1210。图12所示出的电路1210中，泡利Z矩阵对第三比特为1的对角元进行调整，而其余对角元不受影响。
且由于控制算符彼此间皆可交换，因此连续多步的控制电路可简化为单步的控制电路并用更短的类似图12之电路架构组合在量子计算机上实现。如图13所示出的电路1310，其示出了连续两层的电路利用交换简化为单层控制电路1310。其中，两层电路实现为：
Figure PCTCN2022136344-appb-000048
而简化后的单层控制电路1310逻辑如下：
Figure PCTCN2022136344-appb-000049
而在量子幺正近似电路的部分可以用变分电路来缩短电路深度，如图14示出的变分电路1410，相较于原本的幺正近似电路方法，虽然变分电路的选择会大程度的影响收敛难度，电路长度及精准度，但是配合对角控制电路便可以减少电路设计上的要求并保留其短电路的结构优势。在一些实施例中，首先获取变分电路1410，该变分电路1410包括待训练的电路参数，如：变分电路1410中的量子门参数等，获取预设损失函数，该预设损失函数用于定义该变分电路的电路参数的期望值；基于变分电路1410的量子操作结果和预设损失函数，确定该变分电路1410的损失值；基于损失值对变分电路1410进行训练，得到所述第二量子电路。
值得注意的是，在一些实施例中，实时间控制也可以用类似的方法并且由于其为幺正演化，在电路选择上还有更直观的非近似的电路制备方式。
图15是本申请一个示例性实施例提供的量子电路的制备装置的结构框图，如图15所示，该装置包括：
获取模块1510，用于获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底；
确定模块1520，用于基于量子虚数时间控制的动力学演化关系和所述对角矩阵基底，确定虚数时间对角控制的动力学演化关系；
所述确定模块1520，还用于基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路；
所述确定模块1520，还用于基于变分量子近似算法确定第二量子电路；
所述确定模块1520，还用于将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路。
在一个可选的实施例中，如图16所示，该确定模块1520，包括：
转换单元1521，用于通过虚数时间演化幺正近似装置，对所述虚数时间对角控制的动力学演化关系进行幺正转换，得到所述第一量子电路。
在一个可选的实施例中，所述转换单元1521，还用于将所述虚数时间对角控制的动力学演化关系转换为候选量子电路；通过所述量子虚数时间演化幺正近似装置对所述候选量子电路进行幺正转换，得到虚数时间对角控制的所述第一量子电路。
在一个可选的实施例中，所述虚数时间对角控制的动力学演化关系如下：
Figure PCTCN2022136344-appb-000050
其中，τ表示虚数时间，|ψ(τ)>表示虚时本征态，H d表示基于所述对角矩阵基底确定的演化算符，β d(τ)表示随时间变化的实数系数，E表示本征能量。
在一个可选的实施例中，所述实数系数是基于李雅普诺夫函数对时间的一阶偏导要求确定的。
在一个可选的实施例中，所述李雅普诺夫函数对时间的一阶偏导要求如下：
Figure PCTCN2022136344-appb-000051
其中，E 0为H p最小本征值。
在一个可选的实施例中，所述实数系数如下：
β d(τ)＝(<ψ(τ)||{H d,H p}||ψ(τ)>-2<H d><H p>)
在一个可选的实施例中，所述确定模块1520，还用于将所述第一量子电路和所述第二量子电路以预设虚时间步长为循环周期交替设置，得到所述量子电路。
综上所述，本实施例提供的装置，通过适用于量子虚数时间演化过程的量子对角控制方法，利用控制方法减少量测数量并加速量子虚数时间演化，且变分电路与对角控制电路交替循环的电路结构，利用更短的电路架构来实现相同的演化的同时，也降低了变分电路所要求之参数数量及测量要求。
需要说明的是：上述实施例提供的量子电路的制备装置，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将设备的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。另外，上述实施例提供的量子电路的制备装置与量子电路的制备方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
请参考图17，其示出了本申请一个实施例提供的计算机设备1700的结构框图。该计算机设备1700可以是经典计算机。该计算机设备可用于实施上述实施例中提供的量子电路的制备方法。具体来讲：
该计算机设备1700包括中央处理单元(如CPU(Central Processing Unit，中央处理器)、GPU(Graphics Processing Unit，图形处理器)和FPGA(Field Programmable Gate Array，现场可编程逻辑门阵列)等)1701、包括RAM(Random-Access Memory，随机存储器)1702和ROM(Read-Only Memory，只读存储器)1703的系统存储器1704，以及连接系统存储器1704和中央处理单元1701的系统总线1705。该计算机设备1700还包括帮助服务器内的各个器件之间传输信息的基本输入/输出系统(Input Output System，I/O系统)1706，和用于存储操作系统1713、应用程序1714和其他程序模块1715的大容量存储设备1707。
可选地，该基本输入/输出系统1706包括有用于显示信息的显示器1708和用于用户输入信息的诸如鼠标、键盘之类的输入设备1709。其中，该显示器1708和输入设备1709都通过连接到系统总线1705的输入输出控制器1710连接到中央处理单元1701。该基本输入/输出系统1706还可以包括输入输出控制器1710以用于接收和处理来自键盘、鼠标、或电子触控笔等多个其他设备的输入。类似地，输入输出控制器1710还提供输出到显示屏、打印机或其他类型的输出设备。
可选地，该大容量存储设备1707通过连接到系统总线1705的大容量存储控制器(未示出)连接到中央处理单元1701。该大容量存储设备1707及其相关联的计算机可读介质为计算机设备1700提供非易失性存储。也就是说，该大容量存储设备1707可以包括诸如硬盘或者CD-ROM(Compact Disc Read-Only Memory，只读光盘)驱动器之类的计算机可读介质(未示出)。
根据本申请实施例，该计算机设备1700还可以通过诸如因特网等网络连接到网络上的远程计算机运行。也即计算机设备1700可以通过连接在该系统总线1705上的网络接口单元1711连接到网络1712，或者说，也可以使用网络接口单元1711来连接到其他类型的网络或远程计算机系统(未示出)。
本领域技术人员可以理解，图17中示出的结构并不构成对计算机设备1700的限定，可以包括比图示更多或更少的组件，或者组合某些组件，或者采用不同的组件布置。
在示例性实施例中，还提供了一种计算机可读存储介质，所述存储介质中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或所述指令集在被处理器执行时以实现上述量子电路的制备方法。
在示例性实施例中，还提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。计算机设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该计算机设备执行上述量子电路的制备方法。

Claims (13)

  1. 一种量子电路的制备方法，由计算机设备执行，所述方法包括：
    获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底；
    基于量子虚数时间控制的动力学演化关系和所述对角矩阵基底，确定虚数时间对角控制的动力学演化关系；
    基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路；
    基于变分量子近似算法确定第二量子电路；
    将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路。
  2. 根据权利要求1所述的方法，其中，所述基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的所述第一量子电路，包括：
    通过虚数时间演化幺正近似方法，对所述虚数时间对角控制的动力学演化关系进行幺正转换，得到虚数时间对角控制的所述第一量子电路。
  3. 根据权利要求2所述的方法，其中，所述通过虚数时间演化幺正近似方法，对所述虚数时间对角控制的动力学演化关系进行幺正转换，得到虚数时间对角控制的所述第一量子电路，包括：
    将所述虚数时间对角控制的动力学演化关系转换为候选量子电路；
    通过所述虚数时间演化幺正近似方法对所述候选量子电路进行幺正转换，得到所述第一量子电路。
  4. 根据权利要求1所述的方法，其中，所述虚数时间对角控制的动力学演化关系如下：
    Figure PCTCN2022136344-appb-100001
    其中，τ表示虚数时间，|ψ(τ)>表示虚时本征态，H d表示基于所述对角矩阵基底确定的演化算符，β d(τ)表示随时间变化的实数系数，E表示本征能量。
  5. 根据权利要求4所述的方法，其中，
    所述实数系数是基于李雅普诺夫函数对时间的一阶偏导要求确定的。
  6. 根据权利要求5所述的方法，其中，所述李雅普诺夫函数对时间的一阶偏导要求如下：
    Figure PCTCN2022136344-appb-100002
    其中，E 0为H p最小本征值，H p表示原始哈密顿算符。
  7. 根据权利要求6所述的方法，其中，所述实数系数如下：
    β d(τ)＝(<ψ(τ)||{H d,H p}||ψ(τ)>-2<H d><H p>)。
  8. 根据权利要求1至7任一所述的方法，其特征在于，所述基于变分量子近似算法确定第二量子电路，包括：
    获取候选量子电路，所述候选量子电路包括待训练的电路参数；
    获取预设损失函数，所述预设损失函数用于定义所述候选量子电路的电路参数的期望值；
    基于所述候选量子电路的量子操作结果和所述预设损失函数，确定所述候选量子电路的损失值；
    基于所述损失值对所述候选量子电路进行训练，得到所述第二量子电路。
  9. 根据权利要求1至7任一所述的方法，其中，所述将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路，包括：
    将所述第一量子电路和所述第二量子电路以预设虚时间步长为循环周期交替设置，得到所述量子电路。
  10. 一种量子电路的制备装置，所述装置包括：
    获取模块，用于获取单位矩阵及泡利Z矩阵的组合作为对角矩阵基底；
    确定模块，用于基于量子虚数时间控制的动力学演化关系和所述对角矩阵基底，确定虚数时间对角控制的动力学演化关系；
    所述确定模块，还用于基于所述虚数时间对角控制的动力学演化关系确定虚数时间对角控制的第一量子电路；
    所述确定模块，还用于基于变分量子近似算法确定第二量子电路；
    所述确定模块，还用于将所述第一量子电路和所述第二量子电路的周期交替电路作为制备得到的所述量子电路。
  11. 一种计算机设备，所述计算机设备包括处理器和存储器，所述存储器中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或指令集由所述处理器加载并执行以实现如权利要求1至9任一项所述的量子电路的制备方法。
  12. 一种计算机可读存储介质，所述存储介质中存储有至少一条指令、至少一段程序、代码集或指令集，所述至少一条指令、所述至少一段程序、所述代码集或指令集由处理器加载并执行以实现如权利要求1至9任一项所述的量子电路的制备方法。
  13. 一种计算机程序产品或计算机程序，所述计算机程序产品或计算机程序包括计算机指令，所述计算机指令存储在计算机可读存储介质中，处理器从所述计算机可读存储介质读取并执行所述计算机指令，以实现如权利要求1至9任一项所述的量子电路的制备方法。
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