WO2023137656A1 - 驱动ic及显示装置 - Google Patents

驱动ic及显示装置 Download PDF

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Publication number
WO2023137656A1
WO2023137656A1 PCT/CN2022/072903 CN2022072903W WO2023137656A1 WO 2023137656 A1 WO2023137656 A1 WO 2023137656A1 CN 2022072903 W CN2022072903 W CN 2022072903W WO 2023137656 A1 WO2023137656 A1 WO 2023137656A1
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WIPO (PCT)
Prior art keywords
pad area
pad
area
signal pad
goa
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PCT/CN2022/072903
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English (en)
French (fr)
Inventor
李华桃
张志广
王中杰
赵攀
蒋志亮
于子阳
王世龙
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280000029.2A priority Critical patent/CN116830028A/zh
Priority to PCT/CN2022/072903 priority patent/WO2023137656A1/zh
Publication of WO2023137656A1 publication Critical patent/WO2023137656A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

Definitions

  • the present disclosure relates to the field of display technology, in particular to a driving IC and a display device.
  • foldable mobile phones Due to the gradual maturity of flexible organic light-emitting diode (OLED) screen technology, foldable mobile phones have become a popular form of mobile phones in the future. Foldable mobile phones can reduce the screen area in the folded state, which is convenient for users to carry; and after unfolding, it can become a communication device the size of a tablet computer, and users can obtain a better visual experience; folding screens are generally about 8-10 inches, which is obviously larger than ordinary mobile phones. Support, if it is made into a foldable single IC, it can have the advantage of reducing costs, but the current bonding process of foldable single IC is very difficult. Under the extreme process conditions, we must not only ensure the yield and cost, but also want to make a driver IC that can support high resolution. We need to continue to try and innovate.
  • OLED organic light-emitting diode
  • An embodiment of the present disclosure provides a driver IC and a display device, and the specific solutions are as follows:
  • a driver IC provided by an embodiment of the present disclosure includes at least one GOA pad area, each of the GOA pad areas includes multiple rows and multiple columns of first pads, and each column of the first pads is divided into at least two first pad groups that are independently arranged, each of the first pad groups includes at least two adjacent first pads, and the first pads of each of the first pad groups are electrically connected;
  • It also includes a plurality of leads electrically connected to each of the first pad groups, and each of the first pad groups is electrically connected to a different lead.
  • the above-mentioned driver IC provided by the embodiment of the present disclosure includes: a ground signal pad area, an output signal pad area and an input signal pad area located on the periphery of the ground signal pad area and arranged oppositely, and a first pad area and a second pad area located on the periphery of the ground signal pad area and arranged oppositely;
  • the drive IC includes a first side and a second side opposite to each other and a third side and a fourth side opposite to each other, the third side and the fourth side are respectively adjacent to the first side and the second side;
  • the output signal pad area corresponds to the first side
  • the input signal pad area corresponds to the second side
  • the first pad area corresponds to the third side
  • the second pad area corresponds to the fourth side
  • the GOA pad area is located at an edge area of the output signal pad area.
  • the output signal pad area further includes a data signal pad area, and the number of the GOA pad areas is two;
  • the two GOA pad areas are respectively located at two ends of the data signal pad area.
  • the two GOA pad areas are arranged symmetrically with respect to the data signal pad area.
  • the leads electrically connected to each of the first pad groups far away from the input signal pad area are directly led out from the top of the first pad group.
  • the leads electrically connected to each of the first pad groups close to the input signal pad area are led out from the bottom end of the first pad group along the gap between two adjacent columns of the first pads.
  • the leads electrically connected to each of the first pad groups close to the input signal pad area are drawn from the bottom end of the first pad group along the gap of the first pad area;
  • the leads electrically connected to each of the first pad groups close to the input signal pad area are drawn out from the bottom of the first pad group along the gap in the second pad area.
  • a part of the first pad group close to the input signal pad area is electrically connected to the lead from the bottom of the first pad group along the gap between two adjacent columns of the first pads, and another part of the input signal pad area is close to the input signal pad area.
  • the lead connected to the first pad group is drawn from the bottom end of the first pad group along the gap of the first pad area;
  • the wires electrically connected to a part of the first pad group close to the input signal pad area are drawn out from the bottom end of the first pad group along the gap between two adjacent columns of the first pads, and the wires electrically connected to the first pad group near the other part of the input signal pad area are drawn out from the bottom end of the first pad group along the gap in the second pad area.
  • the above-mentioned driver IC provided by the embodiment of the present disclosure includes: a ground signal pad area, an output signal pad area and an input signal pad area located on the periphery of the ground signal pad area and arranged oppositely, and a first pad area and a second pad area located on the periphery of the ground signal pad area and arranged oppositely;
  • the drive IC includes a first side and a second side opposite to each other and a third side and a fourth side opposite to each other, the third side and the fourth side are respectively adjacent to the first side and the second side;
  • the output signal pad area corresponds to the first side
  • the input signal pad area corresponds to the second side
  • the first pad area corresponds to the third side
  • the second pad area corresponds to the fourth side
  • the GOA pad area is located on one side of the edge of the input signal pad area.
  • the number of the GOA pad areas is two, and the two GOA pad areas are respectively located at both ends of the input signal pad area.
  • the two GOA pad areas are arranged symmetrically with respect to the input signal pad area.
  • the above-mentioned driver IC provided by the embodiment of the present disclosure further includes a first initialization signal pad area and a second initialization signal pad area, the first initialization signal pad area and the second initialization signal pad area are respectively located between the input signal pad area and the corresponding GOA pad area.
  • the above driver IC provided by the embodiment of the present disclosure further includes a first initialization signal pad area and a second initialization signal pad area, the first pad area is multiplexed as the first initialization signal pad area, and the second pad area is multiplexed as the second initialization signal pad area.
  • each of the first initialization signal pad area and the second initialization signal pad area includes a plurality of second pad groups, each of the second pad groups includes at least two adjacent second pads, and the second pads of each of the second pad groups are electrically connected.
  • the above-mentioned driver IC provided by the embodiment of the present disclosure further includes a first initialization signal pad area and a second initialization signal pad area, the first initialization signal pad area and the second initialization signal pad area are respectively located at both ends of the input signal pad area.
  • an embodiment of the present disclosure further provides a display device, including a display panel and the above-mentioned driver IC provided by the embodiments of the present disclosure, the display panel includes a display area and a peripheral area arranged around the display area, and the driver IC is bound to the peripheral area.
  • FIG. 1 is a schematic structural diagram of a driver IC provided in the related art
  • FIG. 2 is a schematic structural diagram of a driver IC provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of another driver IC provided in the related art.
  • FIG. 5 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 7 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of another driving IC provided by an embodiment of the present disclosure.
  • FIG. 12 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram of a driver IC in the related art.
  • the output signal pad area 2 includes: the data signal pad area 21, the GOA pad area (GOA1 and GOA2 representation) positioned at the two sides of the data signal pad area 21, and the first initialization signal pad area 4 " and the second initialization signal pad area 5 " between the GOA pad area and the data signal pad area 21;
  • the input signal pad area 3 is used for electrical connection with FPC (flexible circuit board);
  • the first floating pad area 4 and The second floating pad area 5 is used to support when the driver IC is bound to the display panel, and the first floating pad area 4 and the second floating pad area 5 are Dummy pad areas without wiring inside.
  • a driver IC is used to drive foldable products to reduce costs, it is necessary to ensure that the number of pads in the GOA pad area (GOA1 and GOA2), the first initialization signal pad area 4" and the second initialization signal pad area 5" remains unchanged, and a driver IC that can increase the number of data signal pads, that is, to design a foldable single driver IC that can support high resolution and low cost is an urgent problem for those skilled in the art.
  • an embodiment of the present disclosure provides a driver IC, as shown in FIG. 2 and FIG. 3 , including at least one GOA pad area (take two as an example, represented by GOA1 and GOA2 respectively), each GOA pad area (GOA1 and GOA2) includes multiple rows and columns of first pads 10 (take 5 rows and 3 columns as an example), and each column of first pads 10 is divided into at least two first pad groups A1 that are independently arranged (take each column of first pads 10 is divided into two first pads that are independently set) Group A1 as an example), each first pad group A1 includes at least two adjacent first pads 10 (taking a part of the first pad group A1 including adjacent two first pads 10, and a part of the first pad group A1 including adjacent three first pads 10 as an example), each first pad 10 of each first pad group A1 is electrically connected;
  • each first pad group A1 in the embodiment of the present disclosure corresponds to correspondingly output a GOA signal (such as a trigger signal, a clock signal, etc.).
  • each GOA signal in the embodiment of the present disclosure is formed by electrically connecting at least two first pads 10 to ensure that the driving IC has sufficient driving force.
  • the driver IC provided by the embodiments of the present disclosure is used to provide electrical signals to the foldable display panel.
  • the display panel generally includes a display area and a peripheral area.
  • the display area includes gate lines, data lines, etc., and the driver IC is bound to the peripheral area.
  • the peripheral area includes a gate drive circuit (GOA), etc., and the GOA circuit generally includes a plurality of gate signal output terminals.
  • the gate scan signal output by the GOA circuit needs to be realized by the cooperation of the initial trigger signal, clock signal, etc.
  • the first pad group A1 in the GOA pad area provided by the embodiment of the present disclosure may be pads (pads) for providing initial trigger signals, clock signals, etc. to the GOA circuit, and these pads are correspondingly bound to the pads on the display panel that are used to provide initial trigger signals, clock signals, etc. for the GOA circuit.
  • each GOA pad area (GOA1 and GOA2) in the related art generally includes 20 independently arranged first pad groups A1 (in Figure 1, GOA1 and GOA2 each include 6 independently provided first pad groups A1 as an example), and each first pad group A1 is formed by electrically connecting all the first pads 10 in the same column (take the first pad 10 including 5 electrical connections in the same column as an example), so GOA1 and GOA2 each occupy 100 (20 ⁇ 5)
  • the above-mentioned drive IC provided by the embodiment of the present disclosure divides each column of first pads 10 into at least two first pad groups A1 that are set independently of each other.
  • the number of the first pads 10 can reduce the occupied space of the GOA pad area (GOA1 and GOA2), which can increase the space for making data signal pads (when the driver IC is integrated with the foldable product, the data signal pad is used to electrically connect with the data line of the foldable product), thereby increasing the number of data signal pads.
  • the driver IC is integrated with a large-sized foldable product, it is possible to realize a high-resolution foldable product on the basis of a single drive IC.
  • driver IC in the above-mentioned driver IC provided by the embodiment of the present disclosure, as shown in FIG. 2 , it includes: a ground signal pad area 1, an output signal pad area 2 and an input signal pad area 3 located at the periphery of the ground signal pad area 1 and oppositely arranged, and a first pad area 4' and a second pad area 5' located at the periphery of the ground signal pad area 1 and arranged oppositely; the first pad area 4' is equivalent to the first floating pad area 4 in Figure 1, and the second pad area 5' is equivalent to the second floating pad area 5 in Figure 1 ;
  • the driver IC includes a first side aa and a second side bb opposite to each other and a third side cc and a fourth side dd opposite to each other, the third side cc and the fourth side dd are respectively adjacent to the first side aa and the second side bb;
  • the output signal pad area 2 corresponds to the first side aa
  • the input signal pad area 3 corresponds to the second side bb
  • the first pad area 4' corresponds to the third side cc
  • the second pad area 5' corresponds to the fourth side dd;
  • the GOA pad areas (GOA1 and GOA2) are located at the edge area of the output signal pad area 2 .
  • the output signal pad area 2 also includes a data signal pad area 21, and the number of GOA pad areas is two (GOA1 and GOA2);
  • GOA pad areas (GOA1 and GOA2) are respectively located at two ends of the data signal pad 21 area.
  • two GOA pad areas may be arranged symmetrically with respect to the data signal pad area 21 . Since GOA1 and GOA2 in the present disclosure have fewer first pads 10 than GOA1 and GOA2 in the related art, the space occupied by GOA1 and GOA2 can be reduced, thereby increasing the manufacturing space of the data signal pad area 21, increasing the number of data signal pads, and realizing high-resolution folding products.
  • the above driver IC provided by the embodiment of the present disclosure, as shown in FIG. 3 , it also includes a first initialization signal pad area 4" and a second initialization signal pad area 5", the first pad area 4' is multiplexed as the first initialization signal pad area 4", and the second pad area 5' is multiplexed as the second initialization signal pad area 5".
  • the embodiments of the present disclosure move the first initialization signal pad area 4 ′′ and the second initialization signal pad area 5 ′′ to the first pad area 4 ′ and the second pad area 5 ′ on both sides of the ground signal pad area 1 , which can further increase the manufacturing space of the data signal pad area 21 , further increase the number of data signal pads, thereby further improving the resolution of foldable products driven by a single driver IC, thereby designing a single driver IC that can support higher resolution and is low-cost for foldable products.
  • the first initialization signal pad area 4 ′′ and the second initialization signal pad area 5 ′′ each include a plurality of second pad groups A2, each second pad group A2 includes at least two adjacent second pads 20, and the second pads 20 of each second pad group A2 are electrically connected.
  • Each second pad group A2 is used to output an initialization signal, for example, Vinit1, Vinit2, Vinit3, Vinit1', Vinit2', and Vinit3' respectively represent the corresponding initialization signals.
  • Figure 2 provided by the embodiment of the present disclosure is compared to Figure 1 in the related art to reduce the occupied space of the GOA pad area, while Figure 3 provided by the embodiment of the present disclosure further moves the first initialization signal pad area 4 "and the second initialization signal pad area 5" to the Dummy pad areas on both sides of the driver IC (the first pad area 4' and the second pad area 5'), and the Dummy pads that originally played a supporting role in the Dummy pad area can also be used to output signals.
  • the utilization rate of the entire driver IC is also improved.
  • FIG. 4 is the lead-out method of the leads L electrically connected to the first pad groups A1 in the corresponding GOA pad area (GOA1 and GOA2) in FIG.
  • each column shown in FIG. 2 and FIG. 3 includes two first pad groups A1 implementations, which cannot satisfy all the lead wires L electrically connected to the first pad group A1 and are directly pulled out from the top of the first pad group A1. Therefore, the lead-out method of the lead wires L electrically connected to each first pad group A1 in the GOA pad area poses a challenge. Therefore, in actual implementation, in the above-mentioned driver IC provided by the embodiments of the present disclosure, as shown in FIGS. 5-7 , both of which take the structure shown in FIG. 3 as an example to illustrate the layout of the leads L, and the number of first pad groups A1 shown in GOA1 and GOA2 in FIGS.
  • the leads L electrically connected to the first pad groups A1 close to the input signal pad area 3 are drawn from the bottom end of the first pad group A1 along the gap between two adjacent columns of first pads 10 .
  • the lead L electrically connected to each first pad group A1 close to the input signal pad area 3 is drawn from the bottom end of the first pad group A1 along the gap of the first pad area 4';
  • the leads L electrically connected to the first pad groups A1 close to the input signal pad area 3 are drawn from the bottom of the first pad group A1 along the gap of the second pad area 5'.
  • the leads L electrically connected to a part of the first pad group A1 (leftmost two columns) close to the input signal pad area 3 are drawn from the bottom end of the first pad group A1 along the gap between the first pads 10 of two adjacent columns, and the leads L electrically connected to another part of the first pad group (3-5 columns from the left) close to the input signal pad area 3 L is drawn from the bottom end of the first pad group A1 along the gap of the first pad area 4';
  • the leads L that are electrically connected to a part of the first pad group A1 (rightmost two columns) near the input signal pad area 3 are drawn from the bottom end of the first pad group A1 along the gap between the first pads in two adjacent columns, and the leads L that are electrically connected to another part of the first pad group A1 (3-5 columns from the right) near the input signal pad area 3 are drawn from the bottom end of the first pad group A1 along the gap between the second pad area 5 ' out of the gap.
  • the wiring method of the GOA pad area shown in FIGS. 5-7 provided by the embodiments of the present disclosure solves the problem of wiring layout in the case of reducing the number of pads in the GOA pad area.
  • the above driver IC includes: a ground signal pad area 1, an output signal pad area 2 and an input signal pad area 3 located on the periphery of the ground signal pad area 1 and oppositely arranged, and a first pad area 4' and a second pad area 5' located on the periphery of the ground signal pad area 1 and arranged oppositely; the first pad area 4' is equivalent to the first floating pad area 4 in Figure 1, and the second pad area 5' is equivalent to the second floating pad area 5 in Figure 1;
  • the driver IC includes a first side aa and a second side bb opposite to each other and a third side cc and a fourth side dd opposite to each other, the third side cc and the fourth side dd are respectively adjacent to the first side aa and the second side bb;
  • the output signal pad area 2 corresponds to the first side aa
  • the input signal pad area 3 corresponds to the second side bb
  • the first pad area 4' corresponds to the third side CC
  • the second pad area 5' corresponds to the fourth side DD;
  • the GOA pad areas are located on one side of the edge of the input signal pad area 3 .
  • the structure of the GOA pad pile region (GOA1 and GOA2) in FIG. In this way, it can also increase the space of the data signal padding area 21, increase the number of data signal pads in the data signal pads area 21, thereby increasing resolution.
  • the number of GOA pad areas (GOA1 and GOA2) is two, and the two GOA pad areas (GOA1 and GOA2) are respectively located at both ends of the input signal pad area 3.
  • two GOA pad areas may be arranged symmetrically with respect to the input signal pad area 3 .
  • two GOA pad areas are respectively located at both ends of the input signal pad area 3, and the drive IC also includes a first initialization signal pad area 4" and a second initialization signal pad area 5".
  • the first initialization signal pad area 4 ′′ is located between the input signal pad area 3 and GOA1
  • the second initialization signal pad area 5 ′′ is located between the input signal pad area 3 and GOA2 .
  • the GOA pad area (GOA1 and GOA2), the first initialization signal pad area 4" and the second initialization signal pad area 5" are all moved to both ends of the input signal pad area 3, which can further increase the space of the data signal pad area 21, and further increase the number of data signal pads in the data signal pad area 21, thereby further improving the resolution.
  • two GOA pad areas are respectively located at both ends of the input signal pad area 3, and the drive IC also includes a first initialization signal pad area 4" and a second initialization signal pad area 5".
  • the first pad area 4' is multiplexed as the first initialization signal pad area 4"
  • the second pad area 5' is multiplexed as the second initialization signal pad area 5".
  • the manufacturing space of the data signal pad area 21 can be increased, and the number of data signal pads can be further increased, thereby improving the resolution of folding products driven by a single driver IC, thereby designing a folding product that can support higher resolution and low cost.
  • a single driver IC for the product.
  • the first initialization signal pad area 4 ′′ and the second initialization signal pad area 5 ′′ each include a plurality of second pad groups A2, each second pad group A2 includes at least two adjacent second pads 20, and the second pads 20 of each second pad group A2 are electrically connected.
  • the structure of the first initialization signal pad region 4 ′′ and the second initialization signal pad region 5 ′′ shown in FIG. 9 and FIG. 10 can refer to the structure shown in FIG. 3 .
  • two GOA pad areas are respectively located at both ends of the data signal pad area 21, and the drive IC also includes a first initialization signal pad area 4" and a second initialization signal pad area 5".
  • the first initialization signal pad area 4" and the second initialization signal pad area 5" are respectively located at both ends of the input signal pad area 3.
  • the structure of the GOA pad area (GOA1 and GOA2) in FIG. 11 is the same as that in FIG. 2. In FIG.
  • the first initialization signal pad area 4" and the second initialization signal pad area 5" are moved to both ends of the input signal pad area 3, so that the space of the data signal pad area 21 can be increased, and the number of data signal pads in the data signal pad area 21 can be increased, thereby improving the resolution.
  • the embodiment of the present disclosure only illustrates three lead-out methods of the lead L corresponding to the structure shown in FIG. 3 .
  • the lead-out methods of the lead L in FIGS. 2 , 8-11 can be similar to the lead-out methods corresponding to FIG. 3 , and the layout is carried out according to the space gap during actual manufacturing.
  • an embodiment of the present disclosure further provides a display device, as shown in FIG. 12 , including a display panel 100 and the above-mentioned driver IC 200 provided by the embodiment of the present disclosure.
  • the display panel 100 includes a display area AA and a peripheral area BB arranged around the display area AA, and the driver IC 200 is bound to the peripheral area BB.
  • the display area AA includes data lines, initialization signal lines, etc.
  • the peripheral area also includes a GOA circuit.
  • the data signal pads in the data signal pad area of the driver IC are used to transmit data signals to the data lines.
  • the first pad groups in the GOA pad area are used to transmit signals to the initial trigger signal lines and clock signal lines of the GOA circuit.
  • the display device may be any product or component with a display or touch function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • the above-mentioned display panel may be a liquid crystal display panel (LCD), may also be an organic light emitting diode display panel (OLED), and of course may also be other display panels, which are not limited herein.
  • LCD liquid crystal display panel
  • OLED organic light emitting diode display panel
  • the above-mentioned display device provided by the embodiments of the present disclosure may also include other film layers well known to those skilled in the art, which will not be described in detail here.
  • An embodiment of the present disclosure provides a driver IC and a display device.
  • the occupied space of the GOA pad area can be reduced, which can increase the space for making data signal pads (when the driver IC is integrated with the foldable product, the data signal pad is used to electrically connect with the data line of the foldable product), thereby increasing the number of data signal pads.

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Abstract

一种驱动IC及显示装置，该驱动IC包括至少一个GOA焊盘区，各GOA焊盘区包括多行多列第一焊盘（10），每一列第一焊盘（10）划分为至少两个相互独立设置的第一焊盘组（A1），每一第一焊盘组（A1）包括相邻的至少两个第一焊盘（10），每一第一焊盘组（A1）的各第一焊盘（10）电连接；还包括与各第一焊盘组（A1）电连接的多条引线，且每一第一焊盘组（A1）与不同的引线电连接。

Description

驱动IC及显示装置 技术领域
本公开涉及显示技术领域，特别涉及一种驱动IC及显示装置。
背景技术
由于柔性有机发光二极管(Organic Light-Emitting Diode，OLED)屏幕技术的逐渐成熟，可折叠的手机成为未来手机的流行形态，可折叠手机在折叠状态下能缩小屏幕面积，方便用户携带；而展开后，它又能成为一个平板电脑大小的通信设备，用户可以获得更佳的视觉体验；折叠屏一般是8-10寸左右，明显比普通手机的尺寸大，若是要做成高分辨的折叠产品，我们一般需要两颗驱动芯片(IC)级联才可以支持，若是做成一颗折叠单IC，则能起到降成本的优势，但目前折叠单IC的Bonding(绑定)工艺难度大，在极限的工艺条件下，我们既要保证良率与成本又想做出能支持高分辨率的驱动IC，我们需不断地尝试与创新。
发明内容
本公开实施例提供了一种驱动IC及显示装置，具体方案如下：
本公开实施例提供的一种驱动IC，包括至少一个GOA焊盘区，各所述GOA焊盘区包括多行多列第一焊盘，每一列所述第一焊盘划分为至少两个相互独立设置的第一焊盘组，每一所述第一焊盘组包括相邻的至少两个所述第一焊盘，每一所述第一焊盘组的各所述第一焊盘电连接；
还包括与各所述第一焊盘组电连接的多条引线，且每一所述第一焊盘组与不同的所述引线电连接。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，包括：接地信号焊盘区，位于所述接地信号焊盘区外围且相对设置的输出信号焊盘 区和输入信号焊盘区，以及位于所述接地信号焊盘区外围且相对设置的第一焊盘区和第二焊盘区；
所述驱动IC包括相对设置的第一侧边和第二侧边以及相对设置的第三侧边和第四侧边，所述第三侧边和所述第四侧边分别与所述第一侧边和所述第二侧边相邻；
所述输出信号焊盘区与所述第一侧边相对应，所述输入信号焊盘区与所述第二侧边相对应，所述第一焊盘区与所述第三侧边相对应，所述第二焊盘区与所述第四侧边相对应；其中，
所述GOA焊盘区位于所述输出信号焊盘区的边缘区域。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，所述输出信号焊盘区还包括数据信号焊盘区，所述GOA焊盘区的数量为两个；
两个所述GOA焊盘区分别位于所述数据信号焊盘区的两端。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，两个所述GOA焊盘区关于所述数据信号焊盘区对称设置。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，远离所述输入信号焊盘区的各所述第一焊盘组电连接的引线直接从所述第一焊盘组的顶端引出。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊盘之间的间隙处引出。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，针对靠近所述第一焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第一焊盘区的空隙处引出；
针对靠近所述第二焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第二焊盘区的空隙处引出。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，针对靠近所述第一焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊盘之间的间隙处引出，靠近所述输入信号焊盘区的另一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第一焊盘区的空隙处引出；
针对靠近所述第二焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊盘之间的间隙处引出，靠近所述输入信号焊盘区的另一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第二焊盘区的空隙处引出。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，包括：接地信号焊盘区，位于所述接地信号焊盘区外围且相对设置的输出信号焊盘区和输入信号焊盘区，以及位于所述接地信号焊盘区外围且相对设置的第一焊盘区和第二焊盘区；
所述驱动IC包括相对设置的第一侧边和第二侧边以及相对设置的第三侧边和第四侧边，所述第三侧边和所述第四侧边分别与所述第一侧边和所述第二侧边相邻；
所述输出信号焊盘区与所述第一侧边相对应，所述输入信号焊盘区与所述第二侧边相对应，所述第一焊盘区与所述第三侧边相对应，所述第二焊盘区与所述第四侧边相对应；其中，
所述GOA焊盘区位于所述输入信号焊盘区边缘的一侧。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，所述GOA焊盘区的数量为两个，两个所述GOA焊盘区分别位于所述输入信号焊盘区的两端。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，两个所述GOA焊盘区关于所述输入信号焊盘区对称设置。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，还包 括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区分别位于所述输入信号焊盘区和对应的所述GOA焊盘区之间。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，还包括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一焊盘区复用为所述第一初始化信号焊盘区，所述第二焊盘区复用为所述第二初始化信号焊盘区。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区均包括多个第二焊盘组，每一所述第二焊盘组包括至少两个相邻的第二焊盘，每一所述第二焊盘组的各所述第二焊盘电连接。
在一种可能的实现方式中，在本公开实施例提供的上述驱动IC中，还包括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区分别位于所述输入信号焊盘区的两端。
相应地，本公开实施例还提供了一种显示装置，包括显示面板以及本公开实施例提供的上述所述的驱动IC，所述显示面板包括显示区以及围绕所述显示区设置的周边区，所述驱动IC绑定于所述周边区。
附图说明
图1为相关技术中提供的一种驱动IC的结构示意图；
图2为本公开实施例提供的一种驱动IC的结构示意图；
图3为本公开实施例提供的又一种驱动IC的结构示意图；
图4为相关技术中提供的又一种驱动IC的结构示意图；
图5为本公开实施例提供的又一种驱动IC的结构示意图；
图6为本公开实施例提供的又一种驱动IC的结构示意图；
图7为本公开实施例提供的又一种驱动IC的结构示意图；
图8为本公开实施例提供的又一种驱动IC的结构示意图；
图9为本公开实施例提供的又一种驱动IC的结构示意图；
图10为本公开实施例提供的又一种驱动IC的结构示意图；
图11为本公开实施例提供的又一种驱动IC的结构示意图；
图12为本公开实施例提供的一种显示装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“内”、“外”、“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
折叠屏的尺寸一般是8-10寸左右，明显比手机的尺寸大，若是要做成高分辨的折叠产品，我们一般需要两颗IC级联才可以支持，若是做成一颗折叠单IC，则能起到降成本的优势，如图1所示，图1为相关技术中一颗驱动IC的示意图，该驱动IC包括：接地信号焊盘区1，位于接地信号焊盘区1外围 且相对设置的输出信号焊盘区2和输入信号焊盘区3，以及位于接地信号焊盘区1外围且相对设置的第一浮接焊盘区4和第二浮接焊盘区5；输出信号焊盘区2包括：数据信号焊盘区21，位于数据信号焊盘区21两侧的GOA焊盘区(GOA1和GOA2表示)，以及位于GOA焊盘区和数据信号焊盘区21之间的第一初始化信号焊盘区4”和第二初始化信号焊盘区5”；输入信号焊盘区3用于与FPC(柔性电路板)电连接；第一浮接焊盘区4和第二浮接焊盘区5用于在驱动IC与显示面板绑定时起到支撑作用，第一浮接焊盘区4和第二浮接焊盘区5为内部无走线的Dummy焊盘区。为了提高大尺寸折叠产品的分辨率，就需要增加数据信号焊盘区21的数据信号焊盘数量，由于在单颗驱动IC尺寸一定的情况下，其中GOA焊盘区(GOA1和GOA2表示)、第一初始化信号焊盘区4”和第二初始化信号焊盘区5”的焊盘数量的限制，导致数据信号焊盘区21的数据信号焊盘的数量有限，因此不利于高分辨率折叠产品的实现。如果采用一颗驱动IC驱动折叠产品以降低成本的情况下，需要既能够保证GOA焊盘区(GOA1和GOA2表示)、第一初始化信号焊盘区4”和第二初始化信号焊盘区5”的焊盘数量不变，又能提高数据信号焊盘的数量的驱动IC，即设计出一种可支持高分辨率且低成本的折叠单驱动IC，是本领域技术人员亟需解决的问题。
有鉴于此，本公开实施例提供了一种驱动IC，如图2和图3所示，包括至少一个GOA焊盘区(以包括两个为例，分别采用GOA1和GOA2表示)，各GOA焊盘区(GOA1和GOA2)包括多行多列第一焊盘10(以5行3列为例)，每一列第一焊盘10划分为至少两个相互独立设置的第一焊盘组A1(以每一列第一焊盘10划分为两个相互独立设置的第一焊盘组A1为例)，每一第一焊盘组A1包括相邻的至少两个第一焊盘10(以其中一部分第一焊盘组A1包括相邻的两个第一焊盘10，一部分第一焊盘组A1包括相邻的三个第一焊盘10为例)，每一第一焊盘组A1的各第一焊盘10电连接；
还包括与各第一焊盘组A1电连接的多条引线，且每一第一焊盘组A1与不同的引线(未示出)电连接。即本公开实施例的每一个第一焊盘组A1相当 于对应输出一个GOA信号(例如触发信号、时钟信号等)。另外，本公开实施例的每个GOA信号采用至少两个第一焊盘10电连接构成，是为了确保驱动IC有足够的驱动力。
需要说明的是，本公开实施例提供的驱动IC用于向可折叠的显示面板提供电信号，显示面板一般包括显示区和周边区，显示区包括栅线、数据线等，驱动IC绑定于周边区，周边区包括栅极驱动电路(GOA)等，GOA电路一般包括多个栅极信号输出端，各栅极信号输出端与栅线对应电连接，用于向各栅线逐行输入栅极扫描信号。GOA电路工作输出的栅极扫描信号需要由初始触发信号、时钟信号等的配合作用实现，本公开实施例提供的GOA焊盘区的各第一焊盘组A1可以是用于向GOA电路提供初始触发信号、时钟信号等的pad(焊盘)，这些pad与显示面板上的用于向GOA电路提供初始触发信号、时钟信号等的pad对应绑定。
如图1所示，相关技术中的每个GOA焊盘区(GOA1和GOA2)一般各包括20个独立设置的第一焊盘组A1(图1以GOA1和GOA2各包括6个独立设置的第一焊盘组A1为例)，每一第一焊盘组A1是由位于同一列所有第一焊盘10电连接构成(以同一列包括5个电连接的第一焊盘10为例)，所以GOA1和GOA2各占100(20×5)个第一焊盘10；而本公开实施例提供的上述驱动IC，通过将每一列第一焊盘10划分为至少两个相互独立设置的第一焊盘组A1，由于相关技术中每一GOA焊盘区的20个第一焊盘组A1需要20列，而本公开实施例中的每一GOA焊盘区的20个第一焊盘组A1仅需要10列，可以节省100个第一焊盘10，即本公开实施例通过缩减每一GOA焊盘区对应的第一焊盘10数量，可以降低GOA焊盘区(GOA1和GOA2)的占用空间，这样可以增加制作数据信号焊盘(驱动IC与折叠产品集成时，数据信号焊盘用于与折叠产品的数据线电连接)的空间，从而增加数据信号焊盘的数量，在驱动IC与大尺寸的折叠产品集成时，可以实现在采用单颗驱动IC的基础上实现高分辨率的折叠产品。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图2所示，包 括：接地信号焊盘区1，位于接地信号焊盘区1外围且相对设置的输出信号焊盘区2和输入信号焊盘区3，以及位于接地信号焊盘区1外围且相对设置的第一焊盘区4’和第二焊盘区5’；第一焊盘区4’相当于图1中的第一浮接焊盘区4，第二焊盘区5’相当于图1中的第二浮接焊盘区5；
驱动IC包括相对设置的第一侧边aa和第二侧边bb以及相对设置的第三侧边cc和第四侧边dd，第三侧边cc和第四侧边dd分别与第一侧边aa和第二侧边bb相邻；
输出信号焊盘区2与第一侧边aa相对应，输入信号焊盘区3与第二侧边bb相对应，第一焊盘区4’与第三侧边cc相对应，第二焊盘区5’与第四侧边dd相对应；其中，
GOA焊盘区(GOA1和GOA2)位于输出信号焊盘区2的边缘区域。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图2所示，输出信号焊盘区2还包括数据信号焊盘区21，GOA焊盘区的数量为两个(GOA1和GOA2)；
两个GOA焊盘区(GOA1和GOA2)分别位于数据信号焊盘21区的两端。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图2所示，两个GOA焊盘区(GOA1和GOA2)可以关于数据信号焊盘区21对称设置。由于本公开中的GOA1和GOA2相比于相关技术中的GOA1和GOA2的第一焊盘10数量减少，因此可以降低GOA1和GOA2的占用空间，从而增加数据信号焊盘区21的制作空间，可以增加数据信号焊盘的数量，实现高分辨率的折叠产品。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图3所示，还包括第一初始化信号焊盘区4”和第二初始化信号焊盘区5”，第一焊盘区4’复用为第一初始化信号焊盘区4”，第二焊盘区5’复用为第二初始化信号焊盘区5”。即本公开实施例通过将第一初始化信号焊盘区4”和第二初始化信号焊盘区5”移至接地信号焊盘区1两侧的第一焊盘区4’和第二焊盘区5’，这样可 以进一步提高数据信号焊盘区21的制作空间，进一步提高数据信号焊盘的数量，从而进一步提高采用单颗驱动IC驱动的折叠产品的分辨率，从而设计出一种可支持更高分辨率且低成本的应用于折叠产品的单颗驱动IC。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图3所示，第一初始化信号焊盘区4”和第二初始化信号焊盘区5”均包括多个第二焊盘组A2，每一第二焊盘组A2包括至少两个相邻的第二焊盘20，每一第二焊盘组A2的各第二焊盘20电连接。每一第二焊盘组A2用于输出一初始化信号，例如Vinit1、Vinit2、Vinit3、Vinit1’、Vinit2’、Vinit3’分别代表输出对应的初始化信号。
具体地，图1和图2中的第一初始化信号焊盘区4”和第二初始化信号焊盘区5”分别位于数据信号焊盘区21和GOA焊盘区之间，第一初始化信号焊盘区4”和第二初始化信号焊盘区5”分别各包括3个独立设置的第二焊盘组A2，每一第二焊盘组A2是由两列共10个第二焊盘20电连接构成，所以第一初始化信号焊盘区4”和第二初始化信号焊盘区5”各占30(10×3)个第二焊盘20；本公开实施例提供的图2相比于相关技术中的图1是缩减GOA焊盘区的占用空间，而本公开实施例提供的图3相比于图2进一步将第一初始化信号焊盘区4”和第二初始化信号焊盘区5”移至驱动IC两侧的Dummy焊盘区(第一焊盘区4’和第二焊盘区5’)，Dummy焊盘区中原本起支撑作用的Dummy焊盘也可以用来输出信号，将整颗驱动IC的利用率也提高了，在该驱动IC与显示面板绑定时，显示面板中对应Dummy焊盘区位置处也是比较方便引线的；这样图3相比于图1将节省100+30×2＝160个焊盘占用的空间来制作数据信号焊盘，则可以提升160个分辨率，因此在不增加驱动IC成本的基础上大大提高了大尺寸折叠产品的分辨率。
如图4所示，图4为图1对应的GOA焊盘区(GOA1和GOA2)内的各第一焊盘组A1电连接的引线L的引出方式，各第一焊盘组A1电连接的引线L直接在第一焊盘组A1的顶端拉线引出即可。但是针对本公开实施例提供的图2和图3所示的每一列包括两个第一焊盘组A1的实施方式，不能满足所有 的第一焊盘组A1电连接的引线L直接在第一焊盘组A1的顶端拉线引出，因此对GOA焊盘区的各第一焊盘组A1电连接的引线L的引出方式提出了挑战。因此，在具体实施时，在本公开实施例提供的上述驱动IC中，如图5-图7所示，图5-图7均是以对图3所示的结构为例进行示意引线L的布局方式，并且图5-图7的GOA1和GOA2示意的第一焊盘组A1的数量较多，其中远离输入信号焊盘区3的各第一焊盘组A1电连接的引线L直接从第一焊盘组A1的顶端引出。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图5所示，靠近输入信号焊盘区3的各第一焊盘组A1电连接的引线L从第一焊盘组A1的底端沿相邻两列第一焊盘10之间的间隙处引出。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图6所示，针对靠近第一焊盘区4’的GOA焊盘区(GOA1)，其中靠近输入信号焊盘区3的各第一焊盘组A1电连接的引线L从第一焊盘组A1的底端沿第一焊盘区4’的空隙处引出；
针对靠近第二焊盘区5’的GOA焊盘区(GOA2)，其中靠近输入信号焊盘区3的各第一焊盘组A1电连接的引线L从第一焊盘组A1的底端沿第二焊盘区5’的空隙处引出。
需要说明的是，如图6所示，由于第一焊盘区4’与GOA1之间、第二焊盘区5’与GOA2之间存在一定的空隙，因此靠近输入信号焊盘区3的各第一焊盘组A1电连接的引线L中，其中部分引线L也可以从第一焊盘区4’与GOA1之间、第二焊盘区5’与GOA2之间引出。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图7所示，针对靠近第一焊盘区4’的GOA焊盘区(GOA1)，其中靠近输入信号焊盘区3的一部分第一焊盘组A1(最左侧两列)电连接的引线L从第一焊盘组A1的底端沿相邻两列第一焊盘10之间的间隙处引出，靠近输入信号焊盘区3的另一部分第一焊盘组(左起3-5列)电连接的引线L从第一焊盘组A1的底端沿第一焊盘区4’的空隙处引出；
针对靠近第二焊盘区5’的GOA焊盘区(GOA2)，其中靠近输入信号焊盘区3的一部分第一焊盘组A1(最右侧两列)电连接的引线L从第一焊盘组A1的底端沿相邻两列第一焊盘之间的间隙处引出，靠近输入信号焊盘区3的另一部分第一焊盘组A1(右起3-5列)电连接的引线L从第一焊盘组A1的底端沿第二焊盘区5’的空隙处引出。
本公开实施例提供的图5-图7所示的GOA焊盘区的引线方式，解决了在缩减GOA焊盘区的焊盘数量的情况下的引线布局问题。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图8所示，包括：接地信号焊盘区1，位于接地信号焊盘区1外围且相对设置的输出信号焊盘区2和输入信号焊盘区3，以及位于接地信号焊盘区1外围且相对设置的第一焊盘区4’和第二焊盘区5’；第一焊盘区4’相当于图1中的第一浮接焊盘区4，第二焊盘区5’相当于图1中的第二浮接焊盘区5；
驱动IC包括相对设置的第一侧边aa和第二侧边bb以及相对设置的第三侧边cc和第四侧边dd，第三侧边cc和第四侧边dd分别与第一侧边aa和第二侧边bb相邻；
输出信号焊盘区2与第一侧边aa相对应，输入信号焊盘区3与第二侧边bb相对应，第一焊盘区4’与第三侧边CC相对应，第二焊盘区5’与第四侧边DD相对应；其中，
GOA焊盘区(GOA1和GOA2)位于输入信号焊盘区3边缘的一侧。具体地，图8中GOA焊盘区(GOA1和GOA2)的结构与图2中的结构相同，并且第一初始化信号焊盘区4”和第二初始化信号焊盘区5”位于数据信号焊盘区21的两端，图8是将GOA焊盘区(GOA1和GOA2)移至输入信号焊盘区3边缘的一侧，这样也可以增大数据信号焊盘区21的空间，提高数据信号焊盘区21数据信号焊盘的数量，从而提高分辨率。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图8所示，GOA焊盘区(GOA1和GOA2)的数量为两个，两个GOA焊盘区(GOA1和GOA2)分别位于输入信号焊盘区3的两端。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图8所示，两个GOA焊盘区(GOA1和GOA2)可以关于输入信号焊盘区3对称设置。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图9所示，两个GOA焊盘区(GOA1和GOA2)分别位于输入信号焊盘区3的两端，驱动IC还包括第一初始化信号焊盘区4”和第二初始化信号焊盘区5”，第一初始化信号焊盘区4”和第二初始化信号焊盘区5”分别位于输入信号焊盘区3和对应的GOA焊盘区(GOA1和GOA2)之间。例如，第一初始化信号焊盘区4”位于输入信号焊盘区3和GOA1之间，第二初始化信号焊盘区5”位于输入信号焊盘区3和GOA2之间。这样将GOA焊盘区(GOA1和GOA2)、第一初始化信号焊盘区4”和第二初始化信号焊盘区5”均移至输入信号焊盘区3的两端，可以进一步增大数据信号焊盘区21的空间，进一步提高数据信号焊盘区21数据信号焊盘的数量，从而进一步提高分辨率。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图10所示，两个GOA焊盘区(GOA1和GOA2)分别位于输入信号焊盘区3的两端，驱动IC还包括第一初始化信号焊盘区4”和第二初始化信号焊盘区5”，第一焊盘区4’复用为第一初始化信号焊盘区4”，第二焊盘区5’复用为第二初始化信号焊盘区5”。即通过将GOA焊盘区(GOA1和GOA2)移至输入信号焊盘区3的两端，将第一初始化信号焊盘区4”和第二初始化信号焊盘区5”移至接地信号焊盘区1两侧的第一焊盘区4’和第二焊盘区5’，这样也可以提高数据信号焊盘区21的制作空间，进一步提高数据信号焊盘的数量，从而提高采用单颗驱动IC驱动的折叠产品的分辨率，从而设计出一种可支持更高分辨率且低成本的应用于折叠产品的单颗驱动IC。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图9和图10所示，第一初始化信号焊盘区4”和第二初始化信号焊盘区5”均包括多个第二焊盘组A2，每一第二焊盘组A2包括至少两个相邻的第二焊盘20，每一第二焊盘组A2的各第二焊盘20电连接。图9和图10所示的第一初始化信号焊盘区4”和第二初始化信号焊盘区5”的结构可以参见图3所示的结构。
在具体实施时，在本公开实施例提供的上述驱动IC中，如图11所示，两个GOA焊盘区(GOA1和GOA2)分别位于数据信号焊盘区21的两端，驱动IC还包括第一初始化信号焊盘区4”和第二初始化信号焊盘区5”，第一初始化信号焊盘区4”和第二初始化信号焊盘区5”分别位于输入信号焊盘区3的两端。具体地，图11中GOA焊盘区(GOA1和GOA2)的结构与图2中的结构相同，图11是将第一初始化信号焊盘区4”和第二初始化信号焊盘区5”移至输入信号焊盘区3的两端，这样也可以增大数据信号焊盘区21的空间，提高数据信号焊盘区21数据信号焊盘的数量，从而提高分辨率。
需要说明的是，本公开实施例仅示意出了图3所示的结构对应的引线L的三种引出方式，当然图2、图8-图11的引线L的引出方式可以类似于图3对应的引出方式，根据实际制作时的空间间隙进行布局。
基于同一发明构思，本公开实施例还提供了一种显示装置，如图12所示，包括显示面板100以及本公开实施例提供的上述驱动IC 200，显示面板100包括显示区AA以及围绕显示区AA设置的周边区BB，驱动IC 200绑定于周边区BB。显示区AA包括数据线、初始化信号线等，周边区还包括GOA电路，驱动IC的数据信号焊盘区内的数据信号焊盘用于向数据线传输数据信号，GOA焊盘区的各第一焊盘组用于向GOA电路的初始触发信号线、时钟信号线等传输信号，第一初始化信号焊盘区和第二初始化信号焊盘区的各第二焊盘组用于向对应的初始化信号线传输初始化信号。
由于该显示装置解决问题的原理与前述一种驱动IC相似，因此该显示装置的实施可以参见前述驱动IC的实施，重复之处不再赘述。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示或触控功能的产品或部件。
在具体实施时，上述显示面板可以为液晶显示面板(LCD)，也可以为有机发光二极管显示面板(OLED)，当然也可以为其它显示面板，在此不做限定。
在具体实施时，本公开实施例提供的上述显示装置还可以包括本领域技 术人员熟知的其他膜层，在此不做详述。
本公开实施例提供了一种驱动IC及显示装置，通过缩减每一GOA焊盘区对应的第一焊盘数量，可以降低GOA焊盘区的占用空间，这样可以增加制作数据信号焊盘(驱动IC与折叠产品集成时，数据信号焊盘用于与折叠产品的数据线电连接)的空间，从而增加数据信号焊盘的数量，在驱动IC与大尺寸的折叠产品集成时，可以实现在采用单颗驱动IC的基础上实现高分辨率的折叠产品。
尽管已描述了本公开的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本公开范围的所有变更和修改。
显然，本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开实施例的精神和范围。这样，倘若本公开实施例的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (16)

  1. 一种驱动IC，其中，包括至少一个GOA焊盘区，各所述GOA焊盘区包括多行多列第一焊盘，每一列所述第一焊盘划分为至少两个相互独立设置的第一焊盘组，每一所述第一焊盘组包括相邻的至少两个所述第一焊盘，每一所述第一焊盘组的各所述第一焊盘电连接；
    还包括与各所述第一焊盘组电连接的多条引线，且每一所述第一焊盘组与不同的所述引线电连接。
  2. 如权利要求1所述的驱动IC，其中，包括：接地信号焊盘区，位于所述接地信号焊盘区外围且相对设置的输出信号焊盘区和输入信号焊盘区，以及位于所述接地信号焊盘区外围且相对设置的第一焊盘区和第二焊盘区；
    所述驱动IC包括相对设置的第一侧边和第二侧边以及相对设置的第三侧边和第四侧边，所述第三侧边和所述第四侧边分别与所述第一侧边和所述第二侧边相邻；
    所述输出信号焊盘区与所述第一侧边相对应，所述输入信号焊盘区与所述第二侧边相对应，所述第一焊盘区与所述第三侧边相对应，所述第二焊盘区与所述第四侧边相对应；其中，
    所述GOA焊盘区位于所述输出信号焊盘区的边缘区域。
  3. 如权利要求2所述的驱动IC，其中，所述输出信号焊盘区还包括数据信号焊盘区，所述GOA焊盘区的数量为两个；
    两个所述GOA焊盘区分别位于所述数据信号焊盘区的两端。
  4. 如权利要求3所述的驱动IC，其中，两个所述GOA焊盘区关于所述数据信号焊盘区对称设置。
  5. 如权利要求2-4任一项所述的驱动IC，其中，远离所述输入信号焊盘区的各所述第一焊盘组电连接的引线直接从所述第一焊盘组的顶端引出。
  6. 如权利要求5所述的驱动IC，其中，靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊 盘之间的间隙处引出。
  7. 如权利要求5所述的驱动IC，其中，针对靠近所述第一焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第一焊盘区的空隙处引出；
    针对靠近所述第二焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的各所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第二焊盘区的空隙处引出。
  8. 如权利要求5所述的驱动IC，其中，针对靠近所述第一焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊盘之间的间隙处引出，靠近所述输入信号焊盘区的另一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第一焊盘区的空隙处引出；
    针对靠近所述第二焊盘区的GOA焊盘区，其中靠近所述输入信号焊盘区的一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿相邻两列所述第一焊盘之间的间隙处引出，靠近所述输入信号焊盘区的另一部分所述第一焊盘组电连接的引线从所述第一焊盘组的底端沿所述第二焊盘区的空隙处引出。
  9. 如权利要求1所述的驱动IC，其中，包括：接地信号焊盘区，位于所述接地信号焊盘区外围且相对设置的输出信号焊盘区和输入信号焊盘区，以及位于所述接地信号焊盘区外围且相对设置的第一焊盘区和第二焊盘区；
    所述驱动IC包括相对设置的第一侧边和第二侧边以及相对设置的第三侧边和第四侧边，所述第三侧边和所述第四侧边分别与所述第一侧边和所述第二侧边相邻；
    所述输出信号焊盘区与所述第一侧边相对应，所述输入信号焊盘区与所述第二侧边相对应，所述第一焊盘区与所述第三侧边相对应，所述第二焊盘区与所述第四侧边相对应；其中，
    所述GOA焊盘区位于所述输入信号焊盘区边缘的一侧。
  10. 如权利要求9所述的驱动IC，其中，所述GOA焊盘区的数量为两个，两个所述GOA焊盘区分别位于所述输入信号焊盘区的两端。
  11. 如权利要求10所述的驱动IC，其中，两个所述GOA焊盘区关于所述输入信号焊盘区对称设置。
  12. 如权利要求9-11任一项所述的驱动IC，其中，还包括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区分别位于所述输入信号焊盘区和对应的所述GOA焊盘区之间。
  13. 如权利要求2-4、6-11任一项所述的驱动IC，其中，还包括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一焊盘区复用为所述第一初始化信号焊盘区，所述第二焊盘区复用为所述第二初始化信号焊盘区。
  14. 如权利要求13所述的驱动IC，其中，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区均包括多个第二焊盘组，每一所述第二焊盘组包括至少两个相邻的第二焊盘，每一所述第二焊盘组的各所述第二焊盘电连接。
  15. 如权利要求2-4、6-8任一项所述的驱动IC，其中，还包括第一初始化信号焊盘区和第二初始化信号焊盘区，所述第一初始化信号焊盘区和所述第二初始化信号焊盘区分别位于所述输入信号焊盘区的两端。
  16. 一种显示装置，其中，包括显示面板以及如权利要求1-15任一项所述的驱动IC，所述显示面板包括显示区以及围绕所述显示区设置的周边区，所述驱动IC绑定于所述周边区。
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CN111383554A (zh) * 2019-11-06 2020-07-07 上海中航光电子有限公司 显示面板及显示装置
CN113035071A (zh) * 2021-04-14 2021-06-25 京东方科技集团股份有限公司 一种显示装置及其绑定方法
CN113126375A (zh) * 2021-04-29 2021-07-16 厦门天马微电子有限公司 显示模组及显示装置
US20210351262A1 (en) * 2018-08-09 2021-11-11 Samsung Display Co., Ltd. Display apparatus

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US20210351262A1 (en) * 2018-08-09 2021-11-11 Samsung Display Co., Ltd. Display apparatus
CN111383554A (zh) * 2019-11-06 2020-07-07 上海中航光电子有限公司 显示面板及显示装置
CN113035071A (zh) * 2021-04-14 2021-06-25 京东方科技集团股份有限公司 一种显示装置及其绑定方法
CN113126375A (zh) * 2021-04-29 2021-07-16 厦门天马微电子有限公司 显示模组及显示装置

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