WO2023134381A1 - 开关电源电路及终端设备 - Google Patents

开关电源电路及终端设备 Download PDF

Info

Publication number
WO2023134381A1
WO2023134381A1 PCT/CN2022/139076 CN2022139076W WO2023134381A1 WO 2023134381 A1 WO2023134381 A1 WO 2023134381A1 CN 2022139076 W CN2022139076 W CN 2022139076W WO 2023134381 A1 WO2023134381 A1 WO 2023134381A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch tube
terminal
tube
power supply
resistor
Prior art date
Application number
PCT/CN2022/139076
Other languages
English (en)
French (fr)
Inventor
王朝
吉庆
Original Assignee
荣耀终端有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 荣耀终端有限公司 filed Critical 荣耀终端有限公司
Publication of WO2023134381A1 publication Critical patent/WO2023134381A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present application relates to the technical field of power electronics, in particular to switching power supply circuits and terminal equipment.
  • the switching power supply uses modern power electronic technology to control the time ratio of the switching crystal UAN on and off to maintain a stable output voltage.
  • a switching power supply is generally composed of a pulse width modulation (Pulse Width Modulation, PWM) control integrated circuit (Integrated Circuit, IC) chip and a metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).
  • PWM Pulse Width Modulation
  • IC Integrated Circuit
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • commonly used switching power supply circuits include boost circuits, buck circuits, and the like.
  • this application provides a switching power supply circuit and terminal equipment to solve the above technical problems, and the disclosed technical solutions are as follows:
  • the present application provides a boost switching power supply circuit, including: a first inductor, a first switching tube, a second switching tube, a control circuit and an output capacitor; one end of the first inductor is connected to the positive voltage of the boost switching power supply circuit.
  • the other end of the first inductor is connected to the first end of the first switch tube; the second end of the first switch tube is connected to the ground terminal, and the control terminal of the first switch tube is connected to the drive signal controller; the second end of the second switch tube is connected to the drive signal controller; One end is connected to the common node of the first inductor and the first switch tube, the second end of the second switch tube is connected to the positive output terminal of the boost switching power supply circuit, and the control terminal of the second switch tube is connected to the control circuit; the control circuit includes a first branch The pressure circuit and the second voltage divider circuit output a control signal for controlling the switching state of the second switch tube; the first voltage divider circuit is connected in parallel between the first end and the second end of the first switch tube; the second voltage divider The circuit is connected between the second terminal of the output second switch tube and the ground terminal, the second voltage divider circuit includes at least two resistors connected in series, and a third switch tube connected in series between the at least two resistors, the third switch tube The first terminal of
  • the second switching tube is used to replace the diode in the asynchronous boost switching power supply circuit, and the conducting voltage drop of the switching tube is much lower than that of the diode, thus reducing the power loss of the boost switching power supply circuit.
  • the control circuit of the second switching tube is composed of discrete components, and finally realizes that when the first switching tube (that is, the main circuit switching tube) is turned on, the second switching tube is turned off, and when the first switching tube is turned off, the second switching tube is turned off.
  • the two switch tubes are turned on.
  • the cost of discrete components is far lower than that of the PWM controller. Therefore, the control circuit composed of discrete components reduces the hardware cost of the boost switching power supply circuit, and at the same time simplifies the circuit design of the boost switching power supply circuit.
  • the first voltage dividing circuit includes at least two resistors connected in series.
  • the first voltage divider circuit includes a first resistor and a second resistor connected in series, and a common node between the first resistor and the second resistor is the first voltage divider middle node of the circuit.
  • the second voltage dividing circuit includes a third resistor and a fourth resistor connected in series, and a third switch tube connected in series between the third resistor and the fourth resistor;
  • the first end of the three switch tubes is connected to the third resistor, the second end of the third switch tube is connected to the fourth resistor, the control terminal of the third switch tube is connected to the middle node of the first voltage divider circuit, and the first end of the third switch tube
  • the control terminal of the second switching tube is also connected.
  • the second voltage divider circuit is The second switching tube provides a turn-on and cut-off control signal, and finally the control circuit composed of discrete components is used to control the turn-on and cut-off of the second switch tube, which saves the hardware cost of the boost switching power supply circuit.
  • the first switch tube, the second switch tube and the third switch tube are all metal-oxide semiconductor field effect transistors (MOS transistors); the first terminal is the drain of the MOS transistors 1. The second end is the source of the MOS transistor, and the control end is the gate of the MOS transistor.
  • MOS transistors metal-oxide semiconductor field effect transistors
  • both the first switch transistor and the third switch transistor are NMOS transistors, and the second switch transistor is a PMOS transistor.
  • the present application also provides a buck switching power supply circuit, including: a first inductor, a first switching tube, a second switching tube, a control circuit and an output capacitor; the first end of the first switching tube is connected to the buck switching power supply The positive input end of the circuit, the second end of the first switching tube is connected to one end of the first inductor, the control end of the first switching tube is connected to the drive signal controller; the other end of the first inductor is connected to the positive output end of the buck switching power supply circuit; The first end of the second switch tube is connected to the first common node of the first switch tube and the first inductor, the second end of the second switch tube is connected to the ground terminal, and the control terminal of the second switch tube is connected to the control circuit; the control circuit includes a first A voltage divider circuit and a second voltage divider circuit output a control signal for controlling the switch state of the second switch tube; the first voltage divider circuit is connected in parallel between the first end and the second end of the second switch tube; the
  • the second switching tube is used instead of the freewheeling diode.
  • the on-resistance of the switching tube is very small, only tens of milliohms, and the freewheeling current is usually several amperes. Therefore, the conduction of the second switching tube
  • the voltage drop is tens of millivolts, while the turn-on voltage drop of the freewheeling diode is hundreds of millivolts. Therefore, after using the switch tube instead of the freewheeling diode, the power loss of the buck switching power supply circuit is greatly reduced and the output efficiency is improved. .
  • this solution uses a control circuit composed of discrete components to control the on and off states of the second switch tube, so that when the first switch tube is turned on, the second switch tube is turned off; when the first switch tube is turned off, the second switch tube is turned off.
  • the switch tube is turned on. That is to say, this solution does not require an additional PWM controller, and the cost of discrete components is much lower than that of the PWM controller, thereby reducing the hardware cost of the buck switching power supply circuit and simplifying circuit design.
  • the first voltage divider circuit includes a first resistor and a second resistor, the first resistor and the second resistor; the common node of the first resistor and the second resistor is the first voltage divider middle node of the circuit.
  • the second voltage dividing circuit includes a third resistor and a fourth resistor connected in series, and a third switch tube connected in series between the third resistor and the fourth resistor;
  • the first end of the three switch tubes is connected to the third resistor, the second end of the third switch tube is connected to the fourth resistor, the control terminal of the third switch tube is connected to the middle node of the first voltage divider circuit, and the first end of the third switch tube The control terminal of the second switching tube is also connected.
  • the first switch tube, the second switch tube and the third switch tube are all metal-oxide semiconductor field effect transistors (MOS transistors); the first terminal is the drain of the MOS transistors 1. The second end is the source of the MOS transistor, and the control end is the gate of the MOS transistor.
  • MOS transistors metal-oxide semiconductor field effect transistors
  • the first switch transistor, the second switch transistor and the third switch transistor are all NMOS transistors.
  • the present application also provides a terminal device, the terminal device comprising: the boost switching power supply circuit described in any one of the first aspect, or the buck switching power supply circuit described in any one of the second aspect;
  • the boost switching power supply circuit or the buck switching power supply circuit is used to supply power to a module to be powered in the terminal device, and the module to be powered includes a speaker power amplifier or an LCD backlight module.
  • FIG. 1A is a schematic diagram of a circuit principle of an asynchronous boost circuit
  • FIG. 1B is a schematic diagram of a circuit principle of a synchronous boost circuit
  • Fig. 2 is a schematic diagram of the circuit principle of a boost switching power supply provided by the embodiment of the present application;
  • Fig. 3 is a schematic diagram of the current direction corresponding to the boost switching power supply shown in Fig. 2 during the inductive energy storage stage;
  • Fig. 4 is a schematic diagram of the current direction corresponding to the inductance discharge stage of the boost switching power supply shown in Fig. 2;
  • Fig. 5 is a schematic diagram of a circuit principle of an asynchronous buck circuit
  • FIG. 6 is a schematic diagram of a circuit principle of a buck switching power supply provided by an embodiment of the present application.
  • Fig. 7 is a schematic diagram of the current direction corresponding to the buck switching power supply shown in Fig. 6 in the stage of inductive energy storage;
  • FIG. 8 is a schematic diagram of the current direction corresponding to the buck switching power supply shown in FIG. 6 in the inductor discharge stage.
  • words such as “exemplary” or “for example” are used as examples, illustrations or illustrations. Any embodiment or design scheme described as “exemplary” or “for example” in the embodiments of the present application shall not be interpreted as being more preferred or more advantageous than other embodiments or design schemes. Rather, the use of words such as “exemplary” or “such as” is intended to present related concepts in a concrete manner.
  • the switching power supply circuit includes a synchronous switching power supply circuit and an asynchronous switching power supply circuit, such as a synchronous boost circuit, an asynchronous boost circuit, a synchronous buck circuit, and an asynchronous buck circuit.
  • the asynchronous boost circuit and the asynchronous buck circuit are connected to the output terminal through a diode.
  • the circuit structure and control logic of the asynchronous switching power supply circuit are simple, so the asynchronous switching power supply circuit is widely used.
  • the inventors of the present application found that the power loss of the asynchronous switching power supply circuit is large and the working efficiency is low.
  • the inductance L1 and the first switching tube Q1 are connected in parallel with the input power supply Vin, and one end of the connection between L1 and Q1 is also connected to the positive output end through the diode D1 .
  • a synchronous boost circuit is used, as shown in Figure 1B, the difference from Figure 1A is that D1 on the output main circuit is replaced by the second switch tube Q2, however, Q1 and its PWM control IC are usually integrated in the switching power supply chip , the control signal cannot be provided to the outside, in other words, the switching state of Q2 cannot be controlled by the PWM control IC of Q1. Therefore, using a synchronous boost circuit requires an additional PWM controller (that is, a PWM control IC) to control the on and off of Q2, resulting in increased hardware costs.
  • a PWM control IC that is, a PWM control IC
  • the inventor proposes the switching power supply circuit of the present application after research, and uses the second switching tube to replace the diode in the asynchronous switching power supply circuit.
  • the conduction voltage drop of the switch tube is much lower than that of the diode, thus reducing the power loss of the switching power supply circuit.
  • a control circuit composed of discrete components is used to control the on and off states of the second switch tube, so that when the first switch tube (that is, the main circuit switch tube) is turned on, the second switch tube is turned off, and, when When the first switch tube is turned off, the second switch tube is turned on.
  • the cost of discrete components is much lower than that of the PWM controller. Therefore, the control circuit composed of discrete components reduces the hardware cost of the switching power supply circuit, and at the same time simplifies the circuit design of the switching power supply circuit.
  • FIG. 2 shows a circuit schematic diagram of a boost switching power supply provided by the embodiment of the present application.
  • the boost switching power supply circuit includes an inductor L1, a first switching tube Q1, and a second switching tube Q2 , the output capacitor Co, the load RL , and the control circuit.
  • the inductor L1 is connected in series with the first switching tube Q1 and connected in parallel to the input power supply Vin, wherein one end of L1 is connected to the positive pole of the input power supply Vin, the other end of L1 is connected to the first terminal of Q1, the second end of Q1 is connected to the negative pole of Vin, and Q1
  • the control terminal is connected to the PWM controller.
  • the first terminal of the second switching transistor Q2 is connected to the common node SW of L1 and Q1, the second terminal of Q2 is connected to the positive output terminal of the switching power supply (ie, the positive pole of the output power supply), and the control terminal of Q2 is connected to the control circuit.
  • the output capacitor Co is connected in parallel between the positive output terminal and GND, and is used to filter the output voltage Vout to ensure the stability of the output voltage.
  • the control circuit includes a first voltage dividing circuit and a second voltage dividing circuit.
  • the first voltage dividing circuit is connected in parallel between the first terminal and the second terminal of Q1, and is used for dividing the voltage of the node SW to the ground (GND).
  • the second voltage dividing circuit is connected in parallel with the output capacitor Co, that is, in parallel with the output side Vout, and is used to provide a control voltage for controlling the turn-on and turn-off of Q2.
  • the first voltage divider circuit includes at least two series voltage divider resistors. As shown in FIG. 2 , it may include R1 and R2 connected in series, wherein the common node A of R1 and R2 is connected to the second voltage divider circuit.
  • the second voltage dividing circuit includes at least two voltage dividing resistors and a switch tube, for example, as shown in FIG. 2 , may include resistors R3 and R4, and a third switch tube Q3.
  • the first terminal and the second terminal of Q3 are connected in series between R3 and R4, and the control terminal of Q3 is connected to the common node A of the first voltage divider circuit.
  • the common node A connected to the first terminal of Q3 and R3 is connected to the control terminal of Q2.
  • Q1 is an NMOS transistor
  • Q2 is a PMOS transistor
  • the first terminal, the second terminal and the control terminal of Q1 and Q2 are the drain, the source and the gate of the NMOS transistor in turn.
  • Q1 may use other types of switch tubes.
  • Q2 may also use other types of switch tubes.
  • the present application does not specifically limit the types of Q1 and Q2.
  • the number of voltage-dividing resistors in the first voltage-dividing circuit can be more than two, such as 3 or more.
  • the number of voltage-dividing circuits in the second voltage-dividing circuit can also be More than two, such as 3 or more.
  • the number of voltage-dividing resistors in the first voltage-dividing circuit and the second voltage-dividing circuit and the resistance value of each resistor can be determined according to actual conditions.
  • Q1 is on.
  • the input power supply Vin forms a closed loop through the inductor L1 and Q1. Since the inductor L1 has the characteristics of passing DC and blocking AC, a current is generated in the closed loop, and L1 converts electrical energy into magnetic energy for storage. The direction of the current is shown by the arrow in Figure 3.
  • Q3 is an NMOS transistor
  • the source of Q3 is connected to GND
  • the gate of Q3 is connected to node B, that is, the voltage difference V GS between the gate and source of Q2 is V B .
  • V B is greater than or equal to the threshold voltage V GSth1 of the gate and source of the NMOS transistor
  • Q3 is turned on, and V GSth1 is about 0.7V. That is, when V B is greater than or equal to 0.7V, Q3 is turned on.
  • Q2 is a PMOS transistor, which is turned on when the voltage difference V GS2 between the gate and the source of the PMOS transistor is greater than or equal to the threshold voltage V GSth2 .
  • V GSth2 is about -2V, that is, when the gate voltage of the PMOS transistor is 2V or more lower than the source voltage, the PMOS transistor is turned on.
  • the gate of Q2 is connected to node A, and the source is connected to the positive output terminal of the switching power supply, that is, the positive pole of Vout.
  • the voltage of node A is pulled down to 0V, that is, the gate voltage V G of Q2 is 0V.
  • the voltage difference V GS between the gate and the source of Q2 is -Vout, and -Vout is smaller than V GSth2 , triggering Q2 to be turned on.
  • the input power supply Vin and the induced voltage V L of the inductor L1 are superimposed to supply power to the load RL.
  • the resistance ratio of R1 and R2 is about 1:500
  • the resistance ratio of R3 and R4 is about 1:4
  • the resistance values of R1-R4 only need to meet the above-mentioned ratio, and there is no limitation for R1-R4.
  • the voltages of nodes V A and V B are as follows:
  • R1 and R2 are connected in series between the node SW and GND, that is, R1 and R2 divide the voltage of the node SW, and the voltage drop V B on R2 is about 15.46V, that is, the gate voltage of Q3 is about 15.46V .
  • the on-resistance of Q3 is only tens of milliohms, which is negligible compared with the kilo-ohm resistance of R3 and R4. Therefore, the voltage of node A is equal to the voltage drop on R4, which is about 12V, that is, the gate of Q2 Pole voltage is about 12V.
  • the second switching tube Q2 is used to replace the diode D1 connected between the inductor and the positive output terminal.
  • the conduction resistance of the switch tube is very small, only tens of milliohms, and the output current is usually several amperes, so the conduction voltage drop is reduced from hundreds of millivolts to tens of millivolts. Therefore, the second switch tube Q2 is used instead of Behind the diode D1, the power loss of the boost switching power supply circuit is greatly reduced, and the output efficiency is improved.
  • this solution uses discrete components to form a control circuit to control the on and off states of the second switch tube Q2, so that when the first switch tube (that is, the main circuit switch tube) is turned on, the switch tube is turned off. Therefore, the solution No additional PWM controller is required, and the cost of discrete components is much lower than that of the PWM controller, thereby reducing the hardware cost of the boost switching power supply circuit and simplifying circuit design.
  • the asynchronous buck circuit Similar to the asynchronous boost circuit, the asynchronous buck circuit also has the problems of large power loss and low work efficiency. As shown in Figure 5, the two input ends of the switching power supply circuit are connected to one end of the inductor L1 through Q1, and the other end of L1 is connected to the output end. , The freewheeling diode D1 is reversely connected between the common node of Q1 and L1 and the ground terminal (GND). The output capacitor Co is connected in parallel to the output terminal to ensure the stability of the output voltage at the output terminal, and the load RL is connected in parallel to both ends of Co.
  • the inventor of the present application provides a switching power supply circuit based on the buck circuit, which uses a switching tube instead of the freewheeling diode D1 to reduce power loss.
  • a control circuit composed of discrete components is used to drive the on and off states of the switch tube, without additionally adding a PWM controller, which reduces hardware cost and simplifies circuit design.
  • the buck switching power supply circuit includes: a first switching tube Q1, an energy storage inductor L1, a second switching tube Q2, an output capacitor Co, a load RL , and a control circuit composed of discrete components. circuit.
  • the second switch tube Q2 is used to replace the freewheeling diode D1 in FIG. 5
  • the control circuit composed of discrete components drives and controls Q2 to be turned on and off.
  • the first terminal of Q2 is connected to the second terminal of Q1, the second terminal of Q2 is connected to the ground terminal GND, and the control terminal is connected to the control circuit.
  • the output capacitor Co is connected in parallel between the two output terminals to ensure the stability of the output voltage Vout.
  • the load RL is connected in parallel across the output capacitor Co.
  • control circuit includes a first voltage divider circuit and a second voltage divider circuit, wherein the second voltage divider circuit includes a third switch tube Q3.
  • the first voltage dividing circuit One end of the first voltage dividing circuit is connected to the common node SW of Q1 and L1, and the other end of the first voltage dividing circuit is connected to the ground terminal GND.
  • the middle node of the first voltage dividing circuit ie, the first middle node
  • the first voltage divider circuit provides a driving control voltage for Q3 by dividing the voltage of the SW node.
  • the first voltage divider circuit may include at least two voltage divider resistors serially connected in series, and the two voltage divider resistors R1 and R2 are used as an example for illustration.
  • the common node B of R1 and R2 ie, the first Intermediate node is connected to the control terminal of Q3.
  • One end of the second voltage dividing circuit is connected to one end of L1 connected to the positive output end, and the other end of the second voltage dividing circuit is connected to GND.
  • the middle node of the second voltage dividing circuit ie, the second middle node
  • the second voltage dividing circuit is used to provide driving control voltage for Q2.
  • the second voltage dividing circuit may include at least two voltage dividing resistors and a third switch tube Q3, taking two voltage dividing resistors R3 and R4 as an example.
  • R3, Q3 and R4 are connected in series in sequence, one end of R3 is connected to L1 as one end of the second voltage divider circuit, the other end of R3 is connected to the first end of Q3, the second end of Q3 is connected to one end of R4, and the other end of R4 is connected to GND.
  • the common node A (ie, the second node) of Q3 and R3 is connected to the control terminal of Q2.
  • Q1 , Q2 and Q3 are all NMOS transistors, and the first terminal, the second terminal and the control terminal are sequentially a drain, a source and a gate.
  • Q1, Q2 and Q3 may also use other types of switch tubes, which are not limited in the present application.
  • the number of voltage-dividing resistors included in the first voltage-dividing circuit may be more than two, and similarly, the number of voltage-dividing resistors included in the second voltage-dividing circuit may also be more than two , which is not limited in this application.
  • Q3 is an NMOS transistor
  • the source of Q3 is connected to GND through resistor R4, and the gate of Q3 is connected to node B.
  • the voltage difference between the gate and source of Q3 is greater than the conduction threshold of the NMOS transistor, which is about 0.7V, Q3 conduction.
  • the node SW After Q1 is turned on, the node SW is at a high level, and there is current flowing in the first voltage divider circuit, and the voltage V B of node B is the voltage drop on the resistor R2, that is, the high level, which is greater than the conduction threshold of the NMOS transistor value, so Q3 turns on.
  • the node SW when Q1 is in the cut-off state, the node SW is 0V, at this time no current flows in the first voltage divider circuit, there is no voltage drop across the resistor R2, the voltage of node B is 0V, and Q3 is cut off. After Q3 is cut off, no current flows in the second voltage divider circuit, therefore, the voltage of node A is equal to the voltage of the positive output terminal, that is, node A is at a high level.
  • the gate of Q2 is connected to node A, and the source is connected to GND.
  • node A is at a high level.
  • the voltage difference between the gate and source of Q2 is greater than the conduction threshold of the NMOS transistor, so Q2 is turned on. .
  • Inductor L1 output capacitor Co, load RL, and second switch tube Q2 form a closed loop.
  • L1 is discharged through Q2, and the current flowing through L1 decreases linearly.
  • the output voltage is maintained stable through the output capacitor Co and inductor current.
  • the voltage of the node SW is equal to the input voltage, which is 4V.
  • the first voltage divider circuit divides the voltage of the node SW, and the voltage drop on the resistor R2 is 3.07V, that is, the voltage of Q3
  • the gate voltage is 3.07V.
  • the source of Q3 is connected to GND through R4, and the source voltage of Q3 is approximately 0V. Therefore, the voltage difference between the gate and source of Q3 is approximately 3.07V, which meets the conduction condition of Q3.
  • the voltage of node A is approximately equal to the voltage drop on R4 of about 0.24V (R3 and R4 divide the output voltage Vout, and the voltage drop on R4 is about 0.24V).
  • the gate and source of Q2 The voltage difference between poles is about 0.24V, so Q2 is off. That is, when Q1 is on, Q3 is on and Q2 is off.
  • the second switching tube Q2 is used to replace the freewheeling diode D1.
  • the on-resistance of the switching tube is very small, only tens of milliohms, and the freewheeling current is usually several amperes. Therefore, the conduction of Q2
  • the conduction voltage drop of the freewheeling diode D1 is several tens of millivolts, and the conduction voltage drop of the freewheeling diode D1 is hundreds of millivolts. Therefore, the power loss of the buck switching power supply circuit is greatly reduced by using the switch tube instead of the freewheeling diode, and the output efficiency.
  • this solution uses a control circuit composed of discrete components to control the on and off states of the second switch tube, so that when the first switch tube is turned on, the second switch tube is turned off; when the first switch tube is turned off, the second switch tube is turned off.
  • the switch tube is turned on. That is to say, this solution does not require an additional PWM controller, and the cost of discrete components is much lower than that of the PWM controller, thereby reducing the hardware cost of the buck switching power supply circuit and simplifying circuit design.
  • the embodiment of the present application also provides a terminal device using the above switching power supply circuit.
  • the terminal device may include: a processor, a memory, a display screen and a speaker.
  • the structure shown in this embodiment does not constitute a specific limitation on the terminal device.
  • the terminal device may include more or fewer components than shown in the figure, or some components may be combined, or some components may be separated, or different component arrangements may be made.
  • the illustrated components can be realized in hardware, software or a combination of software and hardware.
  • the display screen is used to display images, videos, etc.
  • the display screen can adopt liquid crystal display (liquid crystal display, LCD), organic light-emitting diode (organic light-emitting diode, OLED), etc., when the display screen adopts LCD, the backlight power supply of LCD adopts the boost switching power supply that the above-mentioned embodiment provides or buck switching power supply.
  • the loudspeaker is used to convert the audio electrical signal into a sound signal, and the loudspeaker is driven by a power amplifier.
  • the driving power of the power amplifier of the loudspeaker adopts the boost switching power supply or the buck switching power supply of the above-mentioned embodiment.
  • the memory is used to store computer-executable program codes, and the executable program codes include instructions.
  • the processor executes various functional applications and data processing of the terminal device by executing instructions stored in the memory.
  • the terminal equipment provided by this embodiment adopts the above-mentioned switching power supply as the driving power supply of the power amplifier of the LCD or speaker in the terminal equipment.
  • the above-mentioned switching power supply uses a second switching tube instead of a diode, and the conduction impedance of the switching tube is very small, only a few Ten milliohms, so the conduction voltage drop is reduced from hundreds of millivolts to tens of millivolts, which greatly reduces the power loss of the switching power supply circuit and improves the output efficiency.
  • this solution uses discrete components to form a control circuit to control the switching state of the second switching tube, without additionally setting up a PWM controller, and the cost of discrete components is much lower than that of the PWM controller, thereby reducing the hardware cost of the switching power supply and simplifying the circuit design.
  • the disclosed system, device and method can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components can be Incorporation may either be integrated into another system, or some features may be omitted, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of this embodiment may be integrated into one processing unit, or each unit may physically exist separately, or two or more units may be integrated into one unit.
  • the above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.
  • the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of this embodiment is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium
  • several instructions are included to make a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor execute all or part of the steps of the method described in each embodiment.
  • the aforementioned storage medium includes: flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk or optical disk, and other various media capable of storing program codes.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本申请提供了开关电源电路及终端设备，该开关电源电路利用第二开关管代替异步开关电源电路中的二极管。开关管的导通阻抗非常小，只有几十毫欧姆，因此开关电源电路中的导通压降从几百毫伏减小至几十毫伏，极大地降低了开关电源电路的功率损耗，提高了输出效率。而且，该方案利用分立元件构成控制电路控制第二开关管的开关状态，无需额外设置PWM控制器，分立元件的成本远低于PWM控制器的成本，从而降低了开关电源的硬件成本，简化了电路设计。

Description

开关电源电路及终端设备
本申请要求于2022年01月14日提交中国国家知识产权局、申请号为202210041695.2、发明名称为“开关电源电路及终端设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电力电子技术领域，尤其涉及开关电源电路及终端设备。
背景技术
开关电源利用现代电力电子技术，控制开关晶体UAN导通和截止的时间比率，维持稳定输出电压。开关电源一般由脉冲宽度调制(Pulse Width Modulation，PWM)控制集成电路(Integrated Circuit，IC)芯片和金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor，MOSFET)构成。例如，常用的开关电源电路包括boost电路、buck电路等。
但是，目前的部分开关电源电路存在损耗大、工作效率低的问题。
发明内容
有鉴于此，本申请提供了开关电源电路及终端设备，以解决上述技术问题，其公开的技术方案如下：
第一方面，本申请提供了一种boost开关电源电路，包括：第一电感、第一开关管、第二开关管、控制电路和输出电容；第一电感的一端连输boost开关电源电路的正输入端，第一电感的另一端连接第一开关管的第一端；第一开关管的第二端连接接地端，第一开关管的控制端连接驱动信号控制器；第二开关管的第一端连接第一电感与第一开关管的公共节点，第二开关管的第二端连接boost开关电源电路的正输出端，第二开关管的控制端连接控制电路；控制电路包括第一分压电路和第二分压电路，输出用于控制第二开关管的开关状态的控制信号；第一分压电路并联于第一开关管的第一端与第二端之间；第二分压电路连接于输出第二开关管的第二端与接地端之间，第二分压电路包括至少两个串联的电阻，以及串联在至少两个电阻之间的第三开关管，第三开关管的第一端连接第二开关管的控制端，第三开关管的控制端连接第一分压电路的中间节点；输出电容并联于正输出端与接地端之间。该方案利用第二开关管代替异步boost开关电源电路中的二极管，开关管的导通压降远低于二极管的导通压降，因此降低了boost开关电源电路的功率损耗。而且，第二开关管的控制电路由分立元件构成，最终实现当第一开关管(即主回路开关管)导通时，该第二开关管截止，以及，当第一开关管截止时，第二开关管导通。分立元件的成本远低于PWM控制器的成本，因此，采用分立元件组成的控制电路降低了boost开关电源电路的硬件成本，同时，简化了boost开关电源电路的电路设计。
在第一方面的一种可能的实现方式中，第一分压电路包括至少两个串联的电阻。
在第一方面的另一种可能的实现方式中，第一分压电路包括串联连接的第一电阻和第二电阻，第一电阻与所述第二电阻的公共节点为所述第一分压电路的中间节点。
在第一方面的又一种可能的实现方式中，第二分压电路包括串联连接的第三电阻和第 四电阻，以及串联于第三电阻与第四电阻之间的第三开关管；第三开关管的第一端连接第三电阻，第三开关管的第二端连接第四电阻，第三开关管的控制端连接第一分压电路的中间节点，第三开关管的第一端还连接第二开关管的控制端。可见，该方案的第一分压电路根据输入端主路上的SW节点处的电压，产生控制第二分压电路中第三开关管导通和截止的控制信号，进一步，第二分压电路为第二开关管提供导通和截止的控制信号，最终实现通过分立元件构成的控制电路控制第二开关管的导通和截止，节省了boost开关电源电路的硬件成本。
在第一方面的再一种可能的实现方式中，第一开关管、第二开关管和第三开关管均为金属-氧化物半导体场效应晶体管MOS管；第一端为MOS管的漏极、第二端为MOS管的源极，控制端为MOS管的栅极。
在第一方面的另一种可能的实现方式中，第一开关管和第三开关管均为NMOS管，第二开关管为PMOS管。
第二方面，本申请还提供了一种buck开关电源电路，包括：第一电感、第一开关管、第二开关管、控制电路和输出电容；第一开关管的第一端连接buck开关电源电路的正输入端，第一开关管的第二端连接第一电感的一端，第一开关管的控制端连接驱动信号控制器；第一电感的另一端连接buck开关电源电路的正输出端；第二开关管的第一端连接第一开关管与第一电感的第一公共节点，第二开关管的第二端连接接地端，第二开关管的控制端连接控制电路；控制电路包括第一分压电路和第二分压电路，输出用于控制第二开关管的开关状态的控制信号；第一分压电路并联于第二开关管的第一端与第二端之间；第二分压电路连接于第一电感的另一端与接地端之间，第二分压电路包括至少两个串联的电阻，以及串联在至少两个电阻之间的第三开关管，第三开关管的第一端连接第二开关管的控制端，第三开关管的控制端连接第一分压电路的中间节点；输出电容并联于正输出端与接地端之间。可见，该buck开关电源电路，利用第二开关管代替续流二极管，开关管的导通阻抗非常小，只有几十毫欧姆，续流电流通常为几安培，因此，第二开关管的导通压降为几十毫伏，而续流二极管的导通压降为几百毫伏，因此，利用开关管代替续流二极管后，极大地降低了buck开关电源电路的功率损耗，提高了输出效率。而且，该方案利用分立元件组成的控制电路控制第二开关管的导通与截止状态，以实现当第一开关管导通时，第二开关管截止；当第一开关管截止时，第二开关管导通。即该方案无需额外设置PWM控制器，分立元件的成本远低于PWM控制器的成本，从而降低了buck开关电源电路的硬件成本，简化了电路设计。
在第二方面的一种可能的实现方式中，第一分压电路包括第一电阻和第二电阻，第一电阻与第二电阻；第一电阻与第二电阻的公共节点为第一分压电路的中间节点。
在第二方面的另一种可能的实现方式中，第二分压电路包括串联连接的第三电阻和第四电阻，以及串联于第三电阻与第四电阻之间的第三开关管；第三开关管的第一端连接第三电阻，第三开关管的第二端连接第四电阻，第三开关管的控制端连接第一分压电路的中间节点，第三开关管的第一端还连接第二开关管的控制端。
在第二方面的又一种可能的实现方式中，第一开关管、第二开关管和第三开关管均为金属-氧化物半导体场效应晶体管MOS管；第一端为MOS管的漏极、第二端为MOS管的 源极，控制端为MOS管的栅极。
在第二方面的再一种可能的实现方式中，第一开关管、第二开关管和第三开关管均为NMOS管。
第三方面，本申请还提供了一种终端设备，所述终端设备包括：第一方面任一项所述的boost开关电源电路，或者，第二方面任一项所述的buck开关电源电路；所述boost开关电源电路或所述buck开关电源电路用于为所述终端设备中的待供电模块供电，所述待供电模块包括扬声器功率放大器或LCD背光模块。
应当理解的是，本申请中对技术特征、技术方案、有益效果或类似语言的描述并不是暗示在任意的单个实施例中可以实现所有的特点和优点。相反，可以理解的是对于特征或有益效果的描述意味着在至少一个实施例中包括特定的技术特征、技术方案或有益效果。因此，本说明书中对于技术特征、技术方案或有益效果的描述并不一定是指相同的实施例。进而，还可以任何适当的方式组合本实施例中所描述的技术特征、技术方案和有益效果。本领域技术人员将会理解，无需特定实施例的一个或多个特定的技术特征、技术方案或有益效果即可实现实施例。在其他实施例中，还可在没有体现所有实施例的特定实施例中识别出额外的技术特征和有益效果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1A是一种异步boost电路的电路原理示意图；
图1B是一种同步boost电路的电路原理示意图；
图2是本申请实施例提供的一种boost开关电源的电路原理示意图；
图3是图2所示的boost开关电源在电感储能阶段对应的电流方向示意图；
图4是图2所示的boost开关电源的电感放电阶段对应的电流方向示意图；
图5是一种异步buck电路的电路原理示意图；
图6是本申请实施例提供的一种buck开关电源的电路原理示意图；
图7是图6所示buck开关电源在电感储能阶段对应的电流方向示意图；
图8是图6所示buck开关电源在电感放电阶段对应的电流方向示意图。
具体实施方式
本申请说明书和权利要求书及附图说明中的术语“第一”、“第二”和“第三”等是用于区别不同对象，而不是用于限定特定顺序。
在本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
开关电源电路包括同步开关电源电路、异步开关电源电路，如包括同步boost电路、异步boost电路、同步buck电路、异步buck电路。其中，异步boost电路和异步buck电路通 过二极管连接输出端，与同步开关电源电路相比，异步开关电源电路的电路结构和控制逻辑简单，因此异步开关电源电路得到广泛应用。
但是，本申请发明人在研究过程中发现，异步开关电源电路的功率损耗大、工作效率低。
例如，图1A所示的异步boost电路，电感L1和第一开关管Q1串联后与输入电源Vin并联，L1与Q1的连接的一端还通过二极管D1连接正输出端。
当Q1导通时，输入电源Vin与L1形成闭合回路，L1储能，此时D1反向偏置，处于截止状态。当Q1截止时，由于电感L1的电流不能突变，L1中产生左负右正的感应电压，该感应电压叠加至输入电源上。此时，D1正向偏置导通，输入电源和感应电压经由D1、负载形成回路。由于D1的导通电压较高，导致异步boost电路的功率损耗较大、工作效率低。
如果采用同步boost电路，如图1B所示，与图1A的不同之处是，输出主回路上的D1替换为第二开关管Q2，但是，Q1及其PWM控制IC通常集成在开关电源芯片内，无法向外部提供控制信号，换言之，无法通过Q1的PWM控制IC控制Q2的开关状态。因此，采用同步boost电路需要额外设置PWM控制器(即PWM控制IC)来控制Q2的导通和截止，导致硬件成本升高。
为了解决上述技术问题，发明人经研究提出了本申请的开关电源电路，利用第二开关管代替异步开关电源电路中的二极管。开关管的导通压降远低于二极管的导通压降，因此降低了开关电源电路的功率损耗。以及，利用分立元件组成的控制电路控制该第二开关管的导通和截止状态，从而实现当第一开关管(即主回路开关管)导通时，该第二开关管截止，以及，当第一开关管截止时，第二开关管导通。分立元件的成本远低于PWM控制器的成本，因此，采用分立元件组成的控制电路降低了开关电源电路的硬件成本，同时，简化了开关电源电路的电路设计。
下面将结合图2～图5，介绍本申请提供的基于异步boost电路的开关电源电路的电路结构和工作过程。
请参见图2，示出了本申请实施例提供的一种boost开关电源的电路原理图，如图2所示，该boost开关电源电路包括电感L1、第一开关管Q1、第二开关管Q2，输出电容Co，负载R L，以及控制电路。
电感L1与第一开关管Q1串联后并联连接输入电源Vin，其中，L1的一端连接输入电源Vin的正极，L1的另一端连接Q1的第一端，Q1的第二端连接Vin的负极，Q1的控制端连接PWM控制器。
第二开关管Q2的第一端连接L1与Q1的公共节点SW，Q2的第二端连接该开关电源的正输出端(即，输出电源的正极)，Q2的控制端连接控制电路。
输出电容Co并联于正输出端与GND之间，用于对输出电压Vout进行滤波，保证输出电压的稳定性。
控制电路包括第一分压电路和第二分压电路。其中，第一分压电路并联于Q1的第一端与第二端之间，用于对节点SW对地(GND)的电压进行分压。第二分压电路与输出电容Co并联，也即与输出侧Vout并联，用于提供控制Q2导通和截止的控制电压。
第一分压电路包括至少两个串联的分压电阻，如图2所示，可以包括串联的R1和R2，其中，R1与R2的公共节点A连接第二分压电路。
第二分压电路包括至少两个分压电阻和一个开关管，例如，如图2所示，可以包括电阻R3、R4，以及第三开关管Q3。Q3的第一端和第二端串联于R3和R4之间，Q3的控制端连接第一分压电路的公共节点A。而且，Q3的第一端与R3连接的公共节点A连接Q2的控制端。
在一示例性实施例中，如图2所示，Q1为NMOS管，Q2为PMOS管。Q1和Q2的第一端、第二端、控制端依次为NMOS管的漏极、源极和栅极。
在本申请的其他实施例中，Q1可以采用其他类型的开关管，同理，Q2也可以采用其他类型的开关管，本申请对Q1和Q2的类型不做特殊限定。
在本申请的其他实施例中，第一分压电路中分压电阻的数量可以多于两个，如3个或3个以上，同理，第二分压电路中分压电路的数量也可以多于两个，如3个或3个以上。第一分压电路及第二分压电路中分压电阻的数量及各个电阻的阻值可以根据实际情况确定。
下面将结合图3和图4介绍本申请实施例提供的boost开关电源的不同阶段的工作过程：
(1)电感L1储能阶段
参见图3，Q1处于导通状态。输入电源Vin经电感L1和Q1形成闭合回路，由于电感L1具有通直流隔交流的特性，闭合回路中产生电流，L1将电能转化为磁能进行储存，电流方向如图3箭头所示。
同时，由于Q1导通，SW节点与GND等电势，第一分压电路中没有电流，即B节点的电压为0V。Q3的栅极电压为0V，Q3处于截止状态。Q3处于截止状态，因此A节点与Vout的正极电压相等，即Q2的栅极和源极电压相等，处于截止状态。
(2)电感L1放电阶段
参见图4，Q1处于截止状态，L1的储能电流消失，电感L1的自感特性产生左负右正的感应电压V L，节点SW的电压升高。同时，在L1内部产生从左至右的感应电流，感应电流方向如图4中箭头方向所示，从而阻止储能电流减小。此时，输入电源Vin、电感L1和第一分压电路形成闭合回路，L1的感应电流流经第一分压电路，节点B的电压V B升高。
在一示例性实施例中，Q3为NMOS管，Q3的源极连接GND，Q3的栅极连接节点B，即Q2的栅极与源极的电压差V GS为V B。当V B大于等于NMOS管的栅极与源极的门限电压值V GSth1时，Q3导通，V GSth1约为0.7V。即，当V B大于等于0.7V后，Q3导通。
在一示例性实施例中，Q2为PMOS管，当PMOS管的栅极与源极的电压差V GS2大于等于门限电压值V GSth2时导通。V GSth2约为-2V，即，PMOS管的栅极电压比源极电压低2V及以上时，PMOS管导通。
如图4所示，Q2的栅极连接节点A，源极连接开关电源的正输出端，即Vout的正极。Q3导通时，节点A的电压被拉低为0V，即Q2的栅极电压V G为0V。此时Q2的栅极与源极的电压差V GS为-Vout，-Vout小于V GSth2，触发Q2导通。输入电源Vin和电感L1的感应电压V L叠加后为负载RL供电。
需要注意的是，触发Q2和Q3导通的过程很短暂。在Q2和Q3都导通后，第一分压电路和第二分压电路并联于节点SW与接地端GND之间，通过合理配置R1、R2、R3和 R4的阻值比例，确保Q2和Q3在Q1处于截止状态的阶段保持导通状态。
在一示例性实施例中，R1和R2的阻值比例约为1:500，R3和R4的阻值比例约为1:4，R1～R4的阻值满足上述比例即可，不限定R1～R4的具体阻值。
输入电压Vin＝4V，输出电压Vout＝15V，Q2和Q3导通后，Q2的体二极管存在导通压降，因此节点SW的电压约为15.5V。以R1＝1kΩ、R2＝510kΩ、R3＝10kΩ、R4＝39kΩ为例，节点V A和V B的电压如下：
R1和R2串联连接于节点SW与GND之间，即R1和R2对节点SW的电压进行分压，而且，R2上的压降V B约为15.46V，即Q3的栅极电压约为15.46V。R3和R4对Vout＝15V进行分压，R4上的压降约为12V，即Q3的源极电压约为12V。因此，Q3的栅极与源极的压差V GS约为3.46V，大于NMOS管的导通门限值0.7V，因此Q3保持导通状态。
Q3的导通电阻只有几十毫欧姆，与R3和R4的千欧级阻值相比，可以忽略不计，因此，节点A的电压与R4上的压降相等，约为12V，即Q2的栅极电压约为12V。Q2的源极电压为输出电压Vout＝15V，因此，Q2的栅极与源极的压差V GS约为-3V，大于PMOS管的导通门限值-2V，因此Q2能够保持导通状态。
当Q1从截止状态切换至导通状态后，节点SW的电压变为0V，Q3的栅极与源极的电压差不满足NMOS管的导通门限值0.7V，因此Q3截止。进一步，Q3截止后，节点A的电压变为Vout，此时Q2的栅极电压与源极电压相等，因此Q2也截止。
本实施例提供的boost开关电源电路，利用第二开关管Q2代替连接在电感与正输出端之间的二极管D1。开关管的导通阻抗非常小，只有几十毫欧姆，输出电流通常为几安培，因此，导通压降从几百毫伏减小至几十毫伏，因此，利用第二开关管Q2代替二极管D1后，极大地降低了boost开关电源电路的功率损耗，提高了输出效率。而且，该方案利用分立元件构成控制电路控制第二开关管Q2的导通和截止状态，从而实现当第一开关管(即主回路开关管)导通时，该开关管截止，因此，该方案无需额外设置PWM控制器，分立元件的成本远低于PWM控制器的成本，从而降低了boost开关电源电路的硬件成本，简化了电路设计。
与异步boost电路相似，异步buck电路同样存在功率损耗大、工作效率低的问题，如图5所示，开关电源电路的两个输入端通过Q1连接电感L1的一端，L1的另一端连接输出端，Q1与L1的公共节点与接地端(GND)之间反向连接续流二极管D1。输出电容Co并联于输出端，确保输出端的输出电压稳定，负载R L并联于Co两端。
Q1导通时，L1储能，D1截止。Q1截止时，L1通过D1放电，D1导通，但是，D1的导通压降较大，达到几百毫伏，导致整个开关电源电路的功率损耗较大、输出效率较低。
为了解决基于异步buck电路的开关电源存在的功率损耗大、输出效率低的问题，本申请发明人提供了基于buck电路的开关电源电路，利用开关管代替续流二极管D1，降低功率损耗。同时，利用分立元件组成的控制电路驱动该开关管的导通和截止状态，无需额外增加PWM控制器，降低了硬件成本，并简化了电路设计。
如图6所示，本申请实施例提供的buck开关电源电路包括：第一开关管Q1、储能电感L1、第二开关管Q2、输出电容Co，负载R L，以及由分立元件构成的控制电路。可见，该方案采用第二开关管Q2代替图5中的续流二极管D1，以及，通过分立元件构成的控制 电路驱动控制Q2导通和截止。
Q2的第一端连接Q1的第二端，Q2的第二端连接接地端GND，控制端连接控制电路。
输出电容Co并联于两个输出端之间，确保输出电压Vout稳定性。负载R L并联于输出电容Co两端。
在本申请的一个实施例中，控制电路包括第一分压电路和第二分压电路，其中，第二分压电路包括第三开关管Q3。
第一分压电路的一端连接Q1与L1的公共节点SW，第一分压电路的另一端连接接地端GND。第一分压电路的中间节点(即第一中间节点)连接第三开关管Q3的控制端。第一分压电路通过对SW节点的电压进行分压，为Q3提供驱动控制电压。
在一示例性实施例中，第一分压电路可以包括依次串联的至少两个分压电阻，以两个分压电阻R1和R2为例进行说明，R1与R2的公共节点B(即第一中间节点)连接Q3的控制端。
第二分压电路的一端与L1连接正输出端的一端连接，第二分压电路的另一端连接GND。第二分压电路的中间节点(即第二中间节点)连接第二开关管Q2的控制端。第二分压电路用于为Q2提供驱动控制电压。
第二分压电路可以包括至少两个分压电阻和第三开关管Q3，以R3和R4两个分压电阻为例。R3、Q3和R4依次串联，R3的一端作为第二分压电路的一端连接L1，R3的另一端连接Q3的第一端，Q3的第二端连接R4的一端，R4的另一端连接GND。Q3与R3的公共节点A(即第二节点)连接Q2的控制端。
在一示例性实施例中，如图6所示，Q1、Q2和Q3均为NMOS管，第一端、第二端和控制端依次为漏极、源极和栅极。
在本申请的其他实施例中，Q1、Q2和Q3还可以采用其他类型的开关管，本申请对此不做限定。
此外，在本申请的其他实施例中，第一分压电路包含的分压电阻的数量可以多于两个，同理，第二分压电路包含的分压电阻的数量也可以多于两个，本申请对此不做限定。
下面将结合图7和图8介绍本申请实施例提供的buck开关电源的工作过程：
(1)电感L1储能阶段
参见图7，Q1处于导通状态时，输入电源Vin、电感L1、输出电容Co、负载R L构成闭合回路，L1储能，流经L1的电流线性增加，同时向Co充电，为R L供电。
Q3为NMOS管，Q3的源极通过电阻R4连接GND，Q3的栅极连接节点B，当Q3的栅极与源极的电压差大于NMOS管的导通门限值，约为0.7V，Q3导通。
Q1导通后，节点SW为高电平，第一分压电路内有电流流过，节点B的电压V B为电阻R2上的压降，即高电平，大于NMOS管的导通门限值，因此Q3导通。
Q3导通后，第二分压电路中的节点A被拉低为低电平，Q2的栅极连接节点A，Q2源极连接GND，Q2的栅极与源极的电压差基本为0，因此，Q2截止。
(2)电感L1放电阶段
参见图8，Q1处于截止状态时，节点SW为0V，此时第一分压电路中没有电流流过，电阻R2上没有压降，节点B的电压为0V，Q3截止。Q3截止后，第二分压电路中没有电 流流过，因此，节点A的电压与正输出端的电压相等，即节点A为高电平。
Q2栅极连接节点A，源极连接GND，当Q3截止后，节点A为高电平，此时Q2的栅极与源极的电压差大于NMOS管的导通门限值，因此Q2导通。
电感L1、输出电容Co、负载RL、第二开关管Q2构成闭合回路，L1通过Q2放电，流经L1的电流线性减小，通过输出电容Co及电感电流维持输出电压稳定。
通过合理配置R1～R4的阻值比例，确保L1储能时Q2截止，在L1放电时Q2导通。
在一示例性实施例中，R1与R2的阻值比例约为1:3，R3与R4的阻值比例约为6:1，例如，R1＝100kΩ、R2＝330kΩ、R3＝330kΩ、R4＝51kΩ。以输入电压Vin＝4V，输出电压Vout＝1.8V为例进行说明。
如图7所示，当Q1导通时，节点SW的电压等于输入电压，为4V，第一分压电路对节点SW的电压进行分压，电阻R2上的压降为3.07V，即Q3的栅极电压为3.07V。Q3的源极经R4连接GND，Q3的源极电压近似为0V，因此，Q3的栅极与源极的电压差近似为3.07V，满足Q3的导通条件。
Q3导通后，节点A的电压近似等于R4上的压降约为0.24V(R3和R4对输出电压Vout分压，R4上的压降约为0.24V)，此时Q2的栅极与源极的电压差约为0.24V，因此Q2截止。即，Q1处于导通状态时，Q3导通、Q2截止。
如图8所示，当Q1截止时，节点SW的电压为0V，节点B的电压为0V，因此Q3截止。Q3截止后，节点A的电压被电阻R3上拉至输出电压1.8V，即Q2的栅极电压为1.8V。Q2的源极连接GND，Q2的栅极与源极的电压差为1.8V，因此Q2导通。即，Q1处于截止状态时，Q3截止、Q2导通。
本实施例提供的buck开关电源电路，利用第二开关管Q2代替续流二极管D1，开关管的导通阻抗非常小，只有几十毫欧姆，续流电流通常为几安培，因此，Q2的导通压降为几十毫伏，而续流二极管D1的导通压降为几百毫伏，因此，利用开关管代替续流二极管后，极大地降低了buck开关电源电路的功率损耗，提高了输出效率。而且，该方案利用分立元件组成的控制电路控制第二开关管的导通与截止状态，以实现当第一开关管导通时，第二开关管截止；当第一开关管截止时，第二开关管导通。即该方案无需额外设置PWM控制器，分立元件的成本远低于PWM控制器的成本，从而降低了buck开关电源电路的硬件成本，简化了电路设计。
另一方面，本申请实施例还提供了应用上述开关电源电路的终端设备，如图9所示，该终端设备可以包括：处理器、存储器、显示屏和扬声器。
可以理解的是，本实施例示意的结构并不构成对终端设备的具体限定。在另一些实施例中，终端设备可以包括比图示更多或更少的部件，或者组合某些部件，或者拆分某些部件，或者不同的部件布置。图示的部件可以以硬件，软件或软件和硬件的组合实现。
显示屏用于显示图像、视频等。显示屏可以采用液晶显示屏(liquid crystal display，LCD)、有机发光二极管(organic light-emitting diode，OLED)等，当显示屏采用LCD时，LCD的背光电源采用上述实施例提供的boost开关电源或buck开关电源。
扬声器用于将音频电信号转换为声音信号，扬声器通过功率放大器驱动运行，在本申请实施例中，扬声器的功率放大器的驱动电源采用上述实施例的boost开关电源或buck开 关电源。
存储器用于存储计算机可以执行程序代码，可执行程序代码包括指令。处理器通过运行存储在存储器的指令，从而执行终端设备的各种功能应用以及数据处理。
本实施例提供的终端设备，采用上述的开关电源作为终端设备内LCD或扬声器的功率放大器的驱动电源，上述的开关电源采用第二开关管代替二极管，开关管的导通阻抗非常小，只有几十毫欧姆，因此导通压降从几百毫伏减小至几十毫伏，极大地降低了开关电源电路的功率损耗，提高了输出效率。而且，该方案利用分立元件构成控制电路控制第二开关管的开关状态，无需额外设置PWM控制器，分立元件的成本远低于PWM控制器的成本，从而降低了开关电源的硬件成本，简化了电路设计。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本实施例各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本实施例的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器执行各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：快闪存储器、移动硬盘、只读存储器、随机存取存储器、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (12)

  1. 一种boost开关电源电路，其特征在于，包括：第一电感、第一开关管、第二开关管、控制电路和输出电容；
    所述第一电感的一端连输所述boost开关电源电路的正输入端，所述第一电感的另一端连接所述第一开关管的第一端；
    所述第一开关管的第二端连接接地端，所述第一开关管的控制端连接驱动信号控制器；
    所述第二开关管的第一端连接所述第一电感与所述第一开关管的公共节点，所述第二开关管的第二端连接所述boost开关电源电路的正输出端，所述第二开关管的控制端连接所述控制电路；
    所述控制电路包括第一分压电路和第二分压电路，输出用于控制所述第二开关管的开关状态的控制信号；
    所述第一分压电路并联于所述第一开关管的第一端与第二端之间；
    所述第二分压电路连接于所述输出所述第二开关管的第二端与所述接地端之间，所述第二分压电路包括至少两个串联的电阻，以及串联在所述至少两个电阻之间的第三开关管，所述第三开关管的第一端连接所述第二开关管的控制端，所述第三开关管的控制端连接所述第一分压电路的中间节点；
    所述输出电容并联于所述正输出端与所述接地端之间。
  2. 根据权利要求1所述的boost开关电源电路，其特征在于，所述第一分压电路包括至少两个串联的电阻。
  3. 根据权利要求2所述的boost开关电源电路，其特征在于，所述第一分压电路包括串联连接的第一电阻和第二电阻，所述第一电阻与所述第二电阻的公共节点为所述第一分压电路的中间节点。
  4. 根据权利要求1所述的boost开关电源电路，其特征在于，所述第二分压电路包括串联连接的第三电阻和第四电阻，以及串联于所述第三电阻与所述第四电阻之间的第三开关管；
    所述第三开关管的第一端连接所述第三电阻，所述第三开关管的第二端连接所述第四电阻，所述第三开关管的控制端连接所述第一分压电路的中间节点，所述第三开关管的第一端还连接所述第二开关管的控制端。
  5. 根据权利要求1至4任一项所述的boost开关电源电路，其特征在于，所述第一开关管、所述第二开关管和所述第三开关管均为金属-氧化物半导体场效应晶体管MOS管；
    所述第一端为MOS管的漏极、所述第二端为MOS管的源极，所述控制端为MOS管的栅极。
  6. 根据权利要求5所述的boost开关电源电路，其特征在于，所述第一开关管和所述第三开关管均为NMOS管，所述第二开关管为PMOS管。
  7. 一种buck开关电源电路，其特征在于，包括：第一电感、第一开关管、第二开关管、控制电路和输出电容；
    所述第一开关管的第一端连接所述buck开关电源电路的正输入端，所述第一开关管的 第二端连接所述第一电感的一端，所述第一开关管的控制端连接驱动信号控制器；
    所述第一电感的另一端连接所述buck开关电源电路的正输出端；
    所述第二开关管的第一端连接所述第一开关管与所述第一电感的第一公共节点，所述第二开关管的第二端连接接地端，所述第二开关管的控制端连接所述控制电路；
    所述控制电路包括第一分压电路和第二分压电路，输出用于控制所述第二开关管的开关状态的控制信号；
    所述第一分压电路并联于所述第二开关管的第一端与第二端之间；
    所述第二分压电路连接于所述第一电感的另一端与所述接地端之间，所述第二分压电路包括至少两个串联的电阻，以及串联在所述至少两个电阻之间的第三开关管，所述第三开关管的第一端连接所述第二开关管的控制端，所述第三开关管的控制端连接所述第一分压电路的中间节点；
    所述输出电容并联于所述正输出端与所述接地端之间。
  8. 根据权利要求7所述的buck开关电源电路，其特征在于，所述第一分压电路包括第一电阻和第二电阻，所述第一电阻与所述第二电阻；
    所述第一电阻与所述第二电阻的公共节点为所述第一分压电路的中间节点。
  9. 根据权利要求7所述的buck开关电源电路，其特征在于，所述第二分压电路包括串联连接的第三电阻和第四电阻，以及串联于所述第三电阻与所述第四电阻之间的第三开关管；
    所述第三开关管的第一端连接所述第三电阻，所述第三开关管的第二端连接所述第四电阻，所述第三开关管的控制端连接所述第一分压电路的中间节点，所述第三开关管的第一端还连接所述第二开关管的控制端。
  10. 根据权利要求7至9任一项所述的buck开关电源电路，其特征在于，所述第一开关管、所述第二开关管和所述第三开关管均为金属-氧化物半导体场效应晶体管MOS管；
    所述第一端为MOS管的漏极、所述第二端为MOS管的源极，所述控制端为MOS管的栅极。
  11. 根据权利要求10所述的buck开关电源电路，其特征在于，所述第一开关管、所述第二开关管和所述第三开关管均为NMOS管。
  12. 一种终端设备，其特征在于，所述终端设备包括：权利要求1至6任一项所述的boost开关电源电路，或者，权利要求7至11任一项所述的buck开关电源电路；
    所述boost开关电源电路或所述buck开关电源电路用于为所述终端设备中的待供电模块供电，所述待供电模块包括扬声器功率放大器或LCD背光模块。
PCT/CN2022/139076 2022-01-14 2022-12-14 开关电源电路及终端设备 WO2023134381A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202210041695.2 2022-01-14
CN202210041695.2A CN114679055B (zh) 2022-01-14 2022-01-14 开关电源电路及终端设备

Publications (1)

Publication Number Publication Date
WO2023134381A1 true WO2023134381A1 (zh) 2023-07-20

Family

ID=82071146

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/139076 WO2023134381A1 (zh) 2022-01-14 2022-12-14 开关电源电路及终端设备

Country Status (2)

Country Link
CN (1) CN114679055B (zh)
WO (1) WO2023134381A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117767711A (zh) * 2024-02-22 2024-03-26 杰华特微电子股份有限公司 单向导通电路、桥式驱动电路及开关电源

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114679055B (zh) * 2022-01-14 2023-05-23 荣耀终端有限公司 开关电源电路及终端设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104578772A (zh) * 2014-12-26 2015-04-29 福建联迪商用设备有限公司 一种升压电路
CN106505847A (zh) * 2016-12-02 2017-03-15 西安电子科技大学 适用于升压型dc‑dc的分段软启动电路
CN110391736A (zh) * 2019-07-22 2019-10-29 西安易朴通讯技术有限公司 Buck变换器的控制电路
CN114679055A (zh) * 2022-01-14 2022-06-28 荣耀终端有限公司 开关电源电路及终端设备

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104578772A (zh) * 2014-12-26 2015-04-29 福建联迪商用设备有限公司 一种升压电路
CN106505847A (zh) * 2016-12-02 2017-03-15 西安电子科技大学 适用于升压型dc‑dc的分段软启动电路
CN110391736A (zh) * 2019-07-22 2019-10-29 西安易朴通讯技术有限公司 Buck变换器的控制电路
CN114679055A (zh) * 2022-01-14 2022-06-28 荣耀终端有限公司 开关电源电路及终端设备

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117767711A (zh) * 2024-02-22 2024-03-26 杰华特微电子股份有限公司 单向导通电路、桥式驱动电路及开关电源
CN117767711B (zh) * 2024-02-22 2024-05-24 杰华特微电子股份有限公司 单向导通电路、桥式驱动电路及开关电源

Also Published As

Publication number Publication date
CN114679055A (zh) 2022-06-28
CN114679055B (zh) 2023-05-23

Similar Documents

Publication Publication Date Title
WO2023134381A1 (zh) 开关电源电路及终端设备
CN108270417B (zh) 稳压器以及集成电路
US7839197B2 (en) Level shift circuit
US7098633B1 (en) Boost converter with series switch
US20080309307A1 (en) High Voltage Power Switches Using Low Voltage Transistors
US8013642B2 (en) Output drive circuit
US8044685B2 (en) Floating driving circuit
WO2008069129A1 (ja) 駆動回路及びこれを用いた半導体装置
US7782135B2 (en) Power amplifier
TW201813305A (zh) 增強模式fet閘極驅動器ic
CN113196662A (zh) 级联自举GaN功率开关和驱动器
US11476845B2 (en) Driver circuit, corresponding device and method of operation
CN108429445A (zh) 一种应用于电荷泵的软启动电路
US6995483B2 (en) Synchronous buck and boost regulator power reduction circuit using high side sensing
CN109921779B (zh) 一种半桥电路直通保护电路
CN104124951B (zh) 用于驱动晶体管的电路
US11791815B2 (en) Driver circuit, corresponding device and method of operation
WO2021057450A1 (zh) 开关变换器及其低压启动电路
TWI692927B (zh) 電力電路以及驅動電路
JPH11330376A (ja) チャージポンプ式駆動回路
US9467122B2 (en) Switching scheme to extend maximum input voltage range of a DC-to-DC voltage converter
TWI484743B (zh) 以低壓驅動之升壓電路與相關方法
US9065437B2 (en) Circuit for driving high-side transistor utilizing voltage boost circuits
CN114189151B (zh) Dc-dc升压变换器
US11777497B1 (en) Efficiency concept for driving a PMOS and NMOS full-bridge power stage

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22920013

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 22 920 013.4

Country of ref document: EP