WO2023116050A1 - Circuit d'attaque de relais - Google Patents

Circuit d'attaque de relais Download PDF

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Publication number
WO2023116050A1
WO2023116050A1 PCT/CN2022/116964 CN2022116964W WO2023116050A1 WO 2023116050 A1 WO2023116050 A1 WO 2023116050A1 CN 2022116964 W CN2022116964 W CN 2022116964W WO 2023116050 A1 WO2023116050 A1 WO 2023116050A1
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WO
WIPO (PCT)
Prior art keywords
signal
relay
module
output
trigger
Prior art date
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PCT/CN2022/116964
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English (en)
Chinese (zh)
Inventor
李强
叶太强
汤殷霞
李闯
Original Assignee
联合汽车电子有限公司
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Application filed by 联合汽车电子有限公司 filed Critical 联合汽车电子有限公司
Publication of WO2023116050A1 publication Critical patent/WO2023116050A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
    • H01H47/02—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
    • H01H47/18—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay for introducing delay in the operation of the relay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
    • H01H47/02—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay

Definitions

  • the invention relates to the technical field of relay driving, in particular to a driving circuit of a relay.
  • Electric vehicles usually use high-voltage power batteries to provide power.
  • the battery system needs to provide different power supply circuits. For example, when the vehicle is running, the discharge circuit needs to be connected; when the battery is charging, the charging circuit needs to be connected; when the battery is heated , the heating circuit needs to be switched on. In order to ensure the control of these different circuits, it is necessary to control the on-off of the high-voltage relay in the circuit according to the requirements.
  • a delay module is generally added between the processor of the relay drive circuit and the high-voltage relay.
  • the function of the delay module is that when the processor is reset, It can keep the high-voltage relay closed for a period of time to ensure that the vehicle power is not lost. When the processor completes the reset, it takes over the control of the high-voltage relay.
  • the delay module is abnormally enabled, it will lead to unexpected combination of high-voltage relays, unexpected high-voltage power supply to the vehicle, resulting in safety accidents such as vehicle acceleration or electric shock, and the safety and robustness of the system are poor.
  • the delay holding function of the delay module due to the delay holding function of the delay module, there is still a large current on the high-voltage relay when the vehicle is running.
  • the power supply of the high-voltage relay drops for a short time, which will cause the high-voltage relay to be connected immediately after disconnection Burn out the high-voltage relay; at the same time, if the power supply of the delay module drops, causing the delay module to not work normally, the high-voltage relay may malfunction due to the delay module.
  • the purpose of the present invention is to provide a driving circuit of a relay, which can turn off the time-delay holding function of the driving circuit of the relay when needed.
  • the present invention provides a driving circuit for a relay, comprising:
  • a processing module configured to output an enabling signal
  • a delay module connected to the output terminal of the processing module, for delaying the enable signal to output a delayed signal
  • a trigger module configured to output a valid trigger signal according to a predetermined trigger condition
  • An enabling module connected to the output terminals of the processing module, the delay module, and the trigger module, for controlling the relay to close when the enabling signal or the delay signal is valid, and when the The relay is controlled to be turned off when the trigger signal is valid during the reset process of the processing module.
  • a power supply module at least for providing a power supply voltage to the delay module
  • a relay driving module connected to the output terminal of the enabling module, and used to output a driving signal to control the on-off of the relay according to the output signal of the enabling module;
  • the trigger condition includes that the supply voltage is lower than a first reference voltage and/or the voltage of the driving signal is lower than a second reference voltage.
  • the trigger module includes:
  • a first comparator the first input terminal of the first comparator is connected to the output terminal of the power supply module, the second input terminal of the first comparator is connected to the first reference voltage, and the first comparator
  • the device is used to compare the power supply voltage and the first reference voltage, and output a valid first comparison signal when the power supply voltage is lower than the first reference voltage;
  • the second comparator the first input terminal of the second comparator is connected to the output terminal of the relay driving module, the second input terminal of the second comparator is connected to the second reference voltage, and the second The comparator is used to compare the voltage of the driving signal with the second reference voltage, and output a valid second comparison signal when the voltage of the driving signal is lower than the second reference voltage;
  • the first OR gate is connected to the output terminals of the first comparator and the second comparator, and is used for performing an OR operation on the first comparison signal and the second comparison signal, and performing an OR operation on the first comparison signal output a valid trigger signal when the signal or the second comparison signal is valid.
  • the trigger module includes:
  • a first comparator the first input terminal of the first comparator is connected to the output terminal of the power supply module, the second input terminal of the first comparator is connected to the first reference voltage, and the first comparator
  • the device is used to compare the power supply voltage with the first reference voltage, and output the valid trigger signal when the power supply voltage is lower than the first reference voltage; or,
  • the second comparator the first input terminal of the second comparator is connected to the output terminal of the relay driving module, the second input terminal of the second comparator is connected to the second reference voltage, and the second The comparator is used for comparing the voltage of the driving signal with the second reference voltage, and outputting the valid trigger signal when the voltage of the driving signal is lower than the second reference voltage.
  • the enabling module includes:
  • the input end of the latch is connected to the output end of the processing module, the reset end of the latch is connected to the trigger signal, and when the trigger signal is invalid, the latch is in In a latch state, when the trigger signal is valid, the latch is in a reset state;
  • An AND gate connected to the delay module and the output terminal of the latch, is used to perform an AND operation on the delay signal and the output signal of the latch;
  • the second OR gate is connected to the processing module and the output terminal of the AND gate, and is used to perform an OR operation on the enable signal and the output signal of the AND gate, and output a logic signal to control the on-off of the relay .
  • the relay is a bilaterally controlled relay
  • the delay module, the relay drive module, the AND gate and the second OR gate all have two groups, which are respectively used to control the high sides and low sides;
  • the trigger condition includes that the supply voltage is lower than a first reference voltage and/or the voltage of the high-side driving signal is lower than a second reference voltage.
  • the output terminal of the latch is provided with a first sampling point, and the processing module collects the signal on the first sampling point in real time; and/or, the output terminal of the AND gate is provided with For a second sampling point, the processing module collects the signal at the second sampling point in real time.
  • the relay is a unilaterally controlled relay.
  • the relay driving circuit is used to drive at least two of the relays, and the operating voltages of the relays are the same or different.
  • the relay shares the trigger module, the delay module, the latch and the AND gate;
  • the trigger condition includes that the power supply voltage is lower than a first reference voltage and/or the voltage of the driving signal corresponding to any one of the relays is lower than the corresponding second reference voltage.
  • the driving circuit of the relay includes a processing module, a delay module, a trigger module and an enabling module, the processing module is used to output an enabling signal, and the delay module is used to Delaying to output a delayed signal, the trigger module is used to output a valid trigger signal according to a predetermined trigger condition during the reset process of the processing module, and the enable module is used to output a valid trigger signal when the enable signal or the When the delay signal is valid, the relay is controlled to be closed, and when the trigger signal is valid, the relay is controlled to be disconnected.
  • the present invention presets trigger conditions through the trigger module, and when the trigger conditions are satisfied, the trigger module can output the valid trigger signal, and the enable module can reset the processing module according to the
  • the trigger signal controls the disconnection of the relay, which is equivalent to turning off the delay hold function of the delay module as required during the reset process of the processing module, thereby protecting the drive circuit of the relay.
  • the trigger condition includes that the power supply voltage is lower than the first reference voltage and/or the voltage of the drive signal is lower than the second reference voltage, so as to prevent the power supply of the relay from occurring during the reset process of the processing module.
  • the relay When falling for a short time, the relay will be combined immediately after being disconnected, causing the problem of burning out the relay; at the same time, it can also prevent the delay module from not working normally when the power supply of the delay module drops, causing the The relay is due to the malfunction of the delay module.
  • Fig. 1 is the circuit diagram of the driving circuit of the relay that the embodiment 1 of the present invention provides;
  • Embodiment 2 is a specific circuit diagram of an enabling module and a triggering module provided by Embodiment 1 of the present invention
  • FIG. 3 is a partial schematic diagram of a drive circuit of a relay provided in Embodiment 2 of the present invention.
  • FIG. 4 is a partial schematic diagram of a drive circuit of a relay provided in Embodiment 3 of the present invention.
  • FIG. 5 is a partial schematic diagram of a drive circuit of a relay provided in Embodiment 4 of the present invention.
  • 10-processing module 20, 21, 22-delay module; 30-enabling module; 31-latch; 32, 321, 322-AND gate; 33, 331, 332, 333, 334, 335, 336- 2nd OR gate; 40-trigger module; 41-first comparator; 42-second comparator; 43-first OR gate; 50, 51, 52, 53, 54, 55, 56-relay drive module; 60 - power supply modules; 70, 71, 72, 73, 74 - relays;
  • FIG. 1 is a circuit diagram of a driving circuit of a relay provided in this embodiment.
  • the relay driving circuit includes a processing module 10 , a delay module 20 , an enabling module 30 , a trigger module 40 , a relay driving module 50 and a power supply module 60 .
  • the driving circuit of the relay is used to drive a single relay 70, and the relay 70 is a unilaterally controlled relay.
  • the relay 70 driven by the drive circuit of the relay is a high-voltage relay in a battery management system (Battery Management System, BMS), but it should not be limited thereto.
  • BMS Battery Management System
  • the drive circuit of the relay can be used for Drive any possible relay.
  • the processing module 10 is configured to output an enable signal En to control the relay 70 to be powered on at high voltage or at low voltage.
  • the enable signal En output by the processing module 10 is simplified as one signal, but it should be understood that the enable signal En output by the processing module 10 may be one or more, No more details here.
  • the delay module 20 is connected to the output end of the processing module 10 for accessing the enable signal En and delaying the enable signal En to output a delay signal Delay.
  • the delay module 20 can be, for example, a circuit that uses the charging and discharging effect of a capacitor to delay time.
  • the enable signal En is invalid, the capacitor in the delay module 20 starts to charge, and the voltage at both ends of the capacitor starts to rise.
  • the delay signal Delay output by the delay module 20 is invalid until it is fully charged.
  • the enable signal En is valid; the capacitor in the delay module 20 starts to discharge, and the voltage at both ends of the capacitor starts to drop until the delay signal Delay output by the delay module 20 becomes valid after the discharge is completed. It can be seen that the delay module 20 can realize the function of delay output, and the delay time is the time for charging and discharging the capacitor.
  • the power supply module 60 is used to provide a power supply voltage V1 for the delay module 20 to ensure the normal operation of the delay module 20 .
  • the power supply module 60 can not only supply power to the delay module 20, but also provide a power supply voltage to the processing module 10, and the power supply voltage V1 provided to the delay module 20 can be the same as The power supply voltages provided by the processing module 10 are the same or different.
  • the power supply module 60 can also supply power to other modules in the drive circuit of the relay, which will not be illustrated here one by one.
  • a trigger condition is preset in the trigger module 40, and the trigger module 40 can output a valid trigger signal CP according to the preset trigger condition.
  • the trigger conditions can be designed according to actual needs, which will be described in detail below.
  • the enable module 30 is connected to the output terminals of the processing module 10, the delay module 20 and the trigger module 40 for accessing the enable signal En, the delay signal Delay and the trigger signal CP, and output a logic signal Logic that can be used to control the on-off of the relay 70 according to the enable signal En, the delay signal Delay and the trigger signal CP.
  • the enable module 30 may output a valid logic signal Logic to control the relay 70 to close when the enable signal En or the delay signal Delay is valid, and when the enable signal En or the delay signal Delay When the delay signal Delay is invalid, an invalid logic signal Logic is output to control the relay 70 to turn off, and when the trigger signal CP is valid during the reset process of the processing module 10, an invalid logic signal Logic is output to control the relay 70 disconnect.
  • the relay driving module 50 is connected to the output end of the enabling module 30 for accessing the logic signal Logic, and outputs a driving signal Vout according to the logic signal Logic, and the relay 70 is connected to the relay driving module 50
  • the output end of the drive signal Vout is connected to the drive signal Vout, and is turned on or off under the control of the drive signal Vout.
  • the driving signal Vout is an analog signal
  • the relay driving module 50 will output the driving signal Vout whose voltage is greater than or equal to the second reference voltage Vref2, thereby controlling the The relay 70 is closed, and when the logic signal Logic is invalid, the relay driving module 50 outputs the driving signal Vout with a voltage lower than the second reference voltage Vref2 to control the relay 70 to be turned off.
  • the second reference voltage Vref2 can be designed according to the operating voltage of the relay 70, for example, the operating voltage of the relay 70 can be 5V, the second reference voltage Vref2 can be set to 3.5V, when the driving When the voltage of the signal Vout is greater than or equal to 3.5V, the relay 70 can be controlled to close, and when the voltage of the driving signal Vout is less than 3.5V, the relay 70 can be turned off.
  • the trigger condition can be designed according to the power supply drop of the delay module 20 and the power supply drop of the relay 70.
  • the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the voltage of the driving signal Vout is lower than the second reference voltage Vref2, that is, when the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the voltage of the driving signal Vout is lower than
  • the trigger module 40 will output an effective trigger signal CP, thereby controlling the relay 70 to be disconnected, preventing the power supply of the relay 70 from short-circuiting during the reset process of the processing module 10.
  • the relay 70 When the time drops, the relay 70 will be combined immediately after disconnection, causing the problem of burning out the relay 70; at the same time, it can also prevent the delay module 20 from not working properly when the power supply of the delay module 20 drops. This leads to the problem that the relay 70 malfunctions due to the delay module 20 .
  • the trigger condition is not limited to this, and may also be other possible trigger conditions, which will not be explained one by one here.
  • the trigger condition is preset through the trigger module 40.
  • the trigger module 40 can output the effective trigger signal CP, and the enabling module 30 can control the relay 70 to be disconnected according to the trigger signal CP during the reset process of the processing module 10, which is equivalent to During the reset process of the processing module 10, the delay holding function of the delay module 20 is turned off as required, so as to protect the driving circuit of the relay.
  • FIG. 2 is a specific circuit diagram of the enabling module 30 and the triggering module 40 provided in this embodiment.
  • the trigger module 40 includes a first comparator 41 , a second comparator 42 and a first OR gate 43 .
  • the first input end of the first comparator 41 is connected to the output end of the power supply module 60 for accessing the power supply voltage V1; the second input end of the first comparator 41 is connected to the The first reference voltage Vref1, the first comparator 41 is used to compare the power supply voltage V1 and the first reference voltage Vref1, and output a valid voltage when the power supply voltage V1 is lower than the first reference voltage Vref1 first compare signal.
  • the first input end of the second comparator 42 is connected to the output end of the relay driving module 50 for accessing the drive signal Vout, and the second input end of the second comparator 42 is connected to the first Two reference voltages Vref2, the second comparator 42 is used to compare the voltage of the driving signal Vout with the second reference voltage Vref2, and when the voltage of the driving signal Vout is lower than the second reference voltage Vref2 Output a valid second comparison signal.
  • the first OR gate 43 is connected to the output terminals of the first comparator 41 and the second comparator 42, for accessing the first comparison signal and the second comparison signal, for the An OR operation is performed on the first comparison signal and the second comparison signal, and a valid trigger signal CP is output when the first comparison signal or the second comparison signal is valid.
  • the trigger module 40 can output a valid The trigger signal CP, in other cases, the trigger module 40 outputs the trigger signal CP that is invalid.
  • the trigger module 40 may only include a first comparator 41, and the first input terminal of the first comparator 41 is connected to the output terminal of the power supply module 60 for accessing the power supply voltage V1; the second input terminal of the first comparator 41 is connected to the first reference voltage Vref1, and the first comparator 41 is used to compare the power supply voltage V1 and the first reference voltage Vref1, and When the power supply voltage V1 is lower than the first reference voltage Vref1, the trigger signal CP is valid. In this way, when the power supply voltage V1 is lower than the first reference voltage Vref1, the trigger module 40 can output the valid trigger signal CP; in other cases, the trigger module 40 can output the invalid trigger signal CP. Trigger signal CP.
  • the trigger module 40 may only include a second comparator 42, the first input terminal of the second comparator 42 is connected to the output terminal of the relay drive module 50 for connecting the drive signal Vout, the second input terminal of the second comparator 42 is connected to the second reference voltage Vref2, and the second comparator 42 is used to compare the voltage of the driving signal Vout with the second reference voltage Vref2 , and output the effective trigger signal CP when the voltage of the driving signal Vout is lower than the second reference voltage Vref2. In this way, when the voltage of the driving signal Vout is lower than the second reference voltage Vref2, the trigger module 40 can output the valid trigger signal CP, and in other cases, the trigger module 40 can output an invalid The trigger signal CP.
  • the enabling module 30 includes a latch 31 , an AND gate 32 and a second OR gate 33 .
  • the input terminal D of the latch 31 is connected to the output terminal of the processing module 10 for accessing the enable signal En, and the reset terminal E of the latch 31 is connected to the trigger signal CP, when When the trigger signal CP is invalid, the latch 31 is in a latch state, and when the trigger signal CP is active, the latch 31 is in a reset state.
  • the AND gate 32 is connected to the delay module 20 and the output terminal Y of the latch 31 for accessing the delay signal Delay and the output signal of the latch 31 and delaying the delay An AND operation is performed on the signal Delay and the output signal of the latch 31 .
  • the second OR gate 33 is connected to the processing module 10 and the output end of the AND gate 32, and is used for accessing the enable signal En and the output signal of the AND gate 32 and controlling the enable signal En. and the output signal of the AND gate 32 to perform an OR operation, and output the logic signal Logic.
  • the enable signal En, the delay signal Delay, the logic signal Logic and the trigger signal CP are all digital signals.
  • the sequence of the triggering module 40 and the enabling module 30 will be described in detail assuming that the digital signal is valid when it is “1” and invalid when it is "0".
  • the enable signal En is “1"
  • the second OR gate 33 outputs The logic signal Logic is "1”
  • the relay drive module 50 outputs the drive signal Vout to control the relay 70 to close.
  • the enable signal En is "0"
  • the delay signal Delay becomes “0” after the delay time "
  • the latch 31 is in the latched state (the enable signal En when the latch is powered on)
  • the output of the latch 31 is "1”
  • the output of the AND gate 32 is delayed becomes “0” after the time elapses
  • the logic signal Logic output by the second OR gate 33 becomes “0” after the delay time elapses
  • the relay drive module 50 outputs the drive signal Vout to control the relay 70 disconnect.
  • the The first OR gate 43 outputs an effective trigger signal CP
  • the latch 31 is in a reset state
  • the output of the latch 31 immediately becomes "0”
  • the output of the AND gate 32 immediately becomes "0”
  • the logic signal Logic output by the second OR gate 33 immediately becomes “0”
  • the relay driving module 50 immediately outputs the driving signal Vout to control the relay 70 to turn off.
  • the enable module 30 can control the relay 70 to close when the enable signal En or the delay signal Delay is valid, and when the trigger signal CP is valid during the reset process of the processing module 10
  • the relay 70 is controlled to be turned off.
  • the output terminal Y of the latch 31 is provided with a first sampling point K1, and the processing module 10 collects the signal on the first sampling point K1 in real time; and/or, the AND gate 32
  • a second sampling point K2 is set on the output end, and the processing module 10 collects the signal on the second sampling point K2 in real time. Since the signal on the first sampling point K1 can represent the output signal of the latch 31, the signal on the second sampling point K2 can represent the delay signal Delay and the output of the latch 31 signal, the processing module 10 can diagnose the fault of the latch 31 or the delay module 20 by collecting the signals at the first sampling point K1 and the second sampling point K2 in real time.
  • FIG. 3 is a partial schematic diagram of the driving circuit of the relay provided in this embodiment.
  • the relay 70 is a bilaterally controlled relay, and the delay module, the relay drive module, the AND gate and the second Each OR gate has two groups, which are respectively used to control the high side and low side of the relay 70 .
  • the delay module includes a delay module 21 and a delay module 22, the relay driver module includes a relay driver module 51 and a relay driver module 52, and the AND gate includes an AND gate 321 and an AND gate 322, so
  • the second OR gate includes a second OR gate 331 and a second OR gate 332 .
  • the delay module 21 and the delay module 22 are connected to the output end of the processing module 10 for accessing the enable signal En, and the delay module 21 and the delay module 22 are respectively based on The enable signal En outputs the delay signal Delay1 and the delay signal Delay2.
  • the AND gate 321 is connected to the delay module 21 and the output terminal Y of the latch 31 for accessing the delay signal Delay1 and the output signal of the latch 31 and delaying the delay
  • the signal Delay1 is ANDed with the output signal of the latch 31;
  • the AND gate 322 is connected to the delay module 22 and the output terminal Y of the latch 31 for accessing the delay signal Delay2 and the output signal of the latch 31 and perform an AND operation on the delay signal Delay2 and the output signal of the latch 31 .
  • the second OR gate 331 is connected to the processing module 10 and the output end of the AND gate 321, and is used for accessing the enable signal En and the output signal of the AND gate 321 and performing an operation on the enable signal En.
  • the second OR gate 332 is connected to the processing module 10 and the output end of the AND gate 322 for accessing the The enable signal En and the output signal of the AND gate 322 perform an OR operation on the enable signal En and the output signal of the AND gate 322 to output the logic signal Logic2.
  • the relay driving module 51 and the relay driving module 52 are respectively connected to the output terminals of the second OR gate 331 and the second OR gate 332, and output the output terminals according to the logic signal Logic1 and the logic signal Logic2 respectively.
  • the driving signal Vout1 and the driving signal Vout2 jointly drive the high side and the low side of the relay 70 .
  • the high side and the low side of the relay 70 share the trigger module 40 and the latch 31, and the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or Or the voltage of the driving signal Vout1 of the high side of the relay 70 is lower than the second reference voltage Vref2. Therefore, the first input terminal of the second comparator 42 can be connected to the output terminal of the relay driving module 51 for accessing the driving signal Vout1, and the second comparator 42 is used for comparing the driving signal the voltage of Vout1 and the second reference voltage Vref2, and output a valid second comparison signal when the voltage of the driving signal Vout1 is lower than the second reference voltage Vref2.
  • the output terminals of the AND gate 321 and the AND gate 322 are respectively provided with a second sampling point K21 and a second sampling point K22, since the signal on the first sampling point K1 can represent The output signal of the latch 31, the signal on the second sampling point K21 can represent the delay signal Delay1 and the output signal of the latch 31, and the signal on the second sampling point K22
  • the delay signal Delay2 and the output signal of the latch 31 can also be characterized, and the processing module 10 collects the first sampling point K1, the second sampling point K21 and the second sampling point in real time
  • the signal on K22 can perform fault diagnosis on the latch 31 , the delay module 21 and the delay module 22 .
  • FIG. 4 is a partial schematic diagram of the driving circuit of the relay provided in this embodiment. As shown in FIG. 4 , the difference from Embodiment 1 is that in this embodiment, the relay driving circuit is used to drive two unilaterally controlled relays, and the working voltages of the two relays may be the same or different.
  • the relays include a relay 71 and a relay 72 , and the relay 71 and the relay 72 share the trigger module 40 , the delay module 20 , the latch 31 and the AND gate 32 .
  • Both the second OR gate and the relay drive module have two groups, the second OR gate includes a second OR gate 333 and the second OR gate 334, and the relay drive module includes a relay drive module 53 and a relay drive module 54.
  • the second OR gate 333 is connected to the processing module 10 and the output end of the AND gate 32, and is used for accessing the enable signal En and the output signal of the AND gate 32 and performing an operation on the enable signal En. and the output signal of the AND gate 32 to perform an OR operation, and output the logic signal Logic3;
  • the second OR gate 334 is connected to the processing module 10 and the output end of the AND gate 32 for accessing the The enable signal En and the output signal of the AND gate 32 perform an OR operation on the enable signal En and the output signal of the AND gate 32 to output the logic signal Logic4.
  • the relay driving module 53 and the relay driving module 54 are respectively connected to the output terminals of the second OR gate 333 and the second OR gate 334, and output driving signals according to the logic signal Logic3 and the logic signal Logic4 respectively.
  • the driving signal Vout3 and the driving signal Vout4 respectively drive the relay 71 and the relay 72 .
  • the working voltages of the relay 71 and the relay 72 are the same, and the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the voltage of the driving signal Vout3 is lower than The second reference voltage Vref2; or, the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the voltage of the driving signal Vout4 is lower than the second reference voltage Vref2.
  • the first input terminal of the second comparator 42 can be connected to the output terminal of the relay driving module 53 for accessing the driving signal Vout3, and the second comparator 42 is used for comparing the driving signal the voltage of Vout3 and the second reference voltage Vref2, and output a valid second comparison signal when the voltage of the driving signal Vout3 is lower than the second reference voltage Vref2; or, the first comparator 42 of the second comparator 42 An input terminal can be connected to the output terminal of the relay driving module 54 for accessing the driving signal Vout4, and the second comparator 42 is used for comparing the voltage of the driving signal Vout4 with the second reference voltage Vref2 , and output a valid second comparison signal when the voltage of the driving signal Vout4 is lower than the second reference voltage Vref2.
  • the value of the second reference voltage Vref2 inputted by the second input terminal of the second comparator 42 should be the same as that of the relay 71 and the relay 72.
  • the operating voltage of the relay 71 is 5V.
  • the relay 71 can be controlled to close.
  • the operating voltage of the relay 72 is 10V.
  • the voltage of the driving signal Vout4 When the voltage is greater than 8V, the relay 72 can be controlled to close.
  • the second input terminal of the second comparator 42 When the first input terminal of the second comparator 42 is connected to the output terminal of the relay drive module 53, the second input terminal of the second comparator 42 The input value of the second reference voltage Vref2 should be 3.5V; when the first input terminal of the second comparator 42 is connected to the output terminal of the relay drive module 54, the second comparator 42 of the second The value of the second reference voltage Vref2 input by the two input terminals should be 8V.
  • the driving circuit of the relay is not limited to driving two unilaterally controlled relays, and may also drive three or more unilaterally controlled relays.
  • FIG. 5 is a partial schematic diagram of the driving circuit of the relay provided in this embodiment. As shown in Figure 5, the difference from Embodiment 2 is that in this embodiment, the relay driving circuit is used to drive two bilaterally controlled relays, and the working voltages of the two relays may be the same or different.
  • the relay includes a relay 73 and a relay 74, and the relay 73 and the relay 74 share the trigger module 40, the delay module 21, the delay module 22, and the latch 31. , the AND gate 321 and the AND gate 322 .
  • the second OR gate and the relay drive module each have four groups, the relay 73 and the relay 74 respectively correspond to two groups of the second OR gate and the relay drive module, and each two groups of the second OR gate
  • the OR gate and the relay driving module are used to control the high side and the low side of the relay 73 and the relay 74 respectively.
  • the second OR gate includes a second OR gate 331, a second OR gate 332, a second OR gate 335, and a second OR gate 336
  • the relay drive module includes a relay drive module 51, a relay drive module 52 , a relay driving module 55 , and a relay driving module 56 .
  • Both the second OR gate 331 and the second OR gate 335 are connected to the processing module 10 and the output end of the AND gate 321 for accessing the enable signal En and the output of the AND gate 321 signal and perform an OR operation on the enable signal En and the output signal of the AND gate 321, and output the logic signal Logic1 and the logic signal Logic5 respectively;
  • the second OR gate 332 and the second OR gate 336 Connect the processing module 10 and the output end of the AND gate 322, for accessing the enable signal En and the output signal of the AND gate 322 and controlling the enable signal En and the AND gate 322 An OR operation is performed on the output signal, and the logic signal Logic2 and the logic signal Logic6 are respectively output.
  • the relay driving module 51 and the relay driving module 52 are respectively connected to the output terminals of the second OR gate 331 and the second OR gate 332, and output the output terminals according to the logic signal Logic1 and the logic signal Logic2 respectively.
  • the driving signal Vout1 and the driving signal Vout2, the driving signal Vout1 and the driving signal Vout2 jointly drive the high side and the low side of the relay 73 .
  • the relay drive module 55 and the relay drive module 56 are respectively connected to the output terminals of the second OR gate 335 and the second OR gate 336, and output the output terminals according to the logic signal Logic5 and the logic signal Logic6 respectively.
  • the driving signal Vout5 and the driving signal Vout6 , the driving signal Vout5 and the driving signal Vout6 jointly drive the high side and the low side of the relay 74 .
  • the working voltages of the relay 73 and the relay 74 are the same, and the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the driving of the high side of the relay 73 The voltage of the signal Vout1 is lower than the second reference voltage Vref2; or, the trigger condition includes that the power supply voltage V1 is lower than the first reference voltage Vref1 and/or the driving signal Vout5 of the high side of the relay 74 The voltage is lower than the second reference voltage Vref2.
  • the first input terminal of the second comparator 42 can be connected to the output terminal of the relay driving module 51 for accessing the driving signal Vout1, and the second comparator 42 is used for comparing the driving signal the voltage of Vout1 and the second reference voltage Vref2, and output a valid second comparison signal when the voltage of the driving signal Vout1 is lower than the second reference voltage Vref2; or, the first comparator 42 of the second comparator 42 An input terminal can be connected to the output terminal of the relay driving module 55 for accessing the driving signal Vout5, and the second comparator 42 is used for comparing the voltage of the driving signal Vout5 with the second reference voltage Vref2 , and output a valid second comparison signal when the voltage of the driving signal Vout5 is lower than the second reference voltage Vref2.
  • the value of the second reference voltage Vref2 inputted by the second input terminal of the second comparator 42 should be the same as that of the relay 73 and the relay 74.
  • the operating voltage of the relay 73 is 5V.
  • the relay 73 can be controlled to close.
  • the operating voltage of the relay 74 is 10V.
  • the voltage of the driving signal Vout5 When the voltage is greater than 8V, the relay 72 can be controlled to close.
  • the second input terminal of the second comparator 42 When the first input terminal of the second comparator 42 is connected to the output terminal of the relay drive module 51, the second input terminal of the second comparator 42 The input value of the second reference voltage Vref2 should be 3.5V; when the first input terminal of the second comparator 42 is connected to the output terminal of the relay drive module 55, the second comparator 42 of the second The value of the second reference voltage Vref2 input by the two input terminals should be 8V.
  • the driving circuit of the relay is not limited to driving two bilaterally controlled relays, and can also drive three or more bilaterally controlled relays.
  • the driving circuit of the relay includes a processing module, a delay module, a trigger module and an enabling module, the processing module is used to output the enable signal, and the delay module is used to The enable signal is delayed to output a delayed signal, and the trigger module is used to output a valid trigger signal according to a predetermined trigger condition during the reset process of the processing module.
  • the enable signal or the delay signal is valid, the relay is controlled to be closed, and when the trigger signal is valid, the relay is controlled to be disconnected.
  • the present invention presets trigger conditions through the trigger module, and when the trigger conditions are satisfied, the trigger module can output the valid trigger signal, and the enable module can reset the processing module according to the
  • the trigger signal controls the disconnection of the relay, which is equivalent to turning off the delay hold function of the delay module as required during the reset process of the processing module, thereby protecting the drive circuit of the relay.
  • the trigger condition includes that the power supply voltage is lower than the first reference voltage and/or the driving signal voltage is lower than the second reference voltage, so as to prevent the relay from shutting down when the power supply of the relay drops for a short time. Combined immediately after opening, causing the problem of burning out the relay; at the same time, it can also prevent the delay module from not working properly when the power supply of the delay module drops, causing the relay to malfunction due to the delay module The problem.
  • each embodiment in this specification is described in a progressive manner, each embodiment focuses on the differences from other embodiments, and the same and similar parts of each embodiment can be referred to each other.
  • the description is relatively simple, and for relevant information, please refer to the description of the method part.

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Abstract

La présente invention concerne un circuit d'attaque d'un relais. Le circuit d'attaque comprend un module de traitement, un module de retard, un module de déclenchement et un module d'activation. Le module de traitement est utilisé pour délivrer en sortie un signal d'activation, le module de retard est utilisé pour retarder le signal d'activation pour délivrer un signal de retard, le module de déclenchement est utilisé pour délivrer un signal de déclenchement actif selon une condition de déclenchement prédéfinie pendant un processus de réinitialisation du module de traitement, et le module d'activation est utilisé pour commander la fermeture d'un relais lorsque le signal d'activation ou le signal de retard est actif et pour commander la déconnexion du relais lorsque le signal de déclenchement est actif. Dans la présente invention, la condition de déclenchement est prédéfinie au moyen du module de déclenchement. Lorsque la condition de déclenchement est satisfaite, le module de déclenchement peut délivrer le signal de déclenchement actif, et le module d'activation peut commander la déconnexion du relais en fonction du signal de déclenchement pendant le processus de réinitialisation du module de traitement. C'est-à-dire, pendant le processus de réinitialisation du module de traitement, une fonction de maintien de retard du module de retard peut être désactivée selon les besoins, de telle sorte que le circuit d'attaque du relais est protégé.
PCT/CN2022/116964 2021-12-20 2022-09-05 Circuit d'attaque de relais WO2023116050A1 (fr)

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CN117080018B (zh) * 2023-09-27 2024-01-19 德力西电气有限公司 一种接触器线圈控制系统

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