WO2023115635A1 - Ate测试仪框式设备及其串口统一收集的方法 - Google Patents

Ate测试仪框式设备及其串口统一收集的方法 Download PDF

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WO2023115635A1
WO2023115635A1 PCT/CN2021/143533 CN2021143533W WO2023115635A1 WO 2023115635 A1 WO2023115635 A1 WO 2023115635A1 CN 2021143533 W CN2021143533 W CN 2021143533W WO 2023115635 A1 WO2023115635 A1 WO 2023115635A1
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serial port
line card
host
data
port communication
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PCT/CN2021/143533
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English (en)
French (fr)
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徐波波
何冬晓
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上海御渡半导体科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002—Serial port, e.g. RS232C
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Definitions

  • the invention relates to the field of semiconductor automatic test equipment (Automatic Test Equipment, referred to as ATE), in particular to a frame-type equipment of an ATE tester and a unified collection method for serial ports thereof.
  • ATE Automatic Test Equipment
  • Serial communication also known as UART (Universal Asynchronous Receiver/Transmitter)
  • UART Universal Asynchronous Receiver/Transmitter
  • the frame format of UART communication is as follows:
  • the frame format of UART communication includes start field, data field, parity check field and end field.
  • the start field occupies 1 bit. When the bus is idle, it sends 1, and the start bit sends 0, indicating the start of communication; the data field generally has 5 to 9 bits, which are valid data characters, and generally transmit the valid ASCII code of the data.
  • the frame data transmits 1 ASCII code; the parity check field occupies 0 or 1 bit, and this character field is optional for the parity check of the data; the end field occupies 1 or 2 bits, and at the end character position, the bus is pulled high to indicate a frame Data transmission is complete.
  • UART communication is asynchronous transmission and does not require an accompanying clock; the level standard adopts RS232 level, which can effectively prevent interference.
  • the common communication methods are as follows:
  • the UART communication process is as follows:
  • the host encapsulates the data according to the UART frame format, and the RS232 transceiver receives the data transmitted by the host, and converts the level into a common RS232 standard, and sends it to the peer device through the connector and the interconnection cable;
  • the RS232 transceiver receives the data on the link, converts the signal from RS232 to a level recognizable by the host, and the host analyzes the data frame and sends it to the upper application.
  • UART communication can be mainly used for information collection and configuration delivery of the single board.
  • the serial port line is not standardly equipped at the customer site, and it becomes inconvenient for the on-site maintenance personnel to access the board through the serial port.
  • the object of the present invention is to provide a unified collection method for the ATE tester frame equipment and serial ports of the present invention, which can be connected to the network protocol such as SSH based on the default customer site environment without adding cables
  • the serial ports of different single boards are managed centrally to access all line card side boards (Line Card 1 , Line Card 2 ...Line Card N ) in the ATE testing machine.
  • a framed device of an ATE tester, used for remote collection of serial port information including:
  • N line card side boards (Line Card 1 , Line Card 2 ...Line Card N ), each of which includes a host and a serial port communication module;
  • a main control board which includes a serial port communication Hub module, a host 0 and a sending/receiving module;
  • a host computer is used to communicate with the sending/receiving module of the main control board;
  • the M blocks in the line card side plates (Line Card 1 , Line Card 2 ... Line Card N ) of the N blocks send the M serial port communication data to the serial port communication Hub module through their corresponding serial port communication modules;
  • the serial port communication Hub module selects the line card side board currently performing serial port communication with the host 0 according to the first priority processing rule; after the sending/receiving module receives the serial port communication service, it passes the communication link way, send the serial port communication data of the line card side board to the host computer, and send back the serial port communication data of the line card side board by the host computer, and feed back through the host 0 and the serial port communication Hub module To the host corresponding to the side board of the line card;
  • M and N are integers greater than or equal to 1
  • the first priority processing rule is that the serial port communication data of the M group is processed according to the first-in-first-out queue, and according to the configured priority Select high-priority first-out queue processing or select only one output processing in M group according to the configuration.
  • the serial communication Hub module includes a bus switch, an uplink buffer, a bus access module and a downlink buffer; the bus switch is used to receive the serial communication data gated according to the first priority processing rule, and transfer the The serial port communication data is stored in the uplink buffer, and the gate of the bus switch is configured by the bus access module between the host 0 and the communication hub; the host 0 controls the downlink buffer to cache data from the bus The serial port communication data received by the access module, the bus switch selects one of them as the current serial communication data according to the second priority processing rule and sends it to the host computer corresponding to the side board of the line card; the second priority processing rule is The serial port communication data in the M group is processed according to the first-in-first-out queue, the high-priority first-out queue is selected according to the configured priority, or only one output in the M group is selected according to the configuration.
  • the host 0 After the incoming data sending request, buffer the serial port communication data into the data buffer.
  • the communication link is a network port or a serial port communication link.
  • each of the serial port communication modules includes a serial port communication cable and a serial port communication switch, and the serial port communication switch receives the command of the panel mode and/or backplane mode input by the user from the host of the line card side board, and opens the serial port Remote Collection of Information.
  • the N communication cables of the N line card side panels (Line Card 1 , Line Card 2 ...Line Card N ) are directly connected to the serial port communication Hub module or communicate with the serial port through a backplane relay
  • the Hub modules are connected; the serial port communication data of the N line card side boards (Line Card 1 , Line Card 2 ... Line Card N ) are all sent to the main control board through the backboard, or receive the main control board The sent serial communication data.
  • a serial port unified collection method its above-mentioned ATE tester frame equipment, it specially comprises:
  • Step S1 M blocks in the N blocks of line card side panels (Line Card 1 , Line Card 2 ... Line Card N ) send M channels of serial port communication data to the serial port communication Hub module through their corresponding serial port communication modules ;
  • Step S2 The serial port communication Hub module selects the line card side board currently performing serial port communication with the host 0 according to the first priority processing rule;
  • Step S3 After the sending/receiving module receives the serial port communication service, it sends the serial port communication data of the side board of the line card to the host computer through the communication link; the host computer sends back the serial port communication data through the communication link The serial port communication data of the line card side board is fed back to the host computer corresponding to the line card side board through the host 0 and the serial port communication Hub module; wherein, M and N are integers greater than or equal to 1, and the first priority processing
  • M and N are integers greater than or equal to 1, and the first priority processing
  • the rule is that the serial port communication data in the M group is processed according to the first-in-first-out queue, the high-priority first-out queue is selected according to the configured priority, or only one output in the M group is selected according to the configuration.
  • step S3 includes a receiving direction step S31 and a sending direction step S32:
  • the receiving direction step S31 includes:
  • Step S311 the bus switch is used to receive the serial port communication data selected according to the first priority processing rule, store the serial port communication data in the uplink buffer, and pass the depth of the uplink buffer through sending an indication signal to the bus access module;
  • Step S312 The host 0 reads the data in the uplink buffer by accessing the bus module, or after the uplink buffer reaches half of the depth, the serial port communication Hub module reports an interruption and notifies the host 0 to read data;
  • the sending direction step S32 includes:
  • Step S321 After the host 0 receives the data request sent by the host computer, it caches the data into the downlink buffer, and at the same time initiates writing to the access bus module, and the downlink buffer feeds back an indication signal in real time;
  • Step S322 the data in the downlink buffer has occupied X% of the buffer depth, then feed back an interrupt to the host 0, and stop writing; wherein, the X% is greater than or equal to 60%;
  • Step S323 The host 0 receives the indication signal in turn to obtain the buffer depth, and when the buffer depth of the downlink buffer is less than X%, it starts to rewrite the remaining data.
  • the X% is 80%.
  • the ATE tester frame equipment and the serial port unified collection method provided by the present invention can effectively collect the serial port information on the single board of any slot, simplify the communication management between the boards in the test, and facilitate Customers and on-site maintenance personnel can quickly access boards and locate problems.
  • Fig. 1 shows the schematic diagram of ATE tester frame equipment of the present invention
  • Fig. 2 shows the schematic diagram of a preferred embodiment of the ATE tester frame equipment of the present invention
  • Figure 3 is a schematic diagram of the realization of the side panel of the line card according to the embodiment of the present invention
  • FIG. 4 is a schematic diagram of the implementation of the motherboard side of the embodiment of the present invention.
  • Fig. 5 shows the flow chart of serial port unified collection method of the present invention
  • the serial port information is communicated with the host computer through the serial port line of the line card side board itself.
  • the serial port When the serial port needs to be accessed, the serial port must be added cables, and only one line card side board can be accessed at the same time.
  • it is necessary to constantly change and insert the serial cable. This is the "panel mode”.
  • the ATE tester frame equipment and the serial port unified collection method of the present invention can configure the serial port communication module Hub on the main control board by means of a network protocol (such as SSH), and activate the serial port communication module Hub to collect any line card side board single board
  • the serial port information of the slot is transmitted to the external host (such as the upper computer) through the network data packet.
  • This centralized collection method is the "backplane mode", which can make the wiring flexible and simple, and can greatly simplify the ATE testing machine. communication management.
  • FIG. 1 is a schematic diagram of the frame-type equipment of the ATE tester of the present invention.
  • the ATE tester frame device for remote collection of serial port information includes N line card side boards (Line Card 1 , Line Card 2 ...Line Card N ), a main control board (Master Board ) and a host computer.
  • each line card side board includes a host and a serial communication module;
  • the main control board includes a serial communication Hub module, a host 0 and a sending/receiving module;
  • the send/receive module communicates.
  • the serial port communication Hub in the main control board controls the current serial port data exchange mode, and selects the line card side board host for serial port communication with host 0; the service for host 0 to access serial port information is realized by a network protocol (such as SSH), and received After the serial port communication service, collect the serial port data sent by the host on the side board of the line card, and feed it back to the external host.
  • a network protocol such as SSH
  • the N communication cables of the N line card side boards can be directly connected to the serial port communication Hub module or through the backplane
  • the relay is connected with the serial port communication Hub module; in other embodiments of the present invention, the serial port communication data of N blocks of the line card side boards (Line Card 1 , Line Card 2 ...Line Card N ) can also be all Send to the main control board through the backboard, or receive the serial communication data sent by the main control board.
  • the data bus of the serial communication module all passes through the backplane (BKP) and converges to the serial communication module hub (hub) on the main control board.
  • BKP backplane
  • Hub the hub can be configured by host 0, and host 0 communicates with external hosts such as upper computers through network ports.
  • the M blocks in the line card side plates (Line Card 1 , Line Card 2 ... Line Card N ) of the N blocks send the M serial port communication data to the serial port communication Hub module through their corresponding serial port communication modules;
  • the serial port communication Hub module selects the line card side board currently performing serial port communication with the host 0 according to the first priority processing rule; after the sending/receiving module receives the serial port communication service, it passes the communication link way, send the serial port communication data of the line card side board to the host computer, and send back the serial port communication data of the line card side board by the host computer, and feed back through the host 0 and the serial port communication Hub module To the host corresponding to the side board of the line card;
  • M and N are integers greater than or equal to 1
  • the first priority processing rule is that the serial port communication data of the M group is processed according to the first-in-first-out queue, and according to the configured priority Select high-priority first-out queue processing or select only one output processing in M group according to the configuration.
  • FIG. 2 is a schematic diagram of a preferred embodiment of the frame-type equipment of the ATE tester of the present invention.
  • Each of the serial port communication modules includes a serial port communication cable and a serial port communication switch, and the serial port communication switch receives the command of the panel mode and/or backplane mode input by the user from the side board host of the line card, and opens the remote control of the serial port information. collect.
  • FIG. 3 is a schematic diagram of an implementation manner of a side plate of a line card according to an embodiment of the present invention. As shown in FIG. 3 , the line card sideboard host 1 is taken as an example for description.
  • serial communication data sent by the host 1 on the side board of the line card is strobed by the serial communication switch to select whether to go to the backplane, or to the panel interface, or the broadcast mode in which both channels are gated.
  • the gating of the communication switch is determined by the activity detection module, which has three input sources:
  • the host 1 of the line card side board accesses the bus at a low speed, and compulsorily configures the gating of the communication switch.
  • Input source 3 has the highest priority, and the relationship between the three input sources and the gating is as follows:
  • low speed bus strobe Serial cable plugged in Panel serial port receives valid data switch strobe not control yes yes panel not control yes no Backplane not control no arbitrarily Backplane panel arbitrarily arbitrarily panel Backplane arbitrarily arbitrarily Backplane broadcast arbitrarily arbitrarily Simultaneous gating of faceplate and backplane
  • the serial port communication switch on the side board of the line card can accept the serial port communication from the backplane (delivered from the main board) and the panel, and pass through the validity (activity) detection module to check which source is received (for example, main board 1 of the line card side board) , the receiving direction does not support broadcasting, and can only support one data source at the same time, that is to say, the gating relationship of the receiving direction is similar to that of the sending direction, but broadcasting is not supported.
  • FIG. 4 is a schematic diagram of an implementation manner on the mainboard side of the embodiment of the present invention.
  • the serial port communication Hub module includes a bus switch, an uplink buffer, a bus access module and a downlink buffer; the bus switch is used to receive serial communication data gated according to the first priority processing rule, The serial communication data is stored in an uplink buffer, and the gate of the bus switch is configured by the bus access module between the host 0 and the communication hub.
  • the host 0 controls the downlink buffer to cache the serial communication data received from the bus access module, and the bus switch selects one of them as the current serial communication data to send according to the second priority processing rule.
  • the second priority processing rule is that the serial port communication data of M groups is processed according to the first-in-first-out queue, and the queue processing with high priority first-out is selected according to the configured priority or followed According to the configuration, only one output in the M group is selected for processing.
  • the main control board also includes a data buffer, and the host 0 caches the serial port communication data into the data buffer after receiving the data sending request from the line card side board host; correspondingly, the host 0 After receiving the sending data request from the host computer, buffer the serial communication data into the data buffer.
  • the communication link is a network port or a serial port communication link.
  • the sending direction refers to the sending of the host on the side board of the line card.
  • the serial port communication hub on the main control board receives the data sent by the serial port from all the hosts on the side boards of the line cards.
  • the bus switch strobes one of them and stores the data in the uplink buffer (TX buffer).
  • the strobe of the bus switch is configured by the access bus between the host 0 and the serial communication hub.
  • the uplink buffer continuously buffers data, and sends an indication signal to the bus access module to indicate the depth of the buffer.
  • Host 0 can actively access the bus to read the data in the upstream buffer, or wait for the buffer depth of the upstream buffer to reach half, and the serial communication hub will report an interrupt and notify host 0 to read the data.
  • Host 0 will read the data and send the data through the network port through a network protocol such as SSH.
  • the receiving direction refers to the receiving direction of the host on the side board of the line card.
  • host 0 After host 0 receives the network data request from the external host (host computer), it caches the data into the data buffer (data buffer), and at the same time initiates access to the bus write, and writes the data into the downlink buffer (RX buffer) , the downlink buffer feeds back the indication signal in real time, and if it is found that the data has occupied 80% of the buffer depth, it will feed back an interrupt to the host 0 and stop writing.
  • Host 0 receives instructions in rounds to obtain the real-time buffer depth of the downlink buffer, and starts to rewrite the remaining data after the downlink buffer is free.
  • the bus switch selects one of the line cards, sends out the data in the downlink buffer, and finally sends the data to the line card side board host.
  • the above functions can support the serial port bus access message program (serial_connect) through the software on the main control board to realize the connection of the serial port of the SLOT on the side board of the selected line card for receiving and sending, and convert the commands issued by the user into serial port data. Send, and output the return message of the serial port to the ssh terminal at the same time.
  • serial_connect serial port bus access message program
  • FIG. 5 is a flow chart of the unified collection method for serial ports of the present invention.
  • the serial port unified collection method the above-mentioned ATE tester frame equipment, which includes:
  • Step S1 M blocks in the N blocks of line card side panels (Line Card 1 , Line Card 2 ... Line Card N ) send M channels of serial port communication data to the serial port communication Hub module through their corresponding serial port communication modules ;
  • Step S2 The serial port communication Hub module selects the line card side board currently performing serial port communication with the host 0 according to the first priority processing rule;
  • Step S3 After the sending/receiving module receives the serial port communication service, it sends the serial port communication data of the side board of the line card to the host computer through the communication link; the host computer sends back the serial port communication data through the communication link The serial port communication data of the line card side board is fed back to the host computer corresponding to the line card side board through the host 0 and the serial port communication Hub module; wherein, M and N are integers greater than or equal to 1, and the first priority processing
  • M and N are integers greater than or equal to 1, and the first priority processing
  • the rule is that the serial port communication data in the M group is processed according to the first-in-first-out queue, the high-priority first-out queue is selected according to the configured priority, or only one output in the M group is selected according to the configuration.
  • the step S3 includes a receiving direction step S31 and a sending direction step S32:
  • the receiving direction step S31 includes:
  • Step S311 the bus switch is used to receive the serial port communication data selected according to the first priority processing rule, store the serial port communication data in the uplink buffer, and pass the depth of the uplink buffer through sending an indication signal to the bus access module;
  • Step S312 The host 0 reads the data in the uplink buffer by accessing the bus module, or after the uplink buffer reaches half of the depth, the serial port communication Hub module reports an interruption and notifies the host 0 to read data;
  • the sending direction step S32 includes:
  • Step S321 After the host 0 receives the data request sent by the host computer, it caches the data into the downlink buffer, and at the same time initiates writing to the access bus module, and the downlink buffer feeds back an indication signal in real time;
  • Step S322 the data in the downlink buffer has occupied X% of the buffer depth, then feed back an interrupt to the host 0, and stop writing; wherein, the X% is greater than or equal to 60%;
  • Step S323 The host 0 receives the instruction signal in turn to obtain the buffer depth, and starts to rewrite the remaining data when the buffer depth of the downlink buffer is less than X%.

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Abstract

一种ATE测试仪框式设备及其串口统一收集的方法，设备包括多块线卡侧板、主控板和上位机；线卡侧板包括主机和串口通信模块；主控板包括串口通信Hub模块、主机0和发送/接收模块。通过统一收集的方法，借助网络协议，配置主板上的串口通信模块Hub，激活hub去收集任意一个线卡侧板槽位的串口信息，并通过网络数据包，传输给外部主机如上位机；不仅具备灵活和布线简单的特点，还可以大大简化测试机的通信管理。

Description

ATE测试仪框式设备及其串口统一收集的方法
交叉引用
本申请要求2021年12月24日提交的申请号为202111596382.5的中国专利申请的优先权。上述申请的内容以引用方式被包含于此。
技术领域
本发明涉及半导体自动测试设备(Automatic Test Equipment，简称ATE)领域，尤其涉及一种ATE测试仪框式设备及其串口统一收集方法。
技术背景
串口通信，又称通用异步串行收发器UART(Universal Asynchronous Receiver/Transmitter)是一种通用的通信方式，由于其协议简洁和接线简单，被广泛应用在各个领域。
UART通信的帧格式如下：
Figure PCTCN2021143533-appb-000001
UART通信的帧格式包括起始字段、数据字段、奇偶校验字段和结束字段。起始字段为占1bit，总线空闲情况下发1，起始位发0，表示通信开始；数据字段一般有5～9bit，其为有效的数据字符，一般传输的是数据的有效ASCII码，一帧数据传输1个ASCII码；奇偶校验字段占用0或1bit，对数据的奇偶校验，此字符段为可选；结束字段占用1或2bit，在结束字符位置，总线拉高，表示一帧数据发送结束。
本领域技术人员清楚，UART通信的速率一般比较低，需要通信设备之 间按固定配置好的波特率进行通信。UART通信是异步传输，不需要随路时钟；电平标准采用RS232电平，可以有效防止干扰，常见的通信方式如下：
UART通信流程如下：
Figure PCTCN2021143533-appb-000002
①.发送方向：主机将数据按UART帧格式封装，RS232收发器接收主机传输过来的数据，并将电平转换成通用的RS232标准，通过连接器和互联cable线，送给对端设备；
②.接收方向：RS232收发器接收链路上的数据，将信号从RS232转换成主机可识别的电平，主机解析数据帧，并传送给上层应用。
UART通信在ATE测试机中，主要可用于单板的信息收集和配置下发。ATE设备中，实际在客户现场，并不会标配串口线，现场维护人员想通过串口访问单板，变得就不太方便。
发明概要
本发明的目的在于，提供一种本发明ATE测试仪框式设备和串口统一收集方法，其在不增加线缆的情况下，基于默认的客户现场环境，通过网络协议如SSH的方式，可以将不同单板的串口集中管理，来访问ATE测试机中所有的线卡侧板(Line Card 1、Line Card 2…Line Card N)。
为实现上述目的，本发明的技术方案如下：
一种ATE测试仪框式设备，用于串口信息的远程收集，其包括：
N块线卡侧板(Line Card 1、Line Card 2…Line Card N)，每块所述线卡侧板包括一个主机和一个串口通信模块；
一块主控板，其包括一个串口通信Hub模块、一个主机0和发送/接收模块；
一台上位机，用于同所述主控板的发送/接收模块进行通信；
其中，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的 M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机，并将所述上位机发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
进一步地，所述串口通信Hub模块包括总线开关、上行缓存器、总线访问模块和下行缓存器；所述总线开关用于接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，所述总线开关的选通由主机0与通信hub之间的所述总线访问模块来配置；所述主机0控制所述下行缓存器缓存从所述总线访问模块接收的所述串口通信数据，所述总线开关根据第二优先处理规则选择其中一路作为当前所述串口通信数据发送给相应所述线卡侧板的主机；所述第二优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
进一步地，所述主机0接收到所述线卡侧板主机发过来的发送数据请求之后，将所述串口通信数据缓存入数据缓存器；相应地，所述主机0接收到所述上位机发过来的发送数据请求之后，将所述串口通信数据缓存入数据缓存器。
进一步地，所述通信链路为网口或串口通信链路。
进一步地，每一个所述串口通信模块包括串口通信线缆和串口通信开关，所述串口通信开关接收用户从所述线卡侧板主机输入的面板模式和/或背板模式的指令，开启串口信息的远程收集。
进一步地，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的N路通信线缆直接同所述串口通信Hub模块相连或通过背板中继同所述串口通信Hub模块相连；N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的串口通信数据，都通过背板上送到所述主控板，或者接收所述主 控板的下发的串口通信数据。
为实现上述目的，本发明又一技术方案如下：
一种串口统一收集方法，其上述的ATE测试仪框式设备，其特包括：
步骤S1：N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；
步骤S2：所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；
步骤S3：所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机；所述上位机通过通信链路发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
进一步地，所述步骤S3包括接收方向步骤S31和发送方向步骤S32：
所述接收方向步骤S31包括：
步骤S311：所述总线开关用于接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，并将所述上行缓存器缓存的深度通过发指示信号到所述总线访问模块；
步骤S312：所述主机0通过访问总线模块，将上行缓存器中的数据读取出来，或等所述上行缓存器深度到达一半之后，由所述串口通信Hub模块上报中断，通知所述主机0来读取数据；
所述发送方向步骤S32包括：
步骤S321：所述主机0接收到所述上位机发过来的数据请求之后，将数据缓存入下行缓存器，并同时发起所述访问总线模块写，所述下行缓存器实时反馈收指示信号；
步骤S322：所述下行缓存器的数据已占满缓存深度的X％，则反馈中断给所述主机0，停止写入；其中，所述X％为大于等于60％；
步骤S323：所述主机0轮训收指示信号，以获取缓存深度，当所述 下行缓存器的缓存深度小于X％之后，又开始重新写入剩余数据。
进一步地，所述X％为80％。
从上述技术方案可以看出，本发明提供的ATE测试仪框式设备和串口统一收集方法，可以有效收集任意槽位的单板上的串口信息，简化测试内板卡之间的通信管理，方便客户和现场维护人员快速访问单板和进行问题定位。
附图说明
图1所示为本发明ATE测试仪框式设备的示意图
图2所示为本发明ATE测试仪框式设备一较佳实施例的示意图
图3所示为本发明实施例线卡侧板的实现方式示意图
图4所示为本发明实施例主板侧的实现方式示意图
图5所示为本发明串口统一收集方法的流程图
发明内容
下面结合附图1-5，对本发明的具体实施方式作进一步的详细说明。
需要说明的是，上述现有技术中的Slot1到slotN的这些线卡槽位，串口信息都是通过线卡侧板单板本身的串口线与上位机通信，需要访问串口时，就要增加串口线缆，而且同时只能访问1块线卡侧板单板，更换线卡侧板单板访问时，就需要不停的换插串口线，这就是“面板模式”。
本发明的ATE测试仪框式设备和串口统一收集方法，可以借助网络协议(如SSH)，配置主控板上的串口通信模块Hub，激活串口通信模块Hub去收集任意一个线卡侧板单板槽位的串口信息，并通过网络数据包，传输给外部主机(如上位机)，这种集中收集的方法就是“背板模式”，其能使布线灵活和简单，且可以大大简化ATE测试机的通信管理。
请参阅图1，图1所示为本发明ATE测试仪框式设备的示意图。如图1所示，该用于串口信息的远程收集ATE测试仪框式设备，其包括N块线卡侧板(Line Card 1、Line Card 2…Line Card N)、一块主控板(Master Board)和一台上位机。
具体地，每块所述线卡侧板包括一个主机和一个串口通信模块；主控板包括一个串口通信Hub模块、一个主机0和发送/接收模块；上位机用于同所述主控板的发送/接收模块进行通信。
主控板中的串口通信Hub，控制当前的串口数据交换方式，选择与主机0进行串口通信的线卡侧板主机；主机0访问串口信息的服务，由网络协议(如SSH)实现，收到串口通信服务之后，收集线卡侧板主机发送的串口数据，并反馈给外部主机。
在本发明的一些实施例中，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的N路通信线缆可以直接同所述串口通信Hub模块相连或通过背板中继同所述串口通信Hub模块相连；在本发明的另一些实施例中，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的串口通信数据，也可以都通过背板上送到所述主控板，或者接收所述主控板下发的串口通信数据。
也就是说，如图1所示，不同的线卡侧板槽位(Line Card)，串口通信模块的数据总线全部都通过背板(BKP)，汇聚到主控板上的串口通信模块集线器(Hub)，集线器可由主机0配置，主机0通过网口与外部主机如上位机通信。
其中，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机，并将所述上位机发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
请参阅图2，图2所示为本发明ATE测试仪框式设备一较佳实施例的示意图。每一个所述串口通信模块包括串口通信线缆和串口通信开关，所述串口通信开关接收用户从所述线卡侧板主机输入的面板模式和/或背板模式 的指令，开启串口信息的远程收集。
请参阅图3，图3所示为本发明实施例线卡侧板的实现方式示意图。如图3所示，是以线卡侧板主机1为例进行说明的。
①、线卡侧板主机1发送
线卡侧板主机1发送的串口通信数据，经过串口通信开关的选通，选择是去背板，还是去面板接口，或者是两路都选通的广播模式。
通信开关的选通由有效性(activity)检测模块决定，检测模块有3个输入源：
I.面板串口线缆是否插入；
II.面板接收方向是否检测到有效的串口数据；
III.线卡侧板主机1通过低速访问总线，强制配置通信开关的选通。
输入源3的优先级最高，三个输入源和选通关系如下：
低速总线选通 串口线插入 面板串口接收到有效数据 开关选通
不控制 是 是 面板
不控制 是 否 背板
不控制 否 任意 背板
面板 任意 任意 面板
背板 任意 任意 背板
广播 任意 任意 面板和背板同时选通
②、线卡侧板主板1接收
线卡侧板的串口通信开关，可以接受来自背板(从主板下发)和面板的串口通信，经过有效性(activity)检测模块选通，具体接收哪个源头(例如线卡侧板主板1)，接收方向不支持广播，同时只能支持1个数据源，也就是说，接收方向的选通关系与发送方向类似，只是不支持广播。
Figure PCTCN2021143533-appb-000003
Figure PCTCN2021143533-appb-000004
请参阅图4，图4所示为本发明实施例主板侧的实现方式示意图。如图4所示，所述串口通信Hub模块包括总线开关、上行缓存器、总线访问模块和下行缓存器；所述总线开关用于接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，所述总线开关的选通由主机0与通信hub之间的所述总线访问模块来配置。
也就是说，所述主机0控制所述下行缓存器缓存从所述总线访问模块接收的所述串口通信数据，所述总线开关根据第二优先处理规则选择其中一路作为当前所述串口通信数据发送给相应所述线卡侧板的主机；所述第二优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
所述主控板还包括数据缓存器，所述主机0接收到所述线卡侧板主机发过来的发送数据请求之后，将所述串口通信数据缓存入数据缓存器；相应地，所述主机0接收到所述上位机发过来的发送数据请求之后，将所述串口通信数据缓存入数据缓存器。所述通信链路为网口或串口通信链路。
从主控板侧看：
①、发送方向
需要说明的是，发送方向是指线卡侧板主机的发送。主控板上的串口通信hub，接收来自所有线卡侧板主机发送的串口发送数据。总线开关选通其中1路，将数据存入上行缓冲器(TX buffer)中，总线开关的选通由主机0与串口通信hub之间的访问总线来配置。上行缓冲器持续缓存数据，并将缓存的深度通过发指示信号到总线访问模块。
主机0可以主动通过访问总线，将上行缓冲器中的数据读取出来，也可以等上行缓冲器的缓存深度到达一半之后，由串口通信hub上报中断，通知主机0来读取数据。主机0将读取出来的数据，通过网络协议如SSH，将 数据经过网口发送出去。
②、接收方向
需要说明的是，接收方向是指线卡侧板主机的接收方向。主机0接收到外部主机(上位机)发过来的网络数据请求之后，将数据缓存入数据缓存器(data buffer)中，并同时发起访问总线写，将数据写入下行缓冲器(RX buffer)中，下行缓冲器实时反馈收指示信号，如果发现数据已占满缓存深度的80％，则反馈中断给主机0，停止写入。主机0轮训收指示，以获取下行缓冲器的实时缓存深度，等下行缓冲器空闲之后，又开始重新写入剩余数据。
并且，总线开关选择其中一路线卡，将下行缓冲器里的数据发送出去，最终送给线卡侧板主机。
在实际的过程中，上述功能可以通过主控板上软件支持串口总线访问消息程序(serial_connect)，实现选择接收与发送哪一线卡侧板SLOT的串口对接，把用户下发命令转换成串口数据进行发送，同时把串口的返回消息输出到ssh终端。通过连接不同的线卡侧板SLOT，可以较为方便的进行串口信息的远程收集。
请参阅图5，图5所示为本发明串口统一收集方法的流程图。如图5所示，串口统一收集方法，其上述的ATE测试仪框式设备，其包括：
步骤S1：N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；
步骤S2：所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；
步骤S3：所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机；所述上位机通过通信链路发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
在本发明的实施例中，所述步骤S3包括接收方向步骤S31和发送方向步骤S32：
所述接收方向步骤S31包括：
步骤S311：所述总线开关用于接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，并将所述上行缓存器缓存的深度通过发指示信号到所述总线访问模块；
步骤S312：所述主机0通过访问总线模块，将上行缓存器中的数据读取出来，或等所述上行缓存器深度到达一半之后，由所述串口通信Hub模块上报中断，通知所述主机0来读取数据；
所述发送方向步骤S32包括：
步骤S321：所述主机0接收到所述上位机发过来的数据请求之后，将数据缓存入下行缓存器，并同时发起所述访问总线模块写，所述下行缓存器实时反馈收指示信号；
步骤S322：所述下行缓存器的数据已占满缓存深度的X％，则反馈中断给所述主机0，停止写入；其中，所述X％为大于等于60％；
步骤S323：所述主机0轮训收指示信号，以获取缓存深度，当所述下行缓存器的缓存深度小于X％之后，又开始重新写入剩余数据。
综上，基于以上的统一收集方法，可以借助网络协议(如SSH)，配置主控板上的串口通信模块Hub，且激活串口通信模块Hub去收集任意一个线卡槽位的串口信息，并通过网络数据包，传输给外部主机如上位机。这种集中收集的方法灵活、布线简单，可以大大简化测试机的通信管理，即以实现所有线卡侧板的串口信息的收集，并由主控板通过网络协议对外交互。
以上所述的仅为本发明的优选实施例，所述实施例并非用以限制本发明的专利保护范围，因此凡是运用本发明的说明书及附图内容所作的等同结构变化，同理均应包含在本发明的保护范围内。

Claims (9)

  1. 种ATE测试仪框式设备，用于串口信息的远程收集，其特征在于，包括：
    N块线卡侧板(Line Card 1、Line Card 2…Line Card N)，每块所述线卡侧板包括一个主机和一个串口通信模块；
    一块主控板，其包括一个串口通信Hub模块、一个主机0和发送/接收模块；
    一台上位机，用于同所述主控板的发送/接收模块进行通信；
    其中，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机，并将所述上位机发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
  2. 根据权利要求1所述的ATE测试仪框式设备，其特征在于，所述串口通信Hub模块包括总线开关、上行缓存器、总线访问模块和下行缓存器；所述总线开关接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，所述总线开关的选通由主机0与通信hub之间的所述总线访问模块来配置；所述主机0控制所述下行缓存器缓存从所述总线访问模块接收的所述串口通信数据，所述总线开关根据第二优先处理规则选择其中一路作为当前所述串口通信数据发送给相应所述线卡侧板的主机；所述第二优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
  3. 根据权利要求1所述的ATE测试仪框式设备，其特征在于，所述主控板还包括数据缓存器，所述主机0接收到所述线卡侧板主机发过来的发送 数据请求之后，将所述串口通信数据缓存入数据缓存器；相应地，所述主机0接收到所述上位机发过来的发送数据请求之后，将所述串口通信数据缓存入数据缓存器。
  4. 根据权利要求1所述的ATE测试仪框式设备，其特征在于，所述通信链路为网口或串口通信链路。
  5. 根据权利要求1所述的ATE测试仪框式设备，其特征在于，每一个所述串口通信模块包括串口通信线缆和串口通信开关，所述串口通信开关接收用户从所述线卡侧板主机输入的面板模式和/或背板模式的指令，开启串口信息的远程收集。
  6. 根据权利要求1所述的ATE测试仪框式设备，其特征在于，N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的N路通信线缆直接同所述串口通信Hub模块相连或通过背板中继同所述串口通信Hub模块相连；N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)的串口通信数据，都通过背板上送到所述主控板，或者接收所述主控板的下发的串口通信数据。
  7. 一种串口统一收集方法，其采用权利要求1-6任意一个所述的ATE测试仪框式设备，其特征在于，包括：
    步骤S1：N块所述线卡侧板(Line Card 1、Line Card 2…Line Card N)中的M块通过其相应的所述串口通信模块发送M路串口通信数据给所述串口通信Hub模块；
    步骤S2：所述串口通信Hub模块根据第一优先处理规则，按优先级选择当前与所述主机0进行串口通信的所述线卡侧板；
    步骤S3：所述发送/接收模块收到串口通信服务之后，通过通信链路，将所述线卡侧板的串口通信数据发送给所述上位机；所述上位机通过通信链路发回所述线卡侧板的串口通信数据，通过所述主机0和串口通信Hub模块反馈给相应所述线卡侧板的主机；其中，M和N为大于等于1的整数，所述第一优先处理规则为M组所述串口通信数据根据先进先出的队列处理、根据配置的优先级选择高优先级先出的队列处理或跟据配置只选通M组中的一路输出处理。
  8. 根据权利要求7所述的串口统一收集方法，其特征在于，所述步骤 S3包括接收方向步骤S31和发送方向步骤S32：
    所述接收方向步骤S31包括：
    步骤S311：所述总线开关接收根据所述第一优先处理规则选通的串口通信数据，并将所述串口通信数据存入上行缓存器中，并将所述上行缓存器缓存的深度通过发指示信号到所述总线访问模块；
    步骤S312：所述主机0通过访问总线模块，将上行缓存器中的数据读取出来，或等所述上行缓存器深度到达一半之后，由所述串口通信Hub模块上报中断，通知所述主机0来读取数据；
    所述发送方向步骤S32包括：
    步骤S321：所述主机0接收到所述上位机发过来的数据请求之后，将数据缓存入下行缓存器，并同时发起所述访问总线模块写，所述下行缓存器实时反馈收指示信号；
    步骤S322：所述下行缓存器的数据已占满缓存深度的X％，则反馈中断给所述主机0，停止写入；其中，所述X％为大于等于60％；
    步骤S323：所述主机0轮训收指示信号，以获取缓存深度，当所述下行缓存器的缓存深度小于X％之后，又开始重新写入剩余数据。
  9. 根据权利要求8所述的ATE测试仪框式设备串口统一收集方法的方法，其特征在于，所述X％为80％。
PCT/CN2021/143533 2021-12-24 2021-12-31 Ate测试仪框式设备及其串口统一收集的方法 WO2023115635A1 (zh)

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