WO2023109425A1 - Power amplifier and radio frequency chip - Google Patents

Power amplifier and radio frequency chip Download PDF

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Publication number
WO2023109425A1
WO2023109425A1 PCT/CN2022/132749 CN2022132749W WO2023109425A1 WO 2023109425 A1 WO2023109425 A1 WO 2023109425A1 CN 2022132749 W CN2022132749 W CN 2022132749W WO 2023109425 A1 WO2023109425 A1 WO 2023109425A1
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WIPO (PCT)
Prior art keywords
bias
amplifying circuit
connection point
power amplifier
common connection
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PCT/CN2022/132749
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French (fr)
Chinese (zh)
Inventor
张莽
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2023109425A1 publication Critical patent/WO2023109425A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only

Definitions

  • the utility model relates to the technical field of amplifier circuits, in particular to a power amplifier and a radio frequency chip.
  • a power amplifier in the related art generally includes an amplifying circuit and a bias circuit that provides a bias voltage to the amplifying circuit.
  • the amplifying circuit is generally the final stage amplifying unit, and the final stage amplifying unit generally consists of more than 30 HBT transistors (English Bipolar Junction Transistor, referred to as BJT) and more than 30 bias transistors. Set resistors to form more than 30 amplifier units.
  • An HBT transistor and a bias resistor respectively form an amplifying circuit unit, and more than 30 amplifying circuit units are symmetrically combined in parallel to form the amplifying circuit.
  • FIG. 1 is a circuit layout of a related art power amplifier.
  • A is the circuit layout of the bias circuit; B is the common connection point between the bias circuit and all amplifying circuit units; C is the connection point of an amplifying circuit unit closest to the common connection point B; D is the distance from the common connection point B The connection point of the farthest amplifying circuit unit.
  • the connection point B, the connection point C and the connection point D are all electrically connected through metal connection wires.
  • the asymmetry of the connection point between the bias circuit and the amplifying circuit unit will cause the actual bias resistance value of the amplifying circuit unit to be different.
  • the length of the metal connection line from point B to point D is about 300um
  • the length of the metal connection line from point B to point C is about 10um.
  • the thickness of the bias resistor connecting line from point B to each amplifying circuit unit is 2um
  • the width is generally about 4um
  • the resistance value of the connecting line per unit length is about 0.008 ohm/micron
  • the actual equivalent resistance is greater than 2.4 ohms, which is much greater than the equivalent resistance value from point B to point C.
  • this phenomenon is more serious due to the large number of amplifying circuit units.
  • multiple bias resistors are also connected in parallel, which greatly reduces the equivalent bias resistance of the entire final stage power amplifying circuit.
  • the entire power amplifying circuit is equivalent to The bias resistor Rs ⁇ 10 ohms. Therefore, due to the large number of amplifying circuit units and the large circuit layout area, the resulting bias resistors have large differences in value, which will aggravate the uneven current distribution in all amplifying circuit units and affect circuit reliability and amplifier performance. Due to the influence of temperature when the power amplifier is working, the bias voltage provided by the bias circuit will fluctuate to a certain extent, and it is not a fixed value. Since the equivalent bias resistance Rs is very small, the working state of the entire power amplifier circuit is greatly affected by the fluctuation of the bias voltage, and the working state is unstable, resulting in low performance of the power amplifier.
  • the utility model proposes a power amplifier and a radio frequency chip with good circuit performance.
  • the embodiment of the utility model provides a power amplifier, which includes an amplifying circuit and a bias circuit that provides a bias voltage to the amplifying circuit, and the amplifying circuit includes a plurality of mutual Amplifying circuit units arranged in parallel; the first input terminals of each of the amplifying circuit units are connected to each other and used as the input terminals of the amplifying circuit, and the second input terminals of each of the amplifying circuit units are connected to the bias set circuit, the output terminals of each of the amplifying circuit units are connected to each other and serve as the output terminals of the amplifying circuit;
  • N amplifying circuit units There are N amplifying circuit units, and N is an even number;
  • the power amplifier is provided with a common connection line on the circuit layout, and the connection point between the bias circuit and the common connection line is a common connection point;
  • the amplifying circuit units are arranged side by side on the circuit layout, the second input end is connected to the common connection line, the connection point between the second input end and the common connection line is a bias connection point, and each The bias connection point corresponds to one of the amplifying circuit units;
  • the common connection line includes a first segment and a second segment, the common connection point is arranged in the middle of the common connection line, and the first segment and the second segment are connected through the common connection point;
  • the number of the bias connection points in the first section is the same as the number of the bias connection points in the second section, and each of the bias connection points in the first section is respectively connected to the One of the bias connection points in the second segment is arranged symmetrically with respect to the common connection point.
  • N ⁇ 8 Preferably, N ⁇ 8.
  • the amplifying circuit includes multiple, the biasing circuit includes multiple, and each amplifying circuit is correspondingly connected to one of the biasing circuits.
  • N 8
  • the amplifying circuits include 4, and the bias circuits include 4.
  • the common connecting wire is a rectangular metal wire.
  • the amplifying circuit unit includes capacitors, resistors and transistors;
  • the first terminal of the capacitor is used as the first input terminal, and the first terminal of the capacitor is respectively connected to the second terminal of the resistor and the base of the transistor;
  • the second end of the resistor is used as the second input end, and the second end of the resistor is connected to the bias voltage;
  • the collector of the transistor is used as the output terminal of the amplifying circuit unit, and the collector of the transistor is connected to the power supply voltage; the emitter of the transistor is connected to the ground.
  • the transistor is a bipolar junction transistor.
  • the embodiment of the present invention further provides a radio frequency chip, the radio frequency chip is like the above-mentioned power amplifier provided by the embodiment of the present invention.
  • the power amplifier of the utility model embodiment sets the connection point of the bias circuit and the common connection line as the common connection point, and sets the connection point of the second input terminal of the amplifying circuit unit and the common connection line as the bias voltage connection point; and the public connection line is divided into the first section and the second section, the public connection point is set in the middle of the public connection line, the number of bias connection points in the first section is the same as the number of bias connection points in the second section Similarly, each bias connection point in the first section is arranged symmetrically with one of the bias connection points in the second section with the common connection point as the center.
  • Fig. 1 is the circuit layout of the power amplifier of related art
  • Fig. 2 is the circuit layout of the power amplifier of the utility model embodiment
  • Fig. 3 is the circuit structure diagram of the power amplifier of the utility model embodiment
  • Fig. 4 is a circuit structure diagram of the amplifying circuit unit of the embodiment of the present invention.
  • the utility model provides a power amplifier 100 .
  • Fig. 2 is the circuit layout of the power amplifier of the utility model embodiment
  • Fig. 3 is the circuit structure diagram of the power amplifier of the utility model embodiment
  • Fig. 4 is the utility model embodiment The circuit structure diagram of the amplification circuit unit.
  • a power amplifier 100 It includes an amplifying circuit 1 and a bias circuit 2 providing a bias voltage Vias to the amplifying circuit 1 .
  • the power amplifier 100 is a differential structure power combining power amplifier.
  • the amplifying circuit 1 includes a plurality of amplifying circuit units 3 arranged in parallel with each other.
  • each amplifying circuit unit 3 The first input terminals of each amplifying circuit unit 3 are connected to each other and serve as the input terminal PIN of the amplifying circuit 1 .
  • the second input terminal of each amplifying circuit unit 3 is connected to the bias voltage Vias.
  • the output terminals of each amplifying circuit unit 3 are connected to each other and serve as the output terminal POUT of the amplifying circuit 1 .
  • the amplifying circuit unit 3 includes a capacitor C, a resistor R and a transistor Q.
  • the transistor Q is a bipolar junction transistor (Bipolar Junction Transistor, BJT for short).
  • the capacitor C is used as the input matching capacitor of the amplifying circuit unit 3, and the capacitor C is used to realize the function of a DC blocking capacitor;
  • the resistor R is used as a bias resistor of the amplifying circuit unit 3;
  • the circuit connection relationship of the amplifying circuit unit 3 is:
  • the first terminal of the capacitor C is used as the first input terminal.
  • the first terminal of the capacitor C is respectively connected to the second terminal of the resistor R and the base of the transistor Q.
  • the second end of the resistor R is used as the second input end. And the second end of the resistor R is connected to the bias circuit 2 . That is, the second end of the resistor R receives the bias voltage Vias provided by the bias circuit 2 .
  • the collector of the transistor Q serves as the output terminal of the amplifying circuit unit 3 . And the collector of the transistor Q is connected to the power supply voltage VDD. The emitter of the transistor Q is connected to the ground GND.
  • N is an even number. Among them, N ⁇ 8.
  • N is 8. That is, the amplifying circuit 1 includes 8 amplifying circuit units 3 arranged in parallel with each other.
  • the 8 amplifying circuit units 3 are conducive to the symmetry of the circuit layout of the amplifying circuit unit 3, and are more conducive to shortening the distance connected to the bias circuit 2.
  • the length of the metal connection wire is 8.
  • Each of the eight amplifying circuit units 3 includes a resistor R. Specifically, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6, the resistor R7 and the resistor R8 are arranged in sequence. The resistors R1 , R2 , R3 , R4 , R5 , R6 , R7 and R8 are all used as bias resistors in the amplifying circuit unit 3 . Eight parallel amplifying circuit units 3 and one bias circuit 2 can form a power amplifier 100 .
  • the amplifying circuit 1 includes multiple.
  • the bias circuit 2 includes a plurality of.
  • the amplifier circuit 1 includes multiple.
  • the bias circuit 2 includes a plurality of.
  • Each amplifying circuit 1 is correspondingly connected to one biasing circuit 2 .
  • the amplifying circuit 1 includes four.
  • the bias circuit 2 includes four. That is, there are 32 amplifier circuit units 3 .
  • the power amplifier 100 is provided with a common connection line L on the circuit layout.
  • the common connection line L is a rectangular metal line.
  • connection point between the bias circuit 2 and the common connection line L is the common connection point E.
  • the amplifying circuit units 3 are arranged side by side on the circuit layout.
  • the second input terminal is connected to the common connection line L.
  • the connection point between the second input end and the common connection line L is a bias voltage connection point.
  • Each bias connection point corresponds to one amplifying circuit unit 3 .
  • the second input end is one end of the connection between the resistor R and the common connection line L.
  • the bias connection points are arranged in order of connection point T1, connection point T2, connection point T3, connection point T4, connection point T5, connection point T6, connection point T7 and connection point T8, wherein the resistor R1
  • the bias connection point connected to the common connection line L is correspondingly the connection point T1; the bias connection point connected to the common connection line L by the resistor R2 is correspondingly the connection point T2; the resistor R3 is connected to the common connection line L
  • the bias connection point of the resistor R4 is connected to the connection point T3; the bias connection point of the resistor R4 connected to the common connection line L is corresponding to the connection point T4; the bias connection point of the resistor R5 connected to the common connection line L is corresponding to the connection point Point T5; the bias connection point where the resistor R6 is connected to the common connection line L is correspondingly the connection point T6; the bias connection point where the resistor R7 is connected to the common connection line L is correspondingly the connection point T7; the resistance R8 is connected to the The
  • the common connection line L includes a first segment L1 and a second segment L2.
  • the common connection point E is disposed in the middle of the common connection line L. And the first section L1 and the second section L2 are connected through the common connection point E.
  • the number of the bias connection points in the first section L1 is the same as the number of the bias connection points in the second section L2.
  • connection point T1, the connection point T2, the connection point T3, and the connection point T4 are located in the first segment L1.
  • the connection point T5, the connection point T6, the connection point T7 and the connection point T8 are located in the second section L2.
  • Each of the bias connection points located in the first section L1 is respectively arranged symmetrically with one of the bias connection points located in the second section L2 with the common connection point E as the center.
  • This setting makes the length of each bias connection point in the common connection line L close, and will not cause a large difference in the bias resistance in the amplifying circuit unit 3, thereby solving the problem of circuit reliability caused by the asymmetry of the bias connection point. Sexuality issues and amplifier performance degradation issues.
  • the total resistance R of all amplifying circuit units 3 is 300 ohms, and the number of amplifying circuit units 3 is 8.
  • the amplifying circuit composed of these 8 amplifying circuit units 3 is viewed from the common connection point E as a base point. 1.
  • the equivalent bias resistance Rs of the amplifying circuit 1 is about 37.5 ohms.
  • the equivalent bias resistance Rs of the amplifying circuit 1 is much larger than the equivalent bias resistance Rs of about 10 ohms in the background art. Therefore, the equivalent bias resistance Rs of the amplifying circuit 1 is larger, and the circuit working state of the power amplifier 100 is more stable than that of the power amplifier in the background art, thereby improving the reliability of the power amplifier 100 and optimizing the performance of the amplifier.
  • the embodiment of the utility model also provides a radio frequency chip.
  • the radio frequency chip includes the power amplifier 100 .
  • the power amplifier of the utility model embodiment sets the connection point of the bias circuit and the common connection line as the common connection point, and sets the connection point of the second input terminal of the amplifying circuit unit and the common connection line as the bias voltage connection point; and the public connection line is divided into the first section and the second section, the public connection point is set in the middle of the public connection line, the number of bias connection points in the first section is the same as the number of bias connection points in the second section Similarly, each bias connection point in the first section is arranged symmetrically with one of the bias connection points in the second section with the common connection point as the center.

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Abstract

Embodiments of the present application provide a power amplifier. The power amplifier comprises an amplification circuit and a bias circuit, the amplification circuit comprising amplification circuit units; the power amplifier is provided with a common connection line in a circuit layout, and a connection point between the bias circuit and the common connection line is a common connection point; the amplification circuit units are arranged side by side in the circuit layout, and a connection point between a second input end of each amplification circuit unit and the common connection line is a bias voltage connection point; the common connection line comprises a first section and a second section, and the common connection point is provided in the middle of the common connection line; and the number of bias voltage connection points in the first section is the same as that of bias voltage connection points in the second section, and each bias voltage connection point in the first section and one bias voltage connection point in the second section are symmetrically arranged by using the common connection point as the center. The embodiments of the present application further provide a radio frequency chip applying the power amplifier. By using the technical solution of the present application, the working performance of the circuit is good.

Description

功率放大器和射频芯片Power Amplifier and RF Chip 技术领域technical field
本实用新型涉及放大器电路技术领域,尤其涉及一种应用于功率放大器和射频芯片。The utility model relates to the technical field of amplifier circuits, in particular to a power amplifier and a radio frequency chip.
背景技术Background technique
目前,随着半导体技术的迅速发展,集成电路的使用已经遍布各个领域,其中功率放大器常用于各种模拟信号的放大,在模拟电路应用中是重要的部件。At present, with the rapid development of semiconductor technology, integrated circuits have been used in various fields, among which power amplifiers are often used to amplify various analog signals, and are important components in analog circuit applications.
相关技术中的功率放大器一般包括放大电路和向所述放大电路提供偏置电压的偏置电路。在差分结构功率合成功率放大器的电路中,所述放大电路一般为末级放大单元,末级放大单元一般会由30个以上的HBT晶体管(英文Bipolar Junction Transistor,简称BJT)和30个以上的偏置电阻组成30个以上的放大器单元。一个HBT晶体管和一个偏置电阻分别组成一个放大电路单元,30个以上的放大电路单元以并联的方式对称的组合在一起形成所述放大电路。如图1所示,图1为相关技术的功率放大器的电路版图。其中,A为偏置电路的电路版图;B为偏置电路与所有放大电路单元的公共连接点;C为距离公共连接点B最近的一个放大电路单元的连接点;D为距离公共连接点B最远的一个放大电路单元的连接点。连接点B、连接点C以及连接点D均通过金属连接线实现电连接。A power amplifier in the related art generally includes an amplifying circuit and a bias circuit that provides a bias voltage to the amplifying circuit. In the circuit of the power synthesizing power amplifier with a differential structure, the amplifying circuit is generally the final stage amplifying unit, and the final stage amplifying unit generally consists of more than 30 HBT transistors (English Bipolar Junction Transistor, referred to as BJT) and more than 30 bias transistors. Set resistors to form more than 30 amplifier units. An HBT transistor and a bias resistor respectively form an amplifying circuit unit, and more than 30 amplifying circuit units are symmetrically combined in parallel to form the amplifying circuit. As shown in FIG. 1 , FIG. 1 is a circuit layout of a related art power amplifier. Among them, A is the circuit layout of the bias circuit; B is the common connection point between the bias circuit and all amplifying circuit units; C is the connection point of an amplifying circuit unit closest to the common connection point B; D is the distance from the common connection point B The connection point of the farthest amplifying circuit unit. The connection point B, the connection point C and the connection point D are all electrically connected through metal connection wires.
然而,相关技术的功率放大器中,偏置电路与放大电路单元的连接点的不对称性会造成放大电路单元实际偏置电阻值的不同。例如,B点到D点金属连接线的长度约为300um,B点到C点金属连接线的长度约为10um。B点到各个放大电路单元偏置电阻连接线厚度为2um,宽度一般为4um左右,单位长度连接线电阻值约为0.008欧姆/微米,B点到D点的等效电阻约为0.008x300=2.4欧 姆。同时考虑到电路版图中的一层金属和二层金属的连接点也会增加额外的电阻值,实际的等效电阻要大于2.4欧姆,远大于B点到C点的等效电阻值。在差分结构功率合成功率放大器中,由于所述放大电路单元数量很多,这种现象更加严重。另外,由于所有放大电路单元是并联的,多个偏置电阻也是并联的,这使得整个末级功率放大电路的等效偏置电阻大大减小。例如,假设所有放大电路单元的偏置电阻R=300欧姆,放大电路单元数量是30个,从偏置电路与放大电路单元的连接点处为基点看向整个所述功率放大电路,其等效偏置电阻Rs≈10欧姆。因此,由于放大电路单元数量多,电路版图面积大,导致的多个偏置电阻值差异较大,会加剧所有放大电路单元中电流分布不均匀现象,影响电路可靠性和放大器性能。因为受到功率放大器工作时的温度影响,偏置电路提供的偏置电压会有一定程度的波动,并不是固定不变的值。由于等效偏置电阻Rs很小,整个功率放大电路的工作状态受到偏置电压波动的很大影响,工作状态不稳定,造成功率放大器性能低。However, in the power amplifier of the related art, the asymmetry of the connection point between the bias circuit and the amplifying circuit unit will cause the actual bias resistance value of the amplifying circuit unit to be different. For example, the length of the metal connection line from point B to point D is about 300um, and the length of the metal connection line from point B to point C is about 10um. The thickness of the bias resistor connecting line from point B to each amplifying circuit unit is 2um, the width is generally about 4um, the resistance value of the connecting line per unit length is about 0.008 ohm/micron, and the equivalent resistance from point B to point D is about 0.008x300=2.4 ohm. At the same time, considering that the connection point between the first layer of metal and the second layer of metal in the circuit layout will also increase the additional resistance value, the actual equivalent resistance is greater than 2.4 ohms, which is much greater than the equivalent resistance value from point B to point C. In a differential structure power combining power amplifier, this phenomenon is more serious due to the large number of amplifying circuit units. In addition, since all amplifying circuit units are connected in parallel, multiple bias resistors are also connected in parallel, which greatly reduces the equivalent bias resistance of the entire final stage power amplifying circuit. For example, assuming that the bias resistance R=300 ohm of all amplifying circuit units, and the number of amplifying circuit units is 30, the entire power amplifying circuit is equivalent to The bias resistor Rs≈10 ohms. Therefore, due to the large number of amplifying circuit units and the large circuit layout area, the resulting bias resistors have large differences in value, which will aggravate the uneven current distribution in all amplifying circuit units and affect circuit reliability and amplifier performance. Due to the influence of temperature when the power amplifier is working, the bias voltage provided by the bias circuit will fluctuate to a certain extent, and it is not a fixed value. Since the equivalent bias resistance Rs is very small, the working state of the entire power amplifier circuit is greatly affected by the fluctuation of the bias voltage, and the working state is unstable, resulting in low performance of the power amplifier.
因此,实有必要提供一种新的功率放大器和射频芯片解决上述问题。Therefore, it is necessary to provide a new power amplifier and radio frequency chip to solve the above problems.
实用新型内容Utility model content
针对以上现有技术的不足,本实用新型提出一种电路工作性能好的功率放大器和射频芯片。Aiming at the above deficiencies in the prior art, the utility model proposes a power amplifier and a radio frequency chip with good circuit performance.
为了解决上述技术问题,第一方面,本实用新型的实施例提供了一种功率放大器,其包括放大电路和向所述放大电路提供偏置电压的偏置电路,所述放大电路包括多个相互并联设置的放大电路单元;每一所述放大电路单元的第一输入端均相互连接并作为所述放大电路的输入端,每一所述放大电路单元的第二输入端均连接至所述偏置电路,每一所述放大电路单元的输出端均相互连接并作为所述放大电路的输出端;In order to solve the above technical problems, in the first aspect, the embodiment of the utility model provides a power amplifier, which includes an amplifying circuit and a bias circuit that provides a bias voltage to the amplifying circuit, and the amplifying circuit includes a plurality of mutual Amplifying circuit units arranged in parallel; the first input terminals of each of the amplifying circuit units are connected to each other and used as the input terminals of the amplifying circuit, and the second input terminals of each of the amplifying circuit units are connected to the bias set circuit, the output terminals of each of the amplifying circuit units are connected to each other and serve as the output terminals of the amplifying circuit;
所述放大电路单元为N个,N为偶数;There are N amplifying circuit units, and N is an even number;
所述功率放大器在电路版图设有公共连接线,所述偏置电路与所述公共连接线的连接点为公共连接点;The power amplifier is provided with a common connection line on the circuit layout, and the connection point between the bias circuit and the common connection line is a common connection point;
所述放大电路单元在电路版图上呈并排设置,所述第二输入端连接至所述公共连接线,所述第二输入端与所述公共连接线的连接点为偏压连接点,每一偏压连接点与一个所述放大电路单元相对应;The amplifying circuit units are arranged side by side on the circuit layout, the second input end is connected to the common connection line, the connection point between the second input end and the common connection line is a bias connection point, and each The bias connection point corresponds to one of the amplifying circuit units;
所述公共连接线包括第一段和第二段,所述公共连接点设置于所述公共连接线的中间,且所述第一段和所述第二段通过所述公共连接点连接;所述第一段内的所述偏压连接点数量与所述第二段内的所述偏压连接点数量相同,位于所述第一段内的每一所述偏压连接点均分别与位于所述第二段内的其中一个所述偏压连接点以所述公共连接点为中心对称设置。The common connection line includes a first segment and a second segment, the common connection point is arranged in the middle of the common connection line, and the first segment and the second segment are connected through the common connection point; The number of the bias connection points in the first section is the same as the number of the bias connection points in the second section, and each of the bias connection points in the first section is respectively connected to the One of the bias connection points in the second segment is arranged symmetrically with respect to the common connection point.
优选的,N≤8。Preferably, N≤8.
优选的,所述放大电路包括多个,所述偏置电路包括多个,每一所述放大电路与一个所述偏置电路相对应连接。Preferably, the amplifying circuit includes multiple, the biasing circuit includes multiple, and each amplifying circuit is correspondingly connected to one of the biasing circuits.
优选的,N为8,所述放大电路包括4个,所述偏置电路包括4个。Preferably, N is 8, the amplifying circuits include 4, and the bias circuits include 4.
优选的,所述公共连接线为呈矩形的金属线。Preferably, the common connecting wire is a rectangular metal wire.
优选的,所述放大电路单元包括电容、电阻以及晶体管;Preferably, the amplifying circuit unit includes capacitors, resistors and transistors;
所述电容的第一端作为所述第一输入端,所述电容的第一端分别连接至所述电阻的第二端和所述晶体管的基极;The first terminal of the capacitor is used as the first input terminal, and the first terminal of the capacitor is respectively connected to the second terminal of the resistor and the base of the transistor;
所述电阻的第二端作为所述第二输入端,且所述电阻的第二端连接至所述偏置电压;The second end of the resistor is used as the second input end, and the second end of the resistor is connected to the bias voltage;
所述晶体管的集电极作为所述放大电路单元的输出端,且所述晶体管的集电极连接至电源电压;所述晶体管的发射极连接至接地。The collector of the transistor is used as the output terminal of the amplifying circuit unit, and the collector of the transistor is connected to the power supply voltage; the emitter of the transistor is connected to the ground.
优选的,所述晶体管为双极结型晶体管。Preferably, the transistor is a bipolar junction transistor.
第二方面,本实用新型的实施例还提供了一种射频芯片,所述射频芯片如本实用新型的实施例提供的上述的功率放大器。In the second aspect, the embodiment of the present invention further provides a radio frequency chip, the radio frequency chip is like the above-mentioned power amplifier provided by the embodiment of the present invention.
与相关技术相比,本实用新型实施例的功率放大器通过设置偏置电路与公共连接线的连接点为公共连接点,设置放大电路单元的第二输入端与公共连接线的连接点为偏压连接点;并将公共连接线 分为第一段和第二段,公共连接点设置于公共连接线的中间,第一段内的偏压连接点数量与第二段内的偏压连接点数量相同,位于第一段内的每一偏压连接点均分别与位于第二段内的其中一个偏压连接点以所述公共连接点为中心对称设置。该设置使得公共连接线内的每一偏压连接点的长度接近,不会造成放大电路单元内的偏置电阻的出现较大差异,从而解决了偏压连接点不对称导致的电路可靠性问题和放大器性能恶化问题。因此,本实用新型实施例的功率放大器和射频芯片的运算放大器的电路工作性能好。Compared with the related technology, the power amplifier of the utility model embodiment sets the connection point of the bias circuit and the common connection line as the common connection point, and sets the connection point of the second input terminal of the amplifying circuit unit and the common connection line as the bias voltage connection point; and the public connection line is divided into the first section and the second section, the public connection point is set in the middle of the public connection line, the number of bias connection points in the first section is the same as the number of bias connection points in the second section Similarly, each bias connection point in the first section is arranged symmetrically with one of the bias connection points in the second section with the common connection point as the center. This setting makes the length of each bias connection point in the common connection line close, and will not cause a large difference in the bias resistance in the amplifying circuit unit, thus solving the circuit reliability problem caused by the asymmetry of the bias connection point and amplifier performance degradation issues. Therefore, the circuit performance of the power amplifier and the operational amplifier of the radio frequency chip in the embodiment of the utility model is good.
附图说明Description of drawings
下面结合附图详细说明本实用新型。通过结合以下附图所作的详细描述,本实用新型的上述或其他方面的内容将变得更清楚和更容易理解。附图中,Below in conjunction with accompanying drawing, describe the utility model in detail. Through the detailed description in conjunction with the following drawings, the content of the above or other aspects of the present invention will become clearer and easier to understand. In the attached picture,
图1为相关技术的功率放大器的电路版图;Fig. 1 is the circuit layout of the power amplifier of related art;
图2为本实用新型实施例的功率放大器的电路版图;Fig. 2 is the circuit layout of the power amplifier of the utility model embodiment;
图3为本实用新型实施例的功率放大器的电路结构图;Fig. 3 is the circuit structure diagram of the power amplifier of the utility model embodiment;
图4为本实用新型实施例的放大电路单元的电路结构图。Fig. 4 is a circuit structure diagram of the amplifying circuit unit of the embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图详细说明本实用新型的具体实施方式。The specific embodiment of the utility model will be described in detail below in conjunction with the accompanying drawings.
在此记载的具体实施方式/实施例为本实用新型的特定的具体实施方式,用于说明本实用新型的构思,均是解释性和示例性的,不应解释为对本实用新型实施方式及本实用新型范围的限制。除在此记载的实施例外,本领域技术人员还能够基于本申请权利要求书和说明书所公开的内容采用显而易见的其它技术方案,这些技术方案包括采用对在此记载的实施例的做出任何显而易见的替换和修改的技术方案,都在本实用新型的保护范围之内。The specific implementations/embodiments described here are specific specific implementations of the present utility model, and are used to illustrate the concept of the present utility model. Limitations on the scope of utility models. In addition to the embodiments described here, those skilled in the art can also adopt other obvious technical solutions based on the claims of the application and the contents disclosed in the description, and these technical solutions include adopting any obvious changes made to the embodiments described here. The replacement and modified technical solutions are all within the protection scope of the present utility model.
(第一实施例)(first embodiment)
本实用新型提供一种功率放大器100。The utility model provides a power amplifier 100 .
请同时参考图2-4所示,图2为本实用新型实施例的功率放大 器的电路版图;图3为本实用新型实施例的功率放大器的电路结构图;图4为本实用新型实施例的放大电路单元的电路结构图。Please refer to shown in Fig. 2-4 at the same time, Fig. 2 is the circuit layout of the power amplifier of the utility model embodiment; Fig. 3 is the circuit structure diagram of the power amplifier of the utility model embodiment; Fig. 4 is the utility model embodiment The circuit structure diagram of the amplification circuit unit.
一种功率放大器100。其包括放大电路1和向所述放大电路1提供偏置电压Vias的偏置电路2。功率放大器100为差分结构功率合成功率放大器。A power amplifier 100. It includes an amplifying circuit 1 and a bias circuit 2 providing a bias voltage Vias to the amplifying circuit 1 . The power amplifier 100 is a differential structure power combining power amplifier.
所述放大电路1包括多个相互并联设置的放大电路单元3。The amplifying circuit 1 includes a plurality of amplifying circuit units 3 arranged in parallel with each other.
每一所述放大电路单元3的第一输入端均相互连接并作为所述放大电路1的输入端PIN。每一所述放大电路单元3的第二输入端均连接至所述偏置电压Vias。每一所述放大电路单元3的输出端均相互连接并作为所述放大电路1的输出端POUT。The first input terminals of each amplifying circuit unit 3 are connected to each other and serve as the input terminal PIN of the amplifying circuit 1 . The second input terminal of each amplifying circuit unit 3 is connected to the bias voltage Vias. The output terminals of each amplifying circuit unit 3 are connected to each other and serve as the output terminal POUT of the amplifying circuit 1 .
具体的,所述放大电路单元3包括电容C、电阻R以及晶体管Q。所述晶体管Q为双极结型晶体管(英文Bipolar Junction Transistor,简称BJT)。其中,电容C作为所述放大电路单元3的输入匹配电容,电容C用于实现隔直电容的作用;电阻R作为所述放大电路单元3的偏置电阻;Specifically, the amplifying circuit unit 3 includes a capacitor C, a resistor R and a transistor Q. The transistor Q is a bipolar junction transistor (Bipolar Junction Transistor, BJT for short). Wherein, the capacitor C is used as the input matching capacitor of the amplifying circuit unit 3, and the capacitor C is used to realize the function of a DC blocking capacitor; the resistor R is used as a bias resistor of the amplifying circuit unit 3;
所述放大电路单元3的电路连接关系为:The circuit connection relationship of the amplifying circuit unit 3 is:
所述电容C的第一端作为所述第一输入端。所述电容C的第一端分别连接至所述电阻R的第二端和所述晶体管Q的基极。The first terminal of the capacitor C is used as the first input terminal. The first terminal of the capacitor C is respectively connected to the second terminal of the resistor R and the base of the transistor Q.
所述电阻R的第二端作为所述第二输入端。且所述电阻R的第二端连接至所述偏置电路2。即所述电阻R的第二端接收所述偏置电路2提供的偏置电压Vias。The second end of the resistor R is used as the second input end. And the second end of the resistor R is connected to the bias circuit 2 . That is, the second end of the resistor R receives the bias voltage Vias provided by the bias circuit 2 .
所述晶体管Q的集电极作为所述放大电路单元3的输出端。且所述晶体管Q的集电极连接至电源电压VDD。所述晶体管Q的发射极连接至接地GND。The collector of the transistor Q serves as the output terminal of the amplifying circuit unit 3 . And the collector of the transistor Q is connected to the power supply voltage VDD. The emitter of the transistor Q is connected to the ground GND.
所述放大电路单元3为N个。N为偶数。其中,N≤8。There are N amplifying circuit units 3 . N is an even number. Among them, N≤8.
本实施方式中,N为8。即所述放大电路1包括8个相互并联设置的放大电路单元3。8个的放大电路单元3有利于放大电路单元3的电路版图布局的对称性,更有利于缩短与偏置电路2连接的金属连接线的长度。In this embodiment, N is 8. That is, the amplifying circuit 1 includes 8 amplifying circuit units 3 arranged in parallel with each other. The 8 amplifying circuit units 3 are conducive to the symmetry of the circuit layout of the amplifying circuit unit 3, and are more conducive to shortening the distance connected to the bias circuit 2. The length of the metal connection wire.
8个的放大电路单元3各自包括一个电阻R。具体为,按依次 排列顺序为电阻R1、电阻R2、电阻R3、电阻R4、电阻R5、电阻R6、电阻R7以及电阻R8。电阻R1、电阻R2、电阻R3、电阻R4、电阻R5、电阻R6、电阻R7以及电阻R8均在放大电路单元3电路中作为偏置电阻。8个并排的放大电路单元3和一个偏置电路2可组成一个功率放大器100。Each of the eight amplifying circuit units 3 includes a resistor R. Specifically, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6, the resistor R7 and the resistor R8 are arranged in sequence. The resistors R1 , R2 , R3 , R4 , R5 , R6 , R7 and R8 are all used as bias resistors in the amplifying circuit unit 3 . Eight parallel amplifying circuit units 3 and one bias circuit 2 can form a power amplifier 100 .
本实施方式中,所述放大电路1包括多个。所述偏置电路2包括多个。当然,不限于此,在另外的实施方式中,所述放大电路1包括多个。所述偏置电路2包括多个。每一所述放大电路1与一个所述偏置电路2相对应连接。例如,所述放大电路1包括4个。所述偏置电路2包括4个。即放大电路单元3具有32个。In this embodiment, the amplifying circuit 1 includes multiple. The bias circuit 2 includes a plurality of. Of course, it is not limited thereto, and in another embodiment, the amplifier circuit 1 includes multiple. The bias circuit 2 includes a plurality of. Each amplifying circuit 1 is correspondingly connected to one biasing circuit 2 . For example, the amplifying circuit 1 includes four. The bias circuit 2 includes four. That is, there are 32 amplifier circuit units 3 .
所述功率放大器100在电路版图设有公共连接线L。本实施方式中,所述公共连接线L为呈矩形的金属线。The power amplifier 100 is provided with a common connection line L on the circuit layout. In this embodiment, the common connection line L is a rectangular metal line.
所述偏置电路2与所述公共连接线L的连接点为公共连接点E。The connection point between the bias circuit 2 and the common connection line L is the common connection point E.
所述放大电路单元3在电路版图上呈并排设置。所述第二输入端连接至所述公共连接线L。所述第二输入端与所述公共连接线L的连接点为偏压连接点。每一偏压连接点与一个所述放大电路单元3相对应。其中,所述第二输入端为电阻R与所述公共连接线L的连接的一端。The amplifying circuit units 3 are arranged side by side on the circuit layout. The second input terminal is connected to the common connection line L. The connection point between the second input end and the common connection line L is a bias voltage connection point. Each bias connection point corresponds to one amplifying circuit unit 3 . Wherein, the second input end is one end of the connection between the resistor R and the common connection line L.
本实施方式中,偏压连接点按依次排列顺序为连接点T1、连接点T2、连接点T3、连接点T4、连接点T5、连接点T6、连接点T7以及连接点T8,其中,电阻R1连接至所述公共连接线L的偏压连接点相应为连接点T1;电阻R2连接至所述公共连接线L的偏压连接点相应为连接点T2;电阻R3连接至所述公共连接线L的偏压连接点相应为连接点T3;电阻R4连接至所述公共连接线L的偏压连接点相应为连接点T4;电阻R5连接至所述公共连接线L的偏压连接点相应为连接点T5;电阻R6连接至所述公共连接线L的偏压连接点相应为连接点T6;电阻R7连接至所述公共连接线L的偏压连接点相应为连接点T7;电阻R8连接至所述公共连接线L的偏压连接点相应为连接点T8。In this embodiment, the bias connection points are arranged in order of connection point T1, connection point T2, connection point T3, connection point T4, connection point T5, connection point T6, connection point T7 and connection point T8, wherein the resistor R1 The bias connection point connected to the common connection line L is correspondingly the connection point T1; the bias connection point connected to the common connection line L by the resistor R2 is correspondingly the connection point T2; the resistor R3 is connected to the common connection line L The bias connection point of the resistor R4 is connected to the connection point T3; the bias connection point of the resistor R4 connected to the common connection line L is corresponding to the connection point T4; the bias connection point of the resistor R5 connected to the common connection line L is corresponding to the connection point Point T5; the bias connection point where the resistor R6 is connected to the common connection line L is correspondingly the connection point T6; the bias connection point where the resistor R7 is connected to the common connection line L is correspondingly the connection point T7; the resistance R8 is connected to the The bias connection point of the common connection line L is correspondingly the connection point T8.
所述公共连接线L包括第一段L1和第二段L2。所述公共连接点E设置于所述公共连接线L的中间。且所述第一段L1和所述第二段L2通过所述公共连接点E连接。所述第一段L1内的所述偏压连接点数量与所述第二段L2内的所述偏压连接点数量相同。The common connection line L includes a first segment L1 and a second segment L2. The common connection point E is disposed in the middle of the common connection line L. And the first section L1 and the second section L2 are connected through the common connection point E. The number of the bias connection points in the first section L1 is the same as the number of the bias connection points in the second section L2.
本实施方式中,连接点T1、连接点T2、连接点T3、连接点T4位于第一段L1内。连接点T5、连接点T6、连接点T7以及连接点T8位于第二段L2内。In this embodiment, the connection point T1, the connection point T2, the connection point T3, and the connection point T4 are located in the first segment L1. The connection point T5, the connection point T6, the connection point T7 and the connection point T8 are located in the second section L2.
位于所述第一段L1内的每一所述偏压连接点均分别与位于所述第二段L2内的其中一个所述偏压连接点以所述公共连接点E为中心对称设置。该设置使得公共连接线L内的每一偏压连接点的长度接近,不会造成放大电路单元3内的偏置电阻的出现较大差异,从而解决了偏压连接点不对称导致的电路可靠性问题和放大器性能恶化问题。Each of the bias connection points located in the first section L1 is respectively arranged symmetrically with one of the bias connection points located in the second section L2 with the common connection point E as the center. This setting makes the length of each bias connection point in the common connection line L close, and will not cause a large difference in the bias resistance in the amplifying circuit unit 3, thereby solving the problem of circuit reliability caused by the asymmetry of the bias connection point. Sexuality issues and amplifier performance degradation issues.
本实施方式中,所有放大电路单元3的总电阻R为300欧姆,放大电路单元3数量是8个,从公共连接点E处为基点看向这8个放大电路单元3组成的所述放大电路1,所述放大电路1等效偏置电阻Rs约为37.5欧姆。所述放大电路1等效偏置电阻Rs相对于背景技术中的等效偏置电阻Rs约为10欧姆大很多。因此,所述放大电路1等效偏置电阻Rs较大,功率放大器100的电路工作状态相对于背景技术中的功率放大器性能更稳定,从而提高了功率放大器100的可靠性和优化放大器性能。In this embodiment, the total resistance R of all amplifying circuit units 3 is 300 ohms, and the number of amplifying circuit units 3 is 8. The amplifying circuit composed of these 8 amplifying circuit units 3 is viewed from the common connection point E as a base point. 1. The equivalent bias resistance Rs of the amplifying circuit 1 is about 37.5 ohms. The equivalent bias resistance Rs of the amplifying circuit 1 is much larger than the equivalent bias resistance Rs of about 10 ohms in the background art. Therefore, the equivalent bias resistance Rs of the amplifying circuit 1 is larger, and the circuit working state of the power amplifier 100 is more stable than that of the power amplifier in the background art, thereby improving the reliability of the power amplifier 100 and optimizing the performance of the amplifier.
在另外的实施方式中,如果差分结构功率合成的功率放大器100的32个放大电路单元3,那么需要4个这样的放大电路1。In another embodiment, if there are 32 amplifying circuit units 3 in the power amplifier 100 of differential structure power combining, then four such amplifying circuits 1 are required.
需要指出的是,本实用新型采用的相关偏置电路、放大器电路、电容、晶体管和电阻均为本领域常用的电路和元器件,电路和元器件对应的具体的指标和参数可根据实际应用进行调整,在此,不作详细赘述。It should be pointed out that the relevant bias circuits, amplifier circuits, capacitors, transistors and resistors used in the utility model are all circuits and components commonly used in this field, and the specific indicators and parameters corresponding to the circuits and components can be determined according to actual applications. The adjustment is not described in detail here.
本实用新型的实施例还提供一种射频芯片。所述射频芯片包括所述功率放大器100。The embodiment of the utility model also provides a radio frequency chip. The radio frequency chip includes the power amplifier 100 .
与相关技术相比,本实用新型实施例的功率放大器通过设置偏 置电路与公共连接线的连接点为公共连接点,设置放大电路单元的第二输入端与公共连接线的连接点为偏压连接点;并将公共连接线分为第一段和第二段,公共连接点设置于公共连接线的中间,第一段内的偏压连接点数量与第二段内的偏压连接点数量相同,位于第一段内的每一偏压连接点均分别与位于第二段内的其中一个偏压连接点以所述公共连接点为中心对称设置。该设置使得公共连接线内的每一偏压连接点的长度接近,不会造成放大电路单元内的偏置电阻的出现较大差异,从而解决了偏压连接点不对称导致的电路可靠性问题和放大器性能恶化问题。因此,本实用新型实施例的功率放大器和射频芯片的运算放大器的电路工作性能好。Compared with the related technology, the power amplifier of the utility model embodiment sets the connection point of the bias circuit and the common connection line as the common connection point, and sets the connection point of the second input terminal of the amplifying circuit unit and the common connection line as the bias voltage connection point; and the public connection line is divided into the first section and the second section, the public connection point is set in the middle of the public connection line, the number of bias connection points in the first section is the same as the number of bias connection points in the second section Similarly, each bias connection point in the first section is arranged symmetrically with one of the bias connection points in the second section with the common connection point as the center. This setting makes the length of each bias connection point in the common connection line close, and will not cause a large difference in the bias resistance in the amplifying circuit unit, thus solving the circuit reliability problem caused by the asymmetry of the bias connection point and amplifier performance degradation issues. Therefore, the circuit performance of the power amplifier and the operational amplifier of the radio frequency chip in the embodiment of the utility model is good.
需要说明的是,以上参照附图所描述的各个实施例仅用以说明本实用新型而非限制本实用新型的范围,本领域的普通技术人员应当理解,在不脱离本实用新型的精神和范围的前提下对本实用新型进行的修改或者等同替换,均应涵盖在本实用新型的范围之内。此外,除上下文另有所指外,以单数形式出现的词包括复数形式,反之亦然。另外,除非特别说明,那么任何实施例的全部或一部分可结合任何其它实施例的全部或一部分来使用。It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the utility model rather than limit the scope of the utility model, those of ordinary skill in the art should understand that without departing from the spirit and scope of the utility model Any modifications or equivalent replacements made to the present utility model under the premise of the present utility model shall be covered within the scope of the present utility model. Further, words appearing in the singular include the plural and vice versa unless the context otherwise requires. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.

Claims (8)

  1. 一种功率放大器,其包括放大电路和向所述放大电路提供偏置电压的偏置电路,所述放大电路包括多个相互并联设置的放大电路单元;每一所述放大电路单元的第一输入端均相互连接并作为所述放大电路的输入端,每一所述放大电路单元的第二输入端均连接至所述偏置电路,每一所述放大电路单元的输出端均相互连接并作为所述放大电路的输出端;其特征在于,A power amplifier comprising an amplifying circuit and a bias circuit providing a bias voltage to the amplifying circuit, the amplifying circuit comprising a plurality of amplifying circuit units arranged in parallel with each other; the first input of each amplifying circuit unit terminals are connected to each other and used as the input terminal of the amplifying circuit, the second input terminal of each amplifying circuit unit is connected to the bias circuit, and the output terminals of each amplifying circuit unit are connected to each other and used as the input terminal of the amplifying circuit unit. The output terminal of the amplifying circuit; it is characterized in that,
    所述放大电路单元为N个,N为偶数;There are N amplifying circuit units, and N is an even number;
    所述功率放大器在电路版图设有公共连接线,所述偏置电路与所述公共连接线的连接点为公共连接点;The power amplifier is provided with a common connection line on the circuit layout, and the connection point between the bias circuit and the common connection line is a common connection point;
    所述放大电路单元在电路版图上呈并排设置,所述第二输入端连接至所述公共连接线,所述第二输入端与所述公共连接线的连接点为偏压连接点,每一偏压连接点与一个所述放大电路单元相对应;The amplifying circuit units are arranged side by side on the circuit layout, the second input end is connected to the common connection line, the connection point between the second input end and the common connection line is a bias connection point, and each The bias connection point corresponds to one of the amplifying circuit units;
    所述公共连接线包括第一段和第二段,所述公共连接点设置于所述公共连接线的中间,且所述第一段和所述第二段通过所述公共连接点连接;所述第一段内的所述偏压连接点数量与所述第二段内的所述偏压连接点数量相同,位于所述第一段内的每一所述偏压连接点均分别与位于所述第二段内的其中一个所述偏压连接点以所述公共连接点为中心对称设置。The common connection line includes a first segment and a second segment, the common connection point is arranged in the middle of the common connection line, and the first segment and the second segment are connected through the common connection point; The number of the bias connection points in the first section is the same as the number of the bias connection points in the second section, and each of the bias connection points in the first section is respectively connected to the One of the bias connection points in the second segment is arranged symmetrically with respect to the common connection point.
  2. 根据权利要求1所述的功率放大器,其特征在于,N≤8。The power amplifier according to claim 1, characterized in that N≤8.
  3. 根据权利要求2所述的功率放大器,其特征在于,所述放大电路包括多个,所述偏置电路包括多个,每一所述放大电路与一个所述偏置电路相对应连接。The power amplifier according to claim 2, wherein the amplifying circuits include multiple, the bias circuits include multiple, and each of the amplifying circuits is correspondingly connected to one of the bias circuits.
  4. 根据权利要求3所述的功率放大器,其特征在于,N为8,所述放大电路包括4个,所述偏置电路包括4个。The power amplifier according to claim 3, wherein N is 8, said amplifying circuits include 4, and said bias circuits include 4.
  5. 根据权利要求1所述的功率放大器,其特征在于,所述公共连接线为呈矩形的金属线。The power amplifier according to claim 1, wherein the common connection line is a rectangular metal line.
  6. 根据权利要求1所述的功率放大器,其特征在于,所述放大电路单元包括电容、电阻以及晶体管;The power amplifier according to claim 1, wherein the amplifying circuit unit comprises a capacitor, a resistor and a transistor;
    所述电容的第一端作为所述第一输入端,所述电容的第一端分别连接至所述电阻的第二端和所述晶体管的基极;The first terminal of the capacitor is used as the first input terminal, and the first terminal of the capacitor is respectively connected to the second terminal of the resistor and the base of the transistor;
    所述电阻的第二端作为所述第二输入端,且所述电阻的第二端连接至所述偏置电压;The second end of the resistor is used as the second input end, and the second end of the resistor is connected to the bias voltage;
    所述晶体管的集电极作为所述放大电路单元的输出端,且所述晶体管的集电极连接至电源电压;所述晶体管的发射极连接至接地。The collector of the transistor is used as the output terminal of the amplifying circuit unit, and the collector of the transistor is connected to the power supply voltage; the emitter of the transistor is connected to the ground.
  7. 根据权利要求5所述的功率放大器,其特征在于,所述晶体管为双极结型晶体管。The power amplifier according to claim 5, wherein the transistor is a bipolar junction transistor.
  8. 一种射频芯片,其特征在于,所述射频芯片包括如权利要求1-7中任意一项所述的功率放大器。A radio frequency chip, characterized in that the radio frequency chip comprises the power amplifier according to any one of claims 1-7.
PCT/CN2022/132749 2021-12-17 2022-11-18 Power amplifier and radio frequency chip WO2023109425A1 (en)

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CN216649629U (en) * 2021-12-17 2022-05-31 深圳飞骧科技股份有限公司 Power amplifier and radio frequency chip

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150333706A1 (en) * 2014-05-15 2015-11-19 Freescale Semiconductor, Inc. Radio frequency power amplifier circuit
CN108696255A (en) * 2017-03-29 2018-10-23 三星电机株式会社 Power amplifier
CN209345109U (en) * 2018-12-19 2019-09-03 北京航空航天大学青岛研究院 Low-noise amplifier based on global noise counteracting method
CN216649629U (en) * 2021-12-17 2022-05-31 深圳飞骧科技股份有限公司 Power amplifier and radio frequency chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150333706A1 (en) * 2014-05-15 2015-11-19 Freescale Semiconductor, Inc. Radio frequency power amplifier circuit
CN108696255A (en) * 2017-03-29 2018-10-23 三星电机株式会社 Power amplifier
CN209345109U (en) * 2018-12-19 2019-09-03 北京航空航天大学青岛研究院 Low-noise amplifier based on global noise counteracting method
CN216649629U (en) * 2021-12-17 2022-05-31 深圳飞骧科技股份有限公司 Power amplifier and radio frequency chip

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