WO2023102913A1 - 发光二极管及发光装置 - Google Patents

发光二极管及发光装置 Download PDF

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Publication number
WO2023102913A1
WO2023102913A1 PCT/CN2021/137175 CN2021137175W WO2023102913A1 WO 2023102913 A1 WO2023102913 A1 WO 2023102913A1 CN 2021137175 W CN2021137175 W CN 2021137175W WO 2023102913 A1 WO2023102913 A1 WO 2023102913A1
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Prior art keywords
emitting diode
light emitting
platform
light
type semiconductor
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PCT/CN2021/137175
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English (en)
French (fr)
Inventor
吴志伟
王燕云
熊伟平
高迪
郭桓邵
彭钰仁
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天津三安光电有限公司
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Priority to PCT/CN2021/137175 priority Critical patent/WO2023102913A1/zh
Priority to CN202180005916.4A priority patent/CN114651337A/zh
Publication of WO2023102913A1 publication Critical patent/WO2023102913A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction

Definitions

  • the invention relates to the technical field of semiconductors, in particular to a light emitting diode and a light emitting device.
  • Light Emitting Diode (English: Light Emitting Diode, referred to as: LED) has the advantages of low cost, high luminous efficiency, energy saving and environmental protection, and is widely used in lighting, visible light communication and light-emitting display and other scenarios.
  • the existing light-emitting diode structure at least includes an epitaxial structure, and the epitaxial structure includes a first-type semiconductor layer, an active layer, and a second-type semiconductor layer stacked in sequence; the first-type semiconductor layer and the second-type semiconductor layer are respectively connected with The electrodes are electrically connected.
  • the active layer is also called the light-emitting layer.
  • a positive voltage is applied to the positive electrode connection end, and a negative voltage is applied to the negative electrode connection end, so that positive and negative voltages are applied to both ends of the light-emitting diode core, so that The active layer emits light, and generally the active layer is a quantum well structure.
  • a light-emitting diode which has a first surface and a second surface opposite to each other , the first surface includes sequentially connected first side, second side, second side, and fourth side, and further includes:
  • the epitaxial structure has a first mesa and a second mesa stacked sequentially from top to bottom, the first mesa includes at least a first type semiconductor layer and an active layer, and the second mesa includes at least a second mesa type semiconductor layer, the upper surface area of the second mesa is greater than or equal to the lower surface area of the first mesa;
  • the projected area of the first table body on the plane where the first surface is located is s, and the perimeter-to-area ratio ⁇ satisfies
  • L 1 is the projected length of the upper surface of the first platform facing through the first side and perpendicular to the plane direction of the first surface.
  • the thickness of the first type semiconductor layer is 2-5 ⁇ m
  • the thickness of the active layer is 0.02-0.07 ⁇ m
  • the thickness of the second type semiconductor layer is 3-11 ⁇ m.
  • the projected area of the first platform on the plane of the first surface is the same as the projected area of the second platform on the plane of the first surface (100).
  • the projected area ratio is 0.02 to 0.6.
  • the sides of the outer contour of the upper surface of the first platform are in contact with the first surface of the first surface of the light emitting diode.
  • the length of the parallel part of the sides is L 2
  • L 1 is greater than L 2
  • at least one side of the projected figure of the first platform on the plane where the first surface is located is arc-shaped.
  • the projection shape of the first platform on the plane where the first surface is located is a circle or an ellipse, or a combined figure of an arc and a line.
  • the projection shape of the second platform on the plane where the first surface of the LED is located is a circle or an ellipse or a rectangle with rounded corners.
  • the first side is equal to the third side
  • the second side is equal to the fourth side
  • the first side a length greater than the length of the second side
  • the position closest to the first side or the third side of the first surface 100 in the outer contour of the upper surface of the second platform 10b is the minimum distance to the side of the upper surface of the first platform 10b for D1;
  • the position closest to the second side or the fourth side of the first surface 100 in the outer contour of the upper surface of the second platform 10b is the minimum distance to the side of the upper surface of the first platform 10b for D2;
  • Said D1 is smaller than D2.
  • the minimum distance from the side of the projection figure of the first platform on the plane where the first surface of the LED is located to the first side or the third side is The distance D1 is 2 to 6 ⁇ m.
  • the first type semiconductor layer is provided with a first contact electrode, and the first contact electrode includes a first point electrode and two first extensions b, The two first extension parts extend from the first point electrode to different side directions of the light emitting diode respectively.
  • the two first extensions form a straight line segment or an arc segment.
  • the two ends of the arc segment projected on the first surface are located on the first platform On the centerline of the projected shape of the first surface.
  • the second type semiconductor layer is provided with a second contact electrode, the second contact electrode is a point electrode, or the second contact electrode includes a second A dot electrode and two second extension parts, the two second extension parts start from the second dot electrode and respectively extend toward opposite sides of the light emitting diode.
  • the projected length of the second contact electrode on the plane is less than to The projected length of the first contact electrode on the plane.
  • an insulating protective layer is further included, and the insulating protective layer is arranged on the first surface and the sidewall of the epitaxial structure; above the insulating protective layer, a second a pad electrode and a second pad electrode;
  • the insulating protection layer is provided with a first opening and a second opening, the first pad electrode is filled into the first opening to be electrically connected with the first type semiconductor layer; the second pad electrode is filled The second opening is electrically connected to the second type semiconductor layer.
  • a first contact electrode is provided between the first pad electrode and the first type semiconductor layer; the second pad electrode and the second A second contact electrode is arranged between the type semiconductor layers.
  • the width of the bottom end of the first opening is less than or equal to the width of the bottom end of the first contact electrode
  • the width of the bottom end of the second opening is less than or equal to the width of the bottom end of the first opening.
  • the width of the bottom end of the second contact electrode is less than or equal to the width of the bottom end of the second contact electrode.
  • the first pad electrode and the second pad electrode when viewed perpendicular to the direction of the first surface, respectively include a partial area and the active layer regions overlap, or the first pad electrode and the second pad electrode are located completely outside the active layer.
  • a substrate is further included, and a bonding layer is arranged between the substrate and the epitaxial structure;
  • the bonding layer is a single-layer or composite-layer structure, and is made of conductive or insulating materials.
  • the thickness of the bonding layer is 1-5 ⁇ m.
  • the size of the light emitting diode is less than 300 ⁇ m.
  • the present invention also provides an embodiment, a light-emitting diode, which has a first surface and a second surface that are relatively up and down, and the first surface includes a first side, a second side, a third side,
  • the fourth side also includes:
  • the epitaxial structure has a first mesa and a second mesa stacked sequentially from top to bottom, the first mesa includes at least a first type semiconductor layer and an active layer, and the second mesa includes at least a second mesa type semiconductor layer, the upper surface area of the second mesa is greater than or equal to the lower surface area of the first mesa;
  • the size of the light-emitting diode is less than 300 ⁇ m, and at least one side of the projection figure of the first platform on the plane where the first surface is located is arc-shaped, and the arc-shaped protrusion is closer to the first surface of the light-emitting diode.
  • the direction of the side of the arc is less than 300 ⁇ m, and at least one side of the projection figure of the first platform on the plane where the first surface is located is arc-shaped, and the arc-shaped protrusion is closer to the first surface of the light-emitting diode. The direction of the side of the arc.
  • a light emitting device which adopts any light emitting diode as described above.
  • the first platform body including the active layer satisfies the requirement of the circumference-to-area ratio ⁇ defined under the same area Under the same light-emitting area of the active layer, the exposed part of the side of the first platform body is less, thereby reducing the problems of light absorption and non-radiative recombination caused by sidewall defects in low-current light-emitting diodes.
  • non-planar The light-emitting surface of the light-emitting diode can increase the light-emitting probability of the side wall of the light-emitting diode, and further improve the external luminous efficiency of the light-emitting diode.
  • At least one side of the projection figure of the first platform on the plane where the first surface is located is arc-shaped, so that in the same active layer Under the upper and lower light-emitting areas, the exposed part of the side of the first body is less, thereby reducing the light absorption and non-radiative recombination problems caused by sidewall defects in low-current light-emitting diodes.
  • the circular or elliptical shape may be useful
  • the arc-shaped light-emitting surface with rounded corners can increase the light-emitting probability of the side wall of the light-emitting diode, and further improve the external luminous efficiency of the light-emitting diode.
  • FIG. 1 is a schematic cross-sectional view of a light emitting diode structure in an existing technical solution
  • FIG. 2 is a schematic top view of a light emitting diode structure in an existing technical solution
  • Fig. 3 is the schematic diagram that both the first platform and the second platform are cuboid structures in the existing technical scheme
  • Figure 4 is a schematic cross-sectional view of a light-emitting diode structure in an embodiment of the present invention
  • Fig. 5 is a schematic diagram of the first embodiment of the projection shape of the first platform to the plane where the first surface is located in the embodiment of the present invention
  • FIG. 6 is a schematic diagram of a second embodiment of the projection shape of the first platform to the plane where the first surface is located in the embodiment of the present invention
  • Fig. 7 is a schematic diagram of a third embodiment of the projection shape of the first platform to the plane where the first surface is located in the embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a fourth embodiment of the projected shape of the first platform onto the plane where the first surface is located in the embodiment of the present invention.
  • Fig. 9 is a schematic diagram of the principle diagram of the optical path of the light inside the light emitting diode
  • FIGS. 10-12 are schematic diagrams of the projection shapes of the second platform 10b on the plane where the first surface of the light-emitting diode is located, which are respectively circular, elliptical, and rectangular with rounded corners;
  • Fig. 13 is a schematic diagram of an embodiment of a first extension part and a second extension part of a light emitting diode
  • Fig. 14 is a schematic diagram of another embodiment of the first extension part and the second extension part of the light emitting diode
  • Fig. 15 is a schematic top view of the light emitting diode structure in an embodiment of the present invention.
  • Fig. 16 is a schematic cross-sectional view of Fig. 15 section line B-B';
  • Fig. 17 is a schematic top view of the light emitting diode structure in another embodiment of the present invention.
  • Fig. 18 is a schematic cross-sectional view of Fig. 15 section line C-C';
  • FIG. 19 is a schematic diagram of an optical test result that also provides an embodiment.
  • the existing flip-chip light-emitting diodes with a size of less than 300 ⁇ m that is, flip-chip light-emitting diodes with a side length of less than 300 ⁇ m, belong to small-sized light-emitting diodes, and the usual operating current is 0.01mA ⁇ 1.5mA.
  • FIG 1 Its structure is shown in Figure 1, including : an epitaxial structure, having a first mesa 10a and a second mesa 10b stacked sequentially from top to bottom, the first mesa 10a at least includes a first type semiconductor layer 11 and an active layer 13, the second The mesa 10b includes at least the second type semiconductor layer 12, and the upper surface area of the second mesa 10b is greater than or equal to the lower surface area of the first mesa 10a; wherein, as shown in Figures 2 and 3, the first Both the platform body 10a and the second platform body 10b are designed in a rectangular parallelepiped structure.
  • a light emitting diode is provided, as shown in FIG. 4 and FIG. 5 , having a first surface 100 and a second surface 200 opposite up and down, and the first surface 100 includes a first side a and a second side b sequentially connected , the second side c, the fourth side d, the four sides can form a rectangle or a square in turn, and the specific shape depends on the actual product; it also includes:
  • the epitaxial structure has a first mesa 10a and a second mesa 10b stacked sequentially from top to bottom, the first mesa 10a includes at least a first type semiconductor layer 11 and an active layer 13, and the second mesa
  • the body 10b includes at least a second type semiconductor layer 12, and the upper surface area of the second mesa 10b is greater than or equal to the lower surface area of the first mesa 10a;
  • the epitaxial structure is formed on the original substrate by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE);
  • the original growth substrate includes Select at least one of sapphire (Al 2 O 3 ), SiC, GaAs, GaN, ZnO, GaP, InP and Ge, and are not limited to the examples listed here, but in this embodiment, GaAs is preferred as the original growth substrate.
  • the first-type semiconductor layer 11 and the second-type semiconductor layer 12 are semiconductors with different conductivity types, electrical properties, and polarities, which provide electrons or holes according to doped elements; for example, when the first type When the semiconductor layer 11 is n-type, the second-type semiconductor layer 12 is p-type, and the active layer 13 is formed between the first-type semiconductor layer 11 and the second-type semiconductor layer 12, and electrons and holes are driven by a current
  • the active layer 13 recombines and converts electrical energy into light energy to emit light, and adjusts the wavelength of light emitted by the light-emitting diode by changing the physical and chemical composition of one or more layers of the epitaxial light-emitting layer; and vice versa.
  • the second type semiconductor layer 12 is a p-type light emitting diode.
  • the active layer 13 also referred to as a light emitting layer or an active layer, is located between the first type semiconductor layer 11 and the second type semiconductor layer 12 and can convert electrical energy into light energy.
  • the radiation light emitted by the active layer 13 can be red light or infrared radiation;
  • the active layer 13 can be single heterostructure (single heterostructure, SH), double heterostructure (double heterostructure, DH), double-sided double heterostructure (double-sided double heterostructure, DDH), multilayer quantum well structure ( multiquant ⁇ mwell, MQW).
  • the active layer 13 When the active layer 13 is based on aluminum indium gallium phosphide (AlGaInP) series materials, by doping the semiconductor layer, the active layer 13 will emit red, orange, and yellow amber light; when When based on materials of the AlGaInN series, the active layer 13 emits blue or green light. In this embodiment, a light emitting diode that emits red light or infrared light radiation is preferred as an example.
  • AlGaInP aluminum indium gallium phosphide
  • the light emitting diode further includes a substrate 50.
  • a substrate 50 In the embodiment of the manufacturing process of the light emitting diode, an epitaxial structure grown on the original substrate is provided first, and then the epitaxial structure of the light emitting diode element is After the bonding is transferred to the substrate 10, the original epitaxial growth substrate of the epitaxial structure of the LED element is removed, that is, the bonding of the substrate 10 and the epitaxial structure is completed.
  • the substrate 10 can be a conductive substrate or a non-conductive substrate, and can also be transparent or non-transparent.
  • a bonding layer 20 is disposed between the substrate 50 and the epitaxial structure; preferably, the bonding layer 20 is a single layer or a composite layer structure, and is made of conductive or insulating materials.
  • the substrate 50 and the epitaxial structure are bonded through a bonding layer 20, the bonding layer 20 is a single-layer or composite layer structure, and its thickness is preferably 1-5 ⁇ m. It is made of conductive material or insulating material, and the bonding layer 20 can be transparent or non-transparent material.
  • the bonding layer 20 is a composite layer structure, it is composed of a bonding conductive layer and a bonding non-conductive layer; the bonding non-conductive layer is closer to the substrate than the bonding conductive layer.
  • the bonding conductive layer is an oxide containing at least one selected from Zn, In, Sn, and Mg. More preferably, the bonding conductive layer is one of ZnO, In 2 O 3 , SnO 2 , ITO (Indium Tin Oxide; ITO), IZO (Indium Zinc Oxide), GZO (Galliumdoped Zinc Oxide) or any combination thereof.
  • the material of the bonding non-conductive layer is preferably Al 2 O 3 , SiO 2 , SiNx, MgF 2 or TiO 2 . It should be noted that the substrate 50 is not necessary, and in some embodiments, the substrate 50 can also be removed, such as a micro LED chip.
  • the projected area of the first table body 10a on the plane where the first surface 100 is located is s, and the perimeter-to-area ratio ⁇ satisfies
  • L 1 is the projected length of the upper surface of the first platform 10 a to pass through the first side and perpendicular to the plane direction of the first surface 100 .
  • the first platform 10a is a platform with a circular cross section.
  • the projection shape of the first platform 10a on the plane where the first surface 100 is located is circular;
  • Under the light-emitting area that is, when the upper and lower surface areas of the first platform 10a are constant, the circumference of the upper and lower surfaces of the first platform 10a is the smallest, and when the thickness of the first platform 10a is constant, the first platform 10a can be made
  • the side area of the body 10a is minimized, and the exposed area of the side wall is also smaller, which reduces the problems of light absorption and non-radiative recombination caused by side wall defects in low-current light-emitting diodes.
  • the projection shape of the first platform body 10a to the plane where the first surface 100 is located can be an arc or a straight line Combination figures, such as a combination figure of arc and straight line (referring to Fig. 6 or Fig. 8), or ellipse (referring to Fig. 7).
  • the limitation of this scheme makes the first platform 10a break through the design limitation of the first platform 10a in the existing small-sized light emitting diode adopting the rectangular parallelepiped, thus in the same light-emitting area and (that is, the upper and lower surfaces of the first platform 10a When it is determined) when the thickness of the first platform 10a is constant, the side area of the first platform 10a can be smaller than that of the prior art.
  • the first platform 10a adopts a cuboid design, and the side walls are exposed The area is also smaller, reducing the problems of light absorption and non-radiative recombination due to sidewall defects in low-current LEDs.
  • the first platform 10a adopts a rectangular parallelepiped design, as shown in FIG. A large part of the light will be reflected back into the semiconductor due to total reflection. After multiple reflections, most of the light will be absorbed by the semiconductor structure itself, resulting in extremely low light extraction efficiency of the structure.
  • the incident angle ⁇ 2 of the non-planar light is significantly smaller than ⁇ 1, so the light can avoid total reflection on the surface of the first platform 10a with a higher probability, thereby improving the side wall of the light emitting diode.
  • the light output probability further improves the external luminous efficiency of the light emitting diode.
  • the sides of the outer contour of the upper surface of the first platform 10a and the light emitting diode when viewed perpendicular to the direction of the first surface, the sides of the outer contour of the upper surface of the first platform 10a and the light emitting diode
  • the length of the parallel portion of the first side a of the first surface is L 2
  • L 1 is greater than L 2
  • at least one side of the projection figure of the first platform 10 a on the plane where the first surface is located is arc-shaped.
  • the embodiment in which L 1 is greater than L 2 is also included as shown in FIG. 6 , FIG. 7 , and FIG. 8 , wherein, in the embodiments in FIG. 5 and FIG. 7 , the length of L 2 is zero.
  • the projection of the side surface of the first platform 10a on the plane where the first surface 100 of the light emitting diode is located is non-linear, and under the same area
  • the second The side of the first platform 10a can have a smaller area compared with the solution in the prior art that the first platform 10a is a cuboid structure, that is, under the same active layer upper and lower light emitting areas, the side of the first platform 10a Less exposed parts reduce light absorption and non-radiative recombination problems caused by sidewall defects in low current LEDs.
  • the projection shape of the second platform 10b on the plane where the first surface 100 of the light-emitting diode is located is a circle or an ellipse or an Rectangular with rounded corners
  • the design of these second platforms 10b can be combined and matched with the design of the above-mentioned first platform 10a arbitrarily.
  • the probability that the light source emitted by the active layer 13 will be consumed due to total reflection inside the LED can be further reduced, thereby improving the external luminous efficiency of the LED.
  • the thickness of the first-type semiconductor layer 11 is 2-5 ⁇ m
  • the thickness of the active layer 13 is 0.02-0.07 ⁇ m
  • the thickness of the second-type semiconductor layer 12 is 6-11 ⁇ m.
  • the thickness of the epitaxial structure is further reduced, so that the thickness of the first platform 10a is reduced, not only the defect area exposed on the side wall is reduced, but also the number of defects between the epitaxial film layers It will also be reduced, thereby reducing the problems of light absorption and non-radiative recombination caused by defects in low-current LEDs.
  • the ratio of the projected area of the first platform 10a on the plane of the first surface 100 to the projected area of the second platform 10b on the plane of the first surface 100 is 0.02 to 0.6.
  • This design scheme enables the chip to be driven by a small current (0.01mA ⁇ 1mA), so that the current density injected into the active layer can be in an appropriate operating range to maintain a stable external quantum efficiency, while avoiding the current density being too small to make the external quantum efficiency significantly reduce.
  • the first side a is equal to the third side c
  • the second side b is equal to the fourth side c
  • the length of the first side a is greater than that of the second side b length
  • the first side is equal to the third side
  • the second side is equal to the fourth side
  • the length of the first side is greater than the length of the second side
  • the position closest to the first side or the third side of the first surface 100 in the outer contour of the upper surface of the second platform 10b is the minimum distance to the side of the upper surface of the first platform 10b is D1
  • the minimum distance is D2; the D1 is smaller than D2.
  • the minimum distance D1 from the side of the projection figure of the first platform 10a on the plane where the first surface 100 of the LED is located to the first side or the third side is 2-6 ⁇ m.
  • the first type semiconductor layer 11 is provided with a first contact electrode 31, and the second A contact electrode 31 includes a first point electrode 31a and two first extensions 31b, and the two first extensions 31b extend from the first point electrode 31a to different sides of the light emitting diode respectively.
  • the current can be diffused more uniformly in the light-emitting region, thereby improving the uniformity of light emission.
  • the two first extensions 31b can form a straight line (refer to FIG. 13 ) or an arc segment (refer to FIGS. 5 and 14 );
  • the two ends of the arc segment projected on the first surface 100 are located at The first surface 100 is projected on the centerline of the shape.
  • the upper surface of the first platform 10a is designed to be circular, and the two first extensions 31b form an arc segment, which can better match the shape of the first platform 10a. Matching reduces the uneven diffusion of current in the corner area of the light-emitting area, so that the uniformity of current diffusion in the light-emitting area is further improved.
  • the two ends of the projection of the arc segment on the first surface 100 are located on the center line of the projection shape of the first platform 10a on the first surface 100, which can facilitate the flow of current between different electrodes of the light emitting diode. diffusion.
  • the second type semiconductor layer 12 is provided with a second contact electrode 32, which can be combined with the electrode form of the first contact electrode 31, as shown in Figures 5 and 14, the The second contact electrode 32 is a point electrode, and this solution is preferably combined with the solution when the two first extensions 31b form an arc segment;
  • the second contact electrode 32 includes a second point electrode 32a and two second extensions 32b, and the two second extensions 32b start from the second point electrode 32a respectively Extending toward the opposite sides of the light-emitting diodes, further, as shown in FIG. 13 , in a plane perpendicular to the first surface 100 of the light-emitting diodes and passing through the fourth side, the second contact electrode
  • the projected length of 32 on the plane is smaller than the projected length of the first contact electrode 31 on the plane.
  • the second type semiconductor layer 12 is a p-type light emitting diode.
  • the epitaxial structure of the light emitting diode has a first mesa 10 a and a second mesa 10 b stacked sequentially from top to bottom, and the first mesa 10 a includes at least The first type semiconductor layer 11 and the active layer 13, the second mesa 10b at least includes the second type semiconductor layer 12, the upper surface area of the second mesa 10b is greater than or equal to that of the first mesa 10a lower surface area; also includes an insulating protective layer 40, the insulating protective layer 40 is arranged on the upper surface and the sidewall of the epitaxial structure; the first pad electrode 51 and the second welding pad electrode 51 are arranged above the insulating protective layer 40 disk electrode 52;
  • the insulating protection layer 40 is provided with a first opening 40a and a second opening 40b;
  • the specific material of the insulating protection layer 40 can be a non-conductive material selected from inorganic oxides or nitrides, or silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, titanium oxide Barium Oxide, Magnesium Fluoride Aluminum Oxide, or their combination, for example, the combination can be a Bragg reflector (DBR) formed by repeated stacking of two materials.
  • DBR Bragg reflector
  • FIG. 4 is a schematic cross-sectional view of the section line A-A in FIG. 5, and a first contact electrode 31 is provided between the first pad electrode 51 and the first type semiconductor layer 11; A second contact electrode 32 is disposed between the second pad electrode 52 and the second type semiconductor layer 12 .
  • the first opening 40a exposes a part of the first type semiconductor layer 11, and the first pad electrode 51 fills the first opening 40a and the first type semiconductor layer.
  • 11 direct contact for electrical connection or ohmic connection with the first type semiconductor layer 11 through the first contact electrode 31, and cover the first opening 40a;
  • the second opening 40b exposes a part of the second type semiconductor layer 12, the first
  • the second pad electrode 52 is filled into the second opening 40b to directly contact the second type semiconductor layer 12 for electrical connection or to conduct ohmic connection with the second type semiconductor layer 12 through the second contact electrode 32;
  • the pad electrode 51 and the second pad electrode 52 partially cover the insulating protection layer 40 , and respectively include a part area overlapping with the area of the active layer 13 .
  • FIG. 16 is a schematic cross-sectional view of the section line B-B in FIG. 15, the first pad electrode 51 and the second pad electrode 52 are completely located The area outside the layer 13, wherein the second opening 40b exposes a part of the second type semiconductor layer 12, and the second pad electrode 52 fills the second opening 40b and directly contacts the second type semiconductor layer 12 for electrical contact.
  • the second contact electrode 32 Connect or perform ohmic connection with the second type semiconductor layer 12 through the second contact electrode 32, the second contact electrode 32 is completely located below the second pad electrode 52; the first opening 40a is located above the second type semiconductor layer 12, A part of the first contact electrode 31 is arranged above the second type semiconductor layer 12, and another part is located above the first type semiconductor layer 11, and is electrically connected to the first type semiconductor layer 11; it also includes An electrical insulation layer 70, the electrical insulation layer 70 is between the first contact electrode 31 and the active layer 13 and between the first contact electrode 31 and the second type semiconductor layer 12, so as to avoid the first contact electrode 31 Contact with the active layer 13 and the second type semiconductor layer 12 for short circuit, the first pad electrode 51 fills the first opening 40a by contacting with the first contact electrode 31, thereby being in contact with the first type The semiconductor layer 11 is electrically connected, and covers the first opening 40a; at this time, the first pad electrode 51 and the second pad electrode 52 are completely located in the area outside the active layer 13, which improves the efficiency of the light emitting diode. luminous
  • the present invention also provides another situation, as shown in Figure 17 and Figure 18, the figure 18 is a schematic cross-sectional view of the section line B-B in FIG.
  • the first pad electrode 51 and the second pad electrode 52 are completely located outside the epitaxial structure, specifically Yes, the first opening 40a is located above the bonding layer 20 (if the substrate 60 is not provided with the bonding layer 20, the substrate 60 is used as a reference), and a part of the first contact electrode 31 is disposed on the bonding layer 20 above and below the first opening 40a, the other part is located above the first type semiconductor layer 11 and is electrically connected to the first type semiconductor layer 11, and also includes an electrical insulating layer 70, the electrical insulating layer 70 between the first contact electrode 31 and the active layer 13, between the first contact electrode 31 and the second type semiconductor layer 12, and between the first contact electrode 31 and the bonding layer 20, In order to prevent the short circuit between the first contact electrode 31 and the active layer 13 and the second type semiconductor layer 12, the first pad electrode 51 fills the first opening 40a and passes through the first contact electrode 31 contact, so as to be electrically connected to the first type semiconductor layer 11, and cover the first opening 40a
  • the second opening 40b is located above the bonding layer 20 (if the substrate 60 is not provided with the bonding layer 20, the substrate 60 is used as a reference).
  • a part of the second contact electrode 32 is disposed above the bonding layer 20 And located below the second opening 40b, the other part is located above the second type semiconductor layer 12, and is electrically connected to the second type semiconductor layer 12, the first pad electrode 51 fills the first opening 40a through It is in contact with the first contact electrode 31 and covers the first opening 40 a, so as to be electrically connected to the top of the second type semiconductor layer 12 .
  • the width of the bottom end of the first opening 40a is less than or equal to the width of the bottom end of the first contact electrode, and the width of the second contact electrode
  • the width of the bottom end of the opening 40 b is smaller than or equal to the width of the bottom end of the second contact electrode 32 .
  • the projection shape of the substrate on the plane where the first surface 100 is located is a circle or an ellipse or a rectangle with rounded corners.
  • the present invention also provides an embodiment of a light-emitting diode.
  • fourth side also includes:
  • the epitaxial structure has a first mesa 10a and a second mesa 10b stacked sequentially from top to bottom, the first mesa 10a includes at least a first type semiconductor layer 11 and an active layer 13, and the second mesa
  • the body 10b includes at least a second type semiconductor layer 12, and the upper surface area of the second mesa 10b is greater than or equal to the lower surface area of the first mesa 10a;
  • At least one side of the projected figure of the first platform 10 a on the plane where the first surface 100 is located is arc-shaped, and the convex portion of the arc faces the light-emitting diode.
  • the first surface 100 is closer to the side of the arc.
  • At least one side of the projection figure of the first platform 10a on the plane where the first surface 100 is located is arc-shaped, that is, the side of the first platform 10a is The arc surface, or the projection of the side of the first platform 10a on the plane where the first surface 100 of the light-emitting diode is located is non-linear.
  • the projection shape of the first platform 10a to the plane where the first surface 100 is located It can be a combined figure of arc and straight line, such as a combined figure of arc and straight line (referring to Figure 6 and Figure 8), or an ellipse (referring to Figure 7), limited by the above design, and then under the same area, the first The side of the first platform 10a can have a smaller area compared with the solution in the prior art that the first platform 10a is a cuboid structure, that is, under the same active layer upper and lower light emitting areas, the side of the first platform 10a Less exposed parts reduce light absorption and non-radiative recombination problems caused by sidewall defects in low current LEDs.
  • the present invention also provides an embodiment of a light-emitting device.
  • the light-emitting device adopts the light-emitting diode structure in any of the above-mentioned embodiments or preferred solutions in the embodiments and combinations thereof, and utilizes the red light or infrared light provided by the light-emitting diode
  • the radiation or blue or green radiation is used for corresponding display or lighting or other optical devices.
  • the present invention also provides an optical test of an embodiment, as shown in FIG. 5 , the specification of the light-emitting diode of the test embodiment shown is 3.5 ⁇ 6mil ⁇ 2 , and the projection of the first platform 10a on the plane where the first surface 100 is located is circular, the two first extensions 31b form an arc segment, and the second contact electrode 32 is a point electrode.
  • the product of this embodiment and the first chip with the same specification as a cuboid are subjected to an optical test for external quantum efficiency test (WPE), as shown in Figure 19, the test results show that the sample is driven by a small current (0.01mA ⁇ 1mA).
  • WPE quantum efficiency test

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Abstract

本发明涉及半导体技术领域，特别涉及一种发光二极管和发光装置，本发明提供的发光二极管中，包含有源层的第一台体通过限定在同等面积下的周长与面积比γ满足（I），使得在同等的有源层发光面积下，第一台体的侧面暴露出来部分更少，从而减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题，此外，非平面的出光面可以提高发光二极管的侧壁出光几率，进一步提高了发光二极管的外部发光效率。

Description

发光二极管及发光装置 技术领域
本发明涉及半导体技术领域，特别涉及一种发光二极管和发光装置。
背景技术
近几年发光二极管得到了广泛的应用，在各种显示系统、照明系统、汽车尾灯等领域起着越来越重要的作用。
发光二极管(英文：Light Emitting Diode，简称：LED)具有成本低、光效高、节能环保等优点，被广泛应用于照明、可见光通信及发光显示等场景。
现有的发光二极管结构中，至少包括有外延结构，而外延结构包括依次层叠的第一类型半导体层、有源层和第二类型半导体层；第一类型半导体层和第二类型半导体层分别与电极进行电性连接。其中，有源层也称之为发光层，在LED工作时，在正电极连接端加载正电压，负电极连接端加载负电压，从而在发光二极管管芯两端加载了正、负电压，使有源层发光，通常所述有源层为量子阱结构。
对于工作在小电流(0.01mA～1.5mA)下的小尺寸发光二极管(尺寸小于300μm)，用户对其外部量子效率要求较高。当发光元件在小电流下工作时，元件暴露的侧壁缺陷产生的缺陷吸收和非辐射复合问题显得尤为突出。
技术解决方案
为了减少上述背景技术中提到的发光二极管在小电流工作时，侧壁暴露面积过多的问题，本发明一实施例中，提供一种发光二极管，具有相对上下的第一表面和第二表面，所述第一表面包括依次连接的第一侧边、第二侧边、第二侧边、第四侧边，还包括：
外延结构，具有从上到下依次叠层的第一台体和第二台体，所述第一台体至少包括第一类型半导体层和有源层，所述第二台体至少包括第二类型半导体层，所述第二台体的上表面面积大于或等于所述第一台体的下表面面积；
所述第一台体于所述第一表面所在平面投影的面积为s，其周长与面积比γ满足
Figure PCTCN2021137175-appb-000001
其中，L 1为所述第一台体的上表面向经过所述第一侧边，且垂直于所述第一表面平面方向的投影长度。
上述技术方案的基础上，一优选的实施例中，所述第一类型半导体层的厚度为2～5μ m，所述有源层的厚度为0.02～0.07μm，第二类型半导体层的厚度为3～11μm。
上述技术方案的基础上，一优选的实施例中，所述第一台体在所述第一表面所在平面的投影面积与所述第二台体在所述第一表面(100)所在平面的投影面积比为0.02～0.6。
上述技术方案的基础上，一优选的实施例中，垂直于所述第一表面方向观之，所述第一台体的上表面外轮廓的侧边与所述发光二极管第一表面的第一侧边平行部分的长度为L 2，L 1大于L 2，且所述第一台体于所述第一表面所在平面投影图形至少有一边为弧形。
上述技术方案的基础上，一优选的实施例中，所述第一台体在所述第一表面所在平面的投影形状为圆形或椭圆形或为弧形与直线的组合图形。
上述技术方案的基础上，一优选的实施例中，所述第二台体在所述发光二极管的第一表面所在平面的投影形状为圆形或椭圆形或为有倒圆角的矩形。
上述技术方案的基础上，一优选的实施例中，所述第一侧边和所述第三侧边相等，所述第二侧边和所述第四侧边相等，所述第一侧边的长度大于所述第二侧边的长度；
所述第二台体10b上表面的外轮廓中最靠近所述第一表面100的第一侧边或第三侧边的位置，到所述第一台体10b的上表面侧边的最小距离为D1；
所述第二台体10b上表面的外轮廓中最靠近所述第一表面100的第二侧边或第四侧边的位置，到所述第一台体10b的上表面侧边的最小距离为D2；
所述D1小于D2。
上述技术方案的基础上，一优选的实施例中，所述第一台体在所述发光二极管的第一表面所在平面投影图形的侧边到所述第一侧边或第三侧边的最小距离D1为2～6μm。
上述技术方案的基础上，一优选的实施例中，所述第一类型半导体层上设置有第一接触电极，所述第一接触电极包括第一点状电极和两个第一延伸部b，两个所述第一延伸部从所述第一点状电极开始分别向发光二极管的不同侧边方向延伸。
上述技术方案的基础上，一优选的实施例中，两个所述第一延伸部形成直线段或弧形段。
上述技术方案的基础上，一优选的实施例中，两个所述第一延伸部形成弧形段时，所述弧形段在所述第一表面投影的两末端位于所述第一台体在所述第一表面投影形状的中心线上。
上述技术方案的基础上，一优选的实施例中，所述第二类型半导体层上设置有第二接触电极，所述第二接触电极为点状电极，或所述第二接触电极包括第二点状电极和两个第二延伸部，两个所述第二延伸部从所述第二点状电极开始分别向发光二极管相对的侧边方向 延伸。
上述技术方案的基础上，一优选的实施例中，在垂直于所述发光二极管第一表面且经过所述第四侧边的平面内，所述第二接触电极在该平面的投影长度小于到第一接触电极在该平面的投影长度。
上述技术方案的基础上，一优选的实施例中，还包括绝缘保护层，所述绝缘保护层设置在所述外延结构的第一表面和侧壁上；所述绝缘保护层的上方设置有第一焊盘电极和第二焊盘电极；
所述绝缘保护层上设置有第一开口和第二开口，所述第一焊盘电极填入所述第一开口以与所述第一类型半导体层电连接；所述第二焊盘电极填入所述第二开口与所述第二类型半导体层电连接。
上述技术方案的基础上，一优选的实施例中，所述第一焊盘电极和所述第一类型半导体层之间设置有第一接触电极；所述第二焊盘电极和所述第二类型半导体层之间设置有第二接触电极。
上述技术方案的基础上，一优选的实施例中，所述第一开口的底端宽度小于或等于所述第一接触电极的底端宽度，所述第二开口的底端宽度小于或等于所述第二接触电极底端宽度。
上述技术方案的基础上，一优选的实施例中，垂直于所述第一表面方向观之，所述第一焊盘电极及所述第二焊盘电极分别包含部分区域与所述有源层的区域重叠，或该第一焊盘电极及所述第二焊盘电极完全位于所述有源层以外的区域。
上述技术方案的基础上，一优选的实施例中，还包括基板，所述基板和所述外延结构之间设置有键合层；
所述键合层为单层或复合层结构，采用导电材料或绝缘材料制成。
上述技术方案的基础上，一优选的实施例中，所述键合层的厚度为1～5μm。
上述技术方案的基础上，一优选的实施例中，所述发光二极管的尺寸小于300μm。
本发明还提供的一实施例，一种发光二极管，具有相对上下的第一表面和第二表面，所述第一表面包括依次连接的第一侧边、第二侧边、第三侧边、第四侧边，还包括：
外延结构，具有从上到下依次叠层的第一台体和第二台体，所述第一台体至少包括第一类型半导体层和有源层，所述第二台体至少包括第二类型半导体层，所述第二台体的上表面面积大于或等于所述第一台体的下表面面积；
所述发光二极管的尺寸小于300μm，第一台体于所述第一表面所在平面投影图形至 少有一边为弧形，所述弧形的凸出部朝向所述发光二极管的第一表面更靠近所述弧形的侧边方向。
本发明技术方在另一方面的实施例中，还提供的一种发光装置，采用如上任意所述的发光二极管。
本发明技术方案提供的发明构思中，包含有源层的第一台体通过限定在同等面积下的周长与面积比γ满足
Figure PCTCN2021137175-appb-000002
使得在同等的有源层发光面积下，第一台体的侧面暴露出来部分更少，从而减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题，此外，非平面的出光面可以提高发光二极管的侧壁出光几率，进一步提高了发光二极管的外部发光效率。
在本发明另一实施例提供的发明构思中，对于尺寸小于300μm的发光二极管，使第一台体于所述第一表面所在平面投影图形至少有一边为弧形，使得在同等的有源层上下发光面积下，第一台体的侧面暴露出来部分更少，从而减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题，此外，圆形或椭圆形或为有倒圆角的弧形出光面可以提高发光二极管的侧壁出光几率，进一步提高了发光二极管的外部发光效率。
有益效果
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为现有的技术方案中的发光二极管结构剖视示意图；
图2为现有的技术方案中的发光二极管结构俯视图意图；
图3为现有的技术方案中第一台体和第二台体均为长方体形结构的示意图；
图4为本发明实施例中一发光二极管结构剖视示意图
图5为本发明实施例中第一台体向所述第一表面所在平面投影形状的第一实施例示意图；
图6为本发明实施例中第一台体向所述第一表面所在平面投影形状的第二实施例示意图；
图7为本发明实施例中第一台体向所述第一表面所在平面投影形状的第三实施例示意图；
图8为本发明实施例中第一台体向所述第一表面所在平面投影形状的第四实施例示意图；
图9光线在发光二极管内部的光路原理图示意图；
图10～12为第二台体10b在所述发光二极管的第一表面所在平面的投影形状分别为圆形、椭圆形、有倒圆角的矩形的示意图；
图13为发光二极管第一延伸部和第二延伸部的一实施例示意图；
图14为发光二极管第一延伸部和第二延伸部的另一实施例示意图；
图15为本发明一实施例中发光二极管结构俯视图意图；
图16为图15剖面线B-B’的剖面示意图；
图17为本发明另一实施例中发光二极管结构俯视图意图；
图18为图15剖面线C-C’的剖面示意图；
图19为还提供一实施例的光学测试结果示意图。
附图标记：
10a第一台体；10b第二台体；11第一类型半导体层；12第二类型半导体层；13有源层；100第一表面；200第二表面；31第一接触电极；31a第一点状电极；31b第一延伸部；32第二接触电极；32a第二点状电极；32b第二延伸部；40绝缘保护层；51第一焊盘电极；52第二焊盘电极；20键合层；70电性绝缘层；40a第一开口；40b第二开口。
本发明的实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要说明的是，术语“中心”、“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解 为对本发明的限制。
此外，术语“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用了区分不同的组成部分。“连接”或者“相连”等类似词语并非限定与物理或者机械的连接，而是可以包括电性的连接、光连接等，不管是直接的还是间接的。
应当理解，本发明所使用的术语仅出于描述具体实施方式的目的，而不是旨在限制本发明。进一步理解，当在本发明中使用术语“包含”、“包括"时，用于表明陈述的特征、整体、步骤、元件、和/或的存在，而不排除一个或多个其他特征、整体、步骤、元件、和/或它们的组合的存在或增加。
除另有定义之外，本发明所使用的所有术语(包括技术术语和科学术语)具有与本发明所属领域的普通技术人员通常所理解的含义相同的含义。应进一步理解，本发明所使用的术语应被理解为具有与这些术语在本说明书的上下文和相关领域中的含义一致的含义，并且不应以理想化或过于正式的意义来理解，除本发明中明确如此定义之外。
现有的尺寸小于300μm的倒装发光二极管，即倒装发光二极管的边长小于300μm的，属于小尺寸发光二极管，通常工作电流为0.01mA～1.5mA，其结构采用如图1所示，包括：外延结构，具有从上到下依次叠层的第一台体10a和第二台体10b，所述第一台体10a至少包括第一类型半导体层11和有源层13，所述第二台体10b至少包括第二类型半导体层12，所述第二台体10b的上表面面积大于或等于所述第一台体10a的下表面面积；其中，如图2和3所示，第一台体10a和第二台体10b均为长方体形结构的设计。
上述小尺寸发光二极管二极管在工作时，由于侧壁暴露的有源层面积比例较多，使得侧壁缺陷产生的光吸收和非辐射复合问题显得尤为突出。
为了主要解决上述技术问题，根据本发明技术方案的涉及构思，提供以下实施例：
提供一种发光二极管，如图4和图5所示，具有相对上下的第一表面100和第二表面200，所述第一表面100包括依次连接的第一侧边a、第二侧边b、第二侧边c、第四侧边d，四边可依次构成长方形或正方形，具体形状以实际产品而定；还包括：
外延结构，具有从上到下依次叠层的第一台体10a和第二台体10b，所述第一台体10a至少包括第一类型半导体层11和有源层13，所述第二台体10b至少包括第二类型半导体层12，所述第二台体10b的上表面面积大于或等于所述第一台体10a的下表面面积；
在上述实施例中，具体的，所述外延结构是利用金属有机化学气相生长法(MOCVD)或者利用分子束外延法(MBE)等方法在原衬底上生长形成；所述原生长衬底包括可以选用蓝宝石(Al 2O 3)、SiC、GaAs、GaN、ZnO、GaP、InP以及Ge中的至少一种，且并不限于此 处所列举的示例，而在本实施例中，优选GaAs作为原生长衬底。
其中，第一类型半导体层11和第二类型半导体层12为具有不同的导电型态、电性、极性的半导体，其依掺杂的元素以提供电子或空穴；例如，当第一类型半导体层11为n型时，第二类型半导体层12为p型，有源层13形成在第一类型半导体层11和第二类型半导体层12之间，电子与空穴于一电流驱动下在有源层13内复合，并将电能转换成光能以发出光线，通过改变外延发光层的一层或多层的物理及化学组成以调整发光二极管所发出光线的波长；反之亦然。在本实施例中优选当第一类型半导体层11为n型时，第二类型半导体层12为p型的发光二极管。
对于有源层13，也称为发光层或者活性层，位于第一类型半导体层11与第二类型半导体层12之间，能够将电能转化为光能。有源层13发出的辐射光可以为红光或红外光辐射；
有源层13常用的材料为磷化铝镓铟(alum ingallium indi phosphide,AlGaInP)系列、氮化铝镓铟(aluminumum gallium indiumumnitride,AlGaInN)系列、氧化锌系列(zincoxide,ZnO)。有源层13可以为单异质结构(single heterostructure,SH)，双异质结构(double heterostructure,DH)，双侧双异质结构(double-sided double heterostructure,DDH)，多层量子阱结构(multiquantμmwell,MQW)。当有源层13以磷化铝铟镓(AlGaInP)系列的材料为基础时，通过对半导体层的掺杂设置，有源层13会发出红、橙、黄光的琥珀色系的光；当以氮化铝镓铟(AlGaInN)系列的材料为基础时，有源层13会发出蓝或绿光。在本实施例中，优选发出红光或者红外光辐射的发光二极管为例。
在一些实施例中，优选的，参考图4，发光二极管还包括基板50，在发光二极管的制备工艺实施例中，先提供在原衬底上生长的外延结构，再将所述发光二极管元件外延结构键合转移至基板10上后，除掉发光二极管元件外延结构的原外延生长衬底，即完成所述基板10与外延结构的键合。所述基板10可以导电基板或非导电基板，也可以是透明或非透明。所述基板50和所述外延结构之间设置有键合层20；优选地，所述键合层20为单层或复合层结构，采用导电材料或绝缘材料制成。在一实施例中，参考图4，所述基板50和所述外延结构通过键合层20进行键合，所述键合层20为单层或复合层结构，其厚度优选为1～5μm，采用导电材料或绝缘材料制成，同时键合层20可以是透明或者非透明材料。当所述键合层20为复合层结构时，采用键合导电层和键合非导电层组成；所述键合非导电层相对所述键合导电层更接近所述基板。进一步的，所述键合导电层为含有选自Zn、In、Sn、Mg中的至少一种的氧化物。更优选的，所述键合导电层为ZnO、In 2O 3、SnO 2、ITO (IndiumTinOxide；ITO)、IZO(IndiumZincOxide)、GZO(Galliumdoped Zinc Oxide)或者其任意组合之一。所述键合非导电层的材料优选为Al 2O 3、SiO 2、SiNx、MgF 2或者TiO 2。需要说明的是，基板50并不是必须的，在一些实施例，该基板50也可以被去除，例如micro LED芯片。
如图5-8所示，所述第一台体10a于所述第一表面100所在平面投影的面积为s，其周长与面积比γ满足
Figure PCTCN2021137175-appb-000003
其中，L 1为所述第一台体10a的上表面，向经过所述第一侧边且垂直于所述第一表面100平面方向的投影长度。
在本实施例中，通过限定第一台体10a向所述第一表面100所在平面投影的周长面积比γ的范围：
当所述
Figure PCTCN2021137175-appb-000004
时，第一台体10a为横截面为圆形的台体，参考图5，所述第一台体10a在所述第一表面100所在平面的投影形状为圆形；此时，在相同的发光面积下(即第一台体10a的上下表面面积一定的情况下)，第一台体10a的上下表面的周长最小，而在第一台体10a的厚度一定的情况下，能够使第一台体10a的侧面面积达到最小，进而侧壁暴露出来的面积也更小，减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题。
同时，限定所述
Figure PCTCN2021137175-appb-000005
(当
Figure PCTCN2021137175-appb-000006
时，即现有技术方案中，第一台体10a采用长方体形结构的γ值)，具体设计实施例，第一台体10a向所述第一表面100所在平面投影形状可以为弧形与直线的组合图形，如为弧形和直线的组合图形(参考图6或图8)，或为椭圆形(参考图7)。这些实施例均满足周长与面积比γ满足
Figure PCTCN2021137175-appb-000007
Figure PCTCN2021137175-appb-000008
而该方案的限定，使得第一台体10a突破了现有小尺寸发光二极管中第一台体10a采用长方体式的设计局限，从而在相同的发光面积且(即第一台体10a的上下表面确定的情况下)在第一台体10a的厚度一定的情况下，能够使第一台体10a的侧面面积小于现有 技术的第一台体10a采用长方体式的设计，进而侧壁暴露出来的面积也更小，减少了在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题。
此外，现有技术中，由于第一台体10a采用长方体式的设计，如图3所示，有源层13发出的光线在第一台体10a表面的入射角θ1更大，因材料折射率的影响，会有很大一部分光由于全反射而再次被反射回半导体内，经过多次反射，多数会被半导体结构本身所吸收，从而导致结构的光萃取效率极低。如图9所示的光路原理图，非平面的出的光线入射角θ2明显小于θ1，因此光线可以更高概率避免在第一台体10a的表面形成全反射，进而可以提高发光二极管的侧壁出光几率，进一步提高了发光二极管的外部发光效率。
参考图5-8，在上述技术方案的基础上，一优选方案中，垂直于所述第一表面方向观之，所述第一台体10a的上表面外轮廓的侧边与所述发光二极管第一表面的第一侧边a平行部分的长度为L 2，L 1大于L 2，且所述第一台体10a于所述第一表面所在平面投影图形至少有一边为弧形。其中，L 1大于L 2的实施例也包括如图6、图7、图8所示，其中，在图5、图7的实施例中，L 2的长度为0。在该本实施例的技术方案中，当L 1大于L 2时，第一台体10a的侧面在所述发光二极管第一表面100所在平面的投影为非直线状，进而在同一面积下，第一台体10a的侧面能与现有技术中第一台体10a为长方体形结构的方案相比具有更小的面积，即在同等的有源层上下发光面积下，第一台体10a的侧面暴露出来部分更少，从而减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题。
在一些实施例中，优选的，参考图10、11、12所示，所述第二台体10b在所述发光二极管的第一表面100所在平面的投影形状为圆形或椭圆形或为有倒圆角的矩形，这些第二台体10b的设计可以与上述第一台体10a的设计进行任意组合搭配。同理，通过将第二台体10b采用上述设计，也能够进一步减少有源层13发出的光源减少在发光二极管内部形成全反射而消耗的概率，进而提高发光二极管的外部发光效率。
在上述实施例基础上，优选地，所述第一类型半导体层11的厚度为2～5μm，有源层13的厚度为0.02～0.07μm，第二类型半导体层12的厚度为6～11μm。本实施例中，通过控制外延生长工艺制程制，进一步减薄外延结构的厚度，使得第一台体10a的厚度减少，不仅侧壁暴露出来的缺陷面积减小，而且外延膜层间的缺陷数量也会减少，从而减少在小电流发光二极管中因缺陷产生的光吸收以及非辐射复合的问题。
在一些实施例中，较佳地，所述第一台体10a在所述第一表面100所在平面的投影面积与所述第二台体10b在所述第一表面100所在平面的投影面积比为0.02～0.6。该设计方案 使得芯片在小电流(0.01mA～1mA)驱动下，可以使得注入到有源层的电流密度位于适当的操作范围以维持稳定的外部量子效率，同时避免电流密度太小使得外部量子效率大幅降低。
在一些实施例中，优选的，参考图5-8所示，以第一侧边a、第二侧边b、第二侧边c、第四侧边d依次构成长方形为例，其中所述第一侧边a和所述第三侧边c相等，所述第二侧边b和所述第四侧边c相等，所述第一侧边a的长度大于所述第二侧边b的长度；所述第一侧边和所述第三侧边相等，所述第二侧边和所述第四侧边相等，所述第一侧边的长度大于所述第二侧边的长度；所述第二台体10b上表面的外轮廓中最靠近所述第一表面100的第一侧边或第三侧边的位置，到所述第一台体10b的上表面侧边的最小距离为D1；所述第二台体10b上表面的外轮廓中最靠近所述第一表面100的第二侧边或第四侧边的位置，到所述第一台体10b的上表面侧边的最小距离为D2；所述D1小于D2。
进一步的，所述第一台体10a在所述发光二极管的第一表面100所在平面投影图形的侧边到所述第一侧边或第三侧边的最小距离D1为2～6μm。
在一些实施例中，上述技术方案或者组合方案中，优选考虑在尺寸范围在小于300μm的小尺寸倒装发光二极管。
在上述选方案及其组合的技术上，本实施例还提供一种优选方案：参考图5-图8所示，所述第一类型半导体层11上设置有第一接触电极31，所述第一接触电极31包括第一点状电极31a和两个第一延伸部31b，两个所述第一延伸部31b从所述第一点状电极31a开始分别向发光二极管的不同侧边方向延伸。通过该设计，能够使得电流在发光区域扩散更加均匀，进而提高发光的均匀性。
在一些实施例中，两个所述第一延伸部31b可以形成直线(参考图13)段或形成弧形段(参考图5、图14)；
当两个所述第一延伸部31b形成弧形段时，优选地，如图14所示，所述弧形段在所述第一表面100投影的两末端位于所述第一台体10a在所述第一表面100投影形状的中心线上。进一步结合本发明实施例中，所述第一台体10a上表面为圆形的设计方案，两个所述第一延伸部31b形成弧形段能够更好地与第一台体10a的形状相匹配，减少了电流扩散在发光区域扩散不均匀角落区域，使得电流在发光区域扩散的均匀进一步提高。而所述弧形段在所述第一表面100投影的两末端位于所述第一台体10a在所述第一表面100投影形状的中心线上，能够更加方便电流在发光二极管不同电极之间的扩散。
在一些优选实施例中，所述第二类型半导体层12上设置有第二接触电极32，与上述第一接触电极31电极形态可以进行组合的方案中，如图5、14所示，所述第二接触电极32 为点状电极，该方案优选与当两个所述第一延伸部31b形成弧形段的方案进行组合；
或如图13所示，所述第二接触电极32包括第二点状电极32a和两个第二延伸部32b，两个所述第二延伸部32b从所述第二点状电极32a开始分别向发光二极管相对的侧边方向延伸，更近一步的，如图13所示，在垂直于所述发光二极管第一表面100且经过所述第四侧边的平面内，所述第二接触电极32在该平面的投影长度小于到第一接触电极31在该平面的投影长度，通过该方案，能够有效改善倒装发光元件的发光效率和抗ESD能力。
在本实施例中优选当第一类型半导体层11为n型时，第二类型半导体层12为p型的发光二极管。
在一些实施例中，优选地，如图4所示，发光二极管的外延结构具有从上到下依次叠层的第一台体10a和第二台体10b，所述第一台体10a至少包括第一类型半导体层11和有源层13，所述第二台体10b至少包括第二类型半导体层12，所述第二台体10b的上表面面积大于或等于所述第一台体10a的下表面面积；还包括绝缘保护层40，所述绝缘保护层40设置在所述外延结构上表面和侧壁上；所述绝缘保护层40的上方设置有第一焊盘电极51和第二焊盘电极52；
所述绝缘保护层40上设置有第一开口40a和第二开口40b；
在该实施例中，具体的所述绝缘保护层40的材料可以采用非导电材料，选择自无机氧化物或者氮化物，或者二氧化硅、氮化硅、氧化钛、氧化钽、氧化铌、钛酸钡、氟化镁氧化铝、或者其组合，其组合例如可以是两种材料重复堆叠形成的布拉格反射镜(DBR)。
优选的，参考图4和图5，图4为图5剖面线A-A的剖面示意图，所述第一焊盘电极51和所述第一类型半导体层11之间设置有第一接触电极31；所述第二焊盘电极52和所述第二类型半导体层12之间设置有第二接触电极32。
从垂直于所述第一表面100方向观之，第一开口40a露出一部分第一类型半导体层11，所述第一焊盘电极51填入所述第一开口40a与所述第一类型半导体层11直接接触进行电连接或通过第一接触电极31与第一类型半导体层11进行欧姆连接，并覆盖所述述第一开口40a；第二开口40b露出一部分第二类型半导体层12，所述第二焊盘电极52填入所述第二开口40b与所述第二类型半导体层12直接接触进行电连接或通过第二接触电极32与第二类型半导体层12进行欧姆连接；所述第一焊盘电极51及所述第二焊盘电极52部分覆盖在所述绝缘保护层40上，且分别包含部分区域与所述有源层13的区域重叠。
又或者，另一实施例中，参考图15和图16，图16为图15剖面线B-B的剖面示意图，该第一焊盘电极51及所述第二焊盘电极52完全位于所述有源层13以外的区域，其 中，第二开口40b露出一部分第二类型半导体层12，所述第二焊盘电极52填入所述第二开口40b与所述第二类型半导体层12直接接触进行电连接或通过第二接触电极32与第二类型半导体层12进行欧姆连接，第二接触电极32完全位于所述第二焊盘电极52下方；第一开口40a位于第二类型半导体层12的上方，所述第一接触电极31一部分设置在所述第二类型半导体层12的上方，另一部分位于所述第一类型半导体层11上方，并与所述第一类型半导体层11电连接；还包括有电性绝缘层70，所述电性绝缘层70介于第一接触电极31与有源层13以及第一接触电极31与第二类型半导体层12之间，以避免所述第一接触电极31与所述有源层13以及第二类型半导体层12接触而短路，第一焊盘电极51填入所述第一开口40a通过与所述第一接触电极31接触，从而和所述第一类型半导体层11电连接，，并覆盖所述述第一开口40a；此时第一焊盘电极51及所述第二焊盘电极52完全位于所述有源层13以外的区域，提高了发光二极管的发光效率；
对于第一焊盘电极51及所述第二焊盘电极52完全位于所述有源层13以外的区域的实施例，本发明还提供另一种情况，如图17和图18所示，图18为图17剖面线B-B的剖面示意图，从垂直于所述第一表面100方向观之，第一焊盘电极51及所述第二焊盘电极52完全位于所述外延结构以外的区域，具体的，第一开口40a位于键合层20的上方(若基板60没有设置有键合层20，则以基板60作为参考)，所述第一接触电极31一部分设置在所述键合层20的上方以及第一开口40a的下方，另一部分位于所述第一类型半导体层11上方，并与所述第一类型半导体层11电连接，还包括有电性绝缘层70，所述电性绝缘层70介于第一接触电极31与有源层13之间，以及介于第一接触电极31与第二类型半导体层12之间，以及介于第一接触电极31与键合层20之间，以避免所述第一接触电极31与所述有源层13以及第二类型半导体层12接触而短路，第一焊盘电极51填入所述第一开口40a通过与所述第一接触电极31接触，从而和所述第一类型半导体层11电连接，并覆盖所述述第一开口40a；
同时，第二开口40b位于键合层20的上方(若基板60没有设置有键合层20，则以基板60作为参考)所述第二接触电极32一部分设置在所述键合层20的上方且位于第二开口40b的下方，另一部分位于所述第二类型半导体层12上方，并与所述第二类型半导体层12电连接，第一焊盘电极51填入所述第一开口40a通过与所述第一接触电极31接触，并覆盖所述述第一开口40a，从而与所述第二类型半导体层12上方电连接。
在一实施例中，优选的，一优选的实施例中，如图16所示，所述第一开口40a的底端宽度小于或等于所述第一接触电极的底端宽度，所述第二开口40b的底端宽度小于或等于 所述第二接触电极32底端宽度。
在一实施例中，优选的，所述基板的在所述第一表面100所在平面的投影形状为圆形或椭圆形或为有倒圆角的矩形。同理，通过上述基板的形状设计，能够进一步减少有源层13发出的光源减少在发光二极管内部形成全反射而消耗的概率，进而提高发光二极管的外部发光效率。
本发明还提供一种发光二极管的实施例，参考图4具有相对上下的第一表面100和第二表面200，所述第一表面100包括依次连接的第一侧边、第二侧边、第三侧边、第四侧边，还包括：
外延结构，具有从上到下依次叠层的第一台体10a和第二台体10b，所述第一台体10a至少包括第一类型半导体层11和有源层13，所述第二台体10b至少包括第二类型半导体层12，所述第二台体10b的上表面面积大于或等于所述第一台体10a的下表面面积；
参考图5～8，在尺寸小于300μm的发光二极管，第一台体10a于所述第一表面100所在平面投影图形至少有一边为弧形，所述弧形的凸出部朝向所述发光二极管的第一表面100更靠近所述弧形的侧边方向。
在该本实施例的技术方案中，通过使得第一台体10a第一台体10a于所述第一表面100所在平面投影图形至少有一边为弧形，即第一台体10a的侧边为弧面，或第一台体10a的侧面在所述发光二极管第一表面100所在平面的投影为非直线状，具体设计实施例，第一台体10a向所述第一表面100所在平面投影形状可以为弧形与直线的组合图形，如为弧形和直线的组合图形(参考图6和图8)，或为椭圆形(参考图7)，通过上述设计限定，进而在同一面积下，第一台体10a的侧面能与现有技术中第一台体10a为长方体形结构的方案相比具有更小的面积，即在同等的有源层上下发光面积下，第一台体10a的侧面暴露出来部分更少，从而减少在小电流发光二极管中因侧壁缺陷产生的光吸收以及非辐射复合的问题。
本发明还提供的一种发光装置的实施例，该发光装置采用如上述任意实施例或者实施例中的优选方案及其组合中的发光二极管结构，且利用该发光二极管提供的红光或红外光辐射或蓝光或者绿光辐射进行相应的显示或者照明或者其它光学设备的使用。
本发明还提供一实施例的光学测试，如图5所示，所示测试实施例发光二极管的规格为3.5×6mil^ 2，所述第一台体10a于所述第一表面100所在平面投影的为圆形，两个所述第一延伸部31b形成弧形段，所述第二接触电极32为点状电极。将该实施例的产品以及相同规格下第一台体为长方体的芯片进行光学测试外部量子效率测试(WPE)，如图19所示，测试结果显示，样品在小电流(0.01mA～1mA)驱动下，圆形台面设计芯片发光效率较同尺寸第 一台体为长方体的设计芯片发光效率有大幅提升。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (23)

  1. 一种发光二极管，具有相对上下的第一表面(100)和第二表面(200)，所述第一表面(100)包括依次连接的第一侧边、第二侧边、第三侧边、第四侧边，还包括：
    外延结构，具有从上到下依次叠层的第一台体(10a)和第二台体(10b)，所述第一台体(10a)至少包括第一类型半导体层(11)和有源层(13)，所述第二台体(10b)至少包括第二类型半导体层(12)，所述第二台体(10b)的上表面面积大于或等于所述第一台体(10a)的下表面面积；
    其特征在于：
    所述第一台体(10a)于所述第一表面(100)所在平面投影的面积为s，其周长与面积比γ满足
    Figure PCTCN2021137175-appb-100001
    其中，L 1为所述第一台体(10a)的上表面向经过所述第一侧边且垂直于所述第一表面(100)的平面方向的投影长度。
  2. 根据权利要求1所述的发光二极管，其特征在于，所述第一类型半导体层(11)的厚度为2～5μm，所述有源层(13)的厚度为0.02～0.07μm，第二类型半导体层(12)的厚度为3～11μm。
  3. 根据权利要求1所述的发光二极管，其特征在于，所述第一台体(10a)在所述第一表面(100)所在平面的投影面积与所述第二台体(10b)在所述第一表面(100)所在平面的投影面积比为0.02～0.6。
  4. 根据权利要求1所述的发光二极管，其特征在于，垂直于所述第一表面(100)方向观之，所述第一台体(10a)的上表面外轮廓的侧边与所述发光二极管第一表面的第一侧边平行部分的长度为L 2，L 1大于L 2，且所述第一台体(10a)于所述第一表面(100)所在平面投影图形至少有一边为弧形。
  5. 根据权利要求1所述的发光二极管，其特征在于，所述第一台体(10a)在所述第一表面(100)所在平面的投影形状为圆形或椭圆形或为弧形与直线的组合图形。
  6. 根据权利要求1所述的发光二极管，其特征在于，所述第二台体(10b)在所述发光二极管的第一表面(100)所在平面的投影形状为圆形或椭圆形或为有倒圆角的矩形。
  7. 根据权利要求1所述的发光二极管，其特征在于，所述第一侧边和所述第三侧边相等，所述第二侧边和所述第四侧边相等，所述第一侧边的长度大于所述第二侧边的长度；
    所述第二台体(10b)上表面的外轮廓中最靠近所述第一表面(100)的第一侧边或第三侧边的位置，到所述第一台体(10b)的上表面侧边的最小距离为D1；
    所述第二台体(10b)上表面的外轮廓中最靠近所述第一表面(100)的第二侧边或第四侧边的位置，到所述第一台体(10b)的上表面侧边的最小距离为D2；
    所述D1小于D2。
  8. 根据权利要求7所述的发光二极管，其特征在于，所述第一台体(10a)在所述发光二极管的第一表面(100)所在平面投影图形的侧边到所述第一侧边或第三侧边的最小距离D1为2～6μm。
  9. 根据权利要求1所述的发光二极管，其特征在于，所述第一类型半导体层(11)上设置有第一接触电极(31)，所述第一接触电极(31)包括第一点状电极(31a)和两个第一延伸部(31b)，两个所述第一延伸部(31b)从所述第一点状电极(31a)开始分别向发光二极管的不同侧边方向延伸。
  10. 根据权利要求9所述的发光二极管，其特征在于，两个所述第一延伸部(31b)形成直线段或弧形段。
  11. 根据权利要求10所述的发光二极管，其特征在于，两个所述第一延伸部(31b)形成弧形段时，所述弧形段在所述第一表面(100)投影的两末端位于所述第一台体(10a)在所述第一表面(100)投影形状的中心线上。
  12. 根据权利要求1所述的发光二极管，其特征在于，所述第二类型半导体层(12)上设置有第二接触电极(32)，所述第二接触电极(32)为点状电极，或所述第二接触电极(32)包括第二点状电极(32a)和两个第二延伸部(32b)，两个所述第二延伸部(32b)从所述第二点状电极(32a)开始分别向发光二极管相对的侧边方向延伸。
  13. 根据权利要求12所述的发光二极管，其特征在于，在垂直于所述发光二极管第一表面(100)且经过所述第四侧边的平面内，所述第二接触电极(32)在该平面的投影长度小于到第一接触电极(31)在该平面的投影长度。
  14. 根据权利要求1所述的发光二极管，其特征在于，还包括绝缘保护层(40)，所述绝缘保护层(40)设置在所述外延结构的第一表面(100)和侧壁上；所述绝缘保护层(40)的上方设置有第一焊盘电极(51)和第二焊盘电极(52)；
    所述绝缘保护层(40)上设置有第一开口(40a)和第二开口(40b)，所述第一焊盘电极(51)填入所述第一开口(40a)以与所述第一类型半导体层(11)电连接；所述第二焊盘电极(52)填入所述第二开口(40b)与所述第二类型半导体层(12)电连接。
  15. 根据权利要求14所述的发光二极管，其特征在于，所述第一焊盘电极(51)和所述第一类型半导体层(11)之间设置有第一接触电极(31)；所述第二焊盘电极(52)和所述第 二类型半导体层(12)之间设置有第二接触电极(32)。
  16. 根据权利要求15所述的发光二极管，其特征在于，所述第一开口(40a)的底端宽度小于或等于所述第一接触电极的底端宽度，所述第二开口(40b)的底端宽度小于或等于所述第二接触电极(32)底端宽度。
  17. 根据权利要求14所述的发光二极管，其特征在于，垂直于所述第一表面(100)方向观之，所述第一焊盘电极(51)及所述第二焊盘电极(52)分别包含部分区域与所述有源层(13)的区域重叠，或该第一焊盘电极(51)及所述第二焊盘电极(52)完全位于所述有源层(13)以外的区域。
  18. 根据权利要求1所述的发光二极管，其特征在于，还包括基板(50)，所述基板(50)和所述外延结构之间设置有键合层(20)；
    所述键合层(20)为单层或复合层结构，采用导电材料或绝缘材料制成。
  19. 根据权利要求1所述的发光二极管，其特征在于，所述键合层(20)的厚度为1～5μm。
  20. 根据权利要求1所述的发光二极管，其特征在于，所述基板的在所述第一表面(100)所在平面的投影形状为圆形或椭圆形或为有倒圆角的矩形。
  21. 根据权利要求1～20任一项所述的发光二极管，其特征在于，所述发光二极管的尺寸小于300μm。
  22. 一种发光二极管，具有相对上下的第一表面(100)和第二表面(200)，所述第一表面(100)包括依次连接的第一侧边、第二侧边、第三侧边、第四侧边，还包括：
    外延结构，具有从上到下依次叠层的第一台体(10a)和第二台体(10b)，所述第一台体(10a)至少包括第一类型半导体层(11)和有源层(13)，所述第二台体(10b)至少包括第二类型半导体层(12)，所述第二台体(10b)的上表面面积大于或等于所述第一台体(10a)的下表面面积；
    其特征在于：
    所述发光二极管的尺寸小于300μm，第一台体(10a)于所述第一表面(100)所在平面投影图形至少有一边为弧形，所述弧形的凸出部朝向所述发光二极管的第一表面(100)更靠近所述弧形的侧边方向。
  23. 一种发光装置，其特征在于，包括如权利要求1～20任一项或权利要求22所述的发光二极管。
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CN107195747A (zh) * 2017-06-01 2017-09-22 华南理工大学 一种微米尺寸倒装led芯片及其制备方法
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CN108172668A (zh) * 2018-01-16 2018-06-15 福建兆元光电有限公司 一种发光二极管
CN111900235A (zh) * 2020-06-11 2020-11-06 淮安澳洋顺昌光电技术有限公司 一种Mini LED芯片的制备方法

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