WO2023097533A1 - 一种放大器及其控制方法、电子设备 - Google Patents

一种放大器及其控制方法、电子设备 Download PDF

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WO2023097533A1
WO2023097533A1 PCT/CN2021/134689 CN2021134689W WO2023097533A1 WO 2023097533 A1 WO2023097533 A1 WO 2023097533A1 CN 2021134689 W CN2021134689 W CN 2021134689W WO 2023097533 A1 WO2023097533 A1 WO 2023097533A1
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Prior art keywords
bias voltage
amplifying circuit
coupled
terminal
amplifier
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PCT/CN2021/134689
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English (en)
French (fr)
Inventor
缪卫明
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华为技术有限公司
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Priority to CN202180046793.9A priority Critical patent/CN116547907A/zh
Priority to PCT/CN2021/134689 priority patent/WO2023097533A1/zh
Publication of WO2023097533A1 publication Critical patent/WO2023097533A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements

Definitions

  • the present application relates to the technical field of integrated circuits, in particular to an amplifier, its control method, and electronic equipment.
  • amplifiers have been widely used in various electronic devices such as wireless transceivers to amplify and process signals.
  • amplifiers are required to have characteristics such as high linearity to avoid deterioration of the output signal quality. Based on this, improving the linearity of amplifiers is a problem that needs to be solved urgently in the field of amplifier research.
  • Embodiments of the present application provide an amplifier, a control method thereof, and an electronic device for improving the linearity of the amplifier.
  • an amplifier in the first aspect, includes: a first amplifying circuit, a second amplifying circuit, a first diode, a first adjustable bias voltage terminal, a first load, a node, a signal input terminal, and a signal output Terminal, power supply voltage terminal, second adjustable bias voltage terminal and ground terminal.
  • the input terminal of the first amplifying circuit is coupled to the signal input terminal and the first adjustable bias voltage terminal, the first adjustable bias voltage terminal provides the first amplifying circuit with an adjustable first bias voltage, and the first amplifying circuit
  • the output end of the second amplifying circuit is coupled with the input end of the second amplifying circuit, and the output end of the second amplifying circuit is coupled with one end of the first load and the signal output end; one end of the first amplifying circuit is also coupled with the ground end; the second amplifying circuit's
  • the control terminal is coupled to the second adjustable bias voltage terminal, and the second adjustable bias voltage terminal provides an adjustable second bias voltage for the second amplifying circuit; wherein, the input terminal of the first amplifying circuit receives a signal input terminal to provide The radio frequency signal, the first amplifying circuit amplifies the radio frequency signal and outputs it to the input end of the second amplifying circuit, the input end of the second amplifying circuit receives the signal output by the output end of the first amplifying circuit, and the second amplifying
  • the first diode works in forward conduction.
  • the third-order transconductance characteristics of the diode itself and the third-order transconductance characteristics of the transistor can be complementary, the linear characteristics of the first diode and the linear characteristics of the first amplifier circuit (mainly composed of transistors) can be achieved.
  • the adjustable first bias voltage provided by the first adjustable bias voltage terminal and the adjustable second bias voltage provided by the second adjustable bias voltage terminal can further match the first amplification
  • the amplifier further includes a second load, and the second load and the first diode are connected in series between the node and the ground terminal.
  • the third-order transconductance characteristic of the first amplifying circuit can be complemented by the common third-order transconductance characteristic of the first diode and the second load.
  • the second load is a variable resistor.
  • the regulation circuit that is, the first diode and the second load
  • the regulation circuit can be adjusted more quickly and flexibly by adjusting the second bias voltage provided by the second adjustable bias voltage terminal and adjusting the resistance value of the variable resistor R
  • the third-order transconductance characteristics are described below.
  • the amplifier further includes a second diode, the anode of the second diode is coupled to the node, and the cathode of the second diode is coupled to the ground terminal; the first diode and the second Diodes are connected in series or in parallel between the node and ground. Since the anode of the second diode is coupled to the node and the cathode is coupled to the ground, the second diode always works in the saturation region.
  • the amplifier does not include the second load
  • the third-order transconductance characteristics of the first diode and the first diode as a whole can be adjusted through the second bias voltage provided by the second adjustable bias voltage terminal.
  • the amplifier includes a second load
  • the first diode, the first diode and the second load are jointly adjusted by the second bias voltage provided by the second adjustable bias voltage terminal and the resistance value of the second load constitute the overall third-order transconductance characteristics.
  • the amplifier further includes a third load, one end of the third load is coupled to the first amplifying circuit, and the other end of the third load is coupled to the ground end.
  • a third load can be used to adjust the gain of the amplifier.
  • the third load is an inductor.
  • the first amplifying circuit includes a first transistor, the gate of the first transistor is respectively coupled to the signal input terminal and the first adjustable bias voltage terminal, and the first electrode of the first transistor is coupled to the node Coupling, the second pole of the first transistor is coupled to the ground terminal; wherein, one of the first pole and the second pole of the first transistor is a source, and the other is a drain.
  • the second amplifying circuit includes a second transistor, the gate of the second transistor is coupled to the second adjustable bias voltage terminal, the first electrode of the second transistor is coupled to the signal output terminal, and the second transistor is coupled to the signal output terminal.
  • the second pole of the second transistor is coupled to the node; wherein, one of the first pole and the second pole of the second transistor is a source, and the other is a drain.
  • the amplifier further includes a first bias voltage generation circuit, the output terminal of the first bias voltage generation circuit is coupled to the first adjustable bias voltage terminal, and is used for providing the first adjustable bias voltage
  • the set voltage terminal provides a first bias voltage.
  • the first bias voltage generating circuit can provide an appropriate first bias voltage to the first adjustable bias voltage terminal as required.
  • the amplifier further includes a second bias voltage generating circuit, the output terminal of the second bias voltage generating circuit is coupled to the second adjustable bias voltage terminal, and is used for providing the second adjustable bias voltage
  • the set voltage terminal provides a second bias voltage.
  • the second bias voltage generating circuit can provide an appropriate second bias voltage to the second adjustable bias voltage terminal as required.
  • the amplifier further includes a feedback circuit, which is coupled to the signal input end and the signal output end respectively, for feeding back the signal amplified by the first amplifying circuit and the second amplifying circuit.
  • the feedback circuit can widen the operating bandwidth of the amplifier.
  • the feedback circuit includes a feedback capacitor and a feedback resistor connected in series.
  • an amplifier in a second aspect, includes: a first amplifying circuit, a second amplifying circuit, an adjusting circuit, a first adjustable bias voltage terminal, a first load, a node, a signal input terminal, a signal output terminal, and a power supply A voltage terminal, a second adjustable bias voltage terminal and a ground terminal.
  • the first amplifying circuit is respectively coupled with the node, the signal input terminal, the ground terminal and the first adjustable bias voltage terminal;
  • the second amplifying circuit is respectively coupled with the node, the signal output terminal and the second adjustable bias voltage terminal;
  • the adjusting circuit is respectively Coupled with the node and the ground terminal; one end of the first load is coupled with the power supply voltage end, and the other end is coupled with the signal output end; wherein, the third-order transconductance coefficient of the first amplifying circuit operating in the saturation region and the adjustment circuit operating in the saturation region One of the third-order transconductance coefficients is positive and the other is negative.
  • the simulation relationship curve of the first bias voltage and the third-order transconductance coefficient g 3M and the actual test relationship curve can be accurately fitted and covered.
  • the adjustment circuit works in the saturation region
  • the second The simulation relationship curve of the second bias voltage and the third-order transconductance coefficient g 3D and the actual test relationship curve can be accurately fitted and covered.
  • the third-order transconductance coefficient g3M of the first amplifying circuit operating in the saturation region and the third-order transconductance coefficient g3D of the adjustment circuit operating in the saturation region one is a positive number, and the other is a negative number, so one of the actual third-order transconductance coefficient g3M when the first amplifying circuit works in the saturation region and the actual third-order transconductance coefficient g3D when the adjustment circuit works in the saturation region is a positive number and the other is a negative number, so
  • the actual third-order transconductance coefficient g3M when the first amplifier circuit works in the saturation region and the actual third-order transconductance coefficient g3D when the adjustment circuit works in the saturation region can be nonlinearly superimposed and canceled, thereby improving the overall linearity of the amplifier .
  • the absolute value of the third-order transconductance coefficient of the first amplifying circuit operating in the saturation region is equal to the absolute value of the third-order transconductance coefficient of the adjusting circuit operating in the saturation region.
  • the sum g 3 of the actual third-order transconductance g 3M of the first amplifier circuit and the actual third-order transconductance g 3D of the first diode tends to 0, so that the overall linearity of the amplifier can be further improved.
  • a third aspect provides an electronic device, which includes a fourth load, a processor, and the amplifier provided in the first aspect; the fourth load is coupled to a signal output end of the amplifier, and the processor is coupled to the amplifier.
  • a method for controlling an amplifier includes: a first amplifying circuit, a second amplifying circuit, a first diode, a first adjustable bias voltage terminal, a first load, a node, and a signal input terminal, signal output terminal, power supply voltage terminal, second adjustable bias voltage terminal and ground terminal; the input terminal of the first amplifying circuit is coupled with the signal input terminal and the first adjustable bias voltage terminal, and the first adjustable bias voltage terminal
  • the voltage terminal provides an adjustable first bias voltage for the first amplifying circuit
  • the output terminal of the first amplifying circuit is coupled with the input terminal of the second amplifying circuit, the output terminal of the second amplifying circuit is connected with one end of the first load and the signal
  • the output ends are all coupled; one end of the first amplifying circuit is also coupled to the ground end; the control end of the second amplifying circuit is coupled to the second adjustable bias voltage end, and the second adjustable bias voltage end provides an adjustable voltage for the second amplifying circuit.
  • the input terminal of the first amplifying circuit receives the radio frequency signal provided by the signal input terminal, the first amplifying circuit amplifies the radio frequency signal and outputs it to the input terminal of the second amplifying circuit, and the input terminal of the second amplifying circuit
  • the input end receives the signal output by the output end of the first amplifying circuit, and the second amplifying circuit amplifies the signal and provides it to the signal output end; the output end of the first amplifying circuit and the input end of the second amplifying circuit are coupled to the node, the first two The anode of the diode is coupled to the node, the cathode of the first diode is coupled to the ground terminal; the other end of the first load is coupled to the power supply voltage terminal; the control method of the amplifier includes: the first adjustable bias voltage terminal receives the first bias Set the voltage to make the first amplifying circuit work in the saturation region; the second adjustable bias voltage terminal receives the second bias voltage; wherein, the first bias voltage is used to make
  • the absolute value of the first third-order transconductance coefficient of the first amplifier circuit operating in the saturation region is the same as the absolute value of the second third-order transconductance coefficient of the first diode operating in the saturation region equal.
  • the sum g 3 of the actual third-order transconductance g 3M of the first amplifier circuit and the actual third-order transconductance g 3D of the first diode tends to 0, so that the overall linearity of the amplifier can be further improved.
  • the amplifier further includes: a second load; the second load and the first diode are connected in series between the node and the ground terminal; wherein, the second load is a variable resistor.
  • the second bias voltage is used to make the third-order transconductance coefficient of the first diode and the second load work in the saturation region as the second third-order transconductance coefficient.
  • the second and third order transconductance coefficients can be adjusted by adjusting the second bias voltage and adjusting the resistance value of the variable resistor. This allows faster and more flexible tuning of the second and third order transconductance coefficients.
  • FIG. 1 is a schematic structural diagram of an amplifier provided in the related art
  • FIG. 2 is a graph showing the relationship between the bias voltage V GS and the third-order transconductance coefficient g 3A , the third-order transconductance coefficient g 3B , and the sum g 3 of the third-order transconductance coefficient g 3A and the third-order transconductance coefficient g 3B ;
  • FIG. 3 is a schematic structural diagram of an amplifier provided in an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of an amplifier provided by another embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • Fig. 6a is a schematic structural diagram of an amplifier provided by another embodiment of the present application.
  • Fig. 6b is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • Fig. 6c is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of an amplifier provided in another embodiment of the present application.
  • FIG. 10 is a schematic flowchart of an amplifier control method provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • first, second and the like are used for convenience of description only, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features.
  • a feature defined as “first”, “second”, etc. may expressly or implicitly include one or more of that feature.
  • plural means two or more.
  • words such as “exemplary” or “for example” are used as examples, illustrations or illustrations. Any embodiment or design scheme described as “exemplary” or “for example” in the embodiments of the present application shall not be interpreted as being more preferred or more advantageous than other embodiments or design schemes. Rather, the use of words such as “exemplary” or “such as” is intended to present related concepts in a concrete manner.
  • Coupled may refer to an electrical connection for signal transmission, and “coupling” may be a direct electrical connection or an indirect electrical connection through an intermediary. sexual connection. Examples include connections made through resistors, inductors, or other electrical components.
  • amplifiers have been widely used in various electronic devices to amplify signals.
  • amplifiers are required to have characteristics such as high linearity, so as to avoid deterioration of the quality of the output signal.
  • x(t) is the input signal of the circuit
  • y(t) is the output signal of the circuit
  • i ds g 1 v gs +g 2 v 2 gs +g 3 v 3 gs
  • g1 is the small-signal linear transconductance coefficient
  • g2 is the second-order transconductance coefficient
  • g3 is the third-order transconductance coefficient
  • the linearity IIP3 of a single transistor is related to the small-signal linear transconductance g1 and the third-order transconductance g3, and the magnitude A IIP3 of the linearity IIP3 of the transistor can be expressed as:
  • a IIP3 can represent the linearity IIP3 of the transistor, and the larger the value of A IIP3 is, the higher the linearity IIP3 of the transistor is.
  • the third-order transconductance coefficient g 3 can be made to tend to 0.
  • the amplifier includes a transistor MA, a transistor MB, a capacitor C, an inductor L, a signal input terminal RFIN, a signal output terminal RFOUT, a bias voltage Terminal Vbias1, bias voltage terminal Vbias2, power supply voltage terminal VDD and ground terminal GND.
  • the gate of the transistor MA is coupled to the signal input terminal RFIN and the bias voltage terminal Vbias1 respectively, the first pole of the transistor MA is coupled to the signal output terminal RFOUT, and the second pole of the transistor MA is coupled to the ground terminal GND.
  • the gate of the transistor MB is coupled to the first terminal of the capacitor C and the bias voltage terminal Vbias2 , the first pole of the transistor MB is coupled to the signal output terminal RFOUT, and the second pole of the transistor MB is coupled to the ground terminal GND.
  • the second terminal of the capacitor C is coupled to the signal input terminal RFIN and the bias voltage terminal Vbias1 respectively.
  • the signal output terminal RFOUT is also coupled to one end of the inductor L, and the other end of the inductor L is coupled to the power supply voltage terminal VDD.
  • the first poles of the transistor MA and the transistor MB are source terminals, and the second poles are drain terminals; or, the first pole terminals of the transistor MA and the transistor MB are drain terminals, and the second pole terminals are source terminals.
  • Fig. 2 schematically shows the relationship curve between the bias voltage V GS and the third-order transconductance coefficient g 3A , the third-order transconductance coefficient g 3B and the sum g 3 of the third-order transconductance coefficient g 3A and the third-order transconductance coefficient g 3B , the abscissa of Fig.
  • the ordinate indicates the third-order transconductance coefficient g 3A , the third-order transconductance coefficient g 3B and the third-order transconductance coefficient
  • the sum of g 3A and the third-order transconductance coefficient g 3B is g 3 .
  • the transistor MA works in the strong inversion region, and the strong inversion region can also be called the saturation region, that is, the bias shown in Figure 2
  • the strong inversion region can also be called the saturation region, that is, the bias shown in Figure 2
  • the strong inversion region can also be called the saturation region, that is, the bias shown in Figure 2
  • the peak position in the relationship curve between the voltage V GS and the third-order transconductance coefficient g 3A which is the position marked by the dotted circle in Figure 2
  • the trough position in the relationship curve between voltage V GS and third-order transconductance g 3B is the position marked by the dotted circle in Figure 2.
  • the third-order transconductance g The sum of 3A and the third-order transconductance coefficient g 3B tends to 0, which can improve the linearity of the amplifier.
  • the fitting degree of the simulation relationship curve between the bias voltage V GS and the third-order transconductance coefficient g 3A is relatively consistent with the actual test relationship curve at the peak position, but the bias voltage V
  • the simulation relationship curve of GS and the third-order transconductance coefficient g 3B deviates from the position of the actual test relationship curve at the trough position, and the trough position of the actual test relationship curve may shift to the left or right, so that First, it is theoretically calculated that the sum of the third-order transconductance coefficient g 3A and the third-order transconductance coefficient g 3B tends to 0 within the range of a certain bias voltage V GS , but in practice, due to the bias voltage The actual test relationship curve between V GS and the third-order transconductance g 3B shifts at the trough position, so within the range of a certain bias voltage V GS calculated theoretically, the actual third-order transconductance g 3A and the third-order transconductance g 3A
  • an embodiment of the present application provides an amplifier, such as a low-noise amplifier (low-noise amplifier, LNA), a power amplifier (power amplifier, PA), a transimpedance amplifier (trans-impedance amplifier, TIA) or variable gain amplifier (variable gain amplifier, VGA), etc.
  • LNA low-noise amplifier
  • PA power amplifier
  • TIA transimpedance amplifier
  • VGA variable gain amplifier
  • the amplifier 1 provided by the embodiment of the present application includes: a first amplifying circuit 10, a second amplifying circuit 20, a regulating circuit 30, a first adjustable bias voltage terminal Vb1, a first load 40, a node A , a signal input terminal RFIN, a signal output terminal RFOUT, a power supply voltage terminal VDD, a second adjustable bias voltage terminal Vb2 and a ground terminal GND.
  • the input terminal of the first amplifying circuit 10 is coupled to the signal input terminal RFIN and the first adjustable bias voltage terminal Vb1, and the first adjustable bias voltage terminal Vb1 provides an adjustable first bias for the first amplifying circuit 10 Voltage Vb1, the output end of the first amplifying circuit 10 is coupled to the input end of the second amplifying circuit 20, and the output end of the second amplifying circuit 20 is coupled to one end of the first load 40 and the signal output end RFOUT; the first amplifying circuit 10 One end of the second amplifying circuit 20 is also coupled to the ground terminal GND; the control terminal of the second amplifying circuit 20 is coupled to the second adjustable bias voltage terminal Vb2, and the second adjustable bias voltage terminal Vb2 provides an adjustable second bias voltage for the second amplifying circuit 20.
  • the input terminal of the first amplifying circuit 10 receives the radio frequency signal provided by the signal input terminal RFIN, the first amplifying circuit 10 amplifies the radio frequency signal and outputs it to the input terminal of the second amplifying circuit 20, the second amplifying circuit
  • the input terminal of 20 receives the signal output by the output terminal of the first amplifying circuit 10, and the second amplifying circuit 20 provides the signal output terminal RFOUT after amplifying the signal;
  • the output terminal of the first amplifying circuit 10 and the input terminal of the second amplifying circuit 20 Coupled to the node A, one end of the regulating circuit 30 is coupled to the node A, and the other end is coupled to the ground terminal GND.
  • the other terminal of the first load 40 is coupled to the power supply voltage terminal VDD.
  • one of the third-order transconductance coefficient g 3M of the first amplifying circuit 10 working in the saturation region and the third-order transconductance coefficient g 3D of the adjustment circuit 30 working in the saturation region is a positive number and the other is a negative number.
  • the third-order transconductance coefficient g 3M of the first amplifying circuit 10 working in the saturation region is a positive number
  • the third-order transconductance coefficient g 3D of the adjustment circuit 30 operating in the saturation region is a negative number
  • the first amplifying The third-order transconductance coefficient g 3M of the circuit 10 working in the saturation region is a negative number
  • the third-order transconductance coefficient g 3D of the adjustment circuit 30 working in the saturation region is a positive number.
  • the first bias voltage Vb1 provided by the first adjustable bias voltage terminal Vb1 can be used to adjust the size of the third-order transconductance coefficient g 3M of the first amplifying circuit 10 working in the saturation region, which can be adjusted through the second adjustable
  • the second bias voltage provided by the bias voltage terminal Vb2 adjusts the voltage of the node A to adjust the third-order transconductance g 3D of the regulation circuit 30 operating in the saturation region, so that the first amplifying circuit 10 operates in the saturation region
  • One of the third-order transconductance coefficients g 3M and the third-order transconductance coefficient g 3D of the adjustment circuit 30 working in the saturation region are positive numbers and the other is negative numbers.
  • the first adjustable bias voltage terminal Vb1 can be coupled with the output terminal of the first bias voltage generating circuit, and the first bias voltage terminal Vb1 can be provided with the first bias through the first bias voltage generating circuit.
  • the first bias voltage generating circuit can provide an appropriate first bias voltage Vb1 to the first adjustable bias voltage terminal Vb1 as required.
  • the first bias voltage generating circuit can be integrated in the amplifier, and the first bias voltage generating circuit can also be set independently from the amplifier.
  • the second adjustable bias voltage terminal Vb2 can be coupled to the output terminal of the second bias voltage generating circuit, and the second bias voltage generating circuit can provide the second bias voltage for the second adjustable bias voltage terminal Vb2 Vb2.
  • the second bias voltage generating circuit can provide an appropriate second bias voltage Vb2 to the second adjustable bias voltage terminal Vb2 as required.
  • the second bias voltage generating circuit can be integrated in the amplifier, and the second bias voltage generating circuit can also be set independently from the amplifier.
  • the second amplifying circuit 20 is respectively coupled to the node A, the signal output terminal RFOUT and the second adjustable bias voltage terminal Vb2, and the second amplifying circuit 20 is equivalent to a switch. Under the control of the second adjustable bias voltage terminal Vb2, it is used to control the conduction or disconnection of the node A and the signal output terminal RFOUT. Since the second amplifying circuit 20 is equivalent to a switch, the second amplifying circuit 20 will not affect the linearity of the amplifier 1 , which is mainly related to the linearity of the first amplifying circuit 10 and the linearity of the adjusting circuit 30 .
  • the linearity IIP3 of the amplifier 1 can be characterized by the amplitude A IIP3 of the linearity IIP3 of the amplifier.
  • the first amplifying circuit 10 and the adjusting circuit 30 can be regarded as a whole.
  • g 1 is equal to the small-signal linear transconductance g 1M of the first amplifying circuit 10 and the small-signal transconductance g 1M of the adjusting circuit 30.
  • the simulation relationship curve of the bias voltage V GS and the third-order transconductance coefficient g 3 and the actual test relationship curve can be accurately fitted and covered, so the first
  • the simulation relationship curve of the first bias voltage Vb1 and the third-order transconductance coefficient g 3M and the actual test relationship curve can be accurately fitted and covered.
  • the adjustment circuit 30 works in the saturation region, the first The simulation relationship curve of the second bias voltage Vb2 and the third-order transconductance coefficient g 3D and the actual test relationship curve can be accurately fitted and covered.
  • the third-order transconductance g3M of the first amplifying circuit 10 operating in the saturation region and the third-order transconductance g3D of the adjustment circuit 30 operating in the saturation region one is One is a positive number and one is a negative number, so one of the actual third-order transconductance coefficient g3M when the first amplifying circuit 10 works in the saturation region and the actual third-order transconductance coefficient g3D when the adjustment circuit 30 works in the saturation region is a positive number , one is a negative number, so the actual third-order transconductance g3M when the first amplifying circuit 10 works in the saturation region and the actual third-order transconductance g3D when the adjustment circuit 30 works in the saturation region can be nonlinearly superimposed and canceled , so that the sum g 3 of the third-order transconductance coefficient g 3M of the first amplifying circuit 10 and the third-order transconductance coefficient
  • the absolute value of the third-order transconductance coefficient g3M of the first amplifying circuit 10 operating in the saturation region and the absolute value of the third-order transconductance coefficient g3D of the adjustment circuit 30 operating in the saturation region may be equal or unequal .
  • the third-order transconductance g3M of the first amplifying circuit 10 working in the saturation region may be 0.2A/N 3
  • the third-order transconductance g3D of the adjustment circuit 30 working in the saturation region may be -0.2A/N 3 .
  • the third-order transconductance g3M of the first amplifying circuit 10 operating in the saturation region may be 0.2A/N 3
  • the third-order transconductance g3D of the adjustment circuit 30 operating in the saturation region may be -0.1A/N 3 .
  • the absolute value of the third-order transconductance coefficient g of the first amplifying circuit 10 operating in the saturation region is 3M and the third-order transconductance coefficient g of the adjustment circuit 30 operating in the saturation region 3D is equal in absolute value.
  • the simulation relationship curve of the first bias voltage Vb1 and the third-order transconductance coefficient g 3M and the actual test relationship curve can be accurately fitted and covered, and the adjustment circuit 30 works in the saturation region
  • the second bias voltage Vb2 and the third-order transconductance g 3D simulation relationship curve and the actual test relationship curve can be accurately fitted and covered, so when the first amplifying circuit 10 works in the saturation region, the third-order transconductance coefficient
  • the absolute value of g 3M is equal to the absolute value of the third-order transconductance coefficient g 3D of the adjustment circuit 30 operating in the saturation region, at this time, the actual third-order transconductance coefficient g 3M when the first amplifying circuit 10 works in the saturation region
  • the absolute value of the absolute value is equal to the absolute value of the actual third-order transconductance g3D when the regulation circuit 30 works in the saturation region, and the third-order transconductance g3D of the first amplifying circuit 10 works
  • the amplifier 1 further includes a first capacitor C1 , one end of the first capacitor C1 is coupled to the signal input terminal RFIN, and the other end is coupled to the first amplifying circuit 10 .
  • the amplifier 1 further includes a second capacitor C2 , one end of the second capacitor C2 is coupled to the signal output terminal RFOUT, and the other end is coupled to the second amplifying circuit 20 .
  • first capacitor C1 and the second capacitor C2 are to isolate the DC signal and allow the AC signal to pass through.
  • the above-mentioned first amplifying circuit 10 includes a first transistor M1, the gate of the first transistor M1 is respectively coupled to the signal input terminal RFIN and the first adjustable bias voltage terminal Vb1, and the first The first pole of the transistor M1 is coupled to the node A, and the second pole of the first transistor M1 is coupled to the ground terminal GND; wherein, one of the first pole and the second pole of the first transistor M1 is a source, and the other is a drain.
  • the second pole of the first transistor M1 is coupled to the ground terminal GND may be that the second pole of the first transistor M1 is directly coupled to the ground terminal GND, or it may be that the second pole of the first transistor M1 is coupled to the ground terminal GND through other Electrical components are indirectly coupled.
  • first pole of the first transistor M1 may be the source, and the second pole may be the drain; or the first pole of the first transistor M1 may be the drain, and the second pole may be the source.
  • the first transistor M1 may be a P-type transistor or an N-type transistor.
  • the first transistor M1 is a P-type transistor, when the first adjustable bias voltage terminal Vb1 provides a low-level signal, the first transistor M1 is turned on.
  • the first transistor M1 is an N-type transistor, when the first adjustable bias voltage terminal Vb1 provides a high-level signal, the first transistor M1 is turned on.
  • the first transistor M1 may be one of an enhancement mode (E-mode) transistor, a depletion mode (D-mode) transistor or a cascode transistor.
  • E-mode enhancement mode
  • D-mode depletion mode
  • cascode transistor a cascode transistor
  • the size of the first transistor M1 can be designed as required.
  • the first amplifying circuit 10 may include, in addition to the first transistor M1, one or more other transistors connected in series or in parallel with the first transistor M1.
  • the second amplifying circuit 20 includes a second transistor M2, the gate of the second transistor M2 is coupled to the second adjustable bias voltage terminal Vb2, and the first electrode of the second transistor M2 It is coupled with the signal output terminal RFOUT, and the second pole of the second transistor M2 is coupled with the node A; wherein, one of the first pole and the second pole of the second transistor M2 is a source, and the other is a drain.
  • first pole of the second transistor M2 may be the source, and the second pole may be the drain; or the first pole of the second transistor M2 may be the drain, and the second pole may be the source.
  • the second transistor M2 may be an N-type transistor.
  • the second transistor M2 when the second adjustable bias voltage terminal Vb2 provides a high-level signal, the second transistor M2 is turned on.
  • the second transistor M2 may be one of an enhancement transistor, a depletion transistor or a cascode transistor.
  • the size of the second transistor M2 can be designed as required.
  • the above-mentioned second amplifying circuit 20 may further include one or more other transistors connected in series or in parallel with the second transistor M2 in addition to the second transistor M2.
  • the materials of the above-mentioned first transistor M1 and the second transistor M2 may include group III-V compounds.
  • the above-mentioned first load 40 may be, for example, one or more of an inductor Ld, a capacitor, or a resistor.
  • FIG. 4 illustrates that the first load 40 is an inductor Ld as an example.
  • the adjustment circuit 30 may adopt the following implementation methods:
  • the regulating circuit 30 includes a first diode D1, the anode of the first diode D1 is coupled to the node A, and the cathode of the first diode D1 is coupled to the ground terminal GND.
  • Coupling the cathode of the first diode D1 to the ground terminal GND may be that the cathode of the first diode D1 is directly coupled to the ground terminal GND, or it may be that the cathode of the first diode D1 is coupled to the ground terminal GND through other electrons. Components are coupled indirectly.
  • the anode when the first diode D1 is in the conduction state, based on the type of the first diode D1, the anode can be the signal input terminal, and the cathode can be the signal output terminal, that is, the signal flows from the positive pole to the negative pole; it can also be The negative pole is the signal input terminal, and the positive pole is the signal output terminal, that is, the signal flows from the negative pole to the positive pole.
  • the threshold voltage Vth of the first diode D1 can be a positive number or a negative number.
  • the first diode D1 may be, for example, a Schottky diode or a common silicon diode.
  • the first diode D1 is a Schottky diode and the first transistor M1 is an enhancement transistor, the first diode D1 and the first transistor M1 can be manufactured simultaneously by the same process, thereby simplifying the manufacturing process of the amplifier .
  • the first diode D1 can be an enhancement diode or a depletion diode.
  • the size of the first diode D1 is not limited, and can be designed according to needs.
  • the third-order transconductance g 3D of the first diode D1 working in the saturation region can be adjusted by the second bias voltage provided by the second adjustable bias voltage terminal Vb2.
  • the regulating circuit 30 includes a first diode D1 and a second load 301, the anode of the first diode D1 is coupled to the node A, and the cathode of the first diode D1 is connected to the ground terminal GND coupling; wherein, the second load 301 and the first diode D1 are connected in series between the node A and the ground terminal GND.
  • the second bias voltage Vb2 provided by the second adjustable bias voltage terminal Vb2 and the second load 301 can jointly adjust the first diode.
  • the actual third-order transconductance g 3D in the saturation region can be nonlinearly superimposed and canceled to achieve the difference between the actual third-order transconductance g 3M of the first amplifying circuit 10 and the actual third-order transconductance g 3D of the adjustment circuit 30 and g 3 tends towards 0 on purpose.
  • the resistance value of the second load 301 may be fixed, in this case, the resistance value of the second load 301 is not limited.
  • the resistance value of the second load 301 can also be variable, in this case, the resistance range of the second load 301 is not limited.
  • the second load 301 may be, for example, an inductor, a capacitor, or a resistor.
  • the resistance of the second load 301 The value is variable.
  • the second load 301 is a variable resistor R.
  • the second bias voltage Vb2 provided by the second adjustable bias voltage terminal Vb2 can be adjusted and adjusted
  • the resistance value of the variable resistor R can adjust the size of the third-order transconductance coefficient g 3D of the regulation circuit 30 (that is, the first diode D1 and the second load 301) in the saturation region faster and more flexibly, so that the first The sum g 3 of the actual third-order transconductance g 3M of the amplifying circuit 10 and the actual third-order transconductance g 3D of the adjustment circuit 30 tends to zero.
  • the third-order transconductance coefficient g3M of the first transistor M1 works in the saturation region, it is a positive number in a certain bias region (that is, the first bias voltage Vb1 is in a certain range)
  • the second bias voltage Vb2 provided by the second adjustable bias voltage terminal Vb2 and adjusting the resistance value of the variable resistor R
  • the first diode D1 and the variable resistor R can work in the saturation region as a whole.
  • the first-order transconductance g 3D is a negative number, and the sum of the third-order transconductance g 3M of the first transistor M1 and the third-order transconductance g 3D of the first diode D1 and the variable resistor R tends to zero.
  • the adjustment circuit 30 further includes a first diode D1 and a second diode D2, the anode of the first diode D1 is coupled to the node A, and the cathode of the first diode D1 is coupled to the ground terminal GND;
  • the anode of the second diode D3 is coupled to node A, and the cathode of the second diode D2 is coupled to the ground terminal GND;
  • the first diode D1 and the second diode D2 can be connected in series at node A as shown in Figure 6a and the ground terminal GND, or, the first diode D1 and the second diode D2 can be connected in parallel between the node A and the ground terminal GND as shown in FIG. 6b.
  • the type of the first diode D1 and the type of the second diode D2 may be the same or different.
  • the size of the first diode D1 and the size of the second diode D2 may be the same or different.
  • the regulating circuit 30 may include the second load 301 or may not include the second load 301 .
  • the regulating circuit 30 includes a second load 301, and the first diode D1 and the second diode D2 are connected in parallel between the node A and the ground terminal GND, as shown in FIG. 6b, the first diode The tube D1 and the second diode D2 are connected in parallel and connected in series with the second load 301, or as shown in FIG. 6c, the first diode D1 and the second load 301 are connected in series and connected in parallel with the second diode D2.
  • the second diode D2 Since the anode of the second diode D2 is coupled to the node A, and the cathode is coupled to the ground terminal GND, the second diode D2 always works in the saturation region.
  • the second bias voltage Vb2 provided by the second adjustable bias voltage terminal Vb2 can adjust the regulating circuit 30 (that is, the first diode D1 and the first two The overall size of the third-order transconductance coefficient g 3D of the pole tube D2 working in the saturation region.
  • the regulating circuit 30 includes a second load 301
  • the second bias voltage Vb2 provided by the second adjustable bias voltage terminal Vb2 and the resistance of the second load 301 jointly adjust the regulating circuit 30 (that is, the first diode The transistor D1, the first diode D2 and the second load 301 as a whole) work in the saturation region of the third-order transconductance coefficient g 3D .
  • the regulating circuit 30 includes but is not limited to the first diode D1 and the second diode D2, and may also include other one or more diodes, and the connection relationship of the other one or more diodes can refer to the above-mentioned second and second diodes.
  • the pole tube D2 will not be repeated here.
  • the regulating circuit 30 includes but not limited to the second load 301, and may also include one or more other loads, and the other one or more loads may be connected in series with the first diode D1 between the node A and the ground terminal GND It can also be connected in series with other diodes in the regulating circuit 30 between the node A and the ground terminal GND.
  • the resistance values of the multiple second loads 301 may be the same or different.
  • the adjustment circuit 30 adopts the above-mentioned second implementation manner as an example for description.
  • the amplifier 1 further includes a third load 50 , one end of the third load 50 is coupled to the first amplifying circuit 10 , and the other end is coupled to the ground terminal GND.
  • the first amplifying circuit 10 includes the first transistor M1
  • one end of the third load 50 is coupled to the second pole of the first transistor M1
  • the other end is coupled to the ground terminal GND.
  • the third load 50 may be, for example, one or more of an inductor Ld, a capacitor, or a resistor.
  • FIG. 7 illustrates that the third load 50 is an inductor Ls as an example.
  • the third load 50 can be used to adjust the gain of the amplifier 1 .
  • the signals amplified by the amplifying circuit 10 and the second amplifying circuit 20 are fed back to widen the working bandwidth of the amplifier 1 .
  • the feedback circuit 60 is coupled to the signal input terminal RFIN through the first capacitor C1, and in the case that the amplifier 1 includes a second capacitor C2, the feedback circuit 60 is coupled to the signal output terminal through the second capacitor C2 terminal RFOUT coupling.
  • the feedback circuit 60 includes a feedback capacitor Cf and a feedback resistor Rf connected in series.
  • the amplifier 1 is provided with the adjustment circuit 30, that is, the linearity of the amplifier 1 is improved by at least about 6dB by setting the first diode D1 and the variable resistor R relative to the absence of the adjustment circuit 30 .
  • Embodiments of the present application also provide a method for controlling an amplifier, the amplifier may be, for example, the above-mentioned amplifier, and the method for controlling the amplifier may be as shown in FIG. 10 , including the following steps:
  • the first adjustable bias voltage terminal Vb1 receives the first bias voltage Vb1, so that the first amplifying circuit 10 works in a saturation region.
  • the second adjustable bias voltage terminal Vb2 receives the second bias voltage Vb2; wherein, the first bias voltage Vb1 is used to make the first amplifying circuit 10 work in the saturation region and the third-order transconductance coefficient g 3M is the first The third-order transconductance g 3M ; the third-order transconductance g 3D of the second bias voltage Vb2 used to make the first diode D1 work in the saturation region is the second third-order transconductance g 3D , the first third-order One of the transconductance coefficient g 3M and the second and third-order transconductance coefficient g 3D is a positive number, and the other is a negative number.
  • step S10 and step S11 can be executed at the same time; step S10 can also be executed first, and then step S11 can be executed, or step S11 can be executed first, and then step S10 can be executed.
  • the simulation relationship curve of the first bias voltage Vb1 and the third-order transconductance coefficient g 3M and the actual test relationship curve can be accurately fitted and covered, and the first diode D1 works In the saturation region, the simulation relationship curve of the second bias voltage Vb2 and the third-order transconductance coefficient g 3D and the actual test relationship curve can be accurately fitted and covered, so when designing the first third-order transconductance coefficient g 3M is the first
  • the third-order transconductance coefficient g 3M and the second third-order transconductance coefficient g 3D of an amplifying circuit 10 working in the saturation region that is, one of the third-order transconductance coefficients g 3D of the first diode D1 operating in the saturation region is a positive number , when one is a negative number, one of the actual third-order transconductance g 3M of the first amplifier circuit 10 working in the saturation region and the actual third-order transconductance g 3D of
  • the absolute value of the first third-order transconductance g 3M of the first amplifier circuit 10 operating in the saturation region is the same as the second third-order transconductance g of the first diode D1 operating in the saturation region 3D is equal in absolute value.
  • the sum g 3 of the actual third-order transconductance g 3M of the first amplifying circuit 10 and the actual third-order transconductance g 3D of the adjustment circuit 30 tends to 0, so that the overall linearity of the amplifier 1 can be further improved.
  • the amplifier 1 further includes a second load 301, and the second load 301 is a variable resistor R
  • the above-mentioned second bias voltage Vb2 is used to make the first diode D1 and the second load 301 work in the saturation region.
  • the third-order transconductance coefficient is the second and third-order transconductance coefficient g 3D . In this way, the second and third order transconductance coefficients can be adjusted by adjusting the second bias voltage and adjusting the resistance value of the variable resistor. This allows faster and more flexible tuning of the second and third order transconductance coefficients.
  • the second and third-order transconductance coefficient g 3D can be adjusted by adjusting the second bias voltage Vb2 and the resistance value of the variable resistor R, so that the size of the second and third-order transconductance coefficient g 3D can be adjusted more quickly and flexibly .
  • the embodiment of the present application also provides an electronic device, as shown in FIG. 11 , the electronic device includes the above-mentioned amplifier 1 and a fourth load 2 , and the fourth load 2 is coupled to the signal output terminal RFOUT of the amplifier 1 .
  • the electronic device may also include a processor coupled to the amplifier.
  • the electronic device may be any electronic device that includes an amplifier, such as a mobile phone, a tablet computer (pad), a personal digital assistant (PDA) ), TV, smart wearable products (such as smart watches, smart bracelets), virtual reality (virtual reality, VR) terminal equipment, augmented reality (augmented reality, AR) terminal equipment, charging small household appliances (such as soybean milk machine, sweeping floor
  • an amplifier such as a mobile phone, a tablet computer (pad), a personal digital assistant (PDA)
  • TV smart wearable products (such as smart watches, smart bracelets), virtual reality (virtual reality, VR) terminal equipment, augmented reality (augmented reality, AR) terminal equipment, charging small household appliances (such as soybean milk machine, sweeping floor
  • VR virtual reality
  • AR augmented reality
  • charging small household appliances such as soybean milk machine, sweeping floor
  • the electronic device may also be, for example, a transceiver or a gain amplification unit.
  • the embodiment of the present application does not specifically limit the specific form of the electronic device.

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Abstract

本申请提供一种放大器及其控制方法、电子设备，用于提高放大器的线性度。该放大器包括第一放大电路、第二放大电路、第一二极管、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端；第一放大电路的输入端与信号输入端、第一可调偏置电压端耦合，第一放大电路的输出端与第二放大电路的输入端耦合，第二放大电路的输出端与第一负载和信号输出端均耦合；第一放大电路的一端与接地端耦合；第二放大电路的控制端与第二可调偏置电压端耦合；第一放大电路的输出端和第二放大电路的输入端耦合于节点，第一二极管的正极与节点耦合，第一二极管的负极与接地端耦合；第一负载的另一端与电源电压端耦合。

Description

一种放大器及其控制方法、电子设备 技术领域
本申请涉及集成电路技术领域，尤其涉及一种放大器及其控制方法、电子设备。
背景技术
随着无线通信系统的发展，放大器已广泛用于各种电子设备例如无线收发器中，用于将信号进行放大处理。在部分电子设备中要求放大器应具有高线性度等特性，以避免输出信号的质量变差，基于此，提高放大器的线性度是目前放大器研究领域急需解决的一个问题。
发明内容
本申请的实施例提供一种放大器及其控制方法、电子设备，用于提高放大器的线性度。
为达到上述目的，本申请采用如下技术方案：
第一方面，提供一种放大器，该放大器包括：第一放大电路、第二放大电路、第一二极管、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端。第一放大电路的输入端与信号输入端和第一可调偏置电压端均耦合，第一可调偏置电压端为第一放大电路提供可调的第一偏置电压，第一放大电路的输出端与第二放大电路的输入端耦合，第二放大电路的输出端与第一负载的一端和信号输出端均耦合；第一放大电路的一端还与接地端耦合；第二放大电路的控制端与第二可调偏置电压端耦合，第二可调偏置电压端为第二放大电路提供可调的第二偏置电压；其中，第一放大电路的输入端接收信号输入端提供的射频信号，第一放大电路将射频信号放大后输出给第二放大电路的输入端，第二放大电路的输入端接收第一放大电路的输出端输出的信号，第二放大电路将信号放大后提供给信号输出端；第一放大电路的输出端和第二放大电路的输入端耦合于节点，第一二极管的正极与节点耦合，第一二极管的负极与接地端耦合；第一负载的另一端与电源电压端耦合。由于第一二极管的正极与节点耦合，负极与接地端耦合，因而第一二极管正向导通工作。在此基础上，由于二极管本身的三阶跨导特性与晶体管的三阶跨导特性可以实现互补，因而第一二极管的线性特性与第一放大电路(主要由晶体管构成)的线性特性可以实现互补，借助于第一可调偏置电压端提供可调的第一偏置电压，以及第二可调偏置电压端提供的可调的第二偏置电压，可以进一步的匹配第一放大电路的线性特征与第一二极管的线性特性，因此在放大器中既设置第一放大电路，又设置第一二极管，从而可以优化放大器的性能，有利于放大器的整体线性度的提高。
在第一方面可能的实施方式中，放大器还包括第二负载，第二负载和第一二极管串联在节点和接地端之间。此处，可以通过第一二极管和第二负载共同的三阶跨导特性实现对第一放大电路的三阶跨导特性的互补。
在第一方面可能的实施方式中，第二负载为可变电阻。这样可以通过调整第二可调偏置电压端提供的第二偏置电压以及调整可变电阻R的阻值，更快、更灵活地调整 调节电路(即第一二极管和第二负载)的三阶跨导特性。
在第一方面可能的实施方式中，放大器还包括第二二极管，第二二极管的正极与节点耦合，第二二极管的负极与接地端耦合；第一二极管和第二二极管串联或并联在节点和接地端之间。由于第二二极管的正极与节点耦合，负极与接地端耦合，因而第二二极管始终在饱和区工作。在放大器不包括第二负载的情况下，通过第二可调偏置电压端提供的第二偏置电压便可以调整第一二极管和第一二极管整体的三阶跨导特性。在放大器包括第二负载的情况下，通过第二可调偏置电压端提供的第二偏置电压以及第二负载的阻值共同调整第一二极管、第一二极管和第二负载构成的整体的三阶跨导特性。
在第一方面可能的实施方式中，放大器还包括第三负载，第三负载的一端与第一放大电路耦合，另一端与接地端耦合。第三负载可以用于调节放大器的增益。
在第一方面可能的实施方式中，第三负载为电感。
在第一方面可能的实施方式中，第一放大电路包括第一晶体管，第一晶体管的栅极分别与信号输入端、第一可调偏置电压端耦合，第一晶体管的第一极与节点耦合，第一晶体管的第二极与接地端耦合；其中，第一晶体管的第一极和第二极中一个为源极，一个为漏极。
在第一方面可能的实施方式中，第二放大电路包括第二晶体管，第二晶体管的栅极与第二可调偏置电压端耦合，第二晶体管的第一极与信号输出端耦合，第二晶体管的第二极与节点耦合；其中，第二晶体管的第一极和第二极中一个为源极，一个为漏极。
在第一方面可能的实施方式中，放大器还包括第一偏置电压产生电路，第一偏置电压产生电路的输出端与第一可调偏置电压端耦合，用于为第一可调偏置电压端提供第一偏置电压。第一偏置电压产生电路可以根据需要向第一可调偏置电压端提供合适的第一偏置电压。
在第一方面可能的实施方式中，放大器还包括第二偏置电压产生电路，第二偏置电压产生电路的输出端与第二可调偏置电压端耦合，用于为第二可调偏置电压端提供第二偏置电压。第二偏置电压产生电路可以根据需要向第二可调偏置电压端提供合适的第二偏置电压。
在第一方面可能的实施方式中，放大器还包括反馈电路，反馈电路分别与信号输入端和信号输出端耦合，用于对经第一放大电路和第二放大电路放大后的信号进行反馈。反馈电路可以拓宽放大器的工作带宽。
在第一方面可能的实施方式中，反馈电路包括串联的反馈电容和反馈电阻。
第二方面，提供一种放大器，该放大器包括：第一放大电路、第二放大电路、调节电路、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端。第一放大电路分别与节点、信号输入端、接地端和第一可调偏置电压端耦合；第二放大电路分别与节点、信号输出端和第二可调偏置电压端耦合；调节电路分别与节点和接地端耦合；第一负载的一端与电源电压端耦合，另一端与信号输出端耦合；其中，第一放大电路工作在饱和区的三阶跨导系数和调节电路工作在饱和区的三阶跨导系数中一个为正数，一个为负数。由于第一放大电 路工作在饱和区时，第一偏置电压与三阶跨导系数g 3M的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，调节电路工作在饱和区时，第二偏置电压与三阶跨导系数g 3D的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖。基于此，在本申请实施例提供的放大器中，由于第一放大电路工作在饱和区的三阶跨导系数g3M和调节电路工作在饱和区的三阶跨导系数g3D中一个为正数，一个为负数，因而第一放大电路工作在饱和区时的实际的三阶跨导系数g3M和调节电路工作在饱和区时的实际的三阶跨导系数g3D中一个为正数，一个为负数，因此第一放大电路工作在饱和区时的实际的三阶跨导系数g3M和调节电路工作在饱和区时的实际的三阶跨导系数g3D可以进行非线性叠加抵消，从而可以提高放大器的整体线性度。
在第二方面可能的实施方式中，第一放大电路工作在饱和区的三阶跨导系数的绝对值与调节电路工作在饱和区的三阶跨导系数的绝对值相等。这样第一放大电路实际的三阶跨导系数g 3M和第一二极管实际的三阶跨导系数g 3D之和g 3趋向于0，从而可以使得放大器的整体线性度进一步得到提高。
第三方面，提供一种电子设备，该电子设备包括第四负载、处理器和上述第一方面提供的放大器；第四负载与放大器的信号输出端耦合，处理器与放大器耦合。可以参考上述第一方面的相关描述，此处不再赘述。
第四方面，提供一种放大器的控制方法，其中，放大器包括：第一放大电路、第二放大电路、第一二极管、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端；第一放大电路的输入端与信号输入端和第一可调偏置电压端均耦合，第一可调偏置电压端为第一放大电路提供可调的第一偏置电压，第一放大电路的输出端与第二放大电路的输入端耦合，第二放大电路的输出端与第一负载的一端和信号输出端均耦合；第一放大电路的一端还与接地端耦合；第二放大电路的控制端与第二可调偏置电压端耦合，第二可调偏置电压端为第二放大电路提供可调的第二偏置电压；其中，第一放大电路的输入端接收信号输入端提供的射频信号，第一放大电路将射频信号放大后输出给第二放大电路的输入端，第二放大电路的输入端接收第一放大电路的输出端输出的信号，第二放大电路将信号放大后提供给信号输出端；第一放大电路的输出端和第二放大电路的输入端耦合于节点，第一二极管的正极与节点耦合，第一二极管的负极与接地端耦合；第一负载的另一端与电源电压端耦合；放大器的控制方法包括：第一可调偏置电压端接收第一偏置电压，以使第一放大电路在饱和区工作；第二可调偏置电压端接收第二偏置电压；其中，第一偏置电压用于使第一放大电路工作在饱和区的三阶跨导系数为第一三阶跨导系数；第二偏置电压用于使第一二极管工作在饱和区的三阶跨导系数为第二三阶跨导系数，第一三阶跨导系数和第二三阶跨导系数中一个为正数，一个为负数。可以参考上述第二方面的相关描述，此处不再赘述。
在第四方面可能的实施方式中，第一放大电路工作在饱和区的第一三阶跨导系数的绝对值与第一二极管工作在饱和区的第二三阶跨导系数的绝对值相等。这样第一放大电路实际的三阶跨导系数g 3M和第一二极管实际的三阶跨导系数g 3D之和g 3趋向于0，从而可以使得放大器的整体线性度进一步得到提高。
在第四方面可能的实施方式中，放大器还包括：第二负载；第二负载和第一二极 管串联在节点和接地端之间；其中，第二负载为可变电阻。第二偏置电压用于使第一二级管和第二负载工作在饱和区的三阶跨导系数为第二三阶跨导系数。这样可以通过调整第二偏置电压以及调节可变电阻的阻值调整第二三阶跨导系数。这样可以更快、更灵活地调整第二三阶跨导系数的大小。
附图说明
图1为相关技术提供的一种放大器的结构示意图；
图2为偏置电压V GS与三阶跨导系数g 3A、三阶跨导系数g 3B以及三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3的关系曲线图；
图3为本申请的实施例提供的一种放大器的结构示意图；
图4为本申请的另一实施例提供的一种放大器的结构示意图；
图5为本申请的又一实施例提供的一种放大器的结构示意图；
图6a为本申请的又一实施例提供的一种放大器的结构示意图；
图6b为本申请的又一实施例提供的一种放大器的结构示意图；
图6c为本申请的又一实施例提供的一种放大器的结构示意图；
图7为本申请的又一实施例提供的一种放大器的结构示意图；
图8为本申请的又一实施例提供的一种放大器的结构示意图；
图9为本申请的又一实施例提供的一种放大器的结构示意图；
图10为本申请的实施例提供的一种放大器的控制方法的流程示意图；
图11为本申请的实施例提供的一种电子设备的结构示意图。
附图标记：1-放大器；2-第四负载；10-第一放大电路；20-第二放大电路；30-调节电路；40-第一负载；50-第三负载；60-反馈电路；301-第二负载。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。
以下，术语“第一”、“第二”等仅用于描述方便，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或“例如”等词旨在以具体方式呈现相关概念。
在本申请实施例中，“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。
本申请实施例中，除非另有明确的规定和限定，术语“耦合”可以是实现信号传输的电性连接的方式，“耦合”可以是直接的电性连接，也可以通过中间媒介间接的电性连接。例如通过电阻、电感，或其他电学元件实现的连接。
随着无线通信系统的发展，放大器已广泛用于各种电子设备中，用于将信号进行 放大处理。在部分电子设备中要求放大器应具有高线性度等特性，以避免输出信号的质量变差。
对于任何一个无记忆的模拟和射频电路而言，其非线性小信号模型均可用如下表达式来表征电路的输入输出特征(主要考虑三阶以内)：
y(t)≈α 1x(t)+α 2x 2(t)+α 3x 3(t)
其中，x(t)为电路的输入信号，y(t)为电路的输出信号。
参照上述表征可知，单晶体管的输出电流(即漏源电流)i ds与输入电压(即栅源电压)v gs的关系表达式为：
i ds＝g 1v gs+g 2v 2 gs+g 3v 3 gs
其中，g 1是小信号线性跨导系数，g 2是二阶跨导系数，g 3是三阶跨导系数。
单晶体管的线性度IIP3与小信号线性跨导系数g1和三阶跨导系数g3有关，晶体管的线性度IIP3的幅度A IIP3可以表示为：
Figure PCTCN2021134689-appb-000001
A IIP3可以表征晶体管的线性度IIP3，A IIP3的值越大，晶体管的线性度IIP3越高。为了获得更高的晶体管的线性度，可以使三阶跨导系数g 3趋向于0。
为了提高现有的放大器的线性度，相关技术提供一种放大器，如图1所示，放大器包括晶体管MA、晶体管MB、电容C、电感L、信号输入端RFIN、信号输出端RFOUT、偏置电压端Vbias1、偏置电压端Vbias2、电源电压端VDD和接地端GND。晶体管MA的栅极分别与信号输入端RFIN和偏置电压端Vbias1耦合，晶体管MA的第一极与信号输出端RFOUT耦合，晶体管MA的第二极与接地端GND耦合。晶体管MB的栅极与电容C的第一端、偏置电压端Vbias2均耦合，晶体管MB的第一极与信号输出端RFOUT耦合，晶体管MB的第二极与接地端GND耦合。电容C的第二端分别与信号输入端RFIN和偏置电压端Vbias1耦合。信号输出端RFOUT还与电感L的一端耦合，电感L的另一端与电源电压端VDD耦合。此处，晶体管MA和晶体管MB的第一极为源极，第二极为漏极；或者，晶体管MA和晶体管MB的第一极为漏极，第二极为源极。
对于图1所示的放大器，可以将晶体管MA和晶体管MB看作一个整体，这样放大器的线性度IIP3的幅度A IIP3为
Figure PCTCN2021134689-appb-000002
其中，公式中的g 1等于晶体管MA的小信号线性跨导系数g 1A和晶体管MB的小信号线性跨导系数g 1B之和，即g 1＝g 1A+g 1B，公式中的g 3等于晶体管MA的三阶跨导系数g 3A和晶体管MB的三阶跨导系数g 3B之和，即g 3＝g 3A+g 3B。基于此，使晶体管MA的三阶跨导系数g 3A和晶体管MB的三阶跨导系数g 3B之和g 3趋向于0，便可以使放大器的线性度较高。
针对图1所示的放大器，偏置电压端Vbias1提供的偏置电压V GS的大小会影响晶体管MA的三阶跨导系数g 3A，偏置电压端Vbias2提供的偏置电压V GS的大小会影响晶体管MB的三阶跨导系数g 3B。图2示意出了偏置电压V GS与三阶跨导系数g 3A、三阶跨导系数g 3B以及三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3的关系曲线图，图2的横坐标表示偏置电压端Vbias1以及偏置电压端Vbias2提供的偏置电压V GS，纵坐标表示三阶跨导系数g 3A、三阶跨导系数g 3B以及三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3。由图2提供的关系曲线可以看出，通过不同的偏置电压V GS的选择，使晶体管MA工作在强反型区，强反型区也可以称为饱和区，即图2所示的偏置电压V GS与三阶跨导系数g 3A的关系曲线中的波峰位置，也就是图2中虚线圈标示的位置，且使晶体管MB工作在弱反型区，即图2所示的偏置电压V GS与三阶跨导系数g 3B的关系曲线中的波谷位置，也就是图2中虚线圈标示的位置，这样在某个偏置电压V GS的区域范围内，三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3趋向于0，从而可以改善放大器的线性度。
然而，通过上述分析可知，相关技术提供的放大器在提高线性度时，是通过要求晶体管MA工作在强反型区，晶体管MB工作在弱反型区实现的。一般而言，当晶体管在强反型区工作时，根据研究结果得知，偏置电压V GS与三阶跨导系数g 3的模拟(model)仿真关系曲线与实际测试关系曲线拟合度较为一致；但是当晶体管在弱反型区工作时，根据研究结果得知，偏置电压V GS与三阶跨导系数g 3的模拟(model)仿真关系曲线与实际测试关系曲线存在较大的差距。参考图2，也就是说，偏置电压V GS与三阶跨导系数g 3A的仿真关系曲线在波峰位置处与实际测试关系曲线在波峰位置处的拟合度较为一致，但是偏置电压V GS与三阶跨导系数g 3B的仿真关系曲线在波谷位置处与实际测试关系曲线在波谷位置处的有偏差，实际测试关系曲线的波谷位置可能会向左偏移或向右偏移，这样一来，理论计算出在某个偏置电压V GS的区域范围内，三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3趋向于0，然而实际上，由于偏置电压V GS与三阶跨导系数g 3B的实际测试关系曲线在波谷位置偏移，因此在理论计算出的某个偏置电压V GS的区域范围内，实际的三阶跨导系数g 3A和三阶跨导系数g 3B之和g 3可能并不等于0，这样便导致放大器的线性度可能没有提高或提高的不明显。
为了提高放大器的线性度，本申请的实施例提供一种放大器，该放大器例如可以为低噪声放大器(low-noise amplifier，LNA)、功率放大器(power amplifier，PA)、跨阻放大器(trans-impedance amplifier，TIA)或可变增益放大器(variable gain amplifier，VGA)等。
如图3所示，本申请的实施例提供的放大器1包括：第一放大电路10、第二放大电路20、调节电路30、第一可调偏置电压端Vb1、第一负载40、节点A、信号输入端RFIN、信号输出端RFOUT、电源电压端VDD、第二可调偏置电压端Vb2和接地端GND。
上述第一放大电路10的输入端与信号输入端RFIN和第一可调偏置电压端Vb1均耦合，第一可调偏置电压端Vb1为第一放大电路10提供可调的第一偏置电压Vb1，第一放大电路10的输出端与第二放大电路20的输入端耦合，第二放大电路20的输出端与第一负载40的一端和信号输出端RFOUT均耦合；第一放大电路10的一端还与 接地端GND耦合；第二放大电路20的控制端与第二可调偏置电压端Vb2耦合，第二可调偏置电压端Vb2为第二放大电路20提供可调的第二偏置电压Vb2；其中，第一放大电路10的输入端接收信号输入端RFIN提供的射频信号，第一放大电路10将射频信号放大后输出给第二放大电路20的输入端，第二放大电路20的输入端接收第一放大电路10的输出端输出的信号，第二放大电路20将信号放大后提供给信号输出端RFOUT；第一放大电路10的输出端和第二放大电路20的输入端耦合于节点A，上述调节电路30的一端与节点A耦合，另一端与接地端GND耦合。上述第一负载40的另一端与电源电压端VDD耦合。其中，第一放大电路10工作在饱和区的三阶跨导系数g 3M和调节电路30工作在饱和区的三阶跨导系数g 3D中一个为正数，一个为负数。此处，可以是第一放大电路10工作在饱和区的三阶跨导系数g 3M为正数，调节电路30工作在饱和区的三阶跨导系数g 3D为负数；也可以是第一放大电路10工作在饱和区的三阶跨导系数g 3M为负数，调节电路30工作在饱和区的三阶跨导系数g 3D为正数。
应当理解到，可以通过第一可调偏置电压端Vb1提供的第一偏置电压Vb1调整第一放大电路10工作在饱和区的三阶跨导系数g 3M的大小，可以通过第二可调偏置电压端Vb2提供的第二偏置电压调整节点A的电压大小，以调整调节电路30工作在饱和区的三阶跨导系数g 3D的大小，以使得第一放大电路10工作在饱和区的三阶跨导系数g 3M和调节电路30工作在饱和区的三阶跨导系数g 3D中一个为正数，一个为负数。
在此基础上，第一可调偏置电压端Vb1可以与第一偏置电压产生电路的输出端耦合，通过第一偏置电压产生电路为第一可调偏置电压端Vb1提供第一偏置电压Vb1。第一偏置电压产生电路可以根据需要向第一可调偏置电压端Vb1提供合适的第一偏置电压Vb1。在此基础上，第一偏置电压产生电路可以集成在放大器中，第一偏置电压产生电路也可以相对于放大器额外独立设置。同样的，第二可调偏置电压端Vb2可以与第二偏置电压产生电路的输出端耦合，通过第二偏置电压产生电路为第二可调偏置电压端Vb2提供第二偏置电压Vb2。第二偏置电压产生电路可以根据需要向第二可调偏置电压端Vb2提供合适的第二偏置电压Vb2。在此基础上，第二偏置电压产生电路可以集成在放大器中，第二偏置电压产生电路也可以相对于放大器额外独立设置。
需要说明的是，参考图3，在放大器1中，第二放大电路20分别与节点A、信号输出端RFOUT和第二可调偏置电压端Vb2耦合，第二放大电路20相当于一个开关，用于在第二可调偏置电压端Vb2控制下，控制节点A和信号输出端RFOUT的导通或断开。由于第二放大电路20相当于一个开关，因此第二放大电路20不会影响放大器1的线性度，放大器1的线性度主要与第一放大电路10的线性度和调节电路30的线性度有关。基于上述可知，可以用放大器的线性度IIP3的幅度A IIP3表征放大器1的线性度IIP3，A IIP3的值越大，放大器1的线性度IIP3越高，放大器的线性度IIP3的幅度A IIP3为
Figure PCTCN2021134689-appb-000003
在本申请实施例中，可以将第一放大电路10和调节电路30看作 一个整体，这样一来，g 1等于第一放大电路10的小信号线性跨导系数g 1M和调节电路30的小信号线性跨导系数g 1D之和，即g 1＝g 1M+g 1D，g 3等于第一放大电路10的三阶跨导系数g 3M和调节电路30的三阶跨导系数g 3D之和，即g 3＝g 3M+g 3D。
应当理解到，根据研究结果可知，电子器件在饱和区工作时，偏置电压V GS与三阶跨导系数g 3的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，因此第一放大电路10工作在饱和区时，第一偏置电压Vb1与三阶跨导系数g 3M的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，调节电路30工作在饱和区时，第二偏置电压Vb2与三阶跨导系数g 3D的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖。基于此，在本申请实施例提供的放大器1中，由于第一放大电路10工作在饱和区的三阶跨导系数g3M和调节电路30工作在饱和区的三阶跨导系数g 3D中一个为正数，一个为负数，因而第一放大电路10工作在饱和区时的实际的三阶跨导系数g3M和调节电路30工作在饱和区时的实际的三阶跨导系数g3D中一个为正数，一个为负数，因此第一放大电路10工作在饱和区时的实际的三阶跨导系数g3M和调节电路30工作在饱和区时的实际的三阶跨导系数g 3D可以进行非线性叠加抵消，从而使得第一放大电路10的三阶跨导系数g 3M和调节电路30的三阶跨导系数g 3D之和g 3减小，这样一来，根据放大器的线性度IIP3的幅度A IIP3的公式
Figure PCTCN2021134689-appb-000004
可知，放大器的线性度IIP3的幅度A IIP3增加，进而可以确保放大器1的整体线性度有效提高。
需要说明的是，第一放大电路10工作在饱和区的三阶跨导系数g 3M的绝对值和调节电路30工作在饱和区的三阶跨导系数g3D的绝对值可以相等，也可以不相等。例如，第一放大电路10工作在饱和区的三阶跨导系数g3M可以为0.2A/N 3，调节电路30工作在饱和区的三阶跨导系数g3D可以为-0.2A/N 3。又例如，第一放大电路10工作在饱和区的三阶跨导系数g3M可以为0.2A/N 3，调节电路30工作在饱和区的三阶跨导系数g3D可以为-0.1A/N 3。
为了进一步提高放大器1的整体线性度，在一些示例中，第一放大电路10工作在饱和区的三阶跨导系数g 3M的绝对值和调节电路30工作在饱和区的三阶跨导系数g 3D 的绝对值相等。
由于第一放大电路10工作在饱和区时，第一偏置电压Vb1与三阶跨导系数g 3M的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，调节电路30工作在饱和区时，第二偏置电压Vb2与三阶跨导系数g 3D的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，因而当第一放大电路10工作在饱和区的三阶跨导系数g 3M的绝对值和调节电路30工作在饱和区的三阶跨导系数g 3D的绝对值相等时，此时，第一放大电路10工作在饱和区时的实际的三阶跨导系数g 3M的绝对值和调节电路30工作在饱和区时的实际的三阶跨导系数g3D的绝对值相等，而第一放大电路10工作在饱和区的三阶跨导系数g 3M和调节电路30工作在饱和区的三阶跨导系数g 3D中一个为正数，一个为负数，因此第一放大电路10实际的三阶跨导系数g 3M和调节电路30实际的三阶跨导系数g 3D之和g 3趋向于0，这样一来，根据放大器的线性度IIP3的幅度A IIP3的公式
Figure PCTCN2021134689-appb-000005
可知，放大器1的整体线性度可以进一步得到提高。
在一些示例中，如图3所示，上述放大器1还包括第一电容C1，第一电容C1的一端与信号输入端RFIN耦合，另一端与第一放大电路10耦合。
在一些示例中，如图3所示，上述放大器1还包括第二电容C2，第二电容C2的一端与信号输出端RFOUT耦合，另一端与第二放大电路20耦合。
上述第一电容C1和第二电容C2的作用都是为了隔掉直流信号，让交流信号通过。
在一些示例中，如图4所示，上述第一放大电路10包括第一晶体管M1，第一晶体管M1的栅极分别与信号输入端RFIN、第一可调偏置电压端Vb1耦合，第一晶体管M1的第一极与节点A耦合，第一晶体管M1的第二极与接地端GND耦合；其中，第一晶体管M1的第一极和第二极中一个为源极，一个为漏极。
“第一晶体管M1的第二极与接地端GND耦合”，可以是第一晶体管M1的第二极与接地端GND直接耦合，也可以是第一晶体管M1的第二极与接地端GND通过其它电学元件间接耦合。
需要说明的是，可以是第一晶体管M1的第一极为源极，第二极为漏极；也可以是第一晶体管M1的第一极为漏极，第二极为源极。
此处，第一晶体管M1可以是P型管，也可以是N型管。在第一晶体管M1为P型管的情况下，第一可调偏置电压端Vb1提供低电平信号时，第一晶体管M1导通。在第一晶体管M1为N型管的情况下，第一可调偏置电压端Vb1提供高电平信号时，第一晶体管M1导通。
此外，第一晶体管M1可以是增强型(E-mode)晶体管、耗尽型(D-mode)晶体管或共源共栅型(cascode)晶体管中的一种。
另外，第一晶体管M1的尺寸可以根据需要进行设计。
在此基础上，在另一些示例中，上述第一放大电路10除包括第一晶体管M1外，还可以包括与第一晶体管M1串联或并联的其它一个或多个晶体管。
在一些示例中，如图4所示，上述第二放大电路20包括第二晶体管M2，第二晶体管M2的栅极与第二可调偏置电压端Vb2耦合，第二晶体管M2的第一极与信号输出端RFOUT耦合，第二晶体管M2的第二极与节点A耦合；其中，第二晶体管M2的第一极和第二极中一个为源极，一个为漏极。
需要说明的是，可以是第二晶体管M2的第一极为源极，第二极为漏极；也可以是第二晶体管M2的第一极为漏极，第二极为源极。
此处，第二晶体管M2可以是N型管。在第二晶体管M2为N型管的情况下，第二可调偏置电压端Vb2提供高电平信号时，第二晶体管M2导通。
此外，第二晶体管M2可以是增强型晶体管、耗尽型晶体管或共源共栅型晶体管中的一种。
另外，第二晶体管M2的尺寸可以根据需要进行设计。
在此基础上，在另一些示例中，上述第二放大电路20除包括第二晶体管M2外，还可以包括与第二晶体管M2串联或并联的其它一个或多个晶体管。
在一些示例中，上述第一晶体管M1和第二晶体管M2的材料可以包括III-V族化合物。
上述第一负载40例如可以为电感Ld、电容或电阻中的一个或多个，图4以第一负载40为电感Ld为例进行示意。
上述调节电路30示例性地可以采用以下几种实现方式：
第一种：如图4所示，调节电路30包括第一二极管D1，第一二极管D1的正极与节点A耦合，第一二极管D1的负极与接地端GND耦合。
“第一二极管D1的负极与接地端GND耦合”可以是第一二极管D1的负极与接地端GND直接耦合，也可以是第一二极管D1的负极与接地端GND通过其它电子元件间接耦合。
此处，在第一二极管D1处于导通状态时，基于第一二极管D1类型的不同，可以是正极为信号输入端，负极为信号输出端，即信号由正极流向负极；也可以是负极为信号输入端，正极为信号输出端，即信号由负极流向正极。
另外，第一二极管D1的阈值电压Vth可以为正数，也可以为负数。
此外，第一二极管D1例如可以是肖特基(Schottky)二极管或普通硅二极管等。当第一二极管D1为肖特基二极管，第一晶体管M1为增强型晶体管的情况下，可以采用同一工艺同时制作第一二极管D1和第一晶体管M1，从而可以简化放大器的制作工序。
在此基础上，第一二极管D1可以是增强型二极管，也可以是耗尽型二极管。
在本申请实施例中，对于第一二极管D1的尺寸不进行限定，可以根据需要进行设计。
由于第一二极管D1的正极与节点A耦合，负极与接地端GND耦合，因而第一二极管D1始终在饱和区工作。通过第二可调偏置电压端Vb2提供的第二偏置电压便可 以调整第一二极管D1工作在饱和区的三阶跨导系数g 3D的大小。
第二种：如图5所示，调节电路30包括第一二极管D1和第二负载301，第一二极管D1的正极与节点A耦合，第一二极管D1的负极与接地端GND耦合；其中，第二负载301和第一二极管D1串联在节点A和接地端GND之间。
在调节电路30包括第一二极管D1和第二负载301的情况下，可以通过第二可调偏置电压端Vb2提供的第二偏置电压Vb2以及第二负载301共同调整第一二极管D1和第二负载301工作在饱和区的三阶跨导系数g 3D的大小，以使第一放大电路10工作在饱和区时的实际的三阶跨导系数g 3M和调节电路30工作在饱和区时的实际的三阶跨导系数g 3D可以进行非线性叠加抵消，以达到第一放大电路10实际的三阶跨导系数g 3M和调节电路30实际的三阶跨导系数g 3D之和g 3趋向于0的目的。
此处，第二负载301的阻值可以是固定的，在此情况下，对于第二负载301的阻值大小不作限定。第二负载301的阻值也可以是可变的，在此情况下，对于第二负载301的阻值范围不作限定。
此外，第二负载301例如可以为电感、电容或电阻等。为了能够对调节电路30(即第一二极管D1和第二负载301)工作在饱和区的三阶跨导系数g 3D的大小进行灵活调节，因此在一些示例中，第二负载301的阻值是可变的，例如，如图5所示，第二负载301为可变电阻R，这样一来，可以通过调整第二可调偏置电压端Vb2提供的第二偏置电压Vb2以及调整可变电阻R的阻值，更快、更灵活地调整调节电路30(即第一二极管D1和第二负载301)工作在饱和区的三阶跨导系数g 3D的大小，以使得第一放大电路10实际的三阶跨导系数g 3M和调节电路30实际的三阶跨导系数g 3D之和g 3趋向于0。
示例的，如图5所示，当第一晶体管M1工作在饱和区的三阶跨导系数g 3M在某个偏置区域内(即第一偏置电压Vb1在某个范围内)为正数，可以通过调整第二可调偏置电压端Vb2提供的第二偏置电压Vb2以及调整可变电阻R的阻值，使第一二极管D1和可变电阻R整体工作在饱和区的三阶跨导系数g 3D为负数，且第一晶体管M1的三阶跨导系数g 3M与第一二极管D1和可变电阻R整体的三阶跨导系数g 3D之和趋向于0。
第三种：调节电路30还包括第一二极管D1和第二二极管D2，第一二极管D1的正极与节点A耦合，第一二极管D1的负极与接地端GND耦合；第二二极管D3的正极与节点A耦合，第二二极管D2的负极与接地端GND耦合；第一二极管D1和第二二极管D2可以如图6a所示串联在节点A和接地端GND之间，或者，第一二极管D1和第二二极管D2可以如图6b所示并联在节点A和接地端GND之间。
第二二极管D2可以参考上述有关第一二极管D1的解释说明，此处不再赘述。第一二极管D1的类型和第二二极管D2的类型可以相同，也可以不相同。第一二极管D1的尺寸和第二二极管D2的尺寸可以相同，也可以不相同。
需要说明的是，在第三种实现方式中，调节电路30可以包括第二负载301，也可以不包括第二负载301。在调节电路30包括第二负载301，且第一二极管D1和第二二极管D2并联在节点A和接地端GND之间的情况下，可以是如图6b所示，第一二极管D1和第二二极管D2并联后与第二负载301串联，也可以是如图6c所示，第一 二极管D1和第二负载301串联后与第二二极管D2并联。
由于第二二极管D2的正极与节点A耦合，负极与接地端GND耦合，因而第二二极管D2始终在饱和区工作。
在调节电路30不包括第二负载301的情况下，通过第二可调偏置电压端Vb2提供的第二偏置电压Vb2便可以调整调节电路30(即第一二极管D1和第一二极管D2整体)工作在饱和区的三阶跨导系数g 3D的大小。在调节电路30包括第二负载301的情况下，通过第二可调偏置电压端Vb2提供的第二偏置电压Vb2以及第二负载301的阻值共同调整调节电路30(即第一二极管D1、第一二极管D2和第二负载301整体)工作在饱和区的三阶跨导系数g 3D的大小。
应当理解到，调节电路30包括但不限于第一二极管D1和第二二极管D2，还可以包括其它一个或多个二极管，其它一个或多个二极管的连接关系可以参考上述第二二极管D2，此处不再赘述。
在此基础上，调节电路30包括但不限于第二负载301，还可以包括其它一个或多个负载，其它一个或多个负载可以与第一二极管D1串联在节点A和接地端GND之间，也可以与调节电路30中的其它二极管串联在节点A和接地端GND之间。在调节电路30包括多个第二负载301的情况下，多个第二负载301的阻值可以相同，也可以不相同。
下文中以调节电路30采用上述第二种实现方式为例进行说明。
在一些示例中，如图7所示，上述放大器1还包括第三负载50，第三负载50的一端与第一放大电路10耦合，另一端与接地端GND耦合。在第一放大电路10包括第一晶体管M1的情况下，第三负载50的一端与第一晶体管M1的第二极耦合，另一端与接地端GND耦合。
此处，第三负载50例如可以为电感Ld、电容或电阻中的一个或多个，图7以第三负载50为电感Ls为例进行示意。
在放大器1包括第三负载50的情况下，第三负载50可以用于调节放大器1的增益。
为了拓宽放大器1的工作带宽，在一些示例中，如图8所示，上述放大器1还包括反馈电路60，反馈电路60分别与信号输入端RFIN和信号输出端RFOUT耦合，用于对经第一放大电路10和第二放大电路20放大后的信号进行反馈，以达到扩宽放大器1的工作带宽的目的。
在放大器1包括第一电容C1的情况下，反馈电路60通过第一电容C1与信号输入端RFIN耦合，在放大器1包括第二电容C2的情况下，反馈电路60通过第二电容C2与信号输出端RFOUT耦合。
在一些示例中，如图9所示，上述反馈电路60包括串联的反馈电容Cf和反馈电阻Rf。
对图9提供的放大器1的线性度以及图9中去除第一二极管D1和可变电阻R后的放大器的线性度进行检测，通过对比可知，在放大器1的结构为图9所示的结构，放大器1中设置调节电路30，即设置第一二极管D1和可变电阻R相对于不设置调节电路30，放大器1的线性度至少提高约6dB。
本申请的实施例还提供一种放大器的控制方法，该放大器例如可以为上述的放大器，放大器的控制方法可以如图10所示，包括如下步骤：
S10、第一可调偏置电压端Vb1接收第一偏置电压Vb1，以使第一放大电路10在饱和区工作。
S11、第二可调偏置电压端Vb2接收第二偏置电压Vb2；其中，第一偏置电压Vb1用于使第一放大电路10工作在饱和区的三阶跨导系数g 3M为第一三阶跨导系数g 3M；第二偏置电压Vb2用于使第一二极管D1工作在饱和区的三阶跨导系数g 3D为第二三阶跨导系数g 3D，第一三阶跨导系数g 3M和第二三阶跨导系数g 3D中一个为正数，一个为负数。
需要说明的是，步骤S10和步骤S11可以同时执行；也可以先执行步骤S10，再执行步骤S11，或者，先执行步骤S11，再执行步骤S10。
由于第一放大电路10工作在饱和区时，第一偏置电压Vb1与三阶跨导系数g 3M的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，第一二极管D1工作在饱和区时，第二偏置电压Vb2与三阶跨导系数g 3D的模拟仿真关系曲线与实际测试关系曲线完全可以准确拟合覆盖，因此当设计第一三阶跨导系数g 3M即第一放大电路10工作在饱和区的三阶跨导系数g 3M和第二三阶跨导系数g 3D即第一二极管D1工作在饱和区的三阶跨导系数g 3D中一个为正数，一个为负数时，第一放大电路10工作在饱和区的实际的三阶跨导系数g 3M和第一二极管D1工作在饱和区的实际的三阶跨导系数g 3D中一个为正数，一个为负数，因而第一放大电路10工作在饱和区时的实际的三阶跨导系数g 3M和第一二极管D1工作在饱和区时的实际的三阶跨导系数g 3D可以进行非线性叠加抵消，从而使得第一放大电路10的三阶跨导系数g 3M和第一二极管D1的三阶跨导系数g 3D之和g 3减小，从而可以提高放大器1的整体线性度。
此处，在一些示例中，第一放大电路10工作在饱和区的第一三阶跨导系数g 3M的绝对值与第一二极管D1工作在饱和区的第二三阶跨导系数g 3D的绝对值相等。这样第一放大电路10实际的三阶跨导系数g 3M和调节电路30实际的三阶跨导系数g 3D之和g 3趋向于0，从而可以使得放大器1的整体线性度进一步得到提高。
在放大器1还包括第二负载301，且第二负载301为可变电阻R的情况下，上述第二偏置电压Vb2用于使第一二级管D1和第二负载301工作在饱和区的三阶跨导系数为第二三阶跨导系数g 3D。这样可以通过调整第二偏置电压以及调节可变电阻的阻值调整第二三阶跨导系数。这样可以更快、更灵活地调整第二三阶跨导系数的大小。这样可以通过调整第二偏置电压Vb2以及调节可变电阻R的阻值调整第二三阶跨导系数g 3D，从而可以更快、更灵活地调整第二三阶跨导系数g 3D的大小。
本申请的实施例还提供一种电子设备，如图11所示，该电子设备包括上述的放大器1和第四负载2，第四负载2与放大器1的信号输出端RFOUT耦合。该电子设备还可以包括处理器，处理器与放大器耦合。
需要说明的是，本申请实施例提供的电子设备可以是任意包含有放大器的电子设备，该电子设备例如可以为手机(mobile phone)、平板电脑(pad)、个人数字助理(personal digital assistant，PDA)、电视、智能穿戴产品(例如，智能手表、智能手环)、虚拟现实(virtual reality，VR)终端设备、增强现实(augmented reality，AR) 终端设备、充电家用小型电器(例如豆浆机、扫地机器人)、无人机、雷达、航空航天设备和车载设备等不同类型的用户设备或者终端设备；该电子设备还可以为基站等网络设备。该电子设备例如还可以为收发机或增益放大单元等。本申请实施例对电子设备的具体形式不作特殊限制。以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种放大器，其特征在于，包括：第一放大电路、第二放大电路、第一二极管、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端；
    所述第一放大电路的输入端与所述信号输入端和所述第一可调偏置电压端均耦合，所述第一可调偏置电压端为所述第一放大电路提供可调的第一偏置电压，所述第一放大电路的输出端与所述第二放大电路的输入端耦合，所述第二放大电路的输出端与所述第一负载的一端和所述信号输出端均耦合；所述第一放大电路的一端还与所述接地端耦合；所述第二放大电路的控制端与所述第二可调偏置电压端耦合，所述第二可调偏置电压端为所述第二放大电路提供可调的第二偏置电压；其中，所述第一放大电路的输入端接收所述信号输入端提供的射频信号，所述第一放大电路将所述射频信号放大后输出给所述第二放大电路的输入端，所述第二放大电路的输入端接收所述第一放大电路的输出端输出的信号，所述第二放大电路将所述信号放大后提供给所述信号输出端；
    所述第一放大电路的输出端和所述第二放大电路的输入端耦合于所述节点，所述第一二极管的正极与所述节点耦合，所述第一二极管的负极与所述接地端耦合；
    所述第一负载的另一端与所述电源电压端耦合。
  2. 根据权利要求1所述的放大器，其特征在于，所述放大器还包括第二负载，所述第二负载和所述第一二极管串联在所述节点和所述接地端之间。
  3. 根据权利要求2所述的放大器，其特征在于，所述第二负载为可变电阻。
  4. 根据权利要求1-3任一项所述的放大器，其特征在于，所述放大器还包括第二二极管，所述第二二极管的正极与所述节点耦合，所述第二二极管的负极与所述接地端耦合；
    所述第一二极管和所述第二二极管串联或并联在所述节点和所述接地端之间。
  5. 根据权利要求1-4任一项所述的放大器，其特征在于，所述放大器还包括第三负载，所述第三负载的一端与所述第一放大电路耦合，另一端与所述接地端耦合。
  6. 根据权利要求5所述的放大器，其特征在于，所述第三负载为电感。
  7. 根据权利要求1-6任一项所述的放大器，其特征在于，所述第一放大电路包括第一晶体管，所述第一晶体管的栅极分别与所述信号输入端、所述第一可调偏置电压端耦合，所述第一晶体管的第一极与所述节点耦合，所述第一晶体管的第二极与所述接地端耦合；
    其中，所述第一晶体管的所述第一极和所述第二极中一个为源极，一个为漏极。
  8. 根据权利要求1-7任一项所述的放大器，其特征在于，所述第二放大电路包括第二晶体管，所述第二晶体管的栅极与所述第二可调偏置电压端耦合，所述第二晶体管的第一极与所述信号输出端耦合，所述第二晶体管的第二极与所述节点耦合；
    其中，所述第二晶体管的所述第一极和所述第二极中一个为源极，一个为漏极。
  9. 根据权利要求1-8任一项所述的放大器，其特征在于，所述放大器还包括第一偏置电压产生电路，所述第一偏置电压产生电路的输出端与所述第一可调偏置电压端耦合，用于为所述第一可调偏置电压端提供第一偏置电压。
  10. 根据权利要求1-9任一项所述的放大器，其特征在于，所述放大器还包括第二偏置电压产生电路，所述第二偏置电压产生电路的输出端与所述第二可调偏置电压端耦合，用于为所述第二可调偏置电压端提供第二偏置电压。
  11. 根据权利要求1-10任一项所述的放大器，其特征在于，所述放大器还包括反馈电路，所述反馈电路分别与所述信号输入端和所述信号输出端耦合，用于对经所述第一放大电路和所述第二放大电路放大后的信号进行反馈。
  12. 根据权利要求11所述的放大器，其特征在于，所述反馈电路包括串联的反馈电容和反馈电阻。
  13. 一种电子设备，其特征在于，包括第四负载、处理器如权利要求1-12任一项所述的放大器；
    所述第四负载与所述放大器的信号输出端耦合，所述处理器与所述放大器耦合。
  14. 一种放大器的控制方法，其特征在于，所述放大器包括：第一放大电路、第二放大电路、第一二极管、第一可调偏置电压端、第一负载、节点、信号输入端、信号输出端、电源电压端、第二可调偏置电压端和接地端；
    所述第一放大电路的输入端与所述信号输入端和所述第一可调偏置电压端均耦合，所述第一可调偏置电压端为所述第一放大电路提供可调的第一偏置电压；所述第一放大电路的输出端与所述第二放大电路的输入端耦合，所述第二放大电路的输出端与所述第一负载的一端和所述信号输出端均耦合；所述第一放大电路的一端还与所述接地端耦合；所述第二放大电路的控制端与所述第二可调偏置电压端耦合，所述第二可调偏置电压端为所述第二放大电路提供可调的第二偏置电压；其中，所述第一放大电路的输入端接收所述信号输入端提供的射频信号，所述第一放大电路将所述射频信号放大后输出给所述第二放大电路的输入端，所述第二放大电路的输入端接收所述第一放大电路的输出端输出的信号，所述第二放大电路将所述信号放大后提供给所述信号输出端；
    所述第一放大电路的输出端和所述第二放大电路的输入端耦合于所述节点，所述第一二极管的正极与所述节点耦合，所述第一二极管的负极与所述接地端耦合；
    所述第一负载的另一端与所述电源电压端耦合；
    所述控制方法包括：
    所述第一可调偏置电压端接收第一偏置电压，以使所述第一放大电路在饱和区工作；
    所述第二可调偏置电压端接收第二偏置电压；其中，所述第一偏置电压用于使所述第一放大电路工作在所述饱和区的三阶跨导系数为第一三阶跨导系数；所述第二偏置电压用于使所述第一二极管工作在饱和区的三阶跨导系数为第二三阶跨导系数，所述第一三阶跨导系数和所述第二三阶跨导系数中一个为正数，一个为负数。
  15. 根据权利要求14所述的控制方法，其特征在于，所述放大器还包括：第二负载，所述第二负载和所述第一二极管串联在所述节点和所述接地端之间；其中，所述第二负载为可变电阻；
    所述第二偏置电压用于使所述第一二级管和所述第二负载工作在所述饱和区的三阶跨导系数为所述第二三阶跨导系数。
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