WO2023087885A1 - 一种磁传感器及其制作方法 - Google Patents
一种磁传感器及其制作方法 Download PDFInfo
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- WO2023087885A1 WO2023087885A1 PCT/CN2022/119595 CN2022119595W WO2023087885A1 WO 2023087885 A1 WO2023087885 A1 WO 2023087885A1 CN 2022119595 W CN2022119595 W CN 2022119595W WO 2023087885 A1 WO2023087885 A1 WO 2023087885A1
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Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
- G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
- G01D5/16—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying resistance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
Definitions
- the present application relates to the technical field of magnetic sensors, in particular to a magnetic sensor and a manufacturing method thereof.
- the magnetic sensor is basically prepared by using the Tunneling Magnetoresistance (TMR) effect of the Magnetic Tunneling Junction (MTJ), and it is set in the form of a Wheatstone bridge (full bridge or half bridge). To improve the sensitivity of the induced magnetic field.
- TMR Tunneling Magnetoresistance
- MTJ Magnetic Tunneling Junction
- MTJ devices with a specific resistance-magnetic field change mode need to be prepared first, and then multiple identical MTJ devices are connected in series to form a single arm of a Wheatstone bridge. Because the working principle of the Wheatstone bridge requires that the output signals of devices with different bridge arms change in opposite directions with the external magnetic field. In order to realize the form of a full bridge or a half bridge, it is necessary to simultaneously obtain MTJ devices with opposite resistance-magnetic field change modes and integrate them together to form different single arms of the Wheatstone bridge.
- the current process can only produce MTJ devices with the same output signal change trend, and it is necessary to package two chips at the same time and special wiring to form a Wheatstone half-bridge or full-bridge, resulting in a larger area of the magnetic sensor.
- the other is to grow the same MTJ device with only one MTJ growth process, and the MTJ devices in different regions of the chip are magnetized and annealed in the magnetic field in the opposite direction at the same time to obtain the MTJ device with the opposite characteristics, resulting in the area of the magnetic sensor Larger, and it is difficult to precisely control the range of the magnetic field.
- the purpose of this application is to provide a magnetic sensor and its manufacturing method, so as to reduce the area of the magnetic sensor and simplify the manufacturing process.
- the application provides a magnetic sensor, including a chip provided with a bottom electrode, and a device group disposed on the chip, the device group comprising:
- a double magnetic tunnel junction electrically connected to the bottom electrode the double magnetic tunnel junction includes a first magnetic tunnel junction device and a second magnetic tunnel junction device stacked from bottom to top, and the width of the first magnetic tunnel junction device is greater than The width of the second magnetic tunnel junction device, and the directions of the magnetic moments of the reference layer in the first magnetic tunnel junction device and the second magnetic tunnel junction device are parallel and opposite;
- a top electrode disposed above the second magnetic tunnel junction device
- a signal lead-out part connected to the free layer in the double magnetic tunnel junction.
- the long axis directions of the first magnetic tunnel junction device and the second magnetic tunnel junction device are the same.
- the shapes of the first magnetic tunnel junction device and the second magnetic tunnel junction device are elliptical cylinders.
- it further includes a first mask layer disposed on the upper surface of the second magnetic tunnel junction device.
- a first insulating layer disposed around the second magnetic tunnel junction device and flush with the upper surface of the first mask layer is further included, and the signal lead-out portion penetrates through the first insulating layer.
- the second insulating layer is arranged on the side of the first magnetic tunnel junction device and the first insulating layer.
- the first insulating layer includes:
- the second insulating unit layer is arranged on the outer surface of the first insulating unit layer.
- the material of the first mask layer is any one of tantalum, tantalum nitride and titanium nitride.
- the material of the bottom electrode is tantalum nitride or titanium nitride.
- a plurality of the device groups form a Wheatstone half bridge, and a first preset number of the first magnetic tunnel junction devices in the Wheatstone half bridge are connected in series A second preset number of the second magnetic tunnel junction devices is connected in series, and the first preset number and the second preset number are both smaller than the number of the device groups.
- a plurality of the device groups form a Wheatstone full bridge
- the Wheatstone full bridge includes a parallel first half bridge and a second half bridge, and the first A third preset number of the first magnetic tunnel junction devices in the half bridge and the second half bridge are connected in series, and a fourth preset number of the second magnetic tunnel junction devices are connected in series.
- the present application also provides a method for manufacturing a magnetic sensor, including:
- a double magnetic tunnel junction to be processed is prepared on the upper surface of the bottom electrode, and the double magnetic tunnel junction to be processed includes a first magnetic tunnel junction device to be processed and a second magnetic tunnel junction device to be processed stacked from bottom to top;
- the width of the first magnetic tunnel junction device is greater than the width of the second magnetic tunnel junction device
- the first magnetic tunnel junction device or the second magnetic tunnel junction device is magnetized by using a second magnetic field that is opposite to the first magnetic field and has different magnitudes, so that the device magnetized by the second magnetic field
- the magnetic moment direction of the reference layer is parallel and opposite to that of the reference layer of the device not magnetized by the second magnetic field, resulting in a magnetic sensor.
- the etching depth of the free layer is between 1 nanometer and 2 nanometers.
- the etching the first magnetic tunnel junction device to be processed and the second magnetic tunnel junction device to be processed includes:
- Dry etching is used to etch the first magnetic tunnel junction device to be processed and the second magnetic tunnel junction device to be processed.
- a magnetic sensor provided by the present application includes a chip provided with a bottom electrode, and a device group arranged on the chip, the device group includes: a double magnetic tunnel junction electrically connected to the bottom electrode, the The double magnetic tunnel junction includes a first magnetic tunnel junction device and a second magnetic tunnel junction device stacked from bottom to top, the width of the first magnetic tunnel junction device is greater than the width of the second magnetic tunnel junction device, and the first magnetic tunnel junction device A magnetic tunnel junction device and the magnetic moment direction of the reference layer in the second magnetic tunnel junction device are parallel and opposite; the top electrode arranged above the second magnetic tunnel junction device; and the free magnetic tunnel junction in the double magnetic tunnel junction The signal lead-out part of the layer connection.
- the device group in the magnetic sensor of the present application is arranged on the chip, and the double magnetic tunnel junction in the device group includes a first magnetic tunnel junction device and a second magnetic tunnel junction device, and the width of the first magnetic tunnel junction device is larger than that of the second magnetic tunnel junction device.
- the width of the tunnel junction device, and the magnetic moment directions of the reference layer in the first magnetic tunnel junction device and the second magnetic tunnel junction device are parallel and opposite, so that the resistance of the first magnetic tunnel junction device and the second magnetic tunnel junction device is The change of resistance under the same magnetic field is opposite, that is, the double magnetic tunnel junction can directly form a Wheatstone half bridge on the chip, without the need to package multiple chips, the chip can be directly used as a chip of a magnetic sensor, and the first magnetic tunnel junction
- the device and the second magnetic tunnel junction device are stacked vertically to reduce the occupied area on the chip, thereby reducing the area of the magnetic sensor; MTJ devices with different resistance characteristics are set at different positions to simplify the process flow.
- the present application also provides a method for manufacturing a magnetic sensor with the above-mentioned advantages.
- FIG. 1 is a schematic structural diagram of a magnetic sensor provided in an embodiment of the present application.
- Fig. 2 is a schematic diagram of the relationship between the chip and the z-axis in the embodiment of the present application;
- FIG. 3 is a schematic diagram of resistance changes of the first magnetic tunnel junction device and the second magnetic tunnel junction device under the action of a magnetic field in the embodiment of the present application;
- FIG. 4 is a schematic structural diagram of a Wheatstone half-bridge in a magnetic sensor provided by an embodiment of the present application.
- FIG. 5 is a flow chart of a method for manufacturing a magnetic sensor provided in an embodiment of the present application.
- 6 to 16 are flow charts of a manufacturing process of a magnetic sensor provided in the embodiment of the present application.
- FIG. 17 is a schematic diagram of two Wheatstone half bridges connected in parallel to form a Wheatstone full bridge.
- two MTJ devices with different resistance characteristics are prepared on two chips respectively, and the two chips are Packaging results in a larger area of the magnetic sensor; when preparing MTJ devices with different resistance characteristics on the same chip, it is necessary to design two MTJ growth processes to obtain MTJ devices with opposite characteristics, and the process steps are more and more complicated, or, Using an MTJ growth process to grow the same MTJ device in different regions of the chip, and then form MTJ devices with opposite characteristics through processing, resulting in a large area of the magnetic sensor and it is difficult to precisely control the magnetic field range.
- the present application provides a magnetic sensor, please refer to FIG. 1 , including a chip provided with a bottom electrode 1, and a device group disposed on the chip, the device group comprising:
- a double magnetic tunnel junction electrically connected to the bottom electrode 1, the double magnetic tunnel junction includes a first magnetic tunnel junction device 2 and a second magnetic tunnel junction device 3 stacked from bottom to top, the first magnetic tunnel junction device The width of 2 is greater than the width of the second magnetic tunnel junction device 3, and the magnetic moment directions of the reference layers in the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are parallel and opposite;
- top electrode 7 disposed above the second magnetic tunnel junction device 3;
- the signal lead-out part 8 connected with the free layer 26 in the double magnetic tunnel junction.
- the magnetic sensor further includes a first mask layer 4 disposed on the upper surface of the second magnetic tunnel junction device 3.
- the first insulating layer 5 is disposed around the second magnetic tunnel junction device 3 and is flush with the upper surface of the first mask layer 4 , and the signal lead-out portion 8 penetrates through the first insulating layer 5 .
- the second insulating layer 6 disposed on the side of the first magnetic tunnel junction device 2 and the first insulating layer 5 .
- the first magnetic tunnel junction device 2 includes a seed layer 21, a first pinning layer 22, a first coupling layer 23, a first reference layer 24, a first barrier layer 25, and a free layer 26 stacked sequentially from bottom to top.
- the two magnetic tunnel junction devices 3 include a free layer 26, a second barrier layer 31, a second reference layer 32, a second coupling layer 33, a second pinning layer 34 and a cover layer 35 stacked sequentially from bottom to top, and the first magnetic tunnel junction The junction device 2 and the second magnetic tunnel junction device 3 share the free layer 26 .
- the first magnetic tunnel junction device 2 is electrically connected to the bottom electrode 1 .
- the material of the seed layer 21 includes but not limited to ruthenium, platinum, and nickel-chromium alloy; the first pinning layer 22 and the second pinning layer 34 can be cobalt-iron-boron alloys, cobalt, and cobalt/platinum multilayer films of different compositions.
- the first coupling layer 23 and the second coupling layer 33 materials include but not limited to ruthenium, iridium, rhodium; the materials of the first barrier layer 25 and the second barrier layer 31 can be magnesium oxide, aluminum oxide, gallium magnesium oxide, etc.; the first reference layer 24 and the second reference layer
- the material of layer 32 can be cobalt-iron-boron alloys of different compositions; the material of free layer 26 can be cobalt-iron-boron alloys of different compositions and related materials, and the thickness of free layer 26 is between 2 nanometers and 5 nanometers; the material of covering layer 35 It can be magnesium oxide, tantalum, tungsten, molybdenum, cobalt-iron-boron alloy with different components, ruthenium, ruthenium/tantalum multilayer film, etc
- the thickness of the first barrier layer 25 and the second barrier layer 31 is determined by the width of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 and the required resistance of the single arm of the Wheatstone bridge. Generally, the first The thickness of the barrier layer 25 and the second barrier layer 31 is between 1 nanometer and 3 nanometers.
- the free layer 26 has in-plane magnetic anisotropy
- the first coupling layer 23, the second coupling layer 33, the first barrier layer 25, the second barrier layer 31, the seed layer 21 and the covering layer 35 have no magnetic properties
- the second coupling layer 23 has no magnetic properties.
- a pinned layer 22, a second pinned layer 34, a first reference layer 24, and a second reference layer 32 have out-of-plane magnetic anisotropy.
- the directions of the magnetic moments of the first pinned layer 22 and the second pinned layer 34 are opposite, which can be achieved by applying magnetic fields of different magnitudes and opposite directions but perpendicular to the plane of the chip for magnetization.
- the first reference layer 24 Due to interlayer coupling, the first reference layer 24
- the directions of the magnetic moments of the second reference layer 32 and the first pinned layer 22 and the second pinned layer 34 are respectively opposite, so the directions of the magnetic moments of the first reference layer 24 and the second reference layer 32 are also opposite.
- the magnetic moment directions of the reference layers in the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are parallel and opposite, that is, the magnetic moment directions of the first reference layer 24 and the second reference layer 32 are parallel and opposite, so that the first The magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 have opposite resistance changes under the same magnetic field.
- the z axis is perpendicular to the chip surface, when the magnetic field direction is -z, the magnetic moment direction of each layer with magnetism in the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 is shown in the figure 3, at this time, the magnetic moment of the free layer 26 of the first magnetic tunnel junction is parallel to the magnetic moment of the first reference layer 24, showing a low resistance value, and the magnetic moment of the free layer 26 of the second magnetic tunnel junction
- the magnetic moment of the second reference layer 32 is in an antiparallel state, showing a high resistance value; when the direction of the magnetic field is turned to +z, the magnetic properties of each layer with magnetism in the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3
- the moment direction is shown in the right figure in Figure 3.
- the resistance value of the first magnetic tunnel junction changes to a high resistance value
- the resistance value of the second magnetic tunnel junction changes to a low resistance value, thus realizing the same structure.
- Two opposite resistance-magnetic field response modes, and a half-bridge structure of a Wheatstone bridge is realized in situ.
- the magnetic sensor can sense a magnetic field in the z direction, that is, a direction perpendicular to the upper surface of the chip.
- the reason why the width of the first magnetic tunnel junction device 2 is larger than that of the second magnetic tunnel junction device 3 is that the signal of the magnetic sensor needs to be drawn out from the middle free layer 26 , and the signal lead-out part 8 leads out the signal from the free layer 26 .
- the shapes of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are not limited, and they can be set by themselves.
- the long axis directions of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are the same.
- the shapes of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 may be cylindrical or elliptical.
- the width of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 is the diameter.
- the width of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 is the long axis or the short axis.
- the major axis width of the elliptical cylinder is generally between 1 micron and 20 microns, and the minor axis width is generally 0.1 micron to 10 microns.
- the shape of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 is an elliptical cylinder, and the long axis direction of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 same.
- the long axis directions of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are both parallel to the y-axis, or both are parallel to the x-axis.
- the absolute value of the width of the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 is determined by the resistance value required by the Wheatstone bridge, and the width difference is determined by the width (diameter) of the signal lead-out part 8 .
- the first mask layer 4 is a conductive film layer, and the material of the first mask layer 4 may be any one of tantalum, tantalum nitride, and titanium nitride.
- the material of the bottom electrode 1 can be tantalum nitride or titanium nitride, etc.
- the material of the top electrode 7 can also be tantalum nitride, titanium nitride, etc.
- the first insulating layer 5 includes:
- the second insulating unit layer 52 is disposed on the outer surface of the first insulating unit layer 51 .
- the first insulating unit layer 51 plays a protective role, the material may be silicon nitride, and the thickness may be 5 nanometers to 20 nanometers.
- the second insulating unit layer 52 is an oxide insulating layer, such as silicon dioxide, silicon oxynitride, and the like.
- the material of the second insulating layer 6 can be silicon nitride, and the material of the signal lead-out part 8 can be a metal material, such as cobalt, ruthenium, copper, tungsten and the like.
- the device group is arranged on the chip, and the double magnetic tunnel junction in the device group includes a first magnetic tunnel junction device 2 and a second magnetic tunnel junction device 3, and the width of the first magnetic tunnel junction device 2 is greater than that of the second magnetic tunnel junction device.
- the width of the magnetic tunnel junction device 3, and the magnetic moment directions of the reference layer in the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are parallel and opposite, so that the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device.
- the resistance of the junction device 3 changes oppositely under the action of the same magnetic field, that is, the double magnetic tunnel junction can directly form a Wheatstone half-bridge on the chip, without the need to package multiple chips, and the chip can be directly used as a chip of a magnetic sensor.
- first magnetic tunnel junction device 2 and the second magnetic tunnel junction device 3 are vertically stacked, reducing the occupied area on the chip, thereby reducing the area of the magnetic sensor; the first magnetic tunnel junction device 2 and the second magnetic tunnel junction device
- the junction devices 3 are vertically stacked, avoiding setting MTJ devices with different resistance characteristics at different positions of the chip, and simplifying the process flow.
- the multiple device groups form a Wheatstone half bridge, and the first Wheatstone half bridge in the Wheatstone half bridge A preset number of the first magnetic tunnel junction devices 2 are connected in series, a second preset number of the second magnetic tunnel junction devices 3 are connected in series, the first preset number and the second preset number are less than the set The number of device groups described above.
- a plurality of first magnetic tunnel junction devices 2 can be connected in series through preset metal wiring, and a plurality of second magnetic tunnel junction devices 3 can be connected in series.
- the formed Wheatstone half bridge is shown in the figure 4, from the left, the second magnetic tunnel junction device 3 in the three device groups on the left is connected in series; The signal lead-out part 8 in the output.
- the multiple device groups form a Wheatstone full bridge
- the Wheatstone full bridge includes a parallel connection of the first The half bridge and the second half bridge
- the third preset number of the first magnetic tunnel junction devices 2 in the first half bridge and the second half bridge are connected in series
- the fourth preset number of the second The magnetic tunnel junction devices 3 are connected in series.
- first half bridge and the second half bridge can refer to Figure 4. It should be noted that when the first half bridge and the second half bridge are connected in parallel, the first half bridge and the second half bridge are generally connected head to tail connected in parallel, as shown in Figure 17.
- the present application also provides a method for manufacturing a magnetic sensor, please refer to FIG. 5, the method includes:
- Step S101 forming a bottom electrode on the chip.
- Step S102 preparing a double magnetic tunnel junction to be processed on the upper surface of the bottom electrode, the double magnetic tunnel junction to be processed includes a first magnetic tunnel junction device to be processed and a second magnetic tunnel junction device to be processed stacked from bottom to top.
- the first magnetic tunnel junction device 2' to be processed and the second magnetic tunnel junction device 3' to be processed are stacked above the bottom electrode 1.
- the first magnetic tunnel junction device 2' to be processed includes a seed layer, a first pinning layer, a first coupling layer, a first reference layer, a first barrier layer, and a free layer stacked sequentially from bottom to top.
- the magnetic tunnel junction device 3' includes a free layer, a second barrier layer, a second reference layer, a second coupling layer, a second pinning layer and a cover layer stacked sequentially from bottom to top, and the first magnetic tunnel junction device 2' and the second The two magnetic tunnel junction devices 3' share the free layer.
- the first magnetic tunnel junction device 2' to be processed is electrically connected to the bottom electrode.
- Step S103 Etching the to-be-processed first magnetic tunnel junction device and the to-be-processed second magnetic tunnel junction device to form a first magnetic tunnel junction device and a second magnetic tunnel junction device, and the first magnetic tunnel junction device The width of is greater than the width of the second magnetic tunnel junction device.
- Step S1031 Form a first mask layer to be processed on the upper surface of the second magnetic tunnel junction device to be processed, and then etch the first mask layer to be processed to form a first mask layer 4 with a width of D2, as shown in Figure 7
- the etching method can be dry etching, such as reactive ion etching, ion beam etching.
- Step S1032 using the first mask layer as a mask, etching the second magnetic tunnel junction device to be processed to the free layer in the double magnetic tunnel junction to be processed to obtain a second magnetic tunnel junction device.
- the etching method of etching the second magnetic tunnel junction device to be processed is not limited, and it depends on the situation, such as dry etching or wet etching.
- the position of the etching stop is not specifically limited in this application.
- the position of the etching stop can be the second between the free layer and the second magnetic tunnel junction device to be processed.
- the interface of the barrier layer, or the free layer is etched beyond the interface, and the etching depth of the free layer is between 1 nanometer and 2 nanometers.
- FIG. 8 a schematic structural diagram of the second magnetic tunnel junction device 3 obtained after etching is shown in FIG. 8 .
- Step S1033 Form a first insulating unit layer 51 on the upper surface of the first magnetic tunnel junction device to be processed and around the second magnetic tunnel junction device.
- the thickness of the first insulating unit layer 21 may be between 5 nanometers and between 20 nanometers.
- Step S1034 forming the second insulating unit layer 52 on the outer surface of the first insulating unit layer 51, as shown in FIG. 10 .
- Step S1035 Use chemical mechanical polishing to polish the surface until the surface of the first mask layer is exposed, as shown in FIG. 11 .
- Step S1036 Form a second mask layer on the upper surface of the first mask layer, the width of the second hard mask layer is greater than the width of the second magnetic tunnel junction device, and then perform photolithography and etching.
- the etching method can be reaction Ion etching, or ion beam etching, forms the second mask layer 9 with a width D1, D1>D2, and larger than the diameter of the bottom electrode. Please refer to FIG. 12 for a schematic diagram after forming the second mask layer.
- Step S1037 Using the second mask layer as a mask, etch the first insulating layer and the first magnetic tunnel junction device to be processed to form a first magnetic tunnel junction device, as shown in Figure 13 .
- Etching the first insulating layer and the first magnetic tunnel junction device to be processed includes:
- the first insulating layer and the first magnetic tunnel junction device to be processed are etched by dry etching to form the first magnetic tunnel junction device.
- the dry etching method may be ion beam etching, reactive ion etching, or the like.
- Step S1038 Form the second insulating layer 6' to be processed on the upper surface of the second mask layer, the first magnetic tunnel junction device and the side of the first insulating layer. Please refer to FIG. 14. It should be noted that the second insulating layer to be processed The outer surface of layer 6' is also formed with an interlayer oxide insulating layer, not shown in FIG. 14 .
- Step S1039 Polishing the upper surface of the second mask layer 9 and the second insulating layer 6' to be processed by chemical mechanical planarization until the upper surface of the first hard mask layer is exposed to form a second insulating layer, as shown in FIG. 15 .
- Step S104 preparing a top electrode above the second magnetic tunnel junction device.
- the top electrode 7 is located on the upper surface of the first mask layer.
- Step S105 preparing a signal lead-out portion connected to the free layer in the double magnetic tunnel junction.
- the method for preparing the through hole can be the Damascene method, and finally use the chemical mechanical planarization method to smooth the upper surface of the top electrode. This step Please refer to Figure 1 for the schematic diagram of the obtained structure.
- Step S106 Using a first magnetic field to magnetize the first magnetic tunnel junction device and the second magnetic tunnel junction device, so that the magnetic field of the reference layer in the first magnetic tunnel junction device and the second magnetic tunnel junction device The directions of the moments are parallel and identical.
- Step S107 Magnetize the first magnetic tunnel junction device or the second magnetic tunnel junction device by using a second magnetic field opposite in direction to the first magnetic field and different in size, so that the magnetic tunnel junction device magnetized by the second magnetic field
- the magnetic moment direction of the reference layer of the device is parallel to and opposite to that of the reference layer of the device not magnetized by the second magnetic field, thereby obtaining a magnetic sensor.
- the MTJ devices in different regions of the chip are magnetized or annealed in the magnetic field in the opposite direction to obtain MTJ devices with opposite characteristics, and the range of the magnetic field is difficult to accurately control.
- two magnetic fields with opposite directions and different sizes are used. All devices on the chip are magnetized twice to obtain the first magnetic tunnel junction device and the second magnetic tunnel junction device with opposite characteristics, which is very simple and convenient, and can also reduce the area of the magnetic sensor.
- one device group is taken as an example for illustration.
- multiple device groups can be formed into Wheatstone half-bridge and full-bridge forms by setting wiring.
- each embodiment in this specification is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same or similar parts of each embodiment can be referred to each other.
- the description is relatively simple, and for the related part, please refer to the description of the method part.
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Abstract
一种磁传感器及其制作方法，包括设有底电极（1）的芯片，和设于芯片上的器件组，器件组包括：与底电极（1）电连接的双磁隧道结，双磁隧道结包括由下至上堆叠的第一磁隧道结器件（2）和第二磁隧道结器件（3），第一磁隧道结器件（2）的宽度大于第二磁隧道结器件（3）的宽度，且第一磁隧道结器件（2）和第二磁隧道结器件（3）中参考层的磁矩方向平行且相反；设于第二磁隧道结器件（3）上方的顶电极（7）；与双磁隧道结中的自由层（26）连接的信号引出部（8）。可以直接在芯片上形成惠斯通半桥，不需进行多个芯片的封装，可以减小磁传感器面积，简化工艺流程。
Description
本申请要求于2021年11月22日提交中国专利局、申请号为202111385063.X、发明名称为“一种磁传感器及其制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本申请涉及磁传感器技术领域，特别是涉及一种磁传感器及其制作方法。
目前，磁传感器基本上利用磁隧道结(Magnetic Tunneling Junction，MTJ)的隧穿磁阻效应(Tunneling Magnetoresistance，TMR)制备，并将其设置成惠斯通电桥(全桥或者半桥)的形式，以提高感应磁场的灵敏度。
现有的磁传感器在制备时需要先制备具有特定的电阻-磁场变化模式的MTJ器件，然后通过串联多个相同的MTJ器件以形成惠斯通电桥的单臂。由于惠斯通电桥的工作原理要求不同桥臂的器件输出信号随着外磁场变化趋势要相反。为了实现全桥或者半桥的形式，需要同时得到具有相反的电阻-磁场变化模式的MTJ器件并集成到一起，以形成惠斯通电桥的不同单臂。但是目前一次工艺流程只能制备输出信号变化趋势相同的MTJ器件，需要后续通过同时封装两个芯片以及特殊接线来形成惠斯通半桥或者全桥，导致磁传感器的面积较大。当将输出信号变化趋势相反的MTJ器件设在一个芯片上时有两种方式，一种是设计两道MTJ生长工艺，在芯片的不同位置沉积MTJ器件，得到相反特性的MTJ器件，工艺步骤较多、比较复杂；另一种是仅用一道MTJ生长工艺生长相同的MTJ器件，针对芯片不同区域的MTJ器件在相反方向的磁场中磁化同时退火以得到相反特性的MTJ器件，导致磁传感器的面积较大，且难以精确控制磁场范围。
因此，如何解决上述技术问题应是本领域技术人员重点关注的。
发明内容
本申请的目的是提供一种磁传感器及其制作方法，以减小磁传感器的面积，并简化制作工艺。
为解决上述技术问题，本申请提供一种磁传感器，包括设有底电极的芯片，和设于所述芯片上的器件组，所述器件组包括：
与所述底电极电连接的双磁隧道结，所述双磁隧道结包括由下至上堆叠的第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度，且所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相反；
设于所述第二磁隧道结器件上方的顶电极；
与所述双磁隧道结中的自由层连接的信号引出部。
可选的，所述第一磁隧道结器件和所述第二磁隧道结器件的长轴方向相同。
可选的，所述第一磁隧道结器件和所述第二磁隧道结器件的形状为椭圆柱。
可选的，还包括，设于所述第二磁隧道结器件上表面的第一掩膜层。
可选的，还包括，设于所述第二磁隧道结器件周围且与所述第一掩膜层上表面齐平的第一绝缘层，所述信号引出部贯穿所述第一绝缘层。
可选的，还包括：
设于所述第一磁隧道结器件和所述第一绝缘层侧面的第二绝缘层。
可选的，所述第一绝缘层包括：
设于所述第二磁隧道结器件周围的第一绝缘单元层；
设于所述第一绝缘单元层外表面的第二绝缘单元层。
可选的，所述第一掩膜层的材料为钽、氮化钽、氮化钛中的任一种。
可选的，所述底电极的材料为氮化钽或者氮化钛。
可选的，当所述器件组的数量为多个时，多个所述器件组形成惠斯通半桥，惠斯通半桥中第一预设数量个所述第一磁隧道结器件串联，第二预设数量个所述第二磁隧道结器件串联，所述第一预设数量和所述第二预设数量均小于所述器件组的数量。
可选的，所述器件组的数量为多个时，多个所述器件组形成惠斯通全桥，惠斯通全桥包括并联的第一半桥和第二半桥，所述第一半桥和所述第二半桥中第三预设数量个所述第一磁隧道结器件串联，第四预设数量个所述第二磁隧道结器件串联。
本申请还提供一种磁传感器制作方法，包括：
在芯片上形成底电极；
在所述底电极上表面制备待处理双磁隧道结，所述待处理双磁隧道结包括由下至上堆叠的待处理第一磁隧道结器件和待处理第二磁隧道结器件；
刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件，形成第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度；
在所述第二磁隧道结器件上方制备顶电极；
制备与所述双磁隧道结中的自由层连接的信号引出部；
使用第一磁场对所述第一磁隧道结器件和第二磁隧道结器件进行磁化处理，使所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相同；
使用与所述第一磁场方向相反、大小不等的第二磁场对所述第一磁隧道结器件或所述第二磁隧道结器件进行磁化处理，使被所述第二磁场磁化的器件的参考层的磁矩方向与未被所述第二磁场磁化的器件的参考层的磁矩方向平行且相反，得到磁传感器。
可选的，刻蚀所述待处理第二磁隧道结器件时，所述自由层的刻蚀深度在1纳米～2纳米之间。
可选的，所述刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件包括：
采用干法刻蚀方式，刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件。
本申请所提供的一种磁传感器，包括设有底电极的芯片，和设于所述芯片上的器件组，所述器件组包括：与所述底电极电连接的双磁隧道结， 所述双磁隧道结包括由下至上堆叠的第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度，且所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相反；设于所述第二磁隧道结器件上方的顶电极；与所述双磁隧道结中的自由层连接的信号引出部。
可见，本申请的磁传感器中器件组设置在芯片上，器件组中的双磁隧道结包括第一磁隧道结器件和第二磁隧道结器件，第一磁隧道结器件的宽度大于第二磁隧道结器件的宽度，且第一磁隧道结器件和第二磁隧道结器件中参考层的磁矩方向平行且相反，使得第一磁隧道结器件和所述第二磁隧道结器件的电阻在相同磁场作用下电阻的变化相反，即双磁隧道结可以直接在芯片上形成惠斯通半桥，不需进行多个芯片的封装，芯片可以直接作为磁传感器的芯片，且第一磁隧道结器件和第二磁隧道结器件在垂直上堆叠，减小在芯片上所占面积，从而减小磁传感器的面积；第一磁隧道结器件和第二磁隧道结器件垂直堆叠，避免在芯片不同位置设置不同电阻特性的MTJ器件，简化工艺流程。
此外，本申请还提供一种具有上述优点的磁传感器制作方法。
为了更清楚的说明本申请实施例或现有技术的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例所提供的一种磁传感器的结构示意图；
图2为本申请实施例中芯片与z轴的关系示意图；
图3为本申请实施例中第一磁隧道结器件和第二磁隧道结器件在磁场作用下电阻变化示意图；
图4为本申请实施例所提供的一种磁传感器中惠斯通半桥的结构示意图；
图5为本申请实施例所提供的一种磁传感器制作方法的流程图；
图6至图16为本申请实施例所提供的一种磁传感器制作工艺流程图；
图17为两个惠斯通半桥并联形成惠斯通全桥的示意图。
为了使本技术领域的人员更好地理解本申请方案，下面结合附图和具体实施方式对本申请作进一步的详细说明。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在下面的描述中阐述了很多具体细节以便于充分理解本发明，但是本发明还可以采用其他不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本发明内涵的情况下做类似推广，因此本发明不受下面公开的具体实施例的限制。
正如背景技术部分所述，目前的磁传感器在制作时为了得到具有相反的电阻-磁场变化模式的MTJ器件，将两种不同电阻特性的MTJ器件分别在两块芯片上制备，并将两块芯片进行封装，导致磁传感器的面积较大；当在同一块芯片上制备不同电阻特性的MTJ器件时，需要设计两道MTJ生长工艺得到相反特性的MTJ器件，工艺步骤较多、比较复杂，或者，用一道MTJ生长工艺在芯片不同区域生长相同的MTJ器件，再通过处理形成相反特性的MTJ器件，导致磁传感器的面积较大，且难以精确控制磁场范围。
有鉴于此，本申请提供了一种磁传感器，请参考图1，包括设有底电极1的芯片，和设于所述芯片上的器件组，所述器件组包括：
与所述底电极1电连接的双磁隧道结，所述双磁隧道结包括由下至上堆叠的第一磁隧道结器件2和第二磁隧道结器件3，所述第一磁隧道结器件2的宽度大于所述第二磁隧道结器件3的宽度，且所述第一磁隧道结器件2和所述第二磁隧道结器件3中参考层的磁矩方向平行且相反；
设于所述第二磁隧道结器件3上方的顶电极7；
与所述双磁隧道结中的自由层26连接的信号引出部8。
可选的，磁传感器还包括设于所述第二磁隧道结器件3上表面的第一掩 膜层4。
设于所述第二磁隧道结器件3周围且与所述第一掩膜层4上表面齐平的第一绝缘层5，所述信号引出部8贯穿所述第一绝缘层5。
设于所述第一磁隧道结器件2和所述第一绝缘层5侧面的第二绝缘层6。
第一磁隧道结器件2包括由下至上依次层叠的晶种层21、第一钉扎层22、第一耦合层23、第一参考层24、第一势垒层25、自由层26，第二磁隧道结器件3包括由下至上依次层叠自由层26、第二势垒层31、第二参考层32、第二耦合层33、第二钉扎层34和覆盖层35，第一磁隧道结器件2和第二磁隧道结器件3共用自由层26。第一磁隧道结器件2与底电极1电连接。
晶种层21的材料包括但不限于钌、铂、镍铬合金；第一钉扎层22和第二钉扎层34可以为不同组分的钴铁硼合金、钴、钴/铂多层膜、钴/镍多层膜等，其中，当为多层膜结构时，第一钉扎层22和第二钉扎层34中重复次数可以不同或者相同；第一耦合层23和第二耦合层33的材料包括但不限于钌、铱、铑；第一势垒层25和第二势垒层31的材料可以为氧化镁、氧化铝、氧化镓镁等；第一参考层24和第二参考层32的材料可以为不同成分的钴铁硼合金；自由层26材料可以是不同组分的钴铁硼合金及相关材料，自由层26厚度在2纳米～5纳米之间；覆盖层35的材料可以为氧化镁、钽、钨、钼、不同组分的钴铁硼合金、钌、钌/钽多层膜等。第一势垒层25和第二势垒层31的厚度由第一磁隧道结器件2和第二磁隧道结器件3的宽度和惠斯通电桥单臂所需电阻决定，一般的，第一势垒层25和第二势垒层31的厚度在1纳米～3纳米之间。
自由层26具有面内的磁各向异性，第一耦合层23、第二耦合层33、第一势垒层25、第二势垒层31、晶种层21和覆盖层35没有磁性，第一钉扎层22、第二钉扎层34、第一参考层24和第二参考层32具有面外的磁各向异性。第一钉扎层22和第二钉扎层34的磁矩方向相反，可以通过施加大小不同、方向相反但垂直于芯片平面的磁场进行磁化来实现，由于层间耦合作用，第一参考层24和第二参考层32的磁矩方向分别与第一钉扎层22和第二钉扎层34相反，所以第一参考层24和第二参考层32的磁矩方向也相反。
第一磁隧道结器件2和第二磁隧道结器件3中参考层的磁矩方向平行且 相反，即第一参考层24与第二参考层32的磁矩方向平行且相反，从而使得第一磁隧道结器件2和第二磁隧道结器件3在相同磁场作用下电阻变化相反。
当第一参考层24与第二参考层32在垂直于芯片表面的磁场下翻转时，第一磁隧道结器件2和第二磁隧道结器件3的电阻与磁场的变化模式相反，从而实现惠斯通半电桥。
请参考图2和图3，z轴垂直于芯片表面，当磁场方向是-z时，第一磁隧道结器件2和第二磁隧道结器件3中具有磁性的各个层的磁矩方向如图3中左图所示，此时，第一磁隧道结的自由层26磁矩与第一参考层24磁矩处于平行状态，表现为低电阻值，第二磁隧道结的自由层26磁矩与第二参考层32磁矩处于反平行状态，表现高电阻值；当磁场方向转为+z时，第一磁隧道结器件2和第二磁隧道结器件3中具有磁性的各个层的磁矩方向如图3中右图所示，此时，第一磁隧道结的电阻值转变为高电阻值，第二磁隧道结的电阻值转变为低电阻值，从而实现了同一个结构中的两种相反的电阻-磁场响应模式，旋即原位实现了一个惠斯通电桥的半桥结构。此时磁传感器可以感应z方向的磁场，，即垂直于芯片上表面方向。
第一磁隧道结器件2的宽度大于第二磁隧道结器件3的宽度的原因是，磁传感器的信号需要从中间的自由层26引出，信号引出部8从自由层26引出信号。
需要说明的是，本申请中对第一磁隧道结器件2和第二磁隧道结器件3的形状不做限定，可自行设置。所述第一磁隧道结器件2和所述第二磁隧道结器件3的长轴方向相同。例如，第一磁隧道结器件2和第二磁隧道结器件3的形状可以为圆柱状，或者椭圆柱。当为圆柱时，第一磁隧道结器件2和第二磁隧道结器件3的宽度即为直径。当为椭圆柱时，第一磁隧道结器件2和第二磁隧道结器件3的宽度为长径或者短径。椭圆柱的长轴宽度一般在1微米～20微米之间，短轴宽度一般在0.1微米～10微米。
进一步的，所述第一磁隧道结器件2和所述第二磁隧道结器件3的形状为椭圆柱，且第一磁隧道结器件2和所述第二磁隧道结器件3的长轴方向相同。例如，第一磁隧道结器件2和所述第二磁隧道结器件3的长轴方向都与y 轴平行，或者都与x轴平行。
第一磁隧道结器件2和第二磁隧道结器件3的宽度的绝对值由惠斯通电桥所需的电阻值决定，宽度差值由信号引出部8的宽度(直径)决定。
第一掩膜层4为导电膜层，所述第一掩膜层4的材料可以为钽、氮化钽、氮化钛中的任一种等。
所述底电极1的材料可以为氮化钽或者氮化钛等等，顶电极7的材料也可以是氮化钽、氮化钛等。
其中，所述第一绝缘层5包括：
设于所述第二磁隧道结器件3周围的第一绝缘单元层51；
设于所述第一绝缘单元层51外表面的第二绝缘单元层52。
第一绝缘单元层51起到保护作用，材料可以为氮化硅，厚度可以为5纳米～20纳米。
第二绝缘单元层52为氧化物绝缘层，如二氧化硅，氮氧化硅等。
第二绝缘层6的材料可以为氮化硅，信号引出部8的材料可以为金属材料，如钴、钌、铜、钨等。
本申请的磁传感器中器件组设置在芯片上，器件组中的双磁隧道结包括第一磁隧道结器件2和第二磁隧道结器件3，第一磁隧道结器件2的宽度大于第二磁隧道结器件3的宽度，且第一磁隧道结器件2和第二磁隧道结器件3中参考层的磁矩方向平行且相反，使得第一磁隧道结器件2和所述第二磁隧道结器件3的电阻在相同磁场作用下电阻的变化相反，即双磁隧道结可以直接在芯片上形成惠斯通半桥，不需进行多个芯片的封装，芯片可以直接作为磁传感器的芯片，且第一磁隧道结器件2和第二磁隧道结器件3在垂直上堆叠，减小在芯片上所占面积，从而减小磁传感器的面积；第一磁隧道结器件2和第二磁隧道结器件3垂直堆叠，避免在芯片不同位置设置不同电阻特性的MTJ器件，简化工艺流程。
在上述实施例的基础上，在本申请的一个实施例中，当所述器件组的数量为多个时，多个所述器件组形成惠斯通半桥，惠斯通半桥中第一预设数量个所述第一磁隧道结器件2串联，第二预设数量个所述第二磁隧道结器 件3串联，所述第一预设数量和所述第二预设数量均小于所述器件组的数量。
本申请中对第一预设数量和第二预设数量不做限定，可自行设置。
可以通过预设的金属布线实现多个第一磁隧道结器件2串联，多个第二磁隧道结器件3串联，以器件组的数量为5个为例，形成的惠斯通半桥如图4所示，从左起，左边三个器件组中的第二磁隧道结器件3串联，从右起，右边三个器件组中的第一磁隧道结器件2串联，信号从中间的器件组中的信号引出部8输出。
在上述实施例的基础上，在本申请的一个实施例中，所述器件组的数量为多个时，多个所述器件组形成惠斯通全桥，惠斯通全桥包括并联的第一半桥和第二半桥，所述第一半桥和所述第二半桥中第三预设数量个所述第一磁隧道结器件2串联，第四预设数量个所述第二磁隧道结器件3串联。
本申请中对第三预设数量和第四预设数量不做限定，可自行设置。
第一半桥和第二半桥的结构示意图可以参考图4，需要注意的是，当第一半桥和第二半桥并联时，第一半桥和第二半桥总体通过头尾相接的方式并联，如图17所示。
本申请还提供一种磁传感器制作方法，请参考图5，该方法包括：
步骤S101：在芯片上形成底电极。
步骤S102：在所述底电极上表面制备待处理双磁隧道结，所述待处理双磁隧道结包括由下至上堆叠的待处理第一磁隧道结器件和待处理第二磁隧道结器件。
本步骤请参考图6，待处理第一磁隧道结器件2’和待处理第二磁隧道结器件3’堆叠在底电极1上方。
待处理第一磁隧道结器件2’包括由下至上依次层叠的晶种层、第一钉扎层、第一耦合层、第一参考层、第一势垒层、自由层，待处理第二磁隧道结器件3’包括由下至上依次层叠自由层、第二势垒层、第二参考层、第二耦合层、第二钉扎层和覆盖层，第一磁隧道结器件2’和第二磁隧道结器 件3’共用自由层。待处理第一磁隧道结器件2’与底电极电连接。
步骤S103：刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件，形成第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度。
步骤S1031：在待处理第二磁隧道结器件上表面形成待处理第一掩膜层，然后对待处理第一掩膜层进行刻蚀，形成宽度为D2的第一掩膜层4，如图7所示，刻蚀方式可以采用干法刻蚀，例如反应离子刻蚀，离子束刻蚀。
步骤S1032：以第一掩膜层作为掩膜，刻蚀待处理第二磁隧道结器件至待处理双磁隧道结中的自由层，得到第二磁隧道结器件。
本申请中对刻蚀待处理第二磁隧道结器件刻蚀方式不做限定，视情况而定，例如干法刻蚀或者湿法刻蚀。
刻蚀待处理第二磁隧道结器件至自由层时，刻蚀停止的位置本申请不做具体限定，例如，刻蚀停止的位置可以在自由层与待处理第二磁隧道结器件中第二势垒层的界面，或者，超过界面对自由层进行刻蚀，自由层的刻蚀深度在1纳米～2纳米之间。
本步骤以刻蚀超过自由层与第二势垒层的界面为例，刻蚀后得到第二磁隧道结器件3的结构示意图如图8所示。
步骤S1033：在待处理第一磁隧道结器件上表面并在第二磁隧道结器件周围形成第一绝缘单元层51，如图9所示，第一绝缘单元层21的厚度可以在5纳米～20纳米之间。
步骤S1034：在第一绝缘单元层51的外表面的第二绝缘单元层52，如图10所示。
步骤S1035：使用化学机械研磨法磨平表面，至第一掩膜层表面露出，图11所示。
步骤S1036：在第一掩膜层上表面形成第二掩膜层，第二硬掩膜层的宽度大于第二磁隧道结器件的宽度，然后进行光刻和刻蚀，刻蚀方式可以为反应离子刻蚀，或者离子束刻蚀，形成宽度为D1的第二掩膜层9，D1>D2，并且大于底电极的直径。形成第二掩膜层后的示意图请参考图12。
步骤S1037：以第二掩膜层作为掩膜，刻蚀第一绝缘层和待处理第一磁 隧道结器件，形成第一磁隧道结器件，如图13所示。
刻蚀第一绝缘层和待处理第一磁隧道结器件包括：
采用干法刻蚀方式，刻蚀第一绝缘层和待处理第一磁隧道结器件，形成第一磁隧道结器件。干法刻蚀方式可以为离子束刻蚀，或者反应离子刻蚀等等。
步骤S1038：在第二掩膜层的上表面、第一磁隧道结器件和第一绝缘层侧面形成待处理第二绝缘层6’，请参考图14，需要说明的是，待处理第二绝缘层6’的外表面还形成有层间氧化物绝缘层，图14中未示出。
步骤S1039：采用化学机械平坦法磨平第二掩膜层9和待处理第二绝缘层6’上表面，至第一硬掩模层上表面露出，形成第二绝缘层，如图15所示。
步骤S104：在所述第二磁隧道结器件上方制备顶电极。
本步骤请参考图16，顶电极7位于第一掩膜层的上表面。
步骤S105：制备与所述双磁隧道结中的自由层连接的信号引出部。
在第一绝缘层中形成贯穿的通孔，并在通孔中沉积材料形成信号引出部，制备通孔方法可以是大马士革法，最后使用化学机械平坦法磨平至顶电极上表面露出，本步骤得到的结构示意图请参考图1。
步骤S106：使用第一磁场对所述第一磁隧道结器件和第二磁隧道结器件进行磁化处理，使所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相同。
步骤S107：使用与所述第一磁场方向相反、大小不等的第二磁场对所述第一磁隧道结器件或所述第二磁隧道结器件进行磁化处理，使被所述第二磁场磁化的器件的参考层的磁矩方向与未被所述第二磁场磁化的器件的参考层的磁矩方向平行且相反，得到磁传感器。
现有技术中是针对芯片不同区域的MTJ器件在相反方向的磁场中磁化或者退火，得到相反特性的MTJ器件，磁场范围难以精确控制，而本申请中采用两个方向相反、大小不等的磁场分两次对芯片上的所有器件进行磁化处理，从而得到相反特性的第一磁隧道结器件和第二磁隧道结器件，非常简单方便，同时还可以减小磁传感器的面积。
上述实施例中是以一个器件组为例进行阐述的，当器件的数量为多个 时，通过设置布线可以将多个器件组形成惠斯通半桥和全桥的形式。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其它实施例的不同之处，各个实施例之间相同或相似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
以上对本申请所提供的磁传感器及其制作方法进行了详细介绍。本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想。应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以对本申请进行若干改进和修饰，这些改进和修饰也落入本申请权利要求的保护范围内。
Claims (14)
- 一种磁传感器，其特征在于，包括设有底电极的芯片，和设于所述芯片上的器件组，所述器件组包括：与所述底电极电连接的双磁隧道结，所述双磁隧道结包括由下至上堆叠的第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度，且所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相反；设于所述第二磁隧道结器件上方的顶电极；与所述双磁隧道结中的自由层连接的信号引出部。
- 如权利要求1所述的磁传感器，其特征在于，所述第一磁隧道结器件和所述第二磁隧道结器件的长轴方向相同。
- 如权利要求2所述的磁传感器，其特征在于，所述第一磁隧道结器件和所述第二磁隧道结器件的形状为椭圆柱。
- 如权利要求1所述的磁传感器，其特征在于，还包括，设于所述第二磁隧道结器件上表面的第一掩膜层。
- 如权利要求4所述的磁传感器，其特征在于，还包括，设于所述第二磁隧道结器件周围且与所述第一掩膜层上表面齐平的第一绝缘层，所述信号引出部贯穿所述第一绝缘层。
- 如权利要求5所述的磁传感器，其特征在于，还包括：设于所述第一磁隧道结器件和所述第一绝缘层侧面的第二绝缘层。
- 如权利要求5所述的磁传感器，其特征在于，所述第一绝缘层包括：设于所述第二磁隧道结器件周围的第一绝缘单元层；设于所述第一绝缘单元层外表面的第二绝缘单元层。
- 如权利要求4所述的磁传感器，其特征在于，所述第一掩膜层的材料为钽、氮化钽、氮化钛中的任一种。
- 如权利要求1所述的磁传感器，其特征在于，所述底电极的材料为氮化钽或者氮化钛。
- 如权利要求1至9任一项所述的磁传感器，其特征在于，当所述器件组的数量为多个时，多个所述器件组形成惠斯通半桥，惠斯通半桥中 第一预设数量个所述第一磁隧道结器件串联，第二预设数量个所述第二磁隧道结器件串联，所述第一预设数量和所述第二预设数量均小于所述器件组的数量。
- 如权利要求1至9任一项所述的磁传感器，其特征在于，所述器件组的数量为多个时，多个所述器件组形成惠斯通全桥，惠斯通全桥包括并联的第一半桥和第二半桥，所述第一半桥和所述第二半桥中第三预设数量个所述第一磁隧道结器件串联，第四预设数量个所述第二磁隧道结器件串联。
- 一种磁传感器制作方法，其特征在于，包括：在芯片上形成底电极；在所述底电极上表面制备待处理双磁隧道结，所述待处理双磁隧道结包括由下至上堆叠的待处理第一磁隧道结器件和待处理第二磁隧道结器件；刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件，形成第一磁隧道结器件和第二磁隧道结器件，所述第一磁隧道结器件的宽度大于所述第二磁隧道结器件的宽度；在所述第二磁隧道结器件上方制备顶电极；制备与所述双磁隧道结中的自由层连接的信号引出部；使用第一磁场对所述第一磁隧道结器件和第二磁隧道结器件进行磁化处理，使所述第一磁隧道结器件和所述第二磁隧道结器件中参考层的磁矩方向平行且相同；使用与所述第一磁场方向相反、大小不等的第二磁场对所述第一磁隧道结器件或所述第二磁隧道结器件进行磁化处理，使被所述第二磁场磁化的器件的参考层的磁矩方向与未被所述第二磁场磁化的器件的参考层的磁矩方向平行且相反，得到磁传感器。
- 如权利要求12所述的磁传感器制作方法，其特征在于，刻蚀所述待处理第二磁隧道结器件时，所述自由层的刻蚀深度在1纳米～2纳米之间。
- 如权利要求12或13所述的磁传感器制作方法，其特征在于，所述刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件包括：采用干法刻蚀方式，刻蚀所述待处理第一磁隧道结器件和所述待处理第二磁隧道结器件。
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| CN117858608A (zh) * | 2023-12-22 | 2024-04-09 | 珠海多创科技有限公司 | 一种磁阻元件及其制备方法、磁阻传感器 |
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| CN116148731A (zh) | 2023-05-23 |
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