WO2023087314A1 - 发光二极管及制备方法和显示面板 - Google Patents

发光二极管及制备方法和显示面板 Download PDF

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Publication number
WO2023087314A1
WO2023087314A1 PCT/CN2021/132139 CN2021132139W WO2023087314A1 WO 2023087314 A1 WO2023087314 A1 WO 2023087314A1 CN 2021132139 W CN2021132139 W CN 2021132139W WO 2023087314 A1 WO2023087314 A1 WO 2023087314A1
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Prior art keywords
layer
sublayer
emitting diode
light emitting
light
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PCT/CN2021/132139
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English (en)
French (fr)
Inventor
王彦钦
陈劲华
郭桓邵
彭钰仁
黄少华
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厦门市三安光电科技有限公司
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Application filed by 厦门市三安光电科技有限公司 filed Critical 厦门市三安光电科技有限公司
Priority to PCT/CN2021/132139 priority Critical patent/WO2023087314A1/zh
Priority to CN202180005020.6A priority patent/CN114342094A/zh
Publication of WO2023087314A1 publication Critical patent/WO2023087314A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table

Definitions

  • the invention relates to the field of semiconductor manufacturing, in particular to a light emitting diode, a preparation method and a display panel.
  • Micro LED In the field of LEDs, a new technology of micro-LEDs (mLEDs) obtained by reducing the size of the original light-emitting diode wafers has been developed in response to the needs of display applications.
  • Micro LED has the advantages of self-illumination, high efficiency, low power consumption, high brightness, high stability, ultra-high resolution and color saturation, fast response, long life, etc., and has been used in display, optical communication, indoor positioning , biological and medical fields have obtained related applications, and are expected to be further expanded to wearable/implantable devices, augmented display/virtual reality, vehicle display, super large display and optical communication/optical interconnection, medical detection, smart car lights, Space imaging and other fields have clear and considerable market prospects. Further improving the luminous efficiency of micro-LEDs (mLEDs) is still the focus of current industry development.
  • the luminous efficiency of micro-LEDs is mainly determined by two efficiencies.
  • the first is the radiative recombination efficiency of electrons and holes in the active region, which is commonly known as the internal quantum efficiency; the second is the light extraction efficiency.
  • There are several ways to improve the luminous efficiency including improving the quality of epitaxial growth, and increasing the internal quantum efficiency (IQE) by increasing the probability of combining electrons and holes.
  • IQE internal quantum efficiency
  • the existing micro light emitting diodes by roughening the surface of the semiconductor epitaxial stack, the light extraction efficiency of the light emitting diodes can be improved, and the luminous brightness can be improved.
  • the (Al X Ga 1-X ) Y In 1-Y P material of the first semiconductor layer is roughened to form a rough surface, thereby improving the light extraction efficiency.
  • the X value in the (Al X Ga 1-X ) Y In 1-Y P material of the first semiconductor layer is generally greater than 0.5, and the commonly used value ranges from 0.5 to 0.7.
  • the present invention proposes a light-emitting diode and a preparation method, which can increase the surface roughness of the light-emitting surface of the light-emitting diode, improve the light-emitting efficiency of the light-emitting diode, thereby increasing the brightness of the light-emitting diode, and at the same time improve the efficiency of the chip manufacturing process of the light-emitting diode. Stability, solve the over-etching problem in the roughening process of light-emitting diodes, and improve the reliability of light-emitting diodes.
  • the present invention proposes a light emitting diode comprising a semiconductor epitaxial stack comprising opposing first and second surfaces comprising a first semiconductor layer, a second semiconductor layer and a third semiconductor layer, and an An active layer between the layer and the third semiconductor layer; characterized in that: the first semiconductor layer includes a first sublayer and a second sublayer, wherein the first sublayer provides a first surface, and the first surface is roughened The surface of the second sublayer is closer to the second surface than the first sublayer, the first sublayer and the second sublayer have a compound semiconductor material containing Al, and the content of the Al component of the first sublayer is lower than The content of the Al component of the second sublayer.
  • the present invention also proposes a light emitting diode, comprising: a semiconductor epitaxial stack, comprising opposite first surfaces and second surfaces, comprising a first semiconductor layer, a second semiconductor layer and a third semiconductor layer, and a The active layer between the layer and the third semiconductor layer; the first semiconductor layer provides a first surface, and the first surface is a roughened surface; it is characterized in that: the Al content of the first semiconductor layer is 35% ⁇ 45%.
  • the present invention also proposes a method for preparing a light-emitting diode, comprising:
  • a growth substrate is provided, on which a semiconductor epitaxial stack is formed, including a first semiconductor layer, an active layer, a second semiconductor layer and a third semiconductor layer from a direction away from the substrate; the The first semiconductor layer includes a first sublayer and a second sublayer from a direction away from the substrate; the first sublayer and the second sublayer have a compound semiconductor material comprising Al, and the Al composition of the first sublayer is The content of the component is lower than the content of the Al component of the second sublayer;
  • the present invention also proposes a display panel including the aforementioned light emitting diodes.
  • the invention proposes a light-emitting diode and a preparation method thereof, which have the following beneficial effects:
  • the roughness of the light-emitting surface of the light-emitting diode can be improved, the light-emitting efficiency of the light-emitting diode can be improved, and the brightness of the light-emitting diode can be improved;
  • the design of the present invention can also improve the stability of the chip manufacturing process of the light-emitting diode, solve the problem of over-etching in the roughening process of the light-emitting diode, and improve the reliability of the light-emitting diode.
  • FIG. 1 is a schematic diagram of over-etching during the roughening process of a light-emitting diode mentioned in the prior art.
  • FIG. 2 is a schematic diagram of the epitaxial structure involved in Embodiment 1.
  • FIG. 3 is a schematic diagram of the micro light emitting diode involved in Example 1.
  • FIG. 3 is a schematic diagram of the micro light emitting diode involved in Example 1.
  • FIG. 4 is a schematic diagram of the micro-light-emitting element involved in Example 1.
  • FIG. 5 is a schematic diagram of the micro light emitting diode involved in Example 2.
  • 6 to 13 are structural schematic diagrams of the preparation process of the micro-light-emitting element involved in Example 3.
  • FIG. 14 is a schematic structural diagram of the micro light emitting diode involved in the fourth embodiment.
  • FIG. 15 is a schematic structural diagram of the micro light emitting diode involved in the fifth embodiment.
  • FIG. 16 is a schematic structural diagram of the micro light emitting diode involved in the sixth embodiment.
  • FIG. 17 is a schematic diagram of the display panel involved in the eighth embodiment.
  • FIG. 18 is a comparison of the test data of the light-emitting brightness of the micro-LED in Example 3 and the traditional structure.
  • FIG. 19 is an SEM image of the micro-light-emitting diode when the Al content of the first sublayer is 40% in Example 1 of the present invention.
  • FIG. 20 is an SEM image of the micro-light-emitting diode when the Al content of the first sublayer is 60% in Example 1 of the present invention.
  • FIG. 21 is a schematic structural diagram of the micro light emitting diode involved in Embodiment 7 of the present invention.
  • FIG. 22 is a schematic structural diagram of another micro light-emitting diode involved in Embodiment 7 of the present invention.
  • growth substrate 100; buffer layer: 101; etch stop layer: 102; first semiconductor layer: 103; first sublayer: 103a; second sublayer: 103b; third sublayer: 103c; A cover layer: 104; active layer: 105; second cover layer: 106; current spreading layer: 107; ohmic contact layer: 108; first electrode: 109; ohmic contact electrode of the first electrode: 109a; first electrode
  • This embodiment provides a light-emitting diode and its manufacturing method, which can solve the problem that the (Al X Ga 1-X ) Y In 1-Y P material of the first semiconductor layer in the prior art has a high Al composition and is easily roughened by the solution.
  • the roughness (Ra value) of the roughened surface is small, which affects the light-emitting efficiency of the LED; at the same time, the higher the Al composition, the faster the roughening, the worse the stability of the process, and the problem of too deep roughening is prone to occur , increasing the roughness of the light-emitting surface of the light-emitting diode, thereby improving the light-emitting efficiency of the light-emitting diode, and at the same time improving the reliability of the light-emitting diode.
  • the LED epitaxial structure includes: a growth substrate 100; a semiconductor epitaxial stack, including a first semiconductor layer 103, The second semiconductor layer, the active layer 105 and the third semiconductor layer; the first semiconductor layer 103 sequentially includes a first sublayer 103a, a second sublayer 103b and a third sublayer 103c from the direction away from the substrate, the The first sublayer 103a and the second sublayer 103b have a compound semiconductor material containing Al, and the content of the Al component of the first sublayer 103a is lower than the content of the Al component of the second sublayer 103b.
  • the third sublayer 103c and the second sublayer 103b have a compound semiconductor material containing Al, and the content of the Al component of the third sublayer 103c is lower than the content of the Al component of the second sublayer 103b .
  • the material of the growth substrate 100 includes but is not limited to GaAs, and other materials such as GaP, InP, etc. may also be used.
  • the GaAs growth substrate 100 is taken as an example.
  • a buffer layer 101 and an etch stop layer 102 are sequentially disposed between the growth substrate 100 and the first semiconductor layer 103; wherein, since the lattice quality of the buffer layer 101 is better than that of the growth substrate 100, Therefore, growing the buffer layer 101 on the growth substrate 100 is beneficial to eliminate the influence of the lattice defects of the growth substrate 100 on the semiconductor epitaxial stack; the etch stop layer 102 is used as a stop layer for chemical etching in the later steps, and in some optional implementations In an example, the etch stop layer 102 is an N-type etch stop layer 300 made of N-GaInP; in some optional embodiments, the etch stop layer 102 is a P-type etch stop layer made of P-GaInP.
  • the etch stop layer 102 is an N-type etch
  • the first semiconductor layer 103 is disposed on the surface of the etch stop layer 102 .
  • the first semiconductor layer 103 sequentially includes a first sublayer 103a, a second sublayer 103b and a third sublayer 103c from a direction away from the substrate.
  • the first sub-layer 103a of the first semiconductor layer 103 is composed of a compound semiconductor material of the combined formula (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P
  • the second sub-layer 103b is composed of the combined formula (Al X2 Ga 1-X2 ) Y2 In 1-Y2 P compound semiconductor material composition, wherein 0 ⁇ X1 ⁇ X2 ⁇ 1.
  • the value range of X2-X1 is 0.1-0.35.
  • X1 in the first sublayer ranges from 0.35 to 0.45.
  • the range of X2 in the second sublayer is 0.5-0.7.
  • the content of the Al component in the first sub-layer 103a is set relatively low, which can ensure that the roughening etching rate of the subsequent first sub-layer 103a is relatively slow, and the surface roughness Ra value after roughening is relatively large, thereby improving semiconductor light emission.
  • the light extraction efficiency of the element at the same time, it can prevent the occurrence of overetching phenomenon during the roughening process of the first sub-layer 103a, thereby improving the reliability of the semiconductor light emitting element.
  • FIG. 19 is an SEM image of the roughened surface of the micro-light emitting diode when the Al content of the first sublayer is 40%.
  • the roughness of the roughened surface in FIG. 19 is about 170nm.
  • FIG. 20 is an SEM image of the roughened surface of the micro-light emitting diode when the Al content of the first sublayer is 60%.
  • the roughness of the roughened surface in FIG. 20 is 275nm. From the comparison of the test data in Figure 19 and Figure 20, it can be seen that the first sub-layer adopts a lower Al content, which can obtain a roughened surface with a larger surface roughness Ra value, and improve the light extraction efficiency of the micro-LED, thereby improving the micro-LED.
  • the third sub-layer 103c is composed of a compound semiconductor material with a combined formula (Al X3 Ga 1-X3 ) Y3 In 1-Y3 P, wherein the range of X3 is 0.35-0.45.
  • the first semiconductor layer 103 is composed of three sublayers with different Al component contents, which can improve the lateral spread of the current and improve the uniformity of the current spread.
  • the setting of the higher Al component content in the second sublayer can reduce the The light-absorbing effect of the second sub-layer 103b of the first layer improves the luminous efficiency of the semiconductor light-emitting device.
  • the third sublayer 103c is set with a content lower than that of the Al component of the second sublayer 103b, which can reduce the contact resistance between the first electrode 109 and the third sublayer 103c in the semiconductor light emitting element, and improve the effect of its ohmic contact, thereby Reduce the voltage and improve the luminous efficiency of semiconductor light-emitting elements.
  • the thickness of the first sub-layer 103a after epitaxial growth is 1-3 ⁇ m, preferably more than 1.5 ⁇ m, and the thickness of the remaining first sub-layer 103a after roughening by etching is 0-0.5 ⁇ m. ⁇ m.
  • the thickness of the second sub-layer 103b is 0.5-4 ⁇ m, preferably more than 0.8 ⁇ m and less than 2 ⁇ m.
  • a second sub-layer with a certain thickness can improve the uniformity of current spreading.
  • the third sublayer has a thickness of 1-2 ⁇ m.
  • the thickness of the first semiconductor layer is related to the ability to spread the current, and the first semiconductor layer with a certain thickness can ensure the uniform spread of the current, thereby improving the photoelectric performance of the micro light emitting diode.
  • the first semiconductor layer can be set to be n-type or p-type, and the doping concentration of the three sublayers can be set to be the same or different, and the doping concentration is 1E18-4E18/cm 3 .
  • the doping type of the first semiconductor layer is the same as that of the etching stop layer.
  • the second semiconductor layer and the third semiconductor layer respectively include a first capping layer 104 and a second capping layer 106 for providing electrons or holes to the active layer 105 , such as AlGaInP or AlInP or AlGaAs. More preferably, when the material of the active layer 105 is AlGaInP or AlInP or GaInP, AlInP serves as the first covering layer 104 and the second covering layer 106 to provide holes and electrons.
  • the doping type of the first covering layer 104 in the second semiconductor layer is the same as that of the first semiconductor layer 103 and the etch stop layer 102, which can be n-type or p-type; the second covering layer 106 and The doping type of the first cladding layer 104 is opposite. In some optional embodiments, the etching stop layer 102, the first semiconductor layer 103, and the first cladding layer 104 are n-type, and the doping type of the second cladding layer 106 is p-type, and vice versa.
  • the thickness of the first covering layer 104 is 0.2-1.2 microns; more preferably, the thickness of the first covering layer 104 is 0.3-0.5 ⁇ m, by adjusting the first covering
  • the thickness of the layer 104 can reduce the internal resistance of the material, thereby reducing the voltage of the semiconductor light-emitting element and improving the brightness of the semiconductor light-emitting element; the doping concentration of the first covering layer 104 is 6E17 ⁇ 6E18/cm 3 .
  • the thickness of the second covering layer 106 is 0.2 to 1.2 microns; more preferably, the thickness of the second covering layer 106 is 0.4 to 0.6 ⁇ m.
  • the thickness of the second covering layer 106 By adjusting the thickness of the second covering layer 106, the thickness of the material can be reduced. internal resistance, so as to reduce the voltage of the semiconductor light-emitting element and increase the brightness of the semiconductor light-emitting element; the doping concentration of the second covering layer 107 is 7E17 ⁇ 6E18/cm 3 .
  • the active layer 105 provides a region for electron and hole recombination to provide light radiation, and different materials can be selected according to different emission wavelengths.
  • the active layer 105 can be a periodic structure of single quantum well or multiple quantum wells.
  • the active layer 105 includes a well layer and a barrier layer, wherein the barrier layer has a larger bandgap than the well layer.
  • the composition ratio of the semiconductor material in the active layer 105 it is desired to radiate light of different wavelengths.
  • the active layer 105 radiates light in the 550-950 nm band, such as red, yellow, orange, and infrared light.
  • the active layer 105 is a material layer that provides electroluminescent radiation, such as AlGaInP or AlInP or AlGaAs, more preferably AlGaInP, which is a single quantum well or multiple quantum wells.
  • the semiconductor epitaxial stack radiates red light.
  • Semiconductor epitaxial stacks can be deposited by Physical Vapor Deposition (Physical Vapor Deposition, PVD), Chemical Vapor Deposition (Chemical Vapor Deposition Deposition, CVD), epitaxial growth (Epitaxy Growth Technology) and atomic beam deposition (Atomic Layer Deposition, ALD) and other methods are formed on the growth substrate.
  • Physical Vapor Deposition Physical Vapor Deposition, PVD
  • Chemical Vapor Deposition Deposition Chemical Vapor Deposition Deposition Deposition, CVD
  • epitaxial growth Epitaxial Growth Technology
  • atomic beam deposition Atomic Layer Deposition
  • the third semiconductor layer includes a current spreading layer 107 , preferably the material of the current spreading layer 107 is GaP, and the thickness is 0.2 ⁇ 1.5 ⁇ m.
  • the thickness of the current spreading layer 107 is preferably 0.3-1.0 ⁇ m, and reducing the thickness of the current spreading layer can reduce the light absorption of the current spreading layer, thereby improving the brightness of the semiconductor light-emitting element; preferably the The doping concentration of the current spreading layer is 9E17 ⁇ 4 E18/cm 3 .
  • the third semiconductor layer further includes an ohmic contact layer 108, preferably the material of the ohmic contact layer 108 is GaP, the thickness of the ohmic contact layer 108 is 0.03-0.1 ⁇ m; the doping concentration is preferably 7E18/cm 3 or more, More preferred is 9 E18/cm 3 to achieve good ohmic contact.
  • the doping type of the current spreading layer 107 and the ohmic contact layer 108 is the same as that of the second cladding layer 106 .
  • Fig. 3 shows a schematic diagram of a micro-light-emitting diode
  • the micro-light-emitting diode adopts the epitaxial structure shown in Fig. Its manufacturing process is very different from traditional light-emitting diodes.
  • micro-light-emitting diodes mainly refer to size, including length, width or height ranging from greater than or equal to 2 ⁇ m to less than 5 ⁇ m, from greater than or equal to 5 ⁇ m to less than 10 ⁇ m, From greater than or equal to 10 ⁇ m to less than 20 ⁇ m, from greater than or equal to 20 ⁇ m to less than 50 ⁇ m, or from greater than or equal to 50 ⁇ m to less than or equal to 100 ⁇ m.
  • the miniature light-emitting diode can be widely used in display and other fields.
  • the micro light emitting diode includes: a semiconductor epitaxial stack, specifically the opposite first surface S1 and second surface S2, which sequentially include a first semiconductor layer 103, a second semiconductor layer, an active layer 105, a second semiconductor layer Three semiconductor layers; the first semiconductor layer 103 includes a first sublayer 103a, a second sublayer 103b and a third sublayer 103c from the first surface S1 to the second surface S2, and the first sublayer 103a provides a first The surface S1, the first surface S1 is a roughened surface, and the second sublayer 103b is closer to the second surface S2 than the first sublayer 103a.
  • the micro light emitting diode also includes a first mesa A1, which is composed of the first semiconductor layer exposed by the recess of the semiconductor epitaxial stack, and a second mesa A2, which is composed of the third semiconductor layer; a first electrode 109 is formed on the first semiconductor layer.
  • a mesa A1 it is electrically connected to the third sub-layer 103c of the first semiconductor layer; the second electrode 110 is formed on the second mesa A2, and is connected to the ohmic contact layer 108 in the third semiconductor layer.
  • the second semiconductor layer includes a first covering layer 104 ;
  • the third semiconductor layer includes a second covering layer 106 , a current spreading layer 107 and an ohmic contact layer 108 .
  • the average Al content of the first sub-layer 103a of the first semiconductor layer is lower than the average Al content of the second sub-layer 103b.
  • the first sublayer of the first semiconductor layer is composed of a compound semiconductor material of the combined formula (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P
  • the second sublayer is composed of the combined formula (Al X2 Ga 1 -X2 ) Y In 1-Y2 P compound semiconductor material composition, wherein 0 ⁇ X1 ⁇ X2 ⁇ 1.
  • the value range of X2-X1 is 0.1-0.35.
  • X1 in the first sublayer ranges from 0.35 to 0.45.
  • the range of X2 in the second sublayer is 0.5-0.7.
  • the content of the Al component in the first sublayer is set to be low, which can ensure that the roughening etching rate of the subsequent first sublayer is relatively slow, and the surface roughness Ra value after roughening is relatively large, thereby improving the performance of the semiconductor light emitting device.
  • Light extraction efficiency at the same time, it can prevent the occurrence of over-etching phenomenon in the process of thickening the first sub-layer, thereby improving the reliability of the semiconductor light-emitting device.
  • the third sublayer 103c of the first semiconductor layer is located on the second sublayer 103b, the third sublayer 103c and the second sublayer 103b have a compound semiconductor material containing Al, and the third sublayer The content of the Al component is lower than the content of the Al component of the second sublayer.
  • the third sub-layer 103c is composed of a compound semiconductor material with a combined formula (Al X3 Ga 1-X3 ) Y3 In 1-Y3 P, wherein the range of X3 is 0.35-0.45.
  • the first semiconductor layer is composed of three sublayers with different Al composition content, which can improve the lateral spread of current and improve the uniformity of current spread.
  • the setting of higher Al composition content in the second sublayer can reduce the The light absorption of the second sublayer improves the luminous efficiency of the semiconductor light emitting device.
  • the content of the Al component in the third sublayer is set lower than that of the second sublayer, which can reduce the contact resistance between the first electrode and the third sublayer in the semiconductor light-emitting element, and improve the effect of its ohmic contact, thereby reducing the voltage and improving Luminous efficiency.
  • the light-taking efficiency is generally improved by roughening the light-emitting surface.
  • the first sub-layer 103a of the first semiconductor layer provides a first surface S1, which is a roughened surface, and the first surface S1 is a light-emitting surface of a micro-light emitting diode.
  • a graphic surface or a roughened surface is formed by an etching process, wherein the graphic surface can be etched to obtain regular or irregular graphics.
  • the roughened surface may have a regular surface structure or any irregular surface micro-nano structure, and the roughened surface or the patterned surface is essentially that the light radiated by the active layer 105 can escape more easily, improving the light extraction efficiency.
  • the height difference (or height difference) of the surface structure formed by roughening the first surface S1 is less than 1 micron, preferably 100-300 nm, that is, the roughness Ra value of the first surface S1 is 100-300 nm. More preferably, the roughness Ra of the first surface S1 is 200-300 nm.
  • the thickness of the first sub-layer 103 a of the first semiconductor layer is 0-0.5 ⁇ m, and the thickness of the second sub-layer 103 b is 0.5-4 ⁇ m, preferably not less than 0.8 ⁇ m and not more than 2 ⁇ m.
  • the thickness of the third sub-layer 103c is 1-2 ⁇ m.
  • the micro light emitting diode also includes a first electrode 109 and a second electrode 110 .
  • the first electrode 109 forms an ohmic contact with the third sub-layer 103c of the first semiconductor layer, and the first electrode 109 is a conductive metal, which can be selected from gold, platinum, silver, etc., or a transparent conductive oxide, specifically may be ITO, ZnO, etc.; more preferably, the first electrode 109 may be a multi-layer material, such as an alloy material including at least one of gold-germanium-nickel, gold-beryllium, gold-germanium, gold-zinc, etc., more preferably, the first electrode 109 An electrode 109 may also include a reflective metal to reflect the light radiated by the active layer back to the semiconductor epitaxial stack, and emit light from the light emitting side.
  • the material of the second electrode 110 and the ohmic contact layer 108 can be conductive metal such as gold, platinum or silver, etc.
  • the second electrode 110 may include multilayer materials, including at least one alloy material of gold-germanium-nickel, gold-beryllium, gold-germanium, and gold-zinc.
  • at least one metal that can diffuse to the ohmic contact layer 108 side can be included to improve the ohmic contact resistance.
  • the diffusion metal is a metal that can directly contact one side of the ohmic contact layer 108, such as gold, platinum or silver.
  • an insulating protective layer 111 is provided on the first mesa, the second mesa and the sidewall of the micro light emitting diode, and the insulating protective layer 111 is a single-layer or multi-layer structure, made of SiO 2 , SiN x , Al 2 O 3 , Ti 3 O 5 at least one material formed.
  • the insulating protection layer 111 is a Bragg reflection layer structure, for example, the insulating protection layer 111 is formed by stacking two materials of Ti 3 O 5 and SiO 2 alternately.
  • the material of the insulating protection layer 111 can be SiNx or SiO 2 , and the thickness is more than 0.5 ⁇ m.
  • the first electrode 109 and the second electrode 110 are located on the opposite side of the light-emitting side, and the first electrode 109 and the second electrode 110 can be in contact with an external electrical connector through the opposite side of the light-emitting side to form a flip chip Structure. Therefore, the first electrode 109 and the second electrode 110 also include the pad metal on the top, and the pad metal can be at least one layer such as gold, aluminum or silver, so as to realize the solidification of the first electrode 109 and the second electrode 110. crystal.
  • the first electrode 109 and the second electrode 110 may have equal or different heights, and the pad metal layers of the first electrode and the second electrode do not overlap in the thickness direction.
  • Fig. 4 is a schematic diagram of a micro-light-emitting element formed using the micro-light-emitting diode of this embodiment, the micro-light-emitting element also includes a base frame 250 supporting the micro-light-emitting diode, and the base frame 250 is located on the lower side of the micro-light-emitting diode for
  • the material includes dielectric, metal or semiconductor material.
  • the horizontal part 111-1 of the insulating protection layer 111 can be used as a bridge arm 210, bridged on the bonding layer 230, and connects the micro light emitting diode and the base frame. 250.
  • the micro light-emitting diodes are separated from the base frame 250 by transfer printing a printing stamp, and the printing stamp material is PDMS, silica gel, pyrolytic glue or UV ultraviolet glue.
  • the printing stamp material is PDMS, silica gel, pyrolytic glue or UV ultraviolet glue.
  • the removal efficiency of the sacrificial layer 220 is higher than that of the micro-light-emitting diode, and certain cases include chemical decomposition or physical decomposition, such as ultraviolet light decomposition, etching, etc. Removal or Shock Removal etc.
  • the micro-light-emitting diode is bonded on the substrate 240 through a bonding layer 230, and the bonding layer can be BCB glue or PI,
  • the substrate 240 may be a sapphire substrate.
  • the micro-light-emitting element in this embodiment can be transferred to the packaging substrate (not shown in the figure) by means of laser lift-off or the like.
  • FIGS 6 to 13 show schematic diagrams of the manufacturing process of the micro-light-emitting element according to the present embodiment 1.
  • the manufacturing method of the micro-light-emitting diode of the present embodiment will be described in detail below with reference to the schematic diagrams.
  • an epitaxial structure which specifically includes the following steps: providing a growth substrate 100, and epitaxially growing a semiconductor epitaxial stack by an epitaxial process such as MOCVD, and the semiconductor epitaxial stack includes sequentially stacked on the surface of the growth substrate 100
  • the buffer layer 101 and the etch stop layer 102 are used to remove the epitaxial growth substrate 100, and then grow the first semiconductor layer 103, the first covering layer 104, the active layer 105, the second covering layer 106, the current spreading layer 107 and the ohmic contact layer 108 .
  • the first semiconductor layer includes a first sublayer 103 a , a second sublayer 103 b and a third sublayer 103 c in a direction away from the growth substrate 100 .
  • the growth substrate 100 adopts a commonly used GaAs substrate, and the material of the buffer layer 101 is set according to the growth substrate 100.
  • the growth substrate 100 is not limited to GaAs, and other materials, such as GaP , InP, etc., the setting and material of the corresponding buffer layer 101 can be selected according to the specific growth substrate 100 .
  • An etch stop layer 102 such as GaInP, is provided on the buffer layer 101.
  • a thinner etch stop layer 102 is preferably provided, and its thickness is controlled within 500nm, more preferably 200nm within.
  • the first sub-layer of the first semiconductor layer is composed of a compound semiconductor material of the combined formula (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P, preferably X1 is in the range of 0.35-0.45;
  • the second sublayer is composed of a compound semiconductor material of the combined formula (Al X2 Ga 1-X2 ) Y2 In 1-Y2 P, preferably the range of X2 is 0.5 ⁇ 0.7;
  • the third sublayer 103c is composed of the combined formula (Al X3 Ga 1-X3 ) Y3 In 1-Y3 P compound semiconductor material composition, wherein the range of X3 is 0.35-0.45.
  • the thickness of the first sub-layer 103a is 1-3 ⁇ m; preferably more than 1.5 ⁇ m.
  • the thickness of the first sub-layer is to ensure the subsequent roughening process, so as to obtain roughness with a relatively large roughness. surface.
  • the thickness of the second sub-layer 103b is 0.8-4 ⁇ m; the thickness of the third sub-layer 103c is 1-2 ⁇ m.
  • the total thickness of the first semiconductor layer is related to the ability to expand the current, and growing the first semiconductor layer with a certain thickness can improve the uniform expansion of the current, thereby improving the photoelectric performance of the micro-light-emitting diode.
  • the role of the first cladding layer 104 is to provide holes for the MQW.
  • the preferred material is AlInP with a thickness of 0.2-1.2 ⁇ m; P-type doping is usually Mg doping, and other equivalent elements are not excluded. Alternative doping.
  • the active layer 105 is a multiple quantum well, and the material is a structure of repeated stacked wells and barriers of Al n1 Ga 1-n1 InP/Al n2 Ga 1-n2 InP (0 ⁇ n1 ⁇ n2 ⁇ 1).
  • the preferred material of the second covering layer 106 is AlInP, with a thickness of 0.2-1.2 ⁇ m; the expansion ability of the current spreading layer 107 is related to the thickness, preferably the thickness is above 0.3 ⁇ m and below 0.6 ⁇ m. In this embodiment, preferably, the thickness range of the current spreading layer 107 is 0.2-1.5 ⁇ m.
  • the preferred material of the current spreading layer 107 is GaP, and the n-type doping concentration is 9E17-4 E18/cm 3 ; the preferred material of the ohmic contact layer 108 is GaP, and the thickness is 0.03-0.1 ⁇ m; the n-type doping concentration is 5E18 ⁇ 5E19/cm 3 , more preferably above 9 E18/cm 3 .
  • a part of the semiconductor epitaxial stack is removed by dry etching to form a first mesa A1 and a second mesa A2.
  • the first mesa A1 is composed of a first semiconductor layer exposed by a recess in the semiconductor epitaxial stack.
  • the second mesa A2 is composed of the third semiconductor layer; forming sidewalls, located at the outer edge of the semiconductor epitaxial stack, and located between the first mesa A1 and the second mesa A2.
  • the first electrode 109 and the second electrode 110 are made on the first mesa and the second mesa respectively; wherein the first electrode 109 and the second electrode 110 include ohmic contact electrodes 109a and 110a, and in the ohmic contact part
  • the insulating protection layer 111 is covered thereon, and pad electrodes 109 b and 110 b are opened above the insulating protection layer 111 to contact the ohmic contact portions 109 a and 110 a respectively.
  • the material of the ohmic contact parts 109a and 110a can be, for example, Au/AuZn/Au.
  • the insulating protection layer 111 is preferably made of SiNx or SiO 2 , with a thickness of 0.5 ⁇ m or more. In other optional embodiments, the insulating protection layer 111 may adopt a Bragg reflective layer structure, which is formed by alternately stacking two materials with different refractive indices.
  • a sacrificial layer 220 is covered on the surface of the micro-light emitting diode; preferably, the thickness of the sacrificial layer 220 covering the sidewall is more than 1 ⁇ m, and the material of the sacrificial layer 220 can be oxide, nitrogen, etc. compounds or materials that can be selectively removed relative to other layers.
  • a bonding glue such as BCB glue, is bonded on the sacrificial layer 220 of the micro-light emitting diode to form a bonding layer 230;
  • the wafer on which the micro light emitting diodes are distributed is bonded to the substrate 240 .
  • the growth substrate 100 is peeled off, and the buffer layer 101 and the etch stop layer 102 are removed.
  • the first-type semiconductor layer at the edge of the micro-LED is removed through masking and etching, and the etching stops on the insulating protection layer 111 to form independent core particles, which facilitates subsequent separation of core particles.
  • the first sub-layer 103a of the first semiconductor layer is roughened to obtain a micro light emitting diode with a roughened surface, as shown in FIG. 13 .
  • the formed micro light emitting diodes are separated from the substrate 240 by transfer printing and transferred onto a packaging substrate (not shown in the figure).
  • micro-light-emitting diode chips Use the manufacturing method in this embodiment to manufacture micro-light-emitting diode chips.
  • the horizontal size of the chip is 15*25 ⁇ m.
  • the luminous brightness changes with the current test. As shown in Figure 19, under the condition of 1uA low current, the luminous brightness Increased by 23%.
  • the first electrode 109 and the second electrode 110 are on different sides, and the micro light emitting diode in this embodiment has a vertical structure.
  • the side of the first semiconductor layer 103 away from the active layer 106 is the light-emitting surface, and the ohmic contact layer 108 and the second electrode 110 may be covered with a reflective metal or reflective insulating medium layer (not shown in the figure) , part of the light irradiated from the active layer 106 and passing through the third semiconductor layer is reflected back to the semiconductor epitaxial stack, and the light is emitted from the light emitting side.
  • the first semiconductor layer 103 is composed of a first sublayer 103a and a second sublayer 103b, and the first sublayer 103a A first surface S1 is provided, the first surface S1 is a rough surface, and the light radiated by the active layer 106 is emitted from the first surface S1.
  • the first electrode 109 is in contact with the second sub-layer 103b.
  • the first sub-layer 103a is composed of a compound semiconductor material with the combined formula (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P, preferably X1 is in the range of 0.35-0.45;
  • the second The second sub-layer is composed of a compound semiconductor material with the combined formula (Al X2 Ga 1-X2 ) Y2 In 1-Y2 P, and preferably X2 is in the range of 0.5-0.7.
  • the thickness of the first sub-layer 103a is 0-0.5 ⁇ m
  • the thickness of the second sub-layer 103b is 0.8-4 ⁇ m, preferably more than 1.5 ⁇ m, more preferably more than 2 ⁇ m, so as to ensure uniform spreading of current.
  • the content of the Al component in the first sublayer described in this embodiment is set relatively low, which can ensure that the roughening etching rate of the subsequent first sublayer is relatively slow, and the surface roughness Ra value after roughening is relatively large, thereby improving The light extraction efficiency of the semiconductor light-emitting device; at the same time, it can prevent the occurrence of over-etching phenomenon in the process of roughing the first sub-layer, thereby improving the reliability of the semiconductor light-emitting device.
  • the first semiconductor layer 103 is composed of a first sublayer 103a and a second sublayer 103b, and the first sublayer 103a A first surface S1 is provided, the first surface S1 is a rough surface, and the light radiated by the active layer 106 is emitted from the first surface S1.
  • the first electrode 109 is in contact with the first sub-layer 103a.
  • the first sub-layer 103a is composed of a compound semiconductor material with the combined formula (Al X1 Ga 1-X1 ) Y1 In 1-Y1 P, preferably X1 is in the range of 0.35-0.45;
  • the second The second sub-layer is composed of a compound semiconductor material with the combined formula (Al X2 Ga 1-X2 ) Y2 In 1-Y2 P, and preferably X2 is in the range of 0.5-0.7.
  • the thickness of the first sub-layer 103a is 0-0.5 ⁇ m
  • the thickness of the second sub-layer 103b is 0.8-4 ⁇ m, preferably more than 1.5 ⁇ m, more preferably more than 2 ⁇ m, so as to ensure uniform spreading of current.
  • the content of the Al component in the first sublayer described in this embodiment is set relatively low, which can ensure that the roughening etching rate of the subsequent first sublayer is relatively slow, and the surface roughness Ra value after roughening is relatively large, thereby improving The light extraction efficiency of the semiconductor light-emitting device; at the same time, it can prevent the occurrence of over-etching phenomenon in the process of roughing the first sub-layer, thereby improving the reliability of the semiconductor light-emitting device.
  • the first semiconductor layer provides a first surface, the first surface is a roughened surface, and the Al content of the first semiconductor layer
  • the thickness of the first semiconductor layer is 35% ⁇ 45%, and the thickness of the first semiconductor layer is 2.5 ⁇ 6 ⁇ m, preferably 2.8 ⁇ 4.5 ⁇ m.
  • the thickness of the first semiconductor layer with a certain thickness ensures the uniform expansion of the current and improves the photoelectric performance of the micro-light-emitting diode.
  • the Al content of the first semiconductor layer is set to 35% to 45%.
  • the micro light emitting diode shown in Fig. 21 is a flip-chip light emitting tube.
  • the structural design of the first semiconductor layer in this embodiment is also applicable to vertical light emitting diodes, as shown in FIG. 22 , which can also solve the problems in the prior art and obtain micro light emitting diodes with high luminous efficiency and reliability.
  • This embodiment provides a display panel 300. Please refer to FIG. 17.
  • the display panel 300 includes a plurality of micro light-emitting diodes arranged in an array as in any of the foregoing embodiments. In FIG. 17, a part is shown in an enlarged schematic manner. Micro LEDs 1.
  • the display panel 300 is a display panel corresponding to a display screen of a smartphone.
  • the display panel may also be a display panel of other types of electronic products, such as a display panel of a computer display screen, or a display panel of a smart wearable electronic product display screen.
  • the display panel 300 Due to having the miniature light emitting diodes (miniature light emitting diodes 1 ) of the foregoing embodiments, the display panel 300 has the advantages brought about by the miniature light emitting diodes of the foregoing embodiments.
  • the invention provides a light-emitting diode and a manufacturing method thereof, which can solve the problem that the (Al X Ga 1-X ) Y In 1-Y P material of the first semiconductor layer in the prior art has a high Al composition and is easily roughened by a roughening solution.
  • the surface roughness (Ra value) will be relatively small, which will affect the light-emitting efficiency of the light-emitting diode; at the same time, the higher the Al composition, the faster the roughening, the worse the stability of the process, and the problem of too deep roughening will easily occur.
  • the first semiconductor layer is composed of sub-layers with different Al contents, which can improve the uniformity of current spreading and improve the luminous efficiency of the semiconductor light-emitting element.

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Abstract

本发明公开发光二极管及制备方法和显示面板，所述发光二极管包括半导体外延叠层，包含相对的第一表面和第二表面，包含第一半导体层、第二半导体层和第三半导体层，以及位于所述第二半导体层和第三半导体层之间的有源层；其特征在于：所述第一半导体层包括第一子层和第二子层，其中第一子层提供第一表面，第一表面为粗化的表面，第二子层相对第一子层更靠近第二表面，所述第一子层和第二子层具有包含Al的化合物半导体材料，并且第一子层的Al组分的含量低于所述第二子层的Al组分的含量。本发明可提升发光二极管的出光面的粗糙度，提升发光二极管的出光效率，同时可防止粗化过程中半导体外延叠层的过蚀刻现象的发生，提升发光二极管的可靠性。

Description

发光二极管及制备方法和显示面板 技术领域
本发明涉及半导体制造领域，具体涉及发光二极管及制备方法和显示面板。
 背景技术
在LED领域中，随着显示应用领域的需求，一种将原本发光二极体晶片的尺寸减小而获得的微型LED（mLED）的新技术发展起来。微型LED（mLED）具有自发光、高效率、低功耗、高亮度、高稳定性、超高分辨率与色彩饱和度、响应速度快、寿命长等优点，已经在显示、光通信、室内定位、生物和医疗领域获得了相关的应用，并有望进一步扩展到可穿戴/可植入器件、增强显示/虚拟现实、车载显示、超大型显示以及光通信/光互联、医疗探测、智能车灯、空间成像等多个领域，具有明确可观的市场前景。进一步提高微型LED（mLED）的发光效率仍然是当前行业发展的重点。
微型LED（mLED）的发光效率主要由两个效率决定，第一个是电子空穴在有源区的辐射复合效率，即通常说的内量子效率；第二个是光的提取效率。欲提升发光效率可通过以下几个方式，其包括改善外延生长的品质，通过增加电子和空穴结合的几率，提升内部量子效率（IQE）。另一方面，发光二极管产生的光线若无法有效被取出，部分光线因全反射因素而局限在发光二极管内部来回反射或折射，最终被电极或发光层吸收，使亮度无法提升，因此使用表面粗化或者改变结构的几何形状等，提升外量子效率（EQE），从而提升发光二极管的发光亮度和发光效率。
现有的微型发光二极管通过对半导体外延叠层的表面进行粗化，可提升发光二极管的光取出效率，提升发光亮度。红光发光二极管中通过对第一半导体层的(Al XGa 1-X) YIn 1-YP材料进行粗化形成粗化面，提升出光效率。第一半导体层的(Al XGa 1-X) YIn 1-YP材料中X值一般大于0.5，常用取值范围为0.5~0.7，当(Al XGa 1-X) YIn 1-YP中的Al组分越高，即对应的X值越大时，第一半导体层的(Al XGa 1-X) YIn 1-YP材料越容易被粗化溶液粗化，其中表面粗糙度(Ra值)会比较小，从而影响发光二极管的出光效率。同时Al组份越高,粗化越快,制程的稳定性会越差，容易出现粗化过深的问题。如图1所示，微发光二极管出现粗化蚀刻过深的问题，从而影响微发光二极管的可靠性。
技术解决方案
为了解决上述问题，本发明提出一种发光二极管及制备方法，可提升发光二极管出光面的表面粗糙度，提升发光二极管的出光效率，从而提升发光二极管的亮度，同时可提升发光二极管的芯片制程的稳定性，解决发光二极管粗化过程中的过蚀刻问题，提升发光二极管的可靠性。
本发明提出发光二极管，所述发光二极管包括半导体外延叠层，包含相对的第一表面和第二表面，包含第一半导体层、第二半导体层和第三半导体层，以及位于所述第二半导体层和第三半导体层之间的有源层； 其特征在于：所述第一半导体层包括第一子层和第二子层，其中第一子层提供第一表面，第一表面为粗化的表面，第二子层相对第一子层更靠近第二表面，所述第一子层和第二子层具有包含Al的化合物半导体材料，并且第一子层的Al组分的含量低于所述第二子层的Al组分的含量。
本发明还提出一种发光二极管，包括：半导体外延叠层，包含相对的第一表面和第二表面，包含第一半导体层、第二半导体层和第三半导体层，以及位于所述第二半导体层和第三半导体层之间的有源层；所述第一半导体层提供第一表面，第一表面为粗化的表面；其特征在于：所述第一半导体层的Al含量为35%~45%。
本发明还提出一种发光二极管的制备方法，包括：
（1）提供一生长衬底，在所述生长衬底上形成半导体外延叠层，自远离衬底的方向包括第一半导体层，有源层，第二半导体层和第三半导体层；所述第一半导体层自远离衬底的方向包括第一子层和第二子层；所述第一子层和第二子层具有包含Al的化合物半导体材料，且所述第一子层的Al组分的含量低于所述第二子层的Al组分的含量；
（2）去除所述生长衬底，露出所述的第一半导体层的第一子层，利用蚀刻方式粗化第一半导体层的第一子层，所述第一子层的第一表面形成粗化表面。
本发明还提出一种显示面板，包含前述的发光二极管。
 有益效果
本发明提出一种发光二极管及制备方法，具有以下有益效果：
（1）  通过对第一半导体层的结构设计，可提升发光二极管出光面的粗糙度，提升发光二极管的出光效率，从而提升发光二极管的亮度；
（2）  本发明的设计同时可提升发光二极管的芯片制程中的稳定性，解决发光二极管粗化过程中的过蚀刻问题，提升发光二极管的可靠性。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
虽然在下文中将结合一些示例性实施及使用方法来描述本发明，但本领域技术人员应当理解，并不旨在将本发明限制于这些实施例。反之，旨在覆盖包含在所附的权利要求书所定义的本发明的精神与范围内的所有替代品、修正及等效物。
 附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中提及的发光二极管粗化过程中出现过蚀刻的示意图。
图2为实施例1中涉及的外延结构的示意图。
图3为实施例1中涉及的微发光二极管的示意图。
图4为实施例1中涉及的微发光元件的示意图。
图5为实施例2中涉及的微发光二极管的示意图。
图6~图13为实施例3中所涉及的微发光元件的制备过程的结构示意图。
图14为实施例4中所涉及的微发光二极管的结构示意图。
图15为实施例5中所涉及的微发光二极管的结构示意图。
图16为实施例6中所涉及的微发光二极管的结构示意图。
图17为实施例8中所涉及的显示面板的示意图。
图18为实施例3中微发光二极管的发光亮度的测试数据与传统结构的对比。
图19为本发明实施例1中第一子层的Al含量为40%时的微发光二极管的SEM图。
图20为本发明实施例1中第一子层的Al含量为60%时的微发光二极管的SEM图。
图21为本发明实施例7中所涉及的微发光二极管的结构示意图。
图22为本发明实施例7中所涉及的另一微发光二极管的结构示意图。
附图标记：生长衬底：100；缓冲层：101；蚀刻截止层：102；第一半导体层：103；第一子层：103a；第二子层：103b；第三子层：103c；第一覆盖层：104；有源层：105；第二覆盖层：106；电流扩展层：107；欧姆接触层：108；第一电极：109；第一电极的欧姆接触电极：109a；第一电极的焊盘电极：109b；第二电极：110；第二电极的欧姆接触电极：110a；第二电极的焊盘电极：110b；绝缘保护层：111；桥臂：210；牺牲层：220；键合层：230；基板：240；基架：250；S1：第一表面；S2：第二表面；A1：第一台面；A2：第二台面。
 本发明的实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应当理解，本发明所使用的术语仅出于描述具体实施方式的目的，而不是旨在限制本发明。进一步理解，当在本发明中使用术语“包含”、“包括"时，用于表明陈述的特征、整体、步骤、元件、和/或的存在，而不排除一个或多个其他特征、整体、步骤、元件、和/或它们的组合的存在或增加。
除另有定义之外，本发明所使用的所有术语（包括技术术语和科学术语）具有与本发明所属领域的普通技术人员通常所理解的含义相同的含义。应进一步理解，本发明所使用的术语应被理解为具有与这些术语在本说明书的上下文和相关领域中的含义一致的含义，并且不应以理想化或过于正式的意义来理解，除本发明中明确如此定义之外。
实施例 1
本实施例提供一种发光二极管及其制造方法，可解决现有技术中第一半导体层的(Al XGa 1-X) YIn 1-YP材料的Al组分高，容易被粗化溶液粗化，粗化表面的粗糙度 (Ra值)较小，影响发光二极管的出光效率；同时Al组份越高，粗化越快，制程的稳定性越差，容易出现粗化过深的问题，提升发光二极管的出光面的粗糙度，从而提升发光二极管的出光效率，同时可提升发光二极管的可靠性。
图2为较佳实施例的LED外延结构的示意图，所述LED外延结构包括：生长衬底100；半导体外延叠层，包含依次层叠于所述生长衬底100之上的第一半导体层103、第二半导体层、有源层105和第三半导体层；所述第一半导体层103自远离衬底的方向依次包括第一子层103a、第二子层103b和第三子层103c，所述第一子层103a和第二子层103b具有包含Al的化合物半导体材料，且所述第一子层103a的Al组分的含量低于所述第二子层103b的Al组分的含量。所述第三子层103c和第二子层103b具有包含Al的化合物半导体材料，且所述第三子层103c的Al组分的含量低于所述第二子层103b的Al组分的含量。
具体地，参照图2，生长衬底100的材料包括但不限于GaAs，也可采用其他材料，例如GaP、InP等。在本实施例中以GaAs生长衬底100为例。可选地，在生长衬底100与第一半导体层103之间还依次设置有缓冲层101、蚀刻截止层102；其中，由于缓冲层101的晶格质量相对生长衬底100晶格质量好，因而，在成长衬底100上生长缓冲层101有利于消除生长衬底100晶格缺陷对半导体外延叠层的影响；蚀刻截止层102用于后期步骤化学蚀刻的截止层，在一些可选的实施例中，蚀刻截止层102为N型刻蚀截止层300，材料为N-GaInP；在一些可选的实施例中，蚀刻截止层102为P型蚀刻截止层，材料为P-GaInP。为了便于生长衬底100的后续移除，较佳的设置较薄的蚀刻截止层102，其厚度控制在500nm以内，更优选的为200nm以内。
参照图2，第一半导体层103设置于蚀刻截止层102的表面之上。所述第一半导体层103自远离衬底的方向依次包括第一子层103a，第二子层103b和第三子层103c。
可选地，所述第一半导体层103的第一子层103a由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，第二子层103b由组合式(Al X2Ga 1-X2) Y2In 1-Y2P的化合物半导体材料组成，其中所述0＜X1＜X2≤1。优选地，X2- X1的取值范围为 0.1~0.35。
在一些可选的实施例中，所述第一子层中X1的范围为0.35~0.45。所述第二子层中X2的范围为0.5~0.7。所述第一子层103a中的Al组分的含量设置较低，可保证后续第一子层103a的粗化蚀刻速率较慢，粗化后的表面粗糙度Ra值较大，从而提升半导体发光元件的出光效率；同时可防止第一子层103a的粗化过程中过蚀刻现象的发生，从而提升半导体发光元件的可靠性。图19为第一子层Al含量为40%时微发光二极管的粗化表面SEM图，图19中粗化表面的粗糙度约为170nm。图20为第一子层Al含量为60%时微发光二极管的粗化表面SEM图，图20中粗化表面的粗糙度为275nm。从图19和图20测试数据比对可以看出，第一子层采用较低Al的含量，可得到表面粗糙度Ra值较大的粗化表面，提升微发光二极管的出光效率，从而提升微发光二极管的发光亮度。因此，本发明实施例中第一子层的Al含量设置为0.35~0.45，以得到较大粗糙度的粗化表面，提升微发光二极管的发光效率。
在一些可选的实施例中，所述第三子层103c由组合式(Al X3Ga 1-X3) Y3In 1-Y3P的化合物半导体材料组成，其中所述X3的范围为0.35~0.45。
第一半导体层103由Al组分含量不同的三个子层组成，可提升电流的横向扩展，提升电流扩展的均匀性，同时第二子层的较高Al组分含量的设置可减少第一半导体层的第二子层103b的吸光效应，提升半导体发光器件的发光效率。第三子层103c采用低于第二子层103b的Al组分的含量设置，可降低半导体发光元件中的第一电极109与第三子层103c的接触电阻，提升其欧姆接触的效果，从而降低电压，提升半导体发光元件的发光效率。
在一些可选的实施例中，外延生长完所述第一子层103a的厚度为1~3μm，优选为1.5μm以上，通过蚀刻粗化后剩余的第一子层103a的厚度为0~0.5μm。所述第二子层103b的厚度为0.5~4μm，优选为0.8μm以上，2μm以下，一定厚度的第二子层可提升电流扩展的均匀性。第三子层的厚度为1~2μm。第一半导体层的厚度大小与电流的扩展能力有关，一定厚度的第一半导体层可保证电流的均匀扩展，从而提升微发光二极管的光电性能。所述第一半导体层可设置为n型或者p型，其三个子层的掺杂浓度可设置为相同或者不同，其掺杂浓度为1E18~4E18/cm 3。所述第一半导体层的掺杂类型与蚀刻截止层的掺杂类型相同。
所述第二半导体层和第三半导体层分别包括为有源层105提供电子或空穴的第一覆盖层104和第二覆盖层106，如铝镓铟磷或铝铟磷或铝镓砷。更优选的，所述有源层105材料为铝镓铟磷或铝铟磷或镓铟磷的情况下，铝铟磷作为第一覆盖层104和第二覆盖层106提供空穴和电子。所述第二半导体层中的第一覆盖层104和第一半导体层103、蚀刻截止层102的掺杂类型相同，可为n型或者p型；第三半导体层中的第二覆盖层106和第一覆盖层104的掺杂类型相反。在一些可选的实施例中，所述蚀刻截止层102，第一半导体层103、第一覆盖层104为n型，第二覆盖层106的掺杂类型为p型，反之亦然。
在一些可选的实施例中，优选所述第一覆盖层104的厚度为0.2~1.2微米；更优选的是，所述第一覆盖层104的厚度为0.3~0.5μm，通过调整第一覆盖层104的厚度，可以降低材料的内阻，从而降低半导体发光元件的电压，提升半导体发光元件的亮度；第一覆盖层104的掺杂浓度为6E17~6E18/cm 3。优选所述第二覆盖层106的厚度为0.2~1.2微米；更优选的是，所述第二覆盖层106的厚度为0.4~0.6μm，通过调整第二覆盖层106的厚度，可以降低材料的内阻，从而降低半导体发光元件的电压，提升半导体发光元件的亮度；第二覆盖层107的掺杂浓度为7E17~6E18/cm 3。
有源层105为电子和空穴复合提供光辐射的区域，根据发光波长的不同可选择不同的材料，有源层105可以是单量子阱或多量子阱的周期性结构。有源层105包含阱层和垒层，其中垒层具有比阱层更大的带隙。通过调整有源层105中半导体材料的组成比，以期望辐射出不同波长的光。本实施例中，优选有源层105辐射550~950nm波段的光，如红、黄、橙、红外光。有源层105为提供电致发光辐射的材料层，如铝镓铟磷或铝铟磷或铝镓砷，更优选的为铝镓铟磷，铝镓铟磷为单量子阱或者多量子阱。本实施例中，优选所述半导体外延叠层辐射红光。
半导体外延叠层可以通过物理气相沉积(Physical Vapor Deposition，PVD)、化学气相沉积(Chemical Vapor Deposition，CVD)、外延生长(Epitaxy Growth Technology)和原子束沉积 (Atomic Layer Deposition，ALD)等方式形成在生长衬底上。
为了提升第三半导体层的电流扩展性，所述第三半导体层包含电流扩展层107，优选所述电流扩展层107的材料为GaP，厚度为0.2~1.5μm。在本实施例中，优选所述电流扩展层107的厚度为0.3~1.0μm，减薄所述电流扩展层的厚度，可减少电流扩展层的吸光，从而提升半导体发光元件的亮度；优选所述电流扩展层的掺杂浓度为9E17~4 E18/cm 3。
所述第三半导体层还包含欧姆接触层108，优选所述欧姆接触层108的材料为GaP，所述欧姆接触层108的厚度为0.03~0.1μm；掺杂浓度优选为7E18/cm 3以上，更优选的为9 E18/cm 3，以实现良好的欧姆接触。
所述电流扩展层107和欧姆接触层108的掺杂类型与第二覆盖层106的掺杂类型相同。
图3显示了一种微发光二极管的示意图，所述微发光二极管采用图2所示的外延结构，所述微发光二极管指的是微米级的发光二极管，由于微发光二极管的尺寸较小，因此其制作工艺跟传统发光二极管具有很大的区别，在本发明中的微发光二极管主要指尺寸，包含长度、宽度或者高度的范围为从大于等于2μm到小于5μm，从大于等于5μm到小于10μm，从大于等于10μm到小于20μm，从大于等于20μm到小于50μm或从大于等于50μm到小于等于100μm。该微型发光二极管可以广泛运用于显示等领域。
如图3所示，所述微发光二极管包括：半导体外延叠层，具体相对的第一表面S1和第二表面S2，依次包含第一半导体层103、第二半导体层、有源层105、第三半导体层；所述第一半导体层103自第一表面S1至第二表面S2包含第一子层103a，第二子层103b和第三子层103c，所述第一子层103a提供第一表面S1，所述第一表面S1为粗化的表面，所述第二子层103b比第一子层103a更靠近第二表面S2。所述微发光二极管还包含第一台面A1，由所述半导体外延叠层凹陷露出的第一半导体层构成，第二台面A2，由所述第三半导体层构成；第一电极109，形成于第一台面A1之上，与所述第一半导体层的第三子层103c形成电连接；第二电极110，形成于第二台面A2之上，与所述第三半导体层中的欧姆接触层108形成电连接。所述第二半导体层包括第一覆盖层104；所述第三半导体层包括第二覆盖层106、电流扩展层107和欧姆接触层108。
所述第一半导体层的第一子层103a的平均Al含量低于第二子层103b的平均Al含量。
可选地，所述第一半导体层的第一子层由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，第二子层由组合式(Al X2Ga 1-X2) YIn 1-Y2P的化合物半导体材料组成，其中所述0≤X1＜X2≤1。优选地，X2-X1的取值范围为0.1~0.35。
在一些可选的实施例中，所述第一子层中X1的范围为0.35~0.45。所述第二子层中X2的范围为0.5~0.7。所述第一子层中的Al组分的含量设置较低，可保证后续第一子层的粗化蚀刻速率较慢，粗化后的表面粗糙度Ra值较大，从而提升半导体发光器件的出光效率；同时可防止粗过第一子层过程中出现过蚀刻现象的发生，从而提升半导体发光器件的可靠性。
所述第一半导体层的第三子层103c位于第二子层103b之上，所述第三子层103c和第二子层103b具有包含Al的化合物半导体材料，且所述第三子层的Al组分的含量低于所述第二子层的Al组分的含量。在一些可选的实施例中，所述第三子层103c由组合式(Al X3Ga 1-X3) Y3In 1-Y3P的化合物半导体材料组成，其中所述X3的范围为0.35~0.45。
第一半导体层由Al组分含量不同的三个子层组成，可提升电流的横向扩展，提升电流扩展的均匀性，同时第二子层的较高Al组分含量的设置可减少第一半导体层的第二子层的吸光，提升半导体发光器件的发光效率。第三子层采用低于第二子层的Al组分的含量设置，可降低半导体发光元件中的第一电极与第三子层的接触电阻，提升其欧姆接触的效果，从而降低电压，提升发光效率。
为了提升微发光二极管的发光效率，一般通过对出光面进行粗化提升其取光效率。参见图3，所述第一半导体层的第一子层103a提供第一表面S1，所述第一表面S1为粗化的表面，第一表面S1为微发光二极管的出光面。通过蚀刻工艺形成图形面或粗化面，其中图形面可以是蚀刻获得规则的图形或者不规则的图形。粗化面可具有规则的表面结构或者任意的不规则的表面微纳米结构，粗化面或图形面实质上为有源层105辐射的光能够更加容易的逃逸出去，提高出光效率。第一表面S1粗化形成的表面结构的高度差(或者高低差)低于1微米，优选地为100~300nm，即第一表面S1的粗糙度Ra值为100~300nm。更优选，所述第一表面S1的粗糙度Ra值为200~300nm。
所述第一半导体层第一子层103a的厚度为0~0.5μm，所述第二子层103b的厚度为0.5~4μm，优选的为0.8μm以上，2μm以下。所述第三子层103c的厚度为1~2μm。通过设置一定厚度的第一半导体层103可保证电流的均匀扩展，提升微发光二极管的出光效率。
所述微发光二极管还包含第一电极109和第二电极110。所述第一电极109与第一半导体层的第三子层103c形成欧姆接触，所述第一电极109为导电型金属，可以选择自金、铂或银等，或者为透明导电氧化物，具体的可以为ITO，ZnO等；更优选的，第一电极109可为多层材料，如至少包括金锗镍、金铍、金锗、金锌等至少之一的合金材料，更优选的，第一电极109还可以包括一反射性金属将有源层辐射的光反射回半导体外延叠层，并从出光侧出光。
所述第二电极110为了与第三半导体层中的欧姆接触层108形成良好的欧姆接触，优选所述第二电极110与欧姆接触层108的材料可以为导电型金属如金、铂或银等；更优选的，第二电极110可以包括多层材料，其中至少包括金锗镍、金铍、金锗、金锌等至少之一的合金材料。更优选的，为了改善第二电极110与欧姆接触层108一侧的欧姆接触效果，可以至少包括一能够扩散至欧姆接触层108一侧的金属以改善欧姆接触电阻，为了促进扩散可以选择至少300℃以上的熔合。该扩散金属为可以直接接触欧姆接触层108一侧的金属，如金，铂或银等。
为了提高微发光二极管的可靠性，在所述微发光二极管的第一台面、第二台面和侧壁上具有绝缘保护层111，所述绝缘保护层111为单层或者多层结构，由SiO 2，SiN x，Al 2O 3，Ti 3O 5的至少一种材料形成。在一些可选的实施例中，所述绝缘保护层111为布拉格反射层结构，例如绝缘保护层111由Ti 3O 5和SiO 2两种材料交替堆叠形成。在本实施例中，所述绝缘保护层111的材料可以采用SiNx或者SiO 2，厚度为0.5μm以上。
本实施例中，所述第一电极109和第二电极110位于出光侧的相反侧，第一电极109和第二电极110可以通过出光侧的相反侧与外部电连接件进行接触，形成倒装的结构。因此所述的第一电极109和第二电极110还包括顶部的焊盘金属，焊盘金属可以是如金、铝或银等至少一层，以实现第一电极109和第二电极110的固晶。第一电极109和第二电极110可以等高或不等高，在厚度方向上第一电极和第二电极的焊盘金属层不重叠。
图4为使用本实施例的微发光二极管形成的微发光元件的示意图，所述微发光元件还包含支撑微发光二极管的基架250，所述基架250位于微发光二极管的下侧，用于连接微发光二极管和基架250的桥臂210；所述基架250包含基板240和键合层230，所述键合层230的材料为BCB胶、硅胶、UV紫外胶或者树脂，桥臂210的材料包含介电质、金属或者半导体料，在一些实施例中，绝缘保护层111的水平部分111-1可作为桥臂210，跨接在键合层230上，连接微发光二极管和基架250。
微发光二极管通过印刷印模转印与基架250分离，印刷印模材料为PDMS、硅胶、热解胶或UV紫外胶。在一些情况下，微发光二极管与基架之间具有牺牲220，至少在特定情况下牺牲层220的移除效率高于微发光二极管，特定情况包括化学分解或物理分解，例如紫外光分解、蚀刻移除或者冲击移除等。
实施例 2
与实施例1中图4所述的微发光元件相比，如图5所示，所述微发光二极管通过键合层230键合在基板上240上，键合层可为BCB胶或者PI，基板240可为蓝宝石衬底。本实施例中的微发光元件可通过激光剥离等方式转移到封装基板上（图中未示出）。
实施例 3
图6~图13显示了根据本实施例1中的微发光元件的制造过程示意图，下面结合示意图对本实施例的微发光二极管的制造方法进行详细的描述。
首先，参见图2，提供一个外延结构，其具体包括以下步骤：提供生长衬底100，通过磊晶工艺如MOCVD外延生长半导体外延叠层，半导体外延叠层包括依次层叠在生长衬底100表面的缓冲层101以及蚀刻截止层102，用于移除外延生长衬底100，然后生长第一半导体层103，第一覆盖层104，有源层105，第二覆盖层106，电流扩展层107和欧姆接触层108。第一半导体层包括远离生长衬底100方向的第一子层103a，第二子层103b和第三子层103c。
本实施例生长衬底100采用常用的GaAs衬底，并根据生长衬底100设置缓冲层101的材料，应当注意的是，生长衬底100并不局限于GaAS，也可采用其他材料，例如GaP、InP等，对应的其上的缓冲层101的设置及材料可根据具体的生长衬底100进行选取。在缓冲层101上设置蚀刻截止层102，例如GaInP，为了便于后续生长衬底100的后续移除，较佳的设置较薄的蚀刻截止层102，其厚度控制在500nm以内，更优选的为200nm以内。
在本实施例中，所述第一半导体层的第一子层由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，优选X1的范围为0.35~0.45；所述第二子层由组合式(Al X2Ga 1-X2) Y2In 1-Y2P的化合物半导体材料组成，优选X2的范围为0.5~0.7；所述第三子层103c由组合式(Al X3Ga 1-X3) Y3In 1-Y3P的化合物半导体材料组成，其中所述X3的范围为0.35~0.45。
在本实施例中，所述第一子层的103a的厚度为1~3μm；优选为1.5μm以上，第一子层的厚度为保证后续粗化过程的进行，以得到较大粗糙度的粗化表面。第二子层103b的厚度为0.8~4μm；第三子层103c的厚度为1~2μm。第一半导体层的总厚度与电流的扩展能力有关，生长一定厚度的第一半导体层，可提升电流的均匀扩展，从而提升微发光二极管的光电性能。
在本实施例中，第一覆盖层104的作用为MQW提供空穴，优选材料为AlInP，厚度为0.2~1.2μm；P型掺杂常见的是Mg掺杂，也不排除其他的元素等效替代的掺杂。有源层105为多量子阱，材料为Al n1Ga 1-n1InP/Al n2Ga 1-n2InP(0≤n1≤n2≤1)的重复堆叠的阱和垒的结构。
第二覆盖层106优选材料为AlInP，厚度为0.2~1.2μm；电流扩展层107的扩展能力与厚度有关，优选厚度在0.3μm以上，0.6μm以下。本实施例中优选所述电流扩展层107的厚度范围为0.2~1.5μm。本实施例中优选电流扩展层107材料为GaP，n型掺杂浓度为9E17~4 E18/cm 3；欧姆接触层108优选材料为 GaP，厚度为 0.03~0.1μm；n型掺杂浓度为5E18~5E19/cm 3，更优选的为9 E18/cm 3以上。
然后，参见图6，通过干法蚀刻方式移除部分的半导体外延叠层形成第一台面A1和第二台面A2，第一台面A1，由半导体外延叠层凹陷露出的第一半导体层构成，第二台面A2，由第三半导体层构成；形成侧壁，位于半导体外延叠层外边缘，位于第一台面A1和第二台面A2之间。
接着，参见图7，分别在第一台面和第二台面上分别制作第一电极109和第二电极110；其中第一电极109和第二电极110包括欧姆接触电极109a和110a，在欧姆接触部分上覆盖绝缘保护层111，并在绝缘保护层111上方开口形成焊盘电极109b和110b分别与欧姆接触部分109a和110a接触。所述欧姆接触部分109a和110a的材料可以例如Au/AuZn/Au，在本步骤中可对欧姆接触部分109a和110a进行熔合，使其与半导体外延叠层构形成良好的欧姆接触。所述绝缘保护层111优选采用SiNx或者SiO 2，厚度为0.5μm以上。在其它可选的实施例中，所述绝缘保护层 111可采用布拉格反射层结构，由两种不同折射率的材料交替堆叠形成。
接着，参见图8，在所述微发光二极管的表面上覆盖牺牲层220；较佳地，覆盖在侧壁上的牺牲层220的厚度为1μm以上，牺牲层220的材料可为氧化物、氮化物或者可选择性地相对于其他层被移除的材料。
接着，参见图9，在所述微发光二极管的牺牲层220上键合胶，如BCB胶，形成键合层230；
接着，参见图10，将分布微发光二极管的晶圆键合到基板240上。
接着，参见图11，剥离生长衬底100，移除缓冲层101和蚀刻截止层102。
接着，参见图12，通过掩膜和蚀刻，移除微发光二极管边缘的第一类型半导体层，蚀刻停在绝缘保护层111上，形成独立芯粒，便于后续芯粒的分离。
接着，为了提升微发光二极管的出光效率，对第一半导体层第一子层103a进行粗化处理，得到具有粗化表面的微发光二极管，如图13所示。
最后，所述形成的微发光二极管利用转印压印从基板240分离并转印至封装基板上（图中未示出）。
利用本实施例中制造方法制造微发光二极管芯片，芯片水平尺寸为15*25μm，单颗芯片封装之后，进行发光亮度随电流变化测试，如图19所示，在1uA低电流条件下，发光亮度提升23%。
实施例 4
与实施例1中图3所示的微发光二极管相比，如图14所示，所述第一电极109和第二电极110不同侧，本实施例中所述微发光二极管为垂直结构。所述第一半导体层103远离有源层106的一侧为出光面，所述欧姆接触层108和第二电极110之间可覆盖反射性金属或反射性绝缘介质层（图中未示出），对自有源层106辐射并穿透第三半导体层的部分光线反射回半导体外延叠层，并从出光侧出光。
实施例 5
与实施例1中图3所示的微发光二极管相比，如图15所示，所述第一半导体层103由第一子层103a和第二子层103b组成，所述第一子层103a提供第一表面S1，所述第一表面S1为粗化面，所述有源层106辐射的光线从第一表面S1射出。所述第一电极109与第二子层103b接触。在可选的实施例中，所述第一子层103a由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，优选X1的范围为0.35~0.45；所述第二子层由组合式(Al X2Ga 1-X2) Y2In 1-Y2P的化合物半导体材料组成，优选X2的范围为0.5~0.7。所述第一子层103a的厚度为0~0.5μm，第二子层103b的厚度为0.8~4μm，优选为1.5μm以上，更优选的为2μm以上，以保证电流的均匀扩展性。本实施例中所述第一子层中的Al组分的含量设置较低，可保证后续第一子层的粗化蚀刻速率较慢，粗化后的表面粗糙度Ra值较大，从而提升半导体发光器件的出光效率；同时可防止粗过第一子层过程中出现过蚀刻现象的发生，从而提升半导体发光器件的可靠性。
实施例 6
与实施例4中图14所示的微发光二极管相比，如图16所示，所述第一半导体层103由第一子层103a和第二子层103b组成，所述第一子层103a提供第一表面S1，所述第一表面S1为粗化面，所述有源层106辐射的光线从第一表面S1射出。所述第一电极109与第一子层103a接触。在可选的实施例中，所述第一子层103a由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，优选X1的范围为0.35~0.45；所述第二子层由组合式(Al X2Ga 1-X2) Y2In 1-Y2P的化合物半导体材料组成，优选X2的范围为0.5~0.7。所述第一子层103a的厚度为0~0.5μm，第二子层103b的厚度为0.8~4μm，优选为1.5μm以上，更优选的为2μm以上，以保证电流的均匀扩展性。本实施例中所述第一子层中的Al组分的含量设置较低，可保证后续第一子层的粗化蚀刻速率较慢，粗化后的表面粗糙度Ra值较大，从而提升半导体发光器件的出光效率；同时可防止粗过第一子层过程中出现过蚀刻现象的发生，从而提升半导体发光器件的可靠性。
实施例 7
与实施例1中图3所示的微发光二极管相比，如图21所示，所述第一半导体层提供第一表面，第一表面为粗化表面，所述第一半导体层的Al含量为35%~45%，第一半导体层的厚度为2.5~6μm，优选为2.8~4.5μm，一定厚度的第一半导体层的厚度以保证电流的均匀扩展，提升微发光二极管的光电性能。本实施例中第一半导体层的Al含量设置为35%~45%，如前所述，可得到较大粗糙度的粗化表面，提升微发光二极管的出光效率，同时可解决现有技术中过蚀刻造成的粗化过深的问题，提升微发光二极管的可靠性。图21中所示微发光二极管为倒装型发光管。本实施例的第一半导体层的结构设计同样适用于垂直型发光二极管中，如图22所示，同样可解决现有技术中的问题，得到高发光效率和可靠性的微发光二极管。
实施例 8
本实施例提供一种显示面板300，请参考图17，显示面板300包述括如前述任意实施例的多个阵列排布的微型发光二极管，在图17中用放大显示的示意方式显示了一部分微型发光二极管1。
本实施例中，显示面板300为智能手机的显示屏对应的显示面板。其它实施例中，显示面板也可以是其它各类电子产品的显示面板，如电脑显示屏的显示面板，或者智能穿戴电子产品显示屏的显示面板等。
由于具有前述各实施例的微型发光二极管（微型发光二极管1），显示面板300具有前述各实施例微型发光二极管带来的优点。
本发明提供一种发光二极管及其制造方法，可解决现有技术中第一半导体层的(Al XGa 1-X) YIn 1-YP材料的Al组分高，容易被粗化溶液粗化，其中表面粗糙度(Ra值)会比较小，从而影响发光二极管的出光效率；同时Al组份越高,粗化越快,制程的稳定性会越差，容易出现粗化过深的问题，提升发光二极管的出光面的粗糙度，提升发光二极管的出光效率，从而提升发光二极管的亮度，同时可提升发光二极管的可靠性。第一半导体层由不同Al含量的子层组成，可提升电流扩展的均匀性，提升半导体发光元件的发光效率。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (30)

  1. 发光二极管，包括：
    半导体外延叠层，包含相对的第一表面和第二表面，包含第一半导体层、第二半导体层和第三半导体层，以及位于所述第二半导体层和第三半导体层之间的有源层；
    其特征在于：所述第一半导体层包括第一子层和第二子层，其中第一子层提供第一表面，第一表面为粗化的表面，第二子层相对第一子层更靠近第二表面，
    所述第一子层和第二子层具有包含Al的化合物半导体材料，并且第一子层的Al组分的含量低于所述第二子层的Al组分的含量。
  2. 根据权利要求1所述的发光二极管，其特征在于：所述第一子层由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，第二子层由组合式(Al X2Ga 1-X2) YIn 1-Y2P的化合物半导体材料组成，其中所述 0＜X1＜X2≤1，且所述X1和X2的差异介于0.1和0.35之间。
  3. 根据权利要求2所述的发光二极管，其特征在于，所述第一子层中X1的范围为0.35~0.45。
  4. 根据权利要求2所述的发光二极管，其特征在于：所述第二子层的X2的范围为0.5~0.7。
  5. 根据权利要求1所述的发光二极管，其特征在于：所述第一子层的厚度范围为0~0.5um。
  6. 根据权利要求1所述的发光二极管，其特征在于：所述第二子层的厚度范围为0.8~4um。
  7. 根据权利要求1所述的发光二极管，其特征在于：所述第一子层的粗化的第一表面的粗糙度Ra值为100~300nm。
  8. 根据权利要求7所述的发光二极管，其特征在于：所述第一子层的粗化的第一表面的粗糙度Ra值为200~300nm。
  9. 根据权利要求1所述的发光二极管，其特征在于：所述第一半导体层还包含第三子层，所述第三子层位于所述第二子层之上，且较第二子层靠近第二表面。
  10. 根据权利要求9所述的发光二极管，其特征在于：所述第三子层跟第二子层具有包含Al的化合物半导体材料，所述第三子层的Al含量低于第二子层的Al含量。
  11. 根据权利要求9所述的发光二极管，其特征在于：所述第三子层由组合式(Al X3Ga 1-X3) Y3In 1-Y3P的化合物半导体材料组成，其中所述 X3的范围为0.35~0.45。
  12. 根据权利要求9所述的微发光二极管，其特征在于：所述第三子层的厚度为1~2μm。
  13. 根据权利要求9所述的微发光二极管，其特征在于：所述第二子层的厚度为0.8~2μm。
  14. 根据权利要求1所述的发光二极管，其特征在于：还包含绝缘保护层，形成于所述半导体外延叠层的表面和侧壁。
  15. 根据权利要求1所述的发光二极管，其特征在于：所述发光二极管具有从2μm到5μm、5μm到10μm、10μm到20μm、20μm到50μm或从50μm到100μm的宽度或长度或高度。
  16. 发光二极管，包括：
    半导体外延叠层，包含相对的第一表面和第二表面，包含第一半导体层、第二半导体层和第三半导体层，以及位于所述第二半导体层和第三半导体层之间的有源层；所述第一半导体层提供第一表面，第一表面为粗化的表面；
    其特征在于：所述第一半导体层的Al含量为35%~45%。
  17. 根据权利要求16所述的发光二极管，其特征在于：所述第一半导体层的厚度是2.8~4.5μm。
  18. 发光二极管的制备方法，包括：
    (1)   提供一生长衬底，在所述生长衬底上形成半导体外延叠层，自远离衬底的方向包括第一半导体层，有源层，第二半导体层和第三半导体层；所述第一半导体层自远离衬底的方向包括第一子层和第二子层；所述第一子层和第二子层具有包含Al的化合物半导体材料，且所述第一子层的Al组分的含量低于所述第二子层的Al组分的含量。
    (2)   去除所述生长衬底，露出所述的第一半导体层的第一子层，利用蚀刻方式粗化第一半导体层的第一子层，所述第一子层的第一表面形成粗化表面。
  19. 根据权利要求18所述的发光二极管的制备方法，其特征在于：所述粗化的第一子层的表面的粗糙度Ra值为100~300nm。
  20. 根据权利要求19所述的发光二极管的制备方法，其特征在于：所述粗化的第一子层的表面的粗糙度Ra值为200~300nm。
  21. 根据权利要求18所述的发光二极管的制备方法，其特征在于：所述第一子层由组合式(Al X1Ga 1-X1) Y1In 1-Y1P的化合物半导体材料组成，第二子层由组合式(Al X2Ga 1-X2) YIn 1-Y2P的化合物半导体材料组成，其中所述0＜X1＜X2≤1，且所述X1和X2的差异介于0.1和0.35之间。
  22. 根据权利要求21所述的发光二极管的制备方法，其特征在于，所述第一子层中X1的范围为0.35~0.45。
  23. 根据权利要求21所述的发光二极管的制备方法，其特征在于：所述第二子层的X2组分的含量范围为0.5~0.7。
  24. 根据权利要求18所述的发光二极管的制备方法，其特征在于：还包括在所述第一半导体层的第二子层之上形成第三子层，所述第三子层较第二子层靠近第二表面。
  25. 根据权利要求24所述的发光二极管的制备方法，其特征在于：所述第三子层跟第二子层具有包含Al的化合物半导体材料，所述第三子层的Al含量低于第二子层的Al含量。
  26. 根据权利要求25所述的发光二极管的制备方法，其特征在于：所述第三子层由组合式(Al X3Ga 1-X3) Y3In 1-Y3P的化合物半导体材料组成，其中所述X3的范围为0.35~0.45。
  27. 根据权利要求18所述的发光二极管的制备方法，其特征在于：还包括形成第一电极和第二电极，所述第一电极和第二电极分别与所述第一半导体层和第三半导体层形成电性连接。
  28. 根据权利要求18所述的发光二极管的制备方法，其特征在于：还包括在所述半导体外延叠层的表面和侧壁形成绝缘保护层。
  29. 根据权利要求18所述的发光二极管，其特征在于：所述发光二极管具有从2μm到5μm、5μm到10μm、10μm到20μm、20μm到50μm或从50μm到100μm的宽度或长度或高度。
  30. 一种显示面板，特征在于：包含权利要求1~17所包含的发光二极管。
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