WO2023087143A1 - 一种视频传输方法和装置 - Google Patents

一种视频传输方法和装置 Download PDF

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Publication number
WO2023087143A1
WO2023087143A1 PCT/CN2021/130953 CN2021130953W WO2023087143A1 WO 2023087143 A1 WO2023087143 A1 WO 2023087143A1 CN 2021130953 W CN2021130953 W CN 2021130953W WO 2023087143 A1 WO2023087143 A1 WO 2023087143A1
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Prior art keywords
character
check
symbol
data
target
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PCT/CN2021/130953
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English (en)
French (fr)
Inventor
周伟光
杜思清
陈杭洲
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华为技术有限公司
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Priority to PCT/CN2021/130953 priority Critical patent/WO2023087143A1/zh
Publication of WO2023087143A1 publication Critical patent/WO2023087143A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43Hardware specially adapted for motion estimation or compensation

Definitions

  • the present application relates to the field of multimedia technology, in particular to a video transmission method and device in the field of multimedia technology.
  • the video signal transmission interface standard supported inside the existing video display device such as the VBO (V-by-One HS) interface, is between each chip in the video display device, such as a system on chip (system on chip, SOC) chip and Between picture quality (PQ) chips, or between SOC chips and timing controller (timing controller, TCON) chips, or between PQ chips and TCON chips, only a single video data stream is supported. That is to say, only a single video data stream can be transmitted between two chips through a set of VBO interfaces.
  • VBO V-by-One HS
  • each video data stream requires a set of independent video signal transmission interfaces, which will cost a lot.
  • the present application provides a video transmission method and device, capable of transmitting at least one video data stream through a set of video signal transmission interfaces, which is beneficial to reduce costs.
  • the present application provides a video transmission method, which may include: performing link coding on at least one video data stream to obtain at least one target data, and each video data stream in the at least one video data stream includes multiple symbols, the symbol type of the symbol includes a control symbol or a valid data symbol, each object data in the at least one object data includes a first synchronization header and an object character, and the object character includes at least two symbols in the plurality of symbols , the first synchronization header is used to indicate the video data stream to which the target character belongs and the character type of the target character, where the character type includes control character or data character; sending the at least one target data to the receiving end.
  • this method can be performed by the sending end.
  • the method may be executed by a video transmission device at the sending end.
  • the sending end adds a first synchronization header to each target character in at least one video data stream, and the first synchronization header is used to indicate the video data stream to which each target character belongs and The character type of each target character, and sending the target character with the first synchronization header added to the receiving end, so that the at least one video data stream can be transmitted through a set of video signal transmission interfaces, which is beneficial to reduce cost overhead.
  • the number of at least one video data stream described in this application may be one, two or more than two, which is not limited in this application.
  • the present application does not limit the source of the at least one video data stream.
  • the 1 video data stream may be a video data stream formed by an original video image (or an original video image sequence).
  • the 2 video data streams may include 2 video data streams formed by original video images (or original video image sequences).
  • these 2 video data streams may include 1 video data stream and a backlight image (or backlight image sequence) formed by the original video image (or original video image sequence) A video data stream formed.
  • control symbol described in the embodiment of the present application may be a symbol formed by control data such as a vertical blanking character, a horizontal blanking character, or a video start character.
  • the valid data symbol described in the embodiment of the present application may be a symbol formed by valid data such as blanking area data or pixel area data.
  • the length of various symbols (such as control symbols, valid data symbols, etc.) described in this application can be 16 bits (bits), that is, the length of 1 symbol is equal to 2 bytes. length.
  • the data in the video frame may be formed into a symbol every 16 bits to form a video data stream.
  • the data needs to be filled (such as filling 0) so that it is exactly an integer multiple of 16, where 0 ⁇ the number of bits of the filled data ⁇ 16, to ensure vertical A blanking character, a horizontal blanking character or a video start character appears at a position aligned with 16 bits, and the padding data is valid data.
  • the video data stream described in this application may be formed by data of multiple video frames included in the video frame sequence.
  • the link coding described in this application may be a 128b/132b link coding.
  • the length of the various synchronization headers (such as the first synchronization header) described in this application can be 4 bits, and the various characters (such as control characters, data characters, etc.) ) can be 128 bits in length, (that is, the length of 1 character is equal to the length of 8 symbols), and the length of the target data described in this application can be 132 bits.
  • the symbols included in the at least one video data stream can be formed into a character every 8 symbols, and the characters are divided into two character types according to whether the character includes a control symbol: data characters and control characters.
  • control character described in the application may include at least two symbols, at least one symbol in the at least two symbols is a control symbol;
  • the data character described in the application may include at least two symbols, the at least Both symbols are valid data symbols.
  • the format of the control character needs to meet the requirement that the first control symbol in the control character is located at the position of the first symbol of the control character, that is, the first symbol of the control character is Control symbols, .
  • control symbol is not necessarily located at the first symbol of the control character, that is, the first symbol of the control character is a valid data symbol.
  • the position and type (or identification) of the first control symbol in the control character A symbol indicates.
  • the first symbol in the control character may indicate the position and type of the first control symbol in the control character in multiple ways, which is not limited in this embodiment of the present application.
  • the first symbol in the control character may include a first byte and a second byte, the first byte is used to indicate the position of the first control symbol, and the second byte byte is used to indicate the type of this first control symbol.
  • the KD_Dis byte of the control character is "00000100", which can indicate that the position of the first control symbol in the control character is the position of symbol 2
  • the K_Type byte of the control character is "00000011”, which can indicate that the first
  • the type of control symbol is video start character (ie 0x03).
  • the first synchronization header may indicate the video data stream to which the target character belongs and the character type of the target character by using 4 bits in various ways, which is not limited in this application.
  • the synchronization header may indicate the video data stream to which the target character belongs through the first bit of the 4 bits, and indicate the character of the target character through the second bit of the 4 bits type.
  • the first bit of the first synchronization header of the target character is "0", which may indicate that the target character Belonging to a data character
  • the first bit being "1” can indicate that the target character belongs to a control character
  • the second bit of the first synchronization header of the target character being "0" can indicate that the target character belongs to video data stream 0
  • the The second bit being "1" may indicate that the target character belongs to video data stream 1.
  • the sending end may perform check coding on the at least one target data to obtain at least one first check symbol; the sending end sends to the receiving end
  • the at least one target data may specifically include: sending a coding block to the receiving end, the coding block including the at least one target data and check data of the at least one target data, the check data including a second synchronization header and a check character , the check character includes an RS symbol and the at least one first check symbol, wherein the second synchronization header is used to indicate the video data stream to which the check character belongs and the character type of the check character, and the RS symbol is used to indicate the position of the first control symbol in the check character in the check character and the type of the first control symbol in the check character.
  • the at least one target data is checked and coded, which increases the reliability of video transmission and ensures the quality of the display screen at the receiving end.
  • the sending end may determine that the at least one target data is correct, so as to obtain the at least one target data.
  • the sender can determine that the at least one target data has an error, and the at least one target data needs to be corrected according to the RS rule.
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the sending end may perform check coding on the target characters of each target data in the at least one target data and some bits of the first synchronization header of each target data, to obtain the at least A first check symbol.
  • the sending end may use various algorithms to perform check encoding on the at least one target data, which is not limited in this application.
  • the sending end may use a Reed-Solomon (RS) algorithm, such as an RS (242, 228) algorithm, to perform check encoding on the at least one target data.
  • RS Reed-Solomon
  • the sending end may send the multiple target data (or coded blocks) to the receiving end in various ways, and this application does not make any limited.
  • the sending end may perform parallel-to-serial conversion on the multiple target data (or coded blocks) to obtain a transmission data stream; and send the transmission data stream to the receiving end.
  • the sender can add a pre-scrambled reset (SR) character or character delineation (CD) character to each P coded block to obtain multiple transmission A data block, wherein P is an integer greater than 1; a transmission data slice is obtained based on Q transmission data blocks, wherein Q is an integer greater than 1; based on at least one transmission data slice, the transmission data flow is obtained; to the receiving end Send the transport stream.
  • SR pre-scrambled reset
  • CD character delineation
  • the sending end converts multiple low-speed parallel signals into high-speed serial signals, and transmits them to the receiving end, and the receiving end reconverts the received high-speed serial signals into low-speed parallel signals.
  • This point-to-point serial communication technology makes full use of the channel capacity of the transmission medium, reduces the number of required transmission channels and device pins, and can increase the transmission speed of video signals, thereby reducing communication costs.
  • the present application also provides another video transmission method, which may include: receiving at least one target data from the sending end, each target data in the at least one target data includes a first synchronization header and a target character, the The target character includes at least two symbols, and the first synchronization header is used to indicate the video data stream to which the target character belongs and the character type of the target character, and the character type includes a control character or a data character; the at least one target data is chained Road decoding, to obtain at least one video data stream, each video data stream in the at least one video data stream includes a plurality of symbols, the symbol type of the symbol includes a control symbol or a valid data symbol, and the plurality of symbols includes the at least two symbol.
  • the method can be executed by the receiving end.
  • the method may be executed by a video transmission device at the receiving end side.
  • the receiving end can restore the at least one video data stream based on the character type of each target character and the video data stream to which each target character belongs.
  • the receiving end receives at least one object data, and based on the first synchronization header in each object data in the at least one object data, determines the target character in each object data belongs to The video data stream and the character type of the target character, and recover the at least one video data stream based on the character type of the target character in each target data and the video data stream to which the target character belongs.
  • the at least one video data stream can be transmitted through a set of video signal transmission interfaces, which is beneficial to reduce costs.
  • the method may also be executed by a video transmission device at the receiving end.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol among the at least two symbols in the at least two symbols and the type of the first control symbol among the at least two symbols are determined by the indicated by the first of the at least two symbols.
  • the receiving at least one target data from the sending end includes: receiving an encoding block from the sending end, where the encoding block includes the at least one target data and check data of the at least one target data, the The check data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video data stream and the check character to which the check character belongs The character type of the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the type of the first control symbol in the check character, the at least A first check symbol is obtained by performing check encoding on the at least one target data; based on the second synchronization header in the check data and the RS symbol in the check data, determine at least one of the check data The first check symbol; perform check encoding on the at least one target data to obtain at least one second check symbol; determine the at least one target based on the at least one first check symbol and the at least one
  • the sending end may determine that the at least one target data is correct, so as to obtain the at least one target data.
  • the sender can determine that the at least one target data has an error, and the at least one target data needs to be corrected according to the RS rule.
  • the at least one target data is checked and coded, which increases the reliability of video transmission and ensures the quality of the display screen at the receiving end.
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple
  • receiving multiple target data from the sending end includes: receiving a transmission data stream from the sending end; performing serial-to-parallel conversion on the transmission data stream , to obtain the multiple target data.
  • the sending end converts multiple low-speed parallel signals into high-speed serial signals, and transmits them to the receiving end, and the receiving end reconverts the received high-speed serial signals into low-speed parallel signals.
  • This point-to-point serial communication technology makes full use of the channel capacity of the transmission medium, reduces the number of required transmission channels and device pins, and can increase the transmission speed of video signals, thereby reducing communication costs.
  • the present application provides a video transmission device, which may include a link encoding unit and a sending unit.
  • the link encoding unit is used to perform link encoding on at least one video data stream to obtain at least one target data, and each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes a control symbol or valid data symbols, each target data in the at least one target data includes a first sync header and a target character, the target characters include at least two symbols in the plurality of symbols, the first sync header is used to indicate the target The video data stream to which the character belongs and the character type of the target character, which includes control characters or data characters.
  • the sending unit is used for sending the at least one target data to the receiving end.
  • the quantity of the at least one video data stream is two or more.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the device may further include a verification coding unit; the verification coding unit is configured to verify the at least one target data before the sending unit sends the at least one target data to the receiving end. Encoding to obtain at least one first check symbol; the sending unit is specifically configured to send an encoding block to the receiving end, the encoding block includes the at least one target data and check data of the at least one target data, and the check data includes A second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video data stream to which the check character belongs and the check character character type, the RS symbol is used to indicate the position of the first control symbol in the check character and the type of the first control symbol in the check character.
  • the verification coding unit is configured to verify the at least one target data before the sending unit sends the at least one target data to the receiving end. Encoding to obtain at least one first check symbol; the sending unit is specifically configured to send an encoding block to the receiving end, the
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple
  • the sending unit is specifically configured to perform parallel-to-serial conversion on multiple target data to obtain a transmission data stream; and send the transmission data stream to the receiving end .
  • the present application also provides another video transmission device, which may include: a receiving unit and a link decoding unit.
  • the receiving unit is used to receive at least one target data from the sending end, each target data in the at least one target data includes a first synchronization header and a target character, the target character includes at least two symbols, and the first synchronization header is used for Indicating the video data stream to which the target character belongs and the character type of the target character, where the character type includes a control character or a data character; sending the at least one target data to the link decoder.
  • the link decoding unit is used to perform link decoding on the at least one target data to obtain at least one video data stream, each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes control symbols or valid data symbols, the plurality of symbols including the at least two symbols.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the apparatus 500 may further include a verification decoding unit; the receiving unit is specifically configured to receive an encoded block from the sending end, where the encoded block includes the at least one target data and the at least one target data Check data, where the check data includes a second synchronization header and a check character, where the check character includes an RS symbol and the at least one first check symbol, wherein the second synchronization header is used to indicate that the check character belongs to The video data stream and the character type of the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the first control symbol in the check character type, the at least one first check symbol is obtained by performing check encoding on the at least one target data; the check decoding unit is configured to based on the second synchronization header in the check data and the RS symbols, determining at least one first check symbol in the check data; performing check encoding on the at least one target data to obtain at least one second check symbol; based on the at least one first check symbol and the at least A
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple
  • the receiving unit is specifically configured to receive the transmission data stream from the sending end; perform serial-to-parallel conversion on the transmission data stream to obtain the multiple target data data.
  • the present application also provides a video transmission device, which may include at least one processor and at least one communication interface, the at least one processor is coupled to the at least one communication interface, and the at least one communication interface uses In order to provide data for the at least one processor, the at least one processor is used to run computer program instructions to execute the video transmission method described in the above first aspect and any possible implementation thereof.
  • the device may be a chip or an integrated circuit.
  • the present application also provides another video transmission device, which may include at least one processor and at least one communication interface, the at least one processor is coupled to the at least one communication interface, and the at least one communication interface
  • the at least one processor is configured to provide data for the at least one processor, and the at least one processor is configured to run computer program instructions to execute the video transmission method described in the above second aspect and any possible implementation thereof.
  • the device may be a chip or an integrated circuit.
  • the present application also provides a video transmission device, which may include: a link encoder and a port; the link encoder is used to perform link encoding on at least one video data stream to obtain at least one target data, the Each video data stream in the at least one video data stream includes a plurality of symbols, the symbol type of the symbol includes a control symbol or a valid data symbol, and each object data in the at least one object data includes a first sync header and an object character, The target character includes at least two symbols in the plurality of symbols, and the first synchronization header is used to indicate the video data stream to which the target character belongs and the character type of the target character, and the character type includes a control character or a data character;
  • the port sends the at least one target data; the port is used for sending the at least one target data to a receiving end.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the device further includes: a verification encoder; the link encoder is specifically configured to send the at least one target data to the verification encoder; the verification encoder is configured to send the at least one Perform check encoding on the target data to obtain at least one first check symbol; send an encoding block to the port, the encoding block includes the at least one target data and the check data of the at least one target data, and the check data includes the second A sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video data stream to which the check character belongs and the character of the check character Type, the RS symbol is used to indicate the position of the first control symbol in the check character in the check character and the type of the first control symbol in the check character; the port is specifically used to send The end sends the encoded block.
  • the link encoder is specifically configured to send the at least one target data to the verification encoder
  • the verification encoder is configured to send the at least one Perform check encoding on
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple, and the port has a parallel-to-serial conversion function; the port is specifically used to perform parallel-to-serial conversion on multiple target data to obtain a transmission data stream; The receiving end sends the transport data stream.
  • the present application provides a video transmission device, which may include: a port and a link decoder; the port is used to receive at least one object data from the sending end, and each object data in the at least one object data includes A first synchronization header and a target character, the target character includes at least two symbols, the first synchronization header is used to indicate the video data stream to which the target character belongs and the character type of the target character, the character type includes a control character or a data character ; Send the at least one target data to the link decoder; the link decoder is used to perform link decoding on the at least one target data to obtain at least one video data stream, and each video data in the at least one video data stream The stream includes a plurality of symbols of a symbol type including control symbols or payload symbols, the plurality of symbols including the at least two symbols.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the device further includes: a verification decoder; the port is specifically configured to receive an encoding block from the sending end, where the encoding block includes the at least one target data and a checksum of the at least one target data data, the verification data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video to which the check character belongs The character type of the data stream and the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the type of the first control symbol in the check character , the at least one first check symbol is obtained by performing check encoding on the at least one target data; sending the encoded block to the link decoder; the link decoder is specifically configured to Two synchronization headers and the RS symbol in the check data, determine at least one first check symbol in the check data; perform check encoding on the at least one target data, and obtain at least one second check symbol;
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple, and the port has a serial-to-parallel conversion function: the port is specifically used to receive the transmission data stream from the sending end; perform serial-parallel conversion on the transmission data stream Convert to get multiple target data.
  • the present application also provides a video transmission system, which may include the video transmission device as described in the above third aspect and any possible implementation thereof, and the above fourth aspect and any possible implementation thereof or, the system may include the video transmission device as described in the above fifth aspect and any possible implementation thereof and the video transmission apparatus as described in the above sixth aspect and any possible implementation thereof A video transmission device; alternatively, the system may include the video transmission device as described in the seventh aspect and any possible implementation thereof, and the video transmission device as described in the eighth aspect and any possible implementation thereof.
  • the present application also provides a computer-readable storage medium for storing a computer program.
  • the computer program When the computer program is run by a processor, the video transmission method described in the above-mentioned first aspect and any possible implementation thereof is implemented. , or the video transmission method described in the above second aspect and any possible implementation thereof.
  • the present application also provides a computer program product.
  • the computer program product runs on a processor, it can realize the video transmission method described in the above first aspect and any possible implementation thereof, or the above first aspect.
  • the video transmission device, computer storage medium, computer program product, chip and system provided in this application are all used to implement the video transmission method provided above, therefore, the beneficial effects it can achieve can refer to the video transmission provided above The beneficial effects in the method will not be repeated here.
  • FIG. 1 is a schematic block diagram of a video transmission system 100 provided by an embodiment of the present application.
  • FIG. 2 is a schematic flowchart of a video transmission method 200 provided in an embodiment of the present application.
  • FIG. 3 is a schematic diagram of coding a video frame provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a video data stream provided by an embodiment of the present application.
  • Fig. 5 is a schematic diagram of characters formed by the video data stream provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of the processing of control characters provided by the embodiment of the present application.
  • FIG. 7 is a schematic diagram of the processing of control characters provided by the embodiment of the present application.
  • Fig. 8 is a schematic diagram of the format of the control character provided by the embodiment of the present application.
  • FIG. 9 is a schematic flow diagram of the verification coding provided by the embodiment of the present application.
  • FIG. 10 is a schematic diagram of a transmission data block provided by an embodiment of the present application.
  • Fig. 11 is a schematic diagram of a transmission data slice provided by an embodiment of the present application.
  • FIG. 12 is a schematic block diagram of a video transmission device 300 provided by an embodiment of the present application.
  • FIG. 13 is a schematic block diagram of a video transmission device 400 provided by an embodiment of the present application.
  • FIG. 14 is another schematic block diagram of a video transmission device 400 provided by an embodiment of the present application.
  • FIG. 15 is a schematic block diagram of a video transmission device 500 provided by an embodiment of the present application.
  • FIG. 16 is a schematic block diagram of a video transmission system 600 provided by an embodiment of the present application.
  • FIG. 17 is another schematic block diagram of a video transmission system 600 provided by an embodiment of the present application.
  • FIG. 1 shows a schematic block diagram of a video transmission system 100 provided by an embodiment of the present application.
  • the system 100 includes a sending end 11 and a receiving end 12, the sending end 11 includes a video transmission device 110, the receiving end 12 includes a video transmission device 120, the video transmission device 110 and the video transmission device 120 Can be connected by one or more lanes.
  • the video transmission device 110 is used to determine the video data stream to be transmitted, and send the video data stream to the video transmission device 120 through the one or more lanes.
  • this application does not limit the specific forms of the sending end 11 and the video transmission device.
  • the sending end 11 and the receiving end 12 may be applied to (or be) different video display devices.
  • the sending end 11 and the receiving end 12 may be applied to the same video display device.
  • the video display device described in this application may be a device with a video display function.
  • the video display device may be a TV, a computer, a tablet computer, a game console, a wearable device, and the like.
  • the sending end 11 and the receiving end 12 are applied to (or are) different video display devices
  • the sending end 11 may be a game machine
  • the receiving end 12 may be a TV set.
  • the sending end 11 can be the SOC chip of the TV set, and the receiving end 12 can be the PQ chip of the TV set; or, The sending end 11 can be the PQ chip of the TV, and the receiving end 12 can be the TCON chip of the TV; or, the sending end 11 can be the SOC chip of the TV, and the receiving end 12 can be the PQ chip of the TV. chip.
  • the video transmission device 110 , the video transmission device 120 and one or more channels used to connect the video transmission device 110 and the video transmission device 120 are collectively referred to as a set of video signal transmission interfaces.
  • a set of video signal transmission interfaces only supports the transmission of one video data stream.
  • each video data stream needs to use An independent set of video signal transmission interface for transmission.
  • the video image output by the SOC chip of the video display device includes not only the original video image to be played, but also an on screen display (OSD) image or user interface (UI) image for user interaction.
  • OSD on screen display
  • UI user interface
  • the introduction of OSD (or UI) images will affect the effect of the PQ chip on the image quality enhancement of the original video image, so when a PQ chip is used to process the original video image and OSD (or UI) image, the SOC chip needs to combine the original video image and The OSD (or UI) image is separately transmitted to the PQ chip through two sets of video signal transmission interfaces, and the PQ chip first enhances the original video image and then superimposes it with the OSD (or UI) image.
  • a video display device introduces a full-array local dimming (FALD) technology.
  • FALD enhances the display brightness and contrast by adjusting the brightness of the backlight of different partitions.
  • FALD can effectively enhance the brightness and contrast of the display.
  • FALD can realize black frame insertion (black frame insertion, BFI) through backlight strobe and backlight scanning technology, and improve artifacts caused by visual residue.
  • BFI black frame insertion
  • the backlight data is essentially a low-resolution video image with only luminance information. Therefore, the SOC chip needs to separately transmit the original video image and the backlight image to the TCON chip through two sets of video signal transmission interfaces, and the TCON chip lights up the screen based on the backlight image and the original video image.
  • the present application provides a video transmission method and device capable of transmitting one or more video data streams through a set of video signal transmission interfaces.
  • FIG. 2 shows a schematic flowchart of a video transmission method 200 provided by an embodiment of the present application, and the method 200 may be applied to the system 100 shown in FIG. 1 .
  • the method 200 may include the following steps. It should be noted that the steps listed below may be executed in various orders and/or simultaneously, and are not limited to the execution order shown in FIG. 2 .
  • the sending end performs link coding on at least one video data stream to obtain at least one target data, where each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbols includes control symbols or valid data
  • Each target data in the at least one target data includes a first synchronization header and a target character, the target character includes at least two symbols in the plurality of symbols, and the first synchronization header is used to indicate the target character belongs to The character type of the video data stream and the target character, which includes control characters or data characters.
  • the number of at least one video data stream described in this application may be one, two or more than two, which is not limited in this application.
  • the present application does not limit the source of the at least one video data stream.
  • the 1 video data stream may be a video data stream formed by an original video image (or an original video image sequence).
  • the 2 video data streams may include 2 video data streams formed by original video images (or original video image sequences).
  • these 2 video data streams may include 1 video data stream and a backlight image (or backlight image sequence) formed by the original video image (or original video image sequence) A video data stream formed.
  • a video frame i.e., a video image
  • a horizontal blank start horizontal blank start, HBS
  • horizontal blank area also called a line blank
  • Vertical blanking start character vertical blank start, VBS
  • field blanking character vertical blank start, VBS
  • video start character active video start, AVS
  • pixel area composition pixel area composition
  • the horizontal direction is synchronized by a horizontal synchronization signal (HSYNC) (also called a horizontal synchronization signal)
  • the vertical direction is synchronized by a vertical synchronization signal (VSYNC) (also called a field synchronization signal)
  • the pixel area is selected and communicated through an effective display data. number (DE) enable.
  • HSELNC horizontal synchronization signal
  • VSYNC vertical synchronization signal
  • DE field synchronization signal
  • FIG. 3 shows a schematic diagram of coding a video frame provided by the embodiment of the present application.
  • a video frame may include VBS, vertical blanking area, HBS, horizontal blanking area, AVS, and pixel area.
  • VBS, HBS and AVS in Figure 3 belong to control data
  • the vertical blanking area data, row blanking area data and pixel area data in Figure 3 belong to valid data.
  • control symbols described in the embodiments of the present application may be symbols formed by control data such as VBS, HBS, or AVS.
  • the valid data symbol described in the embodiment of the present application may be a symbol formed by valid data such as blanking area data or pixel area data.
  • the length of various symbols (such as control symbols, valid data symbols, etc.) described in this application can be 16 bits (bits), that is, the length of 1 symbol is equal to 2 bytes. length.
  • the data in the video frame may be formed into a symbol every 16 bits to form a video data stream.
  • the video frame shown in Figure 3 can be formed into a symbol according to every 16 bits to obtain the video data stream as shown in Figure 4, and each row in Figure 4 represents a symbol with a length of 16 bits, and in Figure 4
  • the "black background area” shows the control symbols formed by VBS, HBS, and AVS
  • the "white background area” shows the valid data symbols formed by the horizontal blanking area data, the effective data symbols formed by the vertical blanking area data, and the pixel area Valid data symbols for data formation.
  • the data needs to be filled (such as filling 0) so that it is exactly an integer multiple of 16, wherein, 0 ⁇ the number of bits of the filled data ⁇ 16, to ensure that VBS , HBS, and AVS appear in the 16bits aligned position, and the padding data is valid data.
  • the valid data in the vertical blanking area data and horizontal blanking area 1 data in Figure 4 is not a multiple of 16bit, and both lack valid data of 1 symbol, so fill with 1 symbol of filling data "0x00" .
  • FIG. 3 and FIG. 4 only use the video data stream formed by the data of one video frame as an example for introduction, but the present application is not limited thereto.
  • the video data stream described in this application may be formed by the data of multiple video frames included in the sequence of video frames.
  • the link coding described in this application may be a 128b/132b link coding.
  • the length of the various synchronization headers (such as the first synchronization header) described in this application can be 4 bits, and the various characters (such as control characters, data characters, etc.) ) can be 128 bits in length, (that is, the length of 1 character is equal to the length of 8 symbols), and the length of the target data described in this application can be 132 bits.
  • the symbols included in the at least one video data stream can be formed into a character every 8 symbols, and the characters are divided into two character types according to whether the character includes a control symbol: data characters and control characters.
  • control character described in the application may include at least two symbols, at least one symbol in the at least two symbols is a control symbol;
  • the data character described in the application may include at least two symbols, the at least Both symbols are valid data symbols.
  • FIG. 5 shows a schematic diagram of characters formed by the video data stream provided by the embodiment of the present application.
  • three "boxes" respectively identify control character 1, control character 2 and control character 3.
  • the control character 1 includes 1 control symbol VBS and 7 effective data symbols formed by the vertical blanking area data
  • the control character 2 includes 2 effective data symbols formed by the vertical blanking area data, 1 control symbol AVS and There are 5 effective data symbols formed by the data in the pixel area
  • the control character 3 includes 1 effective data symbol formed by the data in the pixel area, 1 control symbol HBS and 6 effective data symbols formed by the data in the line blanking area.
  • the format of the control character needs to meet the requirement that the first control symbol in the control character is located at the position of the first symbol of the control character, that is, the first symbol of the control character is Control symbols, as shown in control character 1 in Figure 5.
  • control symbol is not necessarily located at the first symbol of the control character, that is, the first symbol of the control character is a valid data symbol, such as Shown as Control Character 2 or Control Character 3 in Figure 5.
  • Fig. 6 and Fig. 7 show the processing diagram of the control character provided by the embodiment of the present application
  • 8 symbols in the video data stream form the control character as shown in Fig. 6, and the symbol 0 of the control character is valid data
  • symbol 2 is a control symbol (ie, AVS).
  • the symbol 0 and symbol 2 need to be exchanged to obtain the control character as shown in Figure 7.
  • the position and type (or identification) of the first control symbol in the control character A symbol indicates.
  • the first symbol in the control character may indicate the position and type of the first control symbol in the control character in multiple ways, which is not limited in this embodiment of the present application.
  • the first symbol in the control character may include a first byte and a second byte, the first byte is used to indicate the position of the first control symbol, and the second byte byte is used to indicate the type of this first control symbol.
  • FIG. 8 shows a schematic diagram of the format of the control character provided by the embodiment of the present application.
  • the control character includes 8 symbols, such as symbol 0 to symbol 7 shown in FIG. 8 , and each row represents one symbol.
  • Symbol 0 (that is, the first symbol) of the control character may include a KD_Dis byte and a K_Type byte, wherein the KD_Dis byte indicates the position of the first control symbol in the control character in symbol 0 to symbol 7, and K_Type The byte indicates the type of the first control symbol (used to identify the first control symbol).
  • the KD_Dis byte of the control character is "00000100", which can indicate that the position of the first control symbol in the control character is the position of symbol 2
  • the K_Type byte of the control character is "00000011”, which can indicate that the first The type of control symbol is AVS (ie 0x03).
  • the first synchronization header may indicate the video data stream to which the target character belongs and the character type of the target character by using 4 bits in various ways, which is not limited in this application.
  • the synchronization header may indicate the video data stream to which the target character belongs through the first bit of the 4 bits, and indicate the character of the target character through the second bit of the 4 bits type.
  • the first bit of the first synchronization header of the target character is "0", which may indicate that the target character Belonging to a data character
  • the first bit being "1” can indicate that the target character belongs to a control character
  • the second bit of the first synchronization header of the target character being "0" can indicate that the target character belongs to video data stream 0
  • the The second bit being "1" may indicate that the target character belongs to video data stream 1.
  • the first synchronization header being "0011” can indicate that the target character belongs to video data stream 0, and the target character is a data character
  • the first synchronization header being "1010” can indicate that the target character belongs to video data stream 0, and The target character is a control character
  • the first sync header being "0110” can indicate that the target character belongs to video data stream 1, and the target character is a data character
  • the first sync header being "1100” can indicate that the target character belongs to video data Stream 1, and the target character is a control character.
  • the sending end sends the at least one target data to the receiving end; correspondingly, the receiving end receives the at least one target data from the sending end.
  • the sending end may perform check encoding on the at least one target data to obtain at least one first check symbol;
  • S202 may specifically include sending an encoding block to the receiving end, where the encoding block includes the at least A target data and check data of the at least one target data, the check data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second The sync header is used to indicate the video data stream to which the check character belongs and the character type of the check character, and the RS symbol is used to indicate the position of the first control symbol in the check character and the position of the check character The type of the first control symbol in the checksum character.
  • the receiving end may receive the encoding block from the transmitting end, the encoding block includes the at least one target data and the check data of the at least one target data, the check data includes a second synchronization header and a check character, the The check character includes an RS symbol and the at least one first check symbol, wherein the second synchronization header is used to indicate the video data stream to which the check character belongs and the character type of the check character, and the RS symbol is used to indicate The position of the first control symbol in the check character in the check character and the type of the first control symbol in the check character, the at least one first check character is the at least one target data Obtained by check encoding; based on the second synchronization header in the check data and the RS symbol in the check data, determine at least one first check symbol in the check data; check the at least one target data check encoding to obtain at least one second check symbol; based on the at least one first check symbol and the at least one second check symbol, determine the at least one target data.
  • the sending end may determine that the at least one target data is correct, so as to obtain the at least one target data.
  • the sender can determine that the at least one target data has an error, and the at least one target data needs to be corrected according to the RS rule.
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the sending end may perform check coding on the target characters of each target data in the at least one target data and some bits of the first synchronization header of each target data, to obtain the at least A first check symbol.
  • the sending end may use various algorithms to perform check encoding on the at least one target data, which is not limited in this application.
  • the sending end may use a Reed-Solomon (Reed-solomon, RS) algorithm, such as an RS (242, 228) algorithm, to perform check encoding on the at least one target data.
  • RS Reed-Solomon
  • FIG. 9 shows a schematic flow chart of RS check coding provided by the embodiment of the present application.
  • the 14 target data to be encoded include target data 0 to target data 13, wherein target data 0 includes sync header 0 and character 0, target data 1 includes sync header 1 and character 1...target data 13 Includes sync header 13 and character 13.
  • the working area of RS check encoding contains 228 bytes of data to be encoded.
  • the 228 bytes include 224 bytes composed of characters 0 to 13.
  • RS check coding is performed on the 228 bytes to generate 14 bytes of RS check code, that is, 7 first check symbols,
  • the symbol type of the first check symbol is a control symbol;
  • the RS check code of the 14 bytes is filled into the last 14 bytes of the check character;
  • the control symbol and the check code of the 14 bytes are added
  • the sync header 14 (ie, the second sync header) generates check data; the check data and the above 14 target data form a code block after check encoding.
  • the RS symbol and the 14-byte check code (that is, 7 first check symbols) can constitute a check character
  • the character type of the check character is a control character
  • the RS symbol can include byte 1 And byte 2
  • the byte 1 can indicate that the first control symbol in the check character is located at the first symbol of the check character
  • the byte 2 can indicate the first control symbol in the check character
  • the type of symbol is RS parity symbol.
  • the check character and the second synchronization header may constitute the check data, and the second synchronization header is used to indicate the video data stream to which the check character belongs and the character type of the check character.
  • the at least one video data stream includes video data stream 0 and video data stream 1, the video data stream 0 is formed by the original video image, the second synchronization header may be "1010", used to indicate that the school The check character belongs to the video data stream 0, and the check character is a control character.
  • the at least one target data is checked and coded, which increases the reliability of video transmission and ensures the quality of the display screen at the receiving end.
  • the sending end may send the multiple target data (or coded blocks) to the receiving end in various ways, and this application does not make any limited.
  • the sending end may perform parallel-to-serial conversion on the multiple target data (or coded blocks) to obtain a transmission data stream; and send the transmission data stream to the receiving end.
  • the receiving end can receive the transport data stream; perform serial-to-parallel conversion on the transport data stream to obtain the multiple target data (or coded blocks).
  • the sender can add a pre-scramble reset (scramble reset, SR) character or character delimitation (character delimitation, CS) to each P coded block character, get a plurality of transmission data block (link transport block, LTB), wherein, SR character and CD character belong to control character, P is the integer greater than 1; Based on Q transmission data blocks, obtain a transmission data slice (link transport fragment, LTF), wherein, Q is an integer greater than 1; based on at least one transmission data slice, the transmission data stream is obtained; and the transmission data stream is sent to the receiving end.
  • SR pre-scramble reset
  • CS character delimitation
  • FIG. 10 shows a schematic diagram of a transmission data block provided by an embodiment of the present application.
  • the transport data block includes SR/CD characters and 27 coded blocks.
  • FIG. 11 shows a schematic diagram of transmitting data slices provided by the embodiment of the present application.
  • the transmission data slice is composed of 16 transmission data blocks, such as transmission data block 0, transmission data block 1 ... transmission data block 15 shown in Figure 11, wherein transmission data block 0 is in the form of SR character, and the remaining 15 transmission data blocks start with the CD character.
  • the receiving end may determine at least one transmission data slice in the transmission data stream based on at least one SR character in the transmission data stream, wherein each transmission data slice in the at least one transmission data slice includes Q Transmission data blocks, each transmission data block in the Q transmission data blocks includes SR/CD characters and P coding blocks; based on the SR/CD characters in each transmission data block, it is determined that each transmission data block includes P coding blocks of .
  • the sending end converts multiple low-speed parallel signals into high-speed serial signals, and transmits them to the receiving end, and the receiving end reconverts the received high-speed serial signals into low-speed parallel signals.
  • This point-to-point serial communication technology makes full use of the channel capacity of the transmission medium, reduces the number of required transmission channels and device pins, and can increase the transmission speed of video signals, thereby reducing communication costs.
  • the receiving end performs link decoding on the at least one target data to obtain the at least one video data stream.
  • the above S203 is the reverse process of the above S201.
  • the receiving end can restore the at least one video data stream based on the character type of each target character and the video data stream to which each target character belongs.
  • the above steps performed by the sending end may also be performed by a video transmission device on the sending end side (such as the video transmission device 110 in Figure 1), and the above steps performed by the receiving end may also be performed by the video transmission device on the receiving end side
  • the video transmission device (such as the video transmission device 120 in FIG. 1 ) executes, which is not limited in this application.
  • the sending end adds a first synchronization header to each target character in at least one video data stream to obtain the target data, and the first synchronization header is used to indicate the video to which each target character belongs.
  • the data stream and the character type of each target character and send the target character with the first synchronization header added to the receiving end; correspondingly, the receiving end can determine each target character based on the first synchronization header in each target data
  • the at least one video data stream can be transmitted through a set of video signal transmission interfaces, which is beneficial to reduce costs.
  • the video transmission method provided by the embodiment of the present application is described above with reference to FIG. 2 to FIG. 11 , and the video transmission device provided by the embodiment of the present application is further introduced below.
  • FIG. 12 shows a schematic block diagram of a video transmission device 300 provided by an embodiment of the present application.
  • the apparatus 300 may include: a link encoding unit 301 and a sending unit 302 .
  • the link encoding unit 301 is configured to perform link encoding on at least one video data stream to obtain at least one target data, where each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes control symbols or valid data symbols, each target data in the at least one target data includes a first sync header and target characters, the target characters include at least two symbols in the plurality of symbols, the first sync header is used to indicate the The video data stream to which the target character belongs and the character type of the target character, the character type includes control character or data character.
  • the sending unit 302 is configured to send the at least one target data to a receiving end.
  • the quantity of the at least one video data stream is two or more.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the apparatus may further include a check encoding unit 303; the check encoding unit 303 is configured to, before the sending unit 302 sends the at least one target data to the receiving end, Perform check coding to obtain at least one first check symbol; the sending unit 302 is specifically configured to send a coded block to the receiving end, the coded block includes the at least one target data and the check data of the at least one target data, the The check data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video data stream and the check character to which the check character belongs The character type of the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the type of the first control symbol in the check character.
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple
  • the sending unit 302 is specifically configured to perform parallel-to-serial conversion on multiple target data to obtain a transmission data stream; and send the transmission data to the receiving end flow.
  • the device 300 may specifically be a video transmission device (such as the video transmission device 110) on the sending end side in the above-mentioned embodiment of the method 200, and the device 300 may be used to perform the communication between the above-mentioned method 200 embodiment and the sending end side.
  • Various processes and/or steps corresponding to the video transmission device are not repeated here to avoid repetition.
  • One or more of the various units in the embodiment shown in FIG. 12 may be implemented by software, hardware, firmware or a combination thereof.
  • the software or firmware includes but is not limited to computer program instructions or codes, and can be executed by a hardware processor.
  • the hardware includes but not limited to various integrated circuits, such as central processing unit (CPU, Central Processing Unit), digital signal processor (DSP, Digital Signal Processor), field programmable gate array (FPGA, Field Programmable Gate Array) or dedicated Integrated Circuit (ASIC, Application Specific Integrated Circuit).
  • FIG. 13 shows a schematic block diagram of a video transmission device 400 provided by an embodiment of the present application.
  • the device 400 may include a link encoder 401 and a port 402 .
  • the link encoder 401 is used to perform link encoding on at least one video data stream to obtain at least one target data, and each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes control symbols or valid data symbols, each target data in the at least one target data includes a first sync header and target characters, the target characters include at least two symbols in the plurality of symbols, the first sync header is used to indicate the The video data stream to which the target character belongs and the character type of the target character, the character type includes control character or data character; sending the at least one target data to the port 402 .
  • the symbol type of the symbol includes control symbols or valid data symbols
  • each target data in the at least one target data includes a first sync header and target characters
  • the target characters include at least two symbols in the plurality of symbols
  • the first sync header is used to indicate the The video data stream to which the target character belongs and the character type of the target character, the character type includes control character or data character; sending the at least one target
  • the port 402 is used to send the at least one target data to the receiving end.
  • the port 402 is used to send the at least one target data to the receiving end.
  • the quantity of the at least one target data is multiple, and the port has a parallel-to-serial conversion function.
  • the port 402 is specifically used to perform parallel-to-serial conversion on a plurality of target data to obtain a target data stream; and send the target data stream to the receiving end.
  • the apparatus 400 may further include a parity encoder 403 .
  • the link encoder 401 is specifically configured to send the at least one target data to the parity encoder 403 .
  • the check encoder 403 is used to perform check encoding on the at least one target data to obtain at least one first check symbol; send an encoding block to the port 402, and the encoding block includes the at least one target data and the at least one target Data check data, the check data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the check The video data stream to which the character belongs and the character type of the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the first The type of control symbol.
  • the port 402 is specifically used to send the encoded block to the receiving end.
  • the port has a parallel-to-serial conversion function.
  • the port 402 is specifically used to perform parallel-to-serial conversion on multiple coding blocks to obtain a transmission data stream; and send the transmission data stream to the receiving end.
  • the device 400 may specifically be a video transmission device (such as the video transmission device 110) on the sending end side in the above-mentioned embodiment of the method 200, and the device 400 may be used to perform the communication between the above-mentioned method 200 embodiment and the sending end side.
  • a video transmission device such as the video transmission device 110
  • the device 400 may be used to perform the communication between the above-mentioned method 200 embodiment and the sending end side.
  • Each process and/or steps corresponding to the video transmission device (such as the video transmission device 110 ) will not be repeated here to avoid repetition.
  • FIG. 15 shows a schematic block diagram of a video transmission device 500 provided by an embodiment of the present application.
  • the apparatus 500 may include: a receiving unit 501 and a link decoding unit 502 .
  • the receiving unit 501 is configured to receive at least one target data from the sending end, each target data in the at least one target data includes a first synchronization header and a target character, the target character includes at least two symbols, and the first synchronization header uses For indicating the video data stream to which the target character belongs and the character type of the target character, the character type includes a control character or a data character; sending the at least one target data to the link decoder;
  • the link decoding unit 502 is configured to perform link decoding on the at least one target data to obtain at least one video data stream, each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes Control symbols or valid data symbols, the plurality of symbols includes the at least two symbols.
  • the quantity of the at least one video data stream is two or more.
  • the length of the symbol is 16 bits
  • the length of the first synchronization header is 4 bits
  • the length of the target character is 128 bits.
  • the target character is a data character.
  • the target character is a control character.
  • the position of the first control symbol in the at least two symbols and the type of the first control symbol in the at least two symbols are determined by the at least two The first symbol in the symbol indicates.
  • the apparatus 500 may further include a verification decoding unit 503;
  • the receiving unit 501 is specifically configured to receive an encoded block from the sending end, where the encoded block includes the at least one target data and the at least one target Data check data, the check data includes a second sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the check The video data stream to which the character belongs and the character type of the check character, the RS symbol is used to indicate the position of the first control symbol in the check character and the first The type of the control symbol, the at least one first check symbol is obtained by performing check encoding on the at least one target data; the check decoding unit 503 is configured to use the second synchronization header in the check data and the check RS symbols in the data, determine at least one first check symbol in the check data; perform check encoding on the at least one target data to obtain at least one second check symbol; based on the at least one first check symbol and the
  • the quantity of the at least one target data is 14, the quantity of the at least one check symbol is 7, and the length of the second synchronization header is 4 bits.
  • the quantity of the at least one target data is multiple
  • the receiving unit 501 is specifically configured to receive the transmission data stream from the sending end; perform serial-to-parallel conversion on the transmission data stream to obtain the multiple target data.
  • the device 500 may specifically be the video transmission device (such as the video transmission device 120) on the receiving end side in the above-mentioned embodiment of the method 200, and the device 500 may be used to perform the communication between the receiving end and the receiving end in the above-mentioned embodiment of the method 200.
  • the video transmission device such as the video transmission device 120
  • the device 500 may be used to perform the communication between the receiving end and the receiving end in the above-mentioned embodiment of the method 200.
  • Various processes and/or steps corresponding to the video transmission device are not repeated here to avoid repetition.
  • One or more of the various units in the embodiment shown in FIG. 15 may be implemented by software, hardware, firmware or a combination thereof.
  • the software or firmware includes but is not limited to computer program instructions or codes, and can be executed by a hardware processor.
  • the hardware includes but not limited to various integrated circuits, such as CPU, DSP, FPGA or ASIC.
  • FIG. 16 shows a schematic block diagram of a video transmission device 600 provided by an embodiment of the present application.
  • the device 600 may include a port 601 and a link decoder 602 .
  • the port 601 is used to receive at least one target data from the sending end, each target data in the at least one target data includes a first synchronization header and a target character, the target character includes at least two symbols, and the first synchronization header is used for Indicating the video data stream to which the target character belongs and the character type of the target character, where the character type includes a control character or a data character; sending the at least one target data to the link decoder.
  • each target data in the at least one target data includes a first synchronization header and a target character
  • the target character includes at least two symbols
  • the first synchronization header is used for Indicating the video data stream to which the target character belongs and the character type of the target character, where the character type includes a control character or a data character
  • the link decoder 602 is configured to perform link decoding on the at least one target data to obtain at least one video data stream, each video data stream in the at least one video data stream includes a plurality of symbols, and the symbol type of the symbol includes Control symbols or valid data symbols, the plurality of symbols includes the at least two symbols.
  • each video data stream in the at least one video data stream includes a plurality of symbols
  • the symbol type of the symbol includes Control symbols or valid data symbols
  • the plurality of symbols includes the at least two symbols.
  • the quantity of the at least one target data is multiple, and the port 601 has a serial-to-parallel conversion function; the port 601 is specifically used to receive the target data stream from the sending end; serial-to-parallel conversion is performed on the target data stream to obtain multiple target data.
  • the apparatus 600 may further include a check decoder 603 .
  • the port 601 is specifically used to receive an encoding block from the sending end, where the encoding block includes the at least one target data and check data of the at least one target data, and the check data includes the second A sync header and a check character, the check character includes an RS symbol and the at least one first check symbol, wherein the second sync header is used to indicate the video data stream to which the check character belongs and the character of the check character Type, the RS symbol is used to indicate the position of the first control symbol in the check character and the type of the first control symbol in the check character, the at least one first check symbol is obtained by performing check coding on the at least one target data; sending the coded block to the link decoder.
  • the link decoder 603 is configured to determine at least one first check symbol in the check data based on the second synchronization header in the check data and the RS symbol in the check data; for the at least one target data Perform check coding to obtain at least one second check symbol; determine the at least one target data based on the at least one first check symbol and the at least one second check symbol.
  • the quantity of the at least one target data is multiple, and the port 601 has a serial-to-parallel conversion function; the port 601 is specifically used to receive the transmission data stream from the sending end; the serial-to-parallel conversion is performed on the transmission data stream to obtain Multiple target data.
  • the device 600 may specifically be a video transmission device (such as the video transmission device 120) on the receiving end side in the embodiment of the method 200 above, and the device 600 may be used to execute the method 200 above.
  • the various processes and/or steps corresponding to the video transmission device on the receiving end side in the embodiment are not described in detail here.
  • the disclosed system and device can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.
  • the functions described above are realized in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium or memory includes various media capable of storing program codes such as U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk.

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Abstract

本申请提供一种视频传输方法和装置,能够通过一套视频信号传输接口传输至少一个视频数据流,有利于降低成本开销。该装置可以包括:链路编码器和端口;该链路编码器用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该端口发送该至少一个目标数据;该端口用于向接收端发送该至少一个目标数据。

Description

一种视频传输方法和装置 技术领域
本申请涉及多媒体技术领域,尤其涉及多媒体技术领域中的一种视频传输方法和装置。
背景技术
现有的视频显示设备内部支持的视频信号传输接口标准,如VBO(V-by-One HS)接口,在视频显示设备内部的各芯片之间,如片上系统(system on chip,SOC)芯片与画质(picture quality,PQ)芯片之间,或者SOC芯片与时序控制器(timing controller,TCON)芯片之间,或者PQ芯片与TCON芯片之间,仅支持单个视频数据流的传输。也就是说,两个芯片之间通过一套VBO接口只能传输单个视频数据流。
然而,在实际应用过程中,视频显示设备内部的各芯片之间还可能存在传输两个视频数据流(即双流)或两个以上视频数据流(即多流)的应用场景。
因此,在视频设备内部传输双流或多流的应用场景下,采用现有的视频信号传输接口标准,每个视频数据流都需要一套独立的视频信号传输接口,这样,成本开销较大。
发明内容
本申请提供一种视频传输方法和装置,能够通过一套视频信号传输接口传输至少一个视频数据流,有利于降低成本开销。
第一方面,本申请提供一种视频传输方法,该方法可以包括:对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向接收端发送该至少一个目标数据。
可选地,该方法可以由发送端执行。示例的,该方法可以由发送端侧的视频传输装置执行。
采用本申请实施例提供的视频传输方法,发送端为至少一个视频数据流中的每个目标字符添加第一同步头,该第一同步头用于指示该每个目标字符所属的视频数据流和该每个目标字符的字符类型,并向接收端发送添加了第一同步头的目标字符,这样就能够通过一套视频信号传输接口传输该至少一个视频数据流,有利于降低成本开销。
可选地,本申请中所述的至少一个视频数据流的数量可以为一个、两个或两个以上,本申请对此不做限定。
可选地,本申请对该至少一个视频数据流的来源不做限定。
示例的,该至少一个视频数据流的数量为1个时,这1个视频数据流可以为原始视频 图像(或原始视频图像序列)形成的视频数据流。
示例的,该至少一个视频数据流的数量为2个时,这2个视频数据流可以包括原始视频图像(或原始视频图像序列)形成的2个视频数据流。
示例的,该至少一个视频数据流的数量为2个时,这2个视频数据流可以包括原始视频图像(或原始视频图像序列)形成的1个视频数据流和背光图像(或背光图像序列)形成的1个视频数据流。
可选地,本申请实施例中所述的控制符号可以为垂直消隐符、水平消隐符或视频开始符等控制数据形成的符号。
可选地,本申请实施例中所述的有效数据符号可以为消隐区数据或像素区数据等有效数据形成的符号。
在一种可能的实现方式中,本申请中所述的各种符号(如控制符号、有效数据符号等)的长度可以为16比特(bits),即1个符号的长度等于2个字节的长度。
在一种可能的实现方式中,可以将视频帧中的数据按照每16比特组成1个符号,形成视频数据流。
可选地,当有效数据的比特数不是16bits的整数倍时,需要填充数据(如填充0),使其正好为16的整数倍,其中,0<填充数据的比特数<16,以确保垂直消隐符、水平消隐符或视频开始符出现在16bits对齐的位置上,填充数据属于有效数据。
可选地,本申请中所述的视频数据流可以是由视频帧序列包括的多个视频帧的数据形成的。
在一种可能的实现方式中,本申请中所述的链路编码可以为128b/132b链路编码。
在一种可能的实现方式中,本申请中所述的各种同步头(如第一同步头)的长度可以为4比特,本申请中所述的各种字符(如控制字符、数据字符等)的长度可以为128比特,(即1个字符的长度等于8个符号的长度),本申请中所述的目标数据的长度可以为132比特。
在一种可能的实现方式中,可以将该至少一个视频数据流中包括的符号按照每8个符号组成一个字符,并根据该字符中是否包括控制符号,将字符分为两种字符类型:数据字符和控制字符。
也就是说,本申请中所述的控制字符可以包括至少两个符号,该至少两个符号中的至少一个符号为控制符号;本申请中所述的数据字符可以包括至少两个符号,该至少两个符号均为有效数据符号。
在一种可能的实现方式中,控制字符的格式需要满足该控制字符中的第一个控制符号位于该控制字符的第一个符号的位置,也就是说,该控制字符的第一个符号为控制符号,。
然而,在由视频数据流中的8个符号形成的1个控制字符的过程中,控制符号不一定位于该控制字符的第一个符号,即控制字符的第一个符号为有效数据符号。
因此,在生成控制字符的过程中需要对这8个符号进行特殊处理,以使处理后的8个字符满足上述控制字符的格式要求。
在一种可能的实现方式中,为了使收接收端知道控制字符中的第一个控制符号原本的位置,控制字符中的第一个控制符号的位置和类型(或标识)通过控制字符中第一个符号指示。
可选地,控制字符中的第一个符号可以通过多种方式指示该控制字符中的第一个控制符号的位置和类型,本申请实施例对此不作限定。
在一种可能的实现方式中,该控制字符中的第一个符号可以包括第一字节和第二字节,该第一字节用于指示该第一个控制符号的位置,该第二字节用于指示该第一个控制符号的类型。
示例的,该控制字符的KD_Dis字节为“00000100”可以指示该控制字符中第一个控制符号的位置为符号2的位置,该控制字符的K_Type字节为“00000011”可以指示该第一个控制符号的类型为视频开始符(即0x03)。
可选地,第一同步头可以通过多种方式通过4个比特指示指示该目标字符所属的视频数据流和该目标字符的字符类型,本申请对此不做限定。
在一种可能的实现方式中,该同步头可以通过4个比特中的第1个比特指示该目标字符所属的视频数据流,并通过4个比特中的第2个比特指示该目标字符的字符类型。
在一种可能的实现方式中,以该至少一个视频数据流包括视频数据流0和视频数据流1为例,目标字符的第一同步头的第1个比特为“0”可以指示该目标字符属于数据字符,该第1个比特为“1”可以指示该目标字符属于控制字符,目标字符的第一同步头的第2个比特为“0”可以指示该目标字符属于视频数据流0,该第2个比特为“1”可以指示该目标字符属于视频数据流1。
可选地,在该发送端向接收端发送该至少一个目标数据之前,该发送端可以对该至少一个目标数据进行校验编码,得到至少一个第一校验符号;该发送端向接收端发送该至少一个目标数据具体可以包括:向该接收端发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型。
采用本申请实施例提供的视频传输方法,对该至少一个目标数据进行校验编码,增加了视频传输的可靠性,保证了接收端显示画面的质量。
在一种可能的实现方式中,若该至少一个第一校验符号和该至少一个第二校验符号相同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量大于预设的数量阈值,则该发送端可以确定该至少一个目标数据正确,从而得到该至少一个目标数据。
可选地,若该至少一个第一校验符号和该至少一个第二校验符号不同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量小于或等于预设的数量阈值,则该发送端可以确定该至少一个目标数据发生错误,需要根据RS规则对该至少一个目标数据进行更正。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该发送端可以对该至少一个目标数据中的每个目标数据的目标字符和该每个目标数据的第一同步头的部分比特进行校验编码,得到该至少一个第一校验符号。
可选地,该发送端可以采用多种算法对该至少一个目标数据进行校验编码,本申请对此不做限定。
在一种可能的实现方式中,该发送端可以采用里德所罗门(RS)算法,如RS(242,228)算法对该至少一个目标数据进行校验编码。
可选地,该至少一个目标数据(或编码块)的数量为多个时,该发送端可以通过多种方式向该接收端发送该多个目标数据(或编码块),本申请对此不作限定。
在一种可能的实现方式中,该发送端可以对该多个目标数据(或编码块)进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
在一种可能的实现方式中,以编码块为例,该发送端可以为每P个编码块加上一个前置的加扰复位(SR)字符或字符界定(CD)字符,得到多个传输数据块,其中,P为大于1的整数;基于Q个传输数据块得到一个传输数据片,其中,Q为大于1的整数;基于至少一个传输数据片,得到该传输数据流;向该接收端发送该传输数据流。
采用本申请提供的视频传输方法,发送端将多路低速并行信号转换成高速串行信号,传输至接收端,接收端将接收到的高速串行信号重新转换成低速并行信号。这种点对点的串行通信技术充分利用传输媒体的信道容量,减少所需的传输信道和器件引脚数目,能够提升视频信号的传输速度,从而降低通信成本。
第二方面,本申请还提供另一种视频传输方法,该方法可以包括:接收来自发送端的至少一个目标数据,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;对该至少一个目标数据进行链路解码,得到至少一个视频数据流,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该多个符号包括该至少两个符号。
可选地,该方法可以由接收端执行。示例的,该方法可以由接收端侧的视频传输装置执行。
也就是说,该接收端可以基于每个目标字符的字符类型和该每个目标字符所属的视频数据流,恢复出该至少一个视频数据流。
采用本申请实施例提供的视频传输方法,接收端接收至少一个目标数据,基于该至少一个目标数据中的每个目标数据中的第一同步头,确定该每个目标数据中的目标字符所属的视频数据流和该目标字符的字符类型,并基于该每个目标数据中的目标字符的字符类型和该目标字符所属的视频数据流,恢复出该至少一个视频数据流。能够实现通过一套视频信号传输接口传输该至少一个视频数据流,有利于降低成本开销。
可选地,该方法还可以由接收端侧的视频传输装置执行。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若所述至少两个符号均为有效数据符号,则所述目标字符为数据字符。
在一种可能的实现方式中,若所述至少两个符号中的至少一个符号为控制符号,则所 述目标字符为控制字符。
在一种可能的实现方式中,所述至少两个符号中的第一个控制符号在所述至少两个符号中的位置和所述至少两个符号中的第一个控制符号的类型通过所述至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该接收来自发送端的至少一个目标数据,包括:接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一个第二校验符号,确定该至少一个目标数据。
在一种可能的实现方式中,若该至少一个第一校验符号和该至少一个第二校验符号相同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量大于预设的数量阈值,则该发送端可以确定该至少一个目标数据正确,从而得到该至少一个目标数据。
可选地,若该至少一个第一校验符号和该至少一个第二校验符号不同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量小于或等于预设的数量阈值,则该发送端可以确定该至少一个目标数据发生错误,需要根据RS规则对该至少一个目标数据进行更正。
采用本申请实施例提供的视频传输方法,对该至少一个目标数据进行校验编码,增加了视频传输的可靠性,保证了接收端显示画面的质量。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该接收来自发送端的多个目标数据,包括:接收来自该发送端的传输数据流;对该传输数据流进行串并转换,得到该多个目标数据。
采用本申请提供的视频传输方法,发送端将多路低速并行信号转换成高速串行信号,传输至接收端,接收端将接收到的高速串行信号重新转换成低速并行信号。这种点对点的串行通信技术充分利用传输媒体的信道容量,减少所需的传输信道和器件引脚数目,能够提升视频信号的传输速度,从而降低通信成本。
第三方面,本申请提供一种视频传输装置,该装置可以包括链路编码单元和发送单元。该链路编码单元用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符。该发送单元用于 向接收端发送该至少一个目标数据。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置还可以包括校验编码单元;该校验编码单元用于在该发送单元向接收端发送该至少一个目标数据之前,对该至少一个目标数据进行校验编码,得到至少一个第一校验符号;该发送单元具体用于向该接收端发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该发送单元具体用于对多个目标数据进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
第四方面,本申请还提供另一种视频传输装置,装置该可以包括:接收单元和链路解码单元。该接收单元用于接收来自发送端的至少一个目标数据,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该链路解码器发送该至少一个目标数据。该链路解码单元用于对该至少一个目标数据进行链路解码,得到至少一个视频数据流,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该多个符号包括该至少两个符号。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置500还可以包括校验解码单元;该接收单元具体用于接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;该校验解码单元用于基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一个第二校验符号,确定该至少一个目标数据。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该接收单元具体用于接收来自该发送端的传输数据流;对该传输数据流进行串并转换,得到该多个目标数据。
第五方面,本申请还提供一种视频传输装置,该装置可以包括至少一个处理器和至少一个通信接口,所述至少一个处理器和所述至少一个通信接口耦合,所述至少一个通信接口用于为所述至少一个处理器提供数据,所述至少一个处理器用于运行计算机程序指令以执行上述第一方面及其任意可能的实现方式中所述的视频传输方法。
可选地,该装置可以为芯片或集成电路。
第六方面,本申请还提供另一种视频传输装置,该装置可以包括至少一个处理器和至少一个通信接口,所述至少一个处理器和所述至少一个通信接口耦合,所述至少一个通信接口用于为所述至少一个处理器提供数据,所述至少一个处理器用于运行计算机程序指令以执行上述第二方面及其任意可能的实现方式中所述的视频传输方法。
可选地,该装置可以为芯片或集成电路。
第七方面,本申请还提供一种视频传输装置,该装置可以包括:链路编码器和端口;该链路编码器用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该端口发送该至少一个目标数据;该端口用于向接收端发送该至少一个目标数据。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置还包括:校验编码器;该链路编码器具体用于向该校验编码器发送该至少一个目标数据;该校验编码器用于对该至少一个目标数据进行校验编码,得到至少一个第一校验符号;向该端口发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型;该端口具体用于向该接收端发送该编码块。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该端口具有并串转换功能;该端口具体用于对多个目标数据进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
第八方面,本申请提供一种视频传输装置,该装置可以包括:端口和链路解码器;该端口用于接收来自发送端的至少一个目标数据,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该链路解码器发送该至少一个目标数据;该链路解码器用于对该至少一个目标数据进行链路解码,得到至少一个视频数据流,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该多个符号包括该至少两个符号。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置还包括:校验解码器;该端口具体用于接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验 符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;向该链路解码器发送该编码块;该链路解码器具体用于基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一个第二校验符号,确定该至少一个目标数据。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该端口具有串并转换功能:该端口具体用于接收来自该发送端的传输数据流;对该传输数据流进行串并转换,得到多个目标数据。
第九方面,本申请还提供一种视频传输系统,该系统可以包括如上述第三方面及其任意可能的实现方式中所述的视频传输装置和如上述第四方面及其任意可能的实现方式中所述的视频传输装置;或者,该系统可以包括如上述第五方面及其任意可能的实现方式中所述的视频传输装置和如上述第六方面及其任意可能的实现方式中所述的视频传输装置;或者,该系统可以包括如上述第七方面及其任意可能的实现方式中所述的视频传输装置和如上述第八方面及其任意可能的实现方式中所述的视频传输装置。
第十方面,本申请还提供一种计算机可读存储介质,用于存储计算机程序,该计算机程序被处理器运行时,实现上述第一方面及其任意可能的实现方式中所述的视频传输方法,或上述第二方面及其任意可能的实现方式中所述的视频传输方法。
第十一方面,本申请还提供一种计算机程序产品,当该计算机程序产品在处理器上运行时,实现上述第一方面及其任意可能的实现方式中所述的视频传输方法,或上述第二方面及其任意可能的实现方式中所述的视频传输方法。
本申请提供的视频传输装置、计算机存储介质、计算机程序产品、芯片和系统均用于执行上文所提供的视频传输方法,因此,其所能达到的有益效果可参考上文所提供的视频传输方法中的有益效果,此处不再赘述。
附图说明
图1是本申请实施例提供的视频传输系统100的示意性框图;
图2是本申请实施例提供的视频传输方法200的示意性流程图;
图3是本申请实施例提供的视频帧的编码示意图;
图4是本申请实施例提供的视频数据流的示意图;
图5是本申请实施例提供的视频数据流形成的字符的示意图;
图6是本申请实施例提供的控制字符的处理示意图;
图7是本申请实施例提供的控制字符的处理示意图;
图8是本申请实施例提供的控制字符的格式示意图;
图9是本申请实施例提供的校验编码的流程示意图;
图10是本申请实施例提供的传输数据块的示意图;
图11是本申请实施例提供的传输数据片的示意图;
图12是本申请实施例提供的视频传输装置300的示意性框图;
图13是本申请实施例提供的视频传输装置400的示意性框图;
图14是本申请实施例提供的视频传输装置400的另一示意性框图;
图15是本申请实施例提供的视频传输装置500的示意性框图;
图16是本申请实施例提供的视频传输系统600的示意性框图;
图17是本申请实施例提供的视频传输系统600的另一示意性框图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行描述。
首先介绍一下本申请提供的视频传输方法和装置所应用的视频传输系统。
请参考图1,图1示出了本申请实施例提供的视频传输系统100的示意性框图。如图1所示,该系统100包括发送端11和接收端12,该发送端11包括视频传输装置110,该接收端12包括视频传输装置120,该视频传输装置110和该视频传输装置120之间可以通过一个或多个通道(lane)连接。该视频传输装置110用于确定待传输的视频数据流,通过该一个或多个通道(lane)向视频传输装置120发送该视频数据流。
可选地,本申请对该发送端11和该视频传输装置的具体形态不做限定。
在一种可能的实现方式中,该发送端11和该接收端12可以应用于(或为)不同的视频显示设备。
在另一种可能的实现方式中,该发送端11和该接收端12可以应用于同一个视频显示设备。
需要说明的是,本申请中所述的视频显示设备可以为具备视频显示功能的设备。示例的,该视频显示设备可以为电视机、电脑、平板电脑、游戏机、可穿戴设备等。
示例的,以该发送端11和该接收端12应用于(或为)不同的视频显示设备为例,该发送端11可以为游戏机,该接收端12可以为电视机。
示例的,以该发送端11和该接收端12应用于同一个视频显示设备为例,该发送端11可以为电视机的SOC芯片,该接收端12可以为该电视机的PQ芯片;或者,该发送端11可以为电视机的PQ芯片,该接收端12可以为该电视机的TCON芯片;或者,该发送端11可以为电视机的SOC芯片,该接收端12可以为该电视机的PQ芯片。
需要说明的是,该视频传输装置110、该视频传输装置120以及用于连接该视频传输装置110和该视频传输装置120之间的一个或多个通道统称为一套视频信号传输接口。
在现有技术中,一套视频信号传输接口只支持传输一个视频数据流,在视频显示设备内部的各芯片之间需要传输至少两个视频数据流的应用场景下,每个视频数据流需要采用独立的一套视频信号传输接口进行传输。
示例的,视频显示设备的SOC芯片输出的视频图像中,不仅包含待播放的原始视频图像,可能还包含用户交互的屏幕显示(on screen display,OSD)图像或用户界面(user interface,UI)图像。OSD(或UI)图像的引入会影响PQ芯片对原始视频图像进行画质增强的效果,所以当采用一个PQ芯片处理原始视频图像和OSD(或UI)图像时,SOC芯片需要将原始视频图像和OSD(或UI)图像通过两套视频信号传输接口分开传输给PQ 芯片,由PQ芯片先对原始视频图像进行增强后再与OSD(或UI)图像进行叠加。
示例的,为解决液晶屏(liquid crystal display,LCD)的亮度与对比度方面的缺陷,视频显示设备引入全阵列局部调光(full-array local dimming,FALD)技术。FALD通过调整不同分区的背光的亮度的方法来增强显示亮度与对比度。相对普通LCD显示技术,FALD能有效增强显示的亮度和对比度,此外FALD可通过背光频闪和背光扫描技术实现黑帧插入(black frame insertion,BFI),改善因视觉残留导致的伪影。当采用FALD时,背光数据实质上是一种仅有亮度信息的低分辨率视频图像。所以SOC芯片需要将原始视频图像和背光图像通过两套视频信号传输接口分开传输给TCON芯片,TCON芯片基于背光图像和原始视频图像点亮屏幕。
基于上述问题,本申请提供一种视频传输方法和装置,能够通过一套视频信号传输接口传输一个或多个视频数据流。
图2示出了本申请实施例提供的视频传输方法200的示意性流程图,该方法200可以应用于图1中所示的系统100中。如图2所示,该方法200可以包括以下步骤,需要说明的是,以下所列步骤可以以各种顺序执行和/或同时发生,不限于图2所示的执行顺序。
S201,发送端对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符。
可选地,本申请中所述的至少一个视频数据流的数量可以为一个、两个或两个以上,本申请对此不做限定。
可选地,本申请对该至少一个视频数据流的来源不做限定。
示例的,该至少一个视频数据流的数量为1个时,这1个视频数据流可以为原始视频图像(或原始视频图像序列)形成的视频数据流。
示例的,该至少一个视频数据流的数量为2个时,这2个视频数据流可以包括原始视频图像(或原始视频图像序列)形成的2个视频数据流。
示例的,该至少一个视频数据流的数量为2个时,这2个视频数据流可以包括原始视频图像(或原始视频图像序列)形成的1个视频数据流和背光图像(或背光图像序列)形成的1个视频数据流。
需要说明的是,视频帧(即视频图像)可以由水平消隐开始符(horizontal blank start,HBS)(也称为行消隐符)、水平消隐区(也称为行消隐区)、垂直消隐开始符(vertical blank start,VBS)(也称为场消隐符)、垂直消隐区(也称为场消隐区)、视频开始符(active video start,AVS)和像素区构成。
其中,水平方向通过水平同步信号(HSYNC)(也称为行同步信号)进行同步,垂直方向通过垂直同步信号(VSYNC)(也称为场同步信号)进行同步,像素区通过有效显示数据选通信号(DE)使能。
示例的,图3示出了本申请实施例提供的视频帧的编码示意图。如图3所示,视频帧可以包括VBS、垂直消隐区、HBS、水平消隐区、AVS和像素区。其中,图3中的VBS、HBS和AVS属于控制数据,图3中的垂直消隐区数据、行消隐区数据和像素区数据属于 有效数据。
可选地,本申请实施例中所述的控制符号可以为VBS、HBS或AVS等控制数据形成的符号。
可选地,本申请实施例中所述的有效数据符号可以为消隐区数据或像素区数据等有效数据形成的符号。
在一种可能的实现方式中,本申请中所述的各种符号(如控制符号、有效数据符号等)的长度可以为16比特(bits),即1个符号的长度等于2个字节的长度。
在一种可能的实现方式中,可以将视频帧中的数据按照每16比特组成1个符号,形成视频数据流。
示例的,将图3中所示的视频帧按照每16比特组成1个符号可以得到如图4所示的视频数据流,图4中的每一行表示一个长度为16bits的符号,图4中的“黑色背景区域”示出了VBS、HBS和AVS形成的控制符号,“白色背景区域”示出了水平消隐区数据形成的有效数据符号、垂直消隐区数据形成的有效数据符号以及像素区数据形成的有效数据符号。
可选地,当有效数据的比特数不是16bits的整数倍时,需要填充数据(如填充0),使其正好为16的整数倍,其中,0<填充数据的比特数<16,以确保VBS、HBS、AVS出现在16bits对齐的位置上,填充数据属于有效数据。
示例的,图4中的垂直消隐区数据和水平消隐区1数据中的有效数据不是16bit的倍数,均缺少1个符号的有效数据,因此,通过1个符号的填充数据“0x00”填充。
需要说明的是,图3和图4仅以一个视频帧的数据形成的视频数据流为例进行介绍,但本申请不限于此。本申请中所述的视频数据流可以是由视频帧序列包括的多个视频帧的数据形成的。
在一种可能的实现方式中,本申请中所述的链路编码可以为128b/132b链路编码。
在一种可能的实现方式中,本申请中所述的各种同步头(如第一同步头)的长度可以为4比特,本申请中所述的各种字符(如控制字符、数据字符等)的长度可以为128比特,(即1个字符的长度等于8个符号的长度),本申请中所述的目标数据的长度可以为132比特。
在一种可能的实现方式中,可以将该至少一个视频数据流中包括的符号按照每8个符号组成一个字符,并根据该字符中是否包括控制符号,将字符分为两种字符类型:数据字符和控制字符。
也就是说,本申请中所述的控制字符可以包括至少两个符号,该至少两个符号中的至少一个符号为控制符号;本申请中所述的数据字符可以包括至少两个符号,该至少两个符号均为有效数据符号。
示例的,图5示出了本申请实施例提供的视频数据流形成的字符的示意图。如图5所示,3个“方框”分别标识出了控制字符1、控制字符2和控制字符3。其中,控制字符1中包括1个控制符号VBS和垂直消隐区数据形成的7个有效数据符号,控制字符2中包括垂直消隐区数据形成的2个有效数据符号、1个控制符号AVS和像素区数据形成的5个有效数据符号,控制字符3中包括像素区数据形成的1个有效数据符号、1个控制符号HBS和行消隐区数据形成的6个有效数据符号。
在一种可能的实现方式中,控制字符的格式需要满足该控制字符中的第一个控制符号位于该控制字符的第一个符号的位置,也就是说,该控制字符的第一个符号为控制符号,如图5中的控制字符1所示。
然而,在由视频数据流中的8个符号形成的1个控制字符的过程中,控制符号不一定位于该控制字符的第一个符号,即控制字符的第一个符号为有效数据符号,如图5中的控制字符2或控制字符3所示。
因此,在生成控制字符的过程中需要对这8个符号进行特殊处理,以使处理后的8个字符满足上述控制字符的格式要求。
示例的,图6和图7示出了本申请实施例提供的控制字符的处理示意图,视频数据流中的8个符号形成如图6所示的控制字符,该控制字符的符号0为有效数据符号,符号2为控制符号(即AVS),为使控制字符满足上述格式要求,需要将该符号0和符号2进行互换,得到如图7所示的控制字符。
在一种可能的实现方式中,为了使收接收端知道控制字符中的第一个控制符号原本的位置,控制字符中的第一个控制符号的位置和类型(或标识)通过控制字符中第一个符号指示。
可选地,控制字符中的第一个符号可以通过多种方式指示该控制字符中的第一个控制符号的位置和类型,本申请实施例对此不作限定。
在一种可能的实现方式中,该控制字符中的第一个符号可以包括第一字节和第二字节,该第一字节用于指示该第一个控制符号的位置,该第二字节用于指示该第一个控制符号的类型。
示例的,图8示出了本申请实施例提供的控制字符的格式示意图。如图8所示,控制字符包括8个符号,如图8中所示的符号0~符号7,每1行表示1个符号。控制字符的符号0(即第一个符号)可以包括KD_Dis字节和K_Type字节,其中,KD_Dis字节指示该控制字符中的第一个控制符号的在符号0~符号7中的位置,K_Type字节指示该第一个控制符号的类型(用于标识该第一个控制符号)。
示例的,该控制字符的KD_Dis字节为“00000100”可以指示该控制字符中第一个控制符号的位置为符号2的位置,该控制字符的K_Type字节为“00000011”可以指示该第一个控制符号的类型为AVS(即0x03)。
可选地,第一同步头可以通过多种方式通过4个比特指示指示该目标字符所属的视频数据流和该目标字符的字符类型,本申请对此不做限定。
在一种可能的实现方式中,该同步头可以通过4个比特中的第1个比特指示该目标字符所属的视频数据流,并通过4个比特中的第2个比特指示该目标字符的字符类型。
在一种可能的实现方式中,以该至少一个视频数据流包括视频数据流0和视频数据流1为例,目标字符的第一同步头的第1个比特为“0”可以指示该目标字符属于数据字符,该第1个比特为“1”可以指示该目标字符属于控制字符,目标字符的第一同步头的第2个比特为“0”可以指示该目标字符属于视频数据流0,该第2个比特为“1”可以指示该目标字符属于视频数据流1。
示例的,第一同步头为“0011”可以指示该目标字符属于视频数据流0,且该目标字符为数据字符;第一同步头为“1010”可以指示该目标字符属于视频数据流0,且该目标 字符为控制字符;第一同步头为“0110”可以指示该目标字符属于视频数据流1,且该目标字符为数据字符;第一同步头为“1100”可以指示该目标字符属于视频数据流1,且目标该字符为控制字符。
S202.该发送端向接收端发送该至少一个目标数据;相应地,该接收端接收来自该发送端的该至少一个目标数据。
可选地,在S202之前,该发送端可以对该至少一个目标数据进行校验编码,得到至少一个第一校验符号;S202具体可以包括向该接收端发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型。
相应地,该接收端可以接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一个第二校验符号,确定该至少一个目标数据。
在一种可能的实现方式中,若该至少一个第一校验符号和该至少一个第二校验符号相同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量大于预设的数量阈值,则该发送端可以确定该至少一个目标数据正确,从而得到该至少一个目标数据。
可选地,若该至少一个第一校验符号和该至少一个第二校验符号不同,或者,该至少一个第一校验符号和该至少一个第二校验符号中相同的符号数量小于或等于预设的数量阈值,则该发送端可以确定该至少一个目标数据发生错误,需要根据RS规则对该至少一个目标数据进行更正。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该发送端可以对该至少一个目标数据中的每个目标数据的目标字符和该每个目标数据的第一同步头的部分比特进行校验编码,得到该至少一个第一校验符号。
可选地,该发送端可以采用多种算法对该至少一个目标数据进行校验编码,本申请对此不做限定。
在一种可能的实现方式中,该发送端可以采用里德所罗门(Reed-solomon,RS)算法,如RS(242,228)算法对该至少一个目标数据进行校验编码。
示例的,图9示出了本申请实施例提供的RS校验编码的流程示意图。如图9所示,待编码的14个目标数据包括目标数据0~目标数据13,其中,目标数据0包括同步头0和 字符0、目标数据1包括同步头1和字符1……目标数据13包括同步头13和字符13。RS校验编码的工作区包含228个字节的待编码数据,该228个字节包括字符0~字符13构成的224个字节,同步头0~同步头13中的每个同步头的前2个比特以及4个字节的填充数据构成的4个字节;对该228个字节进行RS校验编码,生成14个字节的RS校验码,即7个第一校验符号,该第一校验符号的符号类型为控制符号;将该14个字节的RS校验码填入校验字符的后14个字节;为该14个字节的校验码添加控制符号和同步头14(即第二同步头),生成校验数据;该校验数据和上述14个目标数据形成校验编码后的编码块。
其中,RS符号和该14个字节的校验码(即7个第一校验符号)可以构成一个校验字符,该校验字符的字符类型为控制字符,该RS符号可以包括字节1和字节2,该字节1可以指示该校验字符中的第一个控制符号位于该校验字符的第一个符号处,该字节2可以指示该校验字符中的第一个控制符号的类型为RS校验符号。该校验字符和该第二同步头可以构成该校验数据,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型。
示例的,以该至少一个视频数据流包括视频数据流0和视频数据流1,该视频数据流0是由原始视频图像形成的,该第二同步头可以为“1010”,用于指示该校验字符属于视频数据流0,且该校验字符为控制字符。
采用本申请实施例提供的视频传输方法,对该至少一个目标数据进行校验编码,增加了视频传输的可靠性,保证了接收端显示画面的质量。
可选地,该至少一个目标数据(或编码块)的数量为多个时,该发送端可以通过多种方式向该接收端发送该多个目标数据(或编码块),本申请对此不作限定。
在一种可能的实现方式中,该发送端可以对该多个目标数据(或编码块)进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
相应地,该接收端可以接收该传输数据流;对该传输数据流进行串并转换,得到该多个目标数据(或编码块)。
在一种可能的实现方式中,以编码块为例,该发送端可以为每P个编码块加上一个前置的加扰复位(scramble reset,SR)字符或字符界定(character delimitation,CS)字符,得到多个传输数据块(link transport block,LTB),其中,SR字符和CD字符属于控制字符,P为大于1的整数;基于Q个传输数据块得到一个传输数据片(link transport fragment,LTF),其中,Q为大于1的整数;基于至少一个传输数据片,得到该传输数据流;向该接收端发送该传输数据流。
示例的,图10示出了本申请实施例提供的传输数据块的示意图。如图10所示,该传输数据块包括SR/CD字符和27个编码块。
示例的,图11示出了本申请实施例提供的传输数据片的示意图。如图11所示,该传输数据片由16个传输数据块构成,如图11中所示的传输数据块0、传输数据块1……传输数据块15,其中,传输数据块0是以SR字符开始,剩余15个传输数据块均以CD字符开始。
相应地,该接收端可以基于该传输数据流中的至少一个SR字符,确定该传输数据流中的至少一个传输数据片,其中,该至少一个传输数据片中的每个传输数据片包括Q个传输数据块,该Q个传输数据块中的每个传输数据块包括SR/CD字符和P个编码块;基于 该每个传输数据块中的SR/CD字符,确定该每个传输数据块包括的P个编码块。
采用本申请提供的视频传输方法,发送端将多路低速并行信号转换成高速串行信号,传输至接收端,接收端将接收到的高速串行信号重新转换成低速并行信号。这种点对点的串行通信技术充分利用传输媒体的信道容量,减少所需的传输信道和器件引脚数目,能够提升视频信号的传输速度,从而降低通信成本。
S203.该接收端对所述至少一个目标数据进行链路解码,得到所述至少一个视频数据流。
上述S203为上述S201的逆过程。
也就是说,该接收端可以基于每个目标字符的字符类型和该每个目标字符所属的视频数据流,恢复出该至少一个视频数据流。
可选地,上述由发送端执行的步骤也可以由该发送端侧的视频传输装置(如图1中的视频传输装置110)执行,上述由接收端执行的步骤也可以由该接收端侧的视频传输装置(如图1中的视频传输装置120)执行,本申请对此不做限定。
采用本申请实施例提供的视频传输方法,发送端为至少一个视频数据流中的每个目标字符添加第一同步头得到目标数据,该第一同步头用于指示该每个目标字符所属的视频数据流和该每个目标字符的字符类型,并向接收端发送添加了第一同步头的目标字符;相应地,接收端可以基于每个目标数据中的第一同步头,确定该每个目标数据中的目标字符所属的视频数据流和该目标字符的字符类型,并基于该每个目标数据中的目标字符的字符类型和该目标字符所属的视频数据流,恢复出该至少一个视频数据流。能够实现通过一套视频信号传输接口传输该至少一个视频数据流,有利于降低成本开销。
上面结合图2至图11介绍了本申请实施例提供的视频传输方法,下面进一步介绍本申请实施例提供的视频传输装置。
图12示出了本申请实施例提供的视频传输装置300的示意性框图。如图12所示,该装置300可以包括:链路编码单元301和发送单元302。
该链路编码单元301用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符。
该发送单元302用于向接收端发送该至少一个目标数据。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中 的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置还可以包括校验编码单元303;该校验编码单元303用于在该发送单元302向接收端发送该至少一个目标数据之前,对该至少一个目标数据进行校验编码,得到至少一个第一校验符号;该发送单元302具体用于向该接收端发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该发送单元302具体用于对多个目标数据进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
需要说明的是,上述单元之间的信息交互、执行过程等内容,由于与本申请方法实施例基于同一构思,其具体功能及带来的技术效果,具体可参见方法实施例部分,此处不再赘述。在一个可选例子中,装置300可以具体为上述方法200实施例中发送端侧的视频传输装置(如视频传输装置110),装置300可以用于执行上述方法200实施例中与发送端侧的视频传输装置对应的各个流程和/或步骤,为避免重复,在此不再赘述。
图12所示实施例中的各个单元中的一个或多个可以通过软件、硬件、固件或其结合实现。该软件或固件包括但不限于计算机程序指令或代码,并可以被硬件处理器所执行。该硬件包括但不限于各类集成电路,如中央处理单元(CPU,Central Processing Unit)、数字信号处理器(DSP,Digital Signal Processor)、现场可编程门阵列(FPGA,Field Programmable Gate Array)或专用集成电路(ASIC,Application Specific Integrated Circuit)。
图13示出了本申请实施例提供的视频传输装置400的示意性框图。如图13所示,该装置400可以包括链路编码器401和端口402。
该链路编码器401用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括该多个符号中的至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该端口402发送该至少一个目标数据。具体过程可以参考上述S201中的相关介绍。
该端口402用于向接收端发送该至少一个目标数据。具体过程可以参考上述S202中的相关介绍。
可选地,该至少一个目标数据的数量为多个,该端口具有并串转换功能。该端口402具体用于对多个目标数据进行并串转换,得到目标数据流;向该接收端发送该目标数据流。
可选地,如图14所示,该装置400还可以包括校验编码器403。
在一种可能的实现方式中,该链路编码器401具体用于向该校验编码器403发送该至少一个目标数据。该校验编码器403用于对该至少一个目标数据进行校验编码,得到至少 一个第一校验符号;向该端口402发送编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型。该端口402具体用于向该接收端发送该编码块。
可选地,该编码块的数量为多个,该端口具有并串转换功能。该端口402具体用于对多个编码块进行并串转换,得到传输数据流;向该接收端发送该传输数据流。
在一个可选例子中,装置400可以具体为上述方法200实施例中发送端侧的视频传输装置(如视频传输装置110),装置400可以用于执行上述方法200实施例中与发送端侧的视频传输装置(如视频传输装置110)对应的各个流程和/或步骤,为避免重复,在此不再赘述。
图15示出了本申请实施例提供的视频传输装置500的示意性框图。如图15所示,该装置500可以包括:接收单元501和链路解码单元502。
该接收单元501用于接收来自发送端的至少一个目标数据,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该链路解码器发送该至少一个目标数据;
该链路解码单元502用于对该至少一个目标数据进行链路解码,得到至少一个视频数据流,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该多个符号包括该至少两个符号。
在一种可能的实现方式中,该至少一个视频数据流的数量为两个或两个以上。
在一种可能的实现方式中,该符号的长度为16比特,该第一同步头的长度为4比特,该目标字符的长度为128比特。
在一种可能的实现方式中,若该至少两个符号均为有效数据符号,则该目标字符为数据字符。
在一种可能的实现方式中,若该至少两个符号中的至少一个符号为控制符号,则该目标字符为控制字符。
在一种可能的实现方式中,该至少两个符号中的第一个控制符号在该至少两个符号中的位置和该至少两个符号中的第一个控制符号的类型通过该至少两个符号中的第一个符号指示。
在一种可能的实现方式中,该装置500还可以包括校验解码单元503;该接收单元501具体用于接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;该校验解码单元503用于基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至 少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一个第二校验符号,确定该至少一个目标数据。
在一种可能的实现方式中,该至少一个目标数据的数量为14个,该至少一个校验符号的数量为7个,该第二同步头的长度为4比特。
在一种可能的实现方式中,该至少一个目标数据的数量为多个,该接收单元501具体用于接收来自该发送端的传输数据流;对该传输数据流进行串并转换,得到该多个目标数据。
需要说明的是,上述单元之间的信息交互、执行过程等内容,由于与本申请方法实施例基于同一构思,其具体功能及带来的技术效果,具体可参见方法实施例部分,此处不再赘述。在一个可选例子中,装置500可以具体为上述方法200实施例中接收端侧的视频传输装置(如视频传输装置120),装置500可以用于执行上述方法200实施例中与接收端侧的视频传输装置对应的各个流程和/或步骤,为避免重复,在此不再赘述。
图15所示实施例中的各个单元中的一个或多个可以通过软件、硬件、固件或其结合实现。所述软件或固件包括但不限于计算机程序指令或代码,并可以被硬件处理器所执行。所述硬件包括但不限于各类集成电路,如CPU、DSP、FPGA或ASIC。
图16示出了本申请实施例提供的视频传输装置600的示意性框图。如图16所示,该装置600可以包括端口601和链路解码器602。
该端口601用于接收来自发送端的至少一个目标数据,该至少一个目标数据中的每个目标数据包括第一同步头和目标字符,该目标字符包括至少两个符号,该第一同步头用于指示该目标字符所属的视频数据流和该目标字符的字符类型,该字符类型包括控制字符或数据字符;向该链路解码器发送该至少一个目标数据。具体过程可以参考上述S202中的相关介绍。
该链路解码器602用于对该至少一个目标数据进行链路解码,得到至少一个视频数据流,该至少一个视频数据流中的每个视频数据流包括多个符号,该符号的符号类型包括控制符号或有效数据符号,该多个符号包括该至少两个符号。具体过程可以参考上述S203中的相关介绍。
可选地,该至少一个目标数据的数量为多个,该端口601具有串并转换功能;该端口601具体用于接收来自发送端的目标数据流;对该目标数据流进行串并转换得到多个目标数据。
可选地,如图17所示,该装置600还可以包括校验解码器603。
在一种可能的实现方式中,该端口601具体用于接收来自该发送端的编码块,该编码块包括该至少一个目标数据和该至少一个目标数据的校验数据,该校验数据包括第二同步头和校验字符,该校验字符包括RS符号和该至少一个第一校验符号,其中,该第二同步头用于指示该校验字符所属的视频数据流和该校验字符的字符类型,该RS符号用于指示该校验字符中的第一个控制符号在该校验字符中的位置和该校验字符中的第一个控制符号的类型,该至少一个第一校验符号是对该至少一个目标数据进行校验编码得到的;向该链路解码器发送该编码块。该链路解码器603用于基于该校验数据中的第二同步头和该校验数据中的RS符号,确定该校验数据中的至少一个第一校验符号;对该至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于该至少一个第一校验符号和该至少一 个第二校验符号,确定该至少一个目标数据。
可选地,该至少一个目标数据的数量为多个,该端口601具有串并转换功能;该端口601具体用于接收来自该发送端的传输数据流;对该传输数据流进行串并转换,得到多个目标数据。
在一个可选例子中,本领域技术人员可以理解,装置600可以具体为上述方法200实施例中的接收端侧的视频传输装置(如视频传输装置120),装置600可以用于执行上述方法200实施例中与接收端侧的视频传输装置对应的各个流程和/或步骤,为避免重复,在此不再赘述。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
在本申请所提供的几个实施例中,应该理解到,所揭露的系统和装置,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质或者存储器包括:U盘、移动硬盘、ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。

Claims (38)

  1. 一种视频传输方法,其特征在于,包括:
    对至少一个视频数据流进行链路编码,得到至少一个目标数据,所述至少一个视频数据流中的每个视频数据流包括多个符号,所述符号的符号类型包括控制符号或有效数据符号,所述至少一个目标数据中的每个目标数据包括第一同步头和目标字符,所述目标字符包括所述多个符号中的至少两个符号,所述第一同步头用于指示所述目标字符所属的视频数据流和所述目标字符的字符类型,所述字符类型包括控制字符或数据字符;
    向接收端发送所述至少一个目标数据。
  2. 根据权利要求1所述的方法,其特征在于,所述至少一个视频数据流的数量为两个或两个以上。
  3. 根据权利要求1或2所述的方法,其特征在于,所述符号的长度为16比特,所述第一同步头的长度为4比特,所述目标字符的长度为128比特。
  4. 根据权利要求1-3中任一项所述的方法,其特征在于,若所述至少两个符号均为有效数据符号,则所述目标字符为数据字符。
  5. 根据权利要求1-4中任一项所述的方法,其特征在于,若所述至少两个符号中的至少一个符号为控制符号,则所述目标字符为控制字符。
  6. 根据权利要求5所述的方法,其特征在于,所述至少两个符号中的第一个控制符号在所述至少两个符号中的位置和所述至少两个符号中的第一个控制符号的类型通过所述至少两个符号中的第一个符号指示。
  7. 根据权利要求1-6中任一项所述的方法,其特征在于,在所述向接收端发送所述至少一个目标数据之前,所述方法还包括:
    对所述至少一个目标数据进行校验编码,得到至少一个第一校验符号;
    所述向接收端发送所述至少一个目标数据,包括:
    向所述接收端发送编码块,所述编码块包括所述至少一个目标数据和所述至少一个目标数据的校验数据,所述校验数据包括第二同步头和校验字符,所述校验字符包括RS符号和所述至少一个第一校验符号,其中,所述第二同步头用于指示所述校验字符所属的视频数据流和所述校验字符的字符类型,所述RS符号用于指示所述校验字符中的第一个控制符号在所述校验字符中的位置和所述校验字符中的第一个控制符号的类型。
  8. 根据权利要求7所述的方法,其特征在于,所述至少一个目标数据的数量为14个,所述至少一个校验符号的数量为7个,所述第二同步头的长度为4比特。
  9. 根据权利要求1-8中任一项所述的方法,其特征在于,所述至少一个目标数据的数量为多个,所述向接收端发送所述多个目标数据,包括:
    对多个目标数据进行并串转换,得到传输数据流;
    向所述接收端发送所述传输数据流。
  10. 一种视频传输方法,其特征在于,包括:
    接收来自发送端的至少一个目标数据,所述至少一个目标数据中的每个目标数据包括第一同步头和目标字符,所述目标字符包括至少两个符号,所述第一同步头用于指示所述目标字符所属的视频数据流和所述目标字符的字符类型,所述字符类型包括控制字符或数 据字符;
    对所述至少一个目标数据进行链路解码,得到至少一个视频数据流,所述至少一个视频数据流中的每个视频数据流包括多个符号,所述符号的符号类型包括控制符号或有效数据符号,所述多个符号包括所述至少两个符号。
  11. 根据权利要求10所述的方法,其特征在于,所述至少一个视频数据流的数量为两个或两个以上。
  12. 根据权利要求10或11所述的方法,其特征在于,所述符号的长度为16比特,所述第一同步头的长度为4比特,所述目标字符的长度为128比特。
  13. 根据权利要求10-12中任一项所述的方法,其特征在于,若所述至少两个符号均为有效数据符号,则所述目标字符为数据字符。
  14. 根据权利要求10-13中任一项所述的方法,其特征在于,若所述至少两个符号中的至少一个符号为控制符号,则所述目标字符为控制字符。
  15. 根据权利要求14所述的方法,其特征在于,所述至少两个符号中的第一个控制符号在所述至少两个符号中的位置和所述至少两个符号中的第一个控制符号的类型通过所述至少两个符号中的第一个符号指示。
  16. 根据权利要求10-15中任一项所述的方法,其特征在于,所述接收来自发送端的至少一个目标数据,包括:
    接收来自所述发送端的编码块,所述编码块包括所述至少一个目标数据和所述至少一个目标数据的校验数据,所述校验数据包括第二同步头和校验字符,所述校验字符包括RS符号和所述至少一个第一校验符号,其中,所述第二同步头用于指示所述校验字符所属的视频数据流和所述校验字符的字符类型,所述RS符号用于指示所述校验字符中的第一个控制符号在所述校验字符中的位置和所述校验字符中的第一个控制符号的类型,所述至少一个第一校验符号是对所述至少一个目标数据进行校验编码得到的;
    基于所述校验数据中的第二同步头和所述校验数据中的RS符号,确定所述校验数据中的至少一个第一校验符号;
    对所述至少一个目标数据进行校验编码,得到至少一个第二校验符号;
    基于所述至少一个第一校验符号和所述至少一个第二校验符号,确定所述至少一个目标数据。
  17. 根据权利要求16所述的方法,其特征在于,所述至少一个目标数据的数量为14个,所述至少一个校验符号的数量为7个,所述第二同步头的长度为4比特。
  18. 根据权利要求10-17中任一项所述的方法,其特征在于,所述至少一个目标数据的数量为多个,所述接收来自发送端的多个目标数据,包括:
    接收来自所述发送端的传输数据流;
    对所述传输数据流进行串并转换,得到多个目标数据。
  19. 一种视频传输装置,其特征在于,包括:链路编码器和端口;
    所述链路编码器用于对至少一个视频数据流进行链路编码,得到至少一个目标数据,所述至少一个视频数据流中的每个视频数据流包括多个符号,所述符号的符号类型包括控制符号或有效数据符号,所述至少一个目标数据中的每个目标数据包括第一同步头和目标字符,所述目标字符包括所述多个符号中的至少两个符号,所述第一同步头用于指示所述 目标字符所属的视频数据流和所述目标字符的字符类型,所述字符类型包括控制字符或数据字符;向所述端口发送所述至少一个目标数据;
    所述端口用于向接收端发送所述至少一个目标数据。
  20. 根据权利要求19所述的装置,其特征在于,所述至少一个视频数据流的数量为两个或两个以上。
  21. 根据权利要求19或20所述的装置,其特征在于,所述符号的长度为16比特,所述第一同步头的长度为4比特,所述目标字符的长度为128比特。
  22. 根据权利要求19-21中任一项所述的装置,其特征在于,若所述至少两个符号均为有效数据符号,则所述目标字符为数据字符。
  23. 根据权利要求19-22中任一项所述的装置,其特征在于,若所述至少两个符号中的至少一个符号为控制符号,则所述目标字符为控制字符。
  24. 根据权利要求23所述的装置,其特征在于,所述至少两个符号中的第一个控制符号在所述至少两个符号中的位置和所述至少两个符号中的第一个控制符号的类型通过所述至少两个符号中的第一个符号指示。
  25. 根据权利要求19-24中任一项所述的装置,其特征在于,所述装置还包括:校验编码器;
    所述链路编码器具体用于向所述校验编码器发送所述至少一个目标数据;
    所述校验编码器用于对所述至少一个目标数据进行校验编码,得到至少一个第一校验符号;向所述端口发送编码块,所述编码块包括所述至少一个目标数据和所述至少一个目标数据的校验数据,所述校验数据包括第二同步头和校验字符,所述校验字符包括RS符号和所述至少一个第一校验符号,其中,所述第二同步头用于指示所述校验字符所属的视频数据流和所述校验字符的字符类型,所述RS符号用于指示所述校验字符中的第一个控制符号在所述校验字符中的位置和所述校验字符中的第一个控制符号的类型;
    所述端口具体用于向所述接收端发送所述编码块。
  26. 根据权利要求25所述的装置,其特征在于,所述至少一个目标数据的数量为14个,所述至少一个校验符号的数量为7个,所述第二同步头的长度为4比特。
  27. 根据权利要求19-26中任一项所述的装置,其特征在于,所述至少一个目标数据的数量为多个,所述端口具有并串转换功能;
    所述端口具体用于对多个目标数据进行并串转换,得到传输数据流;向所述接收端发送所述传输数据流。
  28. 一种视频传输装置,其特征在于,包括:端口和链路解码器;
    所述端口用于接收来自发送端的至少一个目标数据,所述至少一个目标数据中的每个目标数据包括第一同步头和目标字符,所述目标字符包括至少两个符号,所述第一同步头用于指示所述目标字符所属的视频数据流和所述目标字符的字符类型,所述字符类型包括控制字符或数据字符;向所述链路解码器发送所述至少一个目标数据;
    所述链路解码器用于对所述至少一个目标数据进行链路解码,得到至少一个视频数据流,所述至少一个视频数据流中的每个视频数据流包括多个符号,所述符号的符号类型包括控制符号或有效数据符号,所述多个符号包括所述至少两个符号。
  29. 根据权利要求28所述的装置,其特征在于,所述至少一个视频数据流的数量为两 个或两个以上。
  30. 根据权利要求28或29所述的装置,其特征在于,所述符号的长度为16比特,所述第一同步头的长度为4比特,所述目标字符的长度为128比特。
  31. 根据权利要求28-30中任一项所述的装置,其特征在于,若所述至少两个符号均为有效数据符号,则所述目标字符为数据字符。
  32. 根据权利要求28-31中任一项所述的装置,其特征在于,若所述至少两个符号中的至少一个符号为控制符号,则所述目标字符为控制字符。
  33. 根据权利要求32所述的装置,其特征在于,所述至少两个符号中的第一个控制符号在所述至少两个符号中的位置和所述至少两个符号中的第一个控制符号的类型通过所述至少两个符号中的第一个符号指示。
  34. 根据权利要求28-33中任一项所述的装置,其特征在于,所述装置还包括:校验解码器;
    所述端口具体用于接收来自所述发送端的编码块,所述编码块包括所述至少一个目标数据和所述至少一个目标数据的校验数据,所述校验数据包括第二同步头和校验字符,所述校验字符包括RS符号和所述至少一个第一校验符号,其中,所述第二同步头用于指示所述校验字符所属的视频数据流和所述校验字符的字符类型,所述RS符号用于指示所述校验字符中的第一个控制符号在所述校验字符中的位置和所述校验字符中的第一个控制符号的类型,所述至少一个第一校验符号是对所述至少一个目标数据进行校验编码得到的;向所述链路解码器发送所述编码块;
    所述链路解码器用于基于所述校验数据中的第二同步头和所述校验数据中的RS符号,确定所述校验数据中的至少一个第一校验符号;对所述至少一个目标数据进行校验编码,得到至少一个第二校验符号;基于所述至少一个第一校验符号和所述至少一个第二校验符号,确定所述至少一个目标数据。
  35. 根据权利要求34所述的装置,其特征在于,所述至少一个目标数据的数量为14个,所述至少一个校验符号的数量为7个,所述第二同步头的长度为4比特。
  36. 根据权利要求28-35中任一项所述的装置,其特征在于,所述至少一个目标数据的数量为多个,所述端口具有串并转换功能;
    所述端口具体用于接收来自所述发送端的传输数据流;对所述传输数据流进行串并转换,得到多个目标数据。
  37. 一种计算机可读存储介质,其特征在于,用于存储计算机程序,所述计算机程序被处理器运行时,实现如上述权利要求1-9中任一项所述的方法或如上述权利要求10-18中任一项所述的方法。
  38. 一种计算机程序产品,其特征在于,当所述计算机程序产品在处理器上运行时,实现如上述权利要求1-9中任一项所述的方法或如上述权利要求10-18中任一项所述的方法。
PCT/CN2021/130953 2021-11-16 2021-11-16 一种视频传输方法和装置 WO2023087143A1 (zh)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003058376A2 (en) * 2001-12-24 2003-07-17 Silicon Image, Inc. System for regenerating a clock for data transmission
CN101073257A (zh) * 2004-12-22 2007-11-14 中兴通讯股份有限公司 在会议电视系统中传输多路视频的方法
US20090285096A1 (en) * 2008-05-14 2009-11-19 Newport Media, Inc. Hardware accelerated protocol stack for mediaflo
CN102186035A (zh) * 2010-12-29 2011-09-14 友达光电股份有限公司 屏幕显示信息的显示方法
CN105703875A (zh) * 2014-11-25 2016-06-22 中兴通讯股份有限公司 一种消息传输的方法,设备和系统
CN107534776A (zh) * 2015-01-06 2018-01-02 微软技术许可有限责任公司 并行处理以识别视频数据中的标记序列

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003058376A2 (en) * 2001-12-24 2003-07-17 Silicon Image, Inc. System for regenerating a clock for data transmission
CN101073257A (zh) * 2004-12-22 2007-11-14 中兴通讯股份有限公司 在会议电视系统中传输多路视频的方法
US20090285096A1 (en) * 2008-05-14 2009-11-19 Newport Media, Inc. Hardware accelerated protocol stack for mediaflo
CN102186035A (zh) * 2010-12-29 2011-09-14 友达光电股份有限公司 屏幕显示信息的显示方法
CN105703875A (zh) * 2014-11-25 2016-06-22 中兴通讯股份有限公司 一种消息传输的方法,设备和系统
CN107534776A (zh) * 2015-01-06 2018-01-02 微软技术许可有限责任公司 并行处理以识别视频数据中的标记序列

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