WO2023071028A1 - P-gan normally-closed power device having periodic gate structure - Google Patents

P-gan normally-closed power device having periodic gate structure Download PDF

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WO2023071028A1
WO2023071028A1 PCT/CN2022/081268 CN2022081268W WO2023071028A1 WO 2023071028 A1 WO2023071028 A1 WO 2023071028A1 CN 2022081268 W CN2022081268 W CN 2022081268W WO 2023071028 A1 WO2023071028 A1 WO 2023071028A1
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layer
gan
periodic
layers
power device
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王洪
高升
谢子敬
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华南理工大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to the field of semiconductors, in particular to a p-GaN normally-off power device with a periodic gate structure.
  • GaN HEMTs high electron mobility transistors
  • the existing mainstream solution is to use a p-GaN layer device to deplete the two-dimensional electron gas under the gate by growing a p-GaN layer.
  • a p-GaN layer device to deplete the two-dimensional electron gas under the gate by growing a p-GaN layer.
  • Mg ionization efficiency of Mg in p-GaN
  • a larger doping concentration is required to effectively deplete the two-dimensional electrons under the gate. gas.
  • This will make it easy for Mg to diffuse into the barrier layer and channel layer, resulting in degradation of device reliability (NE Posthuma, et al, 2016 28 th ISPSD conference). Therefore, on the one hand, it is necessary to improve the ionization efficiency of Mg; on the other hand, it is necessary to reduce the concentration of doped holes or introduce a barrier layer to limit the downward diffusion of Mg.
  • the present invention proposes a p-GaN normally-off power device with a periodic gate structure.
  • the step-type polarization electric field between the p-GaN/InGaN layers with variable indium composition effectively improves the ionization efficiency of Mg, and the periodic InGaN layers also prevent Mg from diffusing into the barrier layer and channel layer. effect.
  • the object of the present invention is achieved at least by one of the prior art solutions.
  • a p-GaN normally-off power device with a periodic gate structure including a substrate, a nucleation layer, a buffer layer, a channel layer, an insertion layer, and a barrier layer from bottom to top;
  • a source and a drain are arranged above the barrier layer, a periodic p-GaN/InGaN layer formed on the barrier layer is arranged between the source and the drain, and a gate is arranged on the periodic p-GaN/InGaN layer .
  • the periodic p-GaN/InGaN layer is periodically distributed with multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition from bottom to top, and A p-GaN layer is arranged between adjacent In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition.
  • the p-GaN of the p-GaN layer is doped with Mg, and the hole concentration is 2E17-2E18 cm ⁇ 3 .
  • the total thickness of the periodic p-GaN/InGaN layer is 80-120nm, wherein, the total thickness of all p-GaN layers is 60-90nm, each layer of In b Ga 1-b N layer with low indium composition
  • the thickness of each layer of In a Ga 1-a N layer with high indium composition is 0.5-5 nm.
  • the number of layers of In a Ga 1-a N layer with high indium composition is not less than 2; the low indium composition In the In b Ga 1-b N layer of the composition, 0.05 ⁇ b ⁇ 0.3, the number of layers of the In b Ga 1-b N layer of the low indium composition is not less than 2; the In a Ga 1-a of the high indium composition
  • the number of N layers is the same as that of the low indium composition InbGa1 -bN layer.
  • the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; and the barrier layer is AlGaN.
  • the present invention has the following beneficial effects and advantages:
  • Using periodic p-GaN/InGaN layers instead of p-GaN layers can effectively improve the ionization efficiency of Mg through the step-type polarization electric field between p-GaN/InGaN layers with variable indium composition.
  • it can be used in On the basis of satisfying the two-dimensional electron gas under the depletion gate, the doping concentration of Mg in p-GaN can be reduced to a certain extent, and the diffusion of Mg to the barrier layer and channel layer can be reduced, thereby reducing the leakage channel.
  • the band gap of In b Ga 1-b N with low indium composition is smaller. Compared with In a Ga 1- a N, In b Ga 1- b N has a lower threshold voltage under the same thickness. less impact.
  • the p-GaN layer and the InGaN layer are periodically arranged at intervals, it is equivalent to introducing a barrier layer under each layer of p-GaN with a small thickness, which can further effectively reduce the Mg barrier layer and channel Layer diffusion, thereby improving the reliability of the device.
  • FIG. 1 is a schematic structural diagram of a p-GaN normally-off power device de with a periodic gate structure in an embodiment of the present invention.
  • Example 2 is a simulated transfer curve of a p-GaN normally-off power device with a periodic gate structure corresponding to the control group, Example 1 and Example 2.
  • a p-GaN normally-off power device with a periodic gate structure as shown in FIG. Layer 106;
  • a source and a drain are arranged above the barrier layer 106, a periodic p-GaN/InGaN layer 107 formed on the barrier layer is arranged between the source and the drain, and the gate is arranged on the periodic p-GaN/InGaN layer 107. layer.
  • the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; the barrier layer is AlGaN;
  • the periodic p-GaN/InGaN layer 107 has multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition distributed periodically from bottom to top, and adjacent A p-GaN layer is arranged between the In b Ga 1-b N layer with low indium composition and the In a Ga 1-a N layer with high indium composition.
  • the In b Ga 1-b N layer with low indium composition b is 0.06, the thickness is 10nm, and the number of layers is 2;
  • the In a Ga 1-a N layer with high indium composition a is 0.6, the thickness is 4nm, and the number of layers is 2;
  • the total thickness of all p-GaN layers is 72 nm
  • the number of p-GaN layers is 4, and the p-GaN of the p-GaN layer is all doped with Mg, and the hole concentration is 2E18 cm -3 .
  • a p-GaN normally-off power device with a periodic gate structure as shown in FIG. Layer 106;
  • a source and a drain are arranged above the barrier layer 106, a periodic p-GaN/InGaN layer 107 formed on the barrier layer is arranged between the source and the drain, and the gate is arranged on the periodic p-GaN/InGaN layer 107. layer.
  • the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; the barrier layer is AlGaN;
  • the periodic p-GaN/InGaN layer 107 has multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition distributed periodically from bottom to top, and adjacent A p-GaN layer is arranged between the In b Ga 1-b N layer of low indium composition and the In a Ga 1-a N layer of high indium composition;
  • the In b Ga 1-b N layer with low indium composition b is 0.06, the thickness is 5nm, and the number of layers is 4;
  • the In a Ga 1-a N layer with high indium composition a is 0.6, the thickness is 2nm, and the number of layers is 4;
  • the total thickness of all p-GaN layers is 72 nm, the number of p-GaN layers is 8, and the p-GaN of the p-GaN layer is all doped with Mg, and the hole concentration is 2E18 cm -3 ;
  • Fig. 2 is the simulated transfer curve corresponding to control group, embodiment 1 and embodiment 2, wherein in the control group, there is no InGaN layer, the total thickness of all p-GaN layers is the same as that of all p-GaN layers in embodiment 1 and embodiment 2 The total thickness remains the same, and the concentration of doped Mg in p-GaN is also the same; the composition of InGaN in Example 1 and Example 2 is also the same, but the thickness and period are different; it can be seen from Figure 2 that compared with the control group , the threshold voltages of Example 1 and Example 2 are positively shifted, and compared with Example 1, the threshold voltage of Example 2 is larger.
  • step-type polarization electric field between the p-GaN/InGaN layers 107 with variable indium composition can effectively improve the ionization efficiency of Mg, thereby increasing the threshold voltage. And with the increase of the number of cycles, the interaction of the polarization electric field is stronger, and the threshold voltage is further increased.

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
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Abstract

Disclosed in the present invention is a p-GaN normally-closed power device having a periodic gate structure. The device comprises a substrate, a nucleating layer, a buffer layer, a channel layer, an insertion layer and a barrier layer from bottom to top, wherein a source electrode and a drain electrode are arranged on the barrier layer; a periodic p-GaN/InGaN layer that is formed on the barrier layer is arranged between the source electrode and the drain electrode; a gate electrode is arranged on the periodic p-GaN/InGaN layer; a plurality of InbGa1-bN layers with low indium components and a plurality of InaGa1-aN layers with high indium components are periodically distributed on the periodic p-GaN/InGaN layer from bottom to top; and a p-GaN layer is arranged between every InbGa1-bN layer with low indium components and InaGa1-aN layer with high indium components that are adjacent. By means of the present invention, the ionization efficiency of Mg in p-GaN can be effectively improved, and therefore the doping concentration of Mg can be reduced on the basis of ensuring that a two-dimensional electron gas under a gate is exhausted.

Description

一种周期栅结构的p-GaN常闭型功率器件A p-GaN normally-off power device with periodic gate structure 技术领域technical field
本发明涉及半导体领域，具体涉及一种周期栅结构的p-GaN常闭型功率器件。 The invention relates to the field of semiconductors, in particular to a p-GaN normally-off power device with a periodic gate structure.
背景技术Background technique
随着高压开关与射频电路的快速发展，高电子迁移率晶体管（GaN HEMT）受到了越来越多的关注。从安全性及成本考虑，常闭型器件是其应用的主流趋势。从当前的研究来看，凹槽型器件和氟离子注入型器件等均在工艺精确控制以及工艺所带来的损伤问题等方面存在较大瓶颈，尽管已经提出减小损伤的一些方案，但是器件的可靠性及工艺重复性问题还未得到很好的解决。With the rapid development of high-voltage switches and radio frequency circuits, high electron mobility transistors (GaN HEMTs) have received more and more attention. From safety and cost considerations, normally closed devices are the mainstream trend of its application. Judging from the current research, there are large bottlenecks in the precise control of the process and the damage caused by the process, such as the recessed device and the fluorine ion implanted device. Although some solutions to reduce the damage have been proposed, the device The reliability and process repeatability problems have not been well resolved.
现有的主流方案是采用p-GaN层器件，通过生长一层p-GaN层以耗尽栅下的二维电子气。但仍然存在一些问题：由于p-GaN中Mg的离化效率极低，约为Mg掺杂浓度的1%-2%，因此需要较大的掺杂浓度才能有效耗尽栅下的二维电子气。这会使得Mg很容易扩散到势垒层及沟道层，造成器件可靠性退化（N.E. Posthuma, et al, 2016 28 th ISPSD conference）。因此，一方面需要提高Mg的离化效率；另一方面，需要减小掺杂空穴浓度或者引入阻挡层来限制Mg向下扩散。 The existing mainstream solution is to use a p-GaN layer device to deplete the two-dimensional electron gas under the gate by growing a p-GaN layer. But there are still some problems: since the ionization efficiency of Mg in p-GaN is extremely low, about 1%-2% of the Mg doping concentration, a larger doping concentration is required to effectively deplete the two-dimensional electrons under the gate. gas. This will make it easy for Mg to diffuse into the barrier layer and channel layer, resulting in degradation of device reliability (NE Posthuma, et al, 2016 28 th ISPSD conference). Therefore, on the one hand, it is necessary to improve the ionization efficiency of Mg; on the other hand, it is necessary to reduce the concentration of doped holes or introduce a barrier layer to limit the downward diffusion of Mg.
技术解决方案technical solution
基于此，为了解决现有技术存在的问题，本发明提出了一种周期栅结构的p-GaN常闭型功率器件。通过变铟组分的p-GaN/InGaN层之间的阶梯型极化电场有效提高了Mg的离化效率，并且周期性的InGaN层也起到了阻挡Mg扩散到势垒层及沟道层的作用。Based on this, in order to solve the problems existing in the prior art, the present invention proposes a p-GaN normally-off power device with a periodic gate structure. The step-type polarization electric field between the p-GaN/InGaN layers with variable indium composition effectively improves the ionization efficiency of Mg, and the periodic InGaN layers also prevent Mg from diffusing into the barrier layer and channel layer. effect.
本发明的目的至少通过现有技术方案之一实现。The object of the present invention is achieved at least by one of the prior art solutions.
一种周期栅结构的p-GaN常闭型功率器件，自下而上包括衬底、成核层、缓冲层、沟道层、插入层以及势垒层；A p-GaN normally-off power device with a periodic gate structure, including a substrate, a nucleation layer, a buffer layer, a channel layer, an insertion layer, and a barrier layer from bottom to top;
势垒层上方设置有源极和漏极，源极和漏极之间设置有形成于势垒层上的周期性p-GaN/InGaN层，栅极设置于周期性p-GaN/InGaN层上。A source and a drain are arranged above the barrier layer, a periodic p-GaN/InGaN layer formed on the barrier layer is arranged between the source and the drain, and a gate is arranged on the periodic p-GaN/InGaN layer .
进一步地，所述周期性p-GaN/InGaN层自下至上周期分布有多层低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层，且相邻的低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层之间均设置有p-GaN层。 Further, the periodic p-GaN/InGaN layer is periodically distributed with multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition from bottom to top, and A p-GaN layer is arranged between adjacent In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition.
进一步地，p-GaN层的p-GaN中掺Mg，空穴浓度为2E17-2E18 cm -3。 Further, the p-GaN of the p-GaN layer is doped with Mg, and the hole concentration is 2E17-2E18 cm −3 .
进一步地，所述周期性p-GaN/InGaN层总厚度为80-120nm，其中，所有p-GaN层的总厚度为60-90nm，每层低铟组分的In bGa 1-bN层的厚度为5-10nm，每层高铟组分的In aGa 1-aN层的厚度为0.5-5nm。 Further, the total thickness of the periodic p-GaN/InGaN layer is 80-120nm, wherein, the total thickness of all p-GaN layers is 60-90nm, each layer of In b Ga 1-b N layer with low indium composition The thickness of each layer of In a Ga 1-a N layer with high indium composition is 0.5-5 nm.
进一步地，所述高铟组分的In aGa 1-aN层中，0.3<a<0.7，高铟组分的In aGa 1-aN层的层数不小于2；所述低铟组分的In bGa 1-bN层中，0.05<b<0.3，低铟组分的In bGa 1-bN层的层数不小于2；高铟组分的In aGa 1-aN层与低铟组分的In bGa 1-bN层的层数相同。 Further, in the In a Ga 1-a N layer with high indium composition, 0.3<a<0.7, the number of layers of In a Ga 1-a N layer with high indium composition is not less than 2; the low indium composition In the In b Ga 1-b N layer of the composition, 0.05<b<0.3, the number of layers of the In b Ga 1-b N layer of the low indium composition is not less than 2; the In a Ga 1-a of the high indium composition The number of N layers is the same as that of the low indium composition InbGa1 -bN layer.
进一步地，所述衬底为硅；所述成核层为AlN；所述缓冲层为AlGaN；所述沟道层为GaN；所述插入层为AlN；所述势垒层为AlGaN。Further, the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; and the barrier layer is AlGaN.
有益效果Beneficial effect
和现有技术相比，本发明具有以下有益效果和优点：Compared with the prior art, the present invention has the following beneficial effects and advantages:
1、采用周期性p-GaN/InGaN层替代p-GaN层，能够通过变铟组分的p-GaN/InGaN层之间的阶梯型极化电场有效提高Mg的离化效率，一方面可以在满足耗尽栅下二维电子气的基础上可以一定程度上减小p-GaN中Mg的掺杂浓度，减小Mg向势垒层及沟道层扩散，从而减小漏电通道。另一方面，低铟组分的In bGa 1-bN的禁带宽度更小， In bGa 1-bN相较于In aGa 1-aN，在相同厚度下前者对阈值电压的影响更小。 1. Using periodic p-GaN/InGaN layers instead of p-GaN layers can effectively improve the ionization efficiency of Mg through the step-type polarization electric field between p-GaN/InGaN layers with variable indium composition. On the one hand, it can be used in On the basis of satisfying the two-dimensional electron gas under the depletion gate, the doping concentration of Mg in p-GaN can be reduced to a certain extent, and the diffusion of Mg to the barrier layer and channel layer can be reduced, thereby reducing the leakage channel. On the other hand, the band gap of In b Ga 1-b N with low indium composition is smaller. Compared with In a Ga 1- a N, In b Ga 1- b N has a lower threshold voltage under the same thickness. less impact.
2、由于p-GaN层与InGaN层间隔周期性排列，相当于在较小厚度的每一层p-GaN下均引入了一层阻挡层，能够进一步有效减小Mg向势垒层及沟道层扩散，从而提高器件的可靠性。2. Since the p-GaN layer and the InGaN layer are periodically arranged at intervals, it is equivalent to introducing a barrier layer under each layer of p-GaN with a small thickness, which can further effectively reduce the Mg barrier layer and channel Layer diffusion, thereby improving the reliability of the device.
附图说明Description of drawings
图1为本发明实施例中的一种周期栅结构的p-GaN常闭型功率器件de 结构示意图。FIG. 1 is a schematic structural diagram of a p-GaN normally-off power device de with a periodic gate structure in an embodiment of the present invention.
图2为对照组、实施例1和实施例2对应的一种周期栅结构的p-GaN常闭型功率器件的仿真转移曲线。2 is a simulated transfer curve of a p-GaN normally-off power device with a periodic gate structure corresponding to the control group, Example 1 and Example 2.
本发明的实施方式Embodiments of the present invention
以下结合实例对本发明的具体实施作进一步说明，但本发明的实施和保护不限于此。需指出的是，以下若有未特别详细说明之过程，均是本领域技术人员可参照现有技术实现或理解的。The specific implementation of the present invention will be further described below in conjunction with examples, but the implementation and protection of the present invention are not limited thereto. It should be pointed out that, if there are any processes in the following that are not specifically described in detail, those skilled in the art can realize or understand with reference to the prior art.
实施例1：Example 1:
一种周期栅结构的p-GaN常闭型功率器件，如图1所示，自下而上包括衬底101、成核层102、缓冲层103、沟道层104、插入层105以及势垒层106；A p-GaN normally-off power device with a periodic gate structure, as shown in FIG. Layer 106;
势垒层106上方设置有源极和漏极，源极和漏极之间设置有形成于势垒层上的周期性p-GaN/InGaN层107，栅极设置于周期性p-GaN/InGaN层上。A source and a drain are arranged above the barrier layer 106, a periodic p-GaN/InGaN layer 107 formed on the barrier layer is arranged between the source and the drain, and the gate is arranged on the periodic p-GaN/InGaN layer 107. layer.
本实施例中，所述衬底为硅；所述成核层为AlN；所述缓冲层为AlGaN；所述沟道层为GaN；所述插入层为AlN；所述势垒层为AlGaN；In this embodiment, the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; the barrier layer is AlGaN;
所述周期性p-GaN/InGaN层107自下至上周期分布有多层低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层，且相邻的低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层之间均设置有p-GaN层。 The periodic p-GaN/InGaN layer 107 has multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition distributed periodically from bottom to top, and adjacent A p-GaN layer is arranged between the In b Ga 1-b N layer with low indium composition and the In a Ga 1-a N layer with high indium composition.
本实施例中，所述低铟组分的In bGa 1-bN层，b为0.06，厚度为10nm，层数为2； In this embodiment, the In b Ga 1-b N layer with low indium composition, b is 0.06, the thickness is 10nm, and the number of layers is 2;
本实施例中，所述高铟组分的In aGa 1-aN层，a为0.6，厚度为4nm，层数为2； In this embodiment, the In a Ga 1-a N layer with high indium composition, a is 0.6, the thickness is 4nm, and the number of layers is 2;
本实施例中，所有p-GaN层的总厚度为72 nm，p-GaN层的层数为4，且p-GaN层的p-GaN中均掺Mg，空穴浓度均为2E18 cm -3。 In this embodiment, the total thickness of all p-GaN layers is 72 nm, the number of p-GaN layers is 4, and the p-GaN of the p-GaN layer is all doped with Mg, and the hole concentration is 2E18 cm -3 .
实施例2：Example 2:
一种周期栅结构的p-GaN常闭型功率器件，如图1所示，自下而上包括衬底101、成核层102、缓冲层103、沟道层104、插入层105以及势垒层106；A p-GaN normally-off power device with a periodic gate structure, as shown in FIG. Layer 106;
势垒层106上方设置有源极和漏极，源极和漏极之间设置有形成于势垒层上的周期性p-GaN/InGaN层107，栅极设置于周期性p-GaN/InGaN层上。A source and a drain are arranged above the barrier layer 106, a periodic p-GaN/InGaN layer 107 formed on the barrier layer is arranged between the source and the drain, and the gate is arranged on the periodic p-GaN/InGaN layer 107. layer.
本实施例中，所述衬底为硅；所述成核层为AlN；所述缓冲层为AlGaN；所述沟道层为GaN；所述插入层为AlN；所述势垒层为AlGaN；In this embodiment, the substrate is silicon; the nucleation layer is AlN; the buffer layer is AlGaN; the channel layer is GaN; the insertion layer is AlN; the barrier layer is AlGaN;
所述周期性p-GaN/InGaN层107自下至上周期分布有多层低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层，且相邻的低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层之间均设置有p-GaN层； The periodic p-GaN/InGaN layer 107 has multiple layers of In b Ga 1-b N layers with low indium composition and In a Ga 1-a N layers with high indium composition distributed periodically from bottom to top, and adjacent A p-GaN layer is arranged between the In b Ga 1-b N layer of low indium composition and the In a Ga 1-a N layer of high indium composition;
本实施例中，所述低铟组分的In bGa 1-bN层，b为0.06，厚度为5nm，层数为4； In this embodiment, the In b Ga 1-b N layer with low indium composition, b is 0.06, the thickness is 5nm, and the number of layers is 4;
本实施例中，所述高铟组分的In aGa 1-aN层，a为0.6，厚度为2nm，层数为4； In this embodiment, the In a Ga 1-a N layer with high indium composition, a is 0.6, the thickness is 2nm, and the number of layers is 4;
本实施例中，所有p-GaN层的总厚度为72 nm，p-GaN层的层数为8，且p-GaN层的p-GaN中均掺Mg，空穴浓度均为2E18 cm -3； In this embodiment, the total thickness of all p-GaN layers is 72 nm, the number of p-GaN layers is 8, and the p-GaN of the p-GaN layer is all doped with Mg, and the hole concentration is 2E18 cm -3 ;
图2为对照组、实施例1和实施例2对应的仿真转移曲线，其中对照组中没有InGaN层，所有p-GaN层的总厚度与实施例1和实施例2中所有p-GaN层的总厚度保持一致，且p-GaN中掺Mg的浓度也一致；实施例1和实施例2中InGaN的组分也对应一致，只是厚度与周期不同；从图2可以看出与对照组相比，实施例1和实施例2的阈值电压均得到了正向偏移，且相对于实施例1，实施例2的阈值电压更大。这表明变铟组分的p-GaN/InGaN层107之间的阶梯型极化电场有效提高Mg的离化效率，从而提升了阈值电压。且随着周期数的增大，极化电场的相互作用更强，阈值电压得到进一步提高。Fig. 2 is the simulated transfer curve corresponding to control group, embodiment 1 and embodiment 2, wherein in the control group, there is no InGaN layer, the total thickness of all p-GaN layers is the same as that of all p-GaN layers in embodiment 1 and embodiment 2 The total thickness remains the same, and the concentration of doped Mg in p-GaN is also the same; the composition of InGaN in Example 1 and Example 2 is also the same, but the thickness and period are different; it can be seen from Figure 2 that compared with the control group , the threshold voltages of Example 1 and Example 2 are positively shifted, and compared with Example 1, the threshold voltage of Example 2 is larger. This indicates that the step-type polarization electric field between the p-GaN/InGaN layers 107 with variable indium composition can effectively improve the ionization efficiency of Mg, thereby increasing the threshold voltage. And with the increase of the number of cycles, the interaction of the polarization electric field is stronger, and the threshold voltage is further increased.
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。因此，本领域技术人员在未脱离本发明精神实质下所作的改变、替换、修饰等均应属于本发明的保护范围。The various technical features of the above-mentioned embodiments can be combined arbitrarily. For the sake of concise description, all possible combinations of the various technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, all It should be regarded as the scope described in this specification. Therefore, changes, substitutions, modifications, etc. made by those skilled in the art without departing from the spirit of the present invention shall fall within the protection scope of the present invention.

Claims (10)

  1. 一种周期栅结构的p-GaN常闭型功率器件，其特征在于，自下而上包括衬底（101）、成核层（102）、缓冲层（103）、沟道层（104）、插入层（105）以及势垒层（106）；A p-GaN normally-off power device with a periodic gate structure, characterized in that it comprises a substrate (101), a nucleation layer (102), a buffer layer (103), a channel layer (104), an insertion layer (105) and a barrier layer (106);
    势垒层（106）上方设置有源极和漏极，源极和漏极之间设置有形成于势垒层上的周期性p-GaN/InGaN层（107），栅极设置于周期性p-GaN/InGaN层上。A source and a drain are arranged above the barrier layer (106), a periodic p-GaN/InGaN layer (107) formed on the barrier layer is arranged between the source and the drain, and the gate is arranged at the periodic p - on the GaN/InGaN layer.
  2. 根据权利要求1所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述周期性p-GaN/InGaN层（107）自下至上周期分布有多层低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层，且相邻的低铟组分的In bGa 1-bN层和高铟组分的In aGa 1-aN层之间均设置有p-GaN层。 The p-GaN normally-off power device with a periodic gate structure according to claim 1, characterized in that the periodic p-GaN/InGaN layer (107) is periodically distributed with multiple layers of low indium groups from bottom to top In b Ga 1-b N layer and high indium composition In a Ga 1-a N layer, and the adjacent low indium composition In b Ga 1-b N layer and high indium composition In a A p-GaN layer is arranged between the Ga 1-a N layers.
  3. 根据权利要求2所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，p-GaN层的p-GaN中掺Mg，空穴浓度为2E17-2E18 cm -3。 The p-GaN normally-off power device with a periodic gate structure according to claim 2, wherein the p-GaN of the p-GaN layer is doped with Mg, and the hole concentration is 2E17-2E18 cm -3 .
  4. 根据权利要求2所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述周期性p-GaN/InGaN层（107）的总厚度为80-120nm，其中，所有p-GaN层的总厚度为60-90nm，每层低铟组分的In bGa 1-bN层的厚度为5-10nm，每层高铟组分的In aGa 1-aN层的厚度为0.5-5nm。 A p-GaN normally-off power device with a periodic gate structure according to claim 2, characterized in that the total thickness of the periodic p-GaN/InGaN layer (107) is 80-120 nm, wherein all The total thickness of the p-GaN layer is 60-90nm, the thickness of each layer of In b Ga 1-b N layer with low indium composition is 5-10nm, and the thickness of each layer of In a Ga 1-a N layer with high indium composition The thickness is 0.5-5nm.
  5. 根据权利要求2所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述高铟组分的In aGa 1-aN层中，0.3<a<0.7，高铟组分的In aGa 1-aN层的层数不小于2。 A p-GaN normally-off power device with a periodic gate structure according to claim 2, characterized in that, in the In a Ga 1-a N layer with high indium composition, 0.3<a<0.7, high The number of In a Ga 1-a N layers of the indium composition is not less than 2.
  6. 根据权利要求2所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述低铟组分的In bGa 1-bN层中，0.05<b<0.3，低铟组分的In bGa 1-bN层的层数不小于2。 A p-GaN normally-off power device with a periodic gate structure according to claim 2, characterized in that, in the In b Ga 1-b N layer with low indium composition, 0.05<b<0.3, low The number of In b Ga 1-b N layers of the indium composition is not less than 2.
  7. 根据权利要求2所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，高铟组分的In aGa 1-aN层与低铟组分的In bGa 1-bN层的层数相同。 A p-GaN normally-off power device with a periodic gate structure according to claim 2, characterized in that the In a Ga 1-a N layer with a high indium composition and the In b Ga 1 -a N layer with a low indium composition b N layers have the same number of layers.
  8. 根据权利要求1所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述衬底（101）为硅；所述成核层（102）为AlN。The p-GaN normally-off power device with a periodic gate structure according to claim 1, characterized in that, the substrate (101) is silicon; and the nucleation layer (102) is AlN.
  9. 根据权利要求1所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述缓冲层（103）为AlGaN；所述沟道层（104）为GaN。The p-GaN normally-off power device with a periodic gate structure according to claim 1, characterized in that, the buffer layer (103) is AlGaN; and the channel layer (104) is GaN.
  10. 根据权利要求1~9任一项所述的一种周期栅结构的p-GaN常闭型功率器件，其特征在于，所述插入层（105）为AlN；所述势垒层（106）为AlGaN。A p-GaN normally-off power device with a periodic gate structure according to any one of claims 1 to 9, characterized in that, the insertion layer (105) is AlN; the barrier layer (106) is AlGaN.
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