WO2023070526A1 - 发光二极管结构及发光装置 - Google Patents

发光二极管结构及发光装置 Download PDF

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Publication number
WO2023070526A1
WO2023070526A1 PCT/CN2021/127442 CN2021127442W WO2023070526A1 WO 2023070526 A1 WO2023070526 A1 WO 2023070526A1 CN 2021127442 W CN2021127442 W CN 2021127442W WO 2023070526 A1 WO2023070526 A1 WO 2023070526A1
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Prior art keywords
electrode
pad
semiconductor layer
emitting diode
light emitting
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PCT/CN2021/127442
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English (en)
French (fr)
Inventor
杨人龙
左锋
张丽明
林维鹏
张中英
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厦门三安光电有限公司
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Application filed by 厦门三安光电有限公司 filed Critical 厦门三安光电有限公司
Priority to CN202180005926.8A priority Critical patent/CN114631197A/zh
Priority to PCT/CN2021/127442 priority patent/WO2023070526A1/zh
Publication of WO2023070526A1 publication Critical patent/WO2023070526A1/zh
Priority to US18/644,133 priority patent/US20240274774A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Definitions

  • the invention relates to the technical field of semiconductors, in particular to a high-reliability light-emitting diode structure and a light-emitting device.
  • Light Emitting Diode (English: Light Emitting Diode, referred to as: LED) is a semiconductor device that uses energy released by carrier recombination to form light. LED chips have many advantages such as low power consumption, pure chromaticity, long life, small size, fast response time, energy saving and environmental protection, etc. It is widely used in lighting, visible light communication and light-emitting display and other scenarios. LED chips are divided into three types: positive structure, flip structure and vertical structure. Compared with the traditional front-mounted chip, the flip-chip LED chip structure is to invert the diode structure, emit light from the sapphire side, and the electrode side can be fixed on the substrate with better heat dissipation.
  • this solution has the following problems: 1. It is difficult to install the Zener diode during the packaging process; 2. The cost of this packaging process is relatively high; 3. Before the packaging is completed, the LED chip is likely to be damaged by static electricity. 4. Because the zener diode is placed in the package close to the LED chip, the luminous efficiency of the LED package will be reduced due to the light absorbed by the zener diode, thereby reducing the yield of the LED package.
  • LED chips in UV (UltraViolet) products are limited by their epitaxy capabilities, and the negative ESD resistance is far weaker than the positive ESD resistance. A suitable solution has not yet been found.
  • the invention provides a light emitting diode structure, which includes a light emitting diode, a protection diode, an insulating layer, a first bonding pad, a second bonding pad and a conductive structure.
  • the light emitting diode includes a first epitaxial structure, a first electrode and a second electrode.
  • the first epitaxial structure includes a first semiconductor layer, a first light emitting layer and a second semiconductor layer stacked in sequence.
  • the first electrode is located on the first epitaxial structure and is electrically connected to the first semiconductor layer;
  • the second electrode is located on the first epitaxial structure and is electrically connected to the second semiconductor layer.
  • the protection diode is connected to the light emitting diode in an antiparallel manner, and includes a second epitaxial structure and a fourth electrode.
  • the second epitaxial structure includes a third semiconductor layer, a second light emitting layer and a fourth semiconductor layer stacked in sequence. The first epitaxial structure and the second epitaxial structure are isolated from each other.
  • the fourth electrode is located on the second epitaxial structure and electrically connected to the fourth semiconductor layer.
  • the insulating layer covers the first epitaxial structure and the second epitaxial structure, and has a first opening, a second opening, a third opening and a fourth opening.
  • the first welding pad is located on the insulating layer, and is electrically connected to the first electrode and the fourth electrode through the first opening and the fourth opening respectively.
  • the second welding pad is located on the insulating layer and is electrically connected to the second electrode through the second opening.
  • the conductive structure is connected to the second pad and electrically connected to the third semiconductor layer through the third opening. Wherein, the material of the conductive structure is different from that of the first electrode.
  • the present invention also provides a light emitting diode structure, which includes a light emitting diode, a protection diode, an insulating layer, a first bonding pad, a second bonding pad and a conductive structure.
  • the light emitting diode includes a first epitaxial structure, a first electrode and a second electrode.
  • the first epitaxial structure includes a first semiconductor layer, a first light emitting layer and a second semiconductor layer stacked in sequence.
  • the first electrode is located on the first epitaxial structure and is electrically connected to the first semiconductor layer;
  • the second electrode is located on the first epitaxial structure and is electrically connected to the second semiconductor layer.
  • the protection diode is connected to the light emitting diode in an antiparallel manner, and includes a second epitaxial structure and a fourth electrode.
  • the second epitaxial structure includes a third semiconductor layer, a second light emitting layer and a fourth semiconductor layer stacked in sequence. The first epitaxial structure and the second epitaxial structure are isolated from each other.
  • the fourth electrode is located on the second epitaxial structure and electrically connected to the fourth semiconductor layer.
  • the insulating layer covers the first epitaxial structure and the second epitaxial structure, and has a first opening, a second opening, a third opening and a fourth opening.
  • the first welding pad is located on the insulating layer, and is electrically connected to the first electrode and the fourth electrode through the first opening and the fourth opening respectively.
  • the second welding pad is located on the insulating layer and is electrically connected to the second electrode through the second opening.
  • the conductive structure is connected to the second pad and electrically connected to the third semiconductor layer through the third opening. Wherein, the contact resistance formed between the conductive structure and the third semiconductor layer is greater than the contact resistance formed between the first electrode and the first semiconductor layer.
  • the present invention also provides a light emitting diode structure, which includes a light emitting diode, a protection diode, an insulating layer, a first bonding pad, a second bonding pad and a conductive structure.
  • the light emitting diode includes a first epitaxial structure, a first electrode and a second electrode.
  • the first epitaxial structure includes a first semiconductor layer, a first light emitting layer and a second semiconductor layer stacked in sequence.
  • the first electrode is located on the first epitaxial structure and is electrically connected to the first semiconductor layer;
  • the second electrode is located on the first epitaxial structure and is electrically connected to the second semiconductor layer.
  • the protection diode is connected to the light emitting diode in an antiparallel manner, and includes a second epitaxial structure and a fourth electrode.
  • the second epitaxial structure includes a third semiconductor layer, a second light emitting layer and a fourth semiconductor layer stacked in sequence. The first epitaxial structure and the second epitaxial structure are isolated from each other.
  • the fourth electrode is located on the second epitaxial structure and electrically connected to the fourth semiconductor layer.
  • the insulating layer covers the first epitaxial structure and the second epitaxial structure, and has a first opening, a second opening, a third opening and a fourth opening.
  • the first welding pad is located on the insulating layer, and is electrically connected to the first electrode and the fourth electrode through the first opening and the fourth opening respectively.
  • the second welding pad is located on the insulating layer and is electrically connected to the second electrode through the second opening.
  • the conductive structure is connected to the second pad and electrically connected to the third semiconductor layer through the third opening. Wherein, the material of the first electrode directly contacting the first semiconductor layer is different from the material of the conductive structure directly contacting the third semiconductor layer.
  • the conductive structure includes a third pad, the third pad is connected to the second pad, and electrically connected to the third semiconductor layer through the third opening, the first
  • the material of the three pads can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, AuSn, and the material of the first electrode can be selected from Cr, Pt, Au, Ni, Ti, Al , one or more of PtAu.
  • the conductive structure includes a second transparent conductive layer and a third pad, the second transparent conductive layer is located on the second epitaxial structure and electrically connected to the third semiconductor layer, the The third pad is connected to the second pad and electrically connected to the second transparent conductive layer through the third opening.
  • the conductive structure includes a third electrode and a third pad
  • the third electrode is located on the second epitaxial structure and is electrically connected to the third semiconductor layer, and the third pad connected to the second pad, and electrically connected to the third electrode through the third opening.
  • the material of the first electrode can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, PtAu
  • the material of the third electrode can be selected from Cr, Pt, Au, Ni, Ti , Al, PtAu in one or more.
  • the conductive structure further includes a second transparent conductive layer, a third electrode, and a third pad
  • the second transparent conductive layer is located on the second epitaxial structure and electrically connected to the third epitaxial structure.
  • a semiconductor layer, the third electrode is located between the second transparent conductive layer and the third pad, the third pad is connected to the second pad, and is electrically connected through the third opening the third electrode.
  • the third electrode when viewed from above the light-emitting diode structure toward the first epitaxial structure, the third electrode is in a ring shape, the fourth electrode is in a block shape, and the fourth electrode is located on the ring-shaped The inside of the third electrode; or, the fourth electrode is in a ring shape, the third electrode is in a block shape, and the third electrode is located inside the ring-shaped fourth electrode.
  • the third electrode when viewed from above the light emitting diode structure toward the first epitaxial structure, the third electrode is in the shape of an open ring, the fourth electrode is in the shape of a block, and the third electrode surrounds the the fourth electrode; or, the third electrode is in a block shape, the fourth electrode is in an open ring shape, and the fourth electrode encloses the third electrode.
  • the second transparent conductive layer when viewed from above the light emitting diode structure toward the first epitaxial structure, is in the shape of a ring, the fourth electrode is in the shape of a block, and the fourth electrode is located in the ring shape.
  • the fourth electrode is in the shape of a ring, the second transparent conductive layer is in a block shape, and the second transparent conductive layer is located in the fourth electrode of the ring shape or, the second transparent conductive layer is in the shape of an open ring, the fourth electrode is in a block shape, and the second transparent conductive layer sandwiches the fourth electrode; or, the second transparent conductive layer It is in block shape, the fourth electrode is in the shape of an open ring, and the fourth electrode sandwiches the second transparent conductive layer.
  • the horizontal projected area of the fourth electrode when viewed from above the light emitting diode structure toward the first epitaxial structure, is larger than the horizontal projected area of the third electrode.
  • the light emitting diode further includes a first transparent conductive layer, the first transparent conductive layer is located between the second electrode and the second semiconductor layer; the protection diode further includes a third transparent conductive layer A conductive layer, the third transparent conductive layer is located between the fourth electrode and the fourth semiconductor layer.
  • the first electrode includes a connection electrode and an ohmic contact electrode, the ohmic contact electrode is connected to the first epitaxial structure, the connection electrode is connected to the ohmic contact electrode, and the first pad passes through The first opening is connected to the connection electrode.
  • the material of the connecting electrode can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, and the material of the ohmic contact electrode can be selected from one or more of Ti, Al, Au, Pt Various.
  • the thickness of the second transparent conductive layer is between 5-500 nm.
  • the second epitaxial structure when viewed from above the light emitting diode structure toward the first epitaxial structure, the second epitaxial structure is located outside the first epitaxial structure, and the length of the second epitaxial structure is greater than or equal to the 50% of the width of the first epitaxial structure, and less than or equal to 110% of the width of the first epitaxial structure.
  • both the light emitting diode and the protection diode are in a square shape.
  • the wavelength range of the light emitting diode structure is between 220nm and 420nm.
  • the conductive structure includes a third pad, the third pad is connected to the second pad, and electrically connected to the third semiconductor layer through the third opening, the first The contact resistance formed between the three pads and the third semiconductor layer is greater than the contact resistance formed between the first electrode and the first semiconductor layer.
  • the conductive structure includes a second transparent conductive layer and a third pad
  • the second transparent conductive layer is located on the second epitaxial structure and electrically connected to the third semiconductor layer
  • the The third pad is connected to the second pad, and is electrically connected to the second transparent conductive layer through the third opening, and the contact resistance formed between the second transparent conductive layer and the third semiconductor layer greater than the contact resistance formed between the first electrode and the first semiconductor layer.
  • the conductive structure includes a third electrode and a third pad
  • the third electrode is located on the second epitaxial structure and is electrically connected to the third semiconductor layer
  • the third pad connected to the second pad, and electrically connected to the third electrode through the third opening
  • the contact resistance formed between the third electrode and the third semiconductor layer is greater than that between the first electrode and the contact resistance formed between the first semiconductor layers.
  • the conductive structure includes a second transparent conductive layer, a third electrode and a third pad
  • the second transparent conductive layer is located on the second epitaxial structure and electrically connected to the third semiconductor layer
  • the third electrode is connected to the second transparent conductive layer
  • the third pad is connected to the second pad, and is electrically connected to the third electrode through the third opening
  • the first The contact resistance formed between the two transparent conductive layers and the third semiconductor layer is greater than the contact resistance formed between the first electrode and the first semiconductor layer.
  • the conductive structure includes a third pad connected to the second pad and directly connected to the third semiconductor layer through the third opening, the first The material of the three pads is different from that of the first electrode.
  • the conductive structure includes a second transparent conductive layer and a third pad, the second transparent conductive layer is located on the second epitaxial structure and electrically connected to the third semiconductor layer, and the third pad is connected to The second pad is electrically connected to the second transparent conductive layer through the third opening, and the material of the second transparent conductive layer is different from that of the first electrode.
  • the conductive structure includes a third electrode and a third pad, the third electrode is directly connected to the third semiconductor layer, the third pad is connected to the second pad, The third electrode is electrically connected through the third opening, and the material of the third electrode is different from that of the first electrode.
  • the conductive structure includes a second transparent conductive layer, a third electrode and a third pad, the second transparent conductive layer is directly connected to the third semiconductor layer, and the third electrode is connected to The second transparent conductive layer, the third pad is connected to the second pad, and electrically connected to the third electrode through the third opening, the material of the second transparent conductive layer is different from the the material of the first electrode.
  • the present invention also provides a light emitting device, which adopts any light emitting diode structure described above.
  • An advantage of the present invention is to provide a light-emitting diode chip and its light-emitting device.
  • the contact resistance formed between the conductive structure and the third semiconductor layer is relatively large, which greatly improves the performance of the light-emitting diode chip.
  • the anti-ESD ability of the LED chip, especially the negative anti-ESD ability of the light-emitting diode chip directly improves the anti-ESD ability of the chip bare crystal, avoids the failure of the light-emitting diode chip due to static electricity before the package is completed, and saves the cost of packaging the Zener diode. cost.
  • FIG. 1 is a schematic top view of the light emitting diode structure provided by the first embodiment of the present invention
  • Fig. 2 is a schematic longitudinal sectional view taken along the section line A-A of Fig. 1;
  • Fig. 3 is a schematic longitudinal sectional view taken along the section line B-B of Fig. 1;
  • FIG. 4 is a schematic top view of the light emitting diode structure provided by the second embodiment of the present invention.
  • Fig. 5 is a longitudinal sectional schematic view taken along the section line A-A of Fig. 4;
  • Fig. 6 is a schematic longitudinal sectional view taken along the section line B-B of Fig. 4;
  • Fig. 7 is a schematic top view of the light emitting diode structure provided by the third embodiment of the present invention.
  • Fig. 8 is a schematic longitudinal sectional view taken along the section line A-A of Fig. 7;
  • Fig. 9 is a schematic longitudinal sectional view taken along the section line B-B of Fig. 7;
  • Fig. 10 is a schematic top view of the light emitting diode structure provided by the fourth embodiment of the present invention.
  • Figure 11 is a schematic diagram of the size of Figure 10;
  • Fig. 12 is a schematic longitudinal sectional view taken along the section line A-A of Fig. 10;
  • Fig. 13 is a schematic longitudinal sectional view taken along the section line B-B of Fig. 10;
  • FIG. 14 to 17 are schematic top view structural diagrams of various stages in the manufacturing process of the light emitting diode structure shown in FIG. 10;
  • Fig. 18 is a schematic top view of the light emitting diode structure provided by the fifth embodiment of the present invention.
  • Fig. 19 is a schematic top view of the light emitting diode structure provided by the sixth embodiment of the present invention.
  • Fig. 20 is a schematic top view of the light emitting diode structure provided by the seventh embodiment of the present invention.
  • FIG. 21 is a schematic top view of the light emitting diode structure provided by the eighth embodiment of the present invention.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as “first” and “second” may explicitly or implicitly include one or more of these features.
  • plural means two or more.
  • comprising and any variations thereof mean “comprising at least”.
  • FIG. 1 is a schematic top view of a light emitting diode structure 1 provided in the first embodiment of the present invention.
  • FIG. 2 is a schematic longitudinal sectional view taken along line A-A in FIG. 1
  • FIG. 3 is a schematic view taken along the line A-A in FIG. Schematic diagram of longitudinal section taken from B-B.
  • the first embodiment of the present invention provides a light emitting diode structure 1 .
  • the light emitting diode structure 1 includes a light emitting diode 10 , a protection diode 20 , an insulating layer 14 , a first bonding pad 41 , a second bonding pad 42 and a conductive structure 40 .
  • the light emitting diode 10 and the protection diode 20 are arranged on the substrate 9 .
  • the substrate 9 can be a transparent substrate or a non-transparent substrate or a translucent substrate, wherein the transparent substrate or the translucent substrate can allow the light radiated from the light-emitting layer to pass through the substrate 9 and reach the far-away epitaxy of the substrate 9.
  • the substrate 9 may be any one of a sapphire flat substrate, a sapphire patterned substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a glass substrate.
  • a combined patterned substrate 9 can be used.
  • the pattern of the substrate 9 is a series of raised structures.
  • the raised structures can be one-layer or multi-layer structures, including at least one layer of refractive index
  • the light extraction layer having a refractive index lower than that of the substrate 9 , and the thickness of the light extraction layer is greater than half of the height of the raised structure is more conducive to the light extraction efficiency of the light emitting diode 10 .
  • the protrusion structure is in the shape of a cannonball, and the material of the light extraction layer may have a refractive index preferably less than 1.6, for example, SiO 2 may be selected.
  • the substrate 9 may be thinned or removed to form a thin-film chip.
  • the light emitting diode 10 includes a first epitaxial structure 12 , a first electrode 51 and a second electrode 52 .
  • the first epitaxial structure 12 includes a first semiconductor layer 121 , a first light emitting layer 122 and a second semiconductor layer 123 stacked sequentially from bottom to top.
  • the first electrode 51 is located on the first epitaxial structure 12 and electrically connected to the first semiconductor layer 121 .
  • the second electrode 52 is located on the first epitaxial structure 12 and electrically connected to the second semiconductor layer 123 .
  • the first electrode 51 is generally made by vapor-depositing metal first, and then performing high-temperature fusion of metal materials, for example, using Ti/Al metal materials, first vapor-depositing Ti/Al metal materials on the first semiconductor layer 121, and then using It is made by high temperature fusion, so the resistance of the first electrode 51 is often small, which means that the contact resistance formed between the first electrode 51 and the first semiconductor 121 is small, and the material of the first electrode 51 can be selected from Cr, Pt , Au, Ni, Ti, Al, PtAu in one or more.
  • the protection diode 20 is connected to the light-emitting diode 10 in an anti-parallel manner, so that the protection diode 20 can provide an electrical protection effect in the light-emitting diode structure 1, and protect the light-emitting diode 10 from being damaged, thereby providing a strong static electricity. Discharge (ESD) resistant LED 10 chip.
  • the protection diode 20 includes a second epitaxial structure 22 and a fourth electrode 54 .
  • the second epitaxial structure 22 includes a third semiconductor layer 221 , a second light emitting layer 222 and a fourth semiconductor layer 223 stacked sequentially from bottom to top.
  • the first epitaxial structure 12 and the second epitaxial structure 22 are isolated from each other.
  • the fourth electrode 54 is located on the second epitaxial structure 22 and electrically connected to the fourth semiconductor layer 223 .
  • the antiparallel connection refers to connecting the anode of the light emitting diode 10 to the cathode of the protection diode 20 , and the cathode of the light emitting diode 10 to the anode of the protection diode 20 .
  • the light emitting diode 10 and the protection diode 20 are stacked regions electrically isolated from each other, and may be composed of nitride semiconductor layers. With this structure, the light emitting diode 10 can be configured to have the same height as the protection diode 20 on the same substrate.
  • the light emitting diode 10 and the protection diode 20 may be formed by patterning a nitride semiconductor layer grown by the same growth procedure (eg, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), etc.) so as to be separated from each other.
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the procedures for forming the first semiconductor layer 121 , the first light emitting layer 122 and the second semiconductor layer 123 may be the same as the procedures for forming the third semiconductor layer 221 , the second light emitting layer 222 and the fourth semiconductor layer 223 . Therefore, the composition and impurity density of the first semiconductor layer 121, the first light-emitting layer 122, and the second semiconductor layer 123 may be the same as those of the third semiconductor layer 221, the second light-emitting layer 222, and the fourth semiconductor layer 223, respectively. .
  • the first semiconductor layer 121 and the third semiconductor layer 221 are formed on the substrate 9.
  • the two semiconductor layers, as layers grown on the substrate 9, may be gallium nitride-based semiconductors doped with n-type impurities, such as Si. layer.
  • a further buffer layer is disposed between the first semiconductor layer 121 and the substrate 9 .
  • the first epitaxial structure 12 and the second epitaxial structure 22 may also be connected to the substrate 9 through an adhesive layer.
  • the first light emitting layer 122 and the second light emitting layer 222 may be quantum well structures (Quantum Well, QW for short).
  • the first light-emitting layer 122 and the second light-emitting layer 222 can also be a multiple quantum well structure (Multiple Quantum Well (MQW for short), wherein the multiple quantum well structure includes multiple quantum well layers (Well) and multiple quantum barrier layers (Barrier) arranged alternately in a repeated manner.
  • MQW Multiple Quantum Well
  • the composition and thickness of the well layers in the first light emitting layer 122 and the second light emitting layer 222 determine the wavelength of the generated light.
  • by adjusting the composition of the well layer it is possible to provide a light-emitting layer that generates light of different colors such as ultraviolet light, blue light, and green light.
  • the second semiconductor layer 123 and the fourth semiconductor layer 223 may be GaN-based semiconductor layers doped with p-type impurities, such as Mg.
  • the first semiconductor layer 121, the second semiconductor layer 123, the third semiconductor layer 221, and the fourth semiconductor layer 223 can be a single-layer structure respectively, the present case is not limited thereto, they can also be multiple layers, and can also include a superlattice layer.
  • the second semiconductor layer 123 and the fourth semiconductor layer 223 may be doped with n-type impurities.
  • the insulating layer 14 covers the first epitaxial structure 12 and the second epitaxial structure 22 and has a first opening 141 , a second opening 142 , a third opening 143 and a fourth opening 144 .
  • the first opening 141 , the second opening 142 , the third opening 143 and the fourth opening 144 are respectively located above the first semiconductor layer 121 , the second semiconductor layer 123 , the third semiconductor layer 221 and the fourth semiconductor layer 223 .
  • the material of the insulating layer 14 includes a non-conductive material.
  • the non-conductive material is preferably an inorganic material or a dielectric material. Inorganic materials include silica gel (Silicone) or glass (Glass).
  • Dielectric materials including aluminum oxide (AlO), silicon nitride (SiNx), silicon oxide (SiOx), titanium oxide (TiOx), or magnesium fluoride (MgFx) may be electrically insulating materials.
  • the insulating layer 14 may be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate or a combination thereof, and the combination may be, for example, a Bragg reflector (DBR) formed by stacking two materials repeatedly.
  • DBR Bragg reflector
  • Both the first pad 41 and the second pad 42 are located on the insulating layer 14, the first pad 41 is electrically connected to the first electrode 51 and the fourth electrode 54 respectively through the first opening 141 and the fourth opening 144, and the second pad 41 is electrically connected to the first electrode 51 and the fourth electrode 54 through the first opening 141 and the fourth opening 144.
  • the disk 42 is electrically connected to the second electrode 52 through the second opening 142 .
  • the first pad 41 and the second pad 42 may be formed together using the same material in the same process, and thus may have the same layer configuration.
  • the conductive structure 40 is connected to the second pad 42 and electrically connected to the third semiconductor layer 221 through the third opening 143 .
  • the material of the conductive structure 40 is different from that of the first electrode 51, so that the contact resistance formed between the conductive structure 40 and the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121,
  • the anti-ESD capability of the light-emitting diode structure 1 is improved, especially the negative anti-ESD capability.
  • Three implementations of the conductive structure 40 will be listed below to facilitate understanding of the characteristics and structure of the conductive structure 40 . It should be noted that the three implementations of the conductive structure 40 are only for understanding rather than limiting the present invention.
  • the conductive structure 40 may be a third pad 43 .
  • the third pad 43 is connected to the second pad 42 and electrically connected to the third semiconductor layer 221 through the third opening 143 .
  • the material of the third pad 43 is different from the material of the first electrode 51, so that the contact resistance formed between the third pad 43 and the third semiconductor layer 221 is greater than the contact formed between the first electrode 51 and the first semiconductor layer 121
  • the resistor protects the light emitting diode 10 and improves the ESD resistance of the light emitting diode structure 1 , especially the negative ESD resistance.
  • the third pad 43 may only be made of a material that directly contacts the third semiconductor layer 221 different from the material that the first electrode 51 directly contacts the first semiconductor layer 121, so that the third pad 43 is in contact with the first semiconductor layer 121.
  • the contact resistance formed between the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121 .
  • the material of the first electrode 51 can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, PtAu, and the material of the third pad 43 can be selected from Cr, Pt, Au, Ni, Ti, One or more of Al and AuSn.
  • the conductive structure 45 may include a third electrode 53 and a third pad 43 .
  • the third electrode 53 is located on the second epitaxial structure 22 and electrically connected to the third semiconductor layer 221 ; the third pad 43 is connected to the second pad 42 and electrically connected to the third electrode 53 through the third opening 143 .
  • the material of the third electrode 53 is different from the material of the first electrode 51, so that the contact resistance formed between the third electrode 53 and the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121, Furthermore, the light-emitting diode 10 is protected, and the anti-ESD ability of the light-emitting diode structure 2 is improved, especially the negative anti-ESD ability.
  • the third electrode 53 may be made of a material directly in contact with the third semiconductor layer 221 different from the material in which the first electrode 51 is in direct contact with the first semiconductor layer 121, so that the third electrode 53 and the third The contact resistance formed between the semiconductor layers 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121 .
  • the material of the first electrode 51 can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, PtAu;
  • the material of the third electrode 53 can be selected from Cr, Pt, Au, Ni, Ti, Al , one or more of PtAu.
  • the conductive structure 48 may include the second transparent conductive layer 33 and the third pad 43 .
  • the second transparent conductive layer 33 is located on the second epitaxial structure 22 and is electrically connected to the third semiconductor layer 221; the third pad 43 is connected to the second pad 42, and is electrically connected to the second transparent conductive layer 33 through the third opening 143 .
  • the material of the second transparent conductive layer 33 is different from the material of the first electrode 51, so that the contact resistance formed between the second transparent conductive layer 33 and the third semiconductor layer 221 is greater than that formed between the first electrode 51 and the first semiconductor layer 121.
  • the second transparent conductive layer 33 may be made of a material that only directly contacts the third semiconductor layer 221 different from the material that the first electrode 51 directly contacts the first semiconductor layer 121, so that the second transparent conductive layer The contact resistance formed between the electrode 33 and the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121 .
  • the material of the first electrode 51 can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, PtAu;
  • the second transparent conductive layer 33 can be made of a transparent conductive material, such as indium tin oxide , zinc indium oxide, etc.
  • the conductive structure 46 may include the second transparent conductive layer 33 , the third electrode 53 and the third pad 43 .
  • the second transparent conductive layer 33 is located on the second epitaxial structure 22 and electrically connected to the third semiconductor layer 221 , and the second transparent conductive layer 33 is located between the third electrode 53 and the third semiconductor layer 221 .
  • the width of the second transparent conductive layer 33 is greater than the width of the third electrode 53 .
  • the third electrode 53 is connected to the second transparent conductive layer 33 and does not contact the third semiconductor layer 221 .
  • the third pad 43 is connected to the second pad 42 and electrically connected to the third electrode 53 through the third opening 143 .
  • the material of the second transparent conductive layer 33 is different from that of the first electrode 51, so that the contact resistance formed between the second transparent conductive layer 33 and the third semiconductor layer 221 is greater than that between the first electrode 51 and the first semiconductor layer.
  • the contact resistance formed between 121 further protects the light emitting diode 10 and improves the ESD resistance of the light emitting diode structure 3 , especially the negative ESD resistance.
  • the second transparent conductive layer 33 may be made of a material that only directly contacts the third semiconductor layer 221 different from the material that the first electrode 51 directly contacts the first semiconductor layer 121, so that the second transparent conductive layer
  • the contact resistance formed between the electrode 33 and the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121 .
  • the present invention makes the contact resistance formed between the conductive structures 40, 45, 46 and the third semiconductor layer 221 greater than
  • the contact resistance formed between the first electrode 51 and the first semiconductor layer 121 when a phenomenon such as electrostatic discharge occurs, and a large energy passes through, the contact resistance formed between the conductive structures 40, 45, 46 and the third semiconductor layer 221 is relatively small.
  • the large contact resistance will play a stronger isolation and buffering role, protect the light emitting diode 10, and improve the anti-ESD ability of the light emitting diode structure 2, especially the negative anti-ESD ability.
  • the material of the first electrode 51 directly in contact with the first semiconductor layer 121 is different from the material of the conductive structures 40, 45, 46 in direct contact with the third semiconductor layer 221, so that the conductive structures 40, 45
  • the contact resistance formed between , 46 and the third semiconductor layer 221 is greater than the contact resistance formed between the first electrode 51 and the first semiconductor layer 121, thereby protecting the light emitting diode 10 and improving the ESD resistance of the light emitting diode structure 2, especially Negative ESD resistance.
  • the difference in materials not only refers to the different materials forming the conductive structures 40, 45, 46 and the first electrode 51, but also includes the case where the materials forming the conductive structures 40, 45, 46 and the first electrode 51 are the same. Possibility of varying ingredient levels.
  • the first electrode 51 located on the first semiconductor layer 121 is made of Ti/Al metal material, and the Ti/Al metal material is vapor-deposited on the first semiconductor layer 121 first, and then made by high-temperature fusion;
  • the conductive structures 40, 45, and 46 on the third semiconductor layer 221 are also made of Ti/Al metal, but they are not made by high-temperature fusion (but only by vapor-deposited metal).
  • This implementation should also belong to
  • the material of the conductive structures 40 , 45 , 46 described in the present invention is within a different range from the material of the first electrode 51 .
  • the second epitaxial structure 22 when viewed from above the light emitting diode structure 3 toward the first epitaxial structure 12 , the second epitaxial structure 22 is located outside the first epitaxial structure 12 , and the second epitaxial structure 22
  • the length L2 is greater than or equal to 50% of the width L1 of the first epitaxial structure 12 and less than or equal to 110% of the width L1 of the first epitaxial structure 12 .
  • the present case is not limited thereto.
  • the light emitting diode structure 3 can also ensure better electrical protection effect provided by the protection diode 20 in the light emitting diode structure 3 through the following methods.
  • the first type looking down from above the light emitting diode structure 3 toward the first epitaxial structure 12, the first pad 41 overlaps the first epitaxial structure 12 and the second epitaxial structure 22, and the second pad 42 (due to the second The pad 42 is connected to the third pad 43.
  • the second pad 42 and the third pad 43 are considered as a whole, and the second pad 42 is used as a collective name) and the first epitaxial structure 12 and the first epitaxial structure 12
  • the two epitaxial structures 22 have overlapping portions, so that the protection diode 20 provides a better electrical protection effect in the LED structure 3 .
  • the horizontal projected area of the first pad 41 is greater than or equal to the horizontal projected area of the second pad 42, which enhances the negative anti-ESD capability of the light emitting diode structure 3 and also helps the second pad 42 avoid the first electrode 51
  • the extension part prevents short circuit when the insulating layer 14 is broken, and improves reliability.
  • the second type looking down from above the light emitting diode structure 3 towards the first epitaxial structure 12, the first pad 41 and the second pad 42 are arranged along the first direction X through the first epitaxial structure 12 and the second epitaxial structure 22 (Since the second pad 42 is connected to the third pad 43, the second pad 42 and the third pad 43 are considered as a whole in this paragraph, and the second pad 42 is used as a collective name) along the second
  • the direction Y is arranged, and the first direction X and the second direction Y are different, so that the protection diode 20 provides better electrical protection effect in the light emitting diode structure 3 .
  • the direction from the first epitaxial structure 12 to the second epitaxial structure 22 is the first direction X
  • the direction from the first pad 41 to the second pad 42 is the second direction Y.
  • the first direction X is perpendicular to the second direction Y. It can be understood that the first epitaxial structure 12 and the second epitaxial structure 22 are arranged vertically, and the first bonding pad 41 and the second bonding pad 42 are arranged horizontally.
  • the minimum distance from the first pad 41 to the second pad 42 is greater than the minimum distance from the first epitaxial structure 12 to the second epitaxial structure 22, so as to The adverse effect caused by the close proximity of the first pad 41 to the second pad 42 is avoided.
  • the light-emitting diode structure 3 can also be provided with the first pad 41 and the second pad 42 on the light-emitting diode 10 perpendicular to the protection diode 20 to ensure that the protection diode 20 provides better electrical properties in the light-emitting diode structure 3 protective effect.
  • the light emitting diode 10 and the protection diode 20 may be in a square shape, and both the first epitaxial structure 12 and the second epitaxial structure 22 have four sides.
  • the second epitaxial structure 22 Viewed from above the light-emitting diode structure 3 toward the first epitaxial structure 12, the second epitaxial structure 22 is located outside a side 124 of the first epitaxial structure 12, which is defined as a critical side 125 here, and the second The length of the side 224 of the epitaxial structure 22 adjacent to the critical side 125 is greater than or equal to 50% of the length of the critical side 125 of the first epitaxial structure 12 and less than or equal to 110% of the length of the critical side 125 of the first epitaxial structure 12 .
  • the second epitaxial structure 22 is located on the side where the straight line where the critical edge 125 is located is away from the first epitaxial structure 12, and will not cross or touch the straight line where the critical edge 125 is located, which can simplify the overall manufacturing process.
  • a protection diode 20 with a larger area can also be obtained to improve the anti-ESD capability of the light emitting diode structure 3 .
  • the ratio of is greater than or equal to 10% and less than or equal to 35%.
  • the horizontal projected area of the second epitaxial structure 22 may be greater than or equal to 5% of the horizontal projected area of the light-emitting diode structure 3 and Less than or equal to 50%.
  • the horizontal projected area means that the light-emitting diode structure 3 is placed on the horizontal plane.
  • the direction from the first epitaxial structure 12 to the first bonding pad 41 is a vertical direction perpendicular to the horizontal plane
  • the direction from the second epitaxial structure 22 to the first pad 41 is perpendicular to the horizontal plane.
  • the direction of the pad 41 is also a vertical direction perpendicular to the horizontal plane, and the projected area of each element (such as the first epitaxial structure 12 , the second epitaxial structure 22 , etc.) projected onto the horizontal plane.
  • the first minimum distance D1 when viewed from above the light emitting diode structure 3 toward the first epitaxial structure 12 , that is, as shown in FIG. 10 and FIG. 11 , there is a first minimum distance between the first epitaxial structure 12 and the second epitaxial structure 22 D1, the first minimum distance D1 is less than 30 ⁇ m and greater than 0 ⁇ m, so as to reduce the size of the light emitting diode structure 3 as much as possible while ensuring the high ESD resistance of the light emitting diode structure 3 .
  • the second minimum distance D2 can be between 30 ⁇ m ⁇ 230 ⁇ m, and a reasonable distance can be designed according to the package size of the preset terminals.
  • the light emitting diode 10 further includes a first transparent conductive layer 32 , and the first transparent conductive layer 32 is located between the second electrode 52 and the second semiconductor layer 123 .
  • the first electrode 51 includes a connection electrode 30 and an ohmic contact electrode 31 , the ohmic contact electrode 31 is connected to the first semiconductor layer 121 , and the connection electrode 30 is connected to the ohmic contact electrode 31 .
  • the first pad 41 is connected to the connection electrode 30 through the first opening 141 ; the protection diode 20 further includes a third transparent conductive layer 34 located between the fourth electrode 54 and the fourth semiconductor layer 223 .
  • Each transparent conductive layer (such as the first transparent conductive layer 32, the second transparent conductive layer 33, and the third transparent conductive layer 34) is made of transparent conductive material, which can ensure the lateral current spreading effect and improve the light-emitting diode structure 3. reliability.
  • the transparent conductive material may include indium tin oxide (ITO), indium zinc oxide (indium zinc oxide, IZO), indium oxide (indium oxide, InO), tin oxide (tin oxide, SnO), cadmium tin oxide (CTO), tin antimony oxide (antimony tin oxide, ATO), aluminum zinc oxide (aluminum zinc oxide, AZO), zinc tin oxide (zinc tin oxide, ZTO), zinc oxide doped gallium (gallium doped zinc oxide (GZO), indium oxide doped tungsten (tungsten doped indium oxide, IWO) or zinc oxide (zinc oxide, ZnO), but the embodiments of the present disclosure are not limited thereto.
  • the thickness of the second transparent conductive layer 33 can range from 5-500 nm.
  • the ohmic contact electrode 31 can form a good ohmic contact with the first semiconductor layer 121 , which facilitates the input and output of current.
  • the connecting electrode 30 can protect the ohmic contact electrode 31 and play a role of supporting and padding.
  • the connecting electrode 30 can cover the ohmic contact electrode 31 to further avoid metal precipitation in the ohmic contact electrode 31 , for example, avoid Al precipitation.
  • the material of the connecting electrode 30 can be selected from one or more of Cr, Pt, Au, Ni, Ti, Al, and the material of the ohmic contact electrode 31 can be selected from one or more of Ti, Al, Au, Pt .
  • FIG. 14 to FIG. 17 are schematic top view structural diagrams of various stages in the manufacturing process of the light emitting diode structure 3 shown in FIG. 10 .
  • the light-emitting diode structure 3 shown in FIG. on the contrary, corresponding to the stacking situation of each layer in the top view of other embodiments can also be understood adaptively with reference to FIG. 14 to FIG. 17 .
  • structures such as the ohmic contact electrode 31 , the first transparent conductive layer 32 , the second transparent conductive layer 33 , and the third transparent conductive layer 34 are omitted in FIG. 10
  • the manufacturing stages are also omitted accordingly.
  • the hatched parts in each figure in Fig. 14 to Fig. 17 are more structures in the process corresponding to the current figure than in the process corresponding to the previous figure.
  • the first epitaxial structure 12 of the light emitting diode 10 and the second epitaxial structure 22 of the protection diode 20 are grown on the substrate 9 .
  • the first epitaxial structure 12 is spaced from the second epitaxial structure 22 by a certain distance.
  • the first epitaxial structure 12 includes a first semiconductor layer 121 , a first light emitting layer 122 and a second semiconductor layer 123 stacked sequentially from bottom to top.
  • the second epitaxial structure 22 includes a third semiconductor layer 221 , a second light emitting layer 222 and a fourth semiconductor layer 223 stacked sequentially from bottom to top.
  • first semiconductor layer 121 and the third semiconductor layer 221 are respectively etched from the second semiconductor layer 123 and the fourth semiconductor layer 223 to form via holes to expose the first semiconductor layer 121 and the third semiconductor layer 221 .
  • edge portions of the first epitaxial structure 12 and the second epitaxial structure 22 can be selectively removed to further expose the substrate 9 for subsequent cutting and other processes.
  • a first electrode 51 and a second electrode 52 electrically connected to the first semiconductor layer 121 and the second semiconductor layer 123 are formed on the first epitaxial structure 12 .
  • a third electrode 53 and a fourth electrode 54 electrically connected to the third semiconductor layer 221 and the fourth semiconductor layer 223 are formed on the second epitaxial structure 22 .
  • an insulating layer 14 is formed on the first epitaxial structure 12 and the second epitaxial structure 22, and the insulating layer 14 covers the substrate 9, the first epitaxial structure 12, the second epitaxial structure 22, the first electrode 51, the second epitaxial structure The second electrode 52 , the third electrode 53 and the fourth electrode 54 .
  • the insulating layer 14 has a first opening 141 , a second opening 142 , a third opening 143 and a fourth opening 144 .
  • the first opening 141 , the second opening 142 , the third opening 143 and the fourth opening 144 are respectively located above the first electrode 51 , the second electrode 52 , the third electrode 53 and the fourth electrode 54 for exposing the electrodes.
  • a first pad 41 , a second pad 42 and a third pad 43 are formed on the insulating layer 14 .
  • the first pad 41 is electrically connected to the first electrode 51 and the fourth electrode 54 respectively through the first opening 141 and the fourth opening 144;
  • the second pad 42 is electrically connected to the second electrode 52 through the second opening 142;
  • the pad 43 is connected to the second pad 42 and electrically connected to the third semiconductor layer 221 through the third opening 143 .
  • FIG. 18 is a schematic top view of the light emitting diode structure 4 provided by the fifth embodiment of the present invention.
  • the third electrode 53 is ring-shaped Shape
  • the fourth electrode 54 is block-shaped
  • the corresponding third opening 143 and fourth opening 144 are also adaptively adjusted to ensure a smooth circuit.
  • the block-shaped fourth electrode 54 is located inside the ring-shaped third electrode 53 , which can make the anti-ESD effect of the LED structure 4 better.
  • FIG. 19 is a schematic top view of the light emitting diode structure 5 provided by the sixth embodiment of the present invention.
  • the third electrode 53 has a block shape. shape
  • the fourth electrode 54 is in a ring shape, and the corresponding third opening 143 and fourth opening 144 are also adaptively adjusted to ensure a smooth circuit.
  • the block-shaped third electrode 53 is located inside the ring-shaped fourth electrode 54 , which can make the anti-ESD effect of the LED structure 5 better.
  • the shape of the electrodes in the above-mentioned Figures 18 and 19 is a closed-loop ring, but the present case is not limited thereto.
  • the other electrode In the case where one electrode in the third electrode 53 or the fourth electrode 54 is in a non-closed-loop shape, that is, an open-loop shape, the other electrode
  • the block-shaped electrodes and the open-ring-shaped electrodes enclosing the block-shaped electrodes can also improve the anti-ESD capability of the light-emitting diode structure.
  • the shape of the open loop can be " ⁇ " shape, "two" shape, etc.
  • the block shape can be square, round, etc.
  • the shape is located in the two parallel sides of the "two" shape.
  • one of the third electrode 53 and the fourth electrode 54 On the whole, one of the third electrode 53 and the fourth electrode 54 is located on the outside, and the other electrode is located on the opposite inside, so as to improve the anti-ESD capability of the light emitting diode structure.
  • the ESD resistance of the LED structure can be improved by designing the positional relationship between the second transparent conductive layer 33 and the fourth electrode 54 .
  • the second transparent conductive layer 33 can be in a ring shape
  • the fourth electrode 54 can be in a block shape
  • the fourth electrode 54 is located on the ring-shaped second transparent conductive layer.
  • the fourth electrode 54 is ring-shaped, the second transparent conductive layer 33 is block-shaped, and the second transparent conductive layer 33 is located inside the ring-shaped fourth electrode 54; or, the second transparent conductive layer
  • the layer 33 is in the shape of an open ring, the fourth electrode 54 is in the shape of a block, and the second transparent conductive layer 33 sandwiches the fourth electrode 54; or, the second transparent conductive layer 33 is in the shape of a block, and the fourth electrode 54 is in the shape of an open ring, The fourth electrode 54 sandwiches the second transparent conductive layer 33 .
  • one structure of the second transparent conductive layer 33 and the fourth electrode 54 is located on the outside, and the other structure is located on the opposite inside, which can improve the anti-ESD capability of the light emitting diode structure.
  • FIG. 20 is a schematic top view of the light emitting diode structure 6 provided by the seventh embodiment of the present invention.
  • the level of the fourth electrode 54 The projected area is larger than the horizontal projected area of the third electrode 53 , which can effectively improve the negative ESD resistance of the LED 10 , that is, the ESD resistance of the first semiconductor side of the LED 10 .
  • FIG. 21 is a schematic top view of the light emitting diode structure 7 provided by the eighth embodiment of the present invention.
  • the protection diode 20 is arranged on The corner position of the LED structure 7 is not arranged parallel to the LED 10 .
  • the length L2 of the second epitaxial structure 22 of the protection diode 20 is still greater than or equal to 50% of the width L1 of the first epitaxial structure 12 (that is, the length value of the upper side 124 of the first epitaxial structure 12 in FIG. 21 ), and It is less than or equal to 110% of the width L1 of the first epitaxial structure 12 , so that the protection diode 20 has a larger area.
  • This configuration is not only beneficial to simplify the manufacturing process of the light emitting diode structure 7 , but also can improve the ESD resistance of the light emitting diode structure 7 .
  • LED structures 1, 2, 3, 4, 5, 6, 7, and 8 are mainly used in UV (Ultraviolet Rays) products, and their wavelength range can be between 220nm ⁇ 420nm.
  • This embodiment provides a light-emitting device, which adopts the light-emitting diode structures 1, 2, 3, 4, 5, 6, 7, and 8 provided by any of the above-mentioned embodiments, and its specific structures and technical effects will not be repeated here.
  • the light emitting device may be a light emitting device for UV products or UVC products.
  • the light-emitting diode structure 1 and its light-emitting device provided by the present invention significantly improve the light-emitting diode structure 1 by designing the protection diode 20 and optimizing the design and structure of the protection diode 20 to improve negative ESD resistance.
  • Negative anti-ESD ability at the same time reduce the possibility of chip damage caused by ESD after spot testing, and reduce the abnormal rate of finished products.
  • Light-emitting diode structure 1 through the anti-parallel connection of protection diode 20 and light-emitting diode 10, the setting of contact resistance formed between conductive structures 40, 45, 46 and the third semiconductor layer 221 is relatively large, greatly improving the anti-ESD capability of light-emitting diode 10 chip , especially to improve the negative anti-ESD capability of the light-emitting diode 10 chip, which directly improves the anti-ESD capability of the bare chip, avoids the failure of the light-emitting diode 10 chip due to static electricity before the package is completed, and saves the cost of packaging the Zener diode.

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Abstract

本发明提供一种发光二极管结构及发光装置，包括发光二极管、保护二极管、绝缘层、两个焊盘和导电结构，保护二极管是反向并联于发光二极管，每个二极管包括外延结构和电极，外延结构包括依次层叠的N半导体层、发光层和P半导体层，电极都位于外延结构上，绝缘层覆盖各二极管的外延结构，第一焊盘位于绝缘层上并电连接第一电极与第四电极，第二焊盘位于绝缘层上并电连接第二电极，导电结构连接于第二焊盘并电连接保护二极管的N半导体层，导电结构与第一电极的材料不同。借此，可大幅提升发光二极管结构的抗ESD能力，特别是提升负向的抗ESD能力。

Description

发光二极管结构及发光装置 技术领域
本发明涉及半导体技术领域，特别涉及一种高可靠性的发光二极管结构及发光装置。
 背景技术
发光二极管(英文：Light Emitting Diode，简称：LED)是一种利用载流子复合时释放能量形成发光的半导体器件，LED芯片具有耗电低、色度纯、寿命长、体积小、响应时间快、节能环保等诸多优势，被广泛应用于照明、可见光通信及发光显示等场景。LED芯片分为正装结构、倒装结构和垂直结构三种。与传统的正装芯片相比，倒装LED芯片结构是将二极管结构倒置，从蓝宝石一侧射出光线，而电极一侧可固定在散热更好的基板上。
为避免LED芯片因静电释放（Electro-Static discharge，ESD）而被破坏，目前常见的解决方案是利用额外增加的齐纳二极管与LED芯片反向并联，以防止LED芯片被反向偏压或ESD电流破坏。当ESD现象发生时，静电的高压特性会使得齐纳二极管在其击穿电压区操作，此时，与LED芯片反向并联的齐纳二极管便可以有效避免LED芯片被静电所破坏。
然而，此种解决方案存在以下几个问题：1.封装过程中安装齐纳二极管的难度较高；2.这种封装工艺成本较高；3.在完成封装前，LED芯片极有可能因静电等原因而失效；4.，因为齐纳二极管在封装中放置在靠近LED芯片的位置，所以LED封装的发光效率会因齐纳二极管吸收的光而降低，从而降低LED封装的产率。
此外，在UV（UltraViolet）产品中的LED芯片，其受限于外延能力，负向的抗ESD能力是远弱于正向的抗ESD能力，目前仍未寻找到合适的解决方案。
因此，如何提升LED芯片的抗ESD能力，以及进一步提升LED芯片的负向的抗ESD能力是本领域技术人员长久以来需要解决的技术难题。
 技术解决方案
本发明提供一种发光二极管结构，其包括发光二极管、保护二极管、绝缘层、第一焊盘、第二焊盘以及导电结构。
发光二极管包括第一外延结构、第一电极与第二电极。第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层。第一电极位于第一外延结构上且电连接于第一半导体层；第二电极位于第一外延结构上且电连接于第二半导体层。保护二极管是通过反向并联的方式连接于发光二极管，其包括第二外延结构与第四电极。第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层。第一外延结构与第二外延结构彼此隔离。第四电极位于第二外延结构上且电连接于第四半导体层。绝缘层覆盖第一外延结构与第二外延结构，并具有第一开口、第二开口、第三开口与第四开口。第一焊盘位于绝缘层上，且通过第一开口与第四开口分别电连接第一电极与第四电极。第二焊盘位于绝缘层上，且通过第二开口电连接第二电极。导电结构连接于第二焊盘，并通过第三开口电连接第三半导体层。其中，导电结构与第一电极的材料不同。
本发明还提供一种发光二极管结构，其包括发光二极管、保护二极管、绝缘层、第一焊盘、第二焊盘以及导电结构。
发光二极管包括第一外延结构、第一电极与第二电极。第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层。第一电极位于第一外延结构上且电连接于第一半导体层；第二电极位于第一外延结构上且电连接于第二半导体层。保护二极管是通过反向并联的方式连接于发光二极管，其包括第二外延结构与第四电极。第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层。第一外延结构与第二外延结构彼此隔离。第四电极位于第二外延结构上且电连接于第四半导体层。绝缘层覆盖第一外延结构与第二外延结构，并具有第一开口、第二开口、第三开口与第四开口。第一焊盘位于绝缘层上，且通过第一开口与第四开口分别电连接第一电极与第四电极。第二焊盘位于绝缘层上，且通过第二开口电连接第二电极。导电结构连接于第二焊盘，并通过第三开口电连接第三半导体层。其中，导电结构与第三半导体层之间形成的接触电阻大于第一电极与第一半导体层之间形成的接触电阻。
本发明还提供一种发光二极管结构，其包括发光二极管、保护二极管、绝缘层、第一焊盘、第二焊盘以及导电结构。
发光二极管包括第一外延结构、第一电极与第二电极。第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层。第一电极位于第一外延结构上且电连接于第一半导体层；第二电极位于第一外延结构上且电连接于第二半导体层。保护二极管是通过反向并联的方式连接于发光二极管，其包括第二外延结构与第四电极。第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层。第一外延结构与第二外延结构彼此隔离。第四电极位于第二外延结构上且电连接于第四半导体层。绝缘层覆盖第一外延结构与第二外延结构，并具有第一开口、第二开口、第三开口与第四开口。第一焊盘位于绝缘层上，且通过第一开口与第四开口分别电连接第一电极与第四电极。第二焊盘位于绝缘层上，且通过第二开口电连接第二电极。导电结构连接于第二焊盘，并通过第三开口电连接第三半导体层。其中，第一电极直接接触于第一半导体层的材料不同于导电结构直接接触于第三半导体层的材料。
在一实施例中，所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层，所述第三焊盘的材料可以选自Cr、Pt、Au、Ni、Ti、Al、AuSn中的一种或多种，所述第一电极的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种。
在一实施例中，所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层。
在一实施例中，所述导电结构包括第三电极与第三焊盘，所述第三电极位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极。所述第一电极的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种，所述第三电极的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种。
在一实施例中，所述导电结构还包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三电极位于所述第二透明导电层与所述第三焊盘之间，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第三电极呈环形形状，所述第四电极呈块状，所述第四电极位于环形形状的所述第三电极的内部；或，所述第四电极呈环形形状，所述第三电极呈块状，所述第三电极位于环形形状的所述第四电极的内部。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第三电极呈开环形状，所述第四电极呈块状，所述第三电极包夹所述第四电极；或，所述第三电极呈块状，所述第四电极呈开环形状，所述第四电极包夹所述第三电极。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第二透明导电层呈环形形状，所述第四电极呈块状，所述第四电极位于环形形状的所述第二透明导电层的内部；或，所述第四电极呈环形形状，所述第二透明导电层呈块状，所述第二透明导电层位于环形形状的所述第四电极的内部；或，所述第二透明导电层呈开环形状，所述第四电极呈块状，所述第二透明导电层包夹所述第四电极；或，所述第二透明导电层呈块状，所述第四电极呈开环形状，所述第四电极包夹所述第二透明导电层。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第四电极的水平投影面积大于所述第三电极的水平投影面积。
在一实施例中，所述发光二极管还包括第一透明导电层，所述第一透明导电层位于所述第二电极与所述第二半导体层之间；所述保护二极管还包括第三透明导电层，所述第三透明导电层位于所述第四电极与所述第四半导体层之间。
在一实施例中，所述第一电极包括连接电极与欧姆接触电极，所述欧姆接触电极连接所述第一外延结构，所述连接电极连接所述欧姆接触电极，所述第一焊盘通过所述第一开口连接所述连接电极。所述连接电极的材料可以选自Cr、Pt、Au、Ni、Ti、Al中的一种或多种，所述欧姆接触电极的材料可以选自Ti、Al、Au、Pt中的一种或多种。
在一实施例中，所述第二透明导电层的厚度介于5-500纳米。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第二外延结构位于所述第一外延结构的外侧，所述第二外延结构的长度大于等于所述第一外延结构的宽度的50%，且小于等于所述第一外延结构的宽度的110%。
在一实施例中，从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述发光二极管与所述保护二极管皆呈方型形状。
在一实施例中，所述发光二极管结构的波长范围介于220nm~420nm。
在一实施例中，所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层，所述第三焊盘与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
在一实施例中，所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层，所述第二透明导电层与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
在一实施例中，所述导电结构包括第三电极与第三焊盘，所述第三电极位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第三电极与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
在一实施例中，所述导电结构包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三电极连接于所述第二透明导电层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第二透明导电层与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
在一实施例中，所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口直接连接所述第三半导体层，所述第三焊盘的材料不同于所述第一电极的材料。
所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层，所述第二透明导电层的材料不同于所述第一电极的材料。
在一实施例中，所述导电结构包括第三电极与第三焊盘，所述第三电极直接连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第三电极的材料不同于所述第一电极的材料。
在一实施例中，所述导电结构包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层直接连接于所述第三半导体层，所述第三电极连接于所述第二透明导电层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第二透明导电层的材料不同于所述第一电极的材料。
本发明还提供一种发光装置，其采用如上任意所述的发光二极管结构。
 有益效果
本发明的一个优势在于提供一种发光二极管芯片及其发光装置，通过保护二极管与发光二极管反向并联，导电结构与第三半导体层之间形成的接触电阻较大的设置，大幅提升发光二极管芯片的抗ESD能力，尤其是提升发光二极管芯片的负向抗ESD能力，直接提升了芯片裸晶的抗ESD能力，避免发光二极管芯片在完成封装前因为静电原因而失效，并节约封装齐纳二极管的成本。
本发明的其它特征和有益效果将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他有益效果可通过在说明书、权利要求书等内容中所特别指出的结构来实现和获得。
 附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图；在下面描述中附图所述的位置关系，若无特别指明，皆是图示中组件绘示的方向为基准。
图1是本发明第一实施例提供的发光二极管结构的俯视结构示意图；
图2是沿图1的截取线A-A截取的纵向剖面示意图；
图3是沿图1的截取线B-B截取的纵向剖面示意图；
图4是本发明第二实施例提供的发光二极管结构的俯视结构示意图；
图5是沿图4的截取线A-A截取的纵向剖面示意图；
图6是沿图4的截取线B-B截取的纵向剖面示意图；
图7是本发明第三实施例提供的发光二极管结构的俯视结构示意图；
图8是沿图7的截取线A-A截取的纵向剖面示意图；
图9是沿图7的截取线B-B截取的纵向剖面示意图；
图10是本发明第四实施例提供的发光二极管结构的俯视结构示意图；
图11是图10的尺寸示意图；
图12是沿图10的截取线A-A截取的纵向剖面示意图；
图13是沿图10的截取线B-B截取的纵向剖面示意图；
图14至图17是图10所示的发光二极管结构在制造过程中各阶段的俯视结构示意图；
图18是本发明第五实施例提供的发光二极管结构的俯视结构示意图；
图19是本发明第六实施例提供的发光二极管结构的俯视结构示意图；
图20是本发明第七实施例提供的发光二极管结构的俯视结构示意图；
图21是本发明第八实施例提供的发光二极管结构的俯视结构示意图。
附图标记：
1、2、3、4、5、6、7、8-发光二极管结构；9-衬底；10-发光二极管；12-第一外延结构；121-第一半导体层；122-第一发光层；123-第二半导体层；124-第一外延结构的侧边；125-临界边；14-绝缘层；141-第一开口；142-第二开口；143-第三开口；144-第四开口；20-保护二极管；22-第二外延结构；221-第三半导体层；222-第二发光层；223-第四半导体层；224-第二外延结构的侧边；30-连接电极；31-欧姆接触电极；32-第一透明导电层；33-第二透明导电层；34-第三透明导电层；40、45、46、48-导电结构；41-第一焊盘；42-第二焊盘；43-第三焊盘；51-第一电极；52-第二电极；53-第三电极；54-第四电极；L1-第一外延结构的宽度；L2-第二外延结构的长度；D1-第一最小距离；D2-第二最小距离；X-第一方向；Y-第二方向。
 本发明的实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例；下面所描述的本发明不同实施方式中所设计的技术特征只要彼此之间未构成冲突就可以相互结合；基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“垂直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或组件必须具有特定的方位、或以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，皆为“至少包含”的意思。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
请参阅图1，图1是本发明第一实施例提供的发光二极管结构1的俯视结构示意图，图2是沿图1的截取线A-A截取的纵向剖面示意图，图3是沿图1的截取线B-B截取的纵向剖面示意图。为达所述优点至少其中之一或其他优点，本发明的第一实施例提供一种发光二极管结构1。如图中所示，发光二极管结构1包括发光二极管10、保护二极管20、绝缘层14、第一焊盘41、第二焊盘42以及导电结构40。
发光二极管10和保护二极管20设置在衬底9上。衬底9可为透明性衬底或者非透明衬底或者半透明衬底，其中透明性衬底或者半透明衬底可以允许发光层辐射出的光穿过衬底9到达衬底9的远离外延结构的一侧，例如衬底9可以是蓝宝石平片衬底、蓝宝石图形化衬底、硅衬底、碳化硅衬底、氮化镓衬底、玻璃衬底中的任意一种。
在一些实施例中，可以采用组合式的图形化衬底9，该衬底9的图形为一系列的凸起结构，该凸起结构可以为一层或者多层结构，包含至少一层折射率低于衬底9的折射率的光萃取层，该光萃取层的厚度大于该凸起结构的高度的一半，更利于发光二极管10的出光效率。优选地，该凸起结构呈炮弹状结构，光萃取层的材料可以为折射率优选小于1.6，例如可以选用SiO 2等。在一些实施例中，衬底9可以进行减薄或者移除形成薄膜型的芯片。
发光二极管10包括第一外延结构12、第一电极51与第二电极52。第一外延结构12包括由下至上依次层叠的第一半导体层121、第一发光层122和第二半导体层123。第一电极51位于第一外延结构12上且电连接于第一半导体层121。第二电极52位于第一外延结构12上且电连接于第二半导体层123。由于第一电极51一般是先蒸镀金属，再进行高温融合金属材质的方式制成，例如使用Ti/Al金属材质，先将Ti/Al金属材质蒸镀在第一半导体层121上，再采用高温融合的方式制成，故第一电极51的电阻往往较小，意即第一电极51与第一半导体121之间形成的接触电阻较小，第一电极51的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种。
保护二极管20是通过反向并联的方式连接于发光二极管10，以使得保护二极管20可于发光二极管结构1之中提供电性防护的效果，保护发光二极管10不受损伤，从而提供具有很强静电释放(ESD)抗性的发光二极管10芯片。保护二极管20包括第二外延结构22与第四电极54。第二外延结构22包括由下至上依次层叠的第三半导体层221、第二发光层222和第四半导体层223。第一外延结构12与第二外延结构22是彼此隔离设置的。第四电极54位于第二外延结构22上且电连接于第四半导体层223。
所述反向并联是指将发光二极管10的正极与保护二极管20的负极连接，而发光二极管10的负极与保护二极管20的正极连接。
发光二极管10与保护二极管20是彼此电性隔离的堆叠区域，并且可由氮化物半导体层构成。利用这种结构，发光二极管10可配置成在相同的基板上与保护二极管20具有相同高度。发光二极管10和保护二极管20可通过图案化以相同生长程序(例如有机金属化学气相沈积(MOCVD)、分子束磊晶(MBE)等)生长的氮化物半导体层来形成，以便彼此分开。因此，形成第一半导体层121、第一发光层122及第二半导体层123的程序可以与形成第三半导体层221、第二发光层222及第四半导体层223的程序相同。因此，第一半导体层121、第一发光层122及第二半导体层123的成分及杂质密度可以分别与第三半导体层221、第二发光层222及第四半导体层223的成分及杂质密度相同。
第一半导体层121与第三半导体层221形成于衬底9上，该二个半导体层作为在衬底9上生长的层，可以是掺杂了n型杂质，例如Si的氮化镓类半导体层。在一些实施例中，在第一半导体层121与衬底9之间设置还可缓冲层。在另一些实施例，第一外延结构12与第二外延结构22还可以通过粘结层与衬底9进行连结。
第一发光层122与第二发光层222可以为量子阱结构(Quantum Well，简称QW)。在其他实施例中，第一发光层122与第二发光层222也可以为多重量子阱结构(Multiple Quantum Well，简称MQW)，其中多重量子阱结构包括以重复的方式交替设置的多个量子阱层(Well)和多个量子阻障层(Barrier)。此外，第一发光层122与第二发光层222内的阱层的组成以及厚度决定生成的光的波长。特别是，通过调节阱层的组成可以提供生成紫外线、蓝色光、绿色光等不同色光的发光层。
第二半导体层123与第四半导体层223可以是掺杂了p型杂质，例如Mg的氮化镓类半导体层。虽然第一半导体层121、第二半导体层123、第三半导体层221以及第四半导体层223分别可以是单层结构，但本案不限于此，也可以是多重层，还可以包括超晶格层。此外，在第一半导体层121与第三半导体层221是掺杂了p型杂质的情况下，第二半导体层123与第四半导体层223可以是掺杂n型杂质。
绝缘层14覆盖第一外延结构12与第二外延结构22，并具有第一开口141、第二开口142、第三开口143与第四开口144。第一开口141、第二开口142、第三开口143与第四开口144分别位于第一半导体层121、第二半导体层123、第三半导体层221与第四半导体层223的上方。在一实施例中，绝缘层14的材料包含非导电材料。非导电材料优选地为无机材料或是介电材料。无机材料包含硅胶（Silicone）或玻璃（Glass）。介电材料包含氧化铝（AlO）、氮化硅（SiNx）、氧化硅（SiOx）、氧化钛（TiOx）、或氟化镁（MgFx）可以是电绝缘材料。例如，绝缘层14可以是二氧化硅、氮化硅、氧化钛、氧化钽、氧化铌、钛酸钡或者其组合，其组合例如可以是两种材料重复堆叠形成的布拉格反射镜（DBR）。
第一焊盘41与第二焊盘42皆位于绝缘层14上，第一焊盘41是通过第一开口141与第四开口144分别电连接第一电极51与第四电极54，第二焊盘42是通过第二开口142电连接第二电极52。第一焊盘41和第二焊盘42可在同一工艺中利用相同材料一并形成，因此可具有相同的层构造。
导电结构40连接于第二焊盘42，并通过第三开口143电连接第三半导体层221。其中，导电结构40的材料与第一电极51的材料不同，使得导电结构40与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，以避免发光二极管10因ESD而产生损伤，提升发光二极管结构1的抗ESD能力，特别是负向的抗ESD能力。以下将列举导电结构40的三种实施方式，以便于理解导电结构40的特性和结构。需要说明的是，该导电结构40的三种实施方式仅是用以理解，而非用以限定本发明。
在一实施例中，如图1至图3所示，导电结构40可以为第三焊盘43。第三焊盘43连接于第二焊盘42，并通过第三开口143电连接第三半导体层221。第三焊盘43的材料不同于第一电极51的材料，使得第三焊盘43与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，进而保护发光二极管10，提升发光二极管结构1的抗ESD能力，特别是负向的抗ESD能力。作为一个替代性的实施方式，第三焊盘43可以是仅直接接触于第三半导体层221的材料不同于第一电极51直接接触于第一半导体层121的材料，使得第三焊盘43与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻。
第一电极51的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种，第三焊盘43的材料可以选自Cr、Pt、Au、Ni、Ti、Al、AuSn中的一种或多种。
在一实施例中，如图4至图6所示，导电结构45可以包括第三电极53与第三焊盘43。第三电极53位于第二外延结构22上且电连接于第三半导体层221；第三焊盘43连接于第二焊盘42，并通过第三开口143电连接第三电极53。第三电极53的材料不同于第一电极51的材料，使得第三电极53与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，进而保护发光二极管10，提升发光二极管结构2的抗ESD能力，特别是负向的抗ESD能力。作为一个替代性的实施方式，第三电极53可以是仅直接接触于第三半导体层221的材料不同于第一电极51直接接触于第一半导体层121的材料，使得第三电极53与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻。
第一电极51的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种；第三电极53的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种。
在一实施例中，如图7至图9所示，导电结构48可以包括第二透明导电层33与第三焊盘43。第二透明导电层33位于第二外延结构22上且电连接于第三半导体层221；第三焊盘43连接于第二焊盘42，并通过第三开口143电连接第二透明导电层33。第二透明导电层33的材料不同于第一电极51的材料，使得第二透明导电层33与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，进而保护发光二极管10，提升发光二极管结构8的抗ESD能力，特别是负向的抗ESD能力。作为一个替代性的实施方式，第二透明导电层33可以是仅直接接触于第三半导体层221的材料不同于第一电极51直接接触于第一半导体层121的材料，使得第二透明导电层33与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻。
第一电极51的材料可以选自Cr、Pt、Au、Ni、Ti、Al、PtAu中的一种或多种；第二透明导电层33可以采用透明导电材料制成，如含铟锡氧化物、锌铟氧化物等。
在一实施例中，如图10至图13所示，导电结构46可以是包括第二透明导电层33、第三电极53与第三焊盘43。第二透明导电层33位于第二外延结构22上且电连接于第三半导体层221，第二透明导电层33位于第三电极53与第三半导体层221之间。较优的，第二透明导电层33的宽度大于第三电极53的宽度。第三电极53连接于第二透明导电层33，不会接触到第三半导体层221。第三焊盘43连接于第二焊盘42，并通过第三开口143电连接第三电极53。进一步说明，第二透明导电层33的材料不同于第一电极51的材料，使得第二透明导电层33与第三半导体层221之间形成的接触电阻是大于第一电极51与第一半导体层121之间形成的接触电阻，进而保护发光二极管10，提升发光二极管结构3的抗ESD能力，特别是负向的抗ESD能力。作为一个替代性的实施方式，第二透明导电层33可以是仅直接接触于第三半导体层221的材料不同于第一电极51直接接触于第一半导体层121的材料，使得第二透明导电层33与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻。
整体来说，本发明是借由导电结构40、45、46的材料与第一电极51的材料不同的方式，使得导电结构40、45、46与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，在诸如静电放电等现象产生，有大的能量通过时，导电结构40、45、46与第三半导体层221之间形成的较大接触电阻会起到更强的隔离缓冲作用，保护发光二极管10，提升发光二极管结构2的抗ESD能力，特别是负向的抗ESD能力。也就是说，当产生ESD冲击电压时，由于导电结构40、45、46与第三半导体层221之间形成的较大接触电阻，在电压相同情况下，最终受到的冲击电流更小，因此在相同冲击电流下能够抵抗住更高的ESD冲击。此外，本发明还可以是通过第一电极51直接接触于第一半导体层121的材料不同于导电结构40、45、46直接接触于第三半导体层221的材料的方式，使得导电结构40、45、46与第三半导体层221之间形成的接触电阻大于第一电极51与第一半导体层121之间形成的接触电阻，进而保护发光二极管10，提升发光二极管结构2的抗ESD能力，特别是负向的抗ESD能力。
所述的材料不同不仅仅只是指形成导电结构40、45、46与第一电极51的材质不同，还包括了在形成导电结构40、45、46与第一电极51的材质相同情况下，具体成分含量不同的可能性。例如：位于第一半导体层121上的第一电极51是使用Ti/Al金属材质，先将Ti/Al金属材质蒸镀在第一半导体层121上，再采用高温融合的方式制成；位于第三半导体层221上的导电结构40、45、46也是使用Ti/Al金属材质，但并未使用高温融合的方式制成（而是仅采用蒸镀金属的方式），此种实施情况应也属于本发明所述的导电结构40、45、46的材料与第一电极51的材料不同的范围之内。
在一实施例中，如图10、图11所示，从发光二极管结构3的上方朝向第一外延结构12俯视，第二外延结构22位于第一外延结构12的外侧，第二外延结构22的长度L2大于等于第一外延结构12的宽度L1的50%，且小于等于第一外延结构12的宽度L1的110%。借由该比例设置，以保证保护二极管20于发光二极管结构3之中提供较佳的电性防护的效果，在不影响发光二极管结构3制程的情况下，形成更大面积的保护二极管20，可以更好的提升发光二极管结构3整体的抗ESD能力。若是保护二极管20较小，则无法起到保护发光二极管10的作用。
不过本案不限于此，如图10、图11所示，发光二极管结构3还可以是通过以下方式来保证保护二极管20于发光二极管结构3之中提供较佳的电性防护的效果。
第一种：从发光二极管结构3的上方朝向第一外延结构12俯视，通过第一焊盘41与第一外延结构12和第二外延结构22具有重叠部分，第二焊盘42（由于第二焊盘42连接第三焊盘43，在本自然段中将第二焊盘42与第三焊盘43视为一个整体，并以第二焊盘42作为统称）与第一外延结构12和第二外延结构22具有重叠部分的方式，使得保护二极管20于发光二极管结构3之中提供较佳的电性防护的效果。也就是，从发光二极管结构3的上方朝向第一外延结构12俯视，部分的第一焊盘41是与第一外延结构12重叠，还有部分的第一焊盘41是与第二外延结构22重叠；部分的第二焊盘42是与第一外延结构12重叠，还有部分的第二焊盘42是与第二外延结构22重叠。优选的，第一焊盘41的水平投影面积大于等于第二焊盘42的水平投影面积，增强发光二极管结构3的负向抗ESD能力，也有助于第二焊盘42避开第一电极51的延伸部，防止绝缘层14破裂时出现短路，提升可靠性。
第二种：从发光二极管结构3的上方朝向第一外延结构12俯视，通过第一外延结构12和第二外延结构22是沿第一方向X布置，第一焊盘41和第二焊盘42（由于第二焊盘42连接第三焊盘43，在本自然段中将第二焊盘42与第三焊盘43视为一个整体，并以第二焊盘42作为统称）是沿第二方向Y布置，第一方向X和第二方向Y不同的方式，使得保护二极管20于发光二极管结构3之中提供较佳的电性防护的效果。换言之，第一外延结构12到第二外延结构22的方向即为第一方向X，第一焊盘41到第二焊盘42的方向即为第二方向Y。较佳的，第一方向X垂直于第二方向Y，可以理解为第一外延结构12和第二外延结构22是竖向排列，第一焊盘41和第二焊盘42是横向排列。较佳的，从发光二极管结构3的上方朝向第一外延结构12俯视，第一焊盘41到第二焊盘42的最小距离大于第一外延结构12到第二外延结构22的最小距离，以避免第一焊盘41与第二焊盘42过近所带来的不利影响。
发光二极管结构3还可以是通过位于发光二极管10上的第一焊盘41与第二焊盘42垂直保护二极管20的设置，来保证保护二极管20于发光二极管结构3之中提供较佳的电性防护的效果。
进一步看，发光二极管10与保护二极管20可以呈方型形状，第一外延结构12与第二外延结构22皆具有四个侧边。从发光二极管结构3的上方朝向第一外延结构12俯视，第二外延结构22是位于第一外延结构12的一个侧边124的外侧，此处将该一个侧边定义为临界边125，第二外延结构22临近该临界边125的侧边224的长度大于等于第一外延结构12的临界边125的长度的50%，且小于等于第一外延结构12的临界边125的长度的110%。具体来说，第二外延结构22是位于该临界边125所在的直线背离第一外延结构12的一侧，其不会越过或碰触该临界边125所在的直线，既可简化整体的制程，还可得到较大面积的保护二极管20，提升发光二极管结构3的抗ESD能力。
在一实施例中，从发光二极管结构3的上方朝向第一外延结构12俯视，即如图10、图11所示，第二外延结构22的水平投影面积占第一外延结构12的水平投影面积的比例大于等于10%且小于等于35%，如此设置，可在保证发光二极管结构3具有高抗ESD能力时，尽量缩小发光二极管结构3的尺寸。作为一个替代性的实施方式，从发光二极管结构3的上方朝向第一外延结构12俯视，第二外延结构22的水平投影面积可以是占发光二极管结构3的水平投影面积的比例大于等于5%且小于等于50%。
所述水平投影面积是指发光二极管结构3正放于水平面上，此时的第一外延结构12到第一焊盘41的方向是垂直于水平面的竖直方向，第二外延结构22到第一焊盘41的方向也是垂直于水平面的竖直方向，各元件（如第一外延结构12、第二外延结构22等元件）投影至水平面上的投影面积。
在一实施例中，从发光二极管结构3的上方朝向第一外延结构12俯视，即如图10、图11所示，第一外延结构12与第二外延结构22之间具有一第一最小距离D1，第一最小距离D1小于30μm，且大于0μm，以在保证发光二极管结构3具有高抗ESD能力时，尽量缩小发光二极管结构3的尺寸。
在一实施例中，从发光二极管结构3的上方朝向第一外延结构12俯视，即如图10、图11所示，第一焊盘41与第二焊盘42之间具有一第二最小距离D2，第二最小距离D2可以是介于30μm~230μm，可根据预设终端的封装尺寸设计合理间距。
在一实施例中，如图12、图13所示，发光二极管10还包括第一透明导电层32，第一透明导电层32位于第二电极52与第二半导体层123之间。第一电极51包括连接电极30与欧姆接触电极31，欧姆接触电极31连接第一半导体层121，连接电极30连接欧姆接触电极31。第一焊盘41通过第一开口141连接连接电极30；保护二极管20还包括第三透明导电层34，第三透明导电层34位于第四电极54与第四半导体层223之间。
各透明导电层（如第一透明导电层32、第二透明导电层33、第三透明导电层34）是采用透明导电材料制成，可保证横向的电流扩展效果，可以提高发光二极管结构3的可靠性。作为示例，透明导电材料可包含铟锡氧化物(indium tin oxide，ITO)、锌铟氧化物(indium zinc oxide，IZO)、氧化铟(indium oxide，InO)、氧化锡(tin oxide，SnO)、镉锡氧化物(cadmium tin oxide，CTO)、锡锑氧化物 (antimony tin oxide，ATO)、铝锌氧化物(aluminum zinc oxide，AZO)、锌锡氧化物(zinc tin oxide，ZTO)、氧化锌掺杂镓(gallium doped zinc oxide，GZO)、氧化铟掺杂钨(tungsten doped indium oxide，IWO)或者氧化锌(zinc oxide，ZnO)，但本公开实施例并非以此为限。第二透明导电层33的厚度可以介于5-500纳米。
欧姆接触电极31可以与第一半导体层121之间形成良好的欧姆接触，有利于电流的输入和输出。连接电极30可以保护欧姆接触电极31，并起到支撑、垫高等作用。优选的，连接电极30可以包覆住欧姆接触电极31，进一步避免欧姆接触电极31内的金属析出，例如避免Al析出。连接电极30的材料可以选自Cr、Pt、Au、Ni、Ti、Al中的一种或多种，欧姆接触电极31的材料可以选自Ti、Al、Au、Pt中的一种或多种。
请参阅图14至图17，图14至图17是图10所示的发光二极管结构3在制造过程中各阶段的俯视结构示意图。需要说明的是，为便于理解俯视图中各层的位置、形状及相对关系，此处将以图10所示的发光二极管结构3为例，参照图14至图17叙述图10的各阶段的制程，与之相对的，对应于其他实施例的俯视图中各层的堆叠情况也可参照图14至图17进行适应性理解。由于图10中省略了欧姆接触电极31、第一透明导电层32、第二透明导电层33、第三透明导电层34等结构，故制程阶段也进行相应的省略。图14至图17中各图的阴影填充部分为当前图对应的制程相较于上一图对应的制程多出的结构。
首先，参照图14，在衬底9上生长发光二极管10的第一外延结构12和保护二极管20的第二外延结构22。第一外延结构12与第二外延结构22间隔一定距离。第一外延结构12包括包括由下至上依次层叠的第一半导体层121、第一发光层122和第二半导体层123。第二外延结构22包括由下至上依次层叠的第三半导体层221、第二发光层222和第四半导体层223。接着，由第二半导体层123与第四半导体层223分别向第一半导体层121与第三半导体层221进行蚀刻，形成通孔以露出第一半导体层121与第三半导体层221。此外，可以选择性地去除第一外延结构12与第二外延结构22的边缘部分，进一步露出衬底9，以便于后续切割等制程。
其次，参照图15，在第一外延结构12上形成分别电连接于第一半导体层121与第二半导体层123的第一电极51与第二电极52。在第二外延结构22上形成分别电连接于第三半导体层221和第四半导体层223的第三电极53和第四电极54。
接着，参照图16，在第一外延结构12与第二外延结构22上形成绝缘层14，绝缘层14覆盖衬底9、第一外延结构12、第二外延结构22、第一电极51、第二电极52、第三电极53以及第四电极54。绝缘层14具有第一开口141、第二开口142、第三开口143与第四开口144。第一开口141、第二开口142、第三开口143与第四开口144分别位于第一电极51、第二电极52、第三电极53以及第四电极54的上方，用于露出电极。
最后，参照图17，在绝缘层上14形成第一焊盘41、第二焊盘42以及第三焊盘43。第一焊盘41是通过第一开口141与第四开口144分别电连接第一电极51与第四电极54；第二焊盘42是通过第二开口142电连接第二电极52；第三焊盘43连接于第二焊盘42，并通过第三开口143电连接第三半导体层221。
请参阅图18，图18是本发明第五实施例提供的发光二极管结构4的俯视结构示意图。相较于图4第二实施例所示的发光二极管结构2而言，本实施例的发光二极管结构4中，从发光二极管结构4的上方朝向第一外延结构12俯视，第三电极53呈环形形状，第四电极54呈块状，与之相对应的第三开口143与第四开口144也做适应性调整，保证电路顺畅。其中，块状的第四电极54是位于环形形状的第三电极53的内部，可使得发光二极管结构4的抗ESD效果更佳。
请参阅图19，图19是本发明第六实施例提供的发光二极管结构5的俯视结构示意图。相较于图4第二实施例所示的发光二极管结构2而言，本实施例的发光二极管结构5中，从发光二极管结构5的上方朝向第一外延结构12俯视，第三电极53呈块状，第四电极54呈环形形状，与之相对应的第三开口143与第四开口144也做适应性调整，保证电路顺畅。其中，块状的第三电极53是位于环形形状的第四电极54的内部，可使得发光二极管结构5的抗ESD效果更佳。
上述图18与图19中电极的形状为闭环环形，不过本案不限于此，在第三电极53或第四电极54中的一个电极呈非闭环形状，即开环形状的情况下，另一个电极呈块状，且开环形状的电极包夹块状的电极亦可提升发光二极管结构的抗ESD能力。例如：开环形状可以为“凵”形、“二”形等，块状可以为方块、圆块等，所述包夹可以理解为块状是位于“凵”形的凹口内，或是块状位于“二”形的两个平行边内。整体来说，在第三电极53与第四电极54中的一个电极位于外侧，另一个电极则位于相对的内侧，便可以提升发光二极管结构的抗ESD能力。
此外，在导电结构48包含第二透明导电层33的实施例中，可以是通过设计第二透明导电层33与第四电极54的位置关系，来提升发光二极管结构的抗ESD能力。具体来说，从发光二极管结构的上方朝向第一外延结构12俯视，第二透明导电层33可以呈环形形状，第四电极54可以呈块状，第四电极54位于环形形状的第二透明导电层33的内部；或是，第四电极54呈环形形状，第二透明导电层33呈块状，第二透明导电层33位于环形形状的第四电极54的内部；或是，第二透明导电层33呈开环形状，第四电极54呈块状，第二透明导电层33包夹第四电极54；或是，第二透明导电层33呈块状，第四电极54呈开环形状，第四电极54包夹第二透明导电层33。整体来说，俯视视角下，第二透明导电层33与第四电极54中的一个结构是位于外侧，另一个结构则位于相对的内侧，便可以提升发光二极管结构的抗ESD能力。
请参阅图20，图20是本发明第七实施例提供的发光二极管结构6的俯视结构示意图。相较于图4第二实施例所示的发光二极管结构2而言，本实施例的发光二极管结构6中，从发光二极管结构6的上方朝向第一外延结构12俯视，第四电极54的水平投影面积是大于第三电极53的水平投影面积，可有效提升发光二极管10负向的抗ESD能力，即发光二极管10第一半导体侧的抗ESD能力。
请参阅图21，图21是本发明第八实施例提供的发光二极管结构7的俯视结构示意图。相较于图4第二实施例所示的发光二极管结构2而言，本实施例的发光二极管结构7中，从发光二极管结构7的上方朝向第一外延结构12俯视，保护二极管20是设置在发光二极管结构7的角落位置，而非是与发光二极管10平行设置。该保护二极管20的第二外延结构22的长度L2仍是大于等于第一外延结构12的宽度L1（即图21中第一外延结构12的上侧侧边124的长度数值）的50%，且小于等于第一外延结构12的宽度L1的110%，以使得保护二极管20具有较大面积。借此设置，既有利于简化发光二极管结构7的制程，并且可以起到提升发光二极管结构7的抗ESD能力。
补充说明的是，前述的发光二极管结构1、2、3、4、5、6、7、8主要是用于UV(Ultraviolet Rays)产品，其波长范围可以是介于220nm~420nm。
本实施例提供一种发光装置，该发光装置采用上述任意实施例提供的发光二极管结构1、2、3、4、5、6、7、8，其具体结构与技术效果不再赘述。该发光装置可以是用于UV产品或UVC产品的发光装置。
综上所述，本发明提供的一种发光二极管结构1及其发光装置，通过设计保护二极管20，并优化保护二极管20的设计和结构搭配提升负向抗ESD能力，显著改善了发光二极管结构1的负向抗ESD能力，同时减少点测后因ESD造成芯粒损伤的可能性，降低成品的异常率。发光二极管结构1通过保护二极管20与发光二极管10反向并联，导电结构40、45、46与第三半导体层221之间形成的接触电阻较大的设置，大幅提升发光二极管10芯片的抗ESD能力，尤其是提升发光二极管10芯片的负向抗ESD能力，直接提升了芯片裸晶的抗ESD能力，避免发光二极管10芯片在完成封装前因为静电原因而失效，并节约封装齐纳二极管的成本。
另外，本领域技术人员应当理解，尽管现有技术中存在许多问题，但是，本发明的每个实施例或技术方案可以仅在一个或几个方面进行改进，而不必同时解决现有技术中或者背景技术中列出的全部技术问题。本领域技术人员应当理解，对于一个权利要求中没有提到的内容不应当作为对于该权利要求的限制。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (26)

  1. 一种发光二极管结构，其特征在于，所述发光二极管结构包括：
    发光二极管，其包括第一外延结构、第一电极与第二电极，所述第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层，所述第一电极位于所述第一外延结构上且电连接于所述第一半导体层，所述第二电极位于所述第一外延结构上且电连接于所述第二半导体层；
    保护二极管，通过反向并联的方式连接于所述发光二极管，所述保护二极管包括第二外延结构与第四电极，所述第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层，所述第一外延结构与所述第二外延结构彼此隔离，所述第四电极位于所述第二外延结构上且电连接于所述第四半导体层；
    绝缘层，覆盖所述第一外延结构与所述第二外延结构，并具有第一开口、第二开口、第三开口与第四开口；
    第一焊盘，位于所述绝缘层上，且通过所述第一开口与所述第四开口分别电连接所述第一电极与所述第四电极；
    第二焊盘，位于所述绝缘层上，且通过所述第二开口电连接所述第二电极；
    导电结构，连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层；
    其中，所述导电结构与所述第一电极的材料不同。
  2. 根据权利要求1所述的发光二极管结构，其特征在于：所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层。
  3. 根据权利要求1所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层。
  4. 根据权利要求1所述的发光二极管结构，其特征在于：所述导电结构包括第三电极与第三焊盘，所述第三电极位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极。
  5. 根据权利要求1所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三电极位于所述第二透明导电层与所述第三焊盘之间，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极。
  6. 根据权利要求4或5所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第三电极呈环形形状，所述第四电极呈块状，所述第四电极位于环形形状的所述第三电极的内部；
    或，所述第四电极呈环形形状，所述第三电极呈块状，所述第三电极位于环形形状的所述第四电极的内部。
  7. 根据权利要求4或5所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第三电极呈开环形状，所述第四电极呈块状，所述第三电极包夹所述第四电极；
    或，所述第三电极呈块状，所述第四电极呈开环形状，所述第四电极包夹所述第三电极。
  8. 根据权利要求3或5所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第二透明导电层呈环形形状，所述第四电极呈块状，所述第四电极位于环形形状的所述第二透明导电层的内部；
    或，所述第四电极呈环形形状，所述第二透明导电层呈块状，所述第二透明导电层位于环形形状的所述第四电极的内部；
    或，所述第二透明导电层呈开环形状，所述第四电极呈块状，所述第二透明导电层包夹所述第四电极；
    或，所述第二透明导电层呈块状，所述第四电极呈开环形状，所述第四电极包夹所述第二透明导电层。
  9. 根据权利要求4或5所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第四电极的水平投影面积大于所述第三电极的水平投影面积。
  10. 根据权利要求5所述的发光二极管结构，其特征在于：所述第二透明导电层的厚度介于5-500纳米。
  11. 根据权利要求1所述的发光二极管结构，其特征在于：所述发光二极管还包括第一透明导电层，所述第一透明导电层位于所述第二电极与所述第二半导体层之间；所述保护二极管还包括第三透明导电层，所述第三透明导电层位于所述第四电极与所述第四半导体层之间。
  12. 根据权利要求1所述的发光二极管结构，其特征在于：所述第一电极包括连接电极与欧姆接触电极，所述欧姆接触电极连接所述第一外延结构，所述连接电极连接所述欧姆接触电极，所述第一焊盘通过所述第一开口连接所述连接电极。
  13. 根据权利要求1所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述第二外延结构位于所述第一外延结构的外侧，所述第二外延结构的长度大于等于所述第一外延结构的宽度的50%，且小于等于所述第一外延结构的宽度的110%。
  14. 根据权利要求1所述的发光二极管结构，其特征在于：从所述发光二极管结构的上方朝向所述第一外延结构俯视，所述发光二极管与所述保护二极管皆呈方型形状。
  15. 根据权利要求1所述的发光二极管结构，其特征在于：所述发光二极管结构的波长范围介于220nm~420nm。
  16. 一种发光二极管结构，其特征在于，所述发光二极管结构包括：
    发光二极管，其包括第一外延结构、第一电极与第二电极，所述第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层，所述第一电极位于所述第一外延结构上且电连接于所述第一半导体层，所述第二电极位于所述第一外延结构上且电连接于所述第二半导体层；
    保护二极管，通过反向并联的方式连接于所述发光二极管，所述保护二极管包括第二外延结构与第四电极，所述第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层，所述第一外延结构与所述第二外延结构彼此隔离，所述第四电极位于所述第二外延结构上且电连接于所述第四半导体层；
    绝缘层，覆盖所述第一外延结构与所述第二外延结构，并具有第一开口、第二开口、第三开口与第四开口；
    第一焊盘，位于所述绝缘层上，且通过所述第一开口与所述第四开口分别电连接所述第一电极与所述第四电极；
    第二焊盘，位于所述绝缘层上，且通过所述第二开口电连接所述第二电极；
    导电结构，连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层；
    其中，所述导电结构与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
  17. 根据权利要求16所述的发光二极管结构，其特征在于：所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层，所述第三焊盘与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
  18. 根据权利要求16所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层，所述第二透明导电层与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
  19. 根据权利要求16所述的发光二极管结构，其特征在于：所述导电结构包括第三电极与第三焊盘，所述第三电极位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第三电极与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
  20. 根据权利要求16所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三电极连接于所述第二透明导电层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第二透明导电层与所述第三半导体层之间形成的接触电阻大于所述第一电极与所述第一半导体层之间形成的接触电阻。
  21. 一种发光二极管结构，其特征在于，所述发光二极管结构包括：
    发光二极管，其包括第一外延结构、第一电极与第二电极，所述第一外延结构包括依次层叠的第一半导体层、第一发光层和第二半导体层，所述第一电极位于所述第一外延结构上且电连接于所述第一半导体层，所述第二电极位于所述第一外延结构上且电连接于所述第二半导体层；
    保护二极管，通过反向并联的方式连接于所述发光二极管，所述保护二极管包括第二外延结构与第四电极，所述第二外延结构包括依次层叠的第三半导体层、第二发光层和第四半导体层，所述第一外延结构与所述第二外延结构彼此隔离，所述第四电极位于所述第二外延结构上且电连接于所述第四半导体层；
    绝缘层，覆盖所述第一外延结构与所述第二外延结构，并具有第一开口、第二开口、第三开口与第四开口；
    第一焊盘，位于所述绝缘层上，且通过所述第一开口与所述第四开口分别电连接所述第一电极与所述第四电极；
    第二焊盘，位于所述绝缘层上，且通过所述第二开口电连接所述第二电极；
    导电结构，连接于所述第二焊盘，并通过所述第三开口电连接所述第三半导体层；
    其中，所述第一电极直接接触于所述第一半导体层的材料不同于所述导电结构直接接触于所述第三半导体层的材料。
  22. 根据权利要求21所述的发光二极管结构，其特征在于：所述导电结构包括第三焊盘，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口直接连接所述第三半导体层，所述第三焊盘的材料不同于所述第一电极的材料。
  23. 根据权利要求21所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层与第三焊盘，所述第二透明导电层位于所述第二外延结构上且电连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第二透明导电层，所述第二透明导电层的材料不同于所述第一电极的材料。
  24. 根据权利要求21所述的发光二极管结构，其特征在于：所述导电结构包括第三电极与第三焊盘，所述第三电极直接连接于所述第三半导体层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第三电极的材料不同于所述第一电极的材料。
  25. 根据权利要求21所述的发光二极管结构，其特征在于：所述导电结构包括第二透明导电层、第三电极与第三焊盘，所述第二透明导电层直接连接于所述第三半导体层，所述第三电极连接于所述第二透明导电层，所述第三焊盘连接于所述第二焊盘，并通过所述第三开口电连接所述第三电极，所述第二透明导电层的材料不同于所述第一电极的材料。
  26. 一种发光装置，其特征在于，采用如权利要求1至25中任一项所述的发光二极管结构。
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