WO2023053208A1 - Solder joining method - Google Patents

Solder joining method Download PDF

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WO2023053208A1
WO2023053208A1 PCT/JP2021/035653 JP2021035653W WO2023053208A1 WO 2023053208 A1 WO2023053208 A1 WO 2023053208A1 JP 2021035653 W JP2021035653 W JP 2021035653W WO 2023053208 A1 WO2023053208 A1 WO 2023053208A1
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metal member
solder
layer
ausn solder
metallized layer
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PCT/JP2021/035653
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French (fr)
Japanese (ja)
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大佑 中屋
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三菱電機株式会社
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Priority to PCT/JP2021/035653 priority Critical patent/WO2023053208A1/en
Publication of WO2023053208A1 publication Critical patent/WO2023053208A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/19Soldering, e.g. brazing, or unsoldering taking account of the properties of the materials to be soldered
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

Abstract

When a mounting substrate (1) having a metallized layer (2) including a Pd layer (2c), and a metal member (3) are to be joined via an AuSn solder (4), first, the AuSn solder (4) is formed into a film on a mounting surface of the metal member (3). Next, the AuSn solder (4), which has been formed into a film on the metal member (3), is melted by heating the metal member (3) without heating the mounting substrate (1). Subsequently, the metal member (3) is abutted on the metallized layer (2) with the melted AuSn solder (4) therebetween, and the metallized layer (2) and the metal member (3) are joined via the AuSn solder (4).

Description

はんだ接合方法Soldering method
 本開示は、はんだを用いた接合方法に関する。 The present disclosure relates to a joining method using solder.
 従来のはんだ接合方法では、まず、はんだを塗布した実装基板をはんだ融点以上に加熱する。次に、溶融はんだに金属部品又は電子部品の電極を当てつけ、実装基板を急冷して金属部品又は電子部品を固定する(例えば、特許文献1参照)。加熱の際に基板表面のメタライズ層が拡散することで金属間化合物が形成され、接合部の剪断強度が劣化することがある。この問題を解決するために、基板メタライズ層の一部にPd等を拡散ブロック層として挿入していた。 In the conventional soldering method, first, the solder-applied mounting substrate is heated above the melting point of the solder. Next, electrodes of a metal component or an electronic component are brought into contact with the molten solder, and the mounting substrate is rapidly cooled to fix the metal component or the electronic component (see Patent Document 1, for example). When heated, the metallized layer on the substrate surface diffuses to form an intermetallic compound, which may deteriorate the shear strength of the joint. In order to solve this problem, Pd or the like is inserted as a diffusion blocking layer into a part of the substrate metallization layer.
日本特許第6345347号公報Japanese Patent No. 6345347
 はんだとしてAuSnを用い、実装基板表面のメタライズ層の一部にPd層を設けた場合、はんだとメタライズ層の界面にAu、Sn、Pdのうち2つ又は3つを構成元素とする金属間化合物が拡散により形成される。この金属間化合物は機械的に脆い。また、はんだとメタライズ層との間にカーケンダルボイドが形成される。この結果、はんだとメタライズ層の界面の剪断強度が低下するという問題があった。 When AuSn is used as solder and a Pd layer is provided on part of the metallized layer on the surface of the mounting board, an intermetallic compound containing two or three of Au, Sn, and Pd as constituent elements is formed at the interface between the solder and the metallized layer. is formed by diffusion. This intermetallic compound is mechanically brittle. Also, Kirkendall voids are formed between the solder and the metallization layer. As a result, there is a problem that the shear strength at the interface between the solder and the metallized layer is lowered.
 本開示は、上述のような課題を解決するためになされたもので、その目的ははんだとメタライズ層の界面の剪断強度の低下を防止することができるはんだ接合方法を得るものである。 The present disclosure has been made to solve the above-mentioned problems, and its object is to obtain a solder joint method that can prevent a decrease in the shear strength of the interface between the solder and the metallization layer.
 本開示に係るはんだ接合方法は、Pd層を含むメタライズ層を有する実装基板と、金属製部材とをAuSnはんだにより接合させる方法であって、前記金属製部材の実装面に前記AuSnはんだを成膜する工程と、前記実装基板を加熱することなく前記金属製部材を加熱することで、前記金属製部材に成膜された前記AuSnはんだを溶融させる工程と、溶融させた前記AuSnはんだを介して前記金属製部材を前記メタライズ層に当て付け、前記AuSnにより前記メタライズ層と前記金属製部材を接合させる工程とを備えることを特徴とする。 A solder bonding method according to the present disclosure is a method of bonding a mounting substrate having a metallized layer containing a Pd layer and a metal member with AuSn solder, wherein the AuSn solder is deposited on the mounting surface of the metal member. a step of melting the AuSn solder deposited on the metal member by heating the metal member without heating the mounting substrate; and a step of melting the AuSn solder through the melted AuSn solder. and a step of bringing a metal member into contact with the metallized layer and bonding the metallized layer and the metal member with the AuSn.
 本開示では、金属製部材の実装面にAuSnはんだを成膜し、実装基板を加熱することなく、金属製部材を加熱してAuSnはんだを溶融させる。このように実装基板を加熱しないため、実装基板のメタライズ層への伝熱量を著しく下げることができる。このため、メタライズ層内でのPd層からAu層へのPdの拡散を抑制し、はんだ接合後にPd層からAuSnはんだへのPdの拡散も抑制することができる。従って、AuSnはんだとメタライズ層の界面に金属間化合物又はカーケンダルボイドが形成されるのを防ぐことができる。この結果、AuSnはんだとメタライズ層の界面の剪断強度の低下を防止することができる。 In the present disclosure, a film of AuSn solder is formed on the mounting surface of the metal member, and the metal member is heated to melt the AuSn solder without heating the mounting substrate. Since the mounting board is not heated in this manner, the amount of heat transferred to the metallized layer of the mounting board can be significantly reduced. Therefore, the diffusion of Pd from the Pd layer to the Au layer in the metallized layer can be suppressed, and the diffusion of Pd from the Pd layer to the AuSn solder after soldering can also be suppressed. Therefore, it is possible to prevent the formation of intermetallic compounds or Kirkendall voids at the interface between the AuSn solder and the metallization layer. As a result, it is possible to prevent a decrease in shear strength at the interface between the AuSn solder and the metallized layer.
実施の形態に係るはんだ接合方法を示す断面図である。It is a sectional view showing a solder joint method concerning an embodiment. 実施の形態に係るはんだ接合方法を示す断面図である。It is a sectional view showing a solder joint method concerning an embodiment. 実施の形態に係るはんだ接合方法を示す断面図である。It is a sectional view showing a solder joint method concerning an embodiment. 比較例に係るはんだ接合方法を示す断面図である。It is sectional drawing which shows the soldering method which concerns on a comparative example.
 図1から図3は、実施の形態に係るはんだ接合方法を示す断面図である。本実施の形態は、実装基板1のメタライズ層2と金属製部材3とをAuSnはんだ4により接合させる接合方法である。 1 to 3 are cross-sectional views showing the soldering method according to the embodiment. This embodiment is a bonding method for bonding the metallized layer 2 of the mounting board 1 and the metal member 3 with AuSn solder 4 .
 実装基板1は、AlN、Al又はCuW等の絶縁物からなるセミラック基板又はプリント基板等である。実装基板1の上面に、メタライズ層2として、Cu層2a、Ni層2b、Pd層2c及びAu層2dが基板側から順に積層されている。実装基板1の下面にも同様に、メタライズ層5として、Cu層5a、Ni層5b、Pd層5c及びAu層5dが基板側から順に積層されている。これらの金属層は、電解めっき、無電解めっき又は蒸着等により成膜しためっき層である。金属製部材3の材料は、Ni、Fe等である。 The mounting board 1 is a semi-rack board or printed board made of an insulator such as AlN, Al 2 O 3 or CuW. A Cu layer 2 a , a Ni layer 2 b , a Pd layer 2 c and an Au layer 2 d are laminated in order from the substrate side as the metallized layer 2 on the upper surface of the mounting substrate 1 . Similarly, on the lower surface of the mounting substrate 1, a Cu layer 5a, a Ni layer 5b, a Pd layer 5c and an Au layer 5d are laminated as a metallized layer 5 in this order from the substrate side. These metal layers are plated layers formed by electrolytic plating, electroless plating, vapor deposition, or the like. The material of the metal member 3 is Ni, Fe, or the like.
 予め実装基板1のメタライズ層2の表面の酸化物又は有機物等、実装性を阻害するような付着物を洗浄により除去しておく。洗浄手段としては、例えば、Arプラズマ洗浄法によりメタライズ層2の表面を数nm程度削るような洗浄条件とする。 Any adhering substances such as oxides or organic substances on the surface of the metallized layer 2 of the mounting substrate 1 are removed in advance by washing, which may impede the mountability. As a cleaning means, for example, the cleaning conditions are such that the surface of the metallized layer 2 is scraped by several nanometers by an Ar plasma cleaning method.
 まず、図1に示すように、金属製部材3の実装面にAuSnはんだ4を蒸着等により成膜する。次に、図2に示すように、金属製部材3の側面にレーザー光6を照射する。これにより、実装基板1を加熱することなく、金属製部材3を加熱することができる。実装基板1は室温程度の温度に保持されている。 First, as shown in FIG. 1, a film of AuSn solder 4 is formed on the mounting surface of the metal member 3 by vapor deposition or the like. Next, as shown in FIG. 2, the side surface of the metal member 3 is irradiated with laser light 6 . Thereby, the metal member 3 can be heated without heating the mounting board 1 . The mounting substrate 1 is kept at a temperature of about room temperature.
 金属製部材3の加熱により、金属製部材3に成膜されたAuSnはんだ4を溶融させる。金属製部材3に加える熱量は、AuSnはんだ4が融点に達する熱量であればよい。ただし、金属製部材3の表面でのレーザー光6の吸収率、AuSnはんだ4以外への熱拡散を考慮する必要がある。なお、AuSnはんだ4の自重に比べてその表面張力は十分大きいため、溶融させたAuSnはんだ4が落下する懸念は無い。 By heating the metallic member 3, the AuSn solder 4 deposited on the metallic member 3 is melted. The amount of heat to be applied to the metal member 3 may be sufficient as long as the amount of heat reaches the melting point of the AuSn solder 4 . However, it is necessary to consider the absorption rate of the laser beam 6 on the surface of the metal member 3 and thermal diffusion to areas other than the AuSn solder 4 . Since the surface tension of the AuSn solder 4 is sufficiently large compared to its own weight, there is no concern that the melted AuSn solder 4 will drop.
 次に、図3に示すように、溶融させたAuSnはんだ4を介して金属製部材3をメタライズ層2に当て付ける。金属製部材3をメタライズ層2に当て付けるまでは、AuSnはんだ4が溶融した状態を維持できるように加熱を継続する。金属製部材3をメタライズ層2に当て付けた直後に加熱を停止する。冷却して硬化したAuSnはんだ4によりメタライズ層2と金属製部材3を接合させる。 Next, as shown in FIG. 3, the metal member 3 is brought into contact with the metallized layer 2 with the melted AuSn solder 4 interposed therebetween. Until the metallic member 3 is brought into contact with the metallized layer 2, the heating is continued so that the AuSn solder 4 remains in a molten state. Heating is stopped immediately after the metal member 3 is brought into contact with the metallized layer 2 . The metallized layer 2 and the metallic member 3 are joined by the AuSn solder 4 which is cooled and hardened.
 ここで、AuSnはんだ4の溶融後、加熱を停止するまでの間に、AuSnはんだ4から金属製部材3に熱伝導することにより失われる熱量と、AuSnはんだ4と金属製部材3から空気中に輻射熱として放散される熱量とを補う熱量を時間的に連続して供給し続ける必要がある。加熱停止後は、金属製部材3とAuSnはんだ4が保持していた熱は、その一部が金属製部材3とAuSnはんだ4の表面から空気中に輻射熱として放射されるが、主にメタライズ層2と実装基板1に伝熱する。 Here, after the AuSn solder 4 is melted, until the heating is stopped, the amount of heat lost by heat conduction from the AuSn solder 4 to the metal member 3 and the amount of heat lost from the AuSn solder 4 and the metal member 3 to the air It is necessary to continuously supply the amount of heat to compensate for the amount of heat dissipated as radiant heat. After the heating is stopped, part of the heat retained by the metal member 3 and the AuSn solder 4 is radiated from the surfaces of the metal member 3 and the AuSn solder 4 into the air as radiant heat. 2 and the mounting board 1 .
 続いて、本実施の形態の効果を比較例と比較して説明する。ここで、AuSnはんだ4の組成がAu_Sn20wt%、金属製部材3の材料がNi、実装基板1の材料がAlとする。金属製部材3の実装面が1mm×1mmの正方形、金属製部材3の高さが10mmとする。AuSnはんだ4が実装面全体に厚さ10um程度で均一に蒸着しているものとする。実装基板1の実装面のサイズが5mm×5mm、実装基板1の厚さが0.3mmとする。Cu層2a、Ni層2b、Pd層2c、Au層2dの厚さがそれぞれ30um、5um、0.3um、0.2umとする。 Next, the effects of this embodiment will be described in comparison with a comparative example. Here, the composition of the AuSn solder 4 is Au_Sn 20 wt %, the material of the metal member 3 is Ni, and the material of the mounting board 1 is Al 2 O 3 . Assume that the mounting surface of the metal member 3 is a 1 mm×1 mm square, and the height of the metal member 3 is 10 mm. It is assumed that the AuSn solder 4 is uniformly vapor-deposited to a thickness of about 10 μm over the entire mounting surface. Assume that the size of the mounting surface of the mounting substrate 1 is 5 mm×5 mm, and the thickness of the mounting substrate 1 is 0.3 mm. The thicknesses of the Cu layer 2a, the Ni layer 2b, the Pd layer 2c, and the Au layer 2d are assumed to be 30 μm, 5 μm, 0.3 μm, and 0.2 μm, respectively.
 Au_Sn20wt%の融点は278℃であるため、室温からはんだ融点までAuSnはんだ4の温度を上昇させるには、約0.01JをAuSnはんだ4に伝熱させればよい。実際には、金属製部材3の側面をレーザー加熱して、金属製部材3からAuSnはんだ4まで伝熱させるので、金属製部材3とAuSnはんだ4の双方を278℃まで上昇させるとして約0.1J程度を伝熱させればよい。 Since the melting point of 20 wt% Au_Sn is 278°C, about 0.01 J should be transferred to the AuSn solder 4 in order to increase the temperature of the AuSn solder 4 from room temperature to the solder melting point. Actually, since the side surface of the metal member 3 is laser-heated and heat is transferred from the metal member 3 to the AuSn solder 4, if both the metal member 3 and the AuSn solder 4 are heated to 278° C., the temperature is about 0.5°C. About 1 J of heat should be transferred.
 図4は、比較例に係るはんだ接合方法を示す断面図である。比較例では、実装基板1のメタライズ層2にAuSnはんだ4を成膜する。まず、ヒーター付きのステージ7に実装基板1を載せて、基板全体をはんだ融点以上に加熱する。次に、溶融したAuSnはんだ4に金属製部材3を当て付け、加熱を停止する。この場合、実装基板1をはんだ溶融温度まで加熱するために約7.5J程度が必要である。従って、本実施の形態では、供給する熱量を比較例に比べて75分の1程度にできる。 FIG. 4 is a cross-sectional view showing a soldering method according to a comparative example. In the comparative example, a film of AuSn solder 4 is formed on the metallized layer 2 of the mounting board 1 . First, the mounting substrate 1 is placed on the stage 7 with a heater, and the entire substrate is heated to the melting point of the solder or higher. Next, the metal member 3 is brought into contact with the molten AuSn solder 4, and the heating is stopped. In this case, about 7.5 J is required to heat the mounting board 1 to the solder melting temperature. Therefore, in this embodiment, the amount of heat to be supplied can be reduced to about 1/75 of that in the comparative example.
 以上説明したように、本実施の形態では、金属製部材3の実装面にAuSnはんだ4を成膜し、実装基板1を加熱することなく、金属製部材3を加熱してAuSnはんだ4を溶融させる。このように実装基板1を加熱しないため、実装基板1のメタライズ層2への伝熱量を著しく下げることができる。上記構成例の場合、比較例に比べてメタライズ層2のPd層2cに加わる熱量を75分の1程度にできる。このため、メタライズ層2内でのPd層2cからAu層2dへのPdの拡散を抑制し、はんだ接合後にPd層2cからAuSnはんだ4へのPdの拡散も抑制することができる。従って、AuSnはんだ4とメタライズ層2の界面に金属間化合物又はカーケンダルボイドが形成されるのを防ぐことができる。この結果、AuSnはんだ4とメタライズ層2の界面の剪断強度の低下を防止することができる。 As described above, in the present embodiment, the AuSn solder 4 is formed on the mounting surface of the metal member 3, and the AuSn solder 4 is melted by heating the metal member 3 without heating the mounting substrate 1. Let Since the mounting substrate 1 is not heated in this manner, the amount of heat transferred from the mounting substrate 1 to the metallized layer 2 can be significantly reduced. In the above configuration example, the amount of heat applied to the Pd layer 2c of the metallized layer 2 can be reduced to about 1/75 of that in the comparative example. Therefore, the diffusion of Pd from the Pd layer 2c to the Au layer 2d in the metallized layer 2 can be suppressed, and the diffusion of Pd from the Pd layer 2c to the AuSn solder 4 after soldering can also be suppressed. Therefore, formation of intermetallic compounds or Kirkendall voids at the interface between the AuSn solder 4 and the metallized layer 2 can be prevented. As a result, the shear strength at the interface between the AuSn solder 4 and the metallized layer 2 can be prevented from lowering.
 また、実装基板1を加熱しないため、実装基板1の下面のメタライズ層5でもPd層5cからAu層5dへのPdの拡散を抑制することができる。このため、メタライズ層5に金属間化合物又はカーケンダルボイドが形成されるのを防ぐことができる。従って、実装基板1の上面と下面の両方にメタライズ層2,5がある場合に本実施の形態は更に有効である。 Also, since the mounting board 1 is not heated, the metallized layer 5 on the lower surface of the mounting board 1 can also suppress the diffusion of Pd from the Pd layer 5c to the Au layer 5d. Therefore, formation of intermetallic compounds or Kirkendall voids in the metallized layer 5 can be prevented. Therefore, this embodiment is more effective when the mounting substrate 1 has the metallized layers 2 and 5 on both the upper and lower surfaces.
 また、本実施の形態では、AuSnはんだ4が、Au-Sn20wt%の例を示したが、これに限らずSnの重量比を下げて高融点はんだとしてもよい。高融点はんだを溶融するために必要な熱量は大きい。従って、AuSnはんだ4がAu-Sn20wt%よりもSnの重量比が低い高融点はんだの場合に本実施の形態は更に有効である。 Also, in the present embodiment, an example of AuSn solder 4 of 20 wt % Au--Sn is shown, but the weight ratio of Sn may be lowered to obtain high-melting-point solder. A large amount of heat is required to melt the high melting point solder. Therefore, this embodiment is more effective when the AuSn solder 4 is a high-melting-point solder in which the weight ratio of Sn is lower than that of Au--Sn 20 wt %.
 また、本実施の形態では、金属製部材3が1個の例を示したが、通常は1つの基板に複数の部品をはんだ実装する。実装部品数が多くなればなるほど、同じ基板上の部品の加熱時間は長くなる。従って、金属製部材3が互いに分離した複数の部材からなる場合に本実施の形態は更に有効である。 Also, in the present embodiment, an example of one metal member 3 is shown, but normally a plurality of components are solder-mounted on one substrate. As the number of mounted components increases, the heating time of the components on the same board increases. Therefore, this embodiment is more effective when the metal member 3 is composed of a plurality of members separated from each other.
1 実装基板、2,5 メタライズ層、2c,5c Pd層、3 金属製部材、4 AuSnはんだ、6 レーザー光 1 Mounting board, 2, 5 Metallized layer, 2c, 5c Pd layer, 3 Metal member, 4 AuSn solder, 6 Laser light

Claims (5)

  1.  Pd層を含むメタライズ層を有する実装基板と、金属製部材とをAuSnはんだにより接合させる方法であって、
     前記金属製部材の実装面に前記AuSnはんだを成膜する工程と、
     前記実装基板を加熱することなく前記金属製部材を加熱することで、前記金属製部材に成膜された前記AuSnはんだを溶融させる工程と、
     溶融させた前記AuSnはんだを介して前記金属製部材を前記メタライズ層に当て付け、前記AuSnはんだにより前記メタライズ層と前記金属製部材を接合させる工程とを備えることを特徴とするはんだ接合方法。
    A method of joining a mounting substrate having a metallized layer containing a Pd layer and a metal member with AuSn solder,
    a step of forming a film of the AuSn solder on the mounting surface of the metal member;
    a step of melting the AuSn solder deposited on the metal member by heating the metal member without heating the mounting substrate;
    A soldering method, comprising: a step of applying the metal member to the metallized layer through the melted AuSn solder, and joining the metallized layer and the metal member with the AuSn solder.
  2.  前記金属製部材をレーザー光により加熱することを特徴とする請求項1に記載のはんだ接合方法。 The soldering method according to claim 1, wherein the metal members are heated by laser light.
  3.  前記実装基板の上面と下面の両方に前記メタライズ層があることを特徴とする請求項1又は2に記載のはんだ接合方法。  The soldering method according to claim 1 or 2, wherein the metallized layer is provided on both the top surface and the bottom surface of the mounting substrate.
  4.  前記AuSnはんだは、Au-Sn20wt%よりもSnの重量比が低い高融点はんだであることを特徴とする請求項1~3の何れか1項に記載のはんだ接合方法。 The solder bonding method according to any one of claims 1 to 3, wherein the AuSn solder is a high-melting-point solder having a Sn weight ratio lower than that of Au-Sn 20 wt%.
  5.  前記金属製部材は互いに分離した複数の部材を有することを特徴とする請求項1~4の何れか1項に記載のはんだ接合方法。 The soldering method according to any one of claims 1 to 4, wherein the metal member has a plurality of members separated from each other.
PCT/JP2021/035653 2021-09-28 2021-09-28 Solder joining method WO2023053208A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151035A (en) * 1992-09-21 1994-05-31 Matsushita Electric Works Ltd Joining of lead terminal to circuit subtrate
JPH0964596A (en) * 1995-08-28 1997-03-07 Matsushita Electric Works Ltd Circuit board mounting electronic device and manufacture thereof
JP2011119560A (en) * 2009-12-07 2011-06-16 Yamaha Motor Co Ltd Method of manufacturing printed circuit board
WO2016190205A1 (en) * 2015-05-26 2016-12-01 三菱電機株式会社 Semiconductor device, method for manufacturing semiconductor device, and joining material
JP2019145617A (en) * 2018-02-19 2019-08-29 Jisso株式会社 Solder joining method, solder melting method, joining method, and solder joining apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151035A (en) * 1992-09-21 1994-05-31 Matsushita Electric Works Ltd Joining of lead terminal to circuit subtrate
JPH0964596A (en) * 1995-08-28 1997-03-07 Matsushita Electric Works Ltd Circuit board mounting electronic device and manufacture thereof
JP2011119560A (en) * 2009-12-07 2011-06-16 Yamaha Motor Co Ltd Method of manufacturing printed circuit board
WO2016190205A1 (en) * 2015-05-26 2016-12-01 三菱電機株式会社 Semiconductor device, method for manufacturing semiconductor device, and joining material
JP2019145617A (en) * 2018-02-19 2019-08-29 Jisso株式会社 Solder joining method, solder melting method, joining method, and solder joining apparatus

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