WO2023050863A1 - 一种驱动信号生成方法、装置、设备及可读存储介质 - Google Patents

一种驱动信号生成方法、装置、设备及可读存储介质 Download PDF

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Publication number
WO2023050863A1
WO2023050863A1 PCT/CN2022/097618 CN2022097618W WO2023050863A1 WO 2023050863 A1 WO2023050863 A1 WO 2023050863A1 CN 2022097618 W CN2022097618 W CN 2022097618W WO 2023050863 A1 WO2023050863 A1 WO 2023050863A1
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Prior art keywords
state
signal
jump
programmable
fixed
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PCT/CN2022/097618
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English (en)
French (fr)
Inventor
陆震熙
黄运新
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深圳大普微电子科技有限公司
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Publication of WO2023050863A1 publication Critical patent/WO2023050863A1/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Definitions

  • the present application relates to the field of computer technology, and in particular to a method, device, device and readable storage medium for generating a driving signal.
  • the hard disk controller After the hard disk controller receives the read and write operations sent by the host, it will generate a driving signal corresponding to the current operation based on several states of the state machine and send it to the NAND PHY, and then the NAND PHY will operate the NAND Flash of the hard disk according to the driving signal. , to complete the process.
  • the connection relationship between the hard disk controller, NAND PHY and NAND Flash can be seen in Figure 1.
  • the hard disk controller uses several states with fixed jump relationships to generate drive signals, resulting in a lack of flexibility in the signals.
  • states there are 5 states: IDLE, PRE_CTRL, CTRL_CYC, POS_CTRL, and the end state, and the jump relationship of these 5 states is IDLE---PRE_CTRL---CTRL_CYC---POS_CTRL---end state, then the actual driving process can be as follows: in IDLE, the send address request is detected, then enter PRE_CTRL to generate a fixed signal in this state, then enter CTRL_CYC to generate a fixed signal in this state, then enter POS_CTRL state, POS_CTRL state, and finally Enter the end state to complete the entire process. It can be seen that in each state, the generated signal is constant, the number of states involved in the whole process is constant, and the jump relationship between different states is also constant.
  • the existing solution can only generate fixed driving signals. If the NAND particles of the hard disk change, or the flow of a certain operation needs to be changed, the current state flow will not be able to meet the change, and the state and its jump relationship need to be redesigned.
  • the purpose of this application is to provide a driving signal generation method, device, equipment and readable storage medium to flexibly generate driving signals sent to NAND PHY.
  • the specific plan is as follows:
  • the present application provides a driving signal generation method, including:
  • control state machine enters the initial state, and determines the next state to be jumped to based on the initial jump table in the initial state;
  • next state is any programmable state, jump to the programmable state and start timing.
  • the signal driving table in the programmable state generates the operation instruction in the programmable state.
  • the drive signal in the programming state if the timing ends, then determine the next state to be jumped to based on the programmable jump table in the programmable state;
  • next state is any fixed state other than the end state, jump to the fixed state, and generate the driving signal of the operation instruction in the fixed state based on the fixed signal configuration in the fixed state , determining the next state to be jumped to based on the fixed jump configuration in the fixed state;
  • next state is a fixed state of the end state, the process ends.
  • the determining the next state to be jumped to based on the initial jump table in the initial state includes:
  • generating the driving signal of the operation instruction in the programmable state based on the signal driving table in the programmable state during the timing process includes:
  • the signal driving table is queried during the timing process to determine the driving signal that needs to be generated at each preset time point in the timing process; at least one preset time point is recorded in the signal driving table, and each preset time Points need to generate at least one signal.
  • the determining the next state to be jumped to based on the programmable jump table in the programmable state includes:
  • it also includes:
  • the initial jump table or the programmable jump table is used as an updateable table
  • the update process of the updateable table includes:
  • An operation instruction and a corresponding name of the next state are added in the updatable table.
  • updating the signal driving table includes:
  • a preset time point and at least one corresponding signal are newly added in the signal driving table.
  • the present application provides a drive signal generating device, including
  • the initial state module is used to control the state machine to enter the initial state if an operation instruction is received, and determine the next state to be jumped to based on the initial jump table in the initial state;
  • the programmable state module is used to jump to the programmable state and start timing if the next state is any programmable state.
  • the signal driving table in the programmable state is used to generate the The driving signal of the operation instruction in the programmable state, if the timing ends, then determine the next state to be jumped to based on the programmable jump table in the programmable state;
  • the fixed state module is used to jump to the fixed state if the next state is any fixed state other than the end state, and generate the operation instruction in the fixed state based on the fixed signal configuration in the fixed state. After the driving signal in the state, determine the next state to be jumped to based on the fixed jump configuration in the fixed state;
  • An end module configured to end the process if the next state is a fixed state of the end state.
  • the present application provides an electronic device, including:
  • a processor configured to execute the computer program, so as to realize the driving signal generating method disclosed above.
  • the present application provides a readable storage medium for storing a computer program, wherein when the computer program is executed by a processor, the method for generating a driving signal disclosed above is realized.
  • the present application provides a driving signal generation method, including: if an operation instruction is received, the control state machine enters the initial state, and based on the initial jump table in the initial state, determines the Next state; if the next state is any programmable state, jump to the programmable state and start timing, and generate the operation instruction based on the signal drive table in the programmable state during timing
  • the driving signal in the programmable state if the timing ends, then determine the next state that needs to be jumped to based on the programmable jump table in the programmable state; if the next state is a non-end state In any fixed state, jump to the fixed state, generate the driving signal of the operation instruction in the fixed state based on the fixed signal configuration in the fixed state, and then jump based on the fixed state in the fixed state
  • the configuration determines the next state to be jumped to; if the next state is a fixed state of the end state, the process ends.
  • the application provides an initial state, at least one programmable state, at least one fixed state that is not an end state, and a fixed state that is an end state. Specifically, if the state machine is controlled to enter the initial state based on the operation instruction, the next state to be jumped to can be determined based on the initial jump table in the initial state. At this time, the next state can be a programmable state, a non-end state The pinned state of or the pinned state of the end state. If the next state is a certain programmable state, then jump to the programmable state and start timing. During the timing process, the driving signal of the operation command in the programmable state is generated based on the signal driving table in the programmable state.
  • the next state to be jumped to is determined based on the programmable jump table in the programmable state.
  • the next state can be a programmable state, a fixed state that is not an end state, or a fixed state that is an end state. If the next state is a fixed state other than the end state, then jump to the fixed state, generate the driving signal of the operation command in the fixed state based on the fixed signal configuration in the fixed state, and then configure the jump based on the fixed state in the fixed state Determine the next state to jump to; in this case, the next state can be a programmable state, a fixed state that is not a final state, or a fixed state that is a final state. When the next state is a fixed state of the end state, the process ends.
  • the state machine can jump from the initial state to a programmable state, a fixed state that is not an end state, or a fixed state that is an end state, and it can also jump from a programmable state to other programmable states, a non-end state
  • the fixed state of the fixed state or the fixed state of the end state, from the fixed state of the non-end state can also jump to the programmable state, other fixed states of the non-end state or the fixed state of the end state. It can be seen that the jump relationship between different states is not fixed, but changes in time.
  • the next state to be jumped to can be determined based on the initial jump table; for the programmable state, the next state to be jumped to can be determined based on the programmable jump table; and for non-end
  • the next state to be jumped to can be determined based on the fixed jump configuration set in it; the fixed state of the last end state is used to mark the end of the process.
  • the programmable state can generate a corresponding driving signal based on the signal driving table, and the generated signal can be flexibly transformed based on the signal driving table, so the flexibility of the signal can be improved.
  • the jump relationship between different states changes in time, the number of states involved in the process is variable, and the signal that can be generated in a certain state is variable, so if the NAND particles of the hard disk change, or a certain
  • the operation process needs to be changed, and the change can be realized by adjusting the signal drive table and jump table in the relevant state.
  • the solution has good versatility .
  • the drive signal generating device, device and readable storage medium provided by the present application also have the above technical effects.
  • Fig. 1 is the connection schematic diagram between a kind of hard disk controller disclosed by the application, NAND PHY and NAND Flash;
  • FIG. 2 is a schematic diagram of an existing state machine disclosed in the present application.
  • FIG. 3 is a flow chart of a method for generating a driving signal disclosed in the present application.
  • FIG. 4 is a schematic diagram of a state machine disclosed in the present application.
  • FIG. 5 is a schematic diagram of an initial jump table disclosed in the present application.
  • FIG. 6 is a schematic diagram of a signal driving table disclosed in the present application.
  • FIG. 7 is a schematic diagram of another signal driving table disclosed in the present application.
  • Fig. 8 is a schematic diagram of a signal connection between a hard disk controller and a NAND PHY disclosed in the present application;
  • FIG. 9 is a schematic diagram of the relationship between a NAND PHY driving signal disclosed in the present application and a NAND particle driving signal;
  • FIG. 10 is a schematic diagram of a state machine jump relationship disclosed in the present application.
  • FIG. 11 is a schematic diagram of a driving signal generation device disclosed in the present application.
  • FIG. 12 is a schematic diagram of an electronic device disclosed in the present application.
  • the existing solutions can only generate fixed driving signals. If the NAND particles of the hard disk change, or the process of a certain operation needs to be changed, the current state flow will not be able to meet the change, and the state and its jump relationship need to be redesigned.
  • the present application provides a driving signal generation scheme, which can flexibly generate driving signals sent to the NAND PHY.
  • the embodiment of the present application discloses a method for generating a driving signal, which is applied to a hard disk controller, including:
  • next state is any programmable state, jump to the programmable state and start timing.
  • the driving signal of the operation instruction in the programmable state is generated based on the signal driving table in the programmable state. If When the timing is over, the next state to be jumped to is determined based on the programmable jump table in the programmable state.
  • next state is any fixed state other than the end state
  • jump to the fixed state and after generating the driving signal of the operation instruction in the fixed state based on the fixed signal configuration in the fixed state, jump based on the fixed state in the fixed state
  • the transition configuration determines the next state to jump to.
  • the above steps are not executed sequentially, but are executed based on corresponding conditions.
  • the state machine it is possible to jump from the initial state to a programmable state, a fixed state that is not an end state, or a fixed state that is an end state. It is also possible to jump from a programmable state to another programmable state, a fixed state that is not a final state, or a fixed state that is a final state. It is also possible to jump from a fixed state that is not a final state to a programmable state, to another fixed state that is not a final state, or to a fixed state that is a final state.
  • the initial state determines the head of the jump relationship
  • the fixed state of the end state determines the tail of the jump relationship.
  • this embodiment does not limit it. Various situations are possible under the corresponding conditions. Therefore, the jump relationship between different states is not fixed, but changes in time.
  • the next state to be jumped to can be determined based on the initial jump table; for the programmable state, the next state to be jumped to can be determined based on the programmable jump table; and for non-end
  • the fixed state of the state the next state to be jumped to can be determined based on the fixed jump configuration set in it; the fixed state of the last end state is used to mark the end of the process.
  • FIG. 4 Various states involved in this embodiment can be referred to FIG. 4 .
  • the state machine shown in Figure 4 there is an initial state, n fixed states (including 1 fixed state of the end state and n-1 fixed states of the non-end state), and n programmable states.
  • For the initial state there is an initial jump table, and based on the initial jump table, it can be determined where to jump from the initial state.
  • the dotted arrows in Figure 4 point to the possible destination states from the initial state.
  • the programmable state there is a programmable jump table and a signal driving table. Based on the programmable jump table, it can be determined where to jump from the current programmable state, and based on the signal driving table, it can be determined which signals are generated.
  • For a fixed state that is not an end state its next hop and currently generated signals are fixedly configured.
  • Each fixed state is mainly used to implement specific operations, such as DMA read and write. Fixed state enables efficient implementation of specific operations.
  • jumping from the initial state to a certain programmable state can also jump to a certain fixed state, and how to jump depends on the corresponding records in the initial jump table.
  • n-1 non-end state fixed states can also jump to each other, which depends on the fixed jump configuration in the non-end state fixed state.
  • N programmable states can also jump to each other, which depends on the programmable jump table in the programmable state. Jumping from a non-final fixed state to a certain programmable state also depends on the fixed jump configuration in the non-final fixed state. Jumping from a programmable state to a fixed state also depends on the programmable jump table in the programmable state.
  • the fixed state of the non-end state Since the fixed state of the non-end state generates the driving signal based on the fixed signal configuration, it can be designed with reference to the existing scheme, that is, which signals are generated in which fixed state is fixed.
  • the programmable state flexibly generates signals based on the signal driving table, for details, refer to the related introduction of the following embodiments.
  • the jump relationship between different states in the state machine changes in time, the number of states involved in the process is variable, and the signal that can be generated in a certain state is variable, so if the NAND of the hard disk If the particle changes, or the process of a certain operation needs to be changed, the change can be realized by adjusting the signal drive table and jump table in the relevant state. There is no need to redesign the state and jump process, and the drive signal sent to the NAND PHY can be flexibly generated.
  • the scheme has good versatility.
  • determining the next state to be jumped to based on the initial jump table in the initial state includes: querying the corresponding state of the operation instruction in the initial jump table The name of the next state.
  • each jump judgment condition includes: a check value (check value) and the name of the destination state (Dst_state).
  • the name of the destination state is: the name of the next state that needs to be jumped from the initial state.
  • determining the next state to be jumped to based on the programmable jump table in the programmable state includes: querying the operation instruction in the programmable jump table The name of the corresponding next state in .
  • the programmable jump table in the programmable state is similar to the initial jump table, which also records a plurality of jump judgment conditions, each jump judgment condition includes: the detection value (check value) and the name of the destination state (Dst_state ).
  • the name of the destination state is: the name of the next state that needs to be jumped from the current programmable state.
  • the driving signal of the operation instruction in the programmable state is generated based on the signal driving table in the programmable state, including: querying during the timing process
  • the signal driving table is used to determine the driving signal to be generated at each preset time point in the timing process; at least one preset time point and at least one signal to be generated at each preset time point are recorded in the signal driving table.
  • the signal driving table in any programmable state records the signals that can be generated at corresponding preset time points according to each preset time point. Each time point is determined based on a timer. It can be seen that entering the programmable state to start timing is mainly to determine the time point and when to jump to the next state. Of course, each state can have a signal generation time limit. For example: currently enter a certain state, set to jump to the next state after 10 seconds, then the signal generation time limit of the current state is 10 seconds.
  • TT0 whose time point (Timer_point) is 10'h3 (hexadecimal number)
  • wrdata_en is the name of the signal where the signal is located. That is: at TT0, set dfi_wrdata_en on the NAND PHY side to 1 to drive the dfi_wrdata signal.
  • the CLE signal at the NAND PHY end is set to 0, and dfi_wrdata_en and dfi_wrdata remain unchanged.
  • dfi_wrdata_en on the NAND PHY side is set to 0.
  • time point TT0-TT3 corresponds to depends on how much Timer_point is equal to; and what value is taken for which signals at any time point depends on the corresponding records in the signal driver table.
  • Figure 6 only shows the assignment of NAND PHY interface signals. So the first column of the table records: TT_TYPE2'b01. "TT_TYPE2'b01" is used to indicate that the signal generated at a certain point in time is used to drive the NAND PHY interface signal. NAND PHY interface signals such as: CLE, ALE, WE, etc.
  • the internal signal of the hard disk controller can also be recorded in the signal driver table.
  • the first column of the table records: TT_TYPE2'b10.
  • TT_TYPE2'b10 is used to indicate that the signal generated at a certain time point belongs to the hard disk controller.
  • the driven signals are internal signals such as ps_time and rd_deskew_req.
  • the signal connection between the hard disk controller (NAND controller) and NAND PHY can be seen in Figure 8.
  • clk is a clock signal
  • dfi_cebar, dfi_cle, dfi_ale, dfi_rebar, and dfi_webar are control signals
  • dfi_wrdata_en, dfi_wrdata are write data signals
  • dfi_rddata_en, dfi_rddata_valid, dfi_rddata are read data signals.
  • the signals in Fig. 8 are not all signals, but only to show the connection relationship.
  • the signal between NAND PHY and NAND IO is an IO signal (such as cebar_opad).
  • the signal between NAND IO and NAND is the signal line between the actual and Flash particles (such as cebar, cle, etc.). It can be seen that the timing signal of the NAND PHY driven by the hard disk controller will eventually drive the NAND particles. This is: the hard disk controller sends the driving signal to the NAND PHY, and then the NAND PHY operates the NAND Flash of the hard disk according to the driving signal.
  • Figure 9 If the hard disk controller generates the drive signal shown in Figure 9 (each signal in the bold line frame in the upper part of Figure 9), there will be a corresponding signal sent by NAND IO to the NAND particles ( Figure 9 individual signals in the lower half of the wireframe). Among them, since the signal driving the NAND particles needs to meet the requirements of the ONFI protocol and the requirements of the NAND particles, the driving signal generated by the hard disk controller must also meet certain requirements.
  • the signal driving table Since the number of preset time points recorded in the signal driving table can be adjusted, the signal to be generated at each preset time point can also be adjusted. Of course, the jump judgment conditions in the initial jump table and the programmable jump table can also be adjusted. In a word, the signal driving table, the initial jump table and the programmable jump table can all be updated artificially and timely according to needs.
  • the process of updating the initial jump table and the programmable jump table may include: if an update instruction for the initial jump table and/or signal-driven table and/or programmable jump table is received, then update the initial jump table based on the update instruction tables and/or signal-driven tables and/or programmable jump tables.
  • the initial jump table or the programmable jump table is used as an updateable table
  • the update process of the updateable table includes: the operation instructions recorded in the updateable table, or the corresponding next state and/or delete the operation instruction recorded in the updatable table and the name of the corresponding next state; and/or add an operation instruction and the name of the corresponding next state in the updatable table.
  • updating the signal driving table includes: modifying the preset time points recorded in the signal driving table, or at least one corresponding signal; and/or deleting the preset time points recorded in the signal driving table, and at least one corresponding signal; and/or adding a preset time point and at least one corresponding signal in the signal driving table.
  • the following embodiment provides an example of a state transition relationship of a state machine.
  • the jump relationship shown in Figure 10 it involves an initial state, 3 fixed states: DMA_Write state, DMA_Read state and end state, and 3 programmable states: PS_x state, PS_y state and PS_z state.
  • the hard disk controller When the hard disk controller receives a command, it uses the "init jump judgment condition n" in the initial state jump table to detect whether the current command is DMA write, and uses the “init jump judgment condition m” in the initial jump table to detect whether the current command is DMA write. Whether the command is DMA read, use the "init jump judgment condition x" in the initial jump table to detect whether the current command jumps to the PS_x state, and use the "init jump judgment condition y" in the initial jump table to detect whether the current command jumps to PS_y state.
  • check value (such as x, y, z, w, etc.) in the above jump judgment conditions has no absolute relationship, and can be any check value that is allowed to be set.
  • the configurable jump judgment conditions can flexibly realize the setting of the jump relationship between states, and any PHY terminal can be generated based on the driving signal table in the programmable state
  • the timing of the driving signal can also be flexibly adjusted, so as to adapt to different timing requirements of the NAND particles.
  • a device for generating a driving signal provided in an embodiment of the present application is introduced below.
  • the device for generating a driving signal described below and the method for generating a driving signal described above may refer to each other.
  • the embodiment of the present application discloses a driving signal generation device, including
  • the initial state module 1101 is used to control the state machine to enter the initial state if an operation instruction is received, and determine the next state to be jumped to based on the initial jump table in the initial state;
  • the programmable state module 1102 is used to jump to the programmable state and start timing if the next state is any programmable state.
  • the signal drive table in the programmable state generates an operation instruction in the programmable state
  • the drive signal in if the timing ends, the next state to be jumped to is determined based on the programmable jump table in the programmable state;
  • the fixed state module 1103 is used to jump to the fixed state if the next state is any fixed state other than the end state, and after generating the driving signal of the operation command in the fixed state based on the fixed signal configuration in the fixed state, based on the fixed state
  • the fixed jump configuration in the state determines the next state to jump to;
  • the end module 1104 is configured to end the process if the next state is a fixed state of the end state.
  • the initial state module is specifically used for:
  • the programmable state module is specifically used for:
  • the signal driving table during the timing process to determine the driving signal that needs to be generated at each preset time point in the timing process; at least one preset time point is recorded in the signal driving table, and the signal that needs to be generated at each preset time point at least one signal.
  • the programmable state module is specifically used for:
  • it also includes:
  • the update module is used to update the initial jump table and/or signal drive table and/or programmable jump table.
  • the update module uses the initial jump table or the programmable jump table as an updateable table, and the update process of the updateable table includes: the operation instruction recorded in the updateable table, or the corresponding next Modify the name of the state; and/or delete the operation instruction recorded in the updatable table and the name of the corresponding next state; and/or add an operation instruction and the name of the corresponding next state in the updatable table.
  • updating the signal driving table by the updating module includes: modifying the preset time point recorded in the signal driving table, or at least one corresponding signal; and/or deleting the preset time recorded in the signal driving table point, and at least one corresponding signal; and/or add a preset time point and at least one corresponding signal in the signal driving table.
  • this embodiment provides a driving signal generation device.
  • the jump relationship between different states changes in time, the number of states involved in the process is variable, and the signal that can be generated in a certain state Variable, so if the NAND particles of the hard disk change, or the process of a certain operation needs to be changed, the change can be realized by adjusting the signal drive table and jump table in the relevant state, without redesigning each state and jump process, and can be flexible Generate drive signals to NAND PHY.
  • An electronic device provided by an embodiment of the present application is introduced below, and the electronic device described below and the method and device for generating a driving signal described above may refer to each other.
  • an electronic device including:
  • Memory 1201 used to store computer programs
  • the processor 1202 is configured to execute the computer program, so as to implement the method disclosed in any of the above embodiments.
  • a readable storage medium provided by an embodiment of the present application is introduced below, and the readable storage medium described below and the driving signal generating method, device, and device described above may refer to each other.
  • a readable storage medium is used to store a computer program, wherein when the computer program is executed by a processor, the method for generating a driving signal disclosed in the foregoing embodiments is implemented. Regarding the specific steps of the method, reference may be made to the corresponding content disclosed in the foregoing embodiments, and details are not repeated here.
  • RAM random access memory
  • ROM read-only memory
  • EEPROM electrically programmable ROM
  • EEPROM electrically erasable programmable ROM
  • registers hard disk, removable disk, CD-ROM, or any other Any other known readable storage medium.

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Abstract

一种驱动信号生成方法、装置、设备及可读存储介质。在本申请中，状态机中不同状态之间的跳转关系适时变化，流程中涉及的状态的个数可变，且某一状态下可生成的信号可变，因此若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，调整相关状态下的信号驱动表、跳转表即可实现改动，无需重新设计各个状态和跳转流程，能够灵活产生发给NANDPHY的驱动信号。相应地，本申请提供的一种驱动信号生成装置、设备及可读存储介质，也同样具有上述技术效果。

Description

一种驱动信号生成方法、装置、设备及可读存储介质
本申请要求于2021年09月29日提交至中国专利局、申请号为202111155665.6、发明名称为“一种驱动信号生成方法、装置、设备及可读存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及计算机技术领域，特别涉及一种驱动信号生成方法、装置、设备及可读存储介质。
背景技术
目前，硬盘控制器在接收到主机发送的读写等操作后，会基于状态机的几个状态产生与当前操作对应的驱动信号发给NAND PHY，然后NAND PHY据此驱动信号操作硬盘的NAND Flash，以完成操作流程。硬盘控制器、NAND PHY与NAND Flash之间的连接关系可参见图1。
其中，硬盘控制器采用跳转关系固定的几个状态产生驱动信号，导致信号缺乏灵活性。如图2所示，设有5个状态：IDLE、PRE_CTRL、CTRL_CYC、POS_CTRL、结束状态，且这5个状态的跳转关系为IDLE---PRE_CTRL---CTRL_CYC---POS_CTRL---结束状态，那么实际驱动流程可以为：在IDLE中检测到发送地址请求，之后进入PRE_CTRL产生该状态下的固定信号，之后进入CTRL_CYC产生该状态下的固定信号，之后依次进入POS_CTRL状态、POS_CTRL状态，最后进入结束状态，完成整个流程。可见，在每个状态下，所产生的信号固定不变，整个流程中涉及的状态的个数固定不变，不同状态之间的跳转关系也固定不变。
因此现有方案仅能产生固定的驱动信号，若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，当前状态流转将无法满足该变化，需要重新设计状态及其跳转关系。
因此，如何灵活产生发给NAND PHY的驱动信号，是本领域技术人员需要解决的问题。
发明内容
有鉴于此，本申请的目的在于提供一种驱动信号生成方法、装置、设备及可读存储介质，以灵活产生发给NAND PHY的驱动信号。其具体方案如下：
第一方面，本申请提供了一种驱动信号生成方法，包括：
若接收到操作指令，则控制状态机进入初始状态，并基于所述初始状态中的初始跳转表确定需要跳转到的下一状态；
若所述下一状态为任一可编程状态，则跳转至所述可编程状态并开始计时，在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，若计时结束，则基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态；
若所述下一状态为非结束状态的任一固定状态，则跳转至所述固定状态，基于所述固定状态中的固定信号配置生成所述操作指令在所述固定状态中的驱动信号后，基于所述固定状态中的固定跳转配置确定需要跳转到的下一状态；
若所述下一状态为结束状态的固定状态，则流程结束。
优选地，所述基于所述初始状态中的初始跳转表确定需要跳转到的下一状态，包括：
查询所述操作指令在所述初始跳转表中对应的下一状态的名称。
优选地，所述在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，包括：
在计时过程中查询所述信号驱动表，以确定计时过程中的每一预设时间点需要生成的驱动信号；所述信号驱动表中记录有至少一个预设时间点，以及每个预设时间点需要生成的至少一个信号。
优选地，所述基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态，包括：
查询所述操作指令在所述可编程跳转表中对应的下一状态的名称。
优选地，还包括：
若接收到所述初始跳转表和/或所述信号驱动表和/或所述可编程跳转表的更新指令，则基于所述更新指令更新所述初始跳转表和/或所述信号驱 动表和/或所述可编程跳转表。
优选地，将所述初始跳转表或所述可编程跳转表作为可更新表，对所述可更新表的更新过程包括：
对所述可更新表中记录的操作指令、或对应的下一状态的名称进行修改；
和/或
删除所述可更新表中记录的操作指令、以及对应的下一状态的名称；
和/或
在所述可更新表中新增操作指令、以及对应的下一状态的名称。
优选地，更新所述信号驱动表包括：
对所述信号驱动表中记录的预设时间点、或对应的至少一个信号进行修改；
和/或
删除所述信号驱动表中记录的预设时间点、以及对应的至少一个信号；
和/或
在所述信号驱动表中新增预设时间点、以及对应的至少一个信号。
第二方面，本申请提供了一种驱动信号生成装置，包括
初始状态模块，用于若接收到操作指令，则控制状态机进入初始状态，并基于所述初始状态中的初始跳转表确定需要跳转到的下一状态；
可编程状态模块，用于若所述下一状态为任一可编程状态，则跳转至所述可编程状态并开始计时，在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，若计时结束，则基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态；
固定状态模块，用于若所述下一状态为非结束状态的任一固定状态，则跳转至所述固定状态，基于所述固定状态中的固定信号配置生成所述操作指令在所述固定状态中的驱动信号后，基于所述固定状态中的固定跳转配置确定需要跳转到的下一状态；
结束模块，用于若所述下一状态为结束状态的固定状态，则流程结束。
第三方面，本申请提供了一种电子设备，包括：
存储器，用于存储计算机程序；
处理器，用于执行所述计算机程序，以实现前述公开的驱动信号生成方法。
第四方面，本申请提供了一种可读存储介质，用于保存计算机程序，其中，所述计算机程序被处理器执行时实现前述公开的驱动信号生成方法。
通过以上方案可知，本申请提供了一种驱动信号生成方法，包括：若接收到操作指令，则控制状态机进入初始状态，并基于所述初始状态中的初始跳转表确定需要跳转到的下一状态；若所述下一状态为任一可编程状态，则跳转至所述可编程状态并开始计时，在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，若计时结束，则基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态；若所述下一状态为非结束状态的任一固定状态，则跳转至所述固定状态，基于所述固定状态中的固定信号配置生成所述操作指令在所述固定状态中的驱动信号后，基于所述固定状态中的固定跳转配置确定需要跳转到的下一状态；若所述下一状态为结束状态的固定状态，则流程结束。
本申请提供了初始状态、至少一个可编程状态、至少一个非结束状态的固定状态和结束状态的固定状态。具体的，若基于操作指令控制状态机进入初始状态，那么可以基于初始状态中的初始跳转表确定需要跳转到的下一状态，此时，下一状态可以是可编程状态、非结束状态的固定状态或结束状态的固定状态。若下一状态是某一个可编程状态，那么跳转至该可编程状态并开始计时，在计时过程中基于可编程状态中的信号驱动表生成操作指令在可编程状态中的驱动信号，若计时结束，则基于可编程状态中的可编程跳转表确定需要跳转到的下一状态，此时，下一状态可以是可编程状态、非结束状态的固定状态或结束状态的固定状态。若下一状态是非结束状态的某一个固定状态，则跳转至该固定状态，基于固定状态中的固定信号配置生成操作指令在固定状态中的驱动信号后，基于固定状态中的固定跳转配置确定需要跳转到的下一状态；此时，下一状态可以是可编程状态、非结束状态的固定状态或结束状态的固定状态。当下一状态为结束状态的固定状态，则流程结束。
可见，在该方案中，状态机从初始状态可以跳转至可编程状态、非结束状态的固定状态或结束状态的固定状态，从可编程状态也可以跳转至其 他可编程状态、非结束状态的固定状态或结束状态的固定状态，从非结束状态的固定状态也可以跳转至可编程状态、其他非结束状态的固定状态或结束状态的固定状态。可见不同状态之间的跳转关系并非固定不变，而是适时变化。对于初始状态而言，基于初始跳转表可以确定需要跳转到的下一状态；对于可编程状态而言，基于可编程跳转表可以确定需要跳转到的下一状态；而对于非结束状态的固定状态而言，基于其中设置的固定跳转配置可以确定需要跳转到的下一状态；最后的结束状态的固定状态用于标记流程结束。并且，可编程状态可以基于信号驱动表生成相应的驱动信号，所产生的信号可以基于信号驱动表灵活变换，因此可以提升信号的灵活性。在本申请中，不同状态之间的跳转关系适时变化，流程中涉及的状态的个数可变，且某一状态下可生成的信号可变，因此若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，调整相关状态下的信号驱动表、跳转表即可实现改动，无需重新设计状态和跳转流程，能够灵活产生发给NAND PHY的驱动信号，方案具有良好的通用性。
相应地，本申请提供的一种驱动信号生成装置、设备及可读存储介质，也同样具有上述技术效果。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图。
图1为本申请公开的一种硬盘控制器、NAND PHY与NAND Flash之间的连接示意图；
图2为本申请公开的一种现有状态机示意图；
图3为本申请公开的一种驱动信号生成方法流程图；
图4为本申请公开的一种状态机示意图；
图5为本申请公开的一种初始跳转表示意图；
图6为本申请公开的一种信号驱动表示意图；
图7为本申请公开的另一种信号驱动表示意图；
图8为本申请公开的一种硬盘控制器与NAND PHY之间的信号连接示意图；
图9为本申请公开的一种NAND PHY驱动信号与NAND颗粒驱动信号的关系示意图；
图10为本申请公开的一种状态机跳转关系示意图；
图11为本申请公开的一种驱动信号生成装置示意图；
图12为本申请公开的一种电子设备示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
目前，现有方案仅能产生固定的驱动信号，若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，当前状态流转将无法满足该变化，需要重新设计状态及其跳转关系。为此，本申请提供了一种驱动信号生成方案，能够灵活产生发给NAND PHY的驱动信号。
参见图3所示，本申请实施例公开了一种驱动信号生成方法，应用于硬盘控制器，包括：
S301、若接收到操作指令，则控制状态机进入初始状态，并基于初始状态中的初始跳转表确定需要跳转到的下一状态。
S302、若下一状态为任一可编程状态，则跳转至可编程状态并开始计时，在计时过程中基于可编程状态中的信号驱动表生成操作指令在可编程状态中的驱动信号，若计时结束，则基于可编程状态中的可编程跳转表确定需要跳转到的下一状态。
S303、若下一状态为非结束状态的任一固定状态，则跳转至固定状态，基于固定状态中的固定信号配置生成操作指令在固定状态中的驱动信号后，基于固定状态中的固定跳转配置确定需要跳转到的下一状态。
S304、若下一状态为结束状态的固定状态，则流程结束。
参见图3所示，上述步骤并非顺序执行，而是基于相应条件执行。在本实施例提供的状态机中，从初始状态可以跳转至可编程状态、非结束状态的固定状态或结束状态的固定状态。从可编程状态也可以跳转至其他可编程状态、非结束状态的固定状态或结束状态的固定状态。从非结束状态的固定状态也可以跳转至可编程状态、其他非结束状态的固定状态或结束状态的固定状态。
可见，初始状态确定了跳转关系的头，而结束状态的固定状态确定了跳转关系的尾，至于二者之间涉及几个状态、具体如何跳转，本实施例都不限定，在满足相应条件时，各种情况都有可能发生。因此不同状态之间的跳转关系并非固定不变，而是适时变化。对于初始状态而言，基于初始跳转表可以确定需要跳转到的下一状态；对于可编程状态而言，基于可编程跳转表可以确定需要跳转到的下一状态；而对于非结束状态的固定状态而言，基于其中设置的固定跳转配置可以确定需要跳转到的下一状态；最后的结束状态的固定状态用于标记流程结束。
本实施例涉及的各种状态可以参见图4。在图4所示的状态机中，设有一个初始状态，n个固定状态(其中包括1个结束状态的固定状态和n-1个非结束状态的固定状态)，n个可编程状态。对于初始状态而言，其中设有初始跳转表，基于该初始跳转表可以确定从初始状态跳转到的哪里。图4中的虚线箭头指向从初始状态可能跳转到的目的状态。对于可编程状态而言，其中设有可编程跳转表和信号驱动表，基于该可编程跳转表可以确定从当前可编程状态跳转到的哪里，基于信号驱动表可确定产生哪些信号。对于非结束状态的固定状态而言，其下一跳和当前可生成的信号固定配置。各个固定状态主要用于实现特定的操作，如DMA读写等。固定状态可高效的实现特定操作。
需要说明的是，从初始状态可以跳转至某一个可编程状态，也可以跳转至某一个固定状态，至于如何跳转，取决于初始跳转表的相应记录。当然，n-1个非结束状态的固定状态之间也可以互相跳转，这取决于非结束状态的固定状态中的固定跳转配置。n个可编程状态之间也可以互相跳转，这取决于可编程状态中的可编程跳转表。从某一非结束状态的固定状态跳 转至某一个可编程状态，也取决于非结束状态的固定状态中的固定跳转配置。从某一个可编程状态跳转至某一个固定状态，也取决于可编程状态中的可编程跳转表。
由于非结束状态的固定状态基于固定信号配置产生驱动信号，因此其可以参照现有方案设计，也即：哪个固定状态下产生哪些信号是固定的。而可编程状态基于信号驱动表灵活产生信号，具体可参照下述实施例的相关介绍。
可见，在本实施例中，状态机中不同状态之间的跳转关系适时变化，流程中涉及的状态的个数可变，且某一状态下可生成的信号可变，因此若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，调整相关状态下的信号驱动表、跳转表即可实现改动，无需重新设计状态和跳转流程，能够灵活产生发给NAND PHY的驱动信号，方案具有良好的通用性。
基于上述实施例，需要说明的是，在一种具体实施方式中，基于初始状态中的初始跳转表确定需要跳转到的下一状态，包括：查询操作指令在初始跳转表中对应的下一状态的名称。
请参见图5，初始跳转表中可记录多个跳转判断条件，每个跳转判断条件包括：检测值(check value)和目的状态的名称(Dst_state)。目的状态的名称即：从初始状态需要跳转到的下一状态的名称。
基于上述实施例，需要说明的是，在一种具体实施方式中，基于可编程状态中的可编程跳转表确定需要跳转到的下一状态，包括：查询操作指令在可编程跳转表中对应的下一状态的名称。
其中，可编程状态中的可编程跳转表与初始跳转表类似，其中也记录多个跳转判断条件，每个跳转判断条件包括：检测值(check value)和目的状态的名称(Dst_state)。目的状态的名称即：从当前可编程状态需要跳转到的下一状态的名称。
基于上述实施例，需要说明的是，在一种具体实施方式中，在计时过程中基于可编程状态中的信号驱动表生成操作指令在可编程状态中的驱动 信号，包括：在计时过程中查询信号驱动表，以确定计时过程中的每一预设时间点需要生成的驱动信号；信号驱动表中记录有至少一个预设时间点，以及每个预设时间点需要生成的至少一个信号。
请参见图6，任一个可编程状态中的信号驱动表中按照各个预设时间点记录有相应预设时间点可以生成的信号。各个时间点基于计时器来确定。可见，进入可编程状态开始计时，主要是为了确定时间点，以及何时跳转至下一状态。当然，每个状态都可以有信号产生时间的限制。例如：当前进入某一状态，设定10秒后跳转至下一状态，那么当前状态的信号产生时间的限制即为10秒。
如图6所示，该信号驱动表中记录有TT0-TT3共4个时间点。对于时间点(Timer_point)为10’h3(十六进制数)的TT0而言，该时间点需要生成的信号为：wrdata_en＝4'b0111(即：dfi_wrdata_en置1)，其余信号(TT0对应的CLE、ALE、WE、RE)均不赋任何值，当然，不用赋值的信号也可以不记录。wrdata_en为信号所处的信号名称。也即：TT0时将NAND PHY端的dfi_wrdata_en置1，以驱动dfi_wrdata信号。
相应地，对于时间点(Timer_point)为10’h4(十六进制数)的TT1而言，该时间点需要生成的信号为：CLE＝2'b11(即：CLE置1)以及wrdata_en＝4'b0000，其余信号(TT1对应的ALE、WE、RE)均不赋任何值。也即：TT1时将NAND PHY端的CLE信号置1，dfi_wrdata_en和dfi_wrdata保持不变。
相应地，TT2时将NAND PHY端的CLE信号置0，dfi_wrdata_en和dfi_wrdata保持不变。TT3时将NAND PHY端的dfi_wrdata_en置0。
可见，TT0-TT3到底对应哪个时间点，取决于Timer_point等于多少；而任一个时间点对哪些信号取什么值，取决于信号驱动表中的相应记录。
需要说明的是，图6所示仅展示了NAND PHY接口信号的赋值。因此表的第一列记录有：TT_TYPE2'b01。“TT_TYPE2'b01”用于指示某一时间点所产生的信号是用于驱动NAND PHY接口信号的。NAND PHY接口信号如：CLE、ALE、WE等。
当然，信号驱动表中还可以记录硬盘控制器的内部信号，此时表的第一列记录有：TT_TYPE2'b10。“TT_TYPE2'b10”用于指示某一时间点所产 生的信号属于硬盘控制器内部。具体可参见图7，如图7所示，所驱动的信号为ps_time、rd_deskew_req等内部信号。
硬盘控制器(NAND controller)与NAND PHY之间的信号连接可参见图8。如图8所示，clk为时钟信号，dfi_cebar、dfi_cle、dfi_ale、dfi_rebar、dfi_webar为控制信号；dfi_wrdata_en、dfi_wrdata为写数据信号；dfi_rddata_en、dfi_rddata_valid、dfi_rddata为读数据信号。图8中的信号非全部信号，只是为了表明连接关系。NAND PHY和NAND IO之间的信号为IO信号(如cebar_opad)。NAND IO和NAND之间的信号为实际和Flash颗粒之间的信号线(如cebar、cle等)。可见，硬盘控制器驱动NAND PHY的时序信号，会最终驱动NAND颗粒，此即为：硬盘控制器将驱动信号发给NAND PHY，然后NAND PHY据此驱动信号操作硬盘的NAND Flash。
请参见图9，若硬盘控制器产生如图9所示的驱动信号(图9上半部分加粗线框中的各个信号)，则会有相应的NAND IO发送到NAND颗粒的信号(图9下半部分线框中的各个信号)。其中，由于驱动NAND颗粒的信号需要符合ONFI协议要求和NAND颗粒要求，因此硬盘控制器产生的驱动信号也要符合一定的要求。
由于信号驱动表中记录的预设时间点的个数可以调整，每个预设时间点需要生成的信号也可以调整。当然，初始跳转表和可编程跳转表中的跳转判断条件也可以调整。总之，信号驱动表、初始跳转表和可编程跳转表都可以根据需要人为适时更新。
那么更新初始跳转表和可编程跳转表的过程可以包括：若接收到初始跳转表和/或信号驱动表和/或可编程跳转表的更新指令，则基于更新指令更新初始跳转表和/或信号驱动表和/或可编程跳转表。
在一种具体实施方式中，将初始跳转表或可编程跳转表作为可更新表，对可更新表的更新过程包括：对可更新表中记录的操作指令、或对应的下一状态的名称进行修改；和/或删除可更新表中记录的操作指令、以及对应的下一状态的名称；和/或在可更新表中新增操作指令、以及对应的下一状态的名称。
在一种具体实施方式中，更新信号驱动表包括：对信号驱动表中记录 的预设时间点、或对应的至少一个信号进行修改；和/或删除信号驱动表中记录的预设时间点、以及对应的至少一个信号；和/或在信号驱动表中新增预设时间点、以及对应的至少一个信号。
请参见图10，下述实施例提供了一种状态机的状态跳转关系的示例。在图10所示的跳转关系中，涉及一个初始状态，3个固定状态：DMA_Write状态、DMA_Read状态和结束状态，以及3个可编程状态：PS_x状态、PS_y状态和PS_z状态。
硬盘控制器接收到一个命令，则使用初始状态的初始跳转表中“init跳转判断条件n”检测当前命令是否为DMA write，使用初始跳转表中“init跳转判断条件m”检测当前命令是否为DMA read，使用初始跳转表中“init跳转判断条件x”检测当前命令是否跳转到PS_x状态，使用初始跳转表中“init跳转判断条件y”检测当前命令是否跳转到PS_y状态。
需要说明的是，上述各个跳转判断条件中的check value(如x、y、z、w等)没有绝对的关联关系，可以是允许设置的任意检测值。
假设上述“init跳转判断条件n”、“init跳转判断条件m”、“init跳转判断条件x”、“init跳转判断条件y”都满足，则完成相应跳转。当然，在实际使用过程中，只会满足某一个状态中的任一个跳转判断条件，一般不会同时满足某一个状态中的多个跳转判断条件。也即：在一个状态中只能唯一确定一个目的状态。如果在一个状态中出现满足多个跳转判断条件的情况，可以根据不同跳转判断条件的优先级，确定出唯一的一个目的状态。
跳转至DMA_Write状态后，检测DMA write是否完成，完成后则进入结束状态。
跳转至DMA_Read状态后，检测DMA read是否完成，完成后则进入结束状态。
跳转至可编程状态PS_x后，使用该状态中的“PS跳转判断条件z”检测是否跳转到PS_z状态，满足“PS跳转判断条件z”则完成相应跳转。
跳转至可编程状态PS_y后，使用该状态中的“PS跳转判断条件x”检测是否跳转到PS_x状态，满足“PS跳转判断条件x”则完成相应跳转。使用该状态中的“PS跳转判断条件z”检测是否跳转到PS_z状态，满足 “PS跳转判断条件z”则完成相应跳转。
跳转至可编程状态PS_z后，使用该状态中的“PS跳转判断条件w”检测是否跳转到结束状态，满足“PS跳转判断条件w”则完成相应跳转。
可见，在本实施例中的各个状态中，只需满足相应条件，不同状态之间可以互相跳转。基于初始状态，固定状态和可编程状态构成的状态机，可配置的跳转判断条件可灵活的实现状态之间跳转关系的设定，可编程状态下可基于驱动信号表产生任意的PHY端驱动信号，在NAND颗粒时序发生更新之后，也可以灵活调整驱动信号时序，因此适配不同的NAND颗粒时序要求。
下面对本申请实施例提供的一种驱动信号生成装置进行介绍，下文描述的一种驱动信号生成装置与上文描述的一种驱动信号生成方法可以相互参照。
参见图11所示，本申请实施例公开了一种驱动信号生成装置，包括
初始状态模块1101，用于若接收到操作指令，则控制状态机进入初始状态，并基于初始状态中的初始跳转表确定需要跳转到的下一状态；
可编程状态模块1102，用于若下一状态为任一可编程状态，则跳转至可编程状态并开始计时，在计时过程中基于可编程状态中的信号驱动表生成操作指令在可编程状态中的驱动信号，若计时结束，则基于可编程状态中的可编程跳转表确定需要跳转到的下一状态；
固定状态模块1103，用于若下一状态为非结束状态的任一固定状态，则跳转至固定状态，基于固定状态中的固定信号配置生成操作指令在固定状态中的驱动信号后，基于固定状态中的固定跳转配置确定需要跳转到的下一状态；
结束模块1104，用于若下一状态为结束状态的固定状态，则流程结束。
在一种具体实施方式中，初始状态模块具体用于：
查询操作指令在初始跳转表中对应的下一状态的名称。
在一种具体实施方式中，可编程状态模块具体用于：
在计时过程中查询信号驱动表，以确定计时过程中的每一预设时间点需要生成的驱动信号；信号驱动表中记录有至少一个预设时间点，以及每 个预设时间点需要生成的至少一个信号。
在一种具体实施方式中，可编程状态模块具体用于：
查询操作指令在可编程跳转表中对应的下一状态的名称。
在一种具体实施方式中，还包括：
更新模块，用于若接收到初始跳转表和/或信号驱动表和/或可编程跳转表的更新指令，则基于更新指令更新初始跳转表和/或信号驱动表和/或可编程跳转表。
在一种具体实施方式中，更新模块将初始跳转表或可编程跳转表作为可更新表，对可更新表的更新过程包括：对可更新表中记录的操作指令、或对应的下一状态的名称进行修改；和/或删除可更新表中记录的操作指令、以及对应的下一状态的名称；和/或在可更新表中新增操作指令、以及对应的下一状态的名称。
在一种具体实施方式中，更新模块更新信号驱动表包括：对信号驱动表中记录的预设时间点、或对应的至少一个信号进行修改；和/或删除信号驱动表中记录的预设时间点、以及对应的至少一个信号；和/或在信号驱动表中新增预设时间点、以及对应的至少一个信号。
其中，关于本实施例中各个模块、单元更加具体的工作过程可以参考前述实施例中公开的相应内容，在此不再进行赘述。
可见，本实施例提供了一种驱动信号生成装置，在该装置中，不同状态之间的跳转关系适时变化，流程中涉及的状态的个数可变，且某一状态下可生成的信号可变，因此若硬盘的NAND颗粒发生变化，或者某一操作的流程需要变动，调整相关状态下的信号驱动表、跳转表即可实现改动，无需重新设计各个状态和跳转流程，能够灵活产生发给NAND PHY的驱动信号。
下面对本申请实施例提供的一种电子设备进行介绍，下文描述的一种电子设备与上文描述的一种驱动信号生成方法及装置可以相互参照。
参见图12所示，本申请实施例公开了一种电子设备，包括：
存储器1201，用于保存计算机程序；
处理器1202，用于执行所述计算机程序，以实现上述任意实施例公开 的方法。
下面对本申请实施例提供的一种可读存储介质进行介绍，下文描述的一种可读存储介质与上文描述的一种驱动信号生成方法、装置及设备可以相互参照。
一种可读存储介质，用于保存计算机程序，其中，所述计算机程序被处理器执行时实现前述实施例公开的驱动信号生成方法。关于该方法的具体步骤可以参考前述实施例中公开的相应内容，在此不再进行赘述。
本申请涉及的“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法或设备固有的其它步骤或单元。
需要说明的是，在本申请中涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其它实施例的不同之处，各个实施例之间相同或相似部分互相参见即可。
结合本文中所公开的实施例描述的方法或算法的步骤可以直接用硬件、处理器执行的软件模块，或者二者的结合来实施。软件模块可以置于随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可 擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM、或技术领域内所公知的任意其它形式的可读存储介质中。
本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的一般技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (10)

  1. 一种驱动信号生成方法，其特征在于，包括：
    若接收到操作指令，则控制状态机进入初始状态，并基于所述初始状态中的初始跳转表确定需要跳转到的下一状态；
    若所述下一状态为任一可编程状态，则跳转至所述可编程状态并开始计时，在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，若计时结束，则基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态；
    若所述下一状态为非结束状态的任一固定状态，则跳转至所述固定状态，基于所述固定状态中的固定信号配置生成所述操作指令在所述固定状态中的驱动信号后，基于所述固定状态中的固定跳转配置确定需要跳转到的下一状态；
    若所述下一状态为结束状态的固定状态，则流程结束。
  2. 根据权利要求1所述的驱动信号生成方法，其特征在于，所述基于所述初始状态中的初始跳转表确定需要跳转到的下一状态，包括：
    查询所述操作指令在所述初始跳转表中对应的下一状态的名称。
  3. 根据权利要求1所述的驱动信号生成方法，其特征在于，所述在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，包括：
    在计时过程中查询所述信号驱动表，以确定计时过程中的每一预设时间点需要生成的驱动信号；所述信号驱动表中记录有至少一个预设时间点，以及每个预设时间点需要生成的至少一个信号。
  4. 根据权利要求1所述的驱动信号生成方法，其特征在于，所述基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态，包括：
    查询所述操作指令在所述可编程跳转表中对应的下一状态的名称。
  5. 根据权利要求1至4任一项所述的驱动信号生成方法，其特征在于，还包括：
    若接收到所述初始跳转表和/或所述信号驱动表和/或所述可编程跳转表的更新指令，则基于所述更新指令更新所述初始跳转表和/或所述信号驱动表和/或所述可编程跳转表。
  6. 根据权利要求5所述的驱动信号生成方法，其特征在于，将所述初始跳转表或所述可编程跳转表作为可更新表，对所述可更新表的更新过程包括：
    对所述可更新表中记录的操作指令、或对应的下一状态的名称进行修改；
    和/或
    删除所述可更新表中记录的操作指令、以及对应的下一状态的名称；
    和/或
    在所述可更新表中新增操作指令、以及对应的下一状态的名称。
  7. 根据权利要求5所述的驱动信号生成方法，其特征在于，更新所述信号驱动表包括：
    对所述信号驱动表中记录的预设时间点、或对应的至少一个信号进行修改；
    和/或
    删除所述信号驱动表中记录的预设时间点、以及对应的至少一个信号；
    和/或
    在所述信号驱动表中新增预设时间点、以及对应的至少一个信号。
  8. 一种驱动信号生成装置，其特征在于，包括
    初始状态模块，用于若接收到操作指令，则控制状态机进入初始状态，并基于所述初始状态中的初始跳转表确定需要跳转到的下一状态；
    可编程状态模块，用于若所述下一状态为任一可编程状态，则跳转至所述可编程状态并开始计时，在计时过程中基于所述可编程状态中的信号驱动表生成所述操作指令在所述可编程状态中的驱动信号，若计时结束，则基于所述可编程状态中的可编程跳转表确定需要跳转到的下一状态；
    固定状态模块，用于若所述下一状态为非结束状态的任一固定状态，则跳转至所述固定状态，基于所述固定状态中的固定信号配置生成所述操作指令在所述固定状态中的驱动信号后，基于所述固定状态中的固定跳转配置确定需要跳转到的下一状态；
    结束模块，用于若所述下一状态为结束状态的固定状态，则流程结束。
  9. 一种电子设备，其特征在于，包括：
    存储器，用于存储计算机程序；
    处理器，用于执行所述计算机程序，以实现如权利要求1至7任一项所述的驱动信号生成方法。
  10. 一种可读存储介质，其特征在于，用于保存计算机程序，其中，所述计算机程序被处理器执行时实现如权利要求1至7任一项所述的驱动信号生成方法。
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