WO2023025232A1 - 像素阵列的控制方法、装置、电子设备和可读存储介质 - Google Patents

像素阵列的控制方法、装置、电子设备和可读存储介质 Download PDF

Info

Publication number
WO2023025232A1
WO2023025232A1 PCT/CN2022/114716 CN2022114716W WO2023025232A1 WO 2023025232 A1 WO2023025232 A1 WO 2023025232A1 CN 2022114716 W CN2022114716 W CN 2022114716W WO 2023025232 A1 WO2023025232 A1 WO 2023025232A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
sub
pixels
electrical signal
color
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2022/114716
Other languages
English (en)
French (fr)
Inventor
罗轶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vivo Mobile Communication Co Ltd
Original Assignee
Vivo Mobile Communication Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vivo Mobile Communication Co Ltd filed Critical Vivo Mobile Communication Co Ltd
Publication of WO2023025232A1 publication Critical patent/WO2023025232A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels

Definitions

  • the present application belongs to the technical field of electronic equipment, and in particular relates to a method for controlling a pixel array, a device for controlling the pixel array, electronic equipment, and a readable storage medium.
  • RGBW3.0 the five-pixel color filter array (Color Filter Array, CFA) inspired by the light emitting diode (Light Emitting Diode, LED) display technology, that is, RGBW3.
  • CFA Color Filter Array
  • LED Light Emitting Diode
  • the purpose of the embodiments of the present application is to provide a pixel array control method, a pixel array control device, electronic equipment, and a readable storage medium, which can solve the problem that the color filter array cannot be controlled due to the absence of a corresponding pixel array control scheme in the related art. problem of precise control.
  • the embodiment of the present application provides a pixel array control method
  • the pixel array includes a plurality of pixel groups, each pixel group includes a white pixel and at least two color pixels, at least two color pixels surround the white pixel It is set that the pixel array includes at least two pixel rows and at least two pixel columns, at least two pixel rows share one control signal line, and at least two pixel columns share one output signal line;
  • the control method includes: using a rolling shutter in the pixel array Shutter exposure mode, when the pixel row includes white pixels or color pixels, and the pixel column includes white pixels or color pixels, in each frame time, control the pixels of at least two pixel rows to perform the first preset processing in sequence; or, Within each frame time, the pixels of multiple color pixel rows of the control pixel array perform the first preset processing sequentially, and the pixels of each white pixel row of the control pixel array and the pixels of an adjacent color pixel row perform the first preset processing synchronously.
  • the color pixel row is a pixel row including color pixels
  • the white pixel row is a pixel row including white pixels
  • the first preset processing includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light and output the electrical signal of the pixel.
  • the embodiment of the present application provides a control device for a pixel array
  • the pixel array includes a plurality of pixel groups, each pixel group includes a white pixel and at least two color pixels, and the at least two color pixels surround the white pixel It is set that the pixel array includes at least two pixel rows and at least two pixel columns, at least two pixel rows share one control signal line, and at least two pixel columns share one output signal line;
  • the control device includes a control module, and the control module is used for :
  • the pixel row only includes white pixels or only color pixels
  • the pixel column only includes white pixels or only color pixels
  • at least two pixel rows are controlled
  • the pixels perform the first preset processing in sequence; or, within each frame time, the pixels of a plurality of color pixel rows of the control pixel array sequentially perform the first preset processing, and the pixels of each white pixel row of the control pixel array and its corresponding
  • the pixels of an adjacent color pixel row are simultaneously subjected to the first preset processing; wherein, the color pixel row is a pixel row including color pixels, and the white pixel row is a pixel row including white pixels, and the first preset processing includes:
  • the electrical signal is set as an initial voltage, controls the pixel to sense light, and outputs the electrical signal of the pixel.
  • the embodiment of the present application provides an electronic device, the electronic device includes a processor, a memory, and a program or instruction stored in the memory and operable on the processor.
  • the program or instruction is executed by the processor, the The steps of the method of the first aspect.
  • the embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the steps of the method in the first aspect are implemented.
  • the embodiment of the present application provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the method in the first aspect.
  • each pixel row of the pixel array shares one control signal line
  • each pixel column of the pixel array shares one output signal line
  • the control method for the above-mentioned pixel array structure specifically includes: the first control method, each pixel row is sequentially controlled for reset, exposure and reading within one frame time.
  • the color pixel rows are sequentially reset, exposed and read within one frame time, and at the same time, each white pixel row is controlled to perform reset, exposure and read control synchronously with its adjacent color pixel rows.
  • CIS complementary Metal-oxide semiconductor image sensor
  • FIG. 1 is a schematic diagram of pixel array arrangement and pixel group arrangement of a complementary metal oxide semiconductor image sensor according to an embodiment of the present application
  • FIG. 2 is one of the structural schematic diagrams of a pixel of a CMOS image sensor according to an embodiment of the present application
  • FIG. 3 is the second structural schematic diagram of a pixel of a CMOS image sensor according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a pixel circuit array architecture of a CMOS image sensor according to an embodiment of the present application
  • FIG. 5 is a schematic flowchart of a method for controlling a pixel array according to an embodiment of the present application
  • FIG. 6 is one of the structural schematic diagrams of the pixel circuit array of the embodiment of the present application.
  • Fig. 7 is one of the control logic schematic diagrams of the pixel array control method using the rolling shutter mode and not using pixel signal synthesis according to the embodiment of the present application;
  • Fig. 8 is one of the schematic flowcharts of the pixel array control method using the rolling shutter mode and not using pixel signal synthesis according to the embodiment of the present application;
  • FIG. 9 is the second schematic diagram of the control logic of the pixel array control method using the rolling shutter mode and not using pixel signal synthesis according to the embodiment of the present application;
  • FIG. 10 is the second schematic flow diagram of the pixel array control method using the rolling shutter method and not using pixel signal synthesis according to the embodiment of the present application;
  • Fig. 11 is one of the control logic schematic diagrams of the pixel array control method using the rolling shutter mode and pixel signal synthesis according to the embodiment of the present application;
  • FIG. 12 is one of the schematic flowcharts of a pixel array control method using a rolling shutter method and pixel signal synthesis according to an embodiment of the present application;
  • FIG. 13 is one of the control logic schematic diagrams of the pixel array control method using the global shutter method and not using pixel signal synthesis according to the embodiment of the present application;
  • FIG. 14 is a schematic flowchart of a pixel array control method using a global shutter method and not using pixel signal synthesis according to an embodiment of the present application;
  • Fig. 15 is one of the control logic schematic diagrams of the pixel array control method using the global shutter method and pixel signal synthesis according to the embodiment of the present application;
  • 16 is a schematic flowchart of a pixel array control method using a global shutter method and pixel signal synthesis according to an embodiment of the present application;
  • FIG. 17 is the second structural schematic diagram of the pixel circuit array of the embodiment of the present application.
  • Fig. 18 is the third schematic diagram of the control logic of the pixel array control method using the rolling shutter method and not using pixel signal synthesis according to the embodiment of the present application;
  • Fig. 19 is the third schematic flow diagram of the pixel array control method using the rolling shutter method and not using pixel signal synthesis according to the embodiment of the present application;
  • Fig. 20 is the second schematic diagram of the control logic of the pixel array control method using the rolling shutter mode and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 21 is the second schematic flow diagram of the pixel array control method using rolling shutter mode and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 22 is the third schematic diagram of the control logic of the pixel array control method using the rolling shutter mode and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 23 is the third schematic flow diagram of the pixel array control method using rolling shutter method and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 24 is the second schematic diagram of the control logic of the pixel array control method using the global shutter method and not using pixel signal synthesis according to the embodiment of the present application;
  • Fig. 25 is the second schematic diagram of the control logic of the pixel array control method using the global shutter method and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 26 is the third schematic diagram of the control logic of the pixel array control method using the global shutter mode and pixel signal synthesis according to the embodiment of the present application;
  • Fig. 27 is a schematic block diagram of a control device for a pixel array according to an embodiment of the present application.
  • Fig. 28 is one of the schematic block diagrams of the electronic device of the embodiment of the present application.
  • FIG. 29 is a second schematic block diagram of an electronic device according to an embodiment of the present application.
  • the pixel array (Pixel Array) of CIS using RGBW3.0 is composed of pixel groups.
  • each pixel cluster 100 has 5 pixels (Pixel), among which 4 colored pixels (i.e. color pixels), including a red pixel 102, a blue pixel 104 and two green pixels 106, all of which are "L ” shape, while the colorless and transparent white pixel 108 is still a square shape, and the white pixel 108 is located in the very center of the pixel group 100, surrounded by four “L” shaped colored pixels.
  • a photosensitive element such as a photodiode, which converts the light filtered by the color filter into an electrical signal for back-end processing, such as current, voltage, potential energy, etc. .
  • the ratio of the number of green pixels, red pixels, and blue pixels remains unchanged, which is always 2:1:1.
  • the proportion of white areas in the pixel cluster area changes.
  • the ratio of white pixels to colored pixels in method 1 is 1:3, and the ratio of white pixels to colored pixels in method 2 is 4:5. .
  • the CIS pixel circuit array architecture using RGBW3.0 is shown in Figure 4.
  • Each row of pixels shares a set of pixel control signals.
  • the pixel control signals include: pixel reset signal ( ⁇ rst), used to control the reset time of the pixel, charge The transfer switch signal ( ⁇ tran) is used to control the exposure time of the pixel, and the pixel signal read switch signal ( ⁇ sel) is used to control the read time of the pixel.
  • the pixel control signal is generated by the pixel control signal generation module 402 .
  • Each column of pixels shares a pixel output signal (Vout) transmission line, and each row of pixels uses the shared transmission line in turn to transmit Vout to the back-end signal processing circuit.
  • Vout pixel output signal
  • the pixel circuit 404 includes a 4-transistor active pixel sensor (Active Pixel Sensor, APS) circuit, wherein the light-sensitive photodiode (Photodiode, PD) converts light into electrons and then passes through the charge transfer transistor (which is controlled by ⁇ tran switch) to the floating diffusion (Floating Diffusion, FD) region.
  • the pixel is selected for reading (the ⁇ sel level is pulled high)
  • the amount of charge in the FD is read as a voltage signal by the source follower (Source follower) composed of Msf and Msel and output as Vout.
  • Source follower Source follower
  • the pixel array control method, the pixel array control device, the electronic equipment and the readable storage medium can solve the above problems.
  • An embodiment of the present application provides a method for controlling a pixel array
  • the pixel array includes a plurality of pixel groups, each pixel group includes a white pixel and at least two color pixels, at least two color pixels are arranged around the white pixel, and the pixel array includes At least two pixel rows and at least two pixel columns, at least two pixel rows share one control signal line, and at least two pixel columns share one output signal line; as shown in Figure 5, the control method includes:
  • Step 502 when the pixel array adopts the rolling shutter exposure method, the pixel rows include white pixels or colored pixels, and the pixel columns include white pixels or colored pixels, within each frame time, control the pixels of at least two pixel rows to be exposed sequentially The first preset processing; or, within each frame time, the pixels of a plurality of color pixel rows of the control pixel array are sequentially subjected to the first preset processing, and the pixels of each white pixel row of the control pixel array and its adjacent one The pixels of the color pixel row are synchronously subjected to the first preset processing.
  • the color pixel row is a pixel row including color pixels
  • the white pixel row is a pixel row including white pixels.
  • the first preset processing includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the pixel’s electrical signal to an initial voltage. Electrical signal output.
  • each pixel row of the pixel array shares one control signal line
  • each pixel column of the pixel array shares one output signal line, specifically including: each row of color pixels shares one pixel control signal, and each row of white pixels The pixels share one pixel control signal; the color pixels of each column share one output signal line, and the white pixels of each column share one output signal line.
  • the circuit structure of the pixel array 600 and the pixel circuit array 700 corresponding to the pixel array 600 is shown in FIG. 6 .
  • the pixel circuit array 700 is composed of a plurality of pixel group circuits 702, and one pixel group circuit 702 is composed of a plurality of pixel circuits 704 (one pixel group 602 in the pixel array 600 corresponds to one pixel group circuit 702, and one pixel group circuit 702 in the pixel array 600 corresponds to One pixel circuit 704 ), each row of pixel circuits is controlled by the pixel control signal generating module 800 .
  • the pixel row includes white pixels or color pixels
  • the pixel column includes white pixels or color pixels
  • the color pixels in each row share a pixel control signal (that is, the control signal line), and the white pixels in each row share a pixel control signal.
  • Signals that is, control signal lines
  • the pixel control signal shared by each row of white pixels and the pixel control signal shared by each row of color pixels are independent of each other.
  • the signals output by each row of pixels share one signal transmission line (ie output signal line), and the output signal lines of the color pixels and the output signal lines of the white pixels are independent of each other.
  • the signal transmission line transmits the output signal (Vout) of each column to the pixel output signal processing module 900 for processing by the pixel output signal processing module 900 .
  • the embodiment of the present application provides an RGBW pixel circuit array architecture, which realizes the re-layout of the pixel circuit array compared with the traditional pixel circuit array.
  • this pixel circuit array architecture is suitable for CFA types (for example, RGBW3.0CFA), which solves the problem that CFA cannot use traditional pixel circuit arrays, and provides a basis for the wide application of CFA on CIS; on the other hand, it realizes The independent processing of signals between color pixels and white pixels, while adapting to the CFA pixel structure, effectively avoids the crosstalk of signals between color pixels and white pixels, and improves the sensitivity of the image sensor.
  • a control method of a pixel array using the pixel array structure shown in FIG. 6, specifically, within each frame time, a plurality of pixel rows of the pixel array are controlled to perform the first preset processing in sequence, that is, within each frame Within a certain period of time, the pixels in the jth pixel row are controlled to perform the first preset process according to the first control signal, and after the pixels in the jth pixel row are reset, the j+1th pixel is controlled according to the second control signal
  • the pixels of the row are subjected to the first preset processing.
  • i, j, and N are positive integers, j is greater than or equal to 1, and less than or equal to N-1, N is the number of pixel rows in the pixel array, and the first preset processing includes: pixel reset, pixel exposure, Pixel read.
  • the pixel row and its adjacent color pixel rows perform the first preset processing synchronously, that is, in each frame time, the pixels of the p-th color pixel row are controlled to perform the first preset processing according to the third control signal, and the p-th color pixel row is controlled to perform the first preset processing.
  • the pixels of the p+1th color pixel row are controlled to perform the first preset process according to the fourth control signal.
  • the photodiodes of the pixels of the white pixel row and the photodiodes of the pixels of an adjacent color pixel row perform the first preset processing simultaneously
  • p is a positive integer
  • p is greater than or equal to 1, and is less than or equal to (2 ⁇ M /3)-1
  • M is the number of pixel rows in the pixel array
  • a color pixel row is a pixel row including color pixels
  • a white pixel row is a pixel row including white pixels
  • the first preset processing includes: pixel reset, Pixel exposure, pixel readout.
  • the pixels in the pixel row include white pixels or colored pixels.
  • the first preset processing sequentially includes pixel reset, pixel exposure and pixel readout.
  • Pixel reset refers to resetting the voltage signal of the pixels in the pixel row in the previous frame to the initial voltage;
  • pixel exposure refers to controlling the light sensitivity of the pixels in the pixel row, so that the electrical signal of the pixel changes from the initial voltage;
  • the pixel Reading refers to outputting the changed telecommunication signal through the output signal line.
  • FIG. 7 and FIG. 9 show two pixel array control methods that adopt a rolling shutter method and do not use pixel signal synthesis (ie, fusion of white pixels and color pixels). All pixels are controlled by pixel control signals generated by the pixel control signal generation module (for example, pixel reset signal ⁇ rst, charge transfer switch signal ⁇ tran, and pixel signal read switch signal ⁇ sel) to complete reset, exposure, and pixel signal within one frame time. Read three steps.
  • pixel control signals generated by the pixel control signal generation module for example, pixel reset signal ⁇ rst, charge transfer switch signal ⁇ tran, and pixel signal read switch signal ⁇ sel
  • the first control method is to sequentially perform reset, exposure, and read control for each pixel row within one frame time. That is, as shown in FIG. 7 , the rows of colored pixels (ie, color pixels R, G, B) and rows of white pixels (W) are alternately controlled for reset, exposure, and reading. The pixels of each row are misaligned with the pixels of other rows in each step, and the pixels of each row immediately enter the reset step of the next frame after completing the read control step.
  • the rows of colored pixels ie, color pixels R, G, B
  • W white pixels
  • the control logic of the above-mentioned first control mode includes: pixel reset of the first horizontal row, reading of the last horizontal pixel of the previous frame; pixel exposure of the first horizontal row, reset of pixels of the second horizontal row; pixels of the second horizontal row Exposure, pixel reset of the third row; and so on, until the penultimate second row of pixels is read, and the last row of pixels is exposed.
  • the control logic of the second control method includes: within one frame time, the color pixel rows are reset, exposed, and read in sequence, and at the same time, each white pixel row is controlled to reset, expose, and read synchronously with its adjacent color pixel rows. Take control. That is to say, as shown in FIG. 9 , the rows of color pixels (R, G, B) are reset, exposed, and read out in sequence, while the row of white pixels is synchronized with the row of corresponding color pixels, and the pixels of each row are completed Immediately after the control step is read, go to the reset step for the next frame. It should be noted that, for a white pixel, its corresponding color pixel refers to a color pixel within the same pixel cluster.
  • the control logic of the above-mentioned second control method includes: pixel reset of the first row and the second row, pixel reading of the last row of the previous frame; pixel reset of the third row, first row and second row pixel reset Expose the pixels in the horizontal row; reset the pixels in the 4th and 5th horizontal rows, expose the pixels in the 3rd row; and so on, until the pixels of the penultimate 3rd horizontal row and the penultimate 2nd horizontal row are read, and the pixels in the last horizontal row are exposed.
  • a pixel reset method is provided under the condition of adopting the rolling shutter exposure method and not using pixel signal fusion.
  • the control scheme of , exposure and reading realizes the accuracy of CIS control and provides a basis for the wide application of CFA in CIS.
  • control method further includes: when the pixel array adopts a rolling shutter exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, in each Within a frame time, the pixels of multiple rows of pixel clusters are controlled to perform the second preset processing sequentially; wherein, the second preset processing sequentially includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the white color of the pixel cluster to the initial voltage.
  • the electrical signal of the pixel is fused with the electrical signal of at least one color pixel of the pixel group to enhance the electrical signal of the color pixel and output the electrical signal of the pixel.
  • each pixel cluster covers 3 pixel rows, the pixels of every 3 pixel rows are reset and exposed uniformly, and the pixels of 3 adjacent pixel rows are not aligned. After the exposure is completed, it enters the signal fusion period.
  • the electrical signal of the white pixel in each pixel group is combined with the electrical signal of one or more color pixels to enhance the electrical signal of the color pixel and make the image corresponding to the color pixel brighter. .
  • the fusion operation After the fusion operation is completed, it enters the signal reading period, and the synthesized pixel signal in the pixel group is read to the pixel signal processing module for subsequent processing. After the step of pixel reading control in the current frame ends, immediately enter into the reset step of the next frame.
  • control logic of the above-mentioned control method includes: pixel reset of the 1st, 2nd, and 3rd horizontal rows and pixel reading of the last 3rd, 2nd, and 1st horizontal rows of the previous frame; pixel reset of the 4th, 5th, and 6th horizontal rows And the pixel exposure of the 1st, 2nd, and 3rd rows; the reset of the pixels of the 7th, 8th, and 9th rows and the exposure of the pixels of the 4th, 5th, and 6th rows; 3rd, 2nd, 1st horizontal pixel exposure.
  • the exposure and reading control scheme realizes the accuracy of CIS control and provides a basis for the wide application of CFA in CIS.
  • control method further includes: in the case that the pixel array adopts the global shutter pixel exposure method, within each frame time, controlling the pixels of multiple pixel rows of the pixel array to perform the first exposure synchronously.
  • the third preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; controlling the electrical signal of the pixels in multiple pixel rows to output in sequence.
  • the pixel array control method using the global shutter exposure method without pixel signal fusion is shown in FIG. 13 .
  • Each row of pixels, whether it is a color pixel row or a white pixel row, is reset, exposed and read uniformly.
  • the reading is carried out in the manner of reading and processing horizontal row-by-row signals (only the reading periods are uniformly divided).
  • the current frame ends, and the pixel reset step of the next frame follows.
  • control logic of the above control method includes: all pixels are reset; all pixels are reset, and exposure is started; all pixels are exposed, and row-by-row reading is started; and so on, until all pixels are read, One frame is complete.
  • the exposure and reading control scheme realizes the accuracy of CIS control and provides a basis for the wide application of CFA in CIS.
  • the control method further includes: when the pixel array adopts a global shutter pixel exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, in each Within the frame time, the pixels of multiple pixel rows of the pixel array are controlled to perform the fourth preset processing synchronously, wherein the fourth preset processing includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; controlling each pixel In the cluster, the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel to enhance the electrical signal of the color pixel; the electrical signals controlling the pixels of multiple pixel rows are sequentially output.
  • pixel signal fusion that is, the signals generated by the white pixels in each pixel group are fused into one or more color pixels
  • the corresponding pixel array control method is shown in Figure 15 Show. Still all horizontal pixels are reset and exposed uniformly.
  • the electrical signal of the white pixel in each pixel cluster is fused with the electrical signal of one or more color pixels, so as to enhance the electrical signal of the color pixel and make the image corresponding to the color pixel brighter.
  • the fusion operation After the fusion operation is completed, it enters the signal reading period, and the reading operation is still carried out in the manner of reading and processing the signals row by row.
  • the step of pixel reading control in the current frame ends immediately enter into the reset step of the next frame.
  • control logic of the above-mentioned control method includes: all pixels are reset; all pixels are reset and exposure is started; Reading ends and one frame is complete.
  • CIS pixel array in which "L-shape" color pixels are used
  • a pixel reset, exposure As well as the read control scheme, the control accuracy of CIS is realized, which provides the basis for the wide application of CFA in CIS.
  • the control method further includes: when the pixel array adopts a rolling shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, in each frame Within a time period, the sub-pixels of multiple pixel rows of the control pixel array are sequentially subjected to the fifth preset processing; wherein, the pixel row only includes sub-color pixels, or includes sub-white pixels and sub-color pixels, and the pixel column only includes sub-color pixels, or Including the sub-white pixel and the sub-color pixel, the fifth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, and outputting the electrical signal of the sub-pixel.
  • each pixel group contains 16 sub-pixels, so as shown in Figure 17, each pixel group 602 of the pixel array 600 contains 16 sub-pixels, specifically 4 sub-pixels White pixel and 12 sub-color pixels.
  • the pixel circuit array 700 corresponding to the pixel array 600 is composed of a plurality of pixel group circuits 702, and one pixel group circuit 702 is composed of a plurality of sub-pixel circuits 706, and each row of pixel circuits is controlled by a pixel control signal generating module 800, and each column of pixel circuits
  • the output signal is transmitted to the pixel output signal processing module 900 for processing by the pixel output signal processing module 900 .
  • the sub-pixels in each row include two cases, one is that only sub-color pixels are included in each row, and the other is that each row includes sub-white pixels and sub-color pixels; the sub-pixels in each column include two There are two cases, one is that only sub-color pixels are included in each column, and the other is that each column includes sub-white pixels and sub-color pixels.
  • the horizontal pixel control signals generated by the pixel control signal generation module are shared by a whole row of pixels (whether they are color pixels or white pixels). In each column, every two adjacent pixels share a pixel signal reading circuit, and the signals of two pixels will be selectively read and transmitted to the pixel output signal processing module by the output signal line of the shared column for the next step of signal processing.
  • the sub-color pixel R1 and the sub-color pixel R3 are respectively located in different adjacent horizontal rows, but they share a pixel signal reading circuit. Controlled by the horizontal pixel control signal, the pixel signal reading circuit will take turns to read the signals of the sub-color pixel R1 and the sub-color pixel R3 in different time periods.
  • the sub-color pixel R2 and the sub-white pixel W1 share a pixel signal reading circuit
  • the sub-color pixel G4 and the sub-color pixel G5 share a pixel signal reading circuit.
  • the pixel array control method is shown in FIG. 18 .
  • the subpixels in each row are reset, exposed, and read out at staggered times relative to the other rows.
  • control logic of the above control method includes: pixel reset of the first horizontal row, reading of the last horizontal pixel of the previous frame; pixel exposure of the first horizontal row, reset of pixels of the second horizontal row; pixel exposure of the second horizontal row, 3 rows of pixels are reset; and so on, until the penultimate row of pixels is read, and the last row of pixels is exposed.
  • a method of pixel reset, exposure, and readout is provided under the condition of using rolling shutter exposure method and not using pixel signal fusion.
  • the control scheme realizes the control accuracy of CIS and provides the basis for the wide application of CFA in CIS.
  • the control method further includes: when the pixel array adopts a rolling shutter exposure method, and the electrical signal of the sub-white pixel is fused with the electrical signal of at least one sub-color pixel, According to the order of the pixel array from top to bottom, every Q pixel row is set as a first pixel row group, then multiple first pixel row groups are obtained, wherein Q is equal to 2 or 4;
  • the sub-pixels of the first pixel row group sequentially perform the sixth preset processing; wherein, the sixth preset processing sequentially includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, setting the first pixel row
  • the electrical signal of the sub-white pixel of the group is combined with the electrical signal of at least one sub-color pixel of the first pixel row group to enhance the electrical signal of the sub-color pixel and output the electrical signal of the sub-pixel.
  • each sub-white pixel can perform intra-pixel signal interconnection and fusion with other sub-pixels of the pixel group where it is located.
  • the signal in the sub-white pixel W1 can be fused with the sub-color pixel R2 , the sub-color pixel R1 and the sub-color pixel R3 through inter-pixel inline lines.
  • the signals of the three sub-color pixels R2 , R1 , and R3 of the same color can be fused without sub-white pixels.
  • the fusion switch signal is also generated and provided by the pixel control signal generation module.
  • every 2 pixel rows are set as a first pixel row group, and multiple first pixel row groups are obtained.
  • the sub-pixels of the first pixel row group are sequentially subjected to the sixth preset processing.
  • 2 rows of sub-pixels are used as a pixel row group (2 rows of sub-pixels are half of a pixel group row), reset and exposed at the same time.
  • Pixel signal fusion is performed at the beginning of the read phase, followed by signal readout.
  • the control signals between each two groups are independent and not aligned. After the signal reading of the current frame is completed, enter the next frame immediately.
  • the control logic of the above-mentioned first control method includes: pixel reset of the first and second horizontal rows and pixel reading of the penultimate second and first horizontal rows of the previous frame; pixel reset of the third and fourth horizontal rows and first , 2nd horizontal pixel exposure; 5th, 6th horizontal pixel reset and 3rd, 4th horizontal pixel exposure; and so on, until penultimate 4th, 3rd horizontal pixel reading and penultimate 2nd, 1st horizontal pixel exposure.
  • the second control method is to set every 4 pixel rows as a first pixel row group according to the order of the pixel array from top to bottom, so as to obtain multiple first pixel row groups.
  • control The sub-pixels of the plurality of first pixel row groups are sequentially subjected to sixth preset processing. Exemplarily, as shown in FIG. 22 , 4 rows of sub-pixels are used as a pixel row group (4 rows of sub-pixels are used as a pixel group row), which are reset and exposed at the same time.
  • Pixel signal fusion is performed at the beginning of the read phase, followed by signal readout.
  • the control signals between each two groups are independent and not aligned. After the signal reading of the current frame is completed, enter the next frame immediately.
  • the main difference between the second control method and the first control method is that in the second control method, the sub-white pixel signal in the upper half of the pixel cluster can be fused with the sub-white pixel signal in the lower half. That is, when Q is equal to 4, the electrical signal of the sub-white pixel and the electrical signal of at least one sub-color pixel in the two first pixel row groups in each row of pixel clusters are signal-fused to enhance the sub-color Pixel electrical signal.
  • the control logic of the above-mentioned second control mode includes: pixel reset of the 1st, 2nd, 3rd, and 4th horizontal rows and pixel reading of the last 4th, 3rd, 2nd, and 1st horizontal rows of the previous frame; 6, 7, 8th horizontal pixel reset and 1st, 2nd, 3rd, 4th horizontal pixel exposure; 9th, 10th, 11th, 12th horizontal pixel reset and 5th, 6th, 7th, 8th horizontal pixel exposure; and so on , until the penultimate 8th, 7th, 6th, and 5th row pixels are read and the penultimate 4th, 3rd, 2nd, 1st horizontal row pixels are exposed.
  • the control scheme realizes the control accuracy of CIS and provides the basis for the wide application of CFA in CIS.
  • control method further includes: when the pixel array adopts the global shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, at each frame time Within, control the sub-pixels of multiple pixel rows of the pixel array to perform the seventh preset processing synchronously, wherein the seventh preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light; controlling multiple The electrical signals of the sub-pixels in the pixel row are sequentially output.
  • the composite pixel scheme that is, the scheme of splitting a white pixel into a plurality of rectangular sub-white pixels and splitting a color pixel into a plurality of rectangular sub-color pixels (as shown in FIG. 2 and FIG. 3 ).
  • the pixel array control method is shown in FIG. 24 .
  • Each row of subpixels is reset, exposed, and read uniformly.
  • the readout period although the readout periods of all horizontal rows of pixels are aligned, the readout is performed in the manner of reading and processing horizontally row-by-row signals (only the readout periods are uniformly divided).
  • the current frame ends, and then enters the pixel reset step of the next frame.
  • control logic of the above control method is shown in Figure 14, including: all pixels are reset; all pixels are reset, and exposure is started; all pixels are exposed, and row-by-row reading is started; and so on, until all pixels are read, One frame is complete.
  • a control of pixel reset, exposure, and readout is provided in the case of using a global shutter exposure method and not using pixel signal fusion.
  • the scheme realizes the control accuracy of CIS and provides the basis for the wide application of CFA in CIS.
  • the control method further includes: when the pixel array adopts a global shutter pixel exposure method, and the electrical signal of the sub-white pixel is fused with the electrical signal of at least one sub-color pixel,
  • the pixels of multiple pixel rows of the pixel array are controlled to perform the eighth preset processing synchronously, wherein the eighth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light; According to the order of the pixel array from top to bottom, every S pixel rows are set as a second pixel row group, then multiple second pixel row groups are obtained, and the number of sub-white pixels in each second pixel row group is controlled
  • the electrical signal is fused with the electrical signal of at least one sub-color pixel to enhance the electrical signal of the sub-color pixel, wherein S is equal to 2 or 4; the electrical signals controlling the sub-pixels of multiple pixel rows are sequentially output.
  • the composite pixel scheme that is, the scheme of splitting a white pixel into a plurality of rectangular sub-white pixels and splitting a color pixel into a plurality of rectangular sub-color pixels (as shown in FIG. 2 and FIG. 3 ).
  • the pixel array control method is shown in Fig. 25 and Fig. 26 . All horizontal sub-pixels are reset and exposed uniformly.
  • a signal fusion operation and a signal reading operation are performed on the pixel signals in each pixel group. The read operation is still carried out in the manner of reading and processing the signal horizontally by row. After the step of pixel reading control in the current frame ends, immediately enter into the reset step of the next frame.
  • the signal fusion operation and signal reading are performed on the pixel signals in each pixel group, specifically including: (1) As shown in Figure 25, two rows of sub-pixels are used as a pixel row group (two rows of sub-pixels The pixels are half of the pixel group row) and the signal fusion is performed at the same time, and then the signal reading operation is performed. (2) As shown in FIG. 26 , 4 rows of sub-pixels are used as a pixel row group (4 rows of sub-pixels are a pixel group row), and signal fusion is performed at the same time, and then the signal reading operation is performed.
  • control logic of the above-mentioned control method is shown in Figure 16, including: all pixels are reset; all pixels are reset, and exposure is started; all pixels are exposed, and after signal fusion, line-by-line reading is started; Reading ends and one frame is complete.
  • the CIS pixel array (the pixel array includes synthetic pixels)
  • a control scheme for pixel reset, exposure and reading is provided , to achieve the accuracy of the control of CIS, and provide a basis for the wide application of CFA in CIS.
  • the pixel array control method provided in the embodiment of the present application may be executed by a pixel array control device, or a control module in the pixel array control device for executing the pixel array control method.
  • the pixel array control device provided in the embodiment of the present application is described by taking the pixel array control device executing the pixel array control method as an example.
  • An embodiment of the present application provides a control device for a pixel array, the pixel array includes a plurality of pixel groups, each pixel group includes a white pixel and at least two color pixels, the at least two color pixels are arranged around the white pixel, and the pixel
  • the array includes at least two pixel rows and at least two pixel columns, at least two pixel rows share one control signal line, and at least two pixel columns share one output signal line; as shown in FIG. 27 , the pixel array control device 2700 includes Control module 2702, the control module 2702 is used for:
  • the color pixel row is a pixel row including color pixels
  • the white pixel row is a pixel row including white pixels
  • the first preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the pixel’s electrical signal to an initial voltage. Electrical signal output.
  • each pixel row of the pixel array shares one control signal line
  • each pixel column of the pixel array shares one output signal line, specifically including: each row of color pixels shares one pixel control signal, and each row of white pixels
  • the pixels share one pixel control signal; the color pixels of each column share one output signal line, and the white pixels of each column share one output signal line.
  • the control method for the above-mentioned pixel array structure specifically includes: the first control method, each pixel row is sequentially controlled for reset, exposure and reading within one frame time.
  • the color pixel rows are sequentially reset, exposed and read within one frame time, and at the same time, each white pixel row is controlled to perform reset, exposure and read control synchronously with its adjacent color pixel rows.
  • a rolling shutter exposure method is used without pixel signal fusion, and a control scheme for pixel reset, exposure, and reading is provided, which realizes the CIS
  • the accuracy of the control provides the basis for the wide application of CFA in CIS.
  • control module 2702 is also used for: when the pixel array adopts the rolling shutter exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, Within each frame time, control the pixels of multiple rows of pixel clusters to perform the second preset processing sequentially; wherein, the second preset processing sequentially includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the pixel cluster’s The electrical signal of the white pixel is fused with the electrical signal of at least one color pixel of the pixel group to enhance the electrical signal of the color pixel and output the electrical signal of the pixel.
  • control module 2702 is also used for: in the case that the pixel array adopts the global shutter pixel exposure method, within each frame time, the pixels of multiple pixel rows of the pixel array are controlled to simultaneously A third preset process, wherein the third preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; and controlling the electrical signal of the pixels in multiple pixel rows to output sequentially.
  • control module 2702 is also used for: when the pixel array adopts the global shutter pixel exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, Within each frame time, control the pixels of multiple pixel rows of the pixel array to perform the fourth preset process synchronously, wherein the fourth preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; controlling each In the pixel group, the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel to enhance the electrical signal of the color pixel; the electrical signals of the pixels controlling multiple pixel rows are sequentially output.
  • the control module 2702 is also used for: when the pixel array adopts the rolling shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, each In the frame time, the sub-pixels of multiple pixel rows of the control pixel array are sequentially subjected to the fifth preset processing; wherein, the pixel row only includes sub-color pixels, or includes sub-white pixels and sub-color pixels, and the pixel column only includes sub-color pixels, Or include sub-white pixels and sub-color pixels, the fifth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, and outputting the electrical signal of the sub-pixel.
  • control module 2702 is also used for: when the pixel array adopts the rolling shutter exposure method, and the electrical signal of the sub-white pixel is combined with the electrical signal of at least one sub-color pixel , according to the order of the pixel array from top to bottom, set every Q pixel row as a first pixel row group, then get multiple first pixel row groups, where Q is equal to 2 or 4; in each frame time, control The sub-pixels of the plurality of first pixel row groups sequentially perform sixth preset processing; wherein, the sixth preset processing sequentially includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, setting the first pixel The electrical signal of the sub-white pixel in the row group is combined with the electrical signal of at least one sub-color pixel in the first pixel row group to enhance the electrical signal of the sub-color pixel and output the electrical signal of the sub-pixel.
  • control module 2702 is also used for: when the pixel array adopts the global shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, in each frame Within a certain period of time, control the sub-pixels of multiple pixel rows of the pixel array to perform the seventh preset processing synchronously, wherein the seventh preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light; The electrical signals of the sub-pixels of each pixel row are sequentially output.
  • control module 2702 is also used for: when the pixel array adopts the global shutter pixel exposure method, and the electrical signal of the sub-white pixel is fused with the electrical signal of at least one sub-color pixel , within each frame time, control the pixels of multiple pixel rows of the pixel array to perform the eighth preset processing synchronously, wherein the eighth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light ;According to the order of the pixel array from top to bottom, every S pixel rows are set as a second pixel row group, then multiple second pixel row groups are obtained, and in each second pixel row group, sub-white pixels are controlled The electrical signal of the sub-color pixel is fused with the electrical signal of at least one sub-color pixel to enhance the electrical signal of the sub-color pixel, wherein S is equal to 2 or 4; the electrical signals of sub-pixels controlling multiple pixel rows are sequentially output.
  • the device 2700 for controlling the pixel array in the embodiment of the present application may be a device, or may be a component, an integrated circuit or a chip in a terminal.
  • the device may be a mobile electronic device or a non-mobile electronic device.
  • the mobile electronic device can be a mobile phone, a tablet computer, a notebook computer, a handheld computer, a vehicle electronic device, a wearable device, an ultra-mobile personal computer (Ultra-Mobile Personal Computer, UMPC), a netbook or a personal digital assistant (Personal Digital Assistant).
  • non-mobile electronic devices can be servers, network attached storage (Network Attached Storage, NAS), personal computer (Personal Computer, PC), television (Television, TV), teller machine or self-service machine, etc., this application Examples are not specifically limited.
  • Network Attached Storage NAS
  • PC Personal Computer
  • TV Television, TV
  • teller machine or self-service machine etc.
  • the pixel array control device 2700 in the embodiment of the present application may be a device with an operating system.
  • the operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, which are not specifically limited in this embodiment of the present application.
  • the device 2700 for controlling the pixel array provided in the embodiment of the present application can implement various processes implemented in the method embodiments in FIG. 1 to FIG. 26 , and details are not repeated here to avoid repetition.
  • the embodiment of the present application also provides an electronic device 2800, including a processor 2802, a memory 2804, and a program or instruction stored in the memory 2804 and executable on the processor 2802.
  • the program when the instructions are executed by the processor 2802, the various processes of the above-mentioned embodiment of the pixel array control method can be realized, and the same technical effect can be achieved. To avoid repetition, details are not repeated here.
  • the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.
  • FIG. 29 is a schematic diagram of a hardware structure of an electronic device implementing an embodiment of the present application.
  • the electronic device 2900 includes, but is not limited to: a radio frequency unit 2902, a network module 2904, an audio output unit 2906, an input unit 2908, a sensor 2910, a display unit 2912, a user input unit 2914, an interface unit 2916, a memory 2918, and a processor 2920, etc. part.
  • the electronic device 2900 can also include a power supply (such as a battery) for supplying power to various components, and the power supply can be logically connected to the processor 2920 through the power management system, so that the management of charging, discharging, and function can be realized through the power management system. Consumption management and other functions.
  • a power supply such as a battery
  • the structure of the electronic device shown in FIG. 29 does not constitute a limitation to the electronic device.
  • the electronic device may include more or fewer components than shown in the figure, or combine some components, or arrange different components, which will not be repeated here. .
  • the sensor 1510 of the electronic device 1500 includes an image sensor, and the image sensor includes a pixel array, and the pixel array includes a plurality of pixel groups, each pixel group includes a white pixel and at least two color pixels, and the at least two color pixels are arranged on Around the white pixels, the pixel array includes at least two pixel rows and at least two pixel columns, at least two pixel rows share one control signal line, and at least two pixel columns share one output signal line.
  • the processor 2920 is configured to control, within each frame time, when the pixel array adopts the rolling shutter exposure method, the pixel row only includes white pixels or only color pixels, and the pixel column only includes white pixels or only color pixels.
  • the pixels of at least two pixel rows perform the first preset processing in sequence; or, within each frame time, the pixels of multiple color pixel rows of the control pixel array sequentially perform the first preset processing, and control each white color of the pixel array
  • the pixels in the pixel row and the pixels in an adjacent color pixel row are synchronously subjected to the first preset processing;
  • the color pixel row is a pixel row including color pixels
  • the white pixel row is a pixel row including white pixels
  • the first preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the pixel’s electrical signal to an initial voltage. Electrical signal output.
  • each pixel row of the pixel array shares one control signal line
  • each pixel column of the pixel array shares one output signal line, specifically including: each row of color pixels shares one pixel control signal, and each row of white pixels
  • the pixels share one pixel control signal; the color pixels of each column share one output signal line, and the white pixels of each column share one output signal line.
  • the control method for the above-mentioned pixel array structure specifically includes: the first control method, each pixel row is sequentially controlled for reset, exposure and reading within one frame time.
  • the color pixel rows are reset, exposed and read out in sequence within one frame time, and at the same time, each white pixel row is controlled to reset, expose and read out simultaneously with its adjacent color pixel rows.
  • a rolling shutter exposure method is used without pixel signal fusion, and a control scheme for pixel reset, exposure, and reading is provided, which realizes the CIS
  • the accuracy of the control provides the basis for the wide application of CFA in CIS.
  • the processor 2920 is further configured to: when the pixel array adopts a rolling shutter exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, Within each frame time, control the pixels of multiple rows of pixel clusters to perform the second preset processing sequentially; wherein, the second preset processing sequentially includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light, and setting the pixel cluster’s The electrical signal of the white pixel is fused with the electrical signal of at least one color pixel of the pixel group to enhance the electrical signal of the color pixel and output the electrical signal of the pixel.
  • the processor 2920 is further configured to: in the case that the pixel array adopts the global shutter pixel exposure method, within each frame time, control the pixels of multiple pixel rows of the pixel array to perform synchronous A third preset process, wherein the third preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; and controlling the electrical signal of the pixels in multiple pixel rows to output sequentially.
  • the processor 2920 is further configured to: when the pixel array adopts the global shutter pixel exposure method, and the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel, Within each frame time, control the pixels of multiple pixel rows of the pixel array to perform the fourth preset process synchronously, wherein the fourth preset process includes: setting the electrical signal of the pixel to an initial voltage, controlling the pixel to sense light; controlling each In the pixel group, the electrical signal of the white pixel is fused with the electrical signal of at least one color pixel to enhance the electrical signal of the color pixel; the electrical signals of the pixels controlling multiple pixel rows are sequentially output.
  • the processor 2920 is further configured to: when the pixel array adopts a rolling shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, each In the frame time, the sub-pixels of multiple pixel rows of the control pixel array are sequentially subjected to the fifth preset processing; wherein, the pixel row only includes sub-color pixels, or includes sub-white pixels and sub-color pixels, and the pixel column only includes sub-color pixels, Or include sub-white pixels and sub-color pixels, the fifth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, and outputting the electrical signal of the sub-pixel.
  • the processor 2920 is also used for: when the pixel array adopts the rolling shutter exposure method, and the electrical signal of the sub-white pixel is combined with the electrical signal of at least one sub-color pixel , according to the order of the pixel array from top to bottom, set every Q pixel row as a first pixel row group, then get multiple first pixel row groups, where Q is equal to 2 or 4; in each frame time, control The sub-pixels of the plurality of first pixel row groups sequentially perform sixth preset processing; wherein, the sixth preset processing sequentially includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light, setting the first pixel The electrical signal of the sub-white pixel in the row group is combined with the electrical signal of at least one sub-color pixel in the first pixel row group to enhance the electrical signal of the sub-color pixel and output the electrical signal of the sub-pixel.
  • the processor 2920 is further configured to: when the pixel array adopts the global shutter exposure method, the white pixel includes a plurality of sub-white pixels, and the color pixel includes a plurality of sub-color pixels, in each frame Within a certain period of time, control the sub-pixels of multiple pixel rows of the pixel array to perform the seventh preset processing synchronously, wherein the seventh preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light; The electrical signals of the sub-pixels of each pixel row are sequentially output.
  • the processor 2920 is also used for: when the pixel array adopts the global shutter pixel exposure method, and the electrical signal of the sub-white pixel is combined with the electrical signal of at least one sub-color pixel , within each frame time, control the pixels of multiple pixel rows of the pixel array to perform the eighth preset processing synchronously, wherein the eighth preset processing includes: setting the electrical signal of the sub-pixel to an initial voltage, controlling the sub-pixel to sense light ;According to the order of the pixel array from top to bottom, every S pixel rows are set as a second pixel row group, then multiple second pixel row groups are obtained, and in each second pixel row group, sub-white pixels are controlled The electrical signal of the sub-color pixel is fused with the electrical signal of at least one sub-color pixel to enhance the electrical signal of the sub-color pixel, wherein S is equal to 2 or 4; the electrical signals of sub-pixels controlling multiple pixel rows are sequentially output.
  • the radio frequency unit 2902 can be used to send and receive information or send and receive signals during a call, specifically, receive downlink data from a base station or send uplink data to a base station.
  • the radio frequency unit 2902 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier, a duplexer, and the like.
  • the network module 2904 provides users with wireless broadband Internet access, such as helping users to send and receive emails, browse web pages, and access streaming media.
  • the audio output unit 2906 may convert audio data received by the radio frequency unit 2902 or the network module 2904 or stored in the memory 2918 into an audio signal and output as sound. Also, the audio output unit 2906 can also provide audio output related to a specific function performed by the electronic device 2900 (for example, a call signal reception sound, a message reception sound, etc.).
  • the audio output unit 2906 includes a speaker, a buzzer, a receiver, and the like.
  • the input unit 2908 is used to receive audio or video signals.
  • the input unit 2908 may include a graphics processor (Graphics Processing Unit, GPU) 29082 and a microphone 29084, and the graphics processor 29082 is used for still pictures or video images obtained by an image capture device (such as a camera) in video capture mode or image capture mode
  • the data is processed.
  • the processed image frames can be displayed on the display unit 2912 , or stored in the memory 2918 (or other storage medium), or sent via the radio frequency unit 2902 or the network module 2904 .
  • the microphone 29084 can receive sound, and can process the sound into audio data, and the processed audio data can be converted into a format that can be sent to the mobile communication base station via the radio frequency unit 2902 for output in the case of a phone call mode.
  • Electronic device 2900 also includes at least one sensor 2910, such as a fingerprint sensor, pressure sensor, iris sensor, molecular sensor, gyroscope, barometer, hygrometer, thermometer, infrared sensor, light sensor, motion sensor, and other sensors.
  • sensor 2910 such as a fingerprint sensor, pressure sensor, iris sensor, molecular sensor, gyroscope, barometer, hygrometer, thermometer, infrared sensor, light sensor, motion sensor, and other sensors.
  • the display unit 2912 is used to display information input by the user or information provided to the user.
  • the display unit 2912 may include a display panel 29122, and the display panel 29122 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like.
  • the user input unit 2914 can be used to receive input number or character information, and generate key signal input related to user settings and function control of the electronic device.
  • the user input unit 2914 includes a touch panel 29142 and other input devices 29144 .
  • the touch panel 29142 is also called a touch screen, which can collect user's touch operations on or near it.
  • the touch panel 29142 may include two parts, a touch detection device and a touch controller. Among them, the touch detection device detects the user's touch orientation, and detects the signal brought by the touch operation, and transmits the signal to the touch controller; the touch controller receives the touch information from the touch detection device, converts it into contact coordinates, and sends it to the To the processor 2920, receive the command sent by the processor 2920 and execute it.
  • Other input devices 29144 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, switch buttons, etc.), trackballs, mice, and joysticks, which will not be repeated here.
  • the touch panel 29142 can be covered on the display panel 29122, and when the touch panel 29142 detects a touch operation on or near it, it will be sent to the processor 2920 to determine the type of the touch event, and then the processor 2920 according to the touch The type of event provides a corresponding visual output on the display panel 29122.
  • the touch panel 29142 and the display panel 29122 can be used as two independent components, or can be integrated into one component.
  • the interface unit 2916 is an interface for connecting an external device to the electronic device 2900 .
  • an external device may include a wired or wireless headset port, an external power (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device with an identification module, audio input/output (I/O) ports, video I/O ports, headphone ports, and more.
  • the interface unit 2916 can be used to receive input from an external device (for example, data information, power, etc.) transfer data between devices.
  • the memory 2918 can be used to store software programs as well as various data.
  • the memory 2918 can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application program required by a function (such as a sound playback function, an image playback function, etc.); Data created by the use of mobile terminals (such as audio data, phonebook, etc.) and the like.
  • the memory 2918 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage devices.
  • the processor 2920 performs various functions and processes data of the electronic device 2900 by running or executing software programs and/or modules stored in the memory 2918, and calling data stored in the memory 2918, so as to monitor the electronic device 2900 as a whole .
  • the processor 2920 may include one or more processing units; preferably, the processor 2920 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface and application programs, etc., and the modem processor The processor mainly handles wireless communication.
  • the embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, each process of the above embodiment of the pixel array control method is realized, and the same To avoid repetition, the technical effects will not be repeated here.
  • a readable storage medium includes a computer-readable storage medium, such as a computer read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, and the like.
  • ROM computer read-only memory
  • RAM random access memory
  • magnetic disk or an optical disk and the like.
  • the embodiment of the present application further provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run programs or instructions to realize the various processes of the above-mentioned pixel array control method embodiment, and can achieve The same technical effects are not repeated here to avoid repetition.
  • chips mentioned in the embodiments of the present application may also be called system-on-chip, system-on-chip, system-on-a-chip, or system-on-a-chip.
  • the term “comprising”, “comprising” or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article or apparatus comprising a set of elements includes not only those elements, It also includes other elements not expressly listed, or elements inherent in the process, method, article, or device. Without further limitations, an element defined by the phrase “comprising a " does not preclude the presence of additional identical elements in the process, method, article, or apparatus comprising that element.
  • the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved. Functions are performed, for example, the described methods may be performed in an order different from that described, and various steps may also be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Color Television Image Signal Generators (AREA)

Abstract

一种像素阵列（700）的控制方法、装置、电子设备和可读存储介质。像素阵列（700）包括多个像素团（100，602），像素团（100,602）包括一个白色像素（108，208）和至少两个彩色像素（102,104,106,202,204,206），至少两个彩色像素（102,104,106,202,204,206）围绕白色像素（108，208）设置，像素阵列（700）的至少两个像素行共用一个控制信号线路，像素阵列（700）的至少两个像素列共用一个输出信号线路；像素阵列（700）的控制方法包括：在像素阵列（700）采用卷帘快门曝光方式，像素行包括白色像素（108,208）或彩色像素（102,104,106,202,204,206），像素列包括白色像素（108，208）或彩色像素（102,104,106,202,204,206）的情况下，在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或控制像素阵列（700）的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列（700）的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理（502）。

Description

像素阵列的控制方法、装置、电子设备和可读存储介质
相关申请的交叉引用
本申请要求于2021年8月25日提交的申请号为202110984571.3，发明名称为“像素阵列的控制方法、装置、电子设备和可读存储介质”的中国专利申请的优先权，其通过引用方式全部并入本申请。
技术领域
本申请属于电子设备技术领域，具体涉及一种像素阵列的控制方法、像素阵列的控制装置、电子设备和可读存储介质。
背景技术
目前，由发光二极管(Light Emitting Diode，LED)显示技术启发的五像素的彩色滤光片阵列(Color Filter Array，CFA)，即RGBW3.0，其解决了柯达RGBW CFA、拜耳RGB CFA等传统CFA架构在应用上的诸多弊病(例如色彩分辨率下降等)。然而，RGBW3.0的结构相比于传统CFA架构发生了较大的变化，目前没有对应的像素阵列控制方案，导致无法对RGBW3.0进行精准控制。
发明内容
本申请实施例的目的是提供一种像素阵列的控制方法、像素阵列的控制装置、电子设备和可读存储介质，能够解决相关技术中没有对应的像素阵列控制方案导致无法对彩色滤光片阵列进行精准控制的问题。
第一方面，本申请实施例提供了一种像素阵列的控制方法，该像素阵列包括多个像素团，每个像素团包括一个白色像素和至少两个彩色像素，至少两个彩色像素围绕白色像素设置，像素阵列包括至少两个像素行和至少两个 像素列，至少两个像素行共用一个控制信号线路，至少两个像素列共用一个输出信号线路；该控制方法包括：在像素阵列采用卷帘快门曝光方式，像素行包括白色像素或彩色像素，像素列包括白色像素或彩色像素的情况下，在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或者，在每帧时间内，控制像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理；其中，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线以及将像素的电信号输出。
第二方面，本申请实施例提供了一种像素阵列的控制装置，该像素阵列包括多个像素团，每个像素团包括一个白色像素和至少两个彩色像素，至少两个彩色像素围绕白色像素设置，像素阵列包括至少两个像素行和至少两个像素列，至少两个像素行共用一个控制信号线路，至少两个像素列共用一个输出信号线路；该控制装置包括控制模块，控制模块用于：
在像素阵列采用卷帘快门曝光方式，像素行仅包括白色像素或仅包括彩色像素，像素列仅包括白色像素或仅包括彩色像素的情况下，在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或者，在每帧时间内，控制像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理；其中，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线以及将像素的电信号输出。
第三方面，本申请实施例提供了一种电子设备，该电子设备包括处理器、存储器及存储在存储器上并可在处理器上运行的程序或指令，程序或指令被处理器执行时实现如第一方面的方法的步骤。
第四方面，本申请实施例提供了一种可读存储介质，可读存储介质上存储程序或指令，程序或指令被处理器执行时实现如第一方面的方法的步骤。
第五方面，本申请实施例提供了一种芯片，芯片包括处理器和通信接口，通信接口和处理器耦合，处理器用于运行程序或指令，实现如第一方面的方法。
在本申请实施例中，像素阵列的每个像素行共用一个控制信号线路，像素阵列的每个像素列共用一个输出信号线路，具体包括：每一行的彩色像素共用一个像素控制信号，每一行的白色像素共用一个像素控制信号；每一列的彩色像素共用一个输出信号线路，每一列的白色像素共用一个输出信号线路。针对上述像素阵列结构的控制方法具体包括：第一种控制方式，1帧时间内每个像素行依次进行重置、曝光以及读取控制。第二种控制方式，1帧时间内彩色像素行依次进行重置、曝光以及读取控制，同时控制每个白色像素行与其相邻的彩色像素行同步进行重置、曝光以及读取控制。在本申请实施例中，针对互补金属氧化半导体图像传感器(Complementary Metal-Oxide Semiconductor Image Sensor，CIS)像素阵列，在采用卷帘快门的曝光方式且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
附图说明
图1是本申请实施例的互补金属氧化半导体图像传感器像素阵列排布以及像素团排布示意图；
图2是本申请实施例的互补金属氧化半导体图像传感器的像素的结构示意图之一；
图3是本申请实施例的互补金属氧化半导体图像传感器的像素的结构示意图之二；
图4是本申请实施例的互补金属氧化半导体图像传感器的像素电路阵列架构示意图；
图5是本申请实施例的像素阵列的控制方法的流程示意图；
图6是本申请实施例的像素电路阵列的结构示意图之一；
图7是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的控制逻辑示意图之一；
图8是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的流程示意图之一；
图9是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的控制逻辑示意图之二；
图10是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的流程示意图之二；
图11是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素阵列控制方法的控制逻辑示意图之一；
图12是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素阵列控制方法的流程示意图之一；
图13是本申请实施例的采用全局快门方式且未使用像素信号合成的像素阵列控制方法的控制逻辑示意图之一；
图14是本申请实施例的采用全局快门方式且未使用像素信号合成的像素阵列控制方法的流程示意图；
图15是本申请实施例的采用全局快门方式且使用像素信号合成的像素阵列控制方法的控制逻辑示意图之一；
图16是本申请实施例的采用全局快门方式且使用像素信号合成的像素阵列控制方法的流程示意图；
图17是本申请实施例的像素电路阵列的结构示意图之二；
图18是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的控制逻辑示意图之三；
图19是本申请实施例的采用卷帘快门方式且未使用像素信号合成的像素阵列控制方法的流程示意图之三；
图20是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素 阵列控制方法的控制逻辑示意图之二；
图21是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素阵列控制方法的流程示意图之二；
图22是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素阵列控制方法的控制逻辑示意图之三；
图23是本申请实施例的采用卷帘快门方式且使用像素信号合成的像素阵列控制方法的流程示意图之三；
图24是本申请实施例的采用全局快门方式且未使用像素信号合成的像素阵列控制方法的控制逻辑示意图之二；
图25是本申请实施例的采用全局快门方式且使用像素信号合成的像素阵列控制方法的控制逻辑示意图之二；
图26是本申请实施例的采用全局快门方式且使用像素信号合成的像素阵列控制方法的控制逻辑示意图之三；
图27是本申请实施例的像素阵列的控制装置的示意框图；
图28是本申请实施例的电子设备的示意框图之一；
图29是本申请实施例的电子设备的示意框图之二。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关 系。
采用RGBW3.0的CIS的像素阵列(Pixel Array)是由像素团构成的。如图1所示，每一个像素团100拥有5个像素(Pixel)，其中4个有色像素(即彩色像素)，包括红色像素102、蓝色像素104和两个绿色像素106，均为“L”形状，而无色透明的白色像素108则仍为正方形，白色像素108位于像素团100的正中心，由4个“L”型的有色像素包裹环绕。在每一个有色像素的彩色滤光片下为感光元件，例如光电二极管，其作用为将彩色滤光片滤出的光线转换为用于后端处理的电学信号，例如电流、电压、电势能等。
而在现代的CIS制造工艺中，异形像素(即“L”型)由于其工艺和良率问题，目前仍然无法大规模应用在消费类CIS产品中。为了成功实践，RGBW3.0中的“L”型有色像素被拆分为多个矩形像素。如图2和图3所示，为两种方案。如图2所示，在方案1中，红区域202、蓝区域204、绿色区域206均由3个像素构成。而中间的白色区域208则由4个像素构成，每个像素的大小均一致。如图3所示，在方案2中，每个有色区域则由5个像素构成，而中心的白色区域208则由16个像素构成。不论上述何种方法，绿色像素，红色像素，蓝色像素的个数比值不变，始终为2:1:1。然而由于白色像素的个数变化，使得白色区域在像素团区域的占比改变，方法1中白色像素与有色像素的比值为1：3，方法2中白色像素与有色像素的比值为4：5。
采用RGBW3.0的CIS像素电路阵列架构如图4所示，每一行像素均共享一组像素控制信号，像素控制信号包括：像素重置信号(φrst)，用于控制像素的重置时间，电荷转移开关信号(φtran)，用于控制像素的曝光时间，以及像素信号读取开关信号(φsel)，用于控制像素的读取时间，像素控制信号由像素控制信号生成模块402生成。每一列像素共用一个像素输出信号(Vout)传输线路，每一行像素将轮流使用此共享的传输线路传输Vout至后端信号处理电路。
对于每一个像素，都包含了一个像素电路。如图4所示，像素电路404包括4晶体管有源像素感应(Active Pixel Sensor，APS)电路，其中感光的光电 二极管(Photodiode，PD)将光线转换成电子后通过电荷转移晶体管(由φtran控制其开关)转移至浮动扩散(Floating Diffusion，FD)区域。当像素被选择读取时(φsel电平拉高)，FD中的电荷量被由Msf以及Msel组成的源跟随器(Source Follower)读为电压信号并输出为Vout。
目前，由于RGBW3.0CFA像素的结构发生了较大的变化，导致其目前并没有对应的像素阵列控制方案。而本申请提供的像素阵列的控制方法、像素阵列的控制装置、电子设备和可读存储介质即可解决上述问题。
下面结合附图，通过具体的实施例及其应用场景对本申请实施例提供的像素阵列的控制方法、像素阵列的控制装置、电子设备和可读存储介质进行详细地说明。
本申请实施例提供一种像素阵列的控制方法，该像素阵列包括多个像素团，每个像素团包括一个白色像素和至少两个彩色像素，至少两个彩色像素围绕白色像素设置，像素阵列包括至少两个像素行和至少两个像素列，至少两个像素行共用一个控制信号线路，至少两个像素列共用一个输出信号线路；如图5所示，该控制方法包括：
步骤502，在像素阵列采用卷帘快门曝光方式，像素行包括白色像素或彩色像素，像素列包括白色像素或彩色像素的情况下，在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或者，在每帧时间内，控制像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理。
其中，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线以及将像素的电信号输出。
在该实施例中，像素阵列的每个像素行共用一个控制信号线路，像素阵列的每个像素列共用一个输出信号线路，具体包括：每一行的彩色像素共用一个像素控制信号，每一行的白色像素共用一个像素控制信号；每一列的彩 色像素共用一个输出信号线路，每一列的白色像素共用一个输出信号线路。
示例性地，本申请实施例中，像素阵列600以及像素阵列600对应的像素电路阵列700的电路结构，如图6所示。像素电路阵列700由多个像素团电路702构成，一个像素团电路702由多个像素电路704构成(像素阵列600中的一个像素团602对应一个像素团电路702，像素阵列600中的一个像素对应一个像素电路704)，每一行像素电路均由像素控制信号生成模块800进行控制。
像素行包括白色像素或彩色像素、像素列包括白色像素或彩色像素的情况，相当于，每一行的彩色像素共用一个像素控制信号(也即控制信号线路)，每一行的白色像素共用一个像素控制信号(也即控制信号线路)，每一行白色像素共用的像素控制信号与每一行彩色像素共用的像素控制信号相互独立。以及，每一列像素输出的信号共用一条信号传输线路(也即输出信号线路)，而且彩色像素的输出信号线路与白色像素的输出信号线路相互独立。信号传输线路将每列的输出信号(Vout)传输至像素输出信号处理模块900，由像素输出信号处理模块900进行处理。
本申请实施例提供了一种RGBW的像素电路阵列架构，相对于传统的像素电路阵列，实现了对像素电路阵列的重新布局。一方面，此像素电路阵列架构适用于CFA类型(例如，RGBW3.0CFA)，解决了CFA无法使用传统的像素电路阵列的问题，为CFA在CIS上的广泛应用提供基础；另一方面，实现了彩色像素与白色像素之间信号的独立处理，在适配采用CFA像素结构的同时，有效地避免了彩色像素与白色像素间信号的串扰，提高了图像传感器的灵敏度。
对于采用了图6所示像素阵列结构的像素阵列的一种控制方法，具体为，在每帧时间内，控制像素阵列的多个像素行依次进行第一预设处理，也即，在每帧时间内，根据第一控制信号控制第j个像素行的像素进行第一预设处理，在第j个像素行的像素进行像素重置之后，根据第二控制信号，控制第j+1个像素行的像素进行第一预设处理。其中，i、j、N为正整数，j大于或等 于1，且小于或等于N-1，N为像素阵列中像素行的数量，第一预设处理依次包括：像素重置、像素曝光、像素读取。
对于采用了图6所示像素阵列结构的像素阵列的另一种控制方法，具体为，在每帧时间内，控制像素阵列的多个彩色像素行依次进行第一预设处理且控制每个白色像素行与其相邻的彩色像素行同步进行第一预设处理，也即，在每帧时间内，根据第三控制信号控制第p个彩色像素行的像素进行第一预设处理，在第p个彩色像素行的像素进行像素重置之后，根据第四控制信号控制第p+1个彩色像素行的像素进行第一预设处理。其中，白色像素行的像素的光电二极管与其相邻的一个彩色像素行的像素的光电二极管同时进行第一预设处理，p为正整数，p大于或等于1，且小于或等于(2×M/3)-1，M为像素阵列中像素行的数量，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理依次包括：像素重置、像素曝光、像素读取。
需要说明的是，像素行的像素包括白色像素或彩色像素。第一预设处理依次包括像素重置、像素曝光和像素读取。像素重置是指，将像素行的像素在上一帧中的电压信号重置为初始电压；像素曝光是指，控制像素行的像素感光，从而使得像素的电信号从初始电压发生变化；像素读取是指，将变化后的电信信号通过输出信号线路输出。
示例性地，针对采用了图6所示像素阵列结构的像素阵列控制方法，如图7和图9所示。具体地，图7和图9所示的是两种采用卷帘快门方式，且未使用像素信号合成(即白色像素与彩色像素融合)的像素阵列控制方法。所有像素在一帧时间内均被来自像素控制信号生成模块生成的像素控制信号(例如，像素重置信号φrst、电荷转移开关信号φtran以及像素信号读取开关信号φsel)控制完成重置、曝光以及读取三个步骤。
第一种控制方法为，1帧时间内每个像素行依次进行重置、曝光以及读取控制。也即，如图7所示，有色像素(即彩色像素R、G、B)横行与白色像素(W)横行交替进行重置、曝光以及读取控制。每一横行的像素与其他横行 的像素在各个步骤上均不对齐，且每一横行的像素在完成读取控制步骤后，立即进入下一帧的重置步骤。
如图8所示，上述第一种控制方式的控制逻辑包括：第1横行像素重置、上一帧最后横行像素读取；第1横行像素曝光、第2横行像素重置；第2横行像素曝光、第3横行像素重置；以此类推，直至倒数第2横行像素读取、最后横行像素曝光。
第二种控制方式的控制逻辑包括：1帧时间内彩色像素行依次进行重置、曝光以及读取控制，同时控制每个白色像素行与其相邻的彩色像素行同步进行重置、曝光以及读取控制。也即，如图9所示，彩色像素(R、G、B)横行依次进行重置、曝光以及读取控制，同时白色像素行与其所对应的彩色像素横行同步，每一横行的像素在完成读取控制步骤后，立即进入下一帧的重置步骤。需要说明的是，对于一个白色像素，其所对应的彩色像素指的是，与其在同一个像素团内的彩色像素。
如图10所示，上述第二种控制方式的控制逻辑包括：第1横行和第2横行像素重置、上一帧最后横行像素读取；第3横行像素重置、第1横行和第2横行像素曝光；第4横行和第5横行像素重置、第3横行像素曝光；以此类推，直至倒数第3横行和倒数第2横行像素读取、最后横行像素曝光。
在该实施例中，针对CIS像素阵列(该像素阵列中采用“L型”彩色像素)，在采用卷帘快门的曝光方式，且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用卷帘快门曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制多行像素团的像素依次进行第二预设处理；其中，第二预设处理依次包括：将像素的电信号设置为初始电压、控制像素感测光线、将像素团的白色像素的电信号与像素团的至少一个彩色像素的电信号进行信号融合以增强彩色像素的电信号、将像素的电信号输出。
在该实施例中，如果使用像素信号融合，也即，将每一个像素团中的白色像素产生的信号融合进1个或多个彩色像素中，则其相应的像素阵列控制方法如图11所示。由于每个像素团涵盖了3个像素行，因此每3个像素行的像素统一进行重置和曝光，且相邻3个像素行的像素均不对齐。曝光完成后进入信号融合时段，每一个像素团内的白色像素的电信号与一个或多个彩色像素的电信号进行信号融合操作，以增强彩色像素的电信号，使彩色像素对应的图像更亮。融合操作完成后进入信号读取时段，像素团内合成后的像素信号被读取至像素信号处理模块进行后续处理。当前帧像素读取控制的步骤结束后，立即进入下一帧的重置步骤。
如图12所示，上述控制方式的控制逻辑包括：第1、2、3横行像素重置以及上一帧倒数第3、2、1横行像素读取；第4、5、6横行像素重置以及第1、2、3横行像素曝光；第7、8、9横行像素重置以及第4、5、6横行像素曝光；以此类推，直至倒数第6、5、4横行像素读取以及倒数第3、2、1横行像素曝光。
在该实施例中，针对CIS像素阵列(该像素阵列中采用“L型”彩色像素)，在采用卷帘快门的曝光方式，且使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用全局快门像素曝光方式的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第三预设处理，其中第三预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制多个像素行的像素的电信号依次进行输出。
在该实施例中，使用全局快门曝光方式且未进行像素信号融合的像素阵列控制方法如图13所示。每一行像素，不论是彩色像素行还是白色像素行均统一进行重置、曝光和读取。其中，在读取期间虽然所有的横行像素读取期对齐，但是读取是按照逐横行信号读取与处理的方式进行(只是读取期统一 划分而已)。当所有的像素信号均读取完毕后，当前帧结束，并紧接着下一帧像素重置步骤。
如图14所示，上述控制方式的控制逻辑包括：所有像素重置；所有像素重置结束，开始曝光；所有像素曝光结束，开始逐行读取；以此类推，直至所有像素读取结束，一帧完成。
在该实施例中，针对CIS像素阵列(该像素阵列中采用“L型”彩色像素)，在采用全局快门的曝光方式、且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用全局快门像素曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第四预设处理，其中第四预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制每个像素团中，白色像素的电信号与至少一个彩色像素的电信号进行信号融合，以增强彩色像素的电信号；控制多个像素行的像素的电信号依次进行输出。
在该实施例中，如果使用像素信号融合，也即，将每一个像素团中的白色像素产生的信号融合进1个或多个彩色像素中，则其相应的像素阵列控制方法如图15所示。仍然是所有横行像素统一进行重置、曝光。在读取时段每一个像素团内的白色像素的电信号与1个或多个彩色像素的电信号进行信号融合操作，以增强彩色像素的电信号，使彩色像素对应的图像更亮。融合操作完成后进入信号读取时段，读取操作仍然按照逐横行信号读取与处理的方式进行。当前帧像素读取控制的步骤结束后，立即进入下一帧的重置步骤。
如图16所示，上述控制方式的控制逻辑包括：所有像素重置；所有像素重置结束，开始曝光；所有像素曝光结束，进行信号融合后开始逐行读取；以此类推，直至所有像素读取结束，一帧完成。
在该实施例中，针对CIS像素阵列(该像素阵列中采用“L型”彩色像 素)，在采用全局快门的曝光方式、且使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用卷帘快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素依次进行第五预设处理；其中，像素行仅包括子彩色像素，或包括子白色像素和子彩色像素，像素列仅包括子彩色像素，或包括子白色像素和子彩色像素，第五预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线以及将子像素的电信号输出。
在该实施例中，对于合成像素方案，也即，将白色像素拆分为多个矩形子白色像素、将彩色像素拆分为多个矩形子彩色像素的方案(如图2和图3所示)，以如图2中所示的结构为例，每个像素团中含有16个子像素，因此如图17所示，像素阵列600的每个像素团602中含有16个子像素，具体为4个子白色像素和12个子彩色像素。像素阵列600对应的像素电路阵列700由多个像素团电路702构成，一个像素团电路702由多个子像素电路706构成，每一行像素电路均由像素控制信号生成模块800进行控制，每一列像素电路的输出信号传输至像素输出信号处理模块900，由像素输出信号处理模块900进行处理。
像素阵列中，每一行中的子像素包括两种情况，一种为每一行中仅包括子彩色像素，另一种为每一行中包括子白色像素和子彩色像素；每一列中的子像素包括两种情况，一种为每一列中仅包括子彩色像素，另一种为每一列中包括子白色像素和子彩色像素。
像素控制信号生成模块生成的横行像素控制信号被一整行像素(不论是彩色像素还是白色像素)共享。在每一列，每两个相邻像素共享一个像素信号读取电路，两个像素的信号将被选择性读取并由共享列的输出信号线路传输至像素输出信号处理模块进行下一步信号处理。例如，如图17所示，子彩 色像素R1和子彩色像素R3分别处于相邻不同的横行，但他们共享一个像素信号读取电路。由横行像素控制信号进行控制，在不同的时间段，此像素信号读取电路将轮流对子彩色像素R1和子彩色像素R3进行信号读取。以此类推，子彩色像素R2与子白色像素W1共享一个像素信号读取电路，子彩色像素G4与子彩色像素G5共享一个像素信号读取电路。
在使用卷帘快门曝光方式且未进行像素信号融合时，其像素阵列控制方法如图18所示。每一行的子像素相对其他行错开时间进行重置、曝光和读取。
如图19所示，上述控制方式的控制逻辑包括：第1横行像素重置、上一帧最后横行像素读取；第1横行像素曝光、第2横行像素重置；第2横行像素曝光、第3横行像素重置；以此类推，直至倒数第2横行像素读取、最后横行像素曝光。
在该实施例中，针对CIS像素阵列(该像素阵列包括合成像素)，在采用卷帘快门的曝光方式，且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用卷帘快门曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，按照像素阵列由上到下的顺序，将每Q个像素行设置为一个第一像素行组，则得到多个第一像素行组，其中Q等于2或4；在每帧时间内，控制多个第一像素行组的子像素依次进行第六预设处理；其中，第六预设处理依次包括：将子像素的电信号设置为初始电压、控制子像素感测光线、将第一像素行组的子白色像素的电信号与第一像素行组的至少一个子彩色像素的电信号进行信号融合以增强子彩色像素的电信号、将子像素的电信号输出。
在该实施例中，对于合成像素方案，也即，将白色像素拆分为多个矩形子白色像素、将彩色像素拆分为多个矩形子彩色像素的方案(如图2和图3所示)。在一个像素团中，每一个子白色像素与之所在的像素团的其他子像素 可进行像素内信号互联融合。例如，如图17所示，子白色像素W1内的信号可以通过像素间内联线路与子彩色像素R2、子彩色像素R1以及子彩色像素R3进行信号融合。
且需要说明的是，若有实际需要，3个同色像素子彩色像素R2、子彩色像素R1以及子彩色像素R3的信号，也可撇开子白色像素进行融合。融合开关信号同样由像素控制信号生成模块生成提供。
在使用像素信号融合的情况下，有两种不同的像素阵列控制方式。
第一种控制方式，按照像素阵列由上到下的顺序，将每2个像素行设置为一个第一像素行组，则得到多个第一像素行组，在第i帧时间内，控制多个第一像素行组的子像素依次进行第六预设处理。示例性地，如图20所示，以2行子像素为一个像素行组(2行子像素为一半的像素团行)，同时重置、同时曝光。在读取阶段开始时进行像素信号融合，然后进行信号读取。每两组间的控制信号相互独立且不对齐。在当前帧信号读取完成后，立刻进入下一帧。
如图21所示，上述第一种控制方式的控制逻辑包括：第1、2横行像素重置以及上一帧倒数第2、1横行像素读取；第3、4横行像素重置以及第1、2横行像素曝光；第5、6横行像素重置以及第3、4横行像素曝光；以此类推，直至倒数第4、3横行像素读取以及倒数第2、1横行像素曝光。
第二种控制方式为，按照像素阵列由上到下的顺序，将每4个像素行设置为一个第一像素行组，则得到多个第一像素行组，在第i帧时间内，控制多个第一像素行组的子像素依次进行第六预设处理。示例性地，如图22所示，以4行子像素为一个像素行组(4行子像素为一个像素团行)，同时重置、同时曝光。在读取阶段开始时进行像素信号融合，然后进行信号读取。每两组间的控制信号相互独立且不对齐。在当前帧信号读取完成后，立刻进入下一帧。
第二种控制方式与第一种控制方式的主要区别是，第二种控制方式中，像素团上半部分的子白色像素信号可以与下半部分的子白色像素信号进行融 合。也即，在Q等于4的情况下，将每一行像素团中的两个第一像素行组中，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合，以增强子彩色像素的电信号。
如图23所示，上述第二种控制方式的控制逻辑包括：第1、2、3、4横行像素重置以及上一帧倒数第4、3、2、1横行像素读取；第5、6、7、8横行像素重置以及第1、2、3、4横行像素曝光；第9、10、11、12横行像素重置以及第5、6、7、8横行像素曝光；以此类推，直至倒数第8、7、6、5横行像素读取以及倒数第4、3、2、1横行像素曝光。
在该实施例中，针对CIS像素阵列(该像素阵列包括合成像素)，在采用卷帘快门的曝光方式，且使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用全局快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素同步进行第七预设处理，其中第七预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；控制多个像素行的子像素的电信号依次进行输出。
在该实施例中，对于合成像素方案，也即，将白色像素拆分为多个矩形子白色像素、将彩色像素拆分为多个矩形子彩色像素的方案(如图2和图3所示)。在采用全局快门的曝光方式且不使用像素信号融合的情况下，像素阵列控制方式如图24所示。每一行子像素均统一进行重置、曝光和读取。在读取期间虽然所有的横行像素读取期对齐，但是读取是按照逐横行信号读取与处理的方式进行(只是读取期统一划分而已)。当所有的像素信号均读取完毕后，当前帧结束，并紧接着进入下一帧像素重置步骤。
上述控制方式的控制逻辑如图14所示，包括：所有像素重置；所有像素重置结束，开始曝光；所有像素曝光结束，开始逐行读取；以此类推，直至所 有像素读取结束，一帧完成。
在该实施例中，针对CIS像素阵列(该像素阵列包括合成像素)，在采用全局快门的曝光方式且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，该控制方法还包括：在像素阵列采用全局快门像素曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第八预设处理，其中第八预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；按照像素阵列由上到下的顺序，将每S个像素行设置为一个第二像素行组，则得到多个第二像素行组，并控制每个第二像素行组中，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合，以增强子彩色像素的电信号，其中S等于2或4；控制多个像素行的子像素的电信号依次进行输出。
在该实施例中，对于合成像素方案，也即，将白色像素拆分为多个矩形子白色像素、将彩色像素拆分为多个矩形子彩色像素的方案(如图2和图3所示)。在采用全局快门的曝光方式且使用像素信号融合的情况下，像素阵列控制方式如图25和图26所示。所有横行子像素统一进行重置、曝光。在读取时段，根据不同的分组方法，对每一个像素团内的像素信号进行信号融合操作和信号读取操作。读取操作仍然按照逐横行信号读取与处理的方式进行。当前帧像素读取控制的步骤结束后，立即进入下一帧的重置步骤。
根据不同的分组方法，对每一个像素团内的像素信号进行信号融合操作和信号读取，具体包括：(1)如图25所示，以2行子像素为一个像素行组(2行子像素为一半的像素团行)同时进行信号融合，再进行信号读取操作。(2)如图26所示，以4行子像素为一个像素行组(4行子像素为一个像素团行)，同时进行信号融合，再进行信号读取操作。
上述控制方式的控制逻辑如图16所示，包括：所有像素重置；所有像素 重置结束，开始曝光；所有像素曝光结束，进行信号融合后开始逐行读取；以此类推，直至所有像素读取结束，一帧完成。
在该实施例中，针对CIS像素阵列(该像素阵列包括合成像素)，在采用全局快门的曝光方式且使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
值得注意的是，对于像素信号控制均采用了横行像素共享控制信号，竖行像素共享读出信号线路的方式也可以采用竖行像素共享控制信号，横行像素共享读出信号线路的方式。
需要说明的是，本申请实施例提供的像素阵列的控制方法，执行主体可以为像素阵列的控制装置，或者，该像素阵列的控制装置中的用于执行像素阵列的控制方法的控制模块。本申请实施例中以像素阵列的控制装置执行像素阵列的控制方法为例，说明本申请实施例提供的像素阵列的控制装置。
本申请实施例提供一种像素阵列的控制装置，该像素阵列包括多个像素团，每个像素团包括一个白色像素和至少两个彩色像素，至少两个彩色像素设置于白色像素的周围，像素阵列包括至少两个像素行和至少两个像素列，至少两个像素行共用一个控制信号线路，至少两个像素列共用一个输出信号线路；如图27所示，该像素阵列的控制装置2700包括控制模块2702，控制模块2702用于：
在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或者，在每帧时间内，控制像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理；
其中，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线以及将像素的电信号输出。
在该实施例中，像素阵列的每个像素行共用一个控制信号线路，像素阵 列的每个像素列共用一个输出信号线路，具体包括：每一行的彩色像素共用一个像素控制信号，每一行的白色像素共用一个像素控制信号；每一列的彩色像素共用一个输出信号线路，每一列的白色像素共用一个输出信号线路。针对上述像素阵列结构的控制方法具体包括：第一种控制方式，1帧时间内每个像素行依次进行重置、曝光以及读取控制。第二种控制方式，1帧时间内彩色像素行依次进行重置、曝光以及读取控制，同时控制每个白色像素行与其相邻的彩色像素行同步进行重置、曝光以及读取控制。在本申请实施例中，针对CIS像素阵列，在采用卷帘快门的曝光方式且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用卷帘快门曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制多行像素团的像素依次进行第二预设处理；其中，第二预设处理依次包括：将像素的电信号设置为初始电压、控制像素感测光线、将像素团的白色像素的电信号与像素团的至少一个彩色像素的电信号进行信号融合以增强彩色像素的电信号、将像素的电信号输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用全局快门像素曝光方式的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第三预设处理，其中第三预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制多个像素行的像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用全局快门像素曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第四预设处理，其中第四预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制每个像素团中，白色像素的电信号与 至少一个彩色像素的电信号进行信号融合，以增强彩色像素的电信号；控制多个像素行的像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用卷帘快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素依次进行第五预设处理；其中，像素行仅包括子彩色像素，或包括子白色像素和子彩色像素，像素列仅包括子彩色像素，或包括子白色像素和子彩色像素，第五预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线以及将子像素的电信号输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用卷帘快门曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，按照像素阵列由上到下的顺序，将每Q个像素行设置为一个第一像素行组，则得到多个第一像素行组，其中Q等于2或4；在每帧时间内，控制多个第一像素行组的子像素依次进行第六预设处理；其中，第六预设处理依次包括：将子像素的电信号设置为初始电压、控制子像素感测光线、将第一像素行组的子白色像素的电信号与第一像素行组的至少一个子彩色像素的电信号进行信号融合以增强子彩色像素的电信号、将子像素的电信号输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用全局快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素同步进行第七预设处理，其中第七预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；控制多个像素行的子像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，控制模块2702还用于：在像素阵列采用全局快门像素曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素 行的像素同步进行第八预设处理，其中第八预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；按照像素阵列由上到下的顺序，将每S个像素行设置为一个第二像素行组，则得到多个第二像素行组，并控制每个第二像素行组中，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合，以增强子彩色像素的电信号，其中S等于2或4；控制多个像素行的子像素的电信号依次进行输出。
本申请实施例中的像素阵列的控制装置2700可以是装置，也可以是终端中的部件、集成电路或芯片。该装置可以是移动电子设备，也可以为非移动电子设备。示例性的，移动电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、可穿戴设备、超级移动个人计算机(Ultra-Mobile Personal Computer，UMPC)、上网本或者个人数字助理(Personal Digital Assistant，PDA)等，非移动电子设备可以为服务器、网络附属存储器(Network Attached Storage，NAS)、个人计算机(Personal Computer，PC)、电视机(Television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的像素阵列的控制装置2700可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为ios操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
本申请实施例提供的像素阵列的控制装置2700能够实现图1至图26的方法实施例中实现的各个过程，为避免重复，这里不再赘述。
可选的，如图28所示，本申请实施例还提供一种电子设备2800，包括处理器2802，存储器2804，存储在存储器2804上并可在处理器2802上运行的程序或指令，该程序或指令被处理器2802执行时实现上述像素阵列的控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要注意的是，本申请实施例中的电子设备包括上述的移动电子设备和非移动电子设备。
图29为实现本申请实施例的一种电子设备的硬件结构示意图。
该电子设备2900包括但不限于：射频单元2902、网络模块2904、音频输出单元2906、输入单元2908、传感器2910、显示单元2912、用户输入单元2914、接口单元2916、存储器2918、以及处理器2920等部件。
本领域技术人员可以理解，电子设备2900还可以包括给各个部件供电的电源(比如电池)，电源可以通过电源管理系统与处理器2920逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图29中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
其中，电子设备1500的传感器1510包括图像传感器，该图像传感器包括像素阵列，该像素阵列包括多个像素团，每个像素团包括一个白色像素和至少两个彩色像素，至少两个彩色像素设置于白色像素的周围，像素阵列包括至少两个像素行和至少两个像素列，至少两个像素行共用一个控制信号线路，至少两个像素列共用一个输出信号线路。处理器2920，用于在像素阵列采用卷帘快门曝光方式，像素行仅包括白色像素或仅包括彩色像素，像素列仅包括白色像素或仅包括彩色像素的情况下，在每帧时间内，控制至少两个像素行的像素依次进行第一预设处理；或者，在每帧时间内，控制像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制像素阵列的每个白色像素行的像素与其相邻的一个彩色像素行的像素同步进行第一预设处理；
其中，彩色像素行是包括彩色像素的像素行，白色像素行是包括白色像素的像素行，第一预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线以及将像素的电信号输出。
在该实施例中，像素阵列的每个像素行共用一个控制信号线路，像素阵列的每个像素列共用一个输出信号线路，具体包括：每一行的彩色像素共用一个像素控制信号，每一行的白色像素共用一个像素控制信号；每一列的彩色像素共用一个输出信号线路，每一列的白色像素共用一个输出信号线路。针对上述像素阵列结构的控制方法具体包括：第一种控制方式，1帧时间内每个像素行依次进行重置、曝光以及读取控制。第二种控制方式，1帧时间内彩 色像素行依次进行重置、曝光以及读取控制，同时控制每个白色像素行与其相邻的彩色像素行同步进行重置、曝光以及读取控制。在本申请实施例中，针对CIS像素阵列，在采用卷帘快门的曝光方式且不使用像素信号融合的情形下，提供了一种像素重置、曝光以及读取的控制方案，实现了对CIS的控制的准确性，为CFA在CIS上的广泛应用提供基础。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用卷帘快门曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制多行像素团的像素依次进行第二预设处理；其中，第二预设处理依次包括：将像素的电信号设置为初始电压、控制像素感测光线、将像素团的白色像素的电信号与像素团的至少一个彩色像素的电信号进行信号融合以增强彩色像素的电信号、将像素的电信号输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用全局快门像素曝光方式的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第三预设处理，其中第三预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制多个像素行的像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用全局快门像素曝光方式，白色像素的电信号与至少一个彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第四预设处理，其中第四预设处理包括：将像素的电信号设置为初始电压、控制像素感测光线；控制每个像素团中，白色像素的电信号与至少一个彩色像素的电信号进行信号融合，以增强彩色像素的电信号；控制多个像素行的像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用卷帘快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素依次进行第五预设处理；其中，像素行仅包括子彩色像素，或包括子白色像 素和子彩色像素，像素列仅包括子彩色像素，或包括子白色像素和子彩色像素，第五预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线以及将子像素的电信号输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用卷帘快门曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，按照像素阵列由上到下的顺序，将每Q个像素行设置为一个第一像素行组，则得到多个第一像素行组，其中Q等于2或4；在每帧时间内，控制多个第一像素行组的子像素依次进行第六预设处理；其中，第六预设处理依次包括：将子像素的电信号设置为初始电压、控制子像素感测光线、将第一像素行组的子白色像素的电信号与第一像素行组的至少一个子彩色像素的电信号进行信号融合以增强子彩色像素的电信号、将子像素的电信号输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用全局快门曝光方式，白色像素包括多个子白色像素，彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制像素阵列的多个像素行的子像素同步进行第七预设处理，其中第七预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；控制多个像素行的子像素的电信号依次进行输出。
进一步地，在本申请的一个实施例中，处理器2920还用于：在像素阵列采用全局快门像素曝光方式，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制像素阵列的多个像素行的像素同步进行第八预设处理，其中第八预设处理包括：将子像素的电信号设置为初始电压、控制子像素感测光线；按照像素阵列由上到下的顺序，将每S个像素行设置为一个第二像素行组，则得到多个第二像素行组，并控制每个第二像素行组中，子白色像素的电信号与至少一个子彩色像素的电信号进行信号融合，以增强子彩色像素的电信号，其中S等于2或4；控制多个像素行的子像素的电信号依次进行输出。
应理解的是，本申请实施例中，射频单元2902可用于收发信息或收发通话过程中的信号，具体的，接收基站的下行数据或向基站发送上行数据。射频单元2902包括但不限于天线、至少一个放大器、收发信机、耦合器、低噪声放大器、双工器等。
网络模块2904为用户提供了无线的宽带互联网访问，如帮助用户收发电子邮件、浏览网页和访问流式媒体等。
音频输出单元2906可以将射频单元2902或网络模块2904接收的或者在存储器2918中存储的音频数据转换成音频信号并且输出为声音。而且，音频输出单元2906还可以提供与电子设备2900执行的特定功能相关的音频输出(例如，呼叫信号接收声音、消息接收声音等等)。音频输出单元2906包括扬声器、蜂鸣器以及受话器等。
输入单元2908用于接收音频或视频信号。输入单元2908可以包括图形处理器(Graphics Processing Unit，GPU)29082和麦克风29084，图形处理器29082对在视频捕获模式或图像捕获模式中由图像捕获装置(如摄像头)获得的静态图片或视频的图像数据进行处理。处理后的图像帧可以显示在显示单元2912上，或者存储在存储器2918(或其它存储介质)中，或者经由射频单元2902或网络模块2904发送。麦克风29084可以接收声音，并且能够将声音处理为音频数据，处理后的音频数据可以在电话通话模式的情况下转换为可经由射频单元2902发送到移动通信基站的格式输出。
电子设备2900还包括至少一种传感器2910，比如指纹传感器、压力传感器、虹膜传感器、分子传感器、陀螺仪、气压计、湿度计、温度计、红外线传感器、光传感器、运动传感器以及其他传感器。
显示单元2912用于显示由用户输入的信息或提供给用户的信息。显示单元2912可包括显示面板29122，可以采用液晶显示器、有机发光二极管等形式来配置显示面板29122。
用户输入单元2914可用于接收输入的数字或字符信息，以及产生与电子设备的用户设置以及功能控制有关的键信号输入。具体地，用户输入单元2914 包括触控面板29142以及其他输入设备29144。触控面板29142也称为触摸屏，可收集用户在其上或附近的触摸操作。触控面板29142可包括触摸检测装置和触摸控制器两个部分。其中，触摸检测装置检测用户的触摸方位，并检测触摸操作带来的信号，将信号传送给触摸控制器；触摸控制器从触摸检测装置上接收触摸信息，并将它转换成触点坐标，再送给处理器2920，接收处理器2920发来的命令并加以执行。其他输入设备29144可以包括但不限于物理键盘、功能键(比如音量控制按键、开关按键等)、轨迹球、鼠标、操作杆，在此不再赘述。
进一步的，触控面板29142可覆盖在显示面板29122上，当触控面板29142检测到在其上或附近的触摸操作后，传送给处理器2920以确定触摸事件的类型，随后处理器2920根据触摸事件的类型在显示面板29122上提供相应的视觉输出。触控面板29142与显示面板29122可作为两个独立的部件，也可以集成为一个部件。
接口单元2916为外部装置与电子设备2900连接的接口。例如，外部装置可以包括有线或无线头戴式耳机端口、外部电源(或电池充电器)端口、有线或无线数据端口、存储卡端口、用于连接具有识别模块的装置的端口、音频输入/输出(I/O)端口、视频I/O端口、耳机端口等等。接口单元2916可以用于接收来自外部装置的输入(例如，数据信息、电力等等)并且将接收到的输入传输到电子设备2900内的一个或多个元件或者可以用于在电子设备2900和外部装置之间传输数据。
存储器2918可用于存储软件程序以及各种数据。存储器2918可主要包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需的应用程序(比如声音播放功能、图像播放功能等)等；存储数据区可存储根据移动终端的使用所创建的数据(比如音频数据、电话本等)等。此外，存储器2918可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他易失性固态存储器件。
处理器2920通过运行或执行存储在存储器2918内的软件程序和/或模 块，以及调用存储在存储器2918内的数据，执行电子设备2900的各种功能和处理数据，从而对电子设备2900进行整体监控。处理器2920可包括一个或多个处理单元；优选的，处理器2920可集成应用处理器和调制解调处理器，其中，应用处理器主要处理操作系统、用户界面和应用程序等，调制解调处理器主要处理无线通信。
本申请实施例还提供一种可读存储介质，可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述像素阵列的控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，处理器为上述实施例中的电子设备中的处理器。可读存储介质，包括计算机可读存储介质，如计算机只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等。
本申请实施例另提供了一种芯片，芯片包括处理器和通信接口，通信接口和处理器耦合，处理器用于运行程序或指令，实现上述像素阵列的控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。此外，需要指出的是，本申请实施方式中的方法和装置的范围不限按示出或讨论的顺序来执行功能，还可包括根据所涉及的功能按基本同时的方式或按相反的顺序来执行功能，例如，可以按不同于所描述的次序来执行所描述的方法，并且还可以添加、省去、或组合各种步骤。另外，参照某些示例所描述的特征可在其他示例中被组合。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以计算机软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
上面结合附图对本申请的实施例进行了描述，但是本申请并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本申请的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形式，均属于本申请的保护之内。

Claims (19)

  1. 一种像素阵列的控制方法，所述像素阵列包括多个像素团，每个所述像素团包括一个白色像素和至少两个彩色像素，所述至少两个彩色像素围绕所述白色像素设置，所述像素阵列包括至少两个像素行和至少两个像素列，所述至少两个像素行共用一个控制信号线路，所述至少两个像素列共用一个输出信号线路；
    所述控制方法包括：
    在所述像素阵列采用卷帘快门曝光方式，所述像素行包括所述白色像素或所述彩色像素，所述像素列包括所述白色像素或所述彩色像素的情况下，在每帧时间内，控制所述至少两个像素行的像素依次进行第一预设处理；或者，
    在每帧时间内，控制所述像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制所述像素阵列的每个白色像素行的像素与其相邻的一个所述彩色像素行的像素同步进行所述第一预设处理；
    其中，所述彩色像素行是包括所述彩色像素的像素行，所述白色像素行是包括所述白色像素的像素行，所述第一预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线以及将所述像素的电信号输出。
  2. 根据权利要求1所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用卷帘快门曝光方式，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制多行所述像素团的像素依次进行第二预设处理；
    其中，所述第二预设处理依次包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线、将所述像素团的白色像素的电信号与所述像素团的至少一个彩色像素的电信号进行信号融合以增强所述彩色像素的电信号、将所述像素的电信号输出。
  3. 根据权利要求1所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用全局快门像素曝光方式的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第三预设处理，其中所述第三预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线；
    控制多个所述像素行的像素的电信号依次进行输出。
  4. 根据权利要求1所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用全局快门像素曝光方式，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第四预设处理，其中所述第四预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线；
    控制每个所述像素团中，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合，以增强所述彩色像素的电信号；
    控制多个所述像素行的像素的电信号依次进行输出。
  5. 根据权利要求1至4中任一项所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用卷帘快门曝光方式，所述白色像素包括多个子白色像素，所述彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制所述像素阵列的多个像素行的子像素依次进行第五预设处理；
    其中，所述像素行仅包括所述子彩色像素，或包括所述子白色像素和所述子彩色像素，所述像素列仅包括所述子彩色像素，或包括所述子白色像素和所述子彩色像素，所述第五预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线以及将所述子像素的电信号输出。
  6. 根据权利要求5所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用卷帘快门曝光方式，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合的情况下，按照所述像素阵列由上到下的顺序，将每Q个所述像素行设置为一个第一像素行组，则得到多 个所述第一像素行组，其中Q等于2或4；
    在每帧时间内，控制多个所述第一像素行组的子像素依次进行第六预设处理；
    其中，所述第六预设处理依次包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线、将所述第一像素行组的子白色像素的电信号与所述第一像素行组的至少一个子彩色像素的电信号进行信号融合以增强所述子彩色像素的电信号、将所述子像素的电信号输出。
  7. 根据权利要求5所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用全局快门曝光方式，所述白色像素包括多个子白色像素，所述彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的子像素同步进行第七预设处理，其中所述第七预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线；
    控制多个所述像素行的子像素的电信号依次进行输出。
  8. 根据权利要求7所述的像素阵列的控制方法，其中，还包括：
    在所述像素阵列采用全局快门像素曝光方式，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第八预设处理，其中所述第八预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线；
    按照所述像素阵列由上到下的顺序，将每S个所述像素行设置为一个第二像素行组，则得到多个所述第二像素行组，并控制每个所述第二像素行组中，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合，以增强所述子彩色像素的电信号，其中S等于2或4；
    控制多个所述像素行的子像素的电信号依次进行输出。
  9. 一种像素阵列的控制装置，所述像素阵列包括多个像素团，每个所述像素团包括一个白色像素和至少两个彩色像素，所述至少两个彩色像素设置 于所述白色像素的周围，所述像素阵列包括至少两个像素行和至少两个像素列，所述至少两个像素行共用一个控制信号线路，所述至少两个像素列共用一个输出信号线路；
    所述控制装置包括控制模块，所述控制模块用于：
    在所述像素阵列采用卷帘快门曝光方式，所述像素行仅包括所述白色像素或仅包括所述彩色像素，所述像素列仅包括所述白色像素或仅包括所述彩色像素的情况下，在每帧时间内，控制所述至少两个像素行的像素依次进行第一预设处理；或者，
    在每帧时间内，控制所述像素阵列的多个彩色像素行的像素依次进行第一预设处理，以及控制所述像素阵列的每个白色像素行的像素与其相邻的一个所述彩色像素行的像素同步进行所述第一预设处理；
    其中，所述彩色像素行是包括所述彩色像素的像素行，所述白色像素行是包括所述白色像素的像素行，所述第一预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线以及将所述像素的电信号输出。
  10. 根据权利要求9所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用卷帘快门曝光方式，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制多行所述像素团的像素依次进行第二预设处理；
    其中，所述第二预设处理依次包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线、将所述像素团的白色像素的电信号与所述像素团的至少一个彩色像素的电信号进行信号融合以增强所述彩色像素的电信号、将所述像素的电信号输出。
  11. 根据权利要求9所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用全局快门像素曝光方式的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第三预设处理，其中所 述第三预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线；
    控制多个所述像素行的像素的电信号依次进行输出。
  12. 根据权利要求9所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用全局快门像素曝光方式，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第四预设处理，其中所述第四预设处理包括：将所述像素的电信号设置为初始电压、控制所述像素感测光线；
    控制每个所述像素团中，所述白色像素的电信号与至少一个所述彩色像素的电信号进行信号融合，以增强所述彩色像素的电信号；
    控制多个所述像素行的像素的电信号依次进行输出。
  13. 根据权利要求9至12中任一项所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用卷帘快门曝光方式，所述白色像素包括多个子白色像素，所述彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制所述像素阵列的多个像素行的子像素依次进行第五预设处理；
    其中，所述像素行仅包括所述子彩色像素，或包括所述子白色像素和所述子彩色像素，所述像素列仅包括所述子彩色像素，或包括所述子白色像素和所述子彩色像素，所述第五预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线以及将所述子像素的电信号输出。
  14. 根据权利要求13所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用卷帘快门曝光方式，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合的情况下，按照所述像素阵列由上到下的顺序，将每Q个所述像素行设置为一个第一像素行组，则得到多 个所述第一像素行组，其中Q等于2或4；
    在每帧时间内，控制多个所述第一像素行组的子像素依次进行第六预设处理；
    其中，所述第六预设处理依次包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线、将所述第一像素行组的子白色像素的电信号与所述第一像素行组的至少一个子彩色像素的电信号进行信号融合以增强所述子彩色像素的电信号、将所述子像素的电信号输出。
  15. 根据权利要求13所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用全局快门曝光方式，所述白色像素包括多个子白色像素，所述彩色像素包括多个子彩色像素的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的子像素同步进行第七预设处理，其中所述第七预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线；
    控制多个所述像素行的子像素的电信号依次进行输出。
  16. 根据权利要求15所述的像素阵列的控制装置，其中，所述控制模块还用于：
    在所述像素阵列采用全局快门像素曝光方式，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合的情况下，在每帧时间内，控制所述像素阵列的多个所述像素行的像素同步进行第八预设处理，其中所述第八预设处理包括：将所述子像素的电信号设置为初始电压、控制所述子像素感测光线；
    按照所述像素阵列由上到下的顺序，将每S个所述像素行设置为一个第二像素行组，则得到多个所述第二像素行组，并控制每个所述第二像素行组中，所述子白色像素的电信号与至少一个所述子彩色像素的电信号进行信号融合，以增强所述子彩色像素的电信号，其中S等于2或4；
    控制多个所述像素行的子像素的电信号依次进行输出。
  17. 一种电子设备，包括处理器、存储器及存储在所述存储器上并可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如权利要求1至8中任一项所述的像素阵列的控制方法的步骤。
  18. 一种可读存储介质，其上存储有程序或指令，所述程序或指令被处理器执行时实现如权利要求1至8中任一项所述的像素阵列的控制方法的步骤。
  19. 一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求1至8中任一项所述的像素阵列的控制方法。
PCT/CN2022/114716 2021-08-25 2022-08-25 像素阵列的控制方法、装置、电子设备和可读存储介质 Ceased WO2023025232A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202110984571.3A CN113674685B (zh) 2021-08-25 2021-08-25 像素阵列的控制方法、装置、电子设备和可读存储介质
CN202110984571.3 2021-08-25

Publications (1)

Publication Number Publication Date
WO2023025232A1 true WO2023025232A1 (zh) 2023-03-02

Family

ID=78546412

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/114716 Ceased WO2023025232A1 (zh) 2021-08-25 2022-08-25 像素阵列的控制方法、装置、电子设备和可读存储介质

Country Status (2)

Country Link
CN (1) CN113674685B (zh)
WO (1) WO2023025232A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3156970A1 (fr) * 2023-12-19 2025-06-20 Commissariat à l'Energie Atomique et aux Energies Alternatives Dispositif de pilotage d’une interface vidéo pour une matrice de circuits d’affichage

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113674685B (zh) * 2021-08-25 2023-02-24 维沃移动通信有限公司 像素阵列的控制方法、装置、电子设备和可读存储介质
CN115396616B (zh) * 2022-08-30 2025-11-04 维沃移动通信有限公司 像素阵列控制方法、装置及电子设备
CN115396608B (zh) * 2022-08-30 2025-03-18 维沃移动通信有限公司 图像传感器及电子设备

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080129834A1 (en) * 2006-11-28 2008-06-05 Taner Dosluoglu Simultaneous global shutter and correlated double sampling read out in multiple photosensor pixels
CN102449999A (zh) * 2009-06-03 2012-05-09 全视科技有限公司 具有全局及滚动快门过程的成像器
US20120175498A1 (en) * 2011-01-10 2012-07-12 Alexander Krymski Image sensors and methods with shared control lines
CN108141575A (zh) * 2015-05-19 2018-06-08 奇跃公司 半全局快门成像器
CN111447380A (zh) * 2020-05-22 2020-07-24 Oppo广东移动通信有限公司 控制方法、摄像头组件和移动终端
CN112822466A (zh) * 2020-12-28 2021-05-18 维沃移动通信有限公司 图像传感器、摄像模组和电子设备
CN113674685A (zh) * 2021-08-25 2021-11-19 维沃移动通信有限公司 像素阵列的控制方法、装置、电子设备和可读存储介质

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7830437B2 (en) * 2005-05-11 2010-11-09 Aptina Imaging Corp. High fill factor multi-way shared pixel
US7855740B2 (en) * 2007-07-20 2010-12-21 Eastman Kodak Company Multiple component readout of image sensor
JP4951440B2 (ja) * 2007-08-10 2012-06-13 富士フイルム株式会社 撮像装置及び固体撮像素子の駆動方法
KR101391432B1 (ko) * 2008-01-22 2014-05-07 삼성전기주식회사 영상 획득 장치 및 그 방법과 영상 처리 장치 및 그 방법
US8218068B2 (en) * 2009-04-01 2012-07-10 Omnivision Technologies, Inc. Exposing pixel groups in producing digital images
JP5521721B2 (ja) * 2009-08-28 2014-06-18 ソニー株式会社 撮像素子およびカメラシステム
WO2013146311A1 (ja) * 2012-03-28 2013-10-03 富士フイルム株式会社 撮像装置、及びこれを備える内視鏡装置
JP2018033100A (ja) * 2016-08-26 2018-03-01 キヤノン株式会社 画像処理装置及び方法、及び撮像装置
US10334189B1 (en) * 2018-06-06 2019-06-25 Smartsens Technology (Cayman) Co., Ltd. HDR pixel array with double diagonal binning
KR102618490B1 (ko) * 2018-12-13 2023-12-27 삼성전자주식회사 이미지 센서 및 이의 구동 방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080129834A1 (en) * 2006-11-28 2008-06-05 Taner Dosluoglu Simultaneous global shutter and correlated double sampling read out in multiple photosensor pixels
CN102449999A (zh) * 2009-06-03 2012-05-09 全视科技有限公司 具有全局及滚动快门过程的成像器
US20120175498A1 (en) * 2011-01-10 2012-07-12 Alexander Krymski Image sensors and methods with shared control lines
CN108141575A (zh) * 2015-05-19 2018-06-08 奇跃公司 半全局快门成像器
CN111447380A (zh) * 2020-05-22 2020-07-24 Oppo广东移动通信有限公司 控制方法、摄像头组件和移动终端
CN112822466A (zh) * 2020-12-28 2021-05-18 维沃移动通信有限公司 图像传感器、摄像模组和电子设备
CN113674685A (zh) * 2021-08-25 2021-11-19 维沃移动通信有限公司 像素阵列的控制方法、装置、电子设备和可读存储介质

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3156970A1 (fr) * 2023-12-19 2025-06-20 Commissariat à l'Energie Atomique et aux Energies Alternatives Dispositif de pilotage d’une interface vidéo pour une matrice de circuits d’affichage

Also Published As

Publication number Publication date
CN113674685A (zh) 2021-11-19
CN113674685B (zh) 2023-02-24

Similar Documents

Publication Publication Date Title
CN113674685B (zh) 像素阵列的控制方法、装置、电子设备和可读存储介质
WO2022143280A1 (zh) 图像传感器、摄像模组和电子设备
CN101594491B (zh) 固态成像装置、成像装置和固态成像装置的驱动方法
JP6110891B2 (ja) 画像センサにおける画素ビニング
KR101774491B1 (ko) 유기 포토다이오드를 포함하는 유기 픽셀, 이의 제조 방법, 및 상기 유기 픽셀을 포함하는 장치들
JP7645176B2 (ja) イメージセンサ及び移動端末
US12610149B2 (en) Image sensor, control method, control apparatus, electronic device, and storage medium
CN114125237B (zh) 图像传感器、摄像模组、电子设备、图像获取方法及介质
CN106341628A (zh) 具有宽动态范围的图像传感器、像素电路和操作方法
CN103167252A (zh) 固体图像传感器和电子设备
CN108600712B (zh) 一种图像传感器、移动终端及图像拍摄方法
US20230046521A1 (en) Control method, camera assembly, and mobile terminal
US20240187756A1 (en) Image sensor, control method, control apparatus, electronic device, and storage medium
CN112235494B (zh) 图像传感器、控制方法、成像装置、终端及可读存储介质
CN115696078B (zh) 色彩滤波阵列、图像传感器、摄像头模组和电子设备
US20160037101A1 (en) Apparatus and Method for Capturing Images
CN115396608B (zh) 图像传感器及电子设备
US20150296157A1 (en) Image sensing device
KR102374428B1 (ko) 그래픽 센서, 이동 단말 및 그래픽 촬영 방법
CN116801123A (zh) 图像传感器、图像处理装置及智能终端
CN118233774A (zh) 图像处理装置及其操作方法
CN104241309A (zh) 一种模拟随机像素效果的cmos图像像素阵列
WO2023098230A1 (zh) 图像传感器、摄像模组、电子设备、图像生成方法和装置
Lin et al. A dual-mode CMOS image sensor for optical wireless communication
CN104967763B (zh) 一种图像采集器件、图像采集方法及电子设备

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22860578

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 22860578

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 16/08/2024)

122 Ep: pct application non-entry in european phase

Ref document number: 22860578

Country of ref document: EP

Kind code of ref document: A1