WO2023014353A1

WO2023014353A1 - Apparatus and method of a reduced power receiver for wireless communication

Info

Publication number: WO2023014353A1
Application number: PCT/US2021/044421
Authority: WO
Inventors: Ricky Lap Kei CHEUNG; Jian Gu; Li Cong; Jun Ni
Original assignee: Zeku, Inc.
Priority date: 2021-08-03
Filing date: 2021-08-03
Publication date: 2023-02-09
Also published as: WO2023014353A8

Abstract

According to one aspect of the present disclosure, a baseband chip is provided. The baseband chip may include a first set of baseband circuits configured to, in response to a first reception condition, perform first baseband operations. The baseband chip may include a second set of baseband circuits. The second set of baseband circuits may be configured to, in response to a second reception condition, perform second baseband operations.

Description

APPARATUS AND METHOD OF A REDUCED POWER RECEIVER FOR WIRELESS COMMUNICATION

BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatus and method for wireless communication.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. In cellular communication, such as the 4th-gen eration (4G) Long Term Evolution (LTE) and the 5 th- generation (5G) New Radio (NR), the 3rd Generation Partnership Project (3GPP) defines various operations for signal processing.

SUMMARY

[0003] Embodiments of apparatus and method for baseband signal processing are disclosed herein.

[0004] According to one aspect of the present disclosure, a baseband chip is provided. The baseband chip may include a first set of baseband circuits configured to, in response to a first reception condition, perform first baseband operations. The baseband chip may include a second set of baseband circuits. The second set of baseband circuits may be configured to, in response to a second reception condition, perform second baseband operations.

[0005] According to another aspect of the present disclosure, an apparatus of wireless communication of a user equipment (UE) is provided. The apparatus may include an RF chip configured to receive one or more signals from a base station. The apparatus may also include a baseband chip. The baseband chip may include a first set of baseband circuits configured to, in response to a first reception condition, perform first baseband operations. The baseband chip may include a second set of baseband circuits. The second set of baseband circuits may be configured to, in response to a second reception condition, perform second baseband operations.

[0006] According to yet another aspect of the disclosure, a method of wireless communication of a baseband chip is provided. The method may include performing, by a first set of baseband circuits of a baseband chip, first baseband operations in response to a first reception condition. The method may include performing, by a second set of baseband circuits of the baseband chip, second baseband operations in response to a second reception condition. In some embodiments, the first baseband operations mays include a subset of the second baseband operations.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1 illustrates an exemplary wireless network, according to some embodiments of the present disclosure.

[0009] FIG. 2 illustrates a block diagram of an apparatus including a baseband chip, a radio frequency (RF) chip, and a host chip, according to some embodiments of the present disclosure.

[0010] FIG. 3 illustrates a detailed view of the baseband chip of the apparatus of FIG. 2, according to some embodiments of the present disclosure.

[0011] FIG. 4 illustrates a flow chart of an exemplary method of wireless communication, according to some embodiments of the present disclosure.

[0012] FIG. 5 illustrates a block diagram of an exemplary node, according to some embodiments of the present disclosure.

[0013] FIG. 6 illustrates a baseband chip of a conventional UE.

[0014] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0015] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0016] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0017] In general, terminology may be understood at least in part from usage in context. For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0018] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0019] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, wireless local area network (WLAN) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as the Global System for Mobile Communications (GSM). An OFDMA network may implement a RAT, such as LTE or NR. A WLAN system may implement a RAT, such as Wi-Fi. The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0020] In wireless communication, a user equipment typically performs operations associated with cell searching, control channel (CCH) processing, and shared channel (SCH) processing using the baseband chip.

[0021] FIG. 6 illustrates a block diagram of a conventional baseband chip 600 that includes. As shown in FIG. 6, conventional baseband chip 600 includes a single set of baseband circuits 630, as well as main computer processing unit(s) (CPU(s)) 660, an external memory interface 640, and a peripheral device interface 650, just to name a few. Baseband circuits 630 may be configured to perform signal processing, demodulation, and decoding of a signal received from a transmitter, such as a base station. Baseband circuits 630 may include, e.g., a digital front end (DFE) circuit 602, a transmitter (TX) 604, a buffer 608, a search/measurement circuit 606, a channel estimation circuit 612, a channel state information (CSI) feedback circuit 616, a demodulator circuit 626, a control processor(s) 610, a decoder circuit 618, and a static random access memory (SRAM) 614, just to name a few. Conventional baseband chip 600 may also include a radio frequency (RF)/baseband (BB) interface 624 configured to interface (e.g., send and receive) signals with an RF chip.

[0022] DFE circuit 602 may perform operations, e.g., such as digital gain control, digital filtering, downsampling, fast-Fourier transform (FFT), etc. Search/measurement circuit 606 may perform operations associated with serving and neighboring cell search, as well as channel measurement(s) of the serving cell. The associated circuits of conventional baseband chip 600 may perform channel estimation, demodulation and decoding using different algorithms for different channels, e.g., physical broadcast channel (PBCH), physical downlink control channel (PDCCH), and physical downlink shared channel (PDSCH) in 4G and 5G. Channel estimation circuit 612 may estimate the fading channel. Demodulation circuit 626 may demodulate an input signal into one or more log-likelihood ratios (LLRs), which are maintained in buffer 608. Decoder circuit 618 may output an information bit related to a received signal. Control processor(s) 610 may run firmware (or software) to control each of the circuits. TX 604 may generate uplink data. CSI feedback circuit 616 may generate CSI that is sent to the base station.

[0023] One challenge of conventional baseband chip 600 relates to its power consumption. This challenge is made worse during certain reception conditions, e.g., such discontinuous reception (DRX) (e.g., connected mode DRX (CDRX)), low throughput, and PDCCH-only reception.

[0024] More specifically, because baseband circuits 630 of conventional baseband chip 600 are designed for peak throughput scenarios, when conventional baseband chip 600 operates in low-power mode during DRX, low-throughput, and PDCCH-only reception, high-dynamic power is still used, and leakage occurs. Therefore, even during low-power mode, conventional baseband chip 600 is unable to save power due to the peak throughput design of baseband circuits 630. Moreover, control processor(s) 610 use high-power consumption even during low-power mode.

[0025] Thus, there exists an unmet need for a mechanism for performing baseband operations that consume less power during certain reception conditions, e.g., such as DRX, low throughput, and/or PDCCH-only reception.

[0026] To overcome these and other challenges, the baseband chip the present disclosure includes a first set of baseband circuits that can be activated during low-power reception conditions and a second set of baseband circuits that can be activated during regular reception conditions. The first set of baseband circuits may perform a limited set of operations as the corresponding circuits in the second set of baseband circuits, thereby consuming considerably less power during low- power reception conditions. For example, the first set of baseband circuits may be “mini” circuits, meaning that they are each configured to perform a subset or a limited set of baseband operations as compared to the set of more complex baseband circuits of the second set of baseband circuits. A controller of the baseband chip (or elsewhere in the user equipment) may determine when a first reception condition (e.g., DRX, low throughput, PDCCH-only reception) at the user equipment arises. During the first reception condition, the controller may activate a first set of baseband circuits (e.g., “mini” baseband circuits), which enables the second set of baseband circuits and processor(s), to remain in low power mode. On the other hand, when a second reception condition (e.g., non-DRX, high throughput, PDCCH, and PDSCH reception, etc.) arises, the controller may activate a second set of baseband circuits. The more powerful second set of baseband circuits may be able to handle a larger number of component carriers (CCs), perform more complex demodulation, de-spreading, decoding, and channel estimation operations, among others. Using different baseband circuits under different reception conditions provides optimization of power consumption and baseband performance. Additional details of the baseband circuits are described below in connection with FIGs. 1-5. [0027] FIG. 1 illustrates an exemplary wireless network 100, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. As shown in FIG. 1, wireless network 100 may include a network of nodes, such as a user equipment 102, an access node 104, and a core network element 106. User equipment 102 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Intemet-of-Things (loT) node. It is understood that user equipment 102 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0028] Access node 104 may be a device that communicates with user equipment 102, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 104 may have a wired connection to user equipment 102, a wireless connection to user equipment 102, or any combination thereof. Access node 104 may be connected to user equipment 102 by multiple connections, and user equipment 102 may be connected to other access nodes in addition to access node 104. Access node 104 may also be connected to other user equipments. When configured as a gNB, access node 104 may operate in millimeter wave (mmW) frequencies and/or near mmW frequencies in communication with the user equipment 102. When access node 104 operates in mmW or near mmW frequencies, the access node 104 may be referred to as an mmW base station. Extremely high frequency (EHF) is part of the RF in the electromagnetic spectrum. EHF has a range of 30 GHz to 300 GHz and a wavelength between 1 millimeter and 10 millimeters. Radio waves in the band may be referred to as a millimeter wave. Near mmW may extend down to a frequency of 3 GHz with a wavelength of 100 millimeters. The super high frequency (SHF) band extends between 3 GHz and 30 GHz, also referred to as centimeter wave. Communications using the mmW or near mmW radio frequency band have extremely high path loss and a short range. The mmW base station may utilize beamforming with user equipment 102 to compensate for the extremely high path loss and short range. It is understood that access node 104 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0029] Access nodes 104, which are collectively referred to as E-UTRAN in the evolved packet core network (EPC) and as NG-RAN in the 5G core network (5GC), interface with the EPC and 5GC, respectively, through dedicated backhaul links (e.g., SI interface). In addition to other functions, access node 104 may perform one or more of the following functions: transfer of user data, radio channel ciphering and deciphering, integrity protection, header compression, mobility control functions (e.g., handover, dual connectivity), inter-cell interference coordination, connection setup and release, load balancing, distribution for non-access stratum (NAS) messages, NAS node selection, synchronization, radio access network (RAN) sharing, multimedia broadcast multicast service (MBMS), subscriber and equipment trace, RAN information management (RIM), paging, positioning, and delivery of warning messages. Access nodes 104 may communicate directly or indirectly (e.g., through the 5GC) with each other over backhaul links (e.g., X2 interface). The backhaul links may be wired or wireless.

[0030] Core network element 106 may serve access node 104 and user equipment 102 to provide core network services. Examples of core network element 106 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 106 includes an access and mobility management function (AMF), a session management function (SMF), or a user plane function (UPF) of the 5GC for the NR system. The AMF may be in communication with a Unified Data Management (UDM). The AMF is the control node that processes the signaling between the user equipment 102 and the 5GC. Generally, the AMF provides quality-of-service (QoS) flow and session management. All user Internet protocol (IP) packets are transferred through the UPF. The UPF provides UE IP address allocation as well as other functions. The UPF is connected to the IP Services. The IP Services may include the Internet, an intranet, an IP Multimedia Subsystem (IMS), a Streaming Service, and/or other IP services. It is understood that core network element 106 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0031] Core network element 106 may connect with a large network, such as the Internet 108, or another Internet Protocol (IP) network, to communicate packet data over any distance. In this way, data from user equipment 102 may be communicated to other user equipments connected to other access points, including, for example, a computer 110 connected to Internet 108, for example, using a wired connection or a wireless connection, or to a tablet 112 wirelessly connected to Internet 108 via a router 114. Thus, computer 110 and tablet 112 provide additional examples of possible user equipments, and router 114 provides an example of another possible access node. [0032] A generic example of a rack-mounted server is provided as an illustration of core network element 106. However, there may be multiple elements in the core network including database servers, such as a database 116, and security and authentication servers, such as an authentication server 118. Database 116 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 118 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 106, authentication server 118, and database 116, may be local connections within a single rack.

[0033] Each element in FIG. 1 may be considered a node of wireless network 100. More detail regarding the possible implementation of a node is provided by way of example in the description of a node 500 in FIG. 5. Node 500 may be configured as user equipment 102, access node 104, or core network element 106 in FIG. 1. Similarly, node 500 may also be configured as computer 110, router 114, tablet 112, database 116, or authentication server 118 in FIG. 1. As shown in FIG. 5, node 500 may include a processor 502, a memory 504, and a transceiver 506. These components are shown as connected to one another by a bus, but other connection types are also permitted. When node 500 is user equipment 102, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 500 may be implemented as a blade in a server system when node 500 is configured as core network element 106. Other implementations are also possible.

[0034] Transceiver 506 may include any suitable device for sending and/or receiving data. Node 500 may include one or more transceivers, although only one transceiver 506 is shown for simplicity of illustration. An antenna 508 is shown as a possible communication mechanism for node 500. Multiple antennas and/or arrays of antennas may be utilized for receiving multiple spatially multiplex data streams. Additionally, examples of node 500 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 104 may communicate wirelessly to user equipment 102 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 106. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0035] As shown in FIG. 5, node 500 may include processor 502. Although only one processor is shown, it is understood that multiple processors can be included. Processor 502 may include microprocessors, microcontroller units (MCUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 502 may be a hardware device having one or more processing cores. Processor 502 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software. [0036] As shown in FIG. 5, node 500 may also include memory 504. Although only one memory is shown, it is understood that multiple memories can be included. Memory 504 can broadly include both memory and storage. For example, memory 504 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (EEPROM), compact disc read only memory (CD-ROM) or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 502. Broadly, memory 504 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium.

[0037] Processor 502, memory 504, and transceiver 506 may be implemented in various forms in node 500 for performing wireless communication functions. In some embodiments, processor 502, memory 504, and transceiver 506 of node 500 are implemented (e.g., integrated) on one or more system-on-chips (SoCs). In one example, processor 502 and memory 504 may be integrated on an application processor (AP) SoC (sometimes known as a “host,” referred to herein as a “host chip”) that handles application processing in an operating system (OS) environment, including generating raw data to be transmitted. In another example, processor 502 and memory 504 may be integrated on a baseband processor (BP) SoC (sometimes known as a “modem,” referred to herein as a “baseband chip”) that converts the raw data, e.g., from the host chip, to signals that can be used to modulate the carrier frequency for transmission, and vice versa, which can run a real-time operating system (RTOS). In still another example, processor 502 and transceiver 506 (and memory 504 in some cases) may be integrated on an RF SoC (sometimes known as a “transceiver,” referred to herein as an “RF chip”) that transmits and receives RF signals with antenna 508. It is understood that in some examples, some or all of the host chip, baseband chip, and RF chip may be integrated as a single SoC. For example, a baseband chip and an RF chip may be integrated into a single SoC that manages all the radio functions for cellular communication.

[0038] Referring back to FIG. 1, in some embodiments, any suitable node of wireless network 100 (e.g., user equipment 102) may include a baseband chip that includes a first set of baseband circuits and a second set of baseband circuits. The first set of baseband circuits may include “mini” circuits that perform a subset of the baseband operations/capabilities/complexities of the second set of baseband circuits. In some embodiments, user equipment 102 may include a controller (e.g., at the baseband chip or elsewhere in user equipment 102) that is configured to identify when first reception condition (e.g., DRX, low throughput, PDCCH-only reception, etc.) or a second reception condition (e.g., non-DRX, high throughput, PDCCH/PDSCH reception, etc.) occurs.

[0039] Under the first reception condition, the controller may activate the first set of baseband circuits. Here, the second set of baseband circuits and its associated control processor, may remain in a reduced power mode. On the other hand, under the second reception condition, the controller may activate the second set of baseband circuits, as well as the associated control processor, so that the full range of baseband circuit operations are available. The first set of baseband circuits may remain in the reduced power state under the second reception condition. By including a set of “mini” baseband circuits, performance optimization can be achieved under certain reception conditions, as compared with conventional devices and approaches that use the more powerful baseband circuits in all reception scenarios. Additional details of the baseband circuits are provided below in connection with FIGs. 2-4.

[0040] FIG. 2 illustrates a block diagram of an apparatus 200 including a baseband chip 202, an RF chip 204, and a host chip 206, according to some embodiments of the present disclosure. Apparatus 200 may be implemented as user equipment 102 of wireless network 100 in FIG. 1. As shown in FIG. 2, apparatus 200 may include baseband chip 202, RF chip 204, host chip 206, and one or more antennas 210. In some embodiments, baseband chip 202 is implemented by processor 502 and memory 504, and RF chip 204 is implemented by processor 502, memory 504, and transceiver 506, as described above with respect to FIG. 5. Besides the on-chip memory 218 (also known as “internal memory,” e.g., registers, buffers, or caches) on each chip 202, 204, or 206, apparatus 200 may further include an external memory 208 (e.g., the system memory or main memory) that can be shared by each chip 202, 204, or 206 through the system/main bus. Although baseband chip 202 is illustrated as a standalone SoC in FIG. 2, it is understood that in one example, baseband chip 202 and RF chip 204 may be integrated as one SoC; in another example, baseband chip 202 and host chip 206 may be integrated as one SoC; in still another example, baseband chip 202, RF chip 204, and host chip 206 may be integrated as one SoC, as described above.

[0041] In the uplink, host chip 206 may generate raw data and send it to baseband chip 202 for encoding, modulation, and mapping. Interface 214 of baseband chip 202 may receive the data from host chip 206. Baseband chip 202 may also access the raw data generated by host chip 206 and stored in external memory 208, for example, using the direct memory access (DMA). Baseband chip 202 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase shift keying (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 202 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 202 may send the modulated signal to RF chip 204 via interface 214. RF chip 204, through the transmitter, may convert the modulated signal in the digital form into analog signals, i.e., RF signals, and perform any suitable front-end RF functions, such as filtering, digital pre-distortion, up-conversion, or sample-rate conversion. Antenna 210 (e.g., an antenna array) may transmit the RF signals provided by the transmitter of RF chip 204.

[0042] In the downlink, antenna 210 may receive RF signals from an access node or other wireless device. The RF signals may be passed to the receiver (Rx) of RF chip 204. RF chip 204 may perform any suitable front-end RF functions, such as filtering, IQ imbalance compensation, down-paging conversion, or sample-rate conversion, and convert the RF signals (e.g., transmission) into low-frequency digital signals (baseband signals) that can be processed by baseband chip 202.

[0043] As seen in FIG. 2, baseband chip 202 include a controller 240 (e.g., implemented as hardware, firmware, or software), a first set of baseband circuits 220, and a second set of baseband circuits 230. The first set of baseband circuits 220 may include “mini” circuits that perform a subset of the baseband operations/capabilities/complexities of the second set of baseband circuits 230. In some embodiments, controller 240 (e.g., which may be located anywhere in apparatus 200) may identify when a first reception condition (e.g., DRX, low throughput, PDCCH- only reception, etc.) or a second reception condition (e.g., non-DRX, high throughput, PDCCH/PDSCH reception, etc.) occurs. By way of example, controller 240 may determine when the first reception condition or the second reception condition occurs based on signaling or configuration information from a base station, e.g., such as by access node 104 in FIG. 1.

[0044] Under the first reception condition, controller 240 may activate the first set of baseband circuits 220 such that second set of baseband circuits 230 and its associated control processor (not shown), may remain in a reduced or low power mode. In a first example of low- power mode, the clock (not shown) at baseband chip 202 may be powered on, while second set of baseband circuits 230 are powered off. In a second example of low power mode, the clock and the second set of baseband circuits 230 of baseband chip 202 may be powered off.

[0045] On the other hand, under the second reception condition, controller 240 may activate the second set of baseband circuits 230, so that the full range of baseband circuit operations are available. The first set of baseband circuits 220 may remain in the reduced power state under the second reception condition. By including a set of “mini” baseband circuits (e.g., first set of baseband circuits 220), performance optimization may be achieved under different reception conditions, as compared with conventional devices and approaches that only use only a single set of powerful baseband circuits (e.g., second set of baseband circuits 230). Additional details of first set of baseband circuits 220 and second set of baseband circuits 230 are provided below in connection with FIGs. 3 and 4.

[0046] FIG. 3 illustrates a detailed view of baseband chip 202 of the apparatus 200 of FIG.

2, according to some embodiments of the present disclosure. As seen in FIG. 3, first set of baseband circuits 220 may include one or more of, e.g., a mini-DFE circuit 302a, a TX 304a, a mini-buffer 308a, a mini-search/measurement circuit 306a, a mini -channel estimation circuit 312a, a mini-demodulator circuit 316a, a mini-control processor(s) 310a, a mini-decoder circuit 318a, and a mini-SRAM 314a, just to name a few. In some embodiments, mini-search/measurement circuit 306a may be omitted from first set of baseband circuits 220. Second set of baseband circuits 230 may include one or more of, e.g., a DFE circuit 302b, a TX 304b, a buffer 308b, a search/measurement circuit 306b, a channel estimation circuit 312b, a demodulator circuit 316b, a control processor(s) 310b, a decoder circuit 318b, and an SRAM 314b, just to name a few. Baseband chip 202 may also include controller 240, main CPU(s) 330, memory interface 340 (e.g., interface to external memory 208 of FIG. 2), and peripheral interface(s) 350, just to name a few.

[0047] In response to a first reception condition (e.g., DRX, low throughput, PDCCH-only reception, etc.), controller 240 may activate first set of baseband circuits 220. Conversely, controller 240 may activate second set of baseband circuits 230 in response to a second reception condition (e.g., non-DRX, high throughput, PDCCH/PDSCH reception, etc.).

[0048] When the second set of baseband circuits 230 are activated, DFE circuit 302b may perform operations, e.g., such as digital gain control, digital filtering, downsampling, FFT, etc. Search/measurement circuit 306b may perform operations associated with serving and neighboring cell search, as well as channel measurement(s) of the serving cell. Second set of baseband circuits 230 may perform channel estimation, demodulation and decoding using different algorithms for different channels, e.g., PBCH, PDCCH, and PDSCH in 4G and 5G. Channel estimation circuit 312b may estimate the fading channel. Demodulation circuit 316b may demodulate an input signal into one or more LLRs, which may be maintained in buffer 308b. Decoder circuit 318b may output an information bit related to a received signal. Control processor(s) 310b may run firmware (or software) to control each of the circuits. TX 304b may generate uplink data. CSI feedback circuit 316 may generate CSI that is sent to the base station.

[0049] Each of the circuits of first set of baseband circuits 220 may be implemented as a simplified version of its counterpart circuit in the second set of baseband circuits 230. By way of example and not limitation, these simplifications may include: 1) performing a simplified set of functions and/or algorithms, 2) processing signals of a shorter bit-width, 3) implementation as hardware rather than firmware, 4) limited capabilities with respect to the number of CCs served, the number of Rx antennas served, a lower multiple-input multiple-output (MIMO) rank, or supporting a lower maximum data rate.

[0050] For example, mini-DFE circuit 302a may support fewer data paths associated with fewer Rx antennas than DFE circuit 302b. Further, mini-DFE circuit 302a may include a digital filter with a shorter length than that used by DFE circuit 302b. Still further, mini-DFE circuit 302a may have a shorter processing latency than DFE circuit 302b. Compared with search/measurement circuit 306b, mini-search/measurement circuit 306a may not perform channel measurement of the serving or neighboring cells. Mini-search/measurement circuit 306a may perform other baseband operations, e.g., such as synchronization and the determination of timing and frequency offsets. Unlike channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 316b (which may be configured to support PBCH, PDCCH, and PDSCH reception), mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini-demodulator circuit 316a may support only PDCCH or PDCCH/PDSCH, for example.

[0051] As compared with channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 316b, mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini-demodulator circuit 316a may support a lower MEMO rank and a lower data rate, for example. In some embodiments, mini -channel estimation circuit 312a, mini-decoder circuit 318a, and minidemodulator circuit 316a may support hybrid-automatic repeat request (HARQ) operations. However, in some other embodiments, mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini -demodulator circuit 316a may not support HARQ operations. Moreover, mini- channel estimation circuit 312a may perform a reduced channel estimation algorithm, as compared to channel estimation circuit 312b. For example, mini-channel estimation circuit 312a may perform a one-dimensional channel estimation algorithm rather than a two-dimensional channel estimation algorithm. Channel estimation circuit 312b may support both one-dimensional and two- dimensional channel estimation. Still further, mini-channel estimation circuit 312a may use a reduced number of filter taps, update channel filter coefficients less frequently, or use a simplified MIMO detection algorithm, as compared with channel estimation circuit 312b. In some embodiments, mini-decoder circuit 318a may support lower parallelism associated with low- throughput scenarios. Supporting lower parallelism, mini-decoder circuit 318a to be designed with a reduced size (e.g., which uses less power consumption), as compared with decoder circuit 318b. [0052] However, while mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini -demodulator circuit 316a each provide power savings over their counterpart circuits in second set of baseband circuits 230, they may reduce the overall performance of the system. In some instances, controller 240 may determine that a performance or capability requirement is not met while using these circuits of first set of baseband circuits 220. Here, controller 240 may deactivate mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini-demodulator circuit 316a, and instead, activate channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 316b to achieve a desired performance or capability.

[0053] By way of example, under the first reception condition, one or more of the following operations may occur: 1) controller 240 may activate one or more circuits of first set of baseband circuits 220, 2) second set of baseband circuits 230, main CPU(s) 330, memory interface 340, and peripheral interface(s) 350 may remain in reduced power mode, 3) data of all PDCCH symbols may be buffered in mini-DFE circuit 302a until PDCCH decoding is complete (e.g., when PDSCH may be sent in PDCCH symbols), 4) data from the potential PDSCH symbols may be buffered in mini-DFE circuit 302a until PDCCH decoding is complete (e.g., when PDCCH and PDSCH is not sent in the same symbols), 5) mini -decoder circuit 318a may attempt to decode PDCCH, 6) when a downlink control information (DCI) is not received in the PDCCH, baseband chip 202 may enter reduced-power mode, and 7) if a DCI is received in PDCCH, controller 240 may determine whether to instruct mini-DFE circuit 302a send the buffered data to a) one or more of mini-channel estimation circuit 312a, mini-decoder circuit 318a, mini-demodulator circuit 316a or 316b, channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 318b. In addition, controller 240 may determine whether to activate mini-search/measurement circuit 306a when a synchronization signal block (SSB) or a primary synchronization signal (PSS)/secondary synchronization signal (SSS) is sent in a slot that does not include PDSCH symbols or when minichannel estimation circuit 312a, mini-decoder circuit 318a, and/or mini -demodulator circuit 316a are not used to receive PDSCH.

[0054] FIG. 4 illustrates a flowchart of an exemplary method 400 of wireless communication, according to embodiments of the disclosure. Exemplary method 400 may be performed by an apparatus for wireless communication, e.g., such as user equipment 102, apparatus 200, baseband chip 202, first set of baseband circuits 220, second set of baseband circuits 230, controller 240 and/or node 500. Method 400 may include steps 402-408 as described below. It is to be appreciated that some of the steps may be optional, and some of the steps may be performed simultaneously, or in a different order than shown in FIG. 4.

[0055] At 402, the apparatus may activate a first set of baseband circuits at the baseband chip in response to a first reception condition. For example, referring to FIGs. 2 and 3, in response to determining a first reception condition (e.g., DRX, low throughput, PDCCH-only reception, etc.), controller 240 may activate first set of baseband circuits 220.

[0056] At 404, the apparatus may perform first baseband operations when the first set of baseband circuits are activated. For example, referring to FIG. 3, each of the circuits of first set of baseband circuits 220 may be implemented as a simplified version of its counterpart circuit in the second set of baseband circuits 230. By way of example and not limitation, these simplifications may include: 1) performing a simplified set of functions and/or algorithms, 2) processing signals of a shorter bit-width, 3) implementation as hardware rather than firmware, 4) limited capabilities with respect to the number of CCs served, the number of Rx antennas served, a lower MIMO rank, or supporting a lower maximum data rate. For example, mini-DFE circuit 302a may support fewer data paths associated with fewer Rx antennas than DFE circuit 302b. Further, mini-DFE circuit 302a may include a digital filter with a shorter length than that used by DFE circuit 302b. Still further, mini-DFE circuit 302a may have a shorter processing latency than DFE circuit 302b. Compared with search/measurement circuit 306b, mini-search/measurement circuit 306a may not perform channel measurement of the serving or neighboring cells. Mini-search/measurement circuit 306a may perform other baseband operations, e.g., such as synchronization and the determination of timing and frequency offsets. Unlike channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 316b (which may be configured to support PBCH, PDCCH, and PDSCH reception), mini -channel estimation circuit 312a, mini-decoder circuit 318a, and minidemodulator circuit 316a may support only PDCCH or PDCCH/PDSCH, for example. As compared with channel estimation circuit 312b, decoder circuit 318b, and demodulator circuit 316b, mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini-demodulator circuit 316a may support a lower MIMO rank and a lower data rate, for example. In some embodiments, mini-channel estimation circuit 312a, mini-decoder circuit 318a, and minidemodulator circuit 316a may support HARQ operations. However, in some other embodiments, mini-channel estimation circuit 312a, mini-decoder circuit 318a, and mini-demodulator circuit 316a may not support HARQ operations. Moreover, mini-channel estimation circuit 312a may perform a reduced channel estimation algorithm, as compared to channel estimation circuit 312b. For example, mini-channel estimation circuit 312a may perform a one-dimensional channel estimation algorithm rather than a two-dimensional channel estimation algorithm. Channel estimation circuit 312b may support both one-dimensional and two-dimensional channel estimation. Still further, mini -channel estimation circuit 312a may use a reduced number of filter taps, update channel filter coefficients less frequently, or use a simplified MIMO detection algorithm, as compared with channel estimation circuit 312b. In some embodiments, mini-decoder circuit 318a may support lower parallelism associated with low-throughput scenarios. Supporting lower parallelism, mini-decoder circuit 318a to be designed with a reduced size (e.g., which uses less power consumption), as compared with decoder circuit 318b.

[0057] At 406, the apparatus may activate a second set of baseband circuits of the baseband chip in response to a second reception condition. For example, referring to FIGs. 2 and 3, in response to determining the second reception condition (e.g., non-DRX, high throughput, PDCCH/PDSCH reception, etc.), controller 240 may activate second set of baseband circuits 230, and possibly main CPU(s) 330, memory interface 340, and/or peripheral interfaces 350.

[0058] At 408, the apparatus may perform second baseband operations when the second set of baseband circuits of the baseband chip are activated. For example, referring to FIG. 3, when the second set of baseband circuits 230 are activated, DFE circuit 302b may perform operations, e.g., such as digital gain control, digital filtering, downsampling, FFT, etc. Search/measurement circuit 306b may perform operations associated with serving and neighboring cell search, as well as channel measurement(s) of the serving cell. Second set of baseband circuits 230 may perform channel estimation, demodulation and decoding using different algorithms for different channels, e.g., PBCH, PDCCH, and PDSCH in 4G and 5G. Channel estimation circuit 312b may estimate the fading channel. Demodulation circuit 316b may demodulate an input signal into one or more LLRs, which may be maintained in buffer 308b. Decoder circuit 318b may output an information bit related to a received signal. Control processor(s) 310b may run firmware (or software) to control each of the circuits. TX 304b may generate uplink data. CSI feedback circuit 316 may generate CSI that is sent to the base station.

[0059] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 500 in FIG. 5. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, digital video disc (DVD), and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. [0060] According to one aspect of the present disclosure, a baseband chip is provided. The baseband chip may include a first set of baseband circuits configured to, in response to a first reception condition, perform first baseband operations. The baseband chip may include a second set of baseband circuits. The second set of baseband circuits may be configured to, in response to a second reception condition, perform second baseband operations. [0061] In some embodiments, the first set of baseband circuits may be further configured to, in response to the second reception condition, remain in a reduced-power mode.

[0062] In some embodiments, the second set of baseband circuits may be further configured to, in response to the first reception condition, remain in the reduced-power mode.

[0063] In some embodiments, the baseband chip may further include a controller. In some embodiments, the controller may be configured to, in response to the first reception condition, activate the first set of baseband circuits. The controller may be configured to, in response to the second reception condition, activate the second set of baseband circuits.

[0064] In some embodiments, the first reception condition includes one or more of a DRX, a first data throughput level less than a threshold, or a PDCCH reception without PDSCH reception. [0065] In some embodiments, the second reception condition includes one or more of a non-DRX, a second data throughput level greater than or equal to the threshold, or a PDCCH reception with PDSCH reception.

[0066] In some embodiments, the first set of baseband circuits may include a first DFE baseband circuit configured to perform first DFE operations. In some embodiments, the first set of baseband circuits may include a first cell search and measurement circuit configured to perform first cell search and measurement operations. In some embodiments, the first set of baseband circuits may include a first LLR buffer configured to maintain first LLRs. In some embodiments, the first set of baseband circuits may include a first control processor configured to perform first processing operations. In some embodiments, the first set of baseband circuits may include a first demodulator configured to perform first demodulation. In some embodiments, the first set of baseband circuits may include a first decoder configured to perform first decoding.

[0067] In some embodiments, the second set of baseband circuits may include a second baseband circuit configured to perform second DFE operations. In some embodiments, the second set of baseband circuits may include a second cell search and measurement circuit configured to perform second cell search and measurement operations. In some embodiments, the second set of baseband circuits may include a second LLR buffer configured to maintain second LLRs. In some embodiments, the second set of baseband circuits may include a second control processor configured to perform second processing operations. In some embodiments, the second set of baseband circuits may include a CSI feedback circuit configured to perform CSI feedback. In some embodiments, the second set of baseband circuits may include a second demodulator configured to perform second demodulation. In some embodiments, the second set of baseband circuits may include a second decoder configured to perform second decoding.

[0068] According to another aspect of the present disclosure, an apparatus of wireless communication of a UE is provided. The apparatus may include an RF chip configured to receive one or more signals from a base station. The apparatus may also include a baseband chip. The baseband chip may include a first set of baseband circuits configured to, in response to a first reception condition, perform first baseband operations. The baseband chip may include a second set of baseband circuits. The second set of baseband circuits may be configured to, in response to a second reception condition, perform second baseband operations.

[0069] In some embodiments, the first set of baseband circuits may be further configured to, in response to the second reception condition, remain in a reduced-power mode.

[0070] In some embodiments, the second set of baseband circuits may be further configured to, in response to the first reception condition, remain in the reduced-power mode.

[0071] In some embodiments, the baseband chip may further include a controller. In some embodiments, the controller may be configured to, in response to the first reception condition, activate the first set of baseband circuits. The controller may be configured to, in response to the second reception condition, activate the second set of baseband circuits.

[0072] In some embodiments, the first reception condition includes one or more of a DRX, a first data throughput level less than a threshold, or a PDCCH reception without PDSCH reception. [0073] In some embodiments, the second reception condition includes one or more of a non-DRX, a second data throughput level greater than or equal to the threshold, or a PDCCH reception with PDSCH reception.

[0074] In some embodiments, the first set of baseband circuits may include a first DFE baseband circuit configured to perform first DFE operations. In some embodiments, the first set of baseband circuits may include a first cell search and measurement circuit configured to perform first cell search and measurement operations. In some embodiments, the first set of baseband circuits may include a first LLR buffer configured to maintain first LLRs. In some embodiments, the first set of baseband circuits may include a first control processor configured to perform first processing operations. In some embodiments, the first set of baseband circuits may include a first demodulator configured to perform first demodulation. In some embodiments, the first set of baseband circuits may include a first decoder configured to perform first decoding.

[0075] In some embodiments, the second set of baseband circuits may include a second baseband circuit configured to perform second DFE operations. In some embodiments, the second set of baseband circuits may include a second cell search and measurement circuit configured to perform second cell search and measurement operations. In some embodiments, the second set of baseband circuits may include a second LLR buffer configured to maintain second LLRs. In some embodiments, the second set of baseband circuits may include a second control processor configured to perform second processing operations. In some embodiments, the second set of baseband circuits may include a CSI feedback circuit configured to perform CSI feedback. In some embodiments, the second set of baseband circuits may include a second demodulator configured to perform second demodulation. In some embodiments, the second set of baseband circuits may include a second decoder configured to perform second decoding.

[0076] According to yet another aspect of the disclosure, a method of wireless communication of a baseband chip is provided. The method may include performing, by a first set of baseband circuits of a baseband chip, first baseband operations in response to a first reception condition. The method may include performing, by a second set of baseband circuits of the baseband chip, second baseband operations in response to a second reception condition. In some embodiments, the first baseband operations mays include a subset of the second baseband operations.

[0077] In some embodiments, the method may further include activating, by a controller of the baseband chip, the first set of baseband circuits in response to the first reception condition. In some embodiments, the method may further include activating, by the controller of the baseband chip, the second set of baseband circuits in response to the second reception condition.

[0078] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0079] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0080] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0081] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0082] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

- 22 - WHAT IS CLAIMED IS:

1. A baseband chip, comprising: a first set of baseband circuits configured to perform first baseband operations in response to a first reception condition; and a second set of baseband circuits configured to perform second baseband operations in response to a second reception condition.

2. The baseband chip of claim 1, wherein the first set of baseband circuits is further configured to: in response to the second reception condition, remain in a reduced-power mode.

3. The baseband chip of claim 2, wherein the second set of baseband circuits is further configured to: in response to the first reception condition, remain in the reduced-power mode.

4. The baseband chip of claim 1, further comprising: a controller configured to: in response to the first reception condition, activate the first set of baseband circuits.

5. The baseband chip of claim 4, further comprising: a controller configured to: in response to the second reception condition, activate the second set of baseband circuits.

6. The baseband chip of claim 1, wherein the first reception condition includes one or more of a discontinuous reception (DRX), a first data throughput level less than a threshold, or a physical downlink control channel (PDCCH) reception without physical downlink shared channel (PDSCH) reception.

7. The baseband chip of claim 6, wherein the second reception condition includes one or more of a non-DRX, a second data throughput level greater than or equal to the threshold, or a PDCCH reception with PDSCH reception.

8. The baseband chip of claim 1, wherein the first set of baseband circuits comprises one or more of: a first digital front end (DFE) baseband circuit configured to perform first DFE operations; a first cell search and measurement circuit configured to perform first cell search and measurement operations; a first log-likelihood ratio (LLR) buffer configured to maintain first log-likelihood ratios (LLRs); a first control processor configured to perform first processing operations; a first demodulator configured to perform first demodulation; and a first decoder configured to perform first decoding.

9. The baseband chip of claim 8, wherein the second set of baseband circuits comprises one or more of: a second baseband circuit configured to perform second DFE operations; a second cell search and measurement circuit configured to perform second cell search and measurement operations; a second LLR buffer configured to maintain second LLRs; a second control processor configured to perform second processing operations; a channel state information (CSI) feedback circuit configured to perform CSI feedback; a second demodulator configured to perform second demodulation; and a second decoder configured to perform second decoding.

10. An apparatus of wireless communication of a user equipment (UE), comprising: a radio frequency (RF) chip configured to receive one or more signals from a base station; and a baseband chip comprising: a first set of baseband circuits configured to perform first baseband operations in response to a first reception condition; and a second set of baseband circuits configured to perform second baseband operations in response to a second reception condition.

11. The apparatus of claim 10, wherein the first set of baseband circuits is further configured to: in response to the second reception condition, remain in a reduced-power mode.

12. The apparatus of claim 11, wherein the second set of baseband circuits is further configured to: in response to the first reception condition, remain in the reduced-power mode.

13. The apparatus of claim 10, further comprising: a controller configured to: in response to the first reception condition, activate the first set of baseband circuits.

14. The apparatus of claim 13, further comprising: a controller configured to: in response to the second reception condition, activate the second set of baseband circuits.

15. The apparatus of claim 10, wherein the first reception condition includes one or more of a discontinuous reception (DRX), a first data throughput level less than a threshold, or a physical downlink control channel (PDCCH) reception without physical downlink shared channel (PDSCH) reception.

16. The apparatus of claim 15, wherein the second reception condition includes one or more of a non-DRX, a second data throughput level greater than or equal to the threshold, or a PDCCH reception with PDSCH reception.

17. The apparatus of claim 10, wherein the first set of baseband circuits comprises one or more of: a first digital front end (DFE) baseband circuit configured to perform first DFE operations; a first cell search and measurement circuit configured to perform first cell search and measurement operations; a first log-likelihood ratio (LLR) buffer configured to maintain first log-likelihood ratios - 25 -

(LLRs); a first control processor configured to perform first processing operations; a first demodulator configured to perform first demodulation; and a first decoder configured to perform first decoding.

18. The apparatus of claim 17, wherein the second set of baseband circuits comprises one or more of a second baseband circuit configured to perform second DFE operations; a second cell search and measurement circuit configured to perform second cell search and measurement operations; a second LLR buffer configured to maintain second LLRs; a second control processor configured to perform second processing operations; a channel state information (CSI) feedback circuit configured to perform CSI feedback; a second demodulator configured to perform second demodulation; and a second decoder configured to perform second decoding.

19. A method of wireless communication of a user equipment (UE), comprising: performing, by a first set of baseband circuits of a baseband chip, first baseband operations in response to a first reception condition; and performing, by a second set of baseband circuits of the baseband chip, second baseband operations in response to a second reception condition, wherein the first baseband operations include a subset of the second baseband operations.

20. The method of claim 19, further comprising: activating, by a controller of the baseband chip, the first set of baseband circuits in response to the first reception condition; and activating, by the controller of the baseband chip, the second set of baseband circuits in response to the second reception condition.