Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
  • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N50/00—Galvanomagnetic devices
  • H10N50/20—Spin-polarised current-controlled devices
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
  • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
  • G11C11/225—Auxiliary circuits
  • G11C11/2273—Reading or sensing circuits or methods
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
  • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
  • G11C11/225—Auxiliary circuits
  • G11C11/2275—Writing or programming circuits or methods
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
  • H10D48/385—Devices using spin-polarised carriers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N50/00—Galvanomagnetic devices
  • H10N50/80—Constructional details
  • H10N50/85—Materials of the active region
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N52/00—Hall-effect devices
  • H10N52/101—Semiconductor Hall-effect devices
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N52/00—Hall-effect devices
  • H10N52/80—Constructional details
  • H10N52/85—Materials of the active region
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
  • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10B—ELECTRONIC MEMORY DEVICES
  • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
  • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D1/00—Resistors, capacitors or inductors
  • H10D1/60—Capacitors
  • H10D1/68—Capacitors having no potential barriers
  • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures

Definitions

• Electronic device and system in particular memory, logic device or neuromorphic device, associated
• the present invention relates to the field of ferroelectric devices of the memory, logic or neuromorphic type, in particular for information and communication technologies.
• Ferroelectric materials carry a polarization. It is possible to encode information in this ferroelectric state, which can be written by applying a voltage. This has led to the appearance of memory/logic/neuromorphic type ferroelectric devices.
• the read mechanism is thus destructive: reading erases the stored memory state, which involves rewriting the Fe-RAM memory by means of a particular architecture. There is therefore a need for a means making it possible to read the state of polarization of a ferroelectric layer by a non-destructive mechanism, in particular for memory applications.
• the stack of layers also comprises a spin-polarization sub-assembly, the spin-polarization sub-assembly being adapted to spin-polarize a current passing through the spin-polarization sub-assembly, at least one layer of the sub -spin polarization assembly being made of ferromagnetic or ferrimagnetic material and an interfacing subassembly disposed between the ferroelectric subassembly and the spin polarization subassembly, the interfacing subassembly being capable of ensuring the interconversion of spin-polarized current into charge current, depending on the ferroelectric polarization state of the ferroelectric subassembly.
• the stack of layers also comprises a second electrode comprising at least two electrical contacts for reading the state of the polarization of the ferroelectric subassembly, the contacts each extending along a respective main direction, at least two main directions being non parallel to each other, the second electrode delimiting the spin polarization subassembly, the contact of the first electrode making it possible to modify the ferroelectric polarization state of the ferroelectric subassembly by applying a potential difference between this contact and the least one of the contacts of the second electrode or of a potential difference between this contact and the contact of the intermediate electrode.
• the second electrode comprises at least three contacts.
• the contact of the first electrode is either in a direction perpendicular to the stacking direction or in a direction substantially parallel to the stacking direction.
• the contacts read the polarization state of the spin polarization subassembly by applying a read voltage between two so-called read contacts chosen from among the contact of the intermediate electrode and the contacts of the second electrode and by measuring the voltage between two of the other said read contacts or between one of the said other said read contacts and a reference potential.
• the description also describes a system, in particular memory, logic device or neuromorphic device, comprising an electronic device.
• FIG. 1 is a schematic representation of an example of an electronic device
• FIG. 2 is a schematic representation of another example electronic device
• FIG. 1 there is shown an electronic device 12 of a memory 10.
• This memory 10 further comprises a read unit and a write unit, the read and write units not being not shown for the sake of readability of Figure 1.
• the stack of layers 14 comprises, from bottom to top, a first electrode 16, a ferroelectric sub-assembly 18, an interfacing sub-assembly 20, a polarization sub-assembly in spin 22 and a second electrode 24.
• the first electrode 16 is called the lower electrode and the second electrode 24 is called the upper electrode.
• the electronic device 10 further comprises an intermediate electrode 26, the intermediate electrode 26 comprising a contact, denoted contact C1 in FIG.
• the contact of the intermediate electrode 26 is called first contact C1
• the contacts of the upper electrode 24 are respectively called second contact C2
• third contact C3 fourth contact C4
• the contact of the lower electrode 16 is called fifth contact C5.
• Each contact C1, C2, C3, C4 and C5 is an electrical contact.
• each contact C1, C2, C3, C4 and C5 is represented in the form of a parallelepiped extending in a main direction.
• the thickness of the contact layer 28 is typically between 0.2 nanometer (nm) and 100 nm.
• the contact of the electrodes may be made in the same layer as the electrode or made independently of the layer forming the electrode and may or may not be in the same material as the latter.
• the ferroelectric material is (Hfi. x Zr x )02 or (Hfi. x Ga x )C>2 (x varying between 0 and 1), or HfC>2 doped with other elements , or their alloys.
• the ferroelectric material does not have the perovskite structure unlike the first example.
• the ferroelectric material is a ferroelectric semiconductor.
• GeTe, optionally doped or AIScN, are examples of ferroelectric semiconductor materials.
• the ferroelectric material can be irradiated, annealed, doped or deposited on specific substrates so as to modulate its ferroelectric and transport properties.
• the coercive electric field of the ferroelectric element and its thickness are sufficiently weak so that the polarization can be reversed at voltages compatible with microelectronic technologies, that is to say voltages below 10 Volts ( ⁇ 10V).
• a thickness of less than 150 nm and advantageously less than 50 nm in the aforementioned materials makes it possible to obtain such properties.
• the ferroelectric sub-assembly 18 is also resistant to cycling, typically capable of withstanding at least 10 4 cycles.
• the spin polarization subassembly 22 comprises at least one magnetic layer made of a ferromagnetic or ferrimagnetic material.
• the magnetic material is a magnetic semiconductor.
• the magnetic material is a composite ferromagnetic or ferrimagnetic element of the [FM/M] n /FM type, that is to say a stack of several ferromagnetic or ferrimagnetic FM and metallic M layers coupled together.
• the magnetic material is a Heusler alloy.
• the Heusler alloy is chosen from Cu2MnAl, Cu2Mnln, Cu2MnSn, NfiMnAl, NfiMnln, NfiMnSn, NfiMnSb, Ni2MnGa, Cu2MnAl, Cu2MnSi, Cu2MnGa, Co2MnGe , Pd2MnAI, Pd2Mnln, Pd2MnSn, Pd2MnSb, Co2FeSi, Co2FeAI, Fe2VAI, Mn2VGa, Co2FeGe, MnGa and MnGaRu.
• the spins within this spin polarization subset 22 are advantageously polarized along the first longitudinal direction X.
• such a spin polarization direction can be obtained by applying a magnetic field in the first longitudinal direction X, in order to saturate the magnetization.
• the thickness of the ferromagnetic layer is low (typically less than 100 nm), so as to optimize the signal read by the read unit.
• the spin polarization subassembly 22 makes it possible to obtain a relatively fairly high spin polarization, preferably greater than 0.1.
• the ferroelectric subassembly 18 and the spin polarization subassembly 22 are arranged geometrically in a particular way.
• the first part 30 is a superimposed part 30 along the stacking direction Z with the spin polarization subassembly 22.
• the first part 30 is a parallelepipedal portion.
• the second part 32 is a non-overlapping part 32 with the spin polarization subassembly 22.
• the second part 32 is a portion having the shape of a T, the horizontal bar of the T being in contact with the first part 30 and the vertical bar of the T being in the second longitudinal direction Y.
• the interfacing sub-assembly 20 delimits the ferroelectric sub-assembly 18.
• the interfacing sub-assembly 20 has two parts 34 and 36.
• the first part 34 of the interfacing subassembly 20 corresponds to the superimposed part 30 of the ferroelectric subassembly 18.
• the first part 34 is superimposed with the superimposed part 30 of the ferroelectric sub-assembly 18.
• the first part 34 is superimposed with the horizontal bar of the T of the non-superimposed part 32 of the ferroelectric subassembly 18.
• the first part 34 of the interfacing subassembly 20 is thus superimposed with the spin polarization subassembly 22 along the stacking direction Z, while the second part 36 of the subassembly interfacing 20 is not superimposed with the spin polarization subassembly 22.
• At least one of the interfacing sub-assembly 20 and the ferroelectric sub-assembly 18 comprises a conductive layer capable of forming the intermediate electrode 26, which electrode comprises the first contact C1 which is an electrical contact of reading of the state of polarization of the ferroelectric subassembly 18.
• the interfacing sub-assembly 20 consists of or includes a two-dimensional electron gas.
• the conversion of spin current into charge current in the interfacing sub-assembly 20 can be modulated by the ferroelectricity of the ferroelectric sub-assembly 18, and strong enough to minimize the energy consumption of the memory.
• the interfacing sub-assembly 20 comprises at least one layer with a strong spin-orbit effect, called a spin-orbit layer.
• the spin-orbit layer has a relatively small thickness, typically less than or equal to 10 nm.
• the material used to realize for the spin-orbit layer varies depending on the case.
• the material of the spin-orbit layer is a spin Hall effect material.
• a material a spin Hall effect material is a material allowing the conversion of a charge current into a spin current, having a spin Hall effect angle typically greater than 5%
• the spin-orbit layer material is Cu or Au doped with elements from the 3d, 4d, 5d, 4f, 5f columns of the periodic table, such as W, Ta, Bi, so to obtain large spin-orbit effects, or a combination of 5d elements, such as PtW.
• the material of the spin-orbit layer is a two-dimensional spin-orbit material.
• the aforementioned materials can optionally be doped.
• the material of the spin-orbit layer is a topological insulator.
• a topological insulator is a material having an insulator-like band structure but which has metallic surface states.
• the material of the spin-orbit layer is Bi 2 Ses, BiSbTe, SbTes, HgTe or a-Sn.
• the material of the spin-orbit layer is a Weyl semimetal.
• the material of the spin-orbit layer is a transition metal dichalcogenide and preferably a ROCh 2 type dichalcogenide. Such a material actually exhibits a good Rashba effect.
• 'R' is for example chosen from La, Ce, Pr, Nd, Sr, Sc, Ga, Al, or In while 'Ch' is selected from S, Se or Te.
• the interfacing layer comprises one or more non-ferromagnetic metal layers to promote the conversion of the spin current into a charge current.
• the interfacing subassembly 20 is in contact with one face of the spin polarization subassembly 22.
• the upper electrode 24 comprises a metallic layer 38 and three contacts, namely the second contact C2, the third contact C3 and the fourth contact C4.
• the three contacts C2, C3 and C4 are electrical contacts for reading the state of the polarization of the ferroelectric subassembly 18.
• the third contact C3 extends mainly along a direction perpendicular to the main direction of the contacts C2 and C4.
• the third contact C3 is electrically connected to the metallic layer 38.
• the first contact C1 is accessible from above since it is not covered by the spin polarization subassembly 22.
• the writing unit charges the contact layer 28 of the lower electrode 16.
• the write unit is a transistor making it possible to positively or negatively charge the contact layer 28.
• the reading unit then measures the voltage between the second contact C2 and the fourth C4, or between one contact among the second contact C2 and the fourth contact C4, and an electrical reference potential.
• the reader unit applies a current (or a voltage) between the second contact C2 and the fourth contact C4.
• the reading unit measures the voltage between the first contact C1 and the third contact C3, or between a contact among the contact C1 and the third contact C3, and an electrical reference potential.
• the measured voltage depends on the current injected and the electrical polarization along the stacking direction Z of the ferroelectric sub-assembly 18, since the ferroelectric sub-assembly 18 controls electrically and in a non-volatile manner the interconversion of the spin current into current load carried out.
• the reading unit is therefore capable of measuring the electrical polarization of the ferroelectric sub-assembly 18 with a current injection sub-unit and a voltage measurement sub-unit.
• This measurement has the particularity of preserving the state of polarization of the ferroelectric sub-assembly 18 and is therefore non-destructive.
• Memory 10 is therefore a non-destructive read memory.
• Other embodiments of the memory 10 can be envisaged with reference to FIGS. 2, 3, and 4.
• the reading unit measures this movement of charges, for example by measuring the electric potential of the second contact C2.
• the second, third and fourth contacts C2, C3 and C4 are made in the spin polarization subassembly 22, so that the upper electrode 38 and the spin polarization subassembly 22 are merged. .
• Memory 10 represented in FIG. 4 corresponds to the combination of memories 10 according to FIGS. 2 and 3 (contacts C2 and C3 made in spin polarization sub-assembly 22).
• the electronic device 12 which has just been presented for an application to a memory 10 can also be used as a basic element of other systems and in particular a logic device or a neuromorphic device.
• the ferroelectric subassembly 18 is designed so as to possess stable states of partial reversal of the apparent electrical polarization. The write voltage and the time during which this voltage is applied make it possible to reach these states, which correspond to different read voltages.
• Electronic device 12 can also be used as a basic logic system element.
• the read voltage of a first device is then connected to a second device, so as to serve as a write voltage for the second device.

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• Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Semiconductor Memories (AREA)
• Mram Or Spin Memory Techniques (AREA)
• Hall/Mr Elements (AREA)
• Chemical & Material Sciences (AREA)
• Materials Engineering (AREA)

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• 2021
  • 2021-08-06 FR FR2108563A patent/FR3126085B1/fr active Active
• 2022
  • 2022-08-04 WO PCT/EP2022/072003 patent/WO2023012302A1/fr not_active Ceased
  • 2022-08-04 EP EP22761999.6A patent/EP4381917B1/fr active Active
  • 2022-08-04 US US18/294,849 patent/US20240349617A1/en active Pending
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