WO2023000881A1 - 子像素结构、像素排布结构、掩膜版、显示面板及设备 - Google Patents

子像素结构、像素排布结构、掩膜版、显示面板及设备 Download PDF

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Publication number
WO2023000881A1
WO2023000881A1 PCT/CN2022/099378 CN2022099378W WO2023000881A1 WO 2023000881 A1 WO2023000881 A1 WO 2023000881A1 CN 2022099378 W CN2022099378 W CN 2022099378W WO 2023000881 A1 WO2023000881 A1 WO 2023000881A1
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Prior art keywords
sub
pixel
layer
pixel structure
display area
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PCT/CN2022/099378
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English (en)
French (fr)
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李志林
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Oppo广东移动通信有限公司
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Publication of WO2023000881A1 publication Critical patent/WO2023000881A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]

Definitions

  • the present application relates to the display field, in particular to a sub-pixel structure, a pixel arrangement structure, a mask, a display panel and equipment.
  • a sub-pixel structure a pixel arrangement structure, a mask plate, a display panel and a device are provided.
  • a sub-pixel structure comprising an anode layer, a luminescent material layer and a cathode layer stacked, at least one of the anode layer, the luminescent material layer and the cathode layer is a first target layer, and the first target layer is provided with a central region And at least two radiation areas connected to the central area, wherein there is a recessed area between any two adjacent radiation areas.
  • a pixel arrangement structure includes a plurality of sub-pixels, and the sub-pixels adopt the above-mentioned sub-pixel structure.
  • a mask plate is used to manufacture the above-mentioned pixel arrangement structure, the mask plate is provided with a plurality of openings, and the plurality of openings are respectively used to form a plurality of sub-pixels in one-to-one correspondence.
  • a display panel the display panel includes a first display area and a second display area, wherein the pixel size of the first display area is smaller than the pixel size of the second display area, and the first display area adopts such as The above-mentioned pixel arrangement structure.
  • a display device includes a photosensitive device and the above display panel, wherein the photosensitive device is arranged corresponding to a first display area of the display panel.
  • FIG. 1 is a partial schematic diagram of a display device of an embodiment
  • Fig. 2 is a schematic cross-sectional view of the display device of the embodiment of Fig. 1 along the direction AA';
  • FIG 3 is one of the schematic diagrams of the film layer structure of the sub-pixel structure of an embodiment
  • FIG. 4 is a schematic top view of the sub-pixel structure of the embodiment in FIG. 3;
  • FIG. 5 is one of the schematic top views of the sub-pixel structure of an embodiment
  • FIG. 6 is the second schematic top view of the sub-pixel structure of an embodiment
  • FIG. 7 is a third schematic top view of the sub-pixel structure of an embodiment
  • FIG. 8 is a fourth schematic top view of the sub-pixel structure of an embodiment
  • FIG. 9 is a fifth schematic top view of the sub-pixel structure of an embodiment.
  • FIG. 10 is the second schematic diagram of the film layer structure of the sub-pixel structure of an embodiment
  • FIG. 11 is the third schematic diagram of the film layer structure of the sub-pixel structure of an embodiment
  • FIG. 12 is a schematic structural view of a heat sink in an embodiment
  • FIG. 13 is one of the schematic diagrams of the pixel arrangement structure of an embodiment
  • FIG. 14 is the second schematic diagram of the pixel arrangement structure of an embodiment
  • FIG. 15 is a schematic structural diagram of a first mask according to an embodiment
  • FIG. 16 is a schematic structural diagram of a second mask according to an embodiment
  • FIG. 17 is a schematic structural diagram of a third mask according to an embodiment.
  • FIG. 18 is a schematic diagram of a partial structure of a display panel according to an embodiment
  • FIG. 19 is a schematic cross-sectional view of a driving circuit in a display panel according to an embodiment.
  • Display panel 10; first display area: 11; second display area: 12; photosensitive device: 20; first mask: 31; second mask: 32; third mask: 33; anode layer : 100; Luminescent material layer: 200; Cathode layer: 300; Central area: 510; Radiation area: 520; Circuit: 700; Gate: 701; Source: 702; Drain: 703; Source Contact Structure: 704; Drain Contact Structure: 705; Substrate: 711; Buffer Layer: 712; Gate Insulator: 713; Inter-insulation layer: 714; planarization layer: 715; pixel definition layer: 716.
  • first, second and the like used in this application may be used to describe various elements herein, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element.
  • a first target layer could be termed a second target layer, and, similarly, a second target layer could be termed a first target layer, without departing from the scope of the present application.
  • Both the first target layer and the second target layer are target layers, but they are not the same target layer.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, the features defined as “first” and “second” may explicitly or implicitly include at least one of these features.
  • plural means at least two, such as two, three, etc., unless otherwise specifically defined.
  • severeal means at least one, such as one, two, etc., unless otherwise specifically defined.
  • Fig. 1 is a partial schematic diagram of a display device according to an embodiment
  • Fig. 2 is a schematic cross-sectional view of the display device according to the embodiment of Fig. 1 along the direction AA'.
  • the display device may be a smart phone, a tablet computer, a game device, an augmented reality (Augmented Reality, AR) device, a notebook, a desktop computing device, a wearable device, and the like.
  • a display device includes a display panel 10 and a photosensitive device 20 .
  • the display panel 10 includes a first display area 11 and a second display area 12 adjacent to each other.
  • the shape of the first display area 11 may be circular, rectangular, elliptical, polygonal, irregular, etc., which is not limited in the present invention.
  • the shape of the second display area 12 may also be circular, rectangular, etc., which is not limited in the present invention.
  • the photosensitive device 20 is at least partially disposed corresponding to the first display area 11 .
  • the photosensitive device 20 may be disposed under the first display area 11 , and the photosensitive device 20 is used to transmit and/or receive optical signals through the first display area 11 of the display panel 10 .
  • the first display area 11 is an area located above the photosensitive device 20 . It should be noted that in the embodiment of the present application, upward refers to the direction from the rear case of the display device to the display screen, and downward refers to the direction from the display screen to the rear case.
  • the photosensitive device 20 realizes testing and control based on optical parameters by receiving light.
  • the photosensitive device 20 can be a camera, and the photosensitive device 20 can also be an ambient light sensor, an optical distance sensor (for example, an infrared sensor, a laser sensor, a proximity sensor, a distance sensor, an optical distance sensor), a structured light module, a time-of-flight sensor, etc. Time of flight (TOF) lens module, optical fingerprint sensor, etc.
  • TOF Time of flight
  • the photosensitive device 20 is used as a camera as an example for description.
  • the driving circuit is usually formed in multiple functional layers stacked, and the above multiple functional layers will reduce the incident light intensity of the camera, and even cause imaging diffraction problems, greatly affecting the imaging quality of the camera. Therefore, for the under-screen camera solution, by reducing the pixel size of the first display area 11 , the imaging quality can be effectively improved, thereby improving user experience.
  • FIG. 3 is one of the schematic diagrams of the film layer structure of the sub-pixel structure of an embodiment.
  • the sub-pixel structure includes an anode layer 100 , a luminescent material layer 200 and a cathode layer 300 stacked.
  • the anode layer 100 and the cathode layer 300 are used to jointly apply a driving voltage or a driving current to the luminescent material layer 200 to jointly control the luminescent material layer 200 to emit light.
  • the sub-pixel in this embodiment can be understood as a light-emitting device, and the light-emitting device can be, but not limited to, an organic light-emitting diode (OLED) and a quantum dot light-emitting diode (Quantum Dot Light Emitting Diodes, QLED).
  • OLED organic light-emitting diode
  • QLED quantum dot light-emitting diode
  • each light-emitting device can be an organic light-emitting diode of a different color, such as red OLED, green OLED, and blue OLED. show.
  • FIG. 4 is a schematic top view of the sub-pixel structure of the embodiment in FIG. 3 , wherein the top view refers to a schematic view obtained by observing along a direction perpendicular to the display surface of the display device. 3 and 4, at least one of the anode layer 100, the luminescent material layer 200 and the cathode layer 300 is a first target layer, and the first target layer is provided with a central region 510 and is connected to the central region There are at least two radiation areas 520 in 510, for example, the number of radiation areas 520 may be three, four or five, which is not limited in this embodiment. Wherein, there is a recessed region 530 between any two adjacent radiation regions 520 .
  • the distance between the points on the overall outer contour formed by the central area 510 and the radiation area 520 and the center of the central area 510 is defined as the center distance, if within a certain area of the overall outer outline, there is a center distance If the change trend is decreasing and then increasing, then the range of the area is considered to be a depressed area 530 .
  • the area pointed by the arrow is a recessed area 530 .
  • FIG. 4 shows a circular structure as the boundary between the central area 510 and the radiation area 520
  • the above-mentioned boundary can be understood as a virtual boundary, that is, in the actual sub-pixel structure, and There is no such limit.
  • the central region 510 and the radiation region 520 can be formed simultaneously in the same process.
  • heat generation of the sub-pixel structure in the display device can refer to the following formula (1).
  • Q is the heat emitted by the sub-pixel structure
  • J is the current density flowing through the sub-pixel structure
  • A is the light emitting area of the sub-pixel structure
  • k is a constant.
  • the heat Q emitted by the sub-pixel structure is proportional to the light emitting area A, and is proportional to J ⁇ 2. Therefore, compared with the light emitting area, the current density has a greater influence on the heat dissipated by the sub-pixel when emitting light.
  • smaller sub-pixels are provided in the first display area 11
  • larger sub-pixels are provided in the second display area 12 .
  • the sub-pixels located in the first display area 11 exhibit greater luminous brightness in order to make the display device emit light uniformly.
  • the luminous brightness of the sub-pixels is proportional to the current density, therefore, the sub-pixels in the first display area 11 emit much more heat than the sub-pixels in the second display area 12 when emitting light, resulting in 11 sub-pixels age faster.
  • the heat inside the sub-pixel structure can be dissipated from the sidewall to the external environment.
  • the side wall refers to the outer wall of the sub-pixel structure perpendicular to the display surface.
  • the heat dissipation area of the side wall can be understood as being proportional to the circumference of the outer contour of the top view figure, and proportional to the thickness of the sub-pixel structure, the thickness refers to the size of the sub-pixel structure in the first direction, and the first direction is The stacking direction of the anode layer 100 , the luminescent material layer 200 and the cathode layer 300 .
  • FIG. 5 is one of the schematic top views of the sub-pixel structure of an embodiment. Referring to FIG. 5 , five radiation regions 520 are all connected to the central region 510 .
  • the shapes of the multiple radiation areas 520 may be different.
  • FIG. 6 is the second schematic top view of the sub-pixel structure of an embodiment. Referring to FIG. 6, the shapes of the two radiation areas 520 may be different from those of the other two radiation areas.
  • the shape of the radiation area 520 is different, and in other embodiments, the shape of the radiation area 520 may also be a cone, a rectangle, and the like. In addition, this embodiment does not limit the size of each radiation area 520.
  • FIG. 6 is the second schematic top view of the sub-pixel structure of an embodiment. Referring to FIG. 6, the shapes of the two radiation areas 520 may be different from those of the other two radiation areas.
  • the shape of the radiation area 520 is different, and in other embodiments, the shape of the radiation area 520 may also be a cone, a rectangle, and the
  • FIG. 7 is the third schematic top view of the sub-pixel structure in an embodiment. Referring to FIG. 4 and FIG. The size of the area 520 can also be set as required.
  • FIG. 8 is the fourth schematic top view of the sub-pixel structure of an embodiment. With reference to FIG. 8 , a plurality of radiation regions 520 can be arranged at intervals from each other, and then a recessed region 530 is formed at the junction of the radiation region 520 and the central region 510, and the recessed region 530 It is located between two adjacent radiation areas 520 . It should be noted that the present embodiment does not specifically limit the quantity, shape and size of the radiation area 520 , and the above-mentioned FIG. 5 to FIG. 8 are only for illustrative illustrations, and are not used to limit the scope of protection of the present application.
  • the orthographic projections of other layers except the first target layer on the virtual plane completely cover the orthographic projections of the first target layer on the virtual plane.
  • the anode layer 100, the luminescent material layer 200 and the cathode layer 300 may all be the first target layer, and the anode layer 100, the luminescent The orthographic projections of the material layer 200 and the cathode layer 300 on the virtual plane coincide.
  • the anode layer 100 , the luminescent material layer 200 and the cathode layer 300 can be prepared using a mask with the same pattern, thereby reducing the difficulty of mask design.
  • the curvature of any point on the outer contour of the radiation area 520 is smaller than a curvature threshold.
  • the curvature threshold may be jointly determined according to the process limit size of the lithographic equipment, the size of the sub-pixel structure, and the like. It is understandable that if the curvature of a certain point is too large, it is easy to cause optical problems such as diffraction concentration, which will affect the light-sensing effect of the camera and other photosensitive devices, thereby affecting the imaging effect and affecting the user experience.
  • the shape of the radiation area 520 may be a petal shape as shown in any one of the embodiments shown in FIG. 4 to FIG. 8 .
  • FIG. 9 is a fifth schematic top view of the sub-pixel structure of an embodiment.
  • the outer contours of adjacent radiation regions 520 are smoothly connected by rounded corners.
  • the connection can be made into a smooth curve, avoiding the excessive curvature of the connection of the outer contour of the adjacent radiation area 520, thereby further suppressing the problem of concentration of diffraction, thereby improving the performance of the photosensitive device .
  • the shape of the central area 510 is circular or oval.
  • the distance between the center of the sub-pixel structure and any point on the outer contour can be made close, thereby avoiding the difference in the heat dissipation performance of the sub-pixel structure in different directions is too large, thereby avoiding the problem of different aging speeds of the sub-pixel structure in different directions.
  • the shape of the central area is not limited to a circle or an ellipse, and in some embodiments, the shape of the central area may also be a rectangle, a parallelogram, or the like.
  • FIG. 10 is the second schematic diagram of the film layer structure of the sub-pixel structure in an embodiment.
  • the sub-pixel structure is also provided with a middle hole 500 penetrating the second target layer along a first direction, the first direction being the anode layer 100, the luminescent material layer 200 and the cathode layer 300 stacking directions.
  • the mesopores 500 may only penetrate one or two films. layer, for example only through the luminescent material layer 200 and the anode layer 100 .
  • the above parameters can be specifically set as required.
  • the shapes of the sub-pixel structure and the center hole 500 are both centrosymmetric figures, and the center of symmetry of the sub-pixel structure and the center of symmetry of the center hole 500 are at The first directions are coincident. Inside the sub-pixel structure, the center of the sub-pixel is most likely to accumulate heat. Therefore, by arranging the center hole 500 at the center of the sub-pixel structure, the heat dissipation effect of the sub-pixel structure can be greatly improved.
  • FIG. 11 is the third schematic diagram of the film layer structure of the sub-pixel structure in one embodiment.
  • the thermal conductivity of the heat sink 600 is greater than the thermal conductivity of the second target layer.
  • the thermal conductivity of the heat sink 600 is greater than that of air. Therefore, compared with the structure of the middle hole 500, the heat dissipation effect of the sub-pixel structure can be further improved by disposing the heat sink 600 with a larger thermal conductivity.
  • FIG. 12 is a schematic structural diagram of a heat sink 600 according to an embodiment.
  • the heat sink 600 includes a support structure 610 and graphene 620 .
  • the support structure 610 is filled in the middle hole 500 , and the conductivity coefficient of the support structure 610 is less than the conduction threshold value, the support structure 610 is provided with a cavity, and the graphene 620 is filled in the cavity in the support structure 610 .
  • the support structure 610 is also used to isolate the graphene 620 from the second target layer.
  • the conductive graphene 620 can be prevented from being in contact with each film layer in the sub-pixel structure, thereby avoiding short-circuit phenomenon of the sub-pixel structure, thereby improving the stability and reliability of the sub-pixel structure.
  • the supporting structure 610 may use insulating materials such as SiO2, which is not limited in this embodiment.
  • the whole of the filled graphene 620 is a cylindrical structure, in other embodiments, the graphene 620 can also be uniformly and scatteredly distributed in the support structure 610 in the form of small particles. .
  • the thermal conductivity of the graphene 620 is directional, so heat can be better directed to a set direction.
  • graphene 620 is a two-dimensional periodic honeycomb lattice structure connected by a networked six-membered ring structure. Therefore, graphene 620 can be warped into a zero-dimensional fullerene, and can also be rolled into a one-dimensional carbon nanometer. tube or stacked into three-dimensional graphite, this embodiment does not specifically limit the specific form of the graphene 620, as long as better thermal conductivity can be achieved, it falls within the scope of protection of this embodiment.
  • the embodiment of the present application does not specifically limit the preparation method of the above-mentioned sub-pixel structure, and any preparation method capable of forming the above-mentioned sub-pixel structure belongs to the protection scope of the present application.
  • the anode layer 100 , the luminescent material layer 200 and the cathode layer 300 may be formed first, then the middle hole 500 is formed, and the heat sink 600 is filled at the position of the middle hole 500 .
  • the embodiment of the present application also provides a pixel arrangement structure, the pixel arrangement structure includes a plurality of sub-pixels, and the sub-pixels adopt the above-mentioned sub-pixel structure.
  • the pixel arrangement structure includes a plurality of pixel units, each of which includes a first sub-pixel, a second sub-pixel and at least one third sub-pixel; wherein, the first sub-pixel, the The second sub-pixel and the third sub-pixel adopt the above-mentioned sub-pixel structure respectively.
  • the first sub-pixel may be a red sub-pixel
  • the second sub-pixel may be a blue sub-pixel
  • the third sub-pixel may be a green sub-pixel.
  • FIG. 13 is one of the schematic diagrams of the pixel arrangement structure of an embodiment.
  • each of the pixel units includes a red sub-pixel, a blue sub-pixel and a green sub-pixel respectively, and the same Multiple sub-pixels in a pixel unit are uniformly arranged in one direction.
  • FIG. 14 is the second schematic diagram of the pixel arrangement structure of an embodiment.
  • each pixel unit includes one red sub-pixel, one blue sub-pixel and two green sub-pixels.
  • the two green sub-pixels respectively have centers located on two first vertices of a virtual quadrilateral, and the two first vertices are located on a diagonal of the virtual quadrilateral.
  • a red sub-pixel is separated from the green sub-pixel, the red sub-pixel having a center located at a second vertex of the virtual quadrilateral.
  • the blue sub-pixel is separated from the green sub-pixel and the red sub-pixel respectively, the blue sub-pixel has a center located at a third vertex of the virtual quadrilateral, the second vertex and the third vertex are located at On the other diagonal of the virtual quadrilateral.
  • the embodiment of the present application also provides a mask for making the above-mentioned pixel arrangement structure, the mask is provided with a plurality of openings, and the plurality of openings are used to form a plurality of corresponding the sub-pixels.
  • the mask in this embodiment can be understood as a mask set, that is, it specifically includes a plurality of masks, and the plurality of masks in the mask set are commonly used to prepare the pixel arrangement structure.
  • the mask of this embodiment includes a first mask 31 , a second mask 32 and a third mask 33 .
  • FIG. 15 is a schematic structural diagram of a first mask 31 according to an embodiment
  • FIG. 16 is a schematic structural diagram of a second mask 32 according to an embodiment
  • FIG. 17 is a schematic structural diagram of a third mask 33 according to an embodiment.
  • the first mask 31 is provided with a plurality of first openings, which respectively correspond to the plurality of blue sub-pixels in the embodiment of FIG.
  • the stencil 32 is provided with a plurality of second openings, which respectively correspond to the plurality of red sub-pixels in the embodiment of FIG. 13 .
  • the third mask 33 is provided with a plurality of third openings. The openings are in one-to-one correspondence with the multiple green sub-pixels in the embodiment of FIG. 13 . It should be noted that the area of each opening may be slightly larger than the area of the corresponding sub-pixel, that is, the orthographic projection of each sub-pixel on each mask completely falls into each opening. In the pixel arrangement structure formed by using the mask set provided in this embodiment, the shape of each sub-pixel structure is optimized, so that the heat dissipation performance can be improved.
  • FIG. 18 is a schematic diagram of a partial structure of a display panel in an embodiment.
  • the display panel 10 includes a first display area 11 and a second display area 12, wherein, The pixel size of the first display area 11 is smaller than the pixel size of the second display area 12, and the first display area 11 adopts the above-mentioned pixel arrangement structure. That is, the second display area 12 may still adopt the pixel arrangement structure in the related art. It can be understood that the manufacturing difficulty of the special-shaped sub-pixel structure in the first display area 11 is higher than that of sub-pixels in the related art, so the above-mentioned special-shaped sub-pixel structure may not be used in the second display area 12 .
  • the smaller-sized sub-pixel structure adopted in the first display area 11 can also effectively reduce the gap between adjacent sub-pixels under the premise of maintaining the same pixel density as that of the second display area 12, thereby improving the display performance.
  • the light receiving effect of the photosensitive device of the panel 10 can also effectively reduce the gap between adjacent sub-pixels under the premise of maintaining the same pixel density as that of the second display area 12, thereby improving the display performance.
  • FIG. 19 is a schematic cross-sectional view of a driving circuit in a display panel according to an embodiment, and the cross-sectional direction in FIG. 19 is perpendicular to the display surface of the display panel.
  • the display panel in this embodiment includes a substrate and a plurality of functional layers formed on the substrate.
  • the substrate may include polyimide (PI) substrates 711 and buffer layers 712 arranged alternately in sequence, for example, the substrate includes two polyimide (PI) substrates 711 and two buffer layers 712 arranged alternately in sequence. It can be understood that the substrate may also include more polyimide (PI) substrates 711 and buffer layers 712 .
  • the first driving circuit 700 includes a gate 701, a source 702, a drain 703, a source contact structure 704 and a corresponding drain contact structure 705, and the anode layer 100 in the sub-pixel structure passes through the driving wiring L and The source 702 is electrically connected. It can be understood that due to the limited layout area, the driving circuit 700 of the sub-pixel in the first display area 11 can be set outside the first display area 11 through the driving line L, so as to avoid the wiring and the driving circuit 700 Shade problem.
  • the driving circuit 700 of this embodiment may be a 7T1C driving circuit.
  • the drive circuit 700 may also have other numbers of transistors, so that a lightweight display device may be realized with a smaller number of transistors, or a more flexible display function may be realized with a larger number of transistors.
  • 3T1C, 6T1C, 6T2C and other types of drive circuits may be realized with a 7T1C driving circuit.
  • the pixel density of the first display area 11 and the second display area 12 are the same.
  • the pixel density of the first display area 11 and the second display area 12 can both be 400ppi, so as to ensure that the camera area under the display effect screen is completely consistent with the normal screen area.
  • the pixel size of the first display area 11 is 1/3 to 2/3 of the pixel size of the second display area 12, so as to achieve better light transmittance, Thus, the photosensitive effect of the photosensitive device is ensured.
  • the embodiment of the present application also provides a display device as shown in FIG. 1 , including a photosensitive device 20 and the above-mentioned display panel 10 .
  • the photosensitive device 20 is arranged corresponding to the first display area 11 of the display panel 10 .
  • the central hole 500 and the heat sink 600 the transfer of heat can be accelerated, thereby reducing the aging damage of the device due to heat accumulation, thereby improving the under-screen area of the photosensitive device 20 The role of life.

Abstract

一种子像素结构，包括层叠设置的阳极层(100)、发光材料层(200)和阴极层(300)，所述阳极层(100)、所述发光材料层(200)和所述阴极层(300)中的至少一个为第一目标层，所述第一目标层设有中心区域以及连接于所述中心区域(510)的至少两个辐射区域(520)，其中，任意两个相邻的所述辐射区域(520)之间存在一个凹陷区(530)。

Description

子像素结构、像素排布结构、掩膜版、显示面板及设备
相关申请的交叉引用
本申请要求于2021年7月21日提交中国专利局、申请号为2021108272095、发明名称为“子像素结构、像素排布结构、掩膜版、显示面板及设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示领域，特别是涉及一种子像素结构、像素排布结构、掩膜版、显示面板及设备。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成示例性技术。
发明内容
根据本申请的各种实施例，提供一种子像素结构、像素排布结构、掩膜版、显示面板及设备。
一种子像素结构，包括层叠设置的阳极层、发光材料层和阴极层，所述阳极层、发光材料层和阴极层中的至少一个为第一目标层，所述第一目标层设有中心区域以及连接于所述中心区域的至少两个辐射区域，其中，任意两个相邻的所述辐射区域之间存在一个凹陷区。
一种像素排布结构，包括多个子像素，所述子像素采用如上述的子像素结构。
一种掩膜版，用于制作如上述的像素排布结构，所述掩膜版设有多个开口，多个所述开口分别用于一一对应形成多个所述子像素。
一种显示面板，所述显示面板包括第一显示区和第二显示区，其中，所述第一显示区的像素尺寸小于所述第二显示区的像素尺寸，所述第一显示区采用如上述的像素排布结构。
一种显示设备，包括感光器件和如上述的显示面板，其中，所述感光器件与所述显示面板的第一显示区对应设置。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例或示例性技术中的技术方案，下面将对实施例或示例性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为一实施例的显示设备的局部示意图；
图2为图1实施例的显示设备沿AA’方向的剖视示意图；
图3为一实施例的子像素结构的膜层结构示意图之一；
图4为图3实施例的子像素结构的俯视示意图；
图5为一实施例的子像素结构的俯视示意图之一；
图6为一实施例的子像素结构的俯视示意图之二；
图7为一实施例的子像素结构的俯视示意图之三；
图8为一实施例的子像素结构的俯视示意图之四；
图9为一实施例的子像素结构的俯视示意图之五；
图10为一实施例的子像素结构的膜层结构示意图之二；
图11为一实施例的子像素结构的膜层结构示意图之三；
图12为一实施例的散热件的结构示意图；
图13为一实施例的像素排布结构的示意图之一；
图14为一实施例的像素排布结构的示意图之二；
图15为一实施例的第一掩膜版的结构示意图；
图16为一实施例的第二掩膜版的结构示意图；
图17为一实施例的第三掩膜版的结构示意图；
图18为一实施例的显示面板的局部结构示意图；
图19为一实施例的显示面板中驱动电路的剖视示意图。
元件标号说明：
显示面板：10；第一显示区：11；第二显示区：12；感光器件：20；第一掩膜版：31；第二掩膜版：32；第三掩膜版：33；阳极层：100；发光材料层：200；阴极层：300；中心区域：510；辐射区域：520；凹陷区：530；中孔：500；散热件：600；支撑结构：610；石墨烯：620；驱动电路：700；栅极：701；源极：702；漏极：703；源极接触结构：704；漏极接触结构：705；衬底：711；缓冲层：712；栅绝缘层：713；层间绝缘层：714；平坦化层：715；像素定义层：716。
具体实施方式
为了便于理解本申请实施例，下面将参照相关附图对本申请实施例进行更全面的描述。附图中给出了本申请实施例的首选实施例。但是，本申请实施例可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请实施例的公开内容更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请实施例的技术领域的技术人员通常理解的含义相同。本文中在本申请实施例的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请实施例。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
在本申请实施例的描述中，需要理解的是，术语“上”、“下”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方法或位置关系，仅是为了便于描述本申请实施例和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为 对本申请实施例的限制。
可以理解，本申请所使用的术语“第一”、“第二”等可在本文中用于描述各种元件，但这些元件不受这些术语限制。这些术语仅用于将第一个元件与另一个元件区分。举例来说，在不脱离本申请的范围的情况下，可以将第一目标层称为第二目标层，且类似地，可将第二目标层称为第一目标层。第一目标层和第二目标层两者都是目标层，但其不是同一目标层。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。在本申请的描述中，“若干”的含义是至少一个，例如一个，两个等，除非另有明确具体的限定。
图1为一实施例的显示设备的局部示意图，图2为图1实施例的显示设备沿AA’方向的剖视示意图。其中，显示设备可以为智能手机、平板电脑、游戏设备、增强现实(Augmented Reality，AR)设备、笔记本、桌面计算设备、可穿戴设备等。为了方便理解，下面以显示设备为手机进行举例说明。结合参考图1和图2，在本实施例中，显示设备包括显示面板10和感光器件20。
继续参考图2，显示面板10包括邻接的第一显示区11和第二显示区12。其中，第一显示区11的形状可以是圆形、矩形、椭圆形、多边形、不规则异形等，本发明对此不作限定。第二显示区12的形状也可以是环形、矩形等，本发明对此不作限定。其中，感光器件20至少部分与第一显示区11对应设置。示例性地，感光器件20可以设置在第一显示区11的下方，感光器件20用于透过显示面板10的第一显示区11发射和/或接收光学信号。即，第一显示区11是位于感光器件20上方的区域。需要说明的是，在本申请实施例中上方是指由显示设备的背壳指向显示屏的方向，下方是指由显示屏指向背壳的方向。
感光器件20通过接收光线实现基于光学参数的测试和控制。其中，感光 器件20可以为摄像头，感光器件20还可以为环境光传感器、光学距离传感器(例如，红外传感器、激光传感器、接近传感器、距离传感器，光学距离传感器)、结构光模组、飞行时间测距(Time of flight，TOF)镜头模组、光学指纹传感器等。
为了便于说明，本申请各实施例中以感光器件20为摄像头为例进行说明。可以理解的是，驱动电路通常形成于层叠设置的多个功能层中，而上述多个功能层会降低摄像头的入射光强度，甚至会导致成像的衍射问题，大大影响了摄像头的成像质量。因此，对于屏下摄像头方案而言，通过减小第一显示区11的像素尺寸，可以有效提升成像质量，从而改善用户体验。
图3为一实施例的子像素结构的膜层结构示意图之一，参考图3，在本实施例中，子像素结构包括层叠设置的阳极层100、发光材料层200和阴极层300。其中，阳极层100和阴极层300用于共同向发光材料层200施加驱动电压或驱动电流，以共同控制发光材料层200发光。本实施例中的子像素可以理解为一个发光器件，发光器件可以是但不限于有机发光二极管(Organic light-emitting diode，OLED)和量子点发光二极管(Quantum Dot Light Emitting Diodes，QLED)等。其中，各发光器件可为不同颜色的有机发光二极管，如红色OLED、绿色OLED和蓝色OLED等，不同颜色的发光器件的发光层材料不同，从而实现不同颜色的显示，使得显示设备实现全彩显示。
图4为图3实施例的子像素结构的俯视示意图，其中，俯视示意图即是指沿垂直于显示设备的显示面方向观测获得的示意图。结合参考图3和图4，所述阳极层100、发光材料层200和阴极层300中的至少一个为第一目标层，所述第一目标层设有中心区域510以及连接于所述中心区域510的至少两个辐射区域520，例如，辐射区域520的数量可以为三个、四个或五个，本实施例不做限定。其中，任意两个相邻的所述辐射区域520之间存在一个凹陷区530。其中，定义中心区域510和辐射区域520构成的整体外轮廓上的点与中心区域510的中心之间的距离为中心距，若在所述整体外轮廓的某一区域范围内，存在中心距先减小再增大的变化趋势，则认为该区域范围为一凹陷区 530。以图4实施例为例，箭头所指向区域即为一凹陷区530。
需要说明的是，虽然图4实施例示出了一个圆形结构作为中心区域510和辐射区域520之间的界限，但是，上述界限可以理解为虚拟界限，即，在实际的子像素结构中，并不存在上述界限。而且，中心区域510与辐射区域520可以在同一道工艺制程中同时形成。
可以理解的是，显示设备中子像素结构的发热可以参考如下公式(1)。
Q＝J^2 A^2×k/A＝J^2 Ak           (1)
其中，Q为子像素结构散发的热量，J为流过子像素结构的电流密度，A为子像素结构的发光面积，k为一常数。根据以上公式可以，子像素结构散发的热量Q与发光面积A成正比，且与J^2呈正比。因此，相较于发光面积，电流密度对子像素在发光时散发的热量的影响越大。如前述结合图1的说明，为了提高感光器件20对应区域的收光效果，会在第一显示区11设置尺寸较小的子像素，并在第二显示区12设置尺寸较大的子像素。因此，需要使位于第一显示区11的子像素呈现更大的发光亮度，才能使显示设备的均匀发光。可以理解的是，子像素的发光亮度与电流密度成正比，因此，第一显示区11的子像素在发光时散发的热量会远大于第二显示区12的子像素，从而导致第一显示区11的子像素的老化速度较快。
参考图3，对于子像素结构而言，子像素结构内部的热量可以从侧壁散发至外部环境中。其中，侧壁是指子像素结构垂直于显示面的外壁。而且，侧壁的散热面积可以理解为与俯视图形的外轮廓的周长成正比，且与子像素结构的厚度呈正比，厚度是指子像素结构在第一方向上的尺寸，所述第一方向为所述阳极层100、所述发光材料层200和所述阴极层300的堆叠方向。即，可以认为子像素结构的外轮廓的周长与发光面积的比值越大，子像素结构的散热性能越好。因此，相比相关技术中的子像素结构，在本实施例中，通过设置向外突出的辐射区域520，在发光面积相同的前提下，可以扩大子像素的外轮廓的周长，即，扩大了子像素的散热面积，从而提升了子像素的散热能力，进而延长显示设备的使用寿命。
其中，多个所述辐射区域520可以均匀围绕于所述中心区域510。图5为一实施例的子像素结构的俯视示意图之一，参考图5，五个辐射区域520均连接于中心区域510。另外，多个辐射区域520的形状可以不相同，例如，图6为一实施例的子像素结构的俯视示意图之二，参考图6，可以其中两个辐射区域520的形状与另外两个辐射区域520的形状不同，在其他实施例中，辐射区域520的形状也可以为锥形、矩形等。此外，本实施例也不限定各辐射区域520的尺寸，图7为一实施例的子像素结构的俯视示意图之三，结合参考图4和图7，即使同样包括四个辐射区域520，各辐射区域520的尺寸也可以根据需要进行设置。图8为一实施例的子像素结构的俯视示意图之四，参考图8，多个辐射区域520可以互相间隔设置，则辐射区域520与中心区域510的连接处形成凹陷区530，该凹陷区530位于相邻的两个辐射区域520之间。需要说明的是，本实施例不具体限定辐射区域520的数量、形状和尺寸，上述图5至图8仅用于示例性说明，而不用用于限定本申请的保护范围。
在其中一个实施例中，除所述第一目标层以外的其他层在虚拟平面上的正投影完全覆盖所述第一目标层在所述虚拟平面上的正投影。通过上述设置方式，可以使子像素结构的发光形状与第一目标层的形状相对应，而且，也可以降低第一目标层以外的其他层制备过程中的工艺难度，从而提升子像素结构的制备良率。
继续参考图3，在其中一个实施例中，所述阳极层100、所述发光材料层200和所述阴极层300可以均为所述第一目标层，且所述阳极层100、所述发光材料层200和所述阴极层300在所述虚拟平面上的正投影相重合。通过上述设置方式，可以采用相同图形的掩膜版制备阳极层100、发光材料层200和阴极层300，从而降低掩膜版的设计难度。
在其中一个实施例中，所述辐射区域520的外轮廓上任一点的曲率小于曲率阈值。其中，曲率阈值可以根据光刻设备的工艺极限尺寸、子像素结构的尺寸等共同确定。可以理解的是，若某一点的曲率过大，容易引发衍射集中等光学问题，从而影响摄像头等感光器件的感光效果，进而影响成像效果，影响 用户的使用体验。在本实施例中，通过为辐射区域520设置曲率较大的外轮廓，可以有效避免上述衍射集中的问题，从而提升感光器件的性能。进一步地，所述辐射区域520的形状可以为如图4至图8任一实施例中所示的瓣形。
图9为一实施例的子像素结构的俯视示意图之五，参考图9，在本实施例中，相邻的所述辐射区域520的外轮廓通过圆角平滑连接。通过设置平滑连接的圆角，可以使连接处为平滑曲线状，避免相邻的所述辐射区域520的外轮廓连接处的曲率过大，从而进一步抑制衍射集中的问题，进而提升感光器件的性能。
在其中一个实施例中，所述中心区域510的形状为圆形或椭圆形。在本实施例中，通过采用圆形或椭圆形的中心区域510，可以使子像素结构的中心与外轮廓上任一点之间的距离相近，从而避免子像素结构在不同方向上的散热性能的差异过大，进而避免子像素结构在不同方向上的老化速度不同的问题。可以理解的是，中心区域的形状也不局限于圆形或椭圆形，在一些实施例中，中心区域的形状也可以为矩形、平行四边形等。
图10为一实施例的子像素结构的膜层结构示意图之二，参考图10，在其中一个实施例中，所述阳极层100、发光材料层200和阴极层300中的至少一个为第二目标层，所述子像素结构还设有沿第一方向贯穿所述第二目标层的中孔500，所述第一方向为所述阳极层100、所述发光材料层200和所述阴极层300的堆叠方向。需要说明的是，虽然在图10实施例中，中孔500完全贯穿阳极层100、发光材料层200和阴极层300，但在一些实施例中，中孔500也可以只贯穿一个或两个膜层，例如只贯穿发光材料层200和阳极层100。
可以理解的是，中孔500穿过的膜层越多，散热效果越好，但同时在一定程度上影响子像素的发光性能。相似地，中孔500的面积越大，散热效果越好，但同时也在一定程度上影响子像素的发光性能。因此，可以根据需要对上述各参数进行具体的设置。
继续参考图10，在其中一个实施例中，所述子像素结构和所述中孔500的形状均为中心对称图形，且所述子像素结构的对称中心与所述中孔500的 对称中心在所述第一方向上相重合。在子像素结构内部，子像素的中心最容易积累热量，因此，通过将中孔500设置在子像素结构的中心，可以较大程度上地提升子像素结构的散热效果。
图11为一实施例的子像素结构的膜层结构示意图之三，参考图11，在其中一个实施例中，子像素结构还包括填充于所述中孔500的散热件600，其中，所述散热件600的导热系数大于所述第二目标层的导热系数。在本实施例中，散热件600的导热系数还大于空气的导热系数，因此，相比中孔500结构，通过设置具有较大导热系数的散热件600，可以进一步提升子像素结构的散热效果。
图12为一实施例的散热件600的结构示意图，参考图12，在其中一个实施例中，所述散热件600包括支撑结构610和石墨烯620。
支撑结构610填充于所述中孔500，且所述支撑结构610的导电系数小于导电阈值，所述支撑结构610中设有空腔，石墨烯620填充于所述支撑结构610中的空腔。其中，所述支撑结构610还用于隔离所述石墨烯620和所述第二目标层。通过设置支撑结构610，可以避免具有导电性能的石墨烯620与子像素结构中的各膜层接触，从而避免子像素结构发生短路现象，从而提高子像素结构的稳定性和可靠性。其中，支撑结构610可以采用SiO2等绝缘材料，本实施例不做限定。此外，虽然图12实施例中，填充的石墨烯620的整体为一圆柱形结构，但是，在其他实施例中，石墨烯620也可以以小颗粒的方式均匀、零散地分布于支撑结构610中。
进一步地，石墨烯620的导热性具有方向性，因此能够较好地将热量导出至设定的方向。其中，石墨烯620是由网状的六元环结构连接成的两维周期蜂窝状点阵结构，因此，石墨烯620可以翘曲成零维的富勒烯，也能够卷成一维的碳纳米管或者堆垛成三维的石墨，本实施例不具体限定石墨烯620的具体形式，只要能够实现较好的导热性都属于本实施例的保护范围。
可以理解的是，本申请实施例不具体限定上述子像素结构的制备方法，任何能够形成上述子像素结构的制备方法都属于本申请的保护范围。示例性地， 可以先形成阳极层100、发光材料层200和阴极层300，再形成中孔500，并在中孔500位置填充散热件600。
本申请实施例还提供了一种像素排布结构，像素排布结构包括多个子像素，所述子像素采用如上述的子像素结构。具体地，像素排布结构包括多个像素单元，各所述像素单元分别包括一个第一子像素、一个第二子像素和至少一个第三子像素；其中，所述第一子像素、所述第二子像素和所述第三子像素分别采用如上述的子像素结构。其中，第一子像素可以为红色子像素，第二子像素可以为蓝色子像素，第三子像素可以为绿色子像素。基于图4实施例的子像素结构，本申请提供了两种像素排布结构，以进一步进行示例性的说明。
图13为一实施例的像素排布结构的示意图之一，参考图13，在本实施例中，各所述像素单元分别包括一个红色子像素、一个蓝色子像素和一个绿色子像素，同一像素单元中的多个子像素在一个方向上均匀排列。
图14为一实施例的像素排布结构的示意图之二，参考图14，在本实施例中，各所述像素单元分别包括一个红色子像素、一个蓝色子像素和两个绿色子像素。其中，两个所述绿色子像素分别具有位于虚拟四边形两个第一顶点的中心，两个所述第一顶点位于所述虚拟四边形的一条对角线上。红色子像素与所述绿色子像素分离，所述红色子像素具有位于所述虚拟四边形的第二顶点的中心。蓝色子像素分别与所述绿色子像素、所述红色子像素分离，所述蓝色子像素具有位于所述虚拟四边形的第三顶点的中心，所述第二顶点和所述第三顶点位于所述虚拟四边形的另一条对角线上。
本申请实施例还提供了一种掩膜版，用于制作如上述的像素排布结构，所述掩膜版设有多个开口，多个所述开口分别用于一一对应形成多个所述子像素。具体地，本实施例的掩膜版可以理解为掩膜版组，即，具体包括多个掩膜版，掩膜版组中的多个掩膜版共同用于制备像素排布结构。
以制备图13实施例所示的像素排布结构为例，本实施例的掩膜版包括第一掩膜版31、第二掩膜版32和第三掩膜版33。图15为一实施例的第一掩膜版31的结构示意图，图16为一实施例的第二掩膜版32的结构示意图，图17 为一实施例的第三掩膜版33的结构示意图。结合参考图13、图15至图17，第一掩膜版31设有多个第一开口，多个第一开口分别与图13实施例的多个蓝色子像素一一对应，第二掩膜版32设有多个第二开口，多个第二开口分别与图13实施例的多个红色子像素一一对应，第三掩膜版33设有多个第三开口，多个第三开口分别与图13实施例的多个绿色子像素一一对应。需要说明的是，各开口的面积可以比相应的子像素的面积略大，即，各子像素在各掩膜版上的正投影完全落入各开口内。采用本实施例提供的掩膜版组形成的像素排布结构中，各子像素结构的形状被优化，从而可以提升的散热性能。
本申请实施例还提供了一种显示面板，图18为一实施例的显示面板的局部结构示意图，参考图18，所述显示面板10包括第一显示区11和第二显示区12，其中，所述第一显示区11的像素尺寸小于所述第二显示区12的像素尺寸，所述第一显示区11采用如上述的像素排布结构。即，第二显示区12可以仍采用相关技术中的像素排布结构。可以理解的是，第一显示区11中的异形子像素结构的制备难度高于相关技术中的子像素的制备难度，因此在第二显示区12可以不采用上述异形子像素结构。而且，第一显示区11采用的较小尺寸的子像素结构还能够在保持与第二显示区12的像素密度相同的前提下，有效减小相邻的子像素之间的间隙，从而提高显示面板10的感光器件的收光效果。
图19为一实施例的显示面板中驱动电路的剖视示意图，图19的剖面方向垂直于显示面板的显示面。参考图19，在本实施例中的显示面板包括基板和形成与基板上的多个功能层。基板可包括依次交替设置的聚酰亚胺(PI)衬底711和缓冲层712，例如，基板包括依次交替设置的两个聚酰亚胺(PI)衬底711和两个缓冲层712。可以理解的是，基板也可以包括更多数量的聚酰亚胺(PI)衬底711和缓冲层712。基板上还设置有两个栅绝缘层713(GI1层和GI2层)、层间绝缘层714和平坦化层715，并在栅绝缘层713、层间绝缘层714、平坦化层715中还形成驱动电路700。具体地，第一驱动电路700包括栅极701、源极702、漏极703、源极接触结构704和对应的漏极接触结构 705，且子像素结构中的阳极层100通过驱动走线L与源极702电性连通。可以理解的是，由于版图面积受限，第一显示区11的子像素的驱动电路700可以通过驱动走线L引出到第一显示区11的外部进行设置，从而避免走线和驱动电路700的遮光问题。
其中，本实施例的驱动电路700可以为7T1C驱动电路。此外，驱动电路700中也可以具有其他数量的晶体管，从而以较少数量的晶体管实现轻量级的显示设备，或者以较多数量的晶体管实现更加灵活的显示功能，例如，还是可以为3T1C、6T1C、6T2C等其他类型的驱动电路。
继续参考图18，在其中一个实施例中，所述第一显示区11和所述第二显示区12的像素密度相同。例如，第一显示区11和第二显示区12的像素密度可以均为400ppi，从而可以保证显示效果屏下摄像头区域与正常屏区域完全一致。进一步地，在其中一个实施例中，所述第一显示区11的像素尺寸是所述第二显示区12的像素尺寸的1/3至2/3，从而实现较好的光透过率，从而确保感光器件的感光效果。
本申请实施例还提供了一种如图1所示的显示设备，包括感光器件20和如上述的显示面板10。其中，所述感光器件20与所述显示面板10的第一显示区11对应设置。在本实施例中，通过采用前述的子像素结构、中孔500以及散热件600，可以加速热量的传递，从而减少由于热量堆积造成的器件老化损伤，从而起到改善感光器件20的屏下区域寿命的作用。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请实施例的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请实施例构思的前提下，还可以做出若干变形和改进，这些都属于本申请实施例的保护范围。因此，本申请实施例专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种子像素结构，包括层叠设置的阳极层、发光材料层和阴极层，所述阳极层、所述发光材料层和所述阴极层中的至少一个为第一目标层，所述第一目标层设有中心区域以及连接于所述中心区域的至少两个辐射区域，其中，任意两个相邻的所述辐射区域之间存在一个凹陷区。
  2. 根据权利要求1所述的子像素结构，除所述第一目标层以外的其他层在虚拟平面上的正投影完全覆盖所述第一目标层在所述虚拟平面上的正投影，所述虚拟平面垂直于第一方向，所述第一方向为所述阳极层、所述发光材料层和所述阴极层的堆叠方向。
  3. 根据权利要求2所述的子像素结构，所述阳极层、所述发光材料层和所述阴极层均为所述第一目标层，且所述阳极层、所述发光材料层和所述阴极层在所述虚拟平面上的正投影相重合。
  4. 根据权利要求1所述的子像素结构，所述阳极层、所述发光材料层和所述阴极层中的至少一个为第二目标层，所述子像素结构还设有沿第一方向贯穿所述第二目标层的中孔，所述第一方向为所述阳极层、所述发光材料层和所述阴极层的堆叠方向。
  5. 根据权利要求4所述的子像素结构，所述子像素结构和所述中孔的形状均为中心对称图形，且所述子像素结构的对称中心与所述中孔的对称中心在所述第一方向上相重合。
  6. 根据权利要求4所述的子像素结构，还包括填充于所述中孔的散热件，其中，所述散热件的导热系数大于所述第二目标层的导热系数。
  7. 根据权利要求6所述的子像素结构，所述散热件包括：
    支撑结构，填充于所述中孔，且所述支撑结构的导电系数小于导电阈值，所述支撑结构中设有空腔；
    石墨烯，填充于所述支撑结构中的空腔；
    其中，所述支撑结构还用于隔离所述石墨烯和所述第二目标层。
  8. 根据权利要求7所述的子像素结构，所述支撑结构的材料为SiO2。
  9. 根据权利要求7所述的子像素结构，填充于所述空腔中的石墨烯的形状为圆柱形。
  10. 根据权利要求1至9任一项所述的子像素结构，多个所述辐射区域均匀围绕于所述中心区域。
  11. 根据权利要求1至9任一项所述的子像素结构，相邻的所述辐射区域的外轮廓通过圆角平滑连接。
  12. 根据权利要求1至9任一项所述的子像素结构，所述辐射区域的外轮廓上任一点的曲率小于曲率阈值。
  13. 根据权利要求1至9任一项所述的子像素结构，所述辐射区域的形状为瓣形。
  14. 根据权利要求1至9任一项所述的子像素结构，所述中心区域的形状为圆形或椭圆形。
  15. 一种像素排布结构，包括多个子像素，所述子像素采用如权利要求1至14任一项所述的子像素结构。
  16. 一种掩膜版，用于制作如权利要求15所述的像素排布结构，所述掩膜版设有多个开口，多个所述开口分别用于一一对应形成多个所述子像素。
  17. 一种显示面板，所述显示面板包括第一显示区和第二显示区，其中，所述第一显示区的像素尺寸小于所述第二显示区的像素尺寸，所述第一显示区采用如权利要求15所述的像素排布结构。
  18. 根据权利要求17所述的显示面板，所述第一显示区和所述第二显示区的像素密度相同。
  19. 根据权利要求17所述的显示面板，所述第一显示区的像素尺寸是所述第二显示区的像素尺寸的1/3至2/3。
  20. 一种显示设备，包括感光器件和如权利要求17至19任一项所述的显示面板，其中，所述感光器件与所述显示面板的第一显示区对应设置。
PCT/CN2022/099378 2021-07-21 2022-06-17 子像素结构、像素排布结构、掩膜版、显示面板及设备 WO2023000881A1 (zh)

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