WO2016026212A1 - Oled像素单元及其制备方法、显示面板和显示装置 - Google Patents

Oled像素单元及其制备方法、显示面板和显示装置 Download PDF

Info

Publication number
WO2016026212A1
WO2016026212A1 PCT/CN2014/089797 CN2014089797W WO2016026212A1 WO 2016026212 A1 WO2016026212 A1 WO 2016026212A1 CN 2014089797 W CN2014089797 W CN 2014089797W WO 2016026212 A1 WO2016026212 A1 WO 2016026212A1
Authority
WO
WIPO (PCT)
Prior art keywords
photonic crystal
layer
pixel unit
oled pixel
crystal array
Prior art date
Application number
PCT/CN2014/089797
Other languages
English (en)
French (fr)
Inventor
李延钊
孙力
刘则
施槐庭
查奇君
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/771,455 priority Critical patent/US10332944B2/en
Publication of WO2016026212A1 publication Critical patent/WO2016026212A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/38Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/126Shielding, e.g. light-blocking means over the TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/50OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present invention relates to the field of display, and in particular, to an OLED pixel unit, a method for fabricating the same, a display panel, and a display device.
  • the Active Matrix/Organic Light Emitting Diode (OLED) panel is a new display technology. Compared with traditional liquid crystal panels, OLED panels have the characteristics of fast response, high contrast, and wide viewing angle. In addition, the OLED panel has the characteristics of self-illumination, and does not require the use of a backlight panel, thereby saving the cost of the backlight module and being lighter and thinner than that of the conventional liquid crystal panel. Currently, OLED panels have become a favorable candidate for next-generation display technology.
  • OLED panels are basically prepared based on a process of 4 inches or more, using small molecule evaporation (such as FMM process or WCOA process), solution printing process (such as Ink-Jet Printing, Nozzle Printing, etc.) and evaporation. - solution compounding process, etc.
  • small molecule evaporation such as FMM process or WCOA process
  • solution printing process such as Ink-Jet Printing, Nozzle Printing, etc.
  • evaporation. such as Ink-Jet Printing, Nozzle Printing, etc.
  • an organic light emitting diode (OLED) component capable of emitting a preset color can only be prepared by a process of a small-molecular fine metal mask (Fine-Metal-Mask, FMM for short), evaporation, solution printing, evaporation-solution compounding, and the like. These processes are more difficult and costly, and the organic light-emitting diodes cannot be made particularly small, and high-resolution display cannot be achieved.
  • a small-molecular fine metal mask Feine-Metal-Mask, FMM for short
  • the present invention provides an OLED pixel unit for realizing high resolution and ultra high resolution display, a method of fabricating the same, a display panel, and a display device.
  • an OLED pixel unit includes: an organic light emitting diode that emits light covering a range of wavelengths; and an array of photonic crystals formed on a light exiting side of the organic light emitting diode, the structural parameters of which are determined by a preset color of the OLED pixel unit; The light emitted by the LED is wavelength-selected via the photonic crystal array, thereby presenting on the light-emitting side of the organic light-emitting diode The default color is displayed.
  • the photonic crystal array is a three-dimensional photonic crystal array.
  • the photonic crystal array is a two-dimensional photonic crystal array; the two-dimensional photonic crystal array is a rectangular periodic structure, a diamond periodic structure or a quasi-periodic structure; and the constituent unit is a concave structure, a convex structure, or A raised/recessed combination of hybrid structures.
  • the concave structure is a cylindrical hole or a spherical concave structure; the convex structure is a cylindrical or spherical convex structure.
  • the two-dimensional photonic crystal array is a rectangular periodic structure, and the constituent unit is a cylindrical hole concave structure.
  • the organic light emitting diode is a white organic light emitting diode.
  • the default color for the blue OLED pixel unit cylinder bore diameter D of the concave structure 1 satisfies: 245nm ⁇ D 1 ⁇ 255nm; holes in the X and Y directions of the spacing L 1 satisfy: 335nm ⁇ L 1 ⁇ 345nm; for the preset color is green OLED pixel cells: cylinder bore diameter D 2 of the concave structure satisfies: 215nm ⁇ D 2 ⁇ 225nm, holes in the X direction and the Y direction distance L 2 satisfy: 135nm ⁇ L 2 ⁇ 145nm; or for the preset color red OLED pixel cell: cylinder bore diameter D of the concave structures 3 satisfy: 95nm ⁇ D 3 ⁇ 105nm, holes in the X direction and the Y direction satisfies the pitch L 3 : 295 nm ⁇ L 3 ⁇ 305 nm.
  • the structural parameters of the photonic crystal array are calculated by a plane wave method, a transfer matrix method, or a finite element method.
  • the OLED pixel unit further includes: a substrate; a driving component formed on the substrate; and a passivation layer overlying the driving component, the anode of the organic light emitting diode passing A via on the passivation layer is electrically connected to the drive assembly.
  • the photonic crystal array is formed in the substrate, the driving component forming film layer or the passivation layer.
  • the photonic crystal array is formed in the passivation layer, and a portion of the material of the anode of the organic light emitting diode is filled in the photonic crystal array.
  • the OLED pixel unit further includes a buffer layer formed between the substrate and the driving component, wherein the photonic crystal array is formed in the buffer layer.
  • the driving component is a TFT component, an NMOS component, a PMOS component, or a CMOS component.
  • the TFT component is a TFT component of a bottom gate structure, including: a gate formed in the a gate insulating layer formed on the gate and the transparent substrate not covered by the gate; an active layer formed on the gate insulating layer;
  • a source and a drain are formed on both sides of the etch barrier layer and are located above the active layer and the gate insulating layer not covered by the active layer;
  • the photonic crystal array is formed in any of the gate layer, the gate insulating layer, the active layer, the etch barrier layer, the source or the drain.
  • the organic light emitting diode includes: a first electrode; a light emitting layer formed on the first electrode; and a second electrode formed on the light emitting layer.
  • the photonic crystal array is formed in a film layer of the first electrode or the second electrode.
  • a display panel is also provided.
  • the display panel includes one or more of the above-described OLED pixel units.
  • a display device comprising the above OLED display panel.
  • a preparation method for preparing the above OLED pixel unit includes: forming an organic light emitting diode; and forming a photonic crystal array on a light outgoing side of the organic light emitting diode before or during the step of forming the organic light emitting diode.
  • the photonic crystal array is formed by one of the following techniques: a photolithography etching process, a nanoimprint process, an ion beam etching process, a thermal baking process, a microsphere spin coating process, and a micro Ball printing process, nanoparticle spin coating technology, nanoparticle printing technology.
  • the OLED pixel unit of the present invention the preparation method thereof, the display panel and the display device have at least one of the following beneficial effects:
  • the processing size of photonic crystal arrays is on the order of nanometers, with good monochromaticity and certain directionality, which can achieve the resolution unmatched by existing processes under the premise of ensuring the existing display effects, and then adopt The resolution of the OLED pixel unit of the photonic crystal array can also be greatly improved to meet the application requirements of high-resolution and ultra-high resolution OLED display panels;
  • the white light organic light emitting diode is used to realize the wavelength selection of white light by the photonic crystal array, and the white light organic light emitting diode can be realized by the Open-Mask process with high precision, thereby making the high resolution display difficult to be made by the organic light emitting diode. Transfer to the backplane, which greatly reduces the difficulty of solving high-resolution display problems. In the case of preparing an equivalent resolution display, the preparation process is greatly simplified;
  • FIG. 1 is a schematic structural diagram of an OLED pixel unit according to an embodiment of the invention.
  • FIG. 2 is a schematic structural view of a TFT assembly in the OLED pixel unit shown in FIG. 1;
  • 3A and 3B are respectively a cross-sectional view and a perspective view of a photonic crystal array on a passivation layer in the OLED pixel unit shown in FIG. 1;
  • 4A and 4B are respectively a cross-sectional view and a perspective view of a columnar convex photonic crystal on a passivation layer in an OLED pixel unit according to another embodiment of the present invention
  • 5A and 5B are respectively a cross-sectional view and a perspective view of a spherical convex photonic crystal on a passivation layer in an OLED pixel unit according to another embodiment of the present invention
  • 6A and 6B are respectively a cross-sectional view and a perspective view of a spherical concave photonic crystal on a passivation layer in an OLED pixel unit according to another embodiment of the present invention
  • FIG. 7 is a schematic structural view of a white organic light emitting diode in the OLED pixel unit shown in FIG. 1;
  • FIG. 8 is a flowchart of a method for fabricating an OLED pixel unit according to an embodiment of the invention.
  • Figure 9 is a schematic cross-sectional view showing the device after performing each step in the preparation method shown in Figure 8.
  • FIG. 10 is a schematic structural view of an anode in a backplane and an LED in an OLED pixel unit according to an embodiment of the invention
  • FIG. 11 is a schematic structural view of a backplane in an OLED pixel unit according to an embodiment of the invention.
  • an OLED pixel unit includes: an organic light emitting diode that emits light covering a range of wavelengths; and an array of photonic crystals located on a light exiting side of the organic light emitting diode, the structural parameters of which are The preset color of the OLED pixel unit is determined; wherein light emitted by the organic light emitting diode is wavelength-selected via the photonic crystal array, thereby exhibiting a preset color on a light-emitting side of the organic light-emitting diode.
  • Photonic crystals are special lattice structures that respond to light. For example, semiconductor materials periodically appear at the lattice nodes (where each atom is located). Photonic crystals are periodically periodic at certain positions of the high refractive index material. A material that exhibits a low refractive index (such as artificially created air voids). High and low refractive index materials are alternately arranged to form a periodic structure to produce a photonic crystal band gap (Band Gap, similar to a forbidden band in a semiconductor), and a photonic crystal can modulate electromagnetic waves having corresponding wavelengths when electromagnetic waves propagate in a photonic crystal structure.
  • Photonic crystal band gap Band Gap, similar to a forbidden band in a semiconductor
  • the electromagnetic wave energy forms an energy band structure.
  • a band gap occurs between the energy band and the energy band, that is, a photonic band gap. All photons with energy in the photonic band gap cannot enter the crystal.
  • the distance between the periodically arranged low refractive index sites is the same, resulting in a photonic crystal of a certain distance only producing an energy band effect on light waves of a certain frequency. That is, only light of a certain frequency will be completely prohibited from propagating in a photonic crystal with a certain period of time.
  • the present invention optimizes the design of the photonic crystal, that is, the periodic arrangement of optical materials having a size of 100 nm to 1 ⁇ m, so that in the designed photonic crystal, except for a specific wavelength band (for example, red light band, green light) In the band or blue band, but not limited to the light, the light in other bands is prohibited from propagating, thereby achieving the function of blocking a certain color.
  • a specific wavelength band for example, red light band, green light
  • the light in other bands is prohibited from propagating, thereby achieving the function of blocking a certain color.
  • an OLED pixel unit includes: an organic light emitting diode emitting light covering a range of wavelengths; and a photonic crystal array formed on a light emitting side of the organic light emitting diode (or a photonic crystal array disposed on a light emitting path of the organic light emitting diode), the photonic crystal
  • the structural parameters of the array are determined by the preset color of the OLED pixel unit; wherein the light emitted by the organic light emitting diode is wavelength-selected via the photonic crystal array, so that the light emitted from the organic light emitting diode passes through the photonic crystal on the light emitting side of the organic light emitting diode After the display) presents a preset color.
  • the photonic crystal array can be a two-dimensional photonic crystal array or a three-dimensional photonic crystal array.
  • the material forming the photonic crystal array is various types of insulating materials, such as inorganic insulating materials, organic insulating materials or composite insulating materials.
  • the light exiting side that is, the side from which the light of the OLED exits, the way in which the light is emitted may include top emission, bottom emission, and double-sided emission.
  • the processing size of the photonic crystal array is on the order of nanometers, the resolution of the OLED pixel unit using the photonic crystal array can be greatly improved, and the application requirements of the high-resolution and ultra-high resolution OLED display panel are satisfied.
  • FIG. 1 is a schematic structural diagram of an OLED pixel unit according to an embodiment of the invention.
  • the OLED pixel unit of the two-dimensional photonic crystal includes a transparent substrate 100, a TFT assembly 200 formed on the transparent substrate 100, and a passivation layer 300 overlying the TFT assembly 200.
  • the passivation layer in the preset pixel region is etched to form a two-dimensional photonic crystal array, and the period and the cell structure size of the two-dimensional photonic crystal array are determined by the preset color of the OLED pixel unit; the pixel defining layer 400 is formed.
  • the pixel defining layer 400 is etched to form a pixel region; the white light organic light emitting diode 500 is formed in a pixel region defined by the pixel defining layer 400.
  • the preset color refers to the color that is displayed by the OLED pixel unit in the panel design stage. For example, if the OLED pixel unit is a red pixel, the preset color is red; if the OLED pixel unit is blue, the The default color is blue, others are similar.
  • white light is emitted from the white organic light emitting diode 500, and the wavelength is selected through the photonic crystal array on the passivation layer 300, and the preset can be presented from the direction of the back surface of the transparent substrate. colour.
  • the transparent substrate 100 is a glass substrate, but the invention is not limited thereto.
  • the transparent substrate 100 may also be made of various substrates such as quartz, single crystal silicon, and plastic film.
  • FIG. 2 is a schematic structural view of a TFT assembly in the OLED pixel unit shown in FIG. 1.
  • the TFT assembly adopts a bottom gate structure.
  • the TFT device 200 includes a gate electrode 210 formed on the transparent substrate 100, and a gate insulating layer 220 formed on the gate electrode 210 and the transparent substrate 100 not covered by the gate electrode 210.
  • An active layer 230 is formed over the gate insulating layer 220; an etch stop layer 240 is formed over the active layer 230; a source 251 and a drain 252 are formed on both sides of the etch stop layer 240, and It is located above the active layer 230 and the gate insulating layer 220 that is not covered by the active layer 230.
  • a buffer layer (not shown) may be further included between the gate electrode 210 and the substrate 100.
  • the buffer layer is a SiO 2 layer of 200-2000 nm.
  • the gate 210 is a molybdenum (Mo) layer of 200-2000 nm, but the invention is not limited thereto.
  • the gate 210 may also be a thin film formed of one or more of the following materials having a thickness between 1 nm and 500 nm: epitaxial silicon, a metallic material, and a composite conductive material.
  • the metal material is a simple material of one of the following materials, or an alloy material composed of two or more of the following materials: Mo, Al, Cr.
  • the gate insulating layer 220 is a SiO 2 layer of 150-4000 nm, but the invention is not limited thereto.
  • the gate insulating layer 220 may also be an insulating material layer such as a thermal silicon oxide layer, a silicon nitride (Si 3 N 4 ) layer or a silicon oxynitride layer having a thickness of between 1 nm and 100 nm.
  • the thermal silicon oxide layer or the silicon nitride (Si 3 N 4 ) layer can be deposited by a CVD method.
  • the active layer 230 is an indium gallium zinc oxide (IGZO) layer of 50-2000 nm, but the invention is not limited thereto.
  • the active layer 230 may also be an amorphous silicon layer, a single crystal silicon layer, a low temperature polysilicon layer, an organic semiconductor layer or other oxide active layer having a thickness of 5 nm to 200 nm.
  • the low temperature polysilicon layer herein refers to a polysilicon layer formed at less than 500 ° C using an LTPS process.
  • the etch stop layer 240 is a 50 nm SiO 2 layer, but the invention is not limited thereto.
  • the etch stop layer 240 can also be a SiO 2 layer having a thickness between 10 nm and 100 nm.
  • the etch stop layer 240 functions to prevent damage to the active layer 230 due to wet etching of the source/drain electrodes, that is, to prevent drilling.
  • the source and the drain are Mo/Al layers, but the invention is not limited thereto.
  • the source and drain electrodes may also be metal material layers such as Ti, Cr, and Au/Ti having a thickness of between 1 nm and 500 nm, alloy material layers, and other composite conductive material layers.
  • the locations of the source and drain are interchangeable and will not be described in detail herein.
  • a TFT component is used as the driving component, but the invention is not limited thereto.
  • an NMOS component, a PMOS component, or a CMOS component may be used as the driving component, and the present invention can also be implemented.
  • the invention wherein the TFT component can be an IGZO-TFT component, an LTPS TFT or an a-Si TFT component.
  • the NMOS component can be a monocrystalline silicon NMOS component.
  • the PMOS component can be a monocrystalline silicon PMOS component.
  • the CMOS component can be a monocrystalline silicon CMOS component.
  • a passivation layer 300 is overlaid over the TFT assembly 200 described above.
  • the passivation layer 300 is a 100 nm SiO 2 layer, but the invention is not limited thereto.
  • the passivation layer may also be another layer of insulating material having a thickness of from 1 nm to 500 nm, such as a layer of silicon nitride (Si 3 N 4 ).
  • a pixel region is preset in the passivation layer 300 to form a two-dimensional photonic crystal array having a periodic structure.
  • the parameters of the two-dimensional photonic crystal array are determined by the preset color of the preset pixel area.
  • the color selection of white light that is, wavelength selection, is achieved by the two-dimensional photonic crystal array.
  • the period of the two-dimensional photonic crystal array is determined by the preset color of the preset pixel area.
  • the period of the photonic crystal array and the shape and radius of the photonic crystal array are calculated according to the preset color, and then the passivation layer is perforated above the passivation layer by dry etching. A photonic crystal array is formed.
  • the relevant parameters of the photonic crystal array can be calculated by a Plane Waves Method (PWM), a Transfer Matrix Method (TMM), a Finite Element Method (FEM), or the like.
  • PWM Plane Waves Method
  • TMM Transfer Matrix Method
  • FEM Finite Element Method
  • PWM Plane Waves Method
  • FDTD Finite Difference Time Domain
  • TMM Transfer Matrix Method
  • the present invention preferably employs these commercial software to calculate the structural parameters of the photonic crystal array, and then fabricates a two-dimensional photonic crystal array by actual process inspection to improve efficiency and reduce the occurrence of errors.
  • the periodic shape parameter includes a periodic form, a period in each direction; and the second type is a shape constituting one of the units (abbreviated as a constituent unit) in the photonic crystal array, and a size in each direction.
  • 3A and 3B are respectively a cross-sectional view and a perspective view of a photonic crystal array on a passivation layer in the OLED pixel unit shown in FIG. 1.
  • the present embodiment adopts a two-dimensional rectangular periodic structure photonic crystal array, and the constituent unit has a cylindrical hole concave structure.
  • the commercial software Comsol is used to calculate the structural parameters of the photonic crystal array, and the obtained parameters of the photonic crystal array are as follows:
  • (1) for the preset color is blue OLED pixel unit: cylinder bore diameter D of the concave structure 1 satisfies: 245nm ⁇ D 1 ⁇ 255nm; holes in the X direction and the Y direction distance L 1 satisfies: 335nm ⁇ L 1 ⁇ 345 nm;
  • (2) for the preset color is green OLED pixel cells: cylinder bore diameter D 2 of the concave structure satisfies: 215nm ⁇ D 2 ⁇ 225nm, holes in the X direction and the Y direction distance L 2 satisfies: 135nm ⁇ L 2 ⁇ 145 nm; or
  • the depth of the cylindrical hole of the unit of the two-dimensional photonic crystal array it can be adjusted as needed as long as the thickness of the passivation layer is not exceeded.
  • the constituent unit is a cylindrical hole, but the invention is not limited thereto.
  • the constituent unit may also be a concave structure other than the hole-like structure, a convex structure, or a mixed structure of a combination of a concave shape and a convex shape.
  • the periodic structure of the photonic crystal array may be a diamond-shaped periodic structure or a quasi-periodic structure or the like in addition to the rectangular array periodic structure.
  • the quasi-periodic structure here refers to a periodic structure that does not satisfy the strict sense, but can be considered as a structural form of the periodic structure after introducing a certain approximation.
  • the constituent units in the photonic crystal array may also be columnar, and cross-sectional and perspective views thereof are shown in FIGS. 4A and 4B.
  • the constituent unit in the photonic crystal array may further have a spherical convex shape, and a cross-sectional view and a perspective view thereof are as shown in FIGS. 5A and 5B.
  • the constituent unit in the photonic crystal array may further have a spherical concave shape, and a cross-sectional view and a perspective view thereof are as shown in FIGS. 6A and 6B.
  • the pixel defining layer 400 is formed over the passivation layer 300 to define a pixel region to fabricate a white organic light emitting diode.
  • the pixel defining layer 400 is a 1.5 ⁇ m acrylic material, but the invention is not limited thereto.
  • the pixel defining layer may also be a film layer prepared from other resin materials, and has a thickness of generally 0.5 ⁇ m to 3 ⁇ m.
  • the substrate 100, the TFT assembly 200, the passivation layer 300, and the pixel defining layer 400 collectively constitute a TFT backplane.
  • a white organic light emitting diode will then be fabricated on the TFT backplane.
  • the white light organic light emitting diode 500 has an overall thickness of 60 nm to 1000 nm and may be a One Unit structure or a Tandem structure.
  • the organic light emitting diode includes: a first electrode; a light emitting layer formed on the first electrode; and a second electrode formed on the light emitting layer.
  • the first electrode may be an anode or a cathode, corresponding to the case where the first electrode is an anode, the second electrode is a cathode, and the second electrode is an anode corresponding to the case where the first electrode is a cathode.
  • the organic light emitting diode may further include other film layers, and details are not described herein again.
  • FIG. 7 is a schematic structural view of the white organic light emitting diode in the OLED pixel unit shown in FIG.
  • the main body portion of the white light organic light emitting diode 500 is formed in the pixel region, and includes an anode 510 formed in the pixel region and electrically connected through the via hole etched on the passivation layer 300 .
  • the light emitting layer is formed on the anode 510; and the cathode 550 is formed on the light emitting layer.
  • the pixel defining layer 400 is formed after the anode 510 is formed.
  • the anode 510 can also be referred to as a pixel electrode layer.
  • an anode 510 is formed over the passivation layer 300 , and a body portion thereof is formed in a predetermined pixel region, and one end thereof is electrically connected to the TFT component through a via hole etched on the passivation layer 300 .
  • the OLED includes a hole transport layer 520, an illuminating layer 530, and an electron transport layer 540 which are sequentially deposited on the anode 510.
  • the anode 510 is a 100 nm ITO (indium tin oxide) layer, but the invention is not limited thereto.
  • the anode 510 can also be a conductive film layer of other conductive materials, such as an amorphous or polycrystalline layer of graphene material.
  • the thickness h 2 of the anode satisfies: 1 nm ⁇ h2 ⁇ 500 nm.
  • the hole transport layer 520 is 50 nm thick NPB (N,N'-diphenyl-N-N'bis(1-naphthyl)-1,1'diphenyl-4,4'- Diamine) layer, but the invention is not limited thereto.
  • the hole transport layer 520 may also be a film prepared from other aromatic amine materials having a thickness of 1 nm to 100 nm, such as TPD (N, N'-diphenyl-N-N' bis(3-methylphenyl)- 1,1' diphenyl-4,4'-diamine) and the like.
  • the light-emitting layer 530 is a 25 nm thick CBP: (ppy) 2 Ir (acac), CBP: FIrpic, and CBP: Btp2Ir (acac) layers, and the three layers respectively emit green light/blue light/red light, thereby overall The device emits white light, but the invention is not limited thereto.
  • the light-emitting layer 530 may also be a polymer layer prepared by a polymer having a thickness of 1 nm to 100 nm, a metal complex, or a small molecule organic fluorescent or phosphorescent material. Among them, 8-hydroxyquinoline aluminum (AlQ), coumarin, rubrene, and the like in a small molecule material can be used to obtain different light-emitting wavelengths.
  • the present invention can also adopt other forms of white light emitting diodes, for example, light emitting diodes using other structural forms of light emitting layers, and the present invention can also be implemented. Those skilled in the art should be aware of the structural forms of these organic light emitting diodes, which will not be enumerated here.
  • the electron transport layer 540 is an 8-hydroxyquinoline aluminum (AlQ) layer having a thickness of 30 nm to 70 nm, but the invention is not limited thereto.
  • the electron transport layer 540 may also be an organic material layer having a lower LUMO level such as Bphen of 6 nm to 80 nm.
  • the cathode 550 is a LiF/Al layer of 5 nm to 10 nm, wherein the thickness of the LiF is 5 nm to 10 nm, and the thickness of the Al layer is 100 nm to 300 nm, but the invention is not limited thereto.
  • the cathode 550 may also be a film of a low work function metal such as Mg:Ag such as Mg:Ag of 5 nm to 50 nm and an alloy thereof.
  • the upper layer electrode is the cathode and the lower layer electrode is the anode, and the light emitting layer is also located between the cathode and the anode.
  • the implementation form is similar to the white light emitting diode in this embodiment, and should also be within the protection scope of the present invention, and details are not described herein again.
  • the wavelength selection of the white light organic light emitting diode is realized by the photonic crystal array, and the high resolution display is not required to be realized by the organic light emitting diode itself, and the manufacturing difficulty of the high resolution display is transferred from the organic light emitting diode to the back plate. Reduced the difficulty of solving high resolution display problems.
  • the photonic crystal array is disposed in the passivation layer in the above embodiment, the present invention is not limited thereto.
  • the photonic crystal array may be located in any film structure on the light emitting side of the organic light emitting diode, such as a gate.
  • the gate insulating layer, the active layer, the etch stop layer, the source or the drain layer are disposed in the same layer.
  • a display panel is also provided.
  • the display panel includes one or more OLED pixel units as described in any of the above embodiments.
  • the OLED pixel unit includes: an organic light emitting diode that emits light covering a range of wavelengths; a photonic crystal array formed on a light exiting side of the organic light emitting diode, the structural parameter of which is determined by a preset color of the OLED pixel unit; wherein, the organic light emitting The light emitted by the diode is wavelength-selected via the photonic crystal array to present a predetermined color on the light-emitting side of the organic light-emitting diode (via the photonic crystal array).
  • the OLED pixel unit array is arranged, and the photonic crystal array with different wavelength selection functions is arranged.
  • the columns are arranged periodically in the same manner as the corresponding organic light-emitting diodes, so that full-color display is achieved by the wavelength selection of the photonic crystal.
  • the display panel may further include one or more OLED pixel units according to any of the following embodiments, and the composition and principle thereof are the same as those of the embodiment, and will not be described in detail herein.
  • the display device may be: an OLED display panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like, or any product or component having a display function.
  • a display device is also provided.
  • the display device includes the display panel of any of the above embodiments.
  • the display panel included in the display device may also be composed of the OLED pixel unit described in any of the subsequent embodiments.
  • FIG. 8 is a flow chart of a method of fabricating an OLED pixel unit according to an embodiment of the invention.
  • Figure 9 is a schematic cross-sectional view showing the device after each step is performed in the preparation method shown in Figure 8. Referring to FIG. 8 and FIG. 9 , the method for preparing the OLED pixel unit of this embodiment may include steps A-F.
  • Step A A bottom gate TFT module was prepared on a glass substrate.
  • the step A of preparing the TFT component may specifically include the sub-steps A0-A6. among them,
  • Sub-step A0 cleaning the glass substrate
  • the cleaning method can be a standard method of cleaning the substrate.
  • the cleaned glass substrate is as shown in A of Fig. 9.
  • various substrates such as quartz, single crystal silicon, and plastic film can be used.
  • Sub-step A1 depositing a 200-2000 nm thick SiO 2 film as a buffer layer on a glass substrate by a CVD method;
  • Sub-step A2 depositing a 200 nm Mo layer on the buffer layer by a sputtering method, and preparing a desired gate 210 by photolithography, etching, etc., as shown in B of FIG. 9;
  • the gate 210 may also be a thin film formed of one or more of the following materials having a thickness between 1 nm and 500 nm: epitaxial silicon, a metal material, and a composite conductive material.
  • the metal material is a simple material of one of the following materials, or an alloy material composed of two or more of the following materials: Mo, Al, Cr.
  • Sub-step A3 depositing a 150 nm SiO 2 layer as a gate insulating layer 220 at 370 ° C by a CVD method, as shown in C of FIG. 9;
  • the gate insulating layer 220 may further be an insulating material layer such as a thermal silicon oxide layer, a silicon nitride (Si 3 N 4 ) layer or a silicon oxynitride layer having a thickness of between 1 nm and 100 nm.
  • the thermal silicon oxide layer or the silicon nitride (Si 3 N 4 ) layer can be deposited by a CVD method.
  • Sub-step A4 depositing a 50 nm IGZO film layer by a sputtering method, and etching a channel region to form an active layer 230, as shown by D in FIG. 9;
  • the active layer 230 may also be an amorphous silicon layer, a single crystal silicon layer, a low temperature polysilicon layer, an organic semiconductor layer or other oxide active layer having a thickness of 5 nm to 200 nm.
  • Sub-step A5 depositing about 50 nm of SiO 2 over the active layer 230, and forming an etch stop layer 240 by photolithography, etching, etc., as shown in E of FIG. 9;
  • the etch barrier layer 240 may also be a SiO 2 layer having a thickness between 10 nm and 100 nm.
  • Sub-step A6 forming a source and a drain of Mo/Al material on both sides of the etch barrier layer 240, over the active layer 230, and over the gate insulating layer 220 not covered by the active layer 230, as shown in FIG. 9 is shown in F.
  • the source and the drain may also be a metal material layer such as Ti, Cr, and Au/Ti having a thickness of between 1 nm and 500 nm, an alloy material layer, and other composite conductive material layers. Additionally, the source and drain locations can be interchanged.
  • the active layer in the TFT backplane assembly can be doped and activated as needed.
  • this doping and activation is performed after the gate is completed.
  • the doping and activation process is performed after the passivation layer or planarization layer is completed.
  • Step B A layer of SiO 2 of about 100 nm was deposited as a passivation layer over the TFT assembly.
  • the passivation layer may also be another insulating material layer having a thickness of 1 nm to 500 nm, such as a silicon nitride (Si 3 N 4 ) layer.
  • Step C forming a two-dimensional photonic crystal array by arranging a predetermined pixel region in the passivation layer, wherein a period and a cell structure size of the two-dimensional photonic crystal array are determined by a preset color of the current OLED pixel unit, as shown in FIG. Shown in G.
  • a method for preparing a two-dimensional photonic crystal array on a passivation layer is performed by a photolithography etching process, that is, a mask is first prepared by photolithography, and then a passivation layer of a predetermined pixel region is directly engraved according to the mask.
  • Eclipse formation Two-dimensional photonic crystal array.
  • the method for preparing a photonic crystal array on the passivation layer may also adopt a direct etching process, that is, directly etching a passivation layer of a predetermined pixel region to form a photonic crystal array.
  • the method for preparing a two-dimensional photonic crystal array on the passivation layer can also adopt a nanoimprint process, an ion beam etching process, and a thermal baking process.
  • the ion beam etching process is very different from the conventional photolithography process.
  • the photolithography process uses a beam to perform mask patterning with an accuracy of several tens of nanometers, and ion beam etching uses an ion beam. The accuracy can be higher, up to about 10nm.
  • the hot baking process is to directly bake the photoresist after patterning, and the photoresist is melted into an ellipsoidal shape, and the array is not formed by etching.
  • Step D depositing an ITO layer of about 100 nm over the passivation layer, and performing a photolithography, etching, etc. process on the ITO layer to form a desired pattern, as an anode of the white organic light emitting diode, the main portion of the anode is formed in a preset
  • the pixel region is electrically connected to the drain of the TFT assembly through a via etched on the passivation layer, as shown by H in FIG.
  • the anode 510 may also be a conductive thin film layer of other conductive materials, such as an amorphous or polycrystalline graphene material layer.
  • the thickness h 2 of the anode satisfies: 1 nm ⁇ h2 ⁇ 500 nm.
  • anode needs to be etched to prepare a corresponding pattern.
  • the shape of the graphic and its method of preparation are well known in the art and will not be described in detail herein.
  • Step E depositing a 1.5 ⁇ m layer of acrylic material over the anode and the passivation layer not covered by the anode, and performing lithography, curing, etc. on the layer of the acrylic material to form a desired pattern to expose the preset pixel region.
  • the anode thereby defining the pixel area, as shown by I in FIG.
  • the pixel defining layer may also be a film layer prepared from other resin materials, and the thickness thereof is generally 0.5 ⁇ m to 3 ⁇ m.
  • the TFT backplane assembly is completed.
  • Step F Preparing a portion of the white organic light emitting diode other than the anode 510 in the pixel region, as shown by J in FIG.
  • the surface of the TFT back sheet is treated by O 2 plasma to further reduce the surface work function of the anode ITO while passivating the surface portion of the ITO layer.
  • the step F may specifically include: sequentially vapor-depositing the hole transport layer, the organic light-emitting layer (preparation temperature: about 190 ° C), and the electron transport layer (preparation temperature of about 170 ° C) under a vacuum of 1 ⁇ 10 ⁇ 5 Pa. And cathode (preparation temperature is about 900 ° C).
  • the hole transport layer is made of NPB (N,N'-diphenyl-N-N'bis(1-naphthyl)-1,1'diphenyl-4,4 having a thickness of about 30 nm to 70 nm. '-Diamine).
  • NPB N,N'-diphenyl-N-N'bis(1-naphthyl)-1,1'diphenyl-4,4
  • green light, blue light, and red light are respectively used as a host material doped with a phosphorescent material, 25 nm thick CBP: (ppy) 2 Ir(acac), CBP: FIrpic, and CBP: Btp2Ir (acac).
  • As the electron transport layer 8-hydroxyquinoline aluminum (AlQ) having a thickness of about 30 nm to 70 nm is used.
  • the cathode is a LiF/Al layer having an evaporation rate of 1 nm/min, wherein the LiF has a thickness of 5 nm to 10 nm, and the Al layer has a thickness of 100 nm to 300 nm.
  • a light-emitting layer a cathode, and an anode of other structural forms or materials may also be employed, and will not be described in detail herein.
  • the organic material and the thin layer of the cathode metal are thermally evaporated and evaporated in a high vacuum evaporation system in which the OLED/EL-organic metal film is deposited.
  • the pixel region film may be surface-treated before the hole transport layer is deposited, and the necessary electrode modification layer, hole injection layer, electron injection layer, etc. may be added to the white organic light-emitting diode, and
  • the anode of the white organic light emitting diode is prepared by surface modification or the like, which are related art techniques in the prior art and will not be described in detail herein.
  • an OLED pixel unit employing a two-dimensional photonic crystal is also provided.
  • the OLED pixel unit of this embodiment differs from the OLED pixel unit shown in FIG. 1 in that the driving assembly adopts a MOS (metal-oxide-semiconductor) structure using single crystal silicon as a substrate.
  • MOS metal-oxide-semiconductor
  • FIG. 10 is a schematic structural view of an anode in a backplane and a light emitting diode in an OLED pixel unit according to this embodiment of the present invention.
  • the backplane in this embodiment includes:
  • the MOS device 200 is formed in a region defined by the channel blocking region 261, and includes: a channel region formed between the channel blocking regions, a gate oxide layer 211 formed over the channel region, and a gate oxide layer formed on the gate a gate 210 above the polar oxide layer, a source 251 and a drain 252 formed on the substrate below the gate;
  • a passivation layer 300 is disposed over the TFT component, wherein a photonic crystal array is etched in a predetermined pixel region, and a period of the photonic crystal array and a cell structure size are determined by a preset color of the preset pixel region;
  • a pixel defining layer 400 is formed over the passivation layer 300, which forms a pixel region.
  • the function of driving the organic light emitting diode is realized by replacing the TFT component with a MOS structure using single crystal silicon as a substrate.
  • the channel region may be a p-type channel region or an n-type channel region, which respectively correspond to a single crystal silicon NMOS device and a single crystal silicon NMOS device, and the back plate formed is a single crystal silicon NMOS device.
  • the board and the monocrystalline silicon PMOS backplane are not described in detail in the present invention.
  • a method of fabricating an OLED pixel unit as described in FIG. 10 is also provided.
  • the preparation method may include the steps A'-C'.
  • Step A' preparing a TFT assembly on a single crystal silicon substrate
  • the step A' of preparing the TFT component may specifically include:
  • Sub-step A0' cleaning the single crystal silicon
  • Sub-step A1' depositing silicon nitride as a spacer layer on the single crystal silicon substrate, and implanting boron ions to form a channel blocking region 261;
  • Sub-step A2' depositing a gate oxide layer on the single crystal silicon substrate between the channel blocking regions;
  • Sub-step A3' depositing polysilicon on the gate oxide layer and heavily doping to form the gate 210;
  • Sub-step A4' implanting arsenic ions on the underlying substrate on both sides of the gate using a self-alignment method to form a source 251 and a drain 252;
  • Sub-step A5' depositing silicon nitride or silicon oxide over the gate, source and drain and photolithography-etching into holes, depositing metal Al or the like to form source or drain metal leads, completing metallization.
  • Step B' A layer of SiO 2 of about 100 nm was deposited as a passivation layer over the TFT assembly.
  • Step C' forming a photonic crystal array by pre-setting a pixel region in the passivation layer according to a preset shape and period, wherein a period of the photonic crystal array and a cell structure size are determined by a preset color of the current OLED pixel unit Decide.
  • another OLED pixel unit is also provided.
  • the difference between the OLED pixel unit of the present embodiment and the OLED pixel unit of the foregoing embodiment is that the TFT assembly adopts a top gate structure, as shown in FIG.
  • another OLED pixel unit using a two-dimensional photonic crystal which is different from the OLED pixel unit of the foregoing embodiment in that a two-dimensional photonic crystal array is formed in a preset pixel region.
  • the gate insulating layer Since a two-dimensional photonic crystal array is formed in the gate insulating layer, in this region
  • the passivation layer, the anode, and the like on the upper side form a predetermined periodic protrusion, thereby realizing the function of wavelength selection.
  • the two-dimensional photonic crystal array can also be formed on a substrate, a buffer layer, a driving component, a film layer (such as a gate insulating layer, an active layer, an etch barrier layer, a source or a drain), and a pixel defining layer.
  • a film layer such as a gate insulating layer, an active layer, an etch barrier layer, a source or a drain
  • a pixel defining layer such as a gate insulating layer, an active layer, an etch barrier layer, a source or a drain
  • the organic light emitting diode is composed of a film layer (such as a cathode or an anode).
  • a photonic crystal array is formed by the cooperation of two or more layers.
  • the function of selecting light can be realized, thereby realizing the present invention.
  • the principle of the implementation of the invention is the same as that of the above embodiment, and will not be repeated here.
  • the present invention can also employ an a-Si TFT backplane, an LTPS TFT backplane, a single crystal silicon NMOS backplane, a single crystal silicon PMOS backplane, and a single crystal.
  • a silicon CMOS backplane or the like, and the TFT structure is understood to be all disclosed structures in the prior art, which is not limited by the present invention;
  • a three-dimensional photonic crystal array can also be used to achieve wavelength selection, and the present invention can also be implemented.
  • the three-dimensional photonic crystal array can be prepared by the following method: multilayer thin film deposition, After the film of the odd layer is deposited, the array is etched, the even layers are directly covered, and after the multilayer is formed, a three-dimensional crystal structure is formed;
  • the material for forming the photonic crystal is mostly SiO 2 , but other materials may be used to form the photonic crystal array, for example, inorganic insulating materials such as silicon nitride and titanium oxide, and organic materials. Insulating material, composite or conductive material composed of two or more insulating materials;
  • the white organic light emitting diode is used in the above embodiment, it should be clear to those skilled in the art that, except for the white organic light emitting diode, for the organic light emitting diode covering a certain wavelength range, as long as the preset color is within the wavelength range, Light selection can also be achieved by a photonic crystal array. Therefore, the present invention is not limited to white light organic light emitting diodes.
  • the method for color selection of an OLED by using a two-dimensional photonic crystal utilizes a mature existing process, and can achieve a fineness that cannot be achieved by other methods, and can be applied to a small resolution of high resolution and ultra high resolution.
  • the preparation of size ( ⁇ 1 inch) OLED display panel has a good application prospect.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

提供了一种用于实现高分辨率和超高分辨率显示的OLED像素单元及其制备方法、面板和显示装置。该OLED像素单元包括:有机发光二极管(500),其发出涵盖一波长范围的光;以及光子晶体阵列,形成于有机发光二极管(500)的出光侧,其结构参数由该OLED像素单元的预设颜色决定;其中有机发光二极管(500)发出的光经由光子晶体阵列进行波长选择,从而在有机发光二极管的出光方向呈现出预设颜色。由于光子晶体阵列的加工尺寸在纳米量级,可以实现现有液晶显示工艺无法企及分辨率,因此采用光子晶体阵列的OLED像素单元的分辨率也可以得到很大的提高。

Description

OLED像素单元及其制备方法、显示面板和显示装置 技术领域
本发明涉及显示领域,尤其涉及一种OLED像素单元及其制备方法、显示面板和显示装置。
背景技术
有源矩阵有机发光二极管(Active Matrix/Organic Light Emitting Diode,简称OLED)面板为一种新型的显示技术。相比于传统的液晶面板,OLED面板具有反应速度快、对比度高、视角广等特点。此外,OLED面板具有自发光的特点,不需要使用背光板,因此节约了背光模块的成本,并且比传统液晶面板做的更轻薄。目前,OLED面板已经成为下一代显示技术的有利候选者。
目前,OLED面板基本上都是基于4inch以上的工艺制备,采用的方法有小分子蒸镀(如FMM工艺或WCOA工艺等)、溶液打印工艺(如Ink-Jet Printing,Nozzle Printing等)以及蒸镀-溶液复合工艺方法等。
然而,上述工艺对于制备微小尺寸OLED面板,尤其是像素尺寸小于50μm的高分辨率及超高分辨率的产品,例如可穿戴显示产品,而言,其精细程度很难得到控制。目前,亟需一种可以实现高精细程度的OLED器件。
此外,能够发射预设颜色的有机发光二极管(OLED)组件目前只能采用小分子精细金属掩膜(Fine-Metal-Mask,简称FMM)、蒸镀,溶液打印、蒸镀-溶液复合等工艺制备,这些工艺的难度和成本较高,并且有机发光二极管不能做的特别小,不能实现高分辨率显示。
发明内容
鉴于上述技术问题,本发明提供了一种用于实现高分辨率和超高分辨率显示的OLED像素单元及其制备方法、显示面板和显示装置。
根据本发明的一个方面,提供了一种OLED像素单元。该OLED像素单元包括:有机发光二极管,其发出涵盖一波长范围的光;以及光子晶体阵列,形成于有机发光二极管的出光侧,其结构参数由该OLED像素单元的预设颜色决定;其中,有机发光二极管发出的光经由光子晶体阵列进行波长选择,从而在有机发光二极管的出光侧呈 现出预设颜色。
在一实施例中,所述光子晶体阵列为三维光子晶体阵列。
在一实施例中,所述光子晶体阵列为二维光子晶体阵列;该二维光子晶体阵列为矩形周期结构、菱形周期结构或准周期结构;其构成单元为凹入结构、凸起结构、或凸起/凹入结合的混合结构。
在一实施例中,所述凹入结构为圆柱孔或球形凹入结构;所述凸起结构为圆柱或球形凸起结构。
在一实施例中,所述二维光子晶体阵列为矩形周期结构,其构成单元为圆柱孔凹入结构。
在一实施例中,所述有机发光二极管为白光有机发光二极管。
在一实施例中,对于预设颜色为蓝色的OLED像素单元:圆柱孔凹入结构的直径D1满足:245nm≤D1≤255nm;在X方向和Y方向上的孔间距L1满足:335nm≤L1≤345nm;对于预设颜色为绿色的OLED像素单元:圆柱孔凹入结构的直径D2满足:215nm≤D2≤225nm,在X方向和Y方向上的孔间距L2满足:135nm≤L2≤145nm;或对于预设颜色为红色的OLED像素单元:圆柱孔凹入结构的直径D3满足:95nm≤D3≤105nm,在X方向和Y方向上的孔间距L3满足:295nm≤L3≤305nm。
在一实施例中,所述光子晶体阵列的结构参数由平面波法、转移矩阵法或有限元法计算得出。
在一实施例中,所述OLED像素单元还包括:衬底;驱动组件,形成于所述衬底上;以及钝化层,覆盖于所述驱动组件的上方,所述有机发光二极管的阳极通过钝化层上的过孔电性连接至所述驱动组件。
在一实施例中,所述光子晶体阵列形成于所述衬底、驱动组件组成膜层或钝化层中。
在一实施例中,所述光子晶体阵列形成于所述钝化层中,所述有机发光二极管的阳极的部分材料填充于该光子晶体阵列内。
在一实施例中,所述OLED像素单元还包括:缓冲层,形成于所述衬底和驱动组件之间,其中,所述光子晶体阵列形成于该缓冲层中。
在一实施例中,所述驱动组件为TFT组件、NMOS组件、PMOS组件或CMOS组件。
在一实施例中,所述TFT组件为底栅结构的TFT组件,包括:栅极,形成于所述 衬底上;栅极绝缘层,形成于栅极及未被栅极覆盖的透明衬底上方;有源层,形成于所述栅极绝缘层的上方;
刻蚀阻挡层,形成于所述有源层的上方;以及
源极和漏极,形成于刻蚀阻挡层的两侧,并位于有源层及未被有源层覆盖的栅极绝缘层的上方;
其中,所述光子晶体阵列形成于所述栅极、栅极绝缘层、有源层、刻蚀阻挡层、源极或漏极的任意膜层中。
在一实施例中,所述有机发光二极管包括:第一电极;发光层,形成于所述第一电极上;第二电极,形成于所述发光层上。
在一实施例中,所述光子晶体阵列形成于所述第一电极或第二电极的膜层中。
根据本发明的另一个方面,还提供了一种显示面板。该显示面板包括一个或更多个上述的OLED像素单元。
根据本发明的又一个方面,还提供了一种显示装置,其包括上述的OLED显示面板。
根据本发明的另一个方面,提供了一种制备方法,用于制备上述的OLED像素单元。该制备方法包括:形成有机发光二极管;以及在所述形成有机发光二极管的步骤之前或之中,在所述有机发光二极管的出光侧形成光子晶体阵列。
在一实施例中,采用以下技术其中之一来形成所述的光子晶体阵列:光刻刻蚀工艺、纳米压印工艺、离子束刻蚀工艺、热烘烤工艺、微球旋涂工艺、微球打印工艺、纳米颗粒旋涂技术、纳米颗粒打印技术。
借助于以上技术方案,本发明OLED像素单元及其制备方法、显示面板和显示装置具有以下有益效果中的至少一个:
(1)光子晶体阵列的加工尺寸在纳米量级,具有良好的单色性和一定的方向性,可以在保证达到现有显示效果的前提下,实现现有工艺无法企及的分辨率,进而采用光子晶体阵列的OLED像素单元的分辨率也可以得到很大的提高,满足高分辨率及超高分辨率的OLED显示面板的应用需求;
(2)采用白光有机发光二极管,由光子晶体阵列实现对白光的波长选择,而白光有机发光二极管可以采用Open-Mask工艺实现,精度较高,从而将高分辨率显示的制作难度由有机发光二极管转入到背板,从而大大降低了解决高分辨显示问题的难度,在制备同等分辨率显示器的情况下,制备工艺大大简化;
(3)光子晶体的制备工艺已经非常成熟,并且与现有薄膜晶体管TFT、有机发光二极管的制备工艺相兼容,有利于推广应用。
附图说明
图1为根据本发明一实施例的OLED像素单元的结构示意图;
图2为图1所示OLED像素单元中TFT组件的结构示意图;
图3A和图3B分别为图1所示OLED像素单元中钝化层上光子晶体阵列的剖面图和立体图;
图4A和图4B分别为根据本发明另一实施例的OLED像素单元中钝化层上柱状凸起光子晶体的剖面图和立体图;
图5A和图5B分别为根据本发明另一实施例的OLED像素单元中钝化层上球状凸起光子晶体的剖面图和立体图;
图6A和图6B分别为根据本发明另一实施例的OLED像素单元中钝化层上球状凹入光子晶体的剖面图和立体图;
图7为图1所示OLED像素单元中白光有机发光二极管的结构示意图;
图8为根据本发明一实施例的OLED像素单元制备方法的流程图;
图9为图8所示制备方法中执行各步骤后器件的剖面示意图;
图10为根据本发明一实施例的OLED像素单元中背板与发光二极管中阳极的结构示意图;
图11为根据本发明一实施例OLED像素单元中背板的结构示意图。
【主要元件】
100-透明衬底;
200-TFT组件;
210-栅极;         220-栅极绝缘层;
230-有源层;       240-刻蚀阻挡层;
251-源极(或漏极); 252-漏极(或源极);
261-沟道隔断区;   211-栅极氧化层;
300-钝化层;
400-像素界定层;
500-白光有机发光二极管;
510-阳极;    520-空穴传输层;
530-发光层;  540-电子传输层;
550-阴极。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本发明进一步详细说明。需要说明的是,在附图或说明书描述中,相似或相同的部分都使用相同的图号。附图中未绘示或描述的实现方式,为所属技术领域中普通技术人员所知的形式。另外,虽然本文可提供包含特定值的参数的示范,但应了解,参数无需确切等于相应的值,而是可在可接受的误差容限或设计约束内近似于相应的值。实施例中提到的方向用语,例如“上”、“下”、“前”、“后”、“左”、“右”等,仅是参考附图的方向。因此,使用的方向用语是用来说明并非用来限制本发明的保护范围。
另外,在下面的详细描述中,为便于解释,阐述了许多具体的细节以提供对本披露实施例的全面理解。然而明显地,一个或多个实施例在没有这些具体细节的情况下也可以被实施。在其他情况下,公知的结构和装置以图示的方式体现以简化附图。
根据本发明总体上的发明构思,提供一种OLED像素单元,包括:有机发光二极管,其发出涵盖一波长范围的光;以及光子晶体阵列,位于所述有机发光二极管的出光侧,其结构参数由该OLED像素单元的预设颜色决定;其中,所述有机发光二极管发出的光经由所述光子晶体阵列进行波长选择,从而在所述有机发光二极管的出光侧呈现出预设颜色。
为了更好地理解本发明,以下对光子晶体的概念进行说明。光子晶体是能对光作出反应的特殊晶格结构,如半导体材料在晶格结点(各个原子所在位点)周期性的出现离子一样,光子晶体是在高折射率材料的某些位置周期性的出现低折射率(如人工造成的空气空穴)的材料。高低折射率的材料交替排列形成周期性结构就可以产生光子晶体带隙(Band Gap,类似于半导体中的禁带),光子晶体能够调制具有相应波长的电磁波,当电磁波在光子晶体结构中传播时,由于存在布拉格散射而受到调制,电磁波能量形成能带结构,能带与能带之间出现带隙,即光子带隙,所有能量处在光子带隙的光子,不能进入该晶体。周期排列的低折射率位点之间的距离大小相同,导致了一定距离大小的光子晶体只对一定频率的光波产生能带效应。也就是只有某种频率的光才会在某种周期距离一定的光子晶体中被完全禁止传播。
本发明通过合理设计光子晶体,即尺寸为100nm到1μm的光学材料的周期性排列,的结构参数,使得在所设计的光子晶体中,除特定波段(例如,红光波段、绿光 波段或蓝光波段,但不限于此)的光外,其它波段的光均被禁止传播,从而实现阻挡某种颜色的功能。
在本发明的一个示例性实施例中,提供了一种OLED像素单元。该OLED像素单元包括:有机发光二极管,其发出涵盖一波长范围的光;光子晶体阵列,形成于有机发光二极管的出光侧(或者说光子晶体阵列设置在有机发光二极管的出光路径上),光子晶体阵列的结构参数由该OLED像素单元的预设颜色决定;其中,有机发光二极管发出的光经由光子晶体阵列进行波长选择,从而在有机发光二极管的出光侧(在有机发光二极管发出的光经过光子晶体陈列之后)呈现出预设颜色。
作为示例,光子晶体阵列可以为二维光子晶体阵列或三维光子晶体阵列。在一般情况下,形成光子晶体阵列的材料为各类的绝缘材料,例如:无机绝缘材料、有机绝缘材料或复合绝缘材料等。出光侧即OLED的光出射的一侧,光出射的方式可以包括顶发射、底发射和双面出射。
由于光子晶体阵列的加工尺寸在纳米量级,因此采用光子晶体阵列的OLED像素单元的分辨率也可以得到很大的提高,满足高分辨率及超高分辨率的OLED显示面板的应用需求。
在本发明的一示例性实施例中,提供了一种OLED像素单元。图1为根据本发明一实施例OLED像素单元的结构示意图。参照图1,本实施例采用二维光子晶体的OLED像素单元,其包括:透明衬底100;TFT组件200,形成于透明衬底100上;钝化层300,覆盖于TFT组件200的上方,其中,在预设像素区域的钝化层被刻蚀形成二维光子晶体阵列,该二维光子晶体阵列的周期及单元结构尺寸由该OLED像素单元的预设颜色决定;像素界定层400,形成于钝化层300的上方,该像素界定层400经刻蚀形成像素区域;白光有机发光二极管500,形成于像素界定层400所限定的像素区域内。
其中,预设颜色是指在面板设计阶段,需要该OLED像素单元所显示的颜色,例如,该OLED像素单元为红色像素,则该预设颜色为红色;该OLED像素单元为蓝色,则该预设颜色为蓝色,其他与此类似。
请参照图1中箭头所示的方向,由白光有机发光二极管500发出白光,经由钝化层300上的光子晶体阵列实现波长选择,从透明衬底背面的方向看就可以呈现出预设 颜色。
以下对本实施例采用二维光子晶体的OLED像素单元的各个组成部分进行详细说明。
(1)透明衬底
本实施例中,透明衬底100采用玻璃衬底,但本发明并不以此为限。本发明中,透明衬底100还可以采用石英、单晶硅、塑料薄膜等各种衬底。
(2)TFT组件
图2为图1所示OLED像素单元中TFT组件的结构示意图。
本实施例中,TFT组件采用底栅结构。请参照图1和图2,TFT组件200包括:栅极210,形成于透明衬底100上;栅极绝缘层220,形成于栅极210及未被栅极210覆盖的透明衬底100上方;有源层230,形成于栅极绝缘层220的上方;刻蚀阻挡层240,形成于有源层230的上方;源极251和漏极252,形成于刻蚀阻挡层240的两侧,并位于有源层230及未被有源层230覆盖的栅极绝缘层220的上方。
需要说明的是,为了进一步隔绝玻璃衬底中多种元素向TFT组件中的扩散,以致器件性能衰退或失效,在栅极210和衬底100之间,还可以包括缓冲层(未图示)。本实施例中,该缓冲层为200-2000nm的SiO2层。
本实施例中,栅极210为200-2000nm的钼(Mo)层,但本发明并不以此为限。该栅极210还可以是厚度介于1nm~500nm之间的以下材料中的一种或多种形成的薄膜:外延硅、金属材料和复合导电材料。其中,金属材料为以下材料中的一种的单质材料,或两种、两种以上的以下材料组成的合金材料:Mo、Al、Cr。
本实施例中,栅极绝缘层220为150-4000nm的SiO2层,但本发明并不以此为限。该栅极绝缘层220还可以是厚度介于1nm~100nm之间的热氧化硅层、氮化硅(Si3N4)层或氮氧化硅层等绝缘材料层。其中,该热氧化硅层或氮化硅(Si3N4)层可以由CVD方法沉积制备。
本实施例中,有源层230为50-2000nm的铟镓锌氧(IGZO)层,但本发明并不以此为限。该有源层230还可以是厚度介于5nm~200nm的非晶硅层、单晶硅层、低温多晶硅层、有机半导体层或者其他氧化物有源层。此处的低温多晶硅层指的是采用LTPS工艺,在低于500℃下形成的多晶硅层。
本实施例中,刻蚀阻挡层240为50nm的SiO2层,但本发明并不以此为限。该刻蚀阻挡层240还可以为厚度介于10nm~100nm之间的SiO2层。其中,刻蚀阻挡层240 所起的作用为防止因源/漏极的湿法刻蚀对有源层230造成损伤,即防止钻刻。
本实施例中,源极和漏极为Mo/Al层,但本发明并不以此为限。该源极和漏极还可以为厚度介于1nm~500nm之间的Ti、Cr及Au/Ti等金属材料层、合金材料层及其他复合导电材料层。此外,该源极和漏极的位置可以互换,此处不再详细说明。
需要说明的是,本实施例采用TFT组件作为驱动组件,但本发明并不以此为限,除了TFT组件外,还可以采用NMOS组件、PMOS组件或CMOS组件来作为驱动组件,同样能够实现本发明,其中,TFT组件可以为IGZO-TFT组件、LTPS TFT或a-Si TFT组件。NMOS组件可以是为单晶硅NMOS组件。PMOS组件可以为单晶硅PMOS组件。CMOS组件可以为单晶硅CMOS组件。
(3)钝化层
请参照图1,钝化层300覆盖于上述TFT组件200的上方。
本实施例中,钝化层300为100nm的SiO2层,但本发明并不以此为限。该钝化层还可以为厚度介于1nm~500nm的其他绝缘材料层,例如氮化硅(Si3N4)层。在钝化层300中预设像素区域,形成具有周期结构的二维光子晶体阵列。该二维光子晶体阵列的参数由该预设像素区域的预设颜色决定。通过该二维光子晶体阵列,实现对白光的选色,即波长选择。
本实施例中,二维光子晶体阵列的周期由该预设像素区域的预设颜色决定。在制备二维光子晶体阵列的过程中,需要依据预设颜色计算光子晶体阵列的周期及构成单元形状、半径等参数,而后在钝化层通过干法刻蚀在钝化层的上方打孔,形成光子晶体阵列。
本发明的实施例中,光子晶体阵列的相关参数可以经由平面波法(PWM:Plane Waves Method)、转移矩阵法(TMM:Transfer Matrix Method)、有限元法(FEM:Finite Element Method)等来进行计算,所应用的基本公式一般为Maxwell方程组:
Figure PCTCN2014089797-appb-000001
本领域技术人员应当非常清楚Maxwell方程组中各个参数的具体含义,此处不再对其进行详细描述。
对于平面波法(PWM:Plane Waves Method),其直接从光子晶体的Maxwell方程组出发,通过对本征算符的对角化直接求出布洛赫解和频率。它的显著特点是可以分辨简并模,运算速度比较快,利用PWM可以计算不同晶格结构理想二维光子晶体的带隙结构,为解释测量结果提供理论基础。在此基础上,利用傅里叶变换中的相移定理,可以计算具有有限数目缺陷的光子晶体的带隙结构、缺陷模式的频率和场分布。
对于时域有限差分法(FDTD:Finite Difference Time Domain),其将空间和时间进行离散化处理,经过时间的演化,可以计算出电磁波随时间传播演化的规律,它可以适用于任何复杂的界面,但运算速度比较慢。运用FDTD计算方法可以分析光子晶体的传输特性和微谐振腔内模式的品质因子和模体积等。
对于转移矩阵法(TMM:Transfer Matrix Method),其由电磁场在实空间格点位置展开,将Maxwell方程组化成转移矩阵形式,将问题变成本征值求解的问题。转移矩阵表示一层格点的场强与紧邻的另一层格点场强的关系,它假设在构成的空间中在同一个格点层上有相同的态和相同的频率,这样可以利用Maxwell方程组将场从一个位置外推到整个晶体空间。转移矩阵可以方便地计算反射系数和透射系数。但是,对于结构复杂的结构,转移矩阵变得相当庞大,计算量也急剧增大。
目前,已经出现多种计算光子晶体阵列结构的商业软件,如Comsol、Bandsolve以及Crystal wave等。本发明优选地采用这些商业软件来计算光子晶体阵列的结构参数,而后通过实际工艺检验的方式来制作二维光子晶体阵列,以提高效率和减少错误的发生。
本领域技术人员应当清楚,对于光子晶体阵列而言,其参数分为两类:第一类为 周期形参数,包括周期形式、在各个方向上的周期;第二类为构成在光子晶体阵列的其中一个单元(简称构成单元)的形状、在各个方向上的尺寸。
图3A和图3B分别为图1所示OLED像素单元中钝化层上光子晶体阵列的剖面图和立体图。请参照图3A和图3B,本实施例采用二维矩形周期结构的光子晶体阵列,其构成单元呈圆柱孔凹入结构。
本实施例中,采用商业软件Comsol计算光子晶体阵列的结构参数,所得出的光子晶体阵列的各个参数如下:
(1)对于预设颜色为蓝色的OLED像素单元:圆柱孔凹入结构的直径D1满足:245nm≤D1≤255nm;在X方向和Y方向上的孔间距L1满足:335nm≤L1≤345nm;
(2)对于预设颜色为绿色的OLED像素单元:圆柱孔凹入结构的直径D2满足:215nm≤D2≤225nm,在X方向和Y方向上的孔间距L2满足:135nm≤L2≤145nm;或
(3)对于预设颜色为红色的OLED像素单元:圆柱孔凹入结构的直径D3满足:95nm≤D3≤105nm,在X方向和Y方向上的孔间距L3满足:295nm≤L3≤305nm。
关于二维光子晶体阵列构成单元圆柱孔的深度,其可以根据需要进行调整,只要不超过钝化层的厚度即可。
本实施例中,构成单元呈圆柱孔,但本发明并不以此为限。该构成单元还可以为除孔状结构之外的其他凹形结构、凸形结构或凹形和凸起相结合的混合结构。此外,除了矩形排列周期结构之外,该光子晶体阵列的周期结构还可以为菱形周期结构或者准周期结构等。此处的准周期结构是指并不满足严格意义上的周期结构,但在引入一定近似性以后可以认为是周期结构的结构形式。
在本发明的另一个实施例中,光子晶体阵列中构成单元还可以为柱状,其剖面图和立体图如图4A和图4B所示。
在本发明的再一个实施例中,光子晶体阵列中构成单元还可以为球状凸起状,其剖面图和立体图如图5A和图5B所示。
在本发明的又一个实施例中,光子晶体阵列中构成单元还可以为球状凹入状,其剖面图和立体图如图6A和图6B所示。
(4)像素界定层
像素界定层400形成钝化层300的上方,以界定出像素区域从而制作白光有机发光二极管。
本实施例中,像素界定层400为1.5μm的亚克力系材料,但同样本发明并不以此为限。该像素界定层还可以为其他树脂材料制备的薄膜层,其厚度一般为0.5μm~3μm。
其中,衬底100、TFT组件200、钝化层300和像素界定层400共同组成TFT背板。而后将在该TFT背板上制备白光有机发光二极管。
(5)白光有机发光二极管
白光有机发光二极管500整体厚度为60nm~1000nm,可采用One Unit结构或者Tandem结构。有机发光二级管包括:第一电极;发光层,形成于所述第一电极上;第二电极,形成于所述发光层上。第一电极可以为阳极也可以为阴极,对应第一电极为阳极的情形,第二电极为阴极;对应第一电极为阴极的情形,第二电极为阳极。并且为增强OLED的某些性能,有机发光二极管还可以包括其他膜层,在此不再赘述。
以第一电极为阳极、第二电极为阴极举例,图7为图1所示OLED像素单元中白光有机发光二极管的结构示意图。请参照图1和图7,该白光有机发光二极管500的主体部分形成于像素区域内,包括:阳极510,形成于像素区域内,其通过刻蚀于钝化层300上的过孔电性连接至驱动组件的漏极;发光层,形成于阳极510上;阴极550,形成于发光层上。
需要说明的是,像素界定层400在形成该阳极510之后形成。
阳极510也可称为像素电极层。请参照图1和图7,阳极510形成于钝化层300的上方,其主体部分形成于预设像素区域内,其一端通过刻蚀于钝化层300上的过孔电性连接至TFT组件200的漏极252,其中,该阳极510的部分材料填充于钝化层上方光子晶体阵列内。
本实施例中,OLED包括依次沉积于阳极510上的空穴传输层520、发光层530和电子传输层540。
本实施例中,阳极510为100nm的ITO(氧化铟锡)层,但本发明并不以此为限。该阳极510还可以为其他导电材料的导电薄膜层,例如:非晶态或多晶态的石墨烯材料层。该阳极的厚度h2满足:1nm≤h2≤500nm。
本实施例中,空穴传输层520为50nm厚的NPB(N,N’-二苯基-N-N’二(1-萘基)-1,1’二苯基-4,4’-二胺)层,但本发明并不以此为限。该空穴传输层520还可以为厚度为1nm~100nm的其他芳香胺类材料制备的薄膜,例如TPD(N,N’-二苯基-N-N’二(3-甲基苯基)-1,1’二苯基-4,4’-二胺)等。
本实施例中,发光层530为25nm厚的CBP:(ppy)2Ir(acac)、CBP:FIrpic和CBP: Btp2Ir(acac)层,该三层分别发出绿光/蓝光/红光,从而整体器件发出白光,但本发明并不以此为限。该发光层530还可以为厚度为1nm~100nm的高分子、金属配合物,或小分子有机荧光或磷光材料制备的薄膜层。其中,可采用小分子材料中的8-羟基喹啉铝(AlQ)、香豆素、红荧烯等以获得不同发光波长。
需要说明的是,本发明同样可以采用其他形式的白光发光二极管,例如采用其他结构形式发光层的发光二极管,同样能够实现本发明。本领域技术人员应当清楚这些有机发光二极管的结构形式,此处不再一一列举。
本实施例中,电子传输层540为30nm~70nm厚的8-羟基喹啉铝(AlQ)层,但本发明并不以此为限。该电子传输层540还可以为6nm~80nm的Bphen等有较低LUMO能级的有机材料层。
本实施例中,阴极550为5nm~10nm的LiF/Al层,其中LiF厚度为5nm~10nm,Al层厚度为100nm~300nm,但本发明并不以此为限。阴极550还可以为5nm~50nm的Mg:Ag等低功函金属及其合金制备的薄膜。
本领域技术人员应当清楚,在某些白光有机发光二极管中,其上层电极为阴极,而下层电极为阳极,而发光层同样位于该阴极和阳极之间。该中实现形式与本实施例中的白光发光二极管类似,同样应当在本发明的保护范围之内,此处不再赘述。
本实施例中,由光子晶体阵列实现对白光有机发光二极管的波长选择,而不必由有机发光二极管自身实现高分辨显示,将高分辨率显示的制作难度由有机发光二极管转入到背板,大大降低了解决高分辨显示问题的难度。
虽然在上述实施例中,光子晶体阵列设置于钝化层中,但是本发明不限于此,例如,光子晶体阵列可以位于有机发光二极管的出光一侧的任何膜层结构中,如可以与栅极、栅极绝缘层、有源层、刻蚀阻挡层、源极或漏极层同层设置。
在本发明的示例性实施例中,还提供了一种显示面板。该显示面板包括一个或更多个如上述任一实施例所述的OLED像素单元。
该OLED像素单元包括:有机发光二极管,其发出涵盖一波长范围的光;光子晶体阵列,形成于有机发光二极管的出光侧,其结构参数由该OLED像素单元的预设颜色决定;其中,有机发光二极管发出的光经由光子晶体阵列进行波长选择,从而在有机发光二极管的出光侧上(经由光子晶体阵列)呈现出预设颜色。
在显示面板上,OLED像素单元阵列排布,具有不同波长选择功能的光子晶体阵 列与相应的有机发光二极管一样周期排列,这样,通过光子晶体的波长选择作用,实现全彩色显示。
本领域技术人员应当非常清楚本实施例显示面板和单个OLED像素单元的关系,此处不再详细描述。
本发明实施例中,显示面板还可以包括一个或更多个根据后续任一实施例的OLED像素单元,其组成和原理与本实施例相同,此处不再详细描述。
该显示装置可以为:OLED显示面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
在本发明的示例性实施例中,还提供了一种显示装置。该显示装置包括如上任一实施例所述的显示面板。
此外,在本发明的实施例中,该显示装置所包括的显示面板,还可以由后续任一实施例所述的OLED像素单元组成。
在本发明的再一个示例性实施例中,还提供了一种OLED像素单元的制备方法。图8为根据本发明一实施例的OLED像素单元的制备方法的流程图。图9为图8所示制备方法中执行各步骤后器件的剖面示意图。请参照图8和图9,本实施例OLED像素单元的制备方法可以包括步骤A-F。
步骤A:在玻璃衬底上制备底栅TFT组件。
该制备TFT组件的步骤A具体可以包括子步骤A0-A6。其中,
子步骤A0:对玻璃衬底进行清洗;
本步骤中,清洗的方法可以为清洗衬底的标准方法。清洗后的玻璃衬底如图9中A所示。
除了玻璃衬底之外,还可以采用石英、单晶硅、塑料薄膜等各种衬底。
子步骤A1:在玻璃衬底上采用CVD方法沉积200-2000nm厚的SiO2薄膜作为缓冲层;
子步骤A2:在缓冲层上采用溅射方法沉积200nm的Mo层,并通过光刻、刻蚀等步骤制备出所需栅极210,如图9中B所示;
本发明的实施例中,该栅极210还可以是厚度介于1nm~500nm之间的以下材料中的一种或多种形成的薄膜:外延硅、金属材料和复合导电材料。其中,金属材料为以下材料中的一种的单质材料,或两种、两种以上的以下材料组成的合金材料:Mo、Al、Cr。
子步骤A3:采用CVD方法在370℃下沉积150nm的SiO2层作为栅极绝缘层220,如图9中C所示;
本发明的实施例中,该栅极绝缘层220还可以是厚度介于1nm~100nm之间的热氧化硅层、氮化硅(Si3N4)层或氮氧化硅层等绝缘材料层。其中,该热氧化硅层或氮化硅(Si3N4)层可以由CVD方法沉积制备。
子步骤A4:采用溅射方法沉积50nm的IGZO膜层,并刻蚀出沟道区,形成有源层230,如图9中D所示;
本发明的实施例中,该有源层230还可以是厚度介于5nm~200nm的非晶硅层、单晶硅层、低温多晶硅层、有机半导体层或者其他氧化物有源层。
子步骤A5:在有源层230的上方沉积约50nm的SiO2,并经过光刻、刻蚀等步骤形成刻蚀阻挡层240,如图9中E所示;
本发明的实施例中,该刻蚀阻挡层240还可以为厚度介于10nm~100nm之间的SiO2层。
子步骤A6:在刻蚀阻挡层240的两侧、有源层230的上方及未被有源层230覆盖的栅极绝缘层220的上方形成Mo/Al材质的源极和漏极,如图9中F所示。
本发明的实施例中,该源极和漏极还可以为厚度介于1nm~500nm之间的Ti、Cr及Au/Ti等金属材料层、合金材料层及其他复合导电材料层。此外,该源极和漏极的位置可以互换。
需要说明的是,还可以根据需要对TFT背板组件中的有源层进行必要的掺杂及活化。对于顶栅工艺而言,该掺杂和活化是在栅极完成后进行的。而对于底栅工艺而言,该掺杂和活化工艺是在钝化层或平坦化层完成后进行的。这些工艺均为本领域的公知技术,此处不再进行详细说明。
步骤B:在TFT组件的上方沉积约100nm的SiO2层作为钝化层。
本发明中,该钝化层还可以为厚度介于1nm~500nm的其他绝缘材料层,例如氮化硅(Si3N4)层。
步骤C:在钝化层中预设像素区域刻蚀形成二维光子晶体阵列,其中,该二维光子晶体阵列的周期及单元结构尺寸由当前OLED像素单元的预设颜色所决定,如图9中G所示。
一般情况下,在钝化层上制备二维光子晶体阵列的方法采用光刻刻蚀工艺,即首先采用光刻制备掩模,而后依照该掩模直接对预设像素区域的钝化层进行刻蚀,形成 二维光子晶体阵列。在钝化层上制备光子晶体阵列的方法还可以采用直接刻蚀工艺,即直接对预设像素区域的钝化层进行刻蚀,形成光子晶体阵列。
此外,在钝化层上制备二维光子晶体阵列的方法还可以采用纳米压印工艺、离子束刻蚀工艺、热烘烤工艺。其中,离子束刻蚀工艺同传统的光刻工艺有很大的不同,光刻工艺采用的是光束进行掩模图形化,其精度在几十纳米,而离子束刻蚀是采用离子束,其精度可以更高,达10nm左右。热烘烤工艺就是将光刻胶图形化之后直接烘烤,光刻胶熔化成椭球形等形状,不再采用刻蚀方法形成阵列。此外,对于特殊材质而言,还可以采用含有微球或纳米颗粒的溶液进行旋涂或打印等工艺。
该光子晶体阵列的相关参数已经在上文中进行了详细描述,此处不再进行重复说明。
步骤D:在钝化层的上方沉积约100nm的ITO层,对该ITO层进行光刻、刻蚀等工艺形成所需图形,作为白光有机发光二极管的阳极,该阳极的主体部分形成于预设像素区域,其一端通过刻蚀于钝化层上的过孔电性连接至TFT组件的漏极,如图9中H所示。
本发明的实施例中,该阳极510还可以为其他导电材料的导电薄膜层,例如:非晶态或多晶态的石墨烯材料层。该阳极的厚度h2满足:1nm≤h2≤500nm。
需要说明的是,该阳极需要通过刻蚀来制备出相应的图形。该图形形状及其制备方法均为本领域内所公知的,此处不再详细描述。
步骤E:在阳极以及未被阳极覆盖的钝化层的上方沉积1.5μm的亚克力系材料层,并对该亚克力系材料层进行光刻、固化等工艺形成所需图形,以露出预设像素区域的阳极,从而界定出像素区域,如图9中I所示。
本发明的实施例中,该像素界定层还可以为其他树脂材料制备的薄膜层,其厚度一般为0.5μm~3μm。
在做出像素界定层之后,TFT背板组件制造完毕。
步骤F:在像素区域制备白光有机发光二极管中除阳极510之外的其他部分,如图9中J所示。
需要说明的是,制备白光有机发光二极管其他部分之前,采用O2等离子体处理TFT背板表面,进一步降低阳极ITO的表面功函数,同时钝化ITO层的表面部分。
该步骤F具体可以包括:在1×10-5Pa的真空下依次热蒸发蒸镀空穴传输层、有机发光层(制备温度约为190℃)、电子传输层(制备温度约为170℃)和阴极(制 备温度约为900℃)。
本实施例中,空穴传输层用约30nm~70nm厚的NPB(N,N’-二苯基-N-N’二(1-萘基)-1,1’二苯基-4,4’-二胺)。发光层中绿光、蓝光和红光分别采用掺杂磷光材料的主体材料25nm厚的CBP:(ppy)2Ir(acac)、CBP:FIrpic和CBP:Btp2Ir(acac)。电子传输层,用约30nm~70nm厚的8-羟基喹啉铝(AlQ)。阴极采用LiF/Al层,蒸发速率为1nm/min,其中LiF厚度为5nm~10nm;Al层厚度为100nm~300nm。
本发明中,还可以采用其他结构形式或材料的发光层、阴极和阳极,此处不再详细说明。
本实施例中,有机材料及阴极金属薄层在OLED/EL-有机金属薄膜沉积的高真空蒸发系统中热蒸发蒸镀。
此外,本实施例中,可根据需要在沉积空穴传输层前对像素区薄膜进行表面处理,以及在白光有机发光二极管中加入必要的电极修饰层、空穴注入层、电子注入层等,并通过表面修饰等手段制备白光有机发光二极管的阳极,这些均是现有技术中的相关技术手段,此处不再详细描述。
在本发明的另一示例性实施例中,还提供了另外一种采用二维光子晶体的OLED像素单元。本实施例OLED像素单元与如图1所示的OLED像素单元的区别在于:驱动组件采用以单晶硅为衬底的MOS(metal-oxide-semiconductor)结构。
图10为根据本发明的该实施例的OLED像素单元中背板与发光二极管中阳极的结构示意图。如图10所述,本实施例中的背板包括:
衬底100,其材料为单晶硅;
MOS组件200,形成于由沟道阻断区261所限定的区域内,包括:形成于沟道隔断区之间的沟道区、形成于沟道区上方的栅极氧化层211、形成于栅极氧化层之上的栅极210、形成于栅极两侧下方衬底的源极251和漏极252;
钝化层300,覆盖于所述TFT组件的上方,其中,在预设像素区域刻蚀形成光子晶体阵列,该光子晶体阵列的周期及单元结构尺寸由该预设像素区域的预设颜色决定;
像素界定层400,形成于钝化层300的上方,其形成像素区域。
本发明的实施例中,采用以单晶硅为衬底的MOS结构来代替TFT组件来实现驱动有机发光二极管的功能。其中,上述的沟道区可以是p型沟道区也可以是n型沟道区,其分别对应单晶硅NMOS器件和单晶硅NMOS器件,而形成的背板则是单晶硅NMOS背板和单晶硅PMOS背板,本发明不再对其进行详细说明。
在本发明的示例性实施例中,还提供了一种如图10所述的OLED像素单元的制备方法。该制备方法可以包括步骤A’-C’。
步骤A’,在单晶硅衬底上制备TFT组件;
该制备TFT组件的步骤A’可以具体包括:
子步骤A0’,对单晶硅进行清洗;
子步骤A1’,在单晶硅衬底上淀积氮化硅作为隔离层,并注入硼离子形成沟道阻断区261;
子步骤A2’,在沟道阻断区之间的单晶硅衬底上沉积栅极氧化层;
子步骤A3’,在栅极氧化层上沉积多晶硅并重掺杂形成栅极210;
子步骤A4’,在栅极两侧下方衬底上采用自对准方法注入砷离子形成源极251和漏极252;
子步骤A5’,在栅极、源极和漏极上方沉积氮化硅或氧化硅并光刻-刻蚀成孔,淀积金属Al等形成源极或漏极金属引线,完成金属化。
步骤B’:在TFT组件的上方沉积约100nm的SiO2层作为钝化层。
步骤C’:按照预设的形状和周期,在钝化层中预设像素区域刻蚀形成光子晶体阵列,其中,该光子晶体阵列的周期及单元结构尺寸由当前OLED像素单元的预设颜色所决定。
后续的形成阳极、形成像素界定层、形成白光有机发光二极管的工艺与前述实施例相同,此处不再详细描述。
需要说明的是,以单晶硅为基础制备该OLED像素单元的主体工艺与前述实施例类似,此处不再详细说明。
在本发明的示例性实施例中,还提供了另外一种OLED像素单元。本实施例OLED像素单元与前述实施例的OLED像素单元的区别在于:TFT组件采用顶栅结构,如图11所示。
关于顶栅TFT组件和底栅TFT组件的区别,本领域技术人员应当非常清楚。而除顶栅TFT组件之外的AM有机发光二极管中其他组成部分可参照第二实施例的相关说明,此处不再重复描述。
在本发明的示例性实施例中,还提供了另外一种采用二维光子晶体的OLED像素单元,其与前述实施例的OLED像素单元的区别在于:二维光子晶体阵列形成于预设像素区域的栅极绝缘层。由于在栅极绝缘层形成二维光子晶体阵列,因此,在该区域 的上方的钝化层、阳极等都形成预设好的周期性突起,从而实现波长选择的功能。
同理,该二维光子晶体阵列还可以形成于衬底、缓冲层、驱动组件组成膜层(如栅极绝缘层、有源层、刻蚀阻挡层、源极或者漏极)、像素界定层、有机发光二极管组成膜层(如阴极或阳极)等结构中。再或者由两层或更多层间的配合形成光子晶体阵列。只要二维光子晶体阵列的位置满足“在有机发光二极管的出光侧”的条件,或者说将二维光子晶体阵列设置在有机发光二极管的出光路径上,均可以实现选光的功能,从而实现本发明,其实现的原理与上述实施例相同,此处不再重述。
至此,已经结合附图对本发明多个实施例进行了详细描述。依据以上描述,本领域技术人员应当对本发明OLED像素单元及其制备方法、显示面板和显示装置设备有了清楚的认识。
此外,上述对各元件和方法的定义并不仅限于实施例中提到的各种具体结构、形状或方式,本领域普通技术人员可对其进行简单地更改或替换,例如:
(1)除了上述实施例中的IGZO-TFT背板之外,本发明还可以采用a-Si TFT背板、LTPS TFT背板、单晶硅NMOS背板、单晶硅PMOS背板、单晶硅CMOS背板等,并且TFT结构应理解为现有技术中的所有公开的结构,本发明并不对此进行限定;
(2)除了二维光子晶体阵列之外,还可以采用三维光子晶体阵列来实现波长选择,同样能够实现本发明,此处的三维光子晶体阵列,可以采用如下方法制备:多层薄膜沉积,在奇数层的薄膜沉积之后刻蚀出阵列,偶数层直接覆盖,多层下来之后,形成三维的晶体结构;
(3)上述实施例中,形成光子晶体的材料大多为SiO2,但除了该材料之外,还可以采用其他材料来形成光子晶体阵列,例如:氮化硅和氧化钛等无机绝缘材料、有机绝缘材料、由两种及多种绝缘材料的复合或者导电材料;
(4)虽然上述实施例中采用白光有机发光二极管,但本领域技术人员应当清楚,除了白光有机发光二极管之外,对于涵盖一定波长范围的有机发光二极管,只要预设颜色在该波长范围内,同样可以由光子晶体阵列实现选光。因此,本发明并不以白光有机发光二极管为限。
综上所述,本发明采用二维光子晶体对OLED进行颜色选择的方法利用了成熟现有工艺,能使实现其他方法所无法企及的精细程度,可应用至高分辨率和超高分辨率的微小尺寸(<1inch)OLED显示面板的制备,具有良好的应用前景。
以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详 细说明,所应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。

Claims (21)

  1. 一种OLED像素单元,包括:
    有机发光二极管,其发出涵盖一波长范围的光;以及
    光子晶体阵列,位于所述有机发光二极管的出光侧,其结构参数由该OLED像素单元的预设颜色决定;
    其中,所述有机发光二极管发出的光经由所述光子晶体阵列进行波长选择,从而在所述有机发光二极管的出光侧呈现出预设颜色。
  2. 根据权利要求1所述的OLED像素单元,其中,所述光子晶体阵列为三维光子晶体阵列。
  3. 根据权利要求1所述的OLED像素单元,其中,所述光子晶体阵列为二维光子晶体阵列;
    该二维光子晶体阵列为矩形周期结构、菱形周期结构或准周期结构;其构成单元为凹入结构、凸起结构、或凸起/凹入结合的混合结构。
  4. 根据权利要求3所述的OLED像素单元,其中,所述凹入结构为圆柱孔或球形凹入结构;所述凸起结构为圆柱或球形凸起结构。
  5. 根据权利要求4所述的OLED像素单元,其中,所述二维光子晶体阵列为矩形周期结构,其构成单元为圆柱孔凹入结构。
  6. 根据权利要求5所述的OLED像素单元,其中,所述有机发光二极管为白光有机发光二极管。
  7. 根据权利要求6所述的OLED像素单元,其中:
    对于预设颜色为蓝色的OLED像素单元:圆柱孔凹入结构的直径D1满足:245nm≤D1≤255nm;在X方向和Y方向上的孔间距L1满足:335nm≤L1≤345nm;
    对于预设颜色为绿色的OLED像素单元:圆柱孔凹入结构的直径D2满足:215nm≤D2≤225nm,在X方向和Y方向上的孔间距L2满足:135nm≤L2≤145nm;或
    对于预设颜色为红色的OLED像素单元:圆柱孔凹入结构的直径D3满足:95nm≤D3≤105nm,在X方向和Y方向上的孔间距L3满足:295nm≤L3≤305nm。
  8. 根据权利要求1所述的OLED像素单元,其中,所述光子晶体阵列的结构参数由平面波法、转移矩阵法或有限元法计算得出。
  9. 根据权利要求1所述的OLED像素单元,还包括:
    衬底(100);
    驱动组件,形成于所述衬底(100)上;以及
    钝化层(300),覆盖于所述驱动组件的上方,所述有机发光二极管的阳极通过钝化层(300)上的过孔电性连接至所述驱动组件。
  10. 根据权利要求9所述的OLED像素单元,其中,所述光子晶体阵列形成于所述衬底(100)、驱动组件组成膜层或钝化层(300)中。
  11. 根据权利要求10所述的OLED像素单元,其中,所述光子晶体阵列形成于所述钝化层中,所述有机发光二极管的阳极的部分材料填充于该光子晶体阵列内。
  12. 根据权利要求9所述的OLED像素单元,还包括:
    缓冲层,形成于所述衬底(100)和驱动组件之间,其中,所述光子晶体阵列形成于该缓冲层中。
  13. 根据权利要求9所述的OLED像素单元,其中,所述驱动组件为TFT组件、NMOS组件、PMOS组件或CMOS组件。
  14. 根据权利要求13所述的OLED像素单元,其中,所述TFT组件为底栅结构的TFT组件,包括:
    栅极(210),形成于所述衬底(100)上;
    栅极绝缘层(220),形成于栅极(210)及未被栅极覆盖的透明衬底上方;
    有源层(230),形成于所述栅极绝缘层(220)的上方;
    刻蚀阻挡层(240),形成于所述有源层(230)的上方;以及
    源极(251)和漏极(252),形成于刻蚀阻挡层(250)的两侧,并位于有源层(230)及未被有源层覆盖的栅极绝缘层的上方;
    其中,所述光子晶体阵列形成于所述栅极(210)、栅极绝缘层(220)、有源层(230)、刻蚀阻挡层(240)、源极(251)或漏极(252)的任意膜层中。
  15. 根据权利要求1所述的OLED像素单元,其中,所述有机发光二极管包括:
    第一电极;
    发光层,形成于所述第一电极上;
    第二电极,形成于所述发光层上。
  16. 根据权利要求15所述的OLED像素单元,其中,所述光子晶体阵列形成于所述第一电极或第二电极的膜层中。
  17. 一种OLED显示面板,包括一个或更多个权利要求1至16中任一项所述的 OLED像素单元。
  18. 根据权利要求17所述的OLED显示面板,其中,有机发光二极管与相应的具有波长选择功能的光子晶体阵列在OLED显示面板上周期排列。
  19. 一种显示装置,包括权利要求17或18所述的OLED显示面板。
  20. 一种OLED像素单元的制备方法,用于制备权利要求1至16中任一项所述的OLED像素单元,所述制备方法包括:
    形成有机发光二极管;以及
    在所述形成有机发光二极管的步骤之前或之中,在所述有机发光二极管的出光侧形成光子晶体阵列。
  21. 根据权利要求20所述OLED像素单元的制备方法,采用以下技术其中之一来形成所述的光子晶体阵列:光刻刻蚀工艺、纳米压印工艺、离子束刻蚀工艺、热烘烤工艺、微球旋涂工艺、微球打印工艺、纳米颗粒旋涂技术、纳米颗粒打印技术。
PCT/CN2014/089797 2014-08-22 2014-10-29 Oled像素单元及其制备方法、显示面板和显示装置 WO2016026212A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/771,455 US10332944B2 (en) 2014-08-22 2014-10-29 OLED pixel unit with photonic crystal array and method of producing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410418900.8A CN104201188B (zh) 2014-08-22 2014-08-22 Oled像素单元及其制备方法、显示面板和显示装置
CN201410418900.8 2014-08-22

Publications (1)

Publication Number Publication Date
WO2016026212A1 true WO2016026212A1 (zh) 2016-02-25

Family

ID=52086456

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/089797 WO2016026212A1 (zh) 2014-08-22 2014-10-29 Oled像素单元及其制备方法、显示面板和显示装置

Country Status (3)

Country Link
US (1) US10332944B2 (zh)
CN (1) CN104201188B (zh)
WO (1) WO2016026212A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113361138A (zh) * 2021-07-08 2021-09-07 电子科技大学 一种纳米表面等离激元非局域效应模拟的数值求解方法

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104882467B (zh) * 2015-06-04 2017-12-15 京东方科技集团股份有限公司 基板及其制造方法、显示装置
CN106941109A (zh) * 2016-01-04 2017-07-11 上海和辉光电有限公司 一种oled显示面板及其制备方法
US11081057B2 (en) 2016-04-22 2021-08-03 Sony Corporation Display apparatus and electronic device
CN106449658A (zh) * 2016-11-08 2017-02-22 武汉华星光电技术有限公司 Tft基板及其制作方法
KR102578996B1 (ko) * 2016-11-30 2023-09-14 엘지디스플레이 주식회사 유기발광표시패널 및 이를 이용한 유기발광표시장치
US10244230B2 (en) * 2017-03-01 2019-03-26 Avalon Holographics Inc. Directional pixel for multiple view display
CN106935727B (zh) * 2017-03-14 2018-09-04 淮阴工学院 一种线偏振出光有机发光二极管
CN107359180B (zh) 2017-07-07 2020-05-22 京东方科技集团股份有限公司 一种显示装置和显示装置的制作方法
WO2019119235A1 (zh) * 2017-12-18 2019-06-27 深圳市柔宇科技有限公司 一种显示器及其显示器制造方法
CN109103232A (zh) * 2018-08-30 2018-12-28 上海天马微电子有限公司 一种oled显示面板及oled显示装置
CN110943104B (zh) 2018-09-21 2022-11-22 北京小米移动软件有限公司 有机发光二极管显示屏及电子设备
US10810932B2 (en) * 2018-10-02 2020-10-20 Sct Ltd. Molded LED display module and method of making thererof
KR20200048310A (ko) * 2018-10-29 2020-05-08 엘지디스플레이 주식회사 발광 표시 장치
WO2020132882A1 (zh) * 2018-12-25 2020-07-02 深圳市柔宇科技有限公司 发光装置及其制造方法、显示面板及显示装置
CN111816783B (zh) * 2019-04-12 2023-08-15 交互数字Ce专利控股公司 包括一组正圆形中空柱体的有机发光二极管单元
CN110190095B (zh) * 2019-05-24 2021-03-16 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制备方法
US11217770B2 (en) 2019-08-12 2022-01-04 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and manufacturing method thereof
TWI694748B (zh) * 2019-08-28 2020-05-21 明志科技大學 用以產生大面積電漿之電極元件
WO2021102661A1 (zh) * 2019-11-26 2021-06-03 重庆康佳光电技术研究院有限公司 一种光阻剥离液的隔离结构、tft阵列及其制备方法
CN110911465B (zh) * 2019-11-29 2022-11-25 京东方科技集团股份有限公司 阵列基板及其制备方法和显示装置
CN111430574A (zh) * 2020-04-29 2020-07-17 武汉华星光电半导体显示技术有限公司 一种有机发光器件及其制备方法、显示面板
CN113451381B (zh) * 2021-06-29 2024-05-24 京东方科技集团股份有限公司 发光单元及其制备方法、显示面板、显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1622727A (zh) * 2003-11-28 2005-06-01 三星Sdi株式会社 电致发光显示装置和用于电致发光显示装置的热转移给体膜
CN1758819A (zh) * 2004-10-05 2006-04-12 三星Sdi株式会社 有机发光器件及其制造方法
US7173289B1 (en) * 2005-09-08 2007-02-06 Formosa Epitaxy Incorporation Light emitting diode structure having photonic crystals
US20070241326A1 (en) * 2006-04-18 2007-10-18 Samsung Electronics Co., Ltd. Organic light emitting diode display and manufacturing method thereof
CN101569013A (zh) * 2006-11-17 2009-10-28 微放射显示器有限公司 彩色光电子器件
CN101971637A (zh) * 2007-11-24 2011-02-09 美国巨视有限公司 基于自发光显示芯片的投影设备
CN102272973A (zh) * 2008-12-17 2011-12-07 3M创新有限公司 具有纳米颗粒涂层的光提取膜

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437886B1 (ko) * 2001-09-25 2004-06-30 한국과학기술원 고발광효율 광결정 유기발광소자
JP5284036B2 (ja) * 2007-11-14 2013-09-11 キヤノン株式会社 発光装置
WO2009117438A2 (en) * 2008-03-20 2009-09-24 Applied Materials, Inc. Process to make metal oxide thin film transistor array with etch stopping layer
US8264637B2 (en) * 2008-10-10 2012-09-11 Samsung Electronics Co., Ltd. Photonic crystal optical filter, reflective color filter, display apparatus using the reflective color filter, and method of manufacturing the reflective color filter
KR20140103455A (ko) * 2013-02-18 2014-08-27 삼성디스플레이 주식회사 광결정을 이용하는 표시장치
CN103474434B (zh) * 2013-09-16 2015-12-09 京东方科技集团股份有限公司 阵列基板、制备方法以及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1622727A (zh) * 2003-11-28 2005-06-01 三星Sdi株式会社 电致发光显示装置和用于电致发光显示装置的热转移给体膜
CN1758819A (zh) * 2004-10-05 2006-04-12 三星Sdi株式会社 有机发光器件及其制造方法
US7173289B1 (en) * 2005-09-08 2007-02-06 Formosa Epitaxy Incorporation Light emitting diode structure having photonic crystals
US20070241326A1 (en) * 2006-04-18 2007-10-18 Samsung Electronics Co., Ltd. Organic light emitting diode display and manufacturing method thereof
CN101569013A (zh) * 2006-11-17 2009-10-28 微放射显示器有限公司 彩色光电子器件
CN101971637A (zh) * 2007-11-24 2011-02-09 美国巨视有限公司 基于自发光显示芯片的投影设备
CN102272973A (zh) * 2008-12-17 2011-12-07 3M创新有限公司 具有纳米颗粒涂层的光提取膜

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113361138A (zh) * 2021-07-08 2021-09-07 电子科技大学 一种纳米表面等离激元非局域效应模拟的数值求解方法

Also Published As

Publication number Publication date
US20160365392A1 (en) 2016-12-15
CN104201188A (zh) 2014-12-10
CN104201188B (zh) 2017-07-25
US10332944B2 (en) 2019-06-25

Similar Documents

Publication Publication Date Title
WO2016026212A1 (zh) Oled像素单元及其制备方法、显示面板和显示装置
CN108649057B (zh) 一种显示面板、其制作方法及显示装置
CN109148525B (zh) 有机发光二极管显示面板及其制作方法
CN109616500B (zh) 有机发光二极管面板及其制备方法、显示装置
US9614018B2 (en) COA WOLED structure and manufacturing method thereof
CN101901787B (zh) 氧化物薄膜晶体管及其制造方法
TWI469410B (zh) 沉積遮罩及具有該沉積遮罩之遮罩組件
US9722005B2 (en) Light-emitting device, array substrate, display device and manufacturing method of light-emitting device
Bai et al. A direct epitaxial approach to achieving ultrasmall and ultrabright InGaN micro light-emitting diodes (μLEDs)
US20190347979A1 (en) Micro light-emitting diode displays and pixel structures
TWI695527B (zh) 顯示面板
US20170110681A1 (en) Display backplane, manufacturing method thereof and display device
WO2018161657A1 (zh) 显示基板及其制备方法、显示装置
US20150132876A1 (en) Method for fabricating organic electroluminescent devices
WO2015096308A1 (zh) Oled显示面板及其制作方法
KR102032382B1 (ko) 표시장치의 커패시터 제조 방법 및 그에 따라 제조된 커패시터를 구비하는 표시장치
US7642547B2 (en) Light emitting device and method of manufacturing the same
US20180197894A1 (en) Pixel structure, manufacturing method and display panel
Templier et al. 19‐6: Invited Paper: A Novel Process for Fabricating High‐Resolution and Very Small Pixel‐pitch GaN LED Microdisplays
US11706940B2 (en) Light emitting device including planarization layer, method of manufacturing the light emitting device, and display apparatus including the light emitting device
JP2018536961A (ja) 有機エレクトロルミネッセンス素子及びその作製方法、表示装置
CN112103322B (zh) 显示面板及其制备方法、显示装置
KR20190092062A (ko) 3축 초점거리 변환이 가능한 디스플레이 패널
CN107732029B (zh) 一种oled显示面板及其制作方法
CN109300945B (zh) 阵列基板及制作方法、显示面板

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14771455

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14900040

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC - FORM 1205A (23.06.2017)

122 Ep: pct application non-entry in european phase

Ref document number: 14900040

Country of ref document: EP

Kind code of ref document: A1