WO2022247467A1 - 显示面板和显示设备 - Google Patents

显示面板和显示设备 Download PDF

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Publication number
WO2022247467A1
WO2022247467A1 PCT/CN2022/085019 CN2022085019W WO2022247467A1 WO 2022247467 A1 WO2022247467 A1 WO 2022247467A1 CN 2022085019 W CN2022085019 W CN 2022085019W WO 2022247467 A1 WO2022247467 A1 WO 2022247467A1
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WO
WIPO (PCT)
Prior art keywords
driving
light emission
gate
emission control
light
Prior art date
Application number
PCT/CN2022/085019
Other languages
English (en)
French (fr)
Inventor
柏健
崔志佳
李豪凯
孙舟
Original Assignee
Oppo广东移动通信有限公司
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Publication date
Application filed by Oppo广东移动通信有限公司 filed Critical Oppo广东移动通信有限公司
Priority to EP22810200.0A priority Critical patent/EP4322146A1/en
Publication of WO2022247467A1 publication Critical patent/WO2022247467A1/zh

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
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    • G—PHYSICS
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    • G—PHYSICS
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    • G09G2320/00—Control of display operating conditions
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    • G09G2320/0686—Adjustment of display parameters with two or more screen areas displaying information with different brightness or colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Definitions

  • the embodiments of the present application relate to the field of display technologies, and in particular, to a display panel and a display device.
  • the display screen of an electronic device is divided into a first display area and a second display area, wherein the second display area is located in the area where the camera under the screen is placed.
  • the light-emitting device in the second display area is usually arranged in the visual area of the camera, which will cause uneven display brightness between the first display area and the second display area, and reduce the display effect of the electronic device.
  • a display panel and a display device are provided.
  • a display panel comprising:
  • the first display area includes a plurality of first pixel units
  • the second display area is arranged adjacent to the first display area, and the second display area includes a plurality of second pixel units, wherein the load of the second pixel units is smaller than the load of the first pixel units;
  • a first driving circuit connected to each of the first pixel units, and used to drive each of the first pixel units to emit light in a pulse width modulation dimming mode;
  • the second driving circuit is respectively connected to each of the second pixel units, and is used to drive each of the second pixel units in one of the pulse width modulation dimming mode and the direct current dimming mode according to the target brightness of the display panel.
  • Pixel cells emit light.
  • a display device comprising: a photosensitive device and the aforementioned display panel; wherein, the photosensitive device is arranged corresponding to the first display area.
  • FIG. 1 is a schematic structural diagram of a display device according to an embodiment
  • FIG. 2 is a schematic diagram of wiring distribution in the first display area of an embodiment
  • FIG. 3 is a schematic circuit diagram of a pixel unit in an embodiment
  • FIG. 4 is a schematic distribution diagram of a driving circuit of a display panel according to an embodiment
  • FIG. 5 is a schematic circuit diagram of a pixel driving circuit according to an embodiment
  • FIG. 6 is a schematic diagram of the distribution of the first driving circuit in the first display area of an embodiment
  • Fig. 7 is a schematic distribution diagram of a first driving circuit in a first display area according to another embodiment
  • FIG. 8 is a schematic diagram of the distribution of the second driving circuit in the second display area of an embodiment
  • Fig. 9 is a driving timing diagram of the first display area and the second display area of an embodiment
  • FIG. 10 is a schematic distribution diagram of a first driving circuit and a second driving circuit of a display panel according to an embodiment.
  • first, second and the like used in this application may be used to describe various elements herein, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element.
  • a first driver circuit could be termed a second driver circuit, and, similarly, a second driver circuit could be termed a first driver circuit, without departing from the scope of the present application.
  • Both the first drive circuit and the second drive circuit are drive circuits, but they are not the same drive circuit.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features.
  • the features defined as “first” and “second” may explicitly or implicitly include at least one of these features.
  • “plurality” means at least two, such as two, three, etc., unless otherwise specifically defined.
  • the display device may be a smart phone, a tablet computer, a game device, an augmented reality (Augmented Reality, AR) device, a notebook, a desktop computing device, a wearable device, and the like.
  • the display device 10 includes a display panel 100 , and the display area of the display panel 100 includes a first display area 101 and a second display area 102 adjacent to each other.
  • the shape of the first display area 101 may be circular, rectangular, elliptical, polygonal, irregular, etc., which is not limited in the present invention.
  • the first display area 101 can be located in any area of the display area, for example, the first display area 101 can be located in the middle area of the display area, or can be located in the area on the left side of the display area near the edge, or Can be located on the right side of the display area near the edge. In the embodiment of the present application, no further limitation is made on the position of the domain of the first display area 101 .
  • a photosensitive device 103 is disposed inside the display device 10 , wherein the photosensitive device 103 is at least partially disposed corresponding to the first display area 101 .
  • the photosensitive device 103 realizes testing and control based on optical parameters by receiving light.
  • the photosensitive device 103 is disposed under the first display area 101 , and the photosensitive device 103 is used to transmit and/or receive light signals through the first display area 101 of the display panel 100 .
  • the first display area 101 is the area above the photosensitive device 103 , in the embodiment of the present application, the upper refers to the direction from the back shell of the display device to the display screen, and the lower refers to the direction from the display screen to the back shell.
  • the photosensitive device 103 can be a camera, and the photosensitive device 103 can also be an ambient light sensor, an optical distance sensor (for example, an infrared sensor, a laser sensor, a proximity sensor, a distance sensor, an optical distance sensor), a structured light module, a time-of-flight sensor, etc. Time offlight (TOF) lens module, optical fingerprint sensor, etc.
  • an optical distance sensor for example, an infrared sensor, a laser sensor, a proximity sensor, a distance sensor, an optical distance sensor
  • structured light module for example, a time-of-flight sensor, etc. Time offlight (TOF) lens module, optical fingerprint sensor, etc.
  • TOF Time offlight
  • the photosensitive device 103 is used as a camera as an example for description.
  • the first display area 101 of the display panel includes a plurality of first pixel units (not shown), and the second display area 102 includes a plurality of second pixel units (not shown).
  • a plurality of first pixel units and a plurality of second pixel units may be arranged in an array, and the array has a row direction and a column direction.
  • the row direction may be taken as the first direction of the display panel
  • the column direction may be taken as the second direction of the display panel.
  • Each of the first pixel unit and the second pixel unit may include a light emitting device and a pixel driving circuit connected to the light emitting device and used to drive the light emitting device to emit light.
  • the light-emitting device can be, but not limited to, organic light-emitting diodes (Organic light-emitting diode, OLED), quantum dot light-emitting diodes (Quantum Dot Light Emitting Diodes, QLED), and micron-scale light-emitting diodes (Micro LED). It should be noted that each embodiment of the present application is described by taking the light-emitting device as an example of an organic light-emitting diode. Wherein, each light-emitting device can be an organic light-emitting diode of a different color, such as a red OLED, a green OLED, and a blue OLED.
  • the pixel driving circuits of the light-emitting devices of different colors can be the same, but the materials of the light-emitting layers of the light-emitting devices of different colors are different. In this way, the display of different colors is realized, so that the display device realizes full-color display.
  • the first display area is an area above the camera.
  • the light-emitting device located in the first display area may be referred to as a first light-emitting device 110a
  • the pixel drive circuit that drives the first light-emitting device 110a may be referred to as a first pixel drive circuit. 120a.
  • the light-emitting device located in the second display area is called a second light-emitting device
  • the pixel driving circuit that drives the second light-emitting device is called a second pixel driving circuit.
  • the first pixel driving circuit 120a will be arranged in the first display area 101's perimeter.
  • the area where the first pixel driving circuit 120a is located is referred to as the transition area 104 or the external area, and the first pixel driving circuit 120a located in the transition area 104 can be electrically connected to the first light emitting device 110a through the metal wiring L.
  • the metal trace L may be a transparent metal wire, for example, an indium tin oxide (Indium Tin Oxide, ITO) metal wire, an aluminum zinc oxide (Alumina zinc, AZO) metal wire, and the like.
  • the lengths of the metal wires L of the first light emitting device 110a will be different, and the RC load generated on the metal wires L will be different. (RC Loading) is also different. For example, the RC load in the first display area 101 gradually increases from the outside to the inside, resulting in uneven display of the first display area 101 and the second display area 102, which seriously reduces the display effect of the display device. .
  • the embodiment of the present application provides a display panel, which can realize the brightness adjustment of the first display area 101 and the second display area 102 .
  • the first display area 101 can be adjusted based on a pulse width modulation (Pulse Width Modulation, PWM) dimming mode.
  • PWM Pulse Width Modulation
  • This adjustment mode has a large drive current and can increase the brightness of the first display area 101.
  • the second display area 102 can be adjusted according to The size of the target brightness is used to select an appropriate dimming mode (for example, PWM dimming mode or DC dimming mode) to adjust the brightness of the second display area 102, which can avoid the low brightness of the first display area 101 or the second display
  • the brightness of the region 102 is relatively high, so that the brightness of the first display region 101 is consistent with the brightness of the second display region 102, thereby improving the display effect of the display panel.
  • the display panel includes a display area AA and a non-display area NAA arranged around the display area.
  • the display panel also includes a first driving circuit 130 and a second driving circuit 140 located in the non-display area NAA.
  • the first driving circuit 130 is respectively connected to each of the first pixel units, and is used to drive each of the first pixel units to emit light by using a pulse width modulation dimming mode.
  • the first driving circuit 130 may provide a driving signal to the first pixel driving circuit to control the first pixel driving circuit to drive the first light emitting device connected thereto to emit light.
  • the PWM dimming mode is to adjust the brightness by controlling the pulse width of each transistor switch signal in the first pixel drive circuit
  • the PWM dimming is to control the light-emitting time by changing the pulse number and pulse width of the transistor switch signal that needs to be turned on during the light-emitting stage. , so as to achieve the purpose of adjusting the brightness.
  • the pixel driving circuit includes a driving transistor T1, a data writing transistor T2, a gate reset transistor T4, an anode reset transistor T7, a threshold compensation transistor T3, a first light emission control transistor T5, a second light emission control transistor T6 and a storage capacitor C1.
  • the gate of the data writing transistor T2, the gate of the threshold compensation transistor T3, and the gate of the anode reset transistor T7 are all used to receive the second scanning signal Scan(n); the first pole of the data writing transistor T2 is connected to the data The signal line is connected to receive the data signal Data, and the second pole of the data writing transistor T2 is connected to the first pole of the driving transistor T1.
  • the gate of the gate reset transistor T4 is used for receiving the first scan signal Scan(n ⁇ 1).
  • the data signal Data provided by the data signal line remains unchanged, and the second scanning signal Scan(n) provided by the scanning signal line is turned on during the turn-on period, and the data writing transistor T2 is turned on to make the data signal Data is transmitted to the driving transistor T1, and the driving transistor T1 is controlled to be turned on, and the power supply voltage VDD provided by the power supply voltage terminal remains unchanged.
  • the turn-on degrees of the drive transistors T1 of all light emitting devices 110 are the same, therefore, only need to adjust the duty ratio of the light emission control signal EM applied to the gate of the second light emission control transistor T6 to change the light emission.
  • the brightness of the light emitting device 110 can be adjusted during the light emitting time of the device 110 in each frame.
  • the EM signal is a PWM signal.
  • the PWM signal is an AC signal with a certain frequency and duty cycle provided according to the brightness requirements of the pixel. Since the frequency of the PWM signal is much higher than the resolution of the human eye, in terms of visual effects, the brightness of the pixel will follow the PWM signal. changes with duty cycle changes.
  • the pixel driving circuit in the embodiment of the present application is not limited to the above-mentioned “7T1C” pixel structure, and may also include various types, such as “2T1C”, “3T1C”, “6T1C”, “6T2C”, “7T2C” Or “8T1C” and other structures.
  • the second driving circuit 140 is respectively connected to each of the second pixel units, and is used to drive the first pixel units in one of a PWM dimming mode and a direct current (Direct Current, DC) dimming mode according to the target brightness of the display panel.
  • Each pixel unit in the second display area 102 emits light.
  • the second driving circuit 140 may provide a driving signal to the second pixel driving circuit to control the second pixel driving circuit to drive the second light emitting device connected thereto to emit light.
  • the expression of the current of the light emitting device 110 is:
  • I oled k(VDD-V DATA ) 2
  • I oled is the current of the light-emitting device
  • k is a coefficient.
  • the power supply voltage VDD and the voltage V DATA of the data signal Data play a decisive role on the current of the light emitting device.
  • the power supply voltage VDD can be kept unchanged, and the current of the light emitting device can be adjusted by adjusting the voltage V DATA of the data signal Data, thereby realizing brightness adjustment.
  • the data signal Data needs to change the voltage amplitude according to the brightness required by each pixel unit. Exemplarily, if the brightness is to be increased, the voltage V DATA of the data signal Data is decreased; if the brightness is to be decreased, the voltage V DATA of the data signal Data is increased.
  • the display panel may pre-build and store the corresponding relationship between the target brightness and the preset dimming mode.
  • the PWM dimming mode can be used to dim each pixel unit of the second display area 102; when the target brightness is L2, the DC dimming mode can be correspondingly used to dim the pixels
  • Each pixel unit in the second display area 102 performs dimming.
  • the display panel provided by the embodiment of the present application includes a first display area 101 , a second display area 102 , a first driving circuit 130 and a second driving circuit 140 .
  • the first driving circuit 130 can use the PWM dimming mode to drive each of the first pixel units in the first display area 101 to emit light
  • the second driving circuit 140 can use the PWM dimming mode according to the target brightness of the display panel. and one of the direct current dimming modes to drive each of the second pixel units in the second display area 102 to emit light. Therefore, the divisional brightness adjustment of the first display area 101 and the second display area 102 can be realized.
  • the first The driving circuit 130 can adjust the light of each first pixel unit in the first display area 101 by using the PWM dimming mode, and its driving current is large, which can increase the brightness of the first display area 101;
  • the PWM dimming mode or the DC dimming mode of the target brightness of the display panel can improve the dimming flexibility of each second pixel unit in the second display area 102, and can also eliminate the brightness difference between the main and secondary screens, and ensure that the first The eye protection effect of the second display area 102.
  • the second driving circuit 140 when the target brightness is less than the first threshold, uses the PWM dimming mode to drive each pixel unit of the second display area 102 to emit light; when the target brightness If it is greater than the second threshold, the second driving circuit 140 uses a DC dimming mode to drive each pixel unit in the second display area 102 to emit light, wherein the first threshold is less than or equal to the second threshold.
  • the sizes of the first threshold and the second threshold which can be set according to actual requirements.
  • the first driving circuit 130 can use the PWM dimming mode to dim each pixel unit; for the second display area 102, the second driving circuit 140 can Each second pixel unit is dimmed in one of a PWM dimming mode or a DC dimming mode.
  • a PWM dimming mode a DC dimming mode.
  • Table 1 for the second display area 102, if the target brightness is high brightness, the DC dimming mode is used, and if the target brightness is low brightness, the PWM dimming mode is used.
  • Table 1 shows the dimming modes corresponding to different target brightnesses in different first display areas and second display areas
  • the display panel further stores the corresponding relationship between the target brightness and the dimming parameter of the dimming mode corresponding to each partition.
  • the mapping relationship between the target brightness and the dimming parameter PWM3 may be stored in advance. If the target luminance is 100 nit, the first driving circuit 130 outputs the light emission control signal EM as a signal of PWM4.
  • the mapping relationship between the target brightness and the dimming parameter PWM3 and the dimming parameter V_DATA can be stored in advance. If the target brightness is 100 nit, the second driving circuit 140 will output the light emission control signal EM and adjust the dimming at the same time.
  • the parameter V_DATA corresponds to the DC2 dimming mode.
  • the light adjustment of each pixel unit in the first display area 101 and the second display area 102 is performed by setting the first driving circuit 130 and the second driving circuit 140 respectively.
  • the first driving circuit 130 uses the PWM dimming mode with strong driving capability to perform full brightness dimming, and the driving current is large, which improves the brightness of the first display area 101.
  • using the DC dimming mode for dimming which can activate the eye protection effect, and at the same time avoid the defect of scrolling, which can further improve the display quality.
  • dimming by using the PWM dimming mode can avoid the occurrence of uneven brightness in the row direction of the display panel due to the large difference in the characteristics of the transistors.
  • the first display area 101 and the second display area 102 are dimmed respectively with the second driving circuit 140, which can eliminate the overall brightness difference of the first display area 101 and the second display area 102, so that the brightness of the first display area 101 Keeping consistent with the brightness of the second display area 102 can further improve the display effect of the display panel.
  • the display panel further includes a display driving unit 150 located in the non-display area NAA.
  • the display driving unit 150 may be a display driver IC (Display Driver IC, DDIC).
  • the display driving unit 150 board is configured with a first group of driving terminals and a second group of driving terminals (not shown in the figure).
  • the first group of driving terminals can be used to output the first group of driving signals.
  • the first group of driving terminals may include a first scanning trigger signal terminal and a first lighting trigger signal terminal.
  • the first group of driving signals may include a first scan trigger signal output from the first scan trigger signal terminal and a first light emission trigger signal output from the first light emission trigger signal terminal.
  • the first group of driving signals may also include multiple first clock signals output from multiple first clock terminals.
  • the second group of driving terminals can be used to output the second group of driving signals.
  • the second group of driving signals may include a second scanning trigger signal output from the second scanning trigger signal terminal and a second light emitting trigger signal output from the second light emitting trigger signal terminal.
  • the second group of driving signals may also include a plurality of second clock signals output by a plurality of second clock terminals.
  • the first driving circuit 130 is connected to the first group of driving terminals of the display driving unit 150, and can drive each first pixel unit connected to the first driving circuit 130 to emit light according to the first group of driving signals output by the first group of driving terminals.
  • the second driving circuit 140 is connected to the second group of driving terminals of the display driving unit 150, and can drive each second pixel unit connected to the second driving circuit 140 to emit light according to the second group of driving signals output from the second group of driving terminals. . It should be noted that although the connection relationship between the display driving unit 150 and the first driving circuit 130 and the second driving circuit 140 is not shown in FIG. The two drive circuits 140 are connected.
  • the first scan trigger signal is the same as the second scan trigger signal, and the first light-emitting trigger signal is different from the second light-emitting trigger signal. That is to say, the first driving circuit 130 and the second driving circuit 140 can share a set of scanning trigger signals, but the light emitting trigger signals of the first driving circuit 130 and the second driving are independent from each other and not shared, so as to realize the control of the first display area 101 and the discrete driving of the second display area 102 to emit light.
  • the first scan trigger signal is different from the second scan trigger signal
  • the first light-emitting trigger signal is different from the second light-emitting trigger signal. That is to say, the scanning trigger signals and light emitting trigger signals of the first driving circuit 130 and the second driving circuit 140 are independent of each other and not shared, so as to realize the discrete driving and lighting of the first display area 101 and the second display area 102 .
  • the plurality of second pixel units in the first display area 101 are divided into a first pixel block 101 a and a second pixel block 101 b.
  • the first pixel blocks 101a and the second pixel blocks 101b are arranged along a first direction of the display panel and arranged symmetrically to an axis.
  • the direction of the axis of symmetry is the same as the second direction, wherein the first direction is perpendicular to the second direction.
  • the first direction may be understood as a row direction
  • the second direction may be understood as a column direction.
  • the display panel further includes: a plurality of first gate lines 111 and a plurality of first light emission control lines 112 arranged in the first pixel block 101a, and a plurality of second gate lines 112 arranged in the second pixel block 101b. gate lines 113 and a plurality of second light emission control lines 114 .
  • the first gate line 111 is connected to each first pixel unit in the same pixel row in the first pixel block 101a;
  • the second gate line 113 is connected to each first pixel unit in the same pixel row in the second pixel block 101b unit connection.
  • the first light emission control line 112 is connected to each first pixel unit of at least one pixel row in the first pixel block 101a; the second light emission control line 114 is connected to each first pixel unit of at least one pixel row in the second pixel block 101b.
  • the first driving circuit can be understood as a gate driver on array (Gate Driver on Array, GOA) circuit, which can also be referred to as a GOA circuit.
  • the first drive circuit 130 includes multiple cascaded first gate drive units 131, multiple cascaded second gate drive units 132, multiple cascaded first light emission control units 133, multiple cascaded The second light emission control unit 134.
  • each gate driving unit in the first driving circuit 130 includes a first gate input terminal and a first gate output terminal, wherein the first gate output terminal is used to output the first scanning signal.
  • Each lighting control unit in the first driving circuit 130 includes a first lighting input terminal and a first lighting output terminal, and the first lighting output terminal is used for outputting a first lighting control signal.
  • the first gate input terminal of the first gate driving unit 131 of the first stage is electrically connected to the first scanning trigger signal terminal, and in every two adjacent stages of the first gate driving unit 131, the first gate driving unit 131 of the next stage
  • the first gate input end of the first gate driving unit 131 is electrically connected to the first gate output end of the upper stage first gate driving unit 131 .
  • the first gate driving unit 131 is configured to drive the first gate line 111 in a unilateral driving manner according to the first scanning trigger signal. That is, the first gate output terminal of each stage of the first gate driving unit 131 is correspondingly connected to one first gate line 111, so as to send the first gate line 111 connected thereto to the first gate line 111 according to the first description trigger signal.
  • the first gate input terminal of the second gate driving unit 132 of the first stage is electrically connected to the first scanning trigger signal terminal, and in every two adjacent stages of the second gate driving unit 132, the second gate driving unit 132 of the next stage
  • the first gate input end of the second gate driving unit 132 is electrically connected to the first gate output end of the upper stage second gate driving unit 132 .
  • the second gate driving unit 132 is used for driving the second gate line 113 in a unilateral driving manner according to the first scanning trigger signal. That is, the first gate output terminal of each stage of the second gate driving unit 132 is correspondingly connected to one second gate line 113, so as to send the first gate line 113 to the connected second gate line 113 according to the first description trigger signal.
  • the first light-emitting input terminal of the first light-emitting control unit 133 of the first stage is electrically connected to the first light-emitting trigger signal terminal.
  • the light-emitting input terminal is electrically connected to the first light-emitting output terminal of the upper-level first light-emitting control unit 133 .
  • the first gate driving unit 131 is configured to drive the first gate line 111 in a unilateral driving manner according to the first scanning trigger signal. That is, the first light output terminal of each stage of the first light control unit 133 is correspondingly connected to one first light control line 112, so as to send the first light output to the connected first light control line 112 according to the first light trigger signal.
  • a light emission control signal to realize unilateral driving of the first light emission control line 112 .
  • the first light-emitting input end of the first-stage second light-emitting control unit 134 is electrically connected to the first light-emitting trigger signal end.
  • the light-emitting input terminal is electrically connected to the first light-emitting output terminal of the second light-emitting control unit 134 at the upper stage.
  • the first light output terminal of the second light emission control unit 134 of each stage is correspondingly connected to a second light emission control line 114, so as to send the first light emission to the second light emission control line 114 connected thereto according to the first light emission trigger signal.
  • control signal to realize unilateral driving of the first light emission control line 112 .
  • the first driving circuit 130 can drive each gate line and light emission control line in a unilateral driving manner, which can meet the driving requirements. Requirements, in addition, it can also avoid setting the gate connection line for connecting the first gate driving unit 131 and the second gate driving unit 132 in the first display area 101, which can reduce the frame width of the first display area 101, and then The screen ratio of the first display area 101 can be increased.
  • the first driving circuit 130 can drive the first light emission control line 112 in a double row unilateral driving manner, and drive the second light emitting control line 114 in a double row unilateral driving manner. . Since the number of first pixel units in the first display area 101 is relatively small, the driving requirements thereof can be met and the driving efficiency can be improved through the dual-row single-side driving manner.
  • the first gate output terminals of the first gate driving unit 131 and the second gate driving unit 132 in the same row may also be connected to each other, that is, the first gates in the same row
  • the line 111 is connected to the second gate line 113 . Therefore, the first gate line 111 and the second gate line 113 in the same row can be jointly driven by the first gate driving unit 131 and the second gate driving unit 132, so as to realize the control of the first gate line 111 and the second gate line. Double-sided driving of the gate line 113 .
  • first light output terminals of the first light emission control unit 133 and the second light emission control unit 134 in the same row may also be connected to each other, that is, the first light emission control line 112 and the second light emission control line 112 in the same row
  • the control lines 114 are connected to realize bilateral driving of the first light emission control line 112 and the second light emission control line 114 .
  • the second display area includes a first sub-display area 102a and a second sub-display area 102b, wherein the first sub-display area 102a is located on the first display at least one side of the region 101, and the first sub-display region 102a and the first display region 101 are arranged along the first direction of the display panel. That is to say, at least one first pixel unit located in the first display area 101 and at least one second pixel unit located in the first sub-display area 102a are arranged on the same line in the first direction.
  • the first sub-display area 102a can also be located on both sides of the first display area 101 , or the first sub-display area 102a can also be arranged around the first display area 101 .
  • the specific area of the first sub-display area 102a is not limited.
  • the second driving circuit may include a first sub-driving circuit and a second sub-driving circuit.
  • the first sub-driver circuit is respectively connected with the second group of drive terminals and the second pixel units of the first sub-display area 102a, and is used to drive the first sub-driver according to the second group of drive signals.
  • Each of the second pixel units in a sub-display area 102a emits light.
  • the second sub-drive circuit is respectively connected to the second group of driving terminals and the second pixel units of the second sub-display area 102b, and is used to drive the second sub-display according to the second group of driving signals.
  • Each of the second pixel units of the region 102b emits light.
  • the driving modes of the first sub-driving circuit and the second sub-driving circuit may be the same or different.
  • the first sub-driver circuit can drive each drive line (for example, gate line, light-emitting control line) provided in the first sub-display area 102a in a unilateral driving manner
  • the second sub-driver circuit can drive in a double-sided driving manner.
  • Each driving line for example, gate line, light emission control line
  • the plurality of second pixel units in the first sub-display area 102 a are divided into a third pixel block 1021 and a fourth pixel block 1022 .
  • the third pixel block 1021 , the first pixel block 101 a , the second pixel block 101 b , and the fourth pixel block 1022 are arranged along a first direction (that is, a row direction) of the display panel.
  • the third pixel block 1021 and the fourth pixel block 1022 may be symmetrically distributed on both sides of the first display area 101 .
  • the display panel further includes: a plurality of third gate lines 115 and a plurality of third light emission control lines 116 arranged in the third pixel block 1021, and a plurality of third gate lines 116 arranged in the fourth pixel block 1022
  • the fourth gate line 117 and a plurality of fourth light emission control lines 118 are connected to each second pixel unit in the same pixel row in the third pixel block 1021; the fourth gate line 117 is connected to each second pixel unit in the same pixel row in the fourth pixel block 1022 unit connection.
  • the third light emission control line 116 is connected to each second pixel unit of at least one pixel row in the third pixel block 1021 ; the fourth light emission control line 118 is connected to each second pixel unit of at least one pixel row in the fourth pixel block 1022 .
  • the first sub-drive circuit includes multiple cascaded third gate drive units 141, multiple cascaded fourth gate drive units 142, multiple cascaded third light emission control units 143, multiple cascaded The fourth light emission control unit 144.
  • each gate driving unit in the first sub-driving circuit includes a second gate input terminal and a second gate output terminal, wherein the second gate output terminal is used to output the second scanning signal.
  • Each lighting control unit in the first sub-drive circuit includes a second lighting input terminal and a second lighting output terminal, and the second lighting output terminal is used for outputting a second lighting control signal.
  • the second gate input terminal of the third gate driving unit 141 of the first stage is electrically connected to the second scanning trigger signal terminal, and in every two adjacent stages of the first gate driving unit 131, the third gate driving unit 141 of the next stage
  • the second gate input end of the upper stage third gate driving unit 141 is electrically connected to the second gate output end of the third gate driving unit 141 .
  • the third gate driving unit 141 can drive the third gate line 115 in a unilateral driving manner according to the second scanning trigger signal.
  • the second gate input terminal of the fourth gate driving unit 142 of the first stage is electrically connected to the second scanning trigger signal terminal.
  • the second gate input end of the upper-stage fourth gate driving unit 142 is electrically connected to the second gate output end of the fourth gate driving unit 142 .
  • the fourth gate driving unit 142 can drive the fourth gate line 117 in a unilateral driving manner according to the second scanning trigger signal.
  • the second light-emitting input terminal of the third light-emitting control unit 143 of the first stage is electrically connected to the second light-emitting trigger signal end, and in every two adjacent stages of the third light-emitting control unit 143, the second The light-emitting input terminal is electrically connected to the second light-emitting output terminal of the third light-emitting control unit 143 at the upper stage.
  • the third gate driving unit 141 can drive the third gate line 115 in a unilateral driving manner according to the second scanning trigger signal.
  • the second light-emitting input terminal of the fourth light-emitting control unit 144 of the first stage is electrically connected to the second light-emitting trigger signal end.
  • the light-emitting input terminal is electrically connected to the second light-emitting output terminal of the fourth light-emitting control unit 144 at the upper stage.
  • the fourth gate driving unit 142 can drive the fourth gate line 117 in a unilateral driving manner according to the second scanning trigger signal.
  • the first sub-driver circuit can drive the third light emitting control line 116 in a double-row single-edge driving manner, and drive the fourth light-emitting control line 118 in a double-row single-edge driving manner.
  • the second gate output terminals of the third gate driving unit 141 and the fourth gate driving unit 142 in the same row may also be connected to each other, that is, the third gates in the same row
  • the line 115 is connected to the fourth gate line 117 . Therefore, the third gate line 115 and the fourth gate line 117 in the same row can be jointly driven by the third gate driving unit 141 and the fourth gate driving unit 142, so as to realize the control of the third gate line 115 and the fourth gate line. Double-sided driving of the gate line 117.
  • the second light output ends of the third light emission control unit 143 and the fourth light emission control unit 144 in the same row may also be connected to each other, that is, the third light emission control line 116 and the fourth light emission control line 116 in the same row
  • the control lines 118 are connected to realize bilateral driving of the third light emission control line 116 and the fourth light emission control line 118 .
  • the display panel further includes: a plurality of fifth gate lines 1191 and a plurality of fifth light emission control lines 1192 disposed in the second sub-display area 102b.
  • the fifth gate line 1191 is connected to each second pixel unit of the same pixel row in the second sub-display area 102b; the fifth light emission control line 1192 is connected to each second pixel unit of at least one pixel row in the second sub-display area 102b Pixel unit connection.
  • the second sub-drive circuit includes multiple cascaded fifth gate drive units 145 and multiple cascaded fifth light emission control units 146 .
  • the fifth gate driving unit 145 is symmetrically distributed on both sides of the second sub-display area 102b, and the fifth light emission control unit 146 is also symmetrically distributed on both sides of the second sub-display area 102b.
  • the second gate input terminal of the first-stage fifth gate drive unit 145 is electrically connected to the second scan trigger signal terminal, and in every two adjacent stages of fifth gate drive units 145, the fifth gate drive unit 145 of the next stage
  • the second gate input terminal of the driving unit 145 is electrically connected to the second gate output terminal of the fifth gate driving unit 145 of the upper stage.
  • the fifth gate line 1191 is connected to two fifth gate driving units 145 located in the same row, therefore, the second sub-driving circuit can drive the fifth light emission control line 1192 in a double-sided driving manner.
  • the fifth light emission control line 1192 when the fifth light emission control line 1192 is connected to the second pixel units in two adjacent rows in the second sub-display area 102b, its second sub-driver circuit can control the fifth light emission in a double-row bilateral driving manner.
  • the driving of the line 1192 improves the gate driving ability and light emission control driving ability of the second sub-display area 102b with a large number of second pixel units, and improves the response speed and uniformity of the second sub-display area 102b.
  • the pixel driving circuit shown in FIG. 9 As shown in FIG. 9, for the convenience of illustration, the pixel driving circuit shown in FIG. As an example, the working principle of realizing the same brightness (for example, 100 nit) of the first display area and the second display area is explained.
  • the first scan signal input to the first display area can be represented by Scan(a)
  • the second scan signal input to the first display area can be represented by Scan(b)
  • the first scan signal input to the second display area can be represented by Scan(1) indicates that the second scanning signal input to the second display area can be expressed by Scan(2).
  • the first scan signals Scan(a) and Scan(1) input to the gate reset transistor T4 are simultaneously pulled low, and the gate reset transistor T4 is turned on, thereby making the first pixel drive circuit and the second pixel drive circuit
  • the gate transistors in the pixel drive circuit are reset.
  • the second scanning signals Scan(b) and Scan(2) input to the data writing transistor T2 are simultaneously pulled low, and the data writing transistor T2 is turned on, which can control the first pixel driving circuit and the second pixel driving circuit.
  • the data writing transistor T2 of the pixel driving circuit is charged.
  • the first data signal Data of the first pixel driving circuit and the second data signal Data of the second pixel driving circuit can be set to be different, so that the lower regions of the first display area 101 and the second display area 102 can display the same brightness.
  • the data voltage Vdata of the data signal Data is related to the duty ratio of the light emission control signal.
  • the first driving circuit 130 can adopt the PWM dimming mode, and correspondingly output the first light-emitting control signal EM(a) corresponding to the target brightness of 100 nit to dim the light of each first pixel unit in the first display area,
  • the first light emission control signal EM(a) is a PWM signal
  • the second drive circuit 140 can use the DC dimming mode to output the second light emission control signal EM(1) correspondingly to dim the light of each second pixel unit in the second display area 102 , and adjust the data voltage Vdata of the second data signal to a voltage corresponding to a target brightness of 100 nit.
  • the non-display area NAA includes a first area 151 , a second area 152 , a third area 153 and a fourth area 154 connected in sequence.
  • the first region 151 and the third region 153 are arranged in parallel
  • the second region 152 and the fourth region 154 are arranged in parallel
  • the second region 152 is connected to the first region 151 and the third region 153 respectively.
  • the first driving circuit 130 is disposed in the first area 151 close to the first display area 101 .
  • the first area 151 can be understood as the area above the display area AA; if the first display area 101 is close to the right frame of the display panel, the first area 151 151 can be understood as the area on the right side of the display area AA. If the first display area 101 is close to the left frame of the display panel, the first area 151 can be understood as the area on the left side of the display area AA. If the first display area 101 is close to As for the lower frame of the display panel, the first area 151 can be understood as an area located at the lower side of the display area AA.
  • the first display area 101 is close to the upper frame of the display panel, and the display area AA is a rectangular area as an example for illustration.
  • the non-display area NAA includes a first area 151 , a third area 153 , a fourth area 154 and a second area 152 respectively located on the upper side, lower side, left side, and right side of the display area AA.
  • the first driving circuit 130 may be disposed in the first area 151
  • the second driving circuit 140 is symmetrically distributed in the second area 152 and the fourth area 154 .
  • the first sub-driver circuits are symmetrically arranged in the second area 152 and the fourth area 154 .
  • the third gate driving unit 141 and the third light emission control unit 143 are disposed in the fourth area 154
  • the fourth gate drive unit 142 and the fourth light emission control unit 144 are disposed in the second area 152
  • the second sub-driver circuits are also symmetrically arranged in the second area 152 and the fourth area 154
  • the fifth gate driving unit 145 is symmetrically distributed in the second region 152 and the fourth region 154
  • the fifth light emission control unit 146 is also symmetrically distributed in the second region 152 and the fourth region 154 .
  • setting the first driving circuit 130 in the first area 151 close to the first display area 101 can save the wiring distance of the gate line and the light emission control line in the first driving circuit 130 , can also simplify the overall circuit complexity of the display panel, and can also reduce the left and right borders, so as to realize a display panel with narrow borders.
  • the first gate driving unit 131 and the second gate driving unit 132 in the first driving circuit 130 are located in the The first area 151 ; the first light emission control unit 133 and the second light emission control unit 134 in the first driving circuit 130 are symmetrically distributed in the second area 152 and the fourth area 154 .
  • the first light emission control unit 133 can be disposed in the fourth area 154, and the second light emission control unit 134 can be disposed in the second area 152, wherein the first light emission control unit 133 and the second light emission control unit 134 are related to the first display
  • the symmetrical arrangement of the area 101 can also save the wiring distance of the gate line and the light-emitting control line in the first driving circuit 130, and can also simplify the overall circuit complexity of the display panel, and can also reduce the left and right frames to realize a display panel with a narrow frame .
  • the positions of the first driving circuit 130 and the second driving circuit 140 in the non-display area in the embodiment of the present application are not limited to the above examples, and can also be adaptively adjusted according to actual needs.
  • the routing of the driving lines eg, gate lines, light emission control lines located in the first display area 101 and the second display area 102 can also be carried out according to the positions of the first driving circuit 130 and the second driving circuit 140. Adjustment.

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Abstract

一种显示面板(100)和显示设备(10)，其中，显示面板(100)包括第一显示区(101)，包括多个第一像素单元，第二显示区(102)，与第一显示区(101)相邻设置，第二显示区(102)包括多个第二像素单元，其中，第二像素单元的负载小于第一像素单元的负载；第一驱动电路(130)，分别与各第一像素单元连接，用于采用脉冲宽度调制调光模式驱动各第一像素单元发光；第二驱动电路(140)，分别与各第二像素单元连接，用于根据显示面板(100)的目标亮度采用脉冲宽度调制调光模式和直流调光模式中的一种驱动各第二像素单元发光。

Description

显示面板和显示设备
相关申请的交叉引用
本申请要求于2021年5月28日提交中国专利局、申请号为202121188394X实用新型名称为“显示面板和显示设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及显示技术领域，特别是涉及一种显示面板和显示设备。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有示例性技术。
随着科学技术的不断发展，电子设备层出不穷，为人们的日常生活和娱乐带来了极大便利。目前，电子设备不断向着大屏化方向发展，为提高电子设备的屏占比，真正实现全面屏，屏下摄像头技术备受关注。
一般，电子设备的显示屏分为第一显示区和第二显示区，其中，第二显示区位于屏下摄像头放置区域。第二显示区的发光器件通常设置在摄像头的视觉区域，会导致第一显示区和第二显示区的显示亮度不均一，降低了电子设备的显示效果。
发明内容
根据本申请的各种实施例，提供一种显示面板和显示设备。
一种显示面板，包括：
第一显示区，包括多个第一像素单元，
第二显示区，与所述第一显示区相邻设置，所述第二显示区包括多个第二像素单元，其中，所述第二像素单元的负载小于所述第一像素单元的负载；
第一驱动电路，分别与各所述第一像素单元连接，用于采用脉冲宽度调制调光模式驱动各所述第一像素单元发光；
第二驱动电路，分别与各所述第二像素单元连接，用于根据所述显示面板的目标亮度采用所述脉冲宽度调制调光模式和直流调光模式中的一种驱动各所述第二像素单元发光。
一种显示设备，包括：感光器件和前述的显示面板；其中，所述感光器件与所述第一显示区对应设置。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例或传统技术中的技术方案，下面将对实施例或传统技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为一实施例的显示设备的结构示意图；
图2为一实施例的第一显示区的走线分布示意图；
图3为一实施例的像素单元的电路示意图；
图4为一实施例的显示面板的驱动电路的分布示意图；
图5为一实施例的像素驱动电路的电路示意图；
图6为一实施例的第一显示区的第一驱动电路的分布示意图；
图7为又一实施例的第一显示区的第一驱动电路的分布示意图；
图8为一实施例的第二显示区的第二驱动电路的分布示意图；
图9为一实施例的第一显示区和第二显示区的驱动时序图；
图10为一实施例的显示面板的第一驱动电路、第二驱动电路的分布示意图。
具体实施方式
为了便于理解本申请实施例，下面将参照相关附图对本申请实施例进行更全面的描述。附图中给出了本申请实施例的首选实施例。但是，本申请实施例可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请实施例的公开内容更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请实施例的技术领域的技术人员通常理解的含义相同。本文中在本申请实施例的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请实施例。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
可以理解，本申请所使用的术语“第一”、“第二”等可在本文中用于描述各种元件，但这些元件不受这些术语限制。这些术语仅用于将第一个元件与另一个元件区分。举例来说，在不脱离本申请的范围的情况下，可以将第一驱动电路称为第二驱动电路，且类似地，可将第二驱动电路称为第一驱动电路。第一驱动电路和第二驱动电路两者都是驱动电路，但其不是同一驱动电路。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
本申请实施例提供一种显示设备，显示设备可以为智能手机、平板电脑、游戏设备、增强现实(Augmented Reality，AR)设备、笔记本、桌面计算设备、可穿戴设备等。为方便理解，下面以显示设备为手机进行举例说明。如图1和图4所示，显示设备10包括显示面板100，显示面板100的显示区包括邻接的第一显示区101和第二显示区102。在其中一个实施例中，第一显示区101的形状可以是圆形、矩形、椭圆形、多边形、不规则异形等，本发明对此不作限定。在其中一个实施例中，第一显示区101可以位于显示区的任一区域，例如，第一显示区101可以位于显示区的中间区域，也可以位于显示区的左侧靠近边缘的区域，也可以位于显示区的右侧靠近边缘的区域。在本申请实施例中，对第一显示区101域的位置不做进一步的限定。
请继续参考图1，显示设备10内设有感光器件103，其中，感光器件103至少部分与第一显示区101对应设置。感光器件103通过接收光线实现基于光学参数的测试和控制。示例性的，感光器件103设置在第一显示区101的下方，感光器件103用于透过显示面板100的第一显示区101发射和/或接收光信号。也即，第一显示区101是位于感光器件103上方的区域，在本申请实施例中上方是指由显示设备的背壳指向显示屏的方向，下方是指由显示屏指向背壳的方向。其中，感光器件103可以为摄像头，感光器件103还可以为环境光传感器、光学距离传感器(例如，红外传感器、激光传感器、接近传感器、距离传感器，光学距离传感器)、结构光模组、飞行时间测距(Time offlight，TOF)镜头模组、光学指纹传感器等。需要说明的是，上述多种感光器件103仅用于示例性说明，而不用于具体限定本申请的保护范围。为了便于说明，本申请实施例中以感光器件103为摄像头为例进行说明。
如图2所示，显示面板的第一显示区101包括多个第一像素单元(图未示)，第二显示区102包括多个第二像素单元(图未示)。其中，多个第一像素单元和多个第二像素单元可阵列排布，该阵列具有行方向和列方向。其中，可以将行方向作为显示面板的第一方向，可以将列方向作为显示面板的第二方向。各第一像素单元、第二像素单元均可包括发光器件以 及与该发光器件连接并用于驱动发光器件发光的像素驱动电路。发光器件可以是但不限于有机发光二极管(Organic light-emitting diode，OLED)、量子点发光二极管(Quantum Dot Light Emitting Diodes，QLED)和微米级发光二极管(Micro LED)等。需要说明的是，本申请各实施例均以发光器件为有机发光二极管为例进行说明。其中，各发光器件可为不同颜色的有机发光二极管，如红色OLED、绿色OLED和蓝色OLED等，不同颜色的发光器件的像素驱动电路可以相同，但不同颜色的发光器件的发光层材料不同，从而实现不同颜色的显示，使得显示设备实现全彩显示。
在应用中，当显示设备是具有显示面板和屏下摄像头的设备时，第一显示区是位于摄像头上方的区域。为了便于说明，如图3所示，可以将位于第一显示区中的发光器件称之为第一发光器件110a，并将驱动第一发光器件110a的像素驱动电路称之为第一像素驱动电路120a。相应的，将位于第二显示区中的发光器件称之为第二发光器件，并将驱动第二发光器件的像素驱动电路称之为第二像素驱动电路。
请继续参考图2，为了使得第一显示区101和第二显示区102的像素密度(Pixels Per Inch，PPI)相同，例如，400PPI，一般会将第一像素驱动电路120a设置在第一显示区101的外围。其中，将第一像素驱动电路120a设置区域称之为过渡区104或外置区，位于过渡区104的第一像素驱动电路120a可通过金属走线L与第一发光器件110a电连接。具体的，金属走线L可以是透明金属线，例如，氧化铟锡(Indium Tin Oxide，ITO)金属线、氧化铝锌(Alumina zinc，AZO)金属线等。
由于不同第一发光器件110a的第一像素驱动电路120a在显示面板内所处的位置不同，会导致第一发光器件110a的金属走线L的长度不同，进而金属走线L上产生的RC负载(RC Loading)也即不同，例如，第一显示区101内RC负载从外向内逐渐变大，导致第一显示区101和第二显示区102的显示不均匀，严重降低了显示设备的显示效果。
为了解决上述问题，本申请实施例提供一种显示面板，可以实现对第一显示区101和第二显示区102的分区亮度调节。具体的，第一显示区101可基于脉冲宽度调制(Pulse Width Modulation，PWM)调光模式进行调节，该调节方式驱动电流大，可以提升第一显示区101的亮度，第二显示区102可根据目标亮度的大小来选择合适的调光模式(例如，PWM调光模式或直流调光模式)，来调节第二显示区102的亮度，可以避免第一显示区101的亮度偏低或者第二显示区102的亮度偏高的情况出现，以使第一显示区101的亮度与第二显示区102的亮度保持一致，进而可提高显示面板的显示效果。
请继续参考图4，在其中一个实施例中，显示面板包括显示区AA和围绕该显示区设置的非显示区NAA。显示面板还包括位于非显示区NAA的第一驱动电路130和第二驱动电路140。其中，第一驱动电路130分别与各所述第一像素单元连接，用于采用脉冲宽度调制调光模式驱动各所述第一像素单元发光。具体的，第一驱动电路130可以向第一像素驱动电路提供驱动信号，以控制第一像素驱动电路驱动与之连接的第一发光器件发光。其中，PWM调光模式是通过控制第一像素驱动电路中各晶体管开关信号的脉冲宽度实现调节亮度，PWM调光是通过改变发光阶段需开启的晶体管开关信号的脉冲数和脉冲宽度来控制发光时间，从而达到调节亮度的目的。
如图5所示，为了便于说明，以像素驱动电路为7T1C的驱动结构为例进行说明。其中，像素驱动电路包括驱动晶体管T1、数据写入晶体管T2、栅极复位晶体管T4、阳极复位晶体管T7、阈值补偿晶体管T3、第一发光控制晶体管T5、第二发光控制晶体管T6和存储电容C1。其中，数据写入晶体管T2的栅极、阈值补偿晶体管T3的栅极、阳极复位晶体管T7的栅极均用于接收第二扫描信号Scan(n)；数据写入晶体管T2的第一极与数据信号线连接，以接收数据信号Data，数据写入晶体管T2的第二极与驱动晶体管T1的第一极连接。栅极复位晶体管T4的栅极用于接收第一扫描信号Scan(n-1)。
在PWM调光模式下，数据信号线所提供的数据信号Data不变，在扫描信号线提供的第二扫描信号Scan(n)在开启时间段内，数据写入晶体管T2导通，使数据信号Data传递至驱动 晶体管T1，并控制驱动晶体管T1开启，电源电压端所提供的电源电压VDD保持不变。在此过程中，所有发光器件110的驱动晶体管T1的开启程度都是相同的，因此，只需调节施加于第二发光控制晶体管T6的栅极的发光控制信号EM的占空比，来改变发光器件110在每一帧的发光时间，就可以调节发光器件110的亮度。其中，EM信号为PWM信号。PWM信号是根据像素的亮度需求所提供的具有一定频率和占空比的交流信号，由于PWM信号的频率远高于人眼分辨能力，因而在视觉效果上，该像素的亮度会随着PWM信号占空比的改变而改变。
需要说明的是，本申请实施例中的像素驱动电路不限于上述“7T1C”的像素结构，还可以包括多种，例如“2T1C”、“3T1C”、“6T1C”、“6T2C”、“7T2C”或“8T1C”等结构。
第二驱动电路140，分别与各所述第二像素单元连接，用于根据所述显示面板的目标亮度采用PWM调光模式和直流(Direct Current，DC)调光模式的一种驱动所述第二显示区102中的各像素单元发光。具体的，第二驱动电路140可以向第二像素驱动电路提供驱动信号，以控制第二像素驱动电路驱动与之连接的第二发光器件发光。
请继续参考图5，发光器件110的电流的表达式为：
I oled＝k(VDD-V DATA) 2
式中，I oled为发光器件的电流，k为系数。由公式可知，电源电压VDD及数据信号Data的电压V DATA对发光器件的电流起决定性作用。在直流调光模式的过程中，可保持电源电压VDD不变，通过调节数据信号Data的电压V DATA即可调节发光器件的电流，从而实现亮度调节。在扫描各行的像素单元时，数据信号Data需要根据每一像素单元需要的亮度进行电压幅值的变化。示例性的，如果要调高亮度，则减小数据信号Data的电压V DATA；如果要调低亮度，则增大数据信号Data的电压V DATA。
具体的，显示面板可预先构建并存储目标亮度与预设调光模式的对应关系。示例性的，当目标亮度为L1时，则可对应采用PWM调光模式对第二显示区102的各像素单元进行调光，当目标亮度为L2时，则可对应采用直流调光模式对第二显示区102的各像素单元进行调光。
本申请实施例提供的显示面板，包括第一显示区101、第二显示区102、第一驱动电路130和第二驱动电路140。其中，第一驱动电路130可采用PWM调光模式驱动第一显示区101的各所述第一像素单元发光；第二驱动电路140可根据所述显示面板的目标亮度采用所述PWM调光模式和直流调光模式中的一种驱动第二显示区102的各所述第二像素单元发光，因此，可以实现对第一显示区101和第二显示区102的分区亮度调节，另外，第一驱动电路130可以采用PWM调光模式对第一显示区101的各第一像素单元进行调光，其驱动电流大，可以提升第一显示区101的亮度；第二驱动电路140可以采用适用于当前显示面板的目标亮度的PWM调光模式或直流调光模式，可以提高对第二显示区102中各第二像素单元的调光灵活性，也可消除主副屏的亮度差，又可保证第二显示区102的护眼效果。
在其中一个实施例中，当所述目标亮度小于第一阈值，所述第二驱动电路140采用所述PWM调光模式驱动所述第二显示区102的各像素单元发光；当所述目标亮度大于第二阈值， 所述第二驱动电路140采用直流调光模式驱动所述第二显示区102的各像素单元发光，其中，所述第一阈值小于或等于所述第二阈值。在本申请实施例中，对第一阈值和第二阈值的大小不做进一步的限定，可以根据实际需求来设定。
在本申请实施例中，针对第一显示区101，第一驱动电路130均可采用PWM调光模式对各像素单元进行调光，针对第二显示区102，第二驱动电路140可根据目标亮度才PWM调光模式或DC调光模式中的一种来对各第二像素单元进行调光。示例性的，如表1所示，针对第二显示区102，若目标亮度为高亮度则使用DC调光模式，若目标亮度为低亮度，则使用PWM调光模式。
表1为不同第一显示区、第二显示区中不同目标亮度对应的调光模式
目标亮度 500nit 100nit 10nit 2nit
第一显示区 PWM3 PWM4 PWM5 PWM2
第二显示区 DC1 DC2 PWM1 PWM2
在其中一个实施例中，显示面板还分区对应存储有目标亮度与调光模式的调光参数的对应关系。示例性的，针对第一显示区101，可以预先存储目标亮度与调光参数PWM3的映射关系。若目标亮度为100nit，则第一驱动电路130输出发光控制信号EM为PWM4的信号。针对第二显示区102，可以预先存储目标亮度分别与调光参数PWM3、调光参数V_DATA的映射关系，若目标亮度为100nit，则第二驱动电路140输出发光控制信号EM，并同时调整调光参数V_DATA，以对应与DC2调光模。
在本申请实施例中，通过设置第一驱动电路130和第二驱动电路140分别来对第一显示区101和第二显示区102的各像素单元进行调光。具体的，第一驱动电路130使用驱动能力强的PWM调光模式进行全亮度调光，驱动电流大，提升了第一显示区101的亮度，第二驱动电路140可在目标亮度为高亮度时，采用DC调光模式进行调光，可以启动护眼效果，同时还可以避免出现滚屏的缺陷，可以进一步提高显示质量。在目标亮度为低亮度时，采用PWM调光模式进行调光，可以避免因晶体管的特性差异较大而产生的显示面板的行方向亮度不均匀现象的发生，另外，通过采用第一驱动电路130和第二驱动电路140分别对第一显示区101和第二显示区102进行调光，可以消除第一显示区101第二显示区102整体上的亮度差异，以使第一显示区101的亮度与第二显示区102的亮度保持一致，进而可提高显示面板的显示效果。
请继续参考图4，在其中一个实施例中，显示面板还包括位于非显示区NAA的显示驱动单元150。该显示驱动单元150可以为显示驱动芯片(Display Driver IC，DDIC)。具体的，该显示驱动单元150板被配置有第一组驱动端和第二组驱动端(图中未示出)。其中，第一组驱动端可用于输出第一组驱动信号。具体的，第一组驱动端均可包括第一扫描触发信号端、第一发光触发信号端。第一组驱动信号可包括由第一扫描触发信号端输出的第一扫描触发信号以及由第一发光触发信号端输出的第一发光触发信号。进一步的，第一组驱动信号还可以包括多个第一时钟端输出的多个第一时钟信号。相应的，第二组驱动端可用于输出第二组驱动信号。其中，第二组驱动信号可包括由第二扫描触发信号端输出的第二扫描触发信号以及由第二发光触发信号端输出的第二发光触发信号。进一步的，第二组驱动信号还可包括由多个第二时钟端输出的多个第二时钟信号。
具体的，第一驱动电路130与显示驱动单元150的第一组驱动端连接，可根据第一组驱动端输出的第一组驱动信号驱动与第一驱动电路130连接的各第一像素单元发光。相应的，第二驱动电路140与显示驱动单元150的第二组驱动端连接，可根据第二组驱动端输出的第二组驱动信号驱动与第二驱动电路140连接的各第二像素单元发光。需要说明的是，虽然图4中未示出显示驱动单元150分别与第一驱动电路130、第二驱动电路140的连接关系，但不表示显示驱动单元150没有分别与第一驱动电路130、第二驱动电路140连接。
在其中一个实施例中，第一扫描触发信号与第二扫描触发信号相同，第一发光触发信号 与第二发光触发信号不同。也即，第一驱动电路130和第二驱动电路140可共用一套扫描触发信号，但是第一驱动电路130和第二驱动的发光触发信号彼此独立，不共用，以实现对第一显示区101和第二显示区102的分立式驱动发光。
在其中一个实施例中，第一扫描触发信号与第二扫描触发信号不同，第一发光触发信号与第二发光触发信号不同。也即，第一驱动电路130和第二驱动电路140的扫描触发信号、发光触发信号均彼此独立，不共用，以实现对第一显示区101和第二显示区102的分立式驱动发光。
如图6和图7所示，在其中一个实施例中，所述第一显示区101的多个第二像素单元被划分为第一像素块101a和第二像素块101b。第一像素块101a和第二像素块101b沿显示面板的第一方向排布，且呈轴对称设置，该对称轴的方向与第二方向相同，其中，第一方向与第二方向垂直。在本申请实施例中，可以将第一方向理解为行方向，将第二方向理解为列方向。
所述显示面板还包括：设置在所述第一像素块101a的多条第一栅极线111和多条第一发光控制线112，以及设置在所述第二像素块101b的多条第二栅极线113和多条第二发光控制线114。具体的，第一栅极线111与第一像素块101a中的同一像素行的各第一像素单元连接；第二栅极线113与第二像素块101b中的同一像素行的各第一像素单元连接。第一发光控制线112与第一像素块101a中至少一像素行的各第一像素单元连接；第二发光控制线114与第二像素块101b中至少一像素行的各第一像素单元连接。
其中，所述第一驱动电路可以理解为阵列基板栅极驱动(Gate Driver on Array，GOA)电路，也可以称之为GOA电路。所述第一驱动电路130包括多个级联的第一栅极驱动单元131、多个级联的第二栅极驱动单元132、多个级联的第一发光控制单元133、多个级联的第二发光控制单元134。其中，第一驱动电路130中的每个栅极驱动单元均包括第一栅输入端、第一栅输出端，其中，第一栅输出端用于输出第一扫描信号。第一驱动电路130中的每个发光控制单元均包括第一发光输入端、第一发光输出端，第一发光输出端用于输出第一发光控制信号。
第一级第一栅极驱动单元131的第一栅输入端与第一扫描触发信号端电连接，每相邻两级第一栅极驱动单元131中，下一级第一栅极驱动单元131的第一栅输入端与上一级第一栅极驱动单元131的第一栅输出端电连接。其中，所述第一栅极驱动单元131用于根据所述第一扫描触发信号采用单边驱动方式对第一栅极线111进行驱动。也即，每一级第一栅极驱动单元131的第一栅输出端对应与一个第一栅极线111连接，以根据第一描述触发信号向与之连接的第一栅极线111发送第一扫描信号Scan(n)，以实现对第一栅极线111的单行单边驱动。
第一级第二栅极驱动单元132的第一栅输入端与第一扫描触发信号端电连接，每相邻两级第二栅极驱动单元132中，下一级第二栅极驱动单元132的第一栅输入端与上一级第二栅极驱动单元132的第一栅输出端电连接。其中，所述第二栅极驱动单元132用于根据所述第一扫描触发信号采用单边驱动方式对第二栅极线113进行驱动。也即，每一级第二栅极驱动单元132的第一栅输出端对应与一个第二栅极线113连接，以根据第一描述触发信号向与之连接的第二栅极线113发送第一扫描信号Scan(n)，以实现对第二栅极线113的单行单边驱动。
第一级第一发光控制单元133的第一发光输入端与第一发光触发信号端电连接，每相邻两级第一发光控制单元133中，下一级第一发光控制单元133的第一发光输入端与上一级第一发光控制单元133的第一发光输出端电连接。其中，所述第一栅极驱动单元131用于根据所述第一扫描触发信号采用单边驱动方式对第一栅极线111进行驱动。也即，每一级第一发光控制单元133的第一发光输出端对应与一个第一发光控制线112连接，以根据第一发光触发信号向与之连接的第一发光控制线112发送第一发光控制信号，以实现对第一发光控制线112的单边驱动。
第一级第二发光控制单元134的第一发光输入端与第一发光触发信号端电连接，每相邻两级第二发光控制单元134中，下一级第二发光控制单元134的第一发光输入端与上一级第二发光控制单元134的第一发光输出端电连接。其中，每一级第二发光控制单元134的第一发光输出端对应与一个第二发光控制线114连接，以根据第一发光触发信号向与之连接的第二发光控制线114发送第一发光控制信号，以实现对第一发光控制线112的单边驱动。
在本申请实施例中，由于第一显示区101的第一像素单元的数量较少，第一驱动电路130可以采用单边驱动的方式对各栅极线和发光控制线进行驱动，可以满足驱动要求，另外，还可以避免在第一显示区101设置用于连接第一栅极驱动单元131、第二栅极驱动单元132的栅极连接线，可以降低第一显示区101的边框宽度，进而可以提高第一显示区101的屏占比。
在其中一个实施例中，当第一发光控制线112与第一像素块101a中相邻两行的各第一像素单元连接，第二发光控制线114与第二像素块101b中相邻两行的各第一像素单元连接时，其第一驱动电路130可以采用双行单边驱动方式对第一发光控制线112进行驱动，以及采用双行单边驱动方式对第二发光控制线114进行驱动。由于第一显示区101的第一像素单元的数量较少，通过双行单边驱动方式，可以满足其驱动要求，并且可以提供驱动效率。
在其中一个实施例中，位于同一行的第一栅极驱动单元131和第二栅极驱动单元132的第一栅输出端也可以是彼此连通的，也即，位于同一行的第一栅极线111和第二栅极线113连接。因此，位于同一行的第一栅极线111和第二栅极线113可由第一栅极驱动单元131和第二栅极驱动单元132共同驱动，以实现对第一栅极线111、第二栅极线113的双边驱动。相应的，位于同一行的第一发光控制单元133和第二发光控制单元134的第一发光输出端也可以是彼此连通的，也即，位于同一行的第一发光控制线112和第二发光控制线114连接，以实现对第一发光控制线112、第二发光控制线114的双边驱动。
如图8所示，在其中一个实施例中，所述第二显示区包括第一子显示区102a和第二子显示区102b，其中，所述第一子显示区102a位于所述第一显示区101的至少一侧，且所述第一子显示区102a、第一显示区101沿所述显示面板的第一方向排布。也就是说，位于第一显示区101的至少一个第一像素单元和位于第一子显示区102a的至少一个第二像素单元排布在第一方向上位于在同一直线。可选的，第一子显示区102a还可以位于第一显示区101的两侧，或，第一子显示区102a还可以围绕第一显示区101设置。在本申请实施例中，对第一子显示区102a的具体区域不做限定。
具体的，第二驱动电路可包括第一子驱动电路和第二子驱动电路。其中，第一子驱动电路，分别与所述第二组驱动端、所述第一子显示区102a的各所述第二像素单元连接，用于根据所述第二组驱动信号驱动所述第一子显示区102a的各所述第二像素单元发光。第二子驱动电路分别与所述第二组驱动端、所述第二子显示区102b的各所述第二像素单元连接，用于根据所述第二组驱动信号驱动所述第二子显示区102b的各所述第二像素单元发光。需要说明是，在本申请实施例中，第一子驱动电路和第二子驱动电路接收的第二组驱动信号相同。
具体的，第一子驱动电路和第二子驱动电路的驱动方式可以相同，也可以不同。示例性的，第一子驱动电路可以以单边驱动方式驱动设置在第一子显示区102a的各驱动线(例如，栅极线、发光控制线)，第二子驱动电路可以以双边驱动方式驱动设置在第二子显示区102b的各驱动线(例如，栅极线、发光控制线)。
请继续参考图8，在其中一个实施例中，所述第一子显示区102a的多个第二像素单元被划分为第三像素块1021和第四像素块1022。其中，所述第三像素块1021、第一像素块101a、第二像素块101b、第四像素块1022沿所述显示面板的第一方向(也即，行方向)排列。具体的，第三像素块1021和第四像素块1022可对称分布在第一显示区101的两侧。其中，所述显示面板还包括：设置在所述第三像素块1021的多条第三栅极线115和多条第三发光控制线116，以及设置在所述第四像素块1022的多条第四栅极线117和多条第四发光控制线118。具体的，第三栅极线115与第三像素块1021中的同一像素行的各第二像素单元连接；第四栅极线117与第四像素块1022中的同一像素行的各第二像素单元连接。第三发光控制线116与 第三像素块1021中至少一像素行的各第二像素单元连接；第四发光控制线118与第四像素块1022中至少一像素行的各第二像素单元连接。
所述第一子驱动电路包括多个级联的第三栅极驱动单元141、多个级联的第四栅极驱动单元142、多个级联的第三发光控制单元143、多个级联的第四发光控制单元144。其中，第一子驱动电路中的每个栅极驱动单元均包括第二栅输入端、第二栅输出端，其中，第二栅输出端用于输出第二扫描信号。第一子驱动电路中的每个发光控制单元均包括第二发光输入端、第二发光输出端，第二发光输出端用于输出第二发光控制信号。
第一级第三栅极驱动单元141的第二栅输入端与第二扫描触发信号端电连接，每相邻两级第一栅极驱动单元131中，下一级第三栅极驱动单元141的第二栅输入端与上一级第三栅极驱动单元141的第二栅输出端电连接。其中，所述第三栅极驱动单元141可根据所述第二扫描触发信号采用单边驱动方式对第三栅极线115进行驱动。
第一级第四栅极驱动单元142的第二栅输入端与第二扫描触发信号端电连接，每相邻两级第四栅极驱动单元142中，下一级第四栅极驱动单元142的第二栅输入端与上一级第四栅极驱动单元142的第二栅输出端电连接。其中，所述第四栅极驱动单元142可根据所述第二扫描触发信号采用单边驱动方式对第四栅极线117进行驱动。
第一级第三发光控制单元143的第二发光输入端与第二发光触发信号端电连接，每相邻两级第三发光控制单元143中，下一级第三发光控制单元143的第二发光输入端与上一级第三发光控制单元143的第二发光输出端电连接。其中，所述第三栅极驱动单元141可根据所述第二扫描触发信号采用单边驱动方式对第三栅极线115进行驱动。
第一级第四发光控制单元144的第二发光输入端与第二发光触发信号端电连接，每相邻两级第四发光控制单元144中，下一级第四发光控制单元144的第二发光输入端与上一级第四发光控制单元144的第二发光输出端电连接。其中，所述第四栅极驱动单元142可根据所述第二扫描触发信号采用单边驱动方式对第四栅极线117进行驱动。
具体的，当第三发光控制线116与第二像素块101b中相邻两行的各第二像素单元连接；第四发光控制线118与第二像素块101b中至相邻两行的各第二像素单元连接时，其第一子驱动电路可以采用双行单边驱动方式对第三发光控制线116进行驱动，以及采用双行单边驱动方式对第四发光控制线118进行驱动。
在其中一个实施例中，位于同一行的第三栅极驱动单元141和第四栅极驱动单元142的第二栅输出端也可以是彼此连通的，也即，位于同一行的第三栅极线115和第四栅极线117连接。因此，位于同一行的第三栅极线115和第四栅极线117可由第三栅极驱动单元141和第四栅极驱动单元142共同驱动，以实现对第三栅极线115和第四栅极线117的双边驱动。相应的，位于同一行的第三发光控制单元143和第四发光控制单元144的第二发光输出端也可以是彼此连通的，也即，位于同一行的第三发光控制线116和第四发光控制线118连接，以实现对第三发光控制线116和第四发光控制线118的双边驱动。
请继续参考8，在其中一个实施例中，所述显示面板还包括：设置在所述第二子显示区102b的多条第五栅极线1191和多条第五发光控制线1192。其中，第五栅极线1191与第二子显示区102b中的同一像素行的各第二像素单元连接；第五发光控制线1192与第二子显示区102b中至少一像素行的各第二像素单元连接。
具体的，所述第二子驱动电路包括多个级联的第五栅极驱动单元145、多个级联的第五发光控制单元146。其中，第五栅极驱动单元145对称分布第二子显示区102b的两侧，第五发光控制单元146也对称分布在第二子显示区102b的两侧。具体的，第一级第五栅极驱动单元145的第二栅输入端与第二扫描触发信号端电连接，每相邻两级第五栅极驱动单元145中，下一级第五栅极驱动单元145的第二栅输入端与上一级第五栅极驱动单元145的第二栅输出端电连接。其中，第五栅极线1191与位于同一行的两个第五栅极驱动单元145是连通的，因此，第二子驱动电路可采用双边驱动方式对所述第五发光控制线1192进行驱动。
可选的，当第五发光控制线1192与第二子显示区102b中相邻两行的各第二像素单元连 接时，其第二子驱动电路可以采用双行双边驱动方式对第五发光控制线1192进行驱动，提高了第二像素单元个数较多的第二子显示区102b的栅极驱动能力和发光控制驱动能力，提高了第二子显示区102b的响应速度以及均一性。
如图9所示，为了便于说明，以如图5所示的像素驱动电路驱动第一显示区的第a行的第一像素单元和第一子显示区的第二行的第二像素单元为例，阐述其实现第一显示区和第二显示区相同的亮度(例如，100nit)的工作原理。其中，输入至第一显示区的第一扫描信号可用Scan(a)表示，输入至第一显示区的第二扫描信号可用Scan(b)表示；输入至第二显示区的第一扫描信号可用Scan(1)表示，输入至第二显示区的第二扫描信号可用Scan(2)表示。
在T1时刻的复位阶段，输入至栅极复位晶体管T4的第一扫描信号Scan(a)、Scan(1)同时拉低，栅极复位晶体管T4导通，进而使得第一像素驱动电路和第二像素驱动电路中的栅极晶体管进行复位。
在T2时刻的充电阶段，输入至数据写入晶体管T2的第二扫描信号Scan(b)、Scan(2)同时拉低，数据写入晶体管T2导通，可对第一像素驱动电路和第二像素驱动电路的数据写入晶体管T2进行充电。其中，可以将第一像素驱动电路的第一数据信号Data和第二像素驱动电路中的第二数据信号Data设置为不同，进而可以实现第一显示区101和第二显示区102下区显示相同的亮度。具体的，数据信号Data的数据电压Vdata与发光控制信号的占空比有关。
在T3时刻的发光阶段，第一驱动电路130可采用PWM调光模式，对应输出对应目标亮度为100nit的第一发光控制信号EM(a)对第一显示区的各第一像素单元调光，其中第一发光控制信号EM(a)为PWM信号；第二驱动电路140可采用DC调光模式对应输出第二发光控制信号EM(1)对第二显示区102的各第二像素单元调光，并使将第二数据信号的数据电压Vdata调节至对应目标亮度为100nit的电压。
如图10所示，在其中一个实施例中，非显示区NAA包括依次连接的第一区域151、第二区域152、第三区域153和第四区域154。其中，第一区域151、第三区域153平行设置，第二区域152、第四区域154平行设置，且第二区域152分别与第一区域151、第三区域153连接。其中，所述第一驱动电路130设置于靠近所述第一显示区101的所述第一区域151。也即，若第一显示区101靠近显示面板的上边框，则第一区域151可以理解为位于显示区AA上侧的区域，若第一显示区101靠近显示面板的右边框，则第一区域151可以理解为位于显示区AA右侧的区域，若第一显示区101靠近显示面板的左边框，则第一区域151可以理解为位于显示区AA左侧的区域，若第一显示区101靠近显示面板的下边框，则第一区域151可以理解为位于显示区AA下侧的区域。
为了便于说明，以第一显示区101靠近显示面板的上边框，显示区AA为矩形区域为例进行说明。其中，非显示区NAA包括分别位于显示区AA上侧、下侧、左侧、右侧的第一区域151、第三区域153、第四区域154和第二区域152。其中，第一驱动电路130可设置在第一区域151，所述第二驱动电路140对称分布于所述第二区域152和第四区域154。具体的，第一子驱动电路对称设置在第二区域152、第四区域154。示例性的，第三栅极驱动单元141、第三发光控制单元143设置在第四区域154，第四栅极驱动单元142、第四发光控制单元144设置在第二区域152。第二子驱动电路也对称设置在第二区域152、第四区域154。示例性的，第五栅极驱动单元145对称分布在第二区域152、第四区域154，第五发光控制单元146也对称分布在第二区域152、第四区域154。
在本申请实施例中，将第一驱动电路130设置于靠近所述第一显示区101的所述第一区域151，可以节省第一驱动电路130中栅极线、发光控制线的走线距离，也可以简化显示面板的整体电路复杂性，还可以缩减左右边框，以实现窄边框的显示面板。
请继续参考图7，在其中一个实施例中，所述第一驱动电路130中的第一栅极驱动单元131、第二栅极驱动单元132位于靠近所述第一显示区101设置的所述第一区域151；所述第一驱动电路130中的第一发光控制单元133、第二发光控制单元134对称分布于所述第二区域152和第四区域154。具体的，第一发光控制单元133可设置于第四区域154，第二发光控 制单元134可设置于第二区域152，其中，第一发光控制单元133、第二发光控制单元134关于第一显示区101对称设置，也可以节省第一驱动电路130中栅极线、发光控制线的走线距离，也可以简化显示面板的整体电路复杂性，还可以缩减左右边框，以实现窄边框的显示面板。
需要说明的是，本申请实施例中的第一驱动电路130、第二驱动电路140位于非显示区的位置不限于上述举例说明，还可以根据实际需求做适应性调整。另外，位于第一显示区101和第二显示区102的各驱动线(例如，栅极线、发光控制线)的走线方式也可以根据第一驱动电路130、第二驱动电路140所在位置进行调整。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上实施例仅表达了本申请实施例的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请实施例构思的前提下，还可以做出若干变形和改进，这些都属于本申请实施例的保护范围。因此，本申请实施例专利的保护范围应以所附权利要求为准。

Claims (21)

  1. 一种显示面板，包括：
    第一显示区，包括多个第一像素单元，
    第二显示区，与所述第一显示区相邻设置，所述第二显示区包括多个第二像素单元，其中，所述第二像素单元的负载小于所述第一像素单元的负载；
    第一驱动电路，分别与各所述第一像素单元连接，用于采用脉冲宽度调制调光模式驱动各所述第一像素单元发光；
    第二驱动电路，分别与各所述第二像素单元连接，用于根据所述显示面板的目标亮度采用所述脉冲宽度调制调光模式和直流调光模式中的一种驱动各所述第二像素单元发光。
  2. 根据权利要求1所述的显示面板，其中，当所述目标亮度小于第一阈值，所述第二驱动电路采用所述脉冲宽度调制调光模式驱动各所述第二像素单元发光；当所述目标亮度大于第二阈值，所述第二驱动电路采用直流调光模式驱动各所述第二像素单元发光，其中，所述第一阈值小于或等于所述第二阈值。
  3. 根据权利要求1所述的显示面板，其中，还包括：
    显示驱动单元，被配置有第一组驱动端和第二组驱动端；其中，
    所述第一组驱动端与所述第一驱动电路连接，用于输出第一组驱动信号以控制所述第一驱动电路驱动各所述第一像素单元发光，其中，所述第一组驱动信号至少包括第一扫描触发信号和第一发光触发信号；
    所述第二组驱动端与所述第二驱动电路连接，用于输出第二组驱动信号以控制所述第二驱动电路驱动各所述第二像素单元发光；其中，所述第二组驱动信号至少包括第二扫描触发信号和第二发光触发信号；其中，所述第一发光触发信号和第二发光触发信号不同。
  4. 根据权利要求3所述的显示面板，其中，所述第一显示区的多个第二像素单元被划分为第一像素块和第二像素块，其中，所述显示面板还包括：设置在所述第一像素块的多条第一栅极线和多条第一发光控制线，以及设置在所述第二像素块的多条第二栅极线和多条第二发光控制线，其中，所述第一驱动电路包括：
    多个级联的第一栅极驱动单元，分别与多条所述第一栅极线一一对应连接，所述第一栅极驱动单元用于根据所述第一扫描触发信号采用单边驱动方式对第一栅极线进行驱动；
    多个级联的第二栅极驱动单元，分别与多条所述第二栅极线一一对应连接，所述第二栅极驱动单元用于根据所述第一扫描触发信号采用单边驱动的方式对第二栅极线进行驱动；
    多个级联的第一发光控制单元，所述第一发光控制单元根据所述第一发光触发信号采用单边驱动的方式对第一发光控制线进行驱动；
    多个级联的第二发光控制单元，所述第二发光控制单元用于根据所述第一发光触发信号采用单边驱动的方式对第二发光控制线进行驱动。
  5. 根据权利要求4所述的显示面板，其中，各所述第一发光控制单元分别对应与两条所述第一发光控制线连接，各所述第二发光控制单元分别对应与两条所述第二发光控制线连接。
  6. 根据权利要求4所述的显示面板，其中，位于同一行的所述第一栅极线和所述第二栅极线连接，由所述第一栅极驱动单元和所述第二栅极驱动单元共同驱动。
  7. 根据权利要求4所述的显示面板，其中，位于同一行的所述第一发光控制线和所述第二发光控制线连接，以实现对所述第一发光控制线、所述第二发光控制线的双边驱动。
  8. 根据权利要求3所述的显示面板，其中，所述第二显示区包括第一子显示区和第二子显示区，其中，所述第一子显示区位于所述第一显示区的至少一侧，且所述第一子显示、第一显示区沿第一方向排布；其中，所述第二驱动电路包括：
    第一子驱动电路，分别与所述第二组驱动端、所述第一子显示区的各所述第二像素单 元连接，用于根据所述第二组驱动信号驱动所述第一子显示区的各所述第二像素单元发光；
    第二子驱动电路，分别与所述第二组驱动端、所述第二子显示区的各所述第二像素单元连接，用于根据所述第二组驱动信号驱动所述第二子显示区的各所述第二像素单元发光。
  9. 根据权利要求8所述的显示面板，其中，所述第一子显示区的多个第二像素单元被划分为第三像素块和第四像素块，其中，所述第三像素块、第一像素块、第二像素块、第四像素块沿所述显示面板的第一方向排列；其中，所述显示面板还包括：设置在所述第三像素块的多条第三栅极线和多条第三发光控制线，以及设置在所述第四像素块的多条第四栅极线和多条第四发光控制线，其中，所述第一子驱动电路包括：
    多个级联的第三栅极驱动单元，分别与多条所述第三栅极线一一对应连接，所述第三栅极驱动单元用于根据所述第二扫描触发信号采用单边驱动方式对第三栅极线进行驱动；
    多个级联的第四栅极驱动单元，分别与多条所述第四栅极线一一对应连接，所述第四栅极驱动单元用于根据所述第二扫描触发信号采用单边驱动的方式对第四栅极线进行驱动；
    多个级联的第三发光控制单元，所述第三发光控制单元根据所述第一发光触发信号采用单边驱动的方式对第三发光控制线进行驱动；
    多个级联的第四发光控制单元，所述第四发光控制单元用于根据所述第一发光触发信号采用单边驱动的方式对第四发光控制线进行驱动。
  10. 根据权利要求9所述的显示面板，其中，各所述第三发光控制单元分别对应与两条所述第三发光控制线连接，各所述第四发光控制单元分别对应与两条所述第四发光控制线连接。
  11. 根据权利要求9所述的显示面板，其中，所述显示面板还包括：设置在所述第二子显示区的多条第五栅极线和多条第五发光控制线，其中，所述第二子驱动电路采用双边驱动方式对所述第五栅极线进行驱动，所述第二子驱动电路采用双边驱动方式对所述第五发光控制线进行驱动。
  12. 根据权利要求11所述的显示面板，其中，所述第五栅极线与位于同一行的两个所述第五栅极驱动单元电连接，所述第二子驱动电路采用双边驱动方式对所述第五发光控制线进行驱动。
  13. 根据权利要求11所述的显示面板，其中，所述第五发光控制线与所述第二子显示区中相邻两行的各所述第二像素单元连接，所述第二子驱动电路采用双行双边驱动方式对所述第五发光控制线进行驱动。
  14. 根据权利要求9所述的显示面板，其中，位于同一行的所述第三栅极线和所述第四栅极线连接，由所述第三栅极驱动单元和所述第四栅极驱动单元共同驱动。
  15. 根据权利要求9所述的显示面板，其中，位于同一行的所述第三发光控制线和所述第四发光控制线连接，以实现对所述第三发光控制线、所述第四发光控制线的双边驱动。
  16. 根据权利要求3所述的显示面板，其中，所述第一扫描触发信号与所述第二扫描触发信号相同。
  17. 根据权利要求1所述的显示面板，其中，所述显示面板还包括围绕所述第二显示区设置的非显示区，其中，所述非显示区包括依次连接的第一区域、第二区域、第三区域和第四区域，所述第一区域和所述第三区域平行设置，其中，所述第二驱动电路对称分布于所述第二区域和第四区域。
  18. 根据权利要求17所述的显示面板，其中，所述第一驱动电路设置于靠近所述第一显示区的所述第一区域。
  19. 根据权利要求17所述的显示面板，其中，所述第一驱动电路中的第一栅极驱动单 元、第二栅极驱动单元位于靠近所述第一显示区设置的所述第一区域；
    所述第一驱动电路中的第一发光控制单元位于所述第二区域，所述第一驱动电路中的第二发光控制单元位于所述第四区域，且所述第一发光单元和第二发光单元关于所述第一显示区对称设置。
  20. 一种显示设备，包括：感光器件和如权利要求1-19任一项所述的显示面板；其中，所述感光器件至少部分与所述第一显示区对应设置。
  21. 根据权利要求20所述的显示设备，其中，所述感光器件为摄像头。
PCT/CN2022/085019 2021-05-28 2022-04-02 显示面板和显示设备 WO2022247467A1 (zh)

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