WO2022247134A1 - 显示装置及显示基板 - Google Patents

显示装置及显示基板 Download PDF

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Publication number
WO2022247134A1
WO2022247134A1 PCT/CN2021/126796 CN2021126796W WO2022247134A1 WO 2022247134 A1 WO2022247134 A1 WO 2022247134A1 CN 2021126796 W CN2021126796 W CN 2021126796W WO 2022247134 A1 WO2022247134 A1 WO 2022247134A1
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Prior art keywords
pixel
sub
heat
substrate
display substrate
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PCT/CN2021/126796
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English (en)
French (fr)
Inventor
黄兴
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to US17/914,957 priority Critical patent/US20240251535A1/en
Publication of WO2022247134A1 publication Critical patent/WO2022247134A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8794—Arrangements for heating and cooling
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H05K7/20954—Modifications to facilitate cooling, ventilating, or heating for display panels
    • H05K7/20963—Heat transfer by conduction from internal heat source to heat radiating structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display device and a display substrate.
  • on-board displays are not just simple monochrome displays, but are developing in the direction of full-color, large-size, and diversified.
  • the vehicle-mounted display device can display driving data information, navigation maps, Internet information, audio-visual entertainment information, etc., thereby improving user experience.
  • the existing vehicle-mounted display device is prone to the problem of white balance shift.
  • the purpose of the present disclosure is to provide a display device and a display substrate, which can solve the problem of white balance shift caused by the large difference in brightness decay speed of each sub-pixel.
  • a display substrate comprising:
  • a plurality of pixel units are arranged on one side of the substrate, the pixel units include a plurality of sub-pixels, the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, and the brightness of the first sub-pixel is attenuated The speed is less than the brightness decay speed of the second sub-pixel;
  • the heat compensation structure is used to provide heat, and the heat provided by the heat compensation structure to the first sub-pixel is greater than the heat provided by the heat compensation structure to the second sub-pixel, and the heat compensation structure provides heat to the The heat provided by the second sub-pixel is greater than or equal to zero.
  • the pixel unit further includes a third sub-pixel, the brightness decay speed of the second sub-pixel is smaller than the brightness decay speed of the third sub-pixel, and the thermal compensation structure provides the second sub-pixel
  • the heat is greater than the heat provided by the thermal compensation structure to the third sub-pixel, and the heat provided by the thermal compensation structure to the third sub-pixel is greater than or equal to zero.
  • the first sub-pixel is a blue sub-pixel
  • the second sub-pixel is a red sub-pixel
  • the third sub-pixel is a green sub-pixel.
  • the display substrate includes:
  • the driving circuit layer is arranged on one side of the substrate and includes a plurality of driving transistors electrically connected to the plurality of sub-pixels in one-to-one correspondence, and the thermal compensation structure is composed of the driving transistors.
  • the plurality of drive transistors include a first drive transistor, a second drive transistor, and a third drive transistor whose calorific value is successively reduced, and the orthographic projection of the first drive transistor on the substrate is located at the first The sub-pixel is within the area of the orthographic projection on the substrate; the orthographic projection of the second drive transistor on the substrate is located within the area of the orthographic projection of the second sub-pixel on the substrate; the The orthographic projection of the third driving transistor on the substrate is located in an orthographic projection area of the third sub-pixel on the substrate.
  • the plurality of drive transistors include a first drive transistor, a second drive transistor, and a third drive transistor whose calorific value is sequentially reduced, and the first drive transistor and the third drive transistor are on the substrate.
  • the orthographic projections are located in the orthographic projection area of the first sub-pixel on the substrate; the orthographic projection of the second drive transistor on the substrate is located in the second sub-pixel on the substrate in the orthographic projection area of .
  • the plurality of drive transistors include a first drive transistor, a second drive transistor, and a third drive transistor whose calorific value is successively reduced, and the orthographic projection of the first drive transistor on the substrate is located at the first The orthographic projection area of the sub-pixel on the substrate; the orthographic projections of the second drive transistor and the third drive transistor on the substrate are both located on the substrate of the second sub-pixel in the orthographic projection area of .
  • one or more of the sub-pixels is surrounded by a first heat insulation structure.
  • the display substrate includes:
  • the pixel definition layer is arranged on one side of the substrate and has a plurality of openings, and a plurality of the sub-pixels are arranged in the plurality of openings in a one-to-one correspondence;
  • thermal insulation medium at least one sidewall of the opening of the pixel definition layer is doped with the thermal insulation medium to form the first thermal insulation structure, and the thermal conductivity of the thermal insulation medium is smaller than that of the material of the pixel definition layer of thermal conductivity.
  • thermal insulation medium is uniformly doped in the pixel definition layer.
  • the sidewall of the opening provided with the first sub-pixel is doped with the heat insulating medium.
  • the sidewall of the opening provided with the second subpixel is doped with the heat insulating medium, and the doping concentration of the sidewall of the opening provided with the first subpixel is higher than that of the opening provided with the second subpixel.
  • the doping concentration of the sidewall of the opening of the second sub-pixel is higher than that of the opening provided with the second subpixel.
  • the pixel unit further includes a third sub-pixel, the brightness decay speed of the second sub-pixel is lower than the brightness decay speed of the third sub-pixel, and the side of the opening of the third sub-pixel is provided
  • the wall is doped with the heat insulating medium, and the doping concentration of the sidewall of the opening provided with the second subpixel is higher than the doping concentration of the sidewall of the opening provided with the third subpixel.
  • the display substrate also includes:
  • a planarization layer arranged on one side of the substrate, the pixel definition layer and the plurality of sub-pixels are all arranged on the surface of the planarization layer facing away from the substrate; part of the planarization layer
  • the heat insulation medium is doped in a region to form a second heat insulation structure, and the second heat insulation structure is a cylindrical structure; among the plurality of sub-pixels, there are one or more of the sub-pixels in the planarization layer
  • the outer periphery of the above orthographic projection is surrounded by the second heat insulation structure.
  • the thermal insulation medium is nanoparticles.
  • the diameter of the nanoparticles is 10nm-200nm.
  • the heat insulating medium is an inorganic material.
  • the heat insulating medium is silicon oxide or aluminum oxide.
  • the mass fraction of the heat insulating medium is 0.5%-5%.
  • a display device including the above-mentioned display substrate.
  • the heat provided by the thermal compensation structure to the first sub-pixel is greater than the heat provided by the thermal compensation structure to the second sub-pixel, which can accelerate the brightness decay speed of the first sub-pixel and make the first sub-pixel
  • the brightness attenuation speed is similar to the brightness attenuation speed of the second sub-pixel, which solves the problem of white balance shift caused by the large difference in the brightness attenuation speed of each sub-pixel.
  • FIG. 1 is a schematic diagram of a display substrate according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram of the planar layout of the display substrate shown in FIG. 1 .
  • FIG. 3 is another schematic diagram of a display substrate according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of the planar layout of the display substrate shown in FIG. 3 .
  • FIG. 5 is another schematic diagram of a display substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of the planar layout of the display substrate shown in FIG. 5 .
  • automotive OLED display panels are usually required to run tests at a high temperature of 85°C.
  • the offset of its white balance coordinates (W-CIEx, W-CIEy) compared to the initial value Cannot exceed ⁇ 0.01.
  • the life expectancy generally only considers the lifespan of red, green and blue sub-pixels at ambient temperature.
  • the lifespan of red, green and blue sub-pixels of existing vehicle-mounted OLED display panels is 950h, 450h, LT80 at 85°C, respectively.
  • the brightness of the mixed white light of the red, green, and blue sub-pixels attenuates
  • the corresponding time is 410h
  • the corresponding white point coordinate offsets W- ⁇ CIEx and W- ⁇ CIEy are -0.0006 and -0.0188, respectively. See Table 1 for details. It can be seen that the white balance offset is too large.
  • the brightness attenuation ratios of the red, green and blue sub-pixels are analyzed to be 88.4%, 76% and 90.4% respectively. It can be known that the white balance shift is too large because the brightness attenuation speeds of the blue sub-pixel, the red sub-pixel and the green sub-pixel increase sequentially.
  • the general idea to solve this problem is to adjust the light emitting areas of the light emitting regions where different sub-pixels are located, so as to adjust the luminance attenuation rates of different sub-pixels to be consistent.
  • this solution involves the design of a fine metal mask, netting, etc., and the change process is relatively complicated, and this solution cannot solve the problem of excessive decay of the luminance of the green sub-pixel.
  • the display substrate may include a substrate 1, a plurality of pixel units and a thermal compensation structure, wherein:
  • a plurality of pixel units are arranged on one side of the substrate 1, and each pixel unit includes a plurality of sub-pixels 6, and the plurality of sub-pixels 6 include a first sub-pixel 601 and a second sub-pixel 602, and the brightness decay speed of the first sub-pixel 601 is smaller than that of the first sub-pixel 601.
  • the thermal compensation structure is used to provide heat, and the heat provided by the thermal compensation structure to the first sub-pixel 601 is greater than the heat provided by the thermal compensation structure to the second sub-pixel 602 .
  • the heat provided by the thermal compensation structure to the second sub-pixel 602 is greater than or equal to zero.
  • the heat provided by the thermal compensation structure to the first sub-pixel 601 is greater than the heat provided by the thermal compensation structure to the second sub-pixel 602, which can accelerate the brightness decay speed of the first sub-pixel 601 and make the first sub-pixel
  • the brightness decay speed of the pixel 601 is similar to the brightness decay speed of the second sub-pixel 602, which solves the problem of white balance shift caused by the large difference in the brightness decay speed of each sub-pixel.
  • the substrate 1 may be a rigid substrate.
  • the rigid substrate may be a glass substrate or a PMMA (Polymethyl methacrylate, polymethyl methacrylate) substrate or the like.
  • the substrate 1 can also be a flexible substrate.
  • the flexible substrate can be PET (Polyethylene terephthalate, polyethylene terephthalate) substrate, PEN (Polyethylene naphthalate two formic acid glycol ester, polyethylene naphthalate) substrate or PI ( Polyimide, polyimide) substrate.
  • a display substrate may include a driving circuit layer.
  • the driving circuit layer is disposed on the substrate 1 .
  • the driving circuit layer may include a plurality of driving transistors 4 .
  • the driving transistor 4 may be a thin film transistor, but the embodiments of the present disclosure are not limited thereto.
  • the TFT may be a top-gate TFT, and of course, the TFT may also be a bottom-gate TFT. Taking the TFT as an example of a top-gate TFT, the driving transistor 4 may include an active layer 41 , a gate insulating layer, a gate electrode 42 , an interlayer insulating layer, a drain 43 and a source 44 .
  • the gate insulating layer and the interlayer insulating layer constitute the insulating layer 2 in FIG. 1 .
  • the active layer 41 can be disposed on the substrate 1 .
  • the gate insulating layer can be disposed on the substrate 1 and cover the active layer 41 .
  • the gate electrode 42 may be disposed on a side of the gate insulating layer away from the substrate 1 .
  • the interlayer insulating layer may be disposed on the gate insulating layer and cover the gate electrode 42 .
  • the drain 43 and the source 44 may be disposed on the interlayer insulating layer, and connected to the active layer 41 through via holes passing through the interlayer insulating layer and the gate insulating layer.
  • the display substrate of the embodiment of the present disclosure may include a planarization layer 3 .
  • the planarization layer 3 can be disposed on the side of the driving circuit layer facing away from the substrate 1 .
  • the planarization layer 3 may be disposed on the side of the above-mentioned interlayer insulating layer facing away from the substrate 1 , and cover the drain 43 and the source 44 of the thin film transistor.
  • the driving current of the driving transistor 4 has a thermal effect, so that the driving transistor 4 emits heat.
  • the plurality of drive transistors 4 may include a first drive transistor 401, a second drive transistor 402, and a third drive transistor 403 whose heat generation decreases in sequence, that is, the heat generation of the first drive transistor 401 is greater than that of the second drive transistor 402, and the heat generation of the second drive transistor 402 is greater than that of the second drive transistor 402.
  • the heat generated by the second driving transistor may be greater than that of the third driving transistor 403 , that is, the driving currents of the first driving transistor 401 , the second driving transistor 402 and the third driving transistor 403 increase sequentially.
  • the plurality of sub-pixels 6 may include a first sub-pixel 601 , a second sub-pixel 602 and a third sub-pixel 603 .
  • Each sub-pixel 6 can be arranged at intervals.
  • Each sub-pixel 6 may include a first electrode 61 , a light emitting material layer 62 and a second electrode 63 .
  • the first electrode 61 can be an anode
  • the second electrode 63 can be a cathode.
  • the first electrode 61 can be set on the side of the planarization layer 3 facing away from the substrate 1, the luminescent material layer 62 can be set on the side of the first electrode 61 facing away from the substrate 1, and the second electrode 63 can be set on the side of the first electrode 61 facing away from the substrate 1.
  • the phosphor layer 62 is on the side facing away from the substrate 1 .
  • the luminescent material layer 62 can be an organic electroluminescent material layer 62 .
  • the first electrode 61 can be connected to the drain 43 or the source 44 of the thin film transistor through a via hole passing through the planarization layer 3, so that the sub-pixel 6 is electrically connected to the driving transistor 4.
  • Each sub-pixel 6 may further include a hole injection layer, a hole transport layer, an electron injection layer and an electron transport layer.
  • the hole injection layer and the hole transport layer are disposed between the first electrode 61 and the light emitting material layer 62
  • the electron injection layer and the electron transport layer are disposed between the second electrode 63 and the light emitting material layer 62 .
  • the first driving transistor 401 is electrically connected to the first sub-pixel 601
  • the second driving transistor 402 is connected to the second
  • the sub-pixel 602 is electrically connected
  • the third driving transistor 403 is electrically connected to the third sub-pixel 603 .
  • the brightness decay speed of the first sub-pixel 601 may be smaller than the brightness decay speed of the second sub-pixel 602
  • the brightness decay speed of the second sub-pixel 602 may be smaller than the brightness decay speed of the third sub-pixel 603 .
  • the first sub-pixel 601 is a blue sub-pixel, one of the second sub-pixel 602 and the third sub-pixel 603 is a green sub-pixel, and the other is a red sub-pixel.
  • the first sub-pixel 601 is a red sub-pixel, one of the second sub-pixel 602 and the third sub-pixel 603 is a green sub-pixel, and the other is a blue sub-pixel.
  • the first sub-pixel 601 is a green sub-pixel, one of the second sub-pixel 602 and the third sub-pixel 603 is a red sub-pixel, and the other is a blue sub-pixel.
  • the display substrate may include a pixel definition layer 5 .
  • the pixel definition layer 5 can be disposed on one side of the substrate 1 .
  • the pixel definition layer 5 can be disposed on the side of the above-mentioned planarization layer 3 facing away from the substrate 1 .
  • the pixel definition layer 5 can be provided with a plurality of openings. The plurality of openings are arranged at intervals.
  • the above-mentioned light emitting material layers 62 of the plurality of sub-pixels 6 are disposed in the plurality of openings of the pixel definition layer 5 in a one-to-one correspondence.
  • the thermal compensation structure is used to provide heat to the first sub-pixel 601 .
  • the thermal compensation structure may comprise a first thermal compensation structure.
  • the above-mentioned first driving transistor 401 forms a first thermal compensation structure, and the first driving transistor 401 is arranged on the driving circuit layer corresponding to the first sub- The area of the pixel 601, that is, the orthographic projection of the first driving transistor 401 on the substrate 1 is located within the area of the orthographic projection of the first sub-pixel 601 on the substrate, so that the heat emitted by the first driving transistor 401 can be conducted more to the first sub-pixel 601.
  • the above-mentioned first driving transistor 401 and the above-mentioned third driving transistor 403 form a first thermal compensation structure, and are arranged on the driving circuit layer corresponding to the first sub-pixel 601
  • the area, that is, the orthographic projections of the first driving transistor 401 and the third driving transistor 403 on the substrate 1 are located within the orthographic projection area of the first sub-pixel 601 on the substrate.
  • the above-mentioned first driving transistor 401 and the above-mentioned second driving transistor 402 constitute a first thermal compensation structure, and are arranged in a region of the driving circuit layer corresponding to the first sub-pixel 601, that is, the first driving transistor 401 and the second driving transistor 402
  • the orthographic projections of the second driving transistor 402 on the substrate 1 are located within the area of the orthographic projection of the first sub-pixel 601 on the substrate.
  • the above-mentioned second driving transistor 402 and the above-mentioned third driving transistor 403 constitute a first thermal compensation structure, and are arranged in the area of the driving circuit layer corresponding to the first sub-pixel 601, that is, the second driving transistor 402 and the The orthographic projections of the third driving transistor 403 on the substrate 1 are located within the orthographic projection area of the first sub-pixel 601 on the substrate.
  • the above-mentioned first driving transistor 401, the above-mentioned second driving transistor 402, and the above-mentioned third driving transistor 403 constitute a first thermal compensation structure
  • the first driving transistor 401, the second driving transistor 402, and the third The driving transistors 403 are all arranged in the region of the driving circuit layer corresponding to the first sub-pixel 601, that is, the orthographic projections of the first driving transistor 401, the second driving transistor 402 and the third driving transistor 403 on the substrate 1 are all located in the first sub-pixel
  • the pixel 601 is within the orthographic projection area on the substrate, so that more heat emitted by the first driving transistor 401 , the second driving transistor 402 and the third driving transistor 403 can be conducted to the first sub-pixel 601 .
  • the thermal compensation structure may also include a second thermal compensation structure.
  • the second thermal compensation structure is used to provide heat to the second sub-pixel 602 .
  • the heat provided by the thermal compensation structure to the first sub-pixel 601 is greater than the heat provided by the thermal compensation structure to the second sub-pixel 602, that is, the heat provided by the first thermal compensation structure to the first sub-pixel 601 is greater than that provided by the second thermal compensation structure to the second sub-pixel 602.
  • Two sub-pixels 602 provide heat. As shown in FIG. 5 and FIG.
  • the above-mentioned second driving transistor 402 and the above-mentioned third driving transistor 403 can form a second thermal compensation structure, and the second Both the driving transistor 402 and the third driving transistor 403 are located in the area of the driving circuit layer corresponding to the second sub-pixel 602, that is, the orthographic projections of the second driving transistor 402 and the third driving transistor 403 on the substrate 1 are located in the second sub-pixel
  • the second thermal compensation structure may only be composed of the second driving transistor 402, that is, the area of the driving circuit layer corresponding to the second sub-pixel 602 is only provided with the second driving transistor.
  • the transistor 402 that is to say, only the orthographic projection of the second driving transistor 402 on the substrate 1 is located within the area of the orthographic projection of the second sub-pixel 602 on the substrate.
  • the above-mentioned third driving transistor 403 can form the second thermal compensation structure, and the third driving transistor 403 can be arranged on the corresponding driving circuit layer.
  • the area of the second sub-pixel 602 that is, the orthographic projection of the third driving transistor 403 on the substrate 1 is located within the area of the orthographic projection of the second sub-pixel 602 on the substrate.
  • the above-mentioned second driving transistor 402 can constitute the second thermal compensation structure, and the second driving transistor 402 is arranged on the driving circuit layer corresponding to The area of the second sub-pixel 602 , that is, the orthographic projection of the second driving transistor 402 on the substrate 1 is located within the area of the orthographic projection of the second sub-pixel 602 on the substrate.
  • the thermal compensation structure may also include a third thermal compensation structure. The heat provided by the second thermal compensation structure to the second sub-pixel 602 is greater than the heat provided by the third thermal compensation structure to the third sub-pixel 603 .
  • the above-mentioned third driving transistor 403 may constitute the third thermal compensation structure, and is arranged on the driving circuit layer corresponding to The area of the third sub-pixel 603 , that is, the orthographic projection of the third driving transistor 403 on the substrate 1 is located within the area of the orthographic projection of the third sub-pixel 603 on the substrate.
  • the structure shown in FIG. 1 and FIG. 2 is taken as the first embodiment, and the Performance tests, the results are shown in Table 2. It can be seen from Table 2 that when the red, green and blue sub-pixel 6 mixed white light decays to 80% of the initial brightness, the time is 475h, and the life span is increased by 15.85%.
  • the corresponding white point coordinate offsets W- ⁇ CIEx and W- ⁇ CIEy are 0.0028 respectively and -0.0121, analyzing the brightness attenuation ratios of the red, green and blue sub-pixels 6 are 87.8%, 76.8% and 85.9% respectively, it can be seen that the attenuation speed of the green sub-pixel has been slowed down to a certain extent.
  • Embodiment one LT80/h 410 475 R-Lv% 88.4% 87.8% G-Lv% 76.0% 76.8% B-Lv% 90.4% 85.9% W-CIEx 0.3062 0.3096 W-CIEy 0.3013 0.3080 W- ⁇ CIEx -0.0006 0.0028 W- ⁇ CIEy -0.0188 -0.0121
  • the structure shown in FIG. 3 and FIG. 4 is used as the second embodiment, and the Performance test, the results are shown in Table 3. It can be seen from Table 3 that when the red, green and blue sub-pixel 6 mixed white light decays to 80% of the initial brightness, the time is 500h, and the life span is increased by 21.95%.
  • the corresponding white point coordinate offsets W- ⁇ CIEx and W- ⁇ CIEy are 0.0047 respectively and -0.0135, analyzing the brightness attenuation ratios of the red, green and blue sub-pixels 6 are 82.8%, 78% and 88.4% respectively, it can be seen that the attenuation speed of the green sub-pixel has been slowed down to a certain extent.
  • Embodiment two LT80/h 410 500 R-Lv% 88.4% 82.8% G-Lv% 76.0% 78.0% B-Lv% 90.4% 88.4% W-CIEx 0.3062 0.3021 W-CIEy 0.3013 0.3066 W- ⁇ CIEx -0.0006 -0.0047 W- ⁇ CIEy -0.0188 -0.0135
  • the structure shown in FIG. 5 and FIG. 6 is used as the third embodiment, and the Performance test, the results are shown in Table 4. It can be seen from Table 4 that when the red, green and blue sub-pixel 6 mixed white light decays to 80% of the initial brightness, the time is 508h, and the life span is increased by 23.9%.
  • the corresponding white point coordinate offsets W- ⁇ CIEx and W- ⁇ CIEy are 0.009 respectively and -0.0095, analyzing the brightness attenuation ratios of the red, green and blue sub-pixels 6 are 85.2%, 77.7% and 85% respectively, it can be seen that the attenuation speed of the green sub-pixel has been slowed down to a certain extent.
  • the display substrate may further include a first heat insulation structure.
  • a first heat insulation structure Among the plurality of sub-pixels 6 , one or more sub-pixels 6 are surrounded by a first heat insulation structure, so as to reduce the heat exchange between the sub-pixels 6 and the outside.
  • the first sub-pixel 601 , the second sub-pixel 602 and the third sub-pixel 603 are all surrounded by the first heat insulation structure.
  • the sidewall of at least one opening of the pixel definition layer 5 is doped with a thermal insulation medium 7 to form a first thermal insulation structure.
  • the thermal conductivity of the heat insulating medium 7 is smaller than the thermal conductivity of the material of the pixel definition layer 5 .
  • the sidewalls of the openings of the first sub-pixel 601 are doped with a heat insulating medium 7 .
  • the sidewall of the opening where the second sub-pixel 602 is provided is doped with a heat insulating medium 7 .
  • the sidewall of the opening of the third sub-pixel 603 is doped with a heat insulating medium 7 .
  • the sidewalls of the multiple openings are all doped with the heat insulating medium 7 , and the doping concentration of the sidewalls of the openings provided with different sub-pixels 6 may be the same, or of course, may also be different.
  • the thermal insulation medium 7 is uniformly doped in the pixel definition layer 5, and the mass fraction of the thermal insulation medium 7 (that is, the thermal insulation medium 7 in The mass proportion of the pixel definition layer 5 containing it can be 0.5%-5%, and the thermal conductivity of the pixel definition layer 5 doped with the heat insulating medium 7 is 0.02-0.04w/(mK).
  • the doping concentration of the sidewalls of the openings provided with the first sub-pixel 601 may be higher than the doping concentration of the sidewalls of the openings provided with sub-pixels of other colors.
  • the doping concentration of the sidewall of the opening provided with the second sub-pixel 602 may be greater than the doping concentration of the sidewall of the opening provided with the third sub-pixel 603 .
  • the display substrate of the present disclosure may also be provided with a second heat insulation structure.
  • the second heat insulation structure may be a cylindrical structure.
  • a partial region of the planarization layer 3 may be doped with the heat insulation medium 7 to form a second heat insulation structure.
  • the outer periphery of the orthographic projection of one or more sub-pixels 6 on the planarization layer 3 among the above-mentioned plurality of sub-pixels 6 is surrounded by the second heat insulation structure.
  • the number of the second heat insulation structure may be the same as the number of the above-mentioned sub-pixels 6, and the above-mentioned first sub-pixel 601, the above-mentioned second sub-pixel 602, and the above-mentioned third sub-pixel 603 are in the planarization layer
  • the outer circumference of the orthographic projection on 3 is surrounded by the second heat insulation structure in one-to-one correspondence.
  • the thermal insulation medium 7 may be inorganic substances, such as silicon oxide. Of course, the thermal insulation medium 7 may also be other inorganic substances such as alumina, but the present disclosure is not limited thereto, and the thermal insulation medium 7 may also be organic substances.
  • the silicon oxide may be SiO 2
  • the aluminum oxide may be Al 2 O 3 .
  • the thermal insulation medium 7 can be nanoparticles, so that the thermal insulation medium 7 can be uniformly dispersed.
  • the diameter of the nanoparticles may be 10nm-200nm, further, the diameter of the nanoparticles may be 15nm-200nm, such as 15nm, 30nm, 50nm, 120nm, 200nm and so on.
  • the embodiment of the present disclosure also provides a display device.
  • the display device may include the display substrate described in any one of the above implementation manners.
  • the embodiment of the present disclosure also provides a vehicle.
  • the vehicle may include the above-mentioned display device.
  • the vehicle may be a car or the like.
  • the display substrate, the display device, and the vehicle provided by the embodiments of the present disclosure belong to the same inventive concept, and the descriptions of relevant details and beneficial effects can be referred to each other, and will not be repeated here.

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Abstract

本公开涉及显示技术领域，提供了一种显示装置及显示基板。该显示基板可以包括衬底、多个像素单元以及热补偿结构。多个像素单元设于所述衬底的一侧，所述像素单元包括多个子像素，多个所述子像素包括第一子像素和第二子像素，所述第一子像素的亮度衰减速度小于所述第二子像素的亮度衰减速度。热补偿结构用于提供热量，且所述热补偿结构向所述第一子像素提供的热量大于所述热补偿结构向所述第二子像素提供的热量，所述热补偿结构向所述第二子像素提供的热量大于或等于0。本公开能够解决由于各个子像素的亮度衰减速度差异较大所导致的白平衡偏移的问题。

Description

显示装置及显示基板 技术领域
本公开涉及显示技术领域，尤其涉及一种显示装置及显示基板。
背景技术
随着汽车产业的蓬勃发展，车载显示发展迅速，目前车载显示不仅仅是简单的单色显示，正朝着全彩、大尺寸以及多样化的方向发展。利用车载显示装置，可以显示驾驶数据信息、导航地图、互联网信息以及影音娱乐信息等，从而提升用户体验。然而，现有的车载显示装置容易产生白平衡偏移的问题。
发明内容
本公开的目的在于提供一种显示装置及显示基板，能够解决由于各个子像素的亮度衰减速度差异较大所导致的白平衡偏移的问题。
根据本公开的一个方面，提供一种显示基板，包括：
衬底；
多个像素单元，设于所述衬底的一侧，所述像素单元包括多个子像素，多个所述子像素包括第一子像素和第二子像素，所述第一子像素的亮度衰减速度小于所述第二子像素的亮度衰减速度；
热补偿结构，用于提供热量，且所述热补偿结构向所述第一子像素提供的热量大于所述热补偿结构向所述第二子像素提供的热量，所述热补偿结构向所述第二子像素提供的热量大于或等于0。
进一步地，所述像素单元还包括第三子像素，所述第二子像素的亮度衰减速度小于所述第三子像素的亮度衰减速度，所述热补偿结构向所述第二子像素提供的热量大于所述热补偿结构向所述第三子像素提供的热量，所述热补偿结构向所述第三子像素提供的热量大于或等于0。
进一步地，所述第一子像素为蓝色子像素，所述第二子像素为红色子像素，所述第三子像素为绿色子像素。
进一步地，所述显示基板包括：
驱动电路层，设于所述衬底的一侧，且包括与多个所述子像素一一对应地电连接的多个驱动晶体管，所述热补偿结构由所述驱动晶体管构成。
进一步地，多个所述驱动晶体管包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管在所述衬底上的正投影位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管在所述衬底上的正投影位于所述第二子像素在所述衬底上的正投影区域内；所述第三驱动晶体管在所述衬底上的正投影位于所述第三子像素在所述衬底上的正投影区域内。
进一步地，多个所述驱动晶体管包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管以及所述第三驱动晶体管在所述衬底上的正投影均位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管在所述衬底上的正投影位于所述第二子像素在所述衬底上的正投影区域内。
进一步地，多个所述驱动晶体管包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管在所述衬底上的正投影位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管以及所述第三驱动晶体管在所述衬底上的正投影均位于所述第二子像素在所述衬底上的正投影区域内。
进一步地，多个所述子像素中存在一个或多个所述子像素的外周围绕有第一隔热结构。
进一步地，所述显示基板包括：
像素定义层，设于所述衬底的一侧，且设有多个开口，多个所述子像素一一对应地设于多个所述开口内；
隔热介质，所述像素定义层的至少一个所述开口的侧壁掺杂所述隔热介质以构成所述第一隔热结构，所述隔热介质的导热系数小于所述像素定义层材料的导热系数。
进一步地，所述隔热介质均匀掺杂于所述像素定义层。
进一步地，设有所述第一子像素的所述开口的侧壁掺杂所述隔热介质。
进一步地，设有所述第二子像素的所述开口的侧壁掺杂所述隔热介质，设有所述第一子像素的所述开口的侧壁的掺杂浓度大于设有所述第二子像素的所述开口的侧壁的掺杂浓度。
进一步地，所述像素单元还包括第三子像素，所述第二子像素的亮度衰减速度小于所述第三子像素的亮度衰减速度，设有所述第三子像素的所述开口的侧壁掺杂所述隔热介质，设有所述第二子像素的所述开口的侧壁的掺杂浓度大于设有所述第三子像素的所述开口的侧壁的掺杂浓度。
进一步地，所述显示基板还包括：
平坦化层，设于所述衬底的一侧，所述像素定义层以及多个所述子像素均设于所述平坦化层背向所述衬底的表面；所述平坦化层的部分区域掺杂所述隔热介质以构成第二隔热结构，所述第二隔热结构呈筒状结构；多个所述子像素中存在一个或多个所述子像素在所述平坦化层上的正投影的外周围绕有所述第二隔热结构。
进一步地，所述隔热介质为纳米颗粒。
进一步地，所述纳米颗粒的直径为10nm-200nm。
进一步地，所述隔热介质为无机材料。
进一步地，所述隔热介质为氧化硅或氧化铝。
进一步地，所述隔热介质的质量分数为0.5％-5％。
根据本公开的一个方面，提供一种显示装置，包括上述的显示基板。
本公开的显示装置及显示基板，热补偿结构向第一子像素提供的热量大于热补偿结构向第二子像素提供的热量，可以加快第一子像素的亮度衰减速度，使第一子像素的亮度衰减速度与第二子像素的亮度衰减速度相近，解决了由于各个子像素的亮度衰减速度差异较大所导致的白平衡偏移的问题。
附图说明
图1是本公开实施方式的显示基板的示意图。
图2是图1所示显示基板的平面布局原理图。
图3是本公开实施方式的显示基板的又一示意图。
图4是图3所示显示基板的平面布局原理图。
图5是本公开实施方式的显示基板的另一示意图。
图6是图5所示显示基板的平面布局原理图。
附图标记说明：1、衬底；2、绝缘层；3、平坦化层；4、驱动晶体管；41、有源层；42、栅电极；43、漏极；44、源极；401、第一驱动晶体管；402、第二驱动晶体管；403、第三驱动晶体管；5、像素定义层；6、子像素；61、第一电极；62、发光材料层；63、第二电极；601、第一子像素；602、第二子像素；603、第三子像素；7、隔热介质。
具体实施方式
这里将详细地对示例性实施方式进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施方式中所描述的实施方式并不代表与本公开相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本公开的一些方面相一致的装置的例子。
在本公开使用的术语是仅仅出于描述特定实施方式的目的，而非旨在限制本公开。除非另作定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开说明书以及权利要求书中使用的“第一”“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“多个”或者“若干”表示两个及两个以上。除非另行指出，“前部”、“后部”、“下部”和/或“上部”等类似词语只是为了便于说明，而并非限于一个位置或者一种空间定向。“包括”或者“包含”等类似词语意指出现在“包括”或者“包含”前面的元件或者物件涵盖出现在“包括”或者“包含”后面列举的元件或者物件及其等同，并不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而且可以包括电性的连接，不管是直接的还是间接的。在本公开说明书和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。
相关技术中，车载OLED显示面板通常要求在85℃高温条件下运行测试，当亮度衰减至初始亮度的80％时，其白平衡坐标(W-CIEx、W-CIEy)相比初始值偏移量不能超过±0.01。
在车载OLED显示面板的开发过程中，寿命指标一般仅考虑环境温度下红绿蓝子像素的寿命，现有车载OLED显示面板的红绿蓝子像素在85℃下寿命LT80分别为950h、450h、1200h，据车载OLED显示面板的红绿蓝子像素色坐标和对应白点初始色坐标(0.3057,0.3016)来推算，可推算出红绿蓝子像素混合白光的亮度衰减至初始亮度的80％时，对应时间为549h，即LT80为549h，对应白点坐标偏移W-ΔCIEx和W-ΔCIEy分别为-0.0011和-0.0185，具体如表1所示。
表1
  理论值 实际值
LT80/h 549 410
R-Lv％ 87.9％ 88.4％
G-Lv％ 76.2％ 76.0％
B-Lv％ 90.3％ 90.4％
W-CIEx 0.3057 0.3062
W-CIEy 0.3016 0.3013
W-ΔCIEx -0.0011 -0.0006
W-ΔCIEy -0.0185 -0.0188
在实际的车载OLED显示面板的开发中，由于发光器件效率损耗、电流在面板内部的热效应等因素，会存在面板自发热问题，导致车载OLED显示面板的温度会超过环境温度，在85℃环境温度下，显示面板内部的平均温度可达93℃，根据车载OLED显示面板红绿蓝子像素色坐标和对应白点目标色坐标来推算，在93℃下，红绿蓝子像素混合白光的亮度衰减至初始亮度的80％时，对应时间为410h，对应白点坐标偏移W-ΔCIEx和W-ΔCIEy分别为-0.0006和-0.0188，具体见表1，可知白平衡偏移过大。分析其红绿蓝子像素亮度衰减比分别为88.4％、76％以及90.4％。可知，白平衡偏移过大是因为蓝色子像素、红色子像素以及绿色子像素的亮度衰减速度依次增大。
解决该问题的常规思路为调整不同子像素所在发光区域的发光面积，以调节不同子像素的亮度衰减速率一致。但是，该方案涉及精细金属掩膜版的设计、张网等，变更流程较为复杂，且该方案也不能解决绿色子像素发光亮度衰减过快的问题。
本公开实施方式提供一种显示基板。如图1所示，该显示基板可以包括衬底1、多个像素单元以及热补偿结构，其中：
多个像素单元设于衬底1的一侧，各像素单元包括多个子像素6，多个子像素6包括第一子像素601和第二子像素602，第一子像素601的亮度衰减速度小于第二子像素602的亮度衰减速度。该热补偿结构用于提供热量，且热补偿结构向第一子像素601提供的热量大于热补偿结构向第二子像素602提供的热量。该热补偿结构向第二子像素602提供的热量大于或等于0。
本公开实施方式的显示基板，热补偿结构向第一子像素601提供的热量大于热补偿结构向第二子像素602提供的热量，可以加快第一子像素601的亮度衰减速度，使第一子像素601的亮度衰减速度与第二子像素602的亮度衰减速度相近，解决了由于各个子像素的亮度衰减速度差异较大所导致的白平衡偏移的问题。
下面对本公开实施方式的显示基板的各部分进行详细说明：
如图1所示，该衬底1可以为刚性衬底。其中，该刚性衬底可以为玻璃衬底或PMMA(Polymethyl methacrylate，聚甲基丙烯酸甲酯)衬底等。当然，该衬底1还可以为柔性衬底。其中，该柔性衬底可以为PET(Polyethylene terephthalate，聚对苯二甲酸乙二醇酯)衬底、PEN(Polyethylene naphthalate two formic acid glycol ester，聚萘二甲酸乙二醇酯)衬底或PI(Polyimide，聚酰亚胺)衬底。
如图1所示，本公开实施方式的显示基板可以包括驱动电路层。该驱动电路层设于衬底1上。该驱动电路层可以包括多个驱动晶体管4。该驱动晶 体管4可以为薄膜晶体管，但本公开实施方式不限于此。该薄膜晶体管可以为顶栅型薄膜晶体管，当然，该薄膜晶体管还可以为底栅型薄膜晶体管。以薄膜晶体管为顶栅型薄膜晶体管为例，该驱动晶体管4可以包括有源层41、栅绝缘层、栅电极42、层间绝缘层、漏极43以及源极44。该栅绝缘层和层间绝缘层构成图1中的绝缘层2。该有源层41可以设于衬底1上。该栅绝缘层可以设于衬底1上，并覆盖有源层41。该栅电极42可以设于栅绝缘层远离衬底1的一侧。该层间绝缘层可以设在栅绝缘层上，并覆盖栅电极42。该漏极43和源极44可以设在层间绝缘层上，并经由穿过层间绝缘层和栅绝缘层的过孔连接至有源层41。此外，以多个驱动晶体管4均为薄膜晶体管为例，各驱动晶体管4的厚度以及宽长比均可以大致相同。本公开实施方式的显示基板可以包括平坦化层3。该平坦化层3可以设于驱动电路层背向衬底1的一侧。其中，该平坦化层3可以设于上述的层间绝缘层背向衬底1的一侧，且覆盖薄膜晶体管的漏极43和源极44。此外，该驱动晶体管4的驱动电流具有热效应，以使驱动晶体管4发出热量。多个驱动晶体管4可以包括发热量依次降低的第一驱动晶体管401、第二驱动晶体管402以及第三驱动晶体管403，即第一驱动晶体管401的发热量大于第二驱动晶体管402的发热量，第二驱动晶体的发热量可以大于第三驱动晶体管403的发热量，也就是说，第一驱动晶体管401、第二驱动晶体管402以及第三驱动晶体管403的驱动电流依次增大。
如图1所示，多个子像素6可以包括第一子像素601、第二子像素602以及第三子像素603。各子像素6可以间隔设置。各子像素6可以包括第一电极61、发光材料层62以及第二电极63。该第一电极61可以为阳极，该第二电极63可以为阴极。该第一电极61可以设于平坦化层3背向衬底1的一侧，该发光材料层62可以设于第一电极61背向衬底1的一侧，该第二电极63可以设于发光材料层62背向衬底1的一侧。该发光材料层62可以为有机电致发光材料层62。该第一电极61可以经由穿过平坦化层3的过孔连接至上述薄 膜晶体管的漏极43或源极44，以使子像素6与驱动晶体管4电连接。各子像素6还可以包括空穴注入层、空穴传输层、电子注入层以及电子传输层。该空穴注入层以及空穴传输层设于第一电极61和发光材料层62之间，该电子注入层以及电子传输层设于第二电极63与发光材料层62之间。以多个子像素6包括第一子像素601、第二子像素602以及第三子像素603为例，上述第一驱动晶体管401与第一子像素601电连接，上述第二驱动晶体管402与第二子像素602电连接，上述第三驱动晶体管403与第三子像素603电连接。该第一子像素601的亮度衰减速度可以小于第二子像素602的亮度衰减速度，第二子像素602的亮度衰减速度可以小于第三子像素603的亮度衰减速度。在一实施方式中，第一子像素601为蓝色子像素，第二子像素602和第三子像素603中一个为绿色子像素，另一个为红色子像素。在另一实施方式中，第一子像素601为红色子像素，第二子像素602和第三子像素603中一个为绿色子像素，另一个为蓝色子像素。在又一实施方式中，第一子像素601为绿色子像素，第二子像素602和第三子像素603中一个为红色子像素，另一个为蓝色子像素。
如图1所示，本公开实施方式的显示基板可以包括像素定义层5。该像素定义层5可以设于衬底1的一侧。具体地，该像素定义层5可以设于上述的平坦化层3背向衬底1的一侧。该像素定义层5可以设有多个开口。该多个开口间隔设置。上述的多个子像素6的发光材料层62一一对应地设于像素定义层5的多个开口内。
该热补偿结构用于向第一子像素601提供热量。该热补偿结构可以包括第一热补偿结构。在一实施方式中，如图1、图2、图5以及图6所示，上述第一驱动晶体管401构成第一热补偿结构，且第一驱动晶体管401设于驱动电路层对应于第一子像素601的区域，即第一驱动晶体管401在衬底1上的正投影位于第一子像素601在衬底上的正投影区域内，以使第一驱动晶体管401发出的热量能够更多的传导至第一子像素601。在又一实施方式中，如 图3和图4所示，上述第一驱动晶体管401和上述第三驱动晶体管403构成第一热补偿结构，且设于驱动电路层对应于第一子像素601的区域，即第一驱动晶体管401以及第三驱动晶体管403在衬底1上的正投影均位于第一子像素601在衬底上的正投影区域内。在另一实施方式中，上述第一驱动晶体管401和上述第二驱动晶体管402构成第一热补偿结构，且设于驱动电路层对应于第一子像素601的区域，即第一驱动晶体管401以及第二驱动晶体管402在衬底1上的正投影均位于第一子像素601在衬底上的正投影区域内。在再一实施方式中，上述第二驱动晶体管402和上述第三驱动晶体管403构成第一热补偿结构，且设于驱动电路层对应于第一子像素601的区域，即第二驱动晶体管402以及第三驱动晶体管403在衬底1上的正投影均位于第一子像素601在衬底上的正投影区域内。在本公开其它实施方式中，上述第一驱动晶体管401、上述第二驱动晶体管402以及上述第三驱动晶体管403构成第一热补偿结构，且第一驱动晶体管401、第二驱动晶体管402以及第三驱动晶体管403均设于驱动电路层对应于第一子像素601的区域，即第一驱动晶体管401、第二驱动晶体管402以及第三驱动晶体管403在衬底1上的正投影均位于第一子像素601在衬底上的正投影区域内，从而使第一驱动晶体管401、第二驱动晶体管402以及第三驱动晶体管403发出的热量都能够更多的传导至第一子像素601。
该热补偿结构还可以包括第二热补偿结构。该第二热补偿结构用于向第二子像素602提供热量。该热补偿结构向第一子像素601提供的热量大于热补偿结构向第二子像素602提供的热量，即第一热补偿结构向第一子像素601提供的热量大于第二热补偿结构向第二子像素602提供的热量。如图5和图6所示，以上述的第一驱动晶体管401构成第一热补偿结构为例，上述第二驱动晶体管402和上述第三驱动晶体管403可以构成第二热补偿结构，且第二驱动晶体管402和第三驱动晶体管403均设于驱动电路层对应于第二子像素602的区域，即第二驱动晶体管402以及第三驱动晶体管403在衬底1 上的正投影均位于第二子像素602在衬底上的正投影区域内，当然，该第二热补偿结构也可以仅由第二驱动晶体管402构成，即驱动电路层对应于第二子像素602的区域仅设有第二驱动晶体管402，也就是说，仅第二驱动晶体管402在衬底1上的正投影位于第二子像素602在衬底上的正投影区域内。以上述第一驱动晶体管401和上述第二驱动晶体管402构成第一热补偿结构为例，上述第三驱动晶体管403可以构成第二热补偿结构，且第三驱动晶体管403可以设于驱动电路层对应于第二子像素602的区域，即第三驱动晶体管403在衬底1上的正投影位于第二子像素602在衬底上的正投影区域内。以上述第一驱动晶体管401和上述第三驱动晶体管403构成第一热补偿结构为例，上述第二驱动晶体管402可以构成第二热补偿结构，且第二驱动晶体管402设于驱动电路层对应于第二子像素602的区域，即第二驱动晶体管402在衬底1上的正投影位于第二子像素602在衬底上的正投影区域内。该热补偿结构还可以包括第三热补偿结构。该第二热补偿结构向第二子像素602提供的热量大于第三热补偿结构向第三子像素603提供的热量。其中，在第一驱动晶体管401构成第一热补偿结构且第二驱动晶体管402构成第二热补偿结构时，上述第三驱动晶体管403可以构成第三热补偿结构，且设于驱动电路层对应于第三子像素603的区域，即第三驱动晶体管403在衬底1上的正投影位于第三子像素603在衬底上的正投影区域内。
以第一子像素601为蓝色子像素、第二子像素602为红色子像素且第三子像素603为绿色子像素为例，将图1和图2所示结构作为实施例一，并进行性能测试，其结果见表2。由表2可知，红绿蓝子像素6混合白光在亮衰减至初始亮度的80％时，时间为475h，寿命提升了15.85％，对应白点坐标偏移W-ΔCIEx和W-ΔCIEy分别为0.0028和-0.0121，分析其红绿蓝子像素6亮度衰减比分别为87.8％、76.8％以及85.9％，可见绿色子像素的衰减速度得到一定程度的减缓。
表2
  实际值 实施例一
LT80/h 410 475
R-Lv％ 88.4％ 87.8％
G-Lv％ 76.0％ 76.8％
B-Lv％ 90.4％ 85.9％
W-CIEx 0.3062 0.3096
W-CIEy 0.3013 0.3080
W-ΔCIEx -0.0006 0.0028
W-ΔCIEy -0.0188 -0.0121
以第一子像素601为蓝色子像素、第二子像素602为红色子像素且第三子像素603为绿色子像素为例，将图3和图4所示结构作为实施例二，并进行性能测试，其结果见表3。由表3可知，红绿蓝子像素6混合白光在亮衰减至初始亮度的80％时，时间为500h，寿命提升了21.95％，对应白点坐标偏移W-ΔCIEx和W-ΔCIEy分别为0.0047和-0.0135，分析其红绿蓝子像素6亮度衰减比分别为82.8％、78％以及88.4％，可见绿色子像素的衰减速度得到一定程度的减缓。
表3
  实际值 实施例二
LT80/h 410 500
R-Lv％ 88.4％ 82.8％
G-Lv％ 76.0％ 78.0％
B-Lv％ 90.4％ 88.4％
W-CIEx 0.3062 0.3021
W-CIEy 0.3013 0.3066
W-ΔCIEx -0.0006 -0.0047
W-ΔCIEy -0.0188 -0.0135
以第一子像素601为蓝色子像素、第二子像素602为红色子像素且第 三子像素603为绿色子像素为例，将图5和图6所示结构作为实施例三，并进行性能测试，其结果见表4。由表4可知，红绿蓝子像素6混合白光在亮衰减至初始亮度的80％时，时间为508h，寿命提升了23.9％，对应白点坐标偏移W-ΔCIEx和W-ΔCIEy分别为0.009和-0.0095，分析其红绿蓝子像素6亮度衰减比分别为85.2％、77.7％以及85％，可见绿色子像素的衰减速度得到一定程度的减缓。
表4
  实际值 实施例三
LT80/h 410 508
R-Lv％ 88.4％ 85.2％
G-Lv％ 76.0％ 77.7％
B-Lv％ 90.4％ 85.0％
W-CIEx 0.3062 0.3077
W-CIEy 0.3013 0.3106
W-ΔCIEx -0.0006 0.0009
W-ΔCIEy -0.0188 -0.0095
该显示基板还可以包括第一隔热结构。上述多个子像素6中存在一个或多个子像素6的外周围绕有第一隔热结构，以降低子像素6与外界交换的热量。举例而言，上述的第一子像素601、第二子像素602以及第三子像素603的外周均围绕有第一隔热结构。如图2、图4以及图6所示，以显示基板包括像素定义层5为例，该像素定义层5的至少一个开口的侧壁掺杂有隔热介质7以构成第一隔热结构。该隔热介质7的导热系数小于像素定义层5材料的导热系数。在一实施方式中，设有第一子像素601的开口的侧壁掺杂隔热介质7。在另一实施方式中，设有第二子像素602的所述开口的侧壁掺杂隔热介质7。在又一实施方式中，设有第三子像素603的开口的侧壁掺杂隔热介质7。在本公开其它实施方式中，多个开口的侧壁均掺杂隔热介质7，且设有不同子像素6的开口侧壁的掺杂浓度可以相同，当然，也可以不同。以设有 不同子像素6的开口侧壁的掺杂浓度相同为例，该隔热介质7均匀掺杂于像素定义层5中，且隔热介质7的质量分数(即，隔热介质7在包含其的像素定义层5中的质量占比)可以为0.5％-5％，掺杂隔热介质7后的像素定义层5的导热系数为0.02-0.04w/(mK)。以设有不同子像素6的开口侧壁的掺杂浓度不同为例，设有第一子像素601的开口的侧壁的掺杂浓度可以大于设有其它颜色子像素的开口的侧壁的掺杂浓度，设有第二子像素602的开口的侧壁的掺杂浓度可以大于设有第三子像素603的开口的侧壁的掺杂浓度。
本公开的显示基板还可以设有第二隔热结构。该第二隔热结构可以呈筒装结构。上述平坦化层3的部分区域可以掺杂上述隔热介质7以构成第二隔热结构。上述的多个子像素6中存在一个或多个子像素6在平坦化层3上的正投影的外周围绕有第二隔热结构。举例而言，该第二隔热结构的数量可以与上述子像素6的数量相同，且上述的第一子像素601、上述的第二子像素602以及上述的第三子像素603在平坦化层3上的正投影的外周一一对应地围绕有第二隔热结构。
上述隔热介质7可以为无机物，例如氧化硅，当然，该隔热介质7也可以为氧化铝等其它无机物，但本公开不限于此，该隔热介质7还可以为有机物。该氧化硅可以为SiO 2，该氧化铝可以为Al 2O 3。该隔热介质7可以为纳米颗粒，以使隔热介质7可以分散均匀。该纳米颗粒的直径可以为10nm-200nm，进一步地，该纳米颗粒的直径可以为15nm-200nm，例如15nm、30nm、50nm、120nm、200nm等。
本公开实施方式还提供一种显示装置。该显示装置可以包括上述任一实施方式所述的显示基板。
本公开施方式还提供一种车辆。该车辆可以包括上述的显示装置。该车辆可以为汽车等。
本公开实施方式提供的显示基板、显示装置以及车辆属于同一发明构 思，相关细节及有益效果的描述可互相参见，不再进行赘述。
以上所述仅是本公开的较佳实施方式而已，并非对本公开做任何形式上的限制，虽然本公开已以较佳实施方式揭露如上，然而并非用以限定本公开，任何熟悉本专业的技术人员，在不脱离本公开技术方案的范围内，当可利用上述揭示的技术内容做出些许更动或修饰为等同变化的等效实施方式，但凡是未脱离本公开技术方案的内容，依据本公开的技术实质对以上实施方式所作的任何简单修改、等同变化与修饰，均仍属于本公开技术方案的范围内。

Claims (20)

  1. 一种显示基板，其特征在于，包括：
    衬底；
    多个像素单元，设于所述衬底的一侧，所述像素单元包括多个子像素，多个所述子像素包括第一子像素和第二子像素，所述第一子像素的亮度衰减速度小于所述第二子像素的亮度衰减速度；
    热补偿结构，用于提供热量，且所述热补偿结构向所述第一子像素提供的热量大于所述热补偿结构向所述第二子像素提供的热量，所述热补偿结构向所述第二子像素提供的热量大于或等于0。
  2. 根据权利要求1所述的显示基板，其特征在于，所述像素单元还包括第三子像素，所述第二子像素的亮度衰减速度小于所述第三子像素的亮度衰减速度，所述热补偿结构向所述第二子像素提供的热量大于所述热补偿结构向所述第三子像素提供的热量，所述热补偿结构向所述第三子像素提供的热量大于或等于0。
  3. 根据权利要求2所述的显示基板，其特征在于，所述第一子像素为蓝色子像素，所述第二子像素为红色子像素，所述第三子像素为绿色子像素。
  4. 根据权利要求2所述的显示基板，其特征在于，所述显示基板包括：
    驱动电路层，设于所述衬底的一侧，且包括与多个所述子像素一一对应地电连接的多个驱动晶体管，所述热补偿结构由所述驱动晶体管构成。
  5. 根据权利要求4所述的显示基板，其特征在于，多个所述驱动晶体管包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管在所述衬底上的正投影位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管在所述衬底上的正投影位于所述第二子像素在所述衬底上的正投影区域内；所述第三驱动晶体管在所述衬底上的正投影位于所述第三子像素在所述衬底上的正投影区域内。
  6. 根据权利要求4所述的显示基板，其特征在于，多个所述驱动晶体管 包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管以及所述第三驱动晶体管在所述衬底上的正投影均位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管在所述衬底上的正投影位于所述第二子像素在所述衬底上的正投影区域内。
  7. 根据权利要求4所述的显示基板，其特征在于，多个所述驱动晶体管包括发热量依次降低的第一驱动晶体管、第二驱动晶体管以及第三驱动晶体管，所述第一驱动晶体管在所述衬底上的正投影位于所述第一子像素在所述衬底上的正投影区域内；所述第二驱动晶体管以及所述第三驱动晶体管在所述衬底上的正投影均位于所述第二子像素在所述衬底上的正投影区域内。
  8. 根据权利要求1所述的显示基板，其特征在于，所述像素单元中存在一个或多个所述子像素的外周围绕有第一隔热结构。
  9. 根据权利要求8所述的显示基板，其特征在于，所述显示基板包括：
    像素定义层，设于所述衬底的一侧，且设有多个开口，多个所述子像素一一对应地设于多个所述开口内；
    隔热介质，所述像素定义层的至少一个所述开口的侧壁掺杂所述隔热介质以构成所述第一隔热结构，所述隔热介质的导热系数小于所述像素定义层材料的导热系数。
  10. 根据权利要求9所述的显示基板，其特征在于，所述隔热介质均匀掺杂于所述像素定义层。
  11. 根据权利要求9所述的显示基板，其特征在于，设有所述第一子像素的所述开口的侧壁掺杂所述隔热介质。
  12. 根据权利要求11所述的显示基板，其特征在于，设有所述第二子像素的所述开口的侧壁掺杂所述隔热介质，设有所述第一子像素的所述开口的侧壁的掺杂浓度大于设有所述第二子像素的所述开口的侧壁的掺杂浓度。
  13. 根据权利要求12所述的显示基板，其特征在于，所述像素单元还包括第三子像素，所述第二子像素的亮度衰减速度小于所述第三子像素的亮度衰减速度，设有所述第三子像素的所述开口的侧壁掺杂所述隔热介质，设有 所述第二子像素的所述开口的侧壁的掺杂浓度大于设有所述第三子像素的所述开口的侧壁的掺杂浓度。
  14. 根据权利要求9所述的显示基板，其特征在于，所述显示基板还包括：
    平坦化层，设于所述衬底的一侧，所述像素定义层以及多个所述子像素均设于所述平坦化层背向所述衬底的表面；所述平坦化层的部分区域掺杂所述隔热介质以构成第二隔热结构，所述第二隔热结构呈筒状结构；所述像素单元中存在一个或多个所述子像素在所述平坦化层上的正投影的外周围绕有所述第二隔热结构。
  15. 根据权利要求9或14所述的显示基板，其特征在于，所述隔热介质为纳米颗粒。
  16. 根据权利要求15所述的显示基板，其特征在于，所述纳米颗粒的直径为10nm-200nm。
  17. 根据权利要求9或14所述的显示基板，其特征在于，所述隔热介质为无机材料。
  18. 根据权利要求17所述的显示基板，其特征在于，所述隔热介质为氧化硅或氧化铝。
  19. 根据权利要求10所述的显示基板，其特征在于，所述隔热介质的质量分数为0.5％-5％。
  20. 一种显示装置，其特征在于，包括权利要求1-19任一项所述的显示基板。
PCT/CN2021/126796 2021-05-27 2021-10-27 显示装置及显示基板 WO2022247134A1 (zh)

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Citations (4)

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CN104350536A (zh) * 2012-05-31 2015-02-11 苹果公司 具有集成的热传感器的显示器
CN108648635A (zh) * 2018-05-09 2018-10-12 京东方科技集团股份有限公司 显示面板、显示装置及显示面板的温度补偿方法
CN110072315A (zh) * 2013-02-05 2019-07-30 晶元光电股份有限公司 具温度补偿元件的发光装置
CN111933817A (zh) * 2020-07-27 2020-11-13 合肥维信诺科技有限公司 显示面板和显示装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104350536A (zh) * 2012-05-31 2015-02-11 苹果公司 具有集成的热传感器的显示器
CN110072315A (zh) * 2013-02-05 2019-07-30 晶元光电股份有限公司 具温度补偿元件的发光装置
CN108648635A (zh) * 2018-05-09 2018-10-12 京东方科技集团股份有限公司 显示面板、显示装置及显示面板的温度补偿方法
CN111933817A (zh) * 2020-07-27 2020-11-13 合肥维信诺科技有限公司 显示面板和显示装置

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