WO2022217736A1 - 硅光多通道并行光组件及其耦合方法 - Google Patents

硅光多通道并行光组件及其耦合方法 Download PDF

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Publication number
WO2022217736A1
WO2022217736A1 PCT/CN2021/100470 CN2021100470W WO2022217736A1 WO 2022217736 A1 WO2022217736 A1 WO 2022217736A1 CN 2021100470 W CN2021100470 W CN 2021100470W WO 2022217736 A1 WO2022217736 A1 WO 2022217736A1
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optical
silicon
chip
laser
waveguide
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PCT/CN2021/100470
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English (en)
French (fr)
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胡百泉
林雪枫
李林科
吴天书
杨现文
张健
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武汉联特科技股份有限公司
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Priority to US17/927,755 priority Critical patent/US11740417B2/en
Publication of WO2022217736A1 publication Critical patent/WO2022217736A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12004—Combinations of two or more optical elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4207—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms with optical elements reducing the sensitivity to optical feedback
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4246—Bidirectionally operating package structures
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4266—Thermal aspects, temperature control or temperature monitoring
    • G02B6/4268—Cooling
    • G02B6/4269—Cooling with heat sinks or radiation fins
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects
    • G02B6/428—Electrical aspects containing printed circuit boards [PCB]
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/12121—Laser
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/12123—Diode
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12142—Modulator
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12147—Coupler
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/1215—Splitter

Definitions

  • the invention relates to the technical field of optical communication, in particular to a silicon optical integrated chip, a silicon optical multi-channel parallel optical component and a coupling method thereof.
  • EML-type laser chips applied to 400G and 800G rates are high-end core chips with technical bottlenecks and are expensive.
  • Parallel optical components mean the use of multi-channel EML chips, so the material cost of optical components is very high. How to reduce the cost of parallel optical components has always been the direction of the industry's efforts.
  • the purpose of the present invention is to provide a silicon photonics integrated chip, a silicon photonics multi-channel parallel optical assembly and a coupling method thereof, and the packaging of the parallel optical assembly through the silicon photonics integrated chip can greatly reduce the cost.
  • a silicon optical integrated chip comprising a laser group 204, an FA component 210 and a silicon optical integrated chip 203, wherein the transmitting output waveguide unit and the receiving input waveguide are
  • the FA assembly 210 is docked, and the transmit input waveguide unit and the laser group 204 are arranged in the same path.
  • a coupling lens group 205 , an isolator 206 , a prism group 207 and a emitting end glass strip 208 are also arranged in sequence between 203 .
  • a receiving end glass strip 209 is further provided between the FA component 210 and the silicon optical integrated chip 203 .
  • the PCBA board 201 also includes a PCBA board 201, the PCBA board 201 is provided with a window 215 penetrating the upper and lower surfaces of the PCBA board 201, the silicon optical integrated chip 203, the laser group 204, the coupling lens group 205, The isolator 206 , the prism group 207 , the transmitting end glass strip 208 , the receiving end glass strip 209 and the FA component 210 are all placed in the window 215 .
  • the window 215 is provided with a heat sink 401, the silicon optical integrated chip 203, the laser group 204, the coupling lens group 205, the isolator 206, the prism group 207, the transmitting end
  • the glass strip 208 , the receiving end glass strip 209 and the FA component 210 are all disposed on the heat sink 401 .
  • the heat sink 401 is in the shape of steps
  • the silicon photonics integrated chip 203 is arranged on the higher platform of the step shape
  • the laser group 204 and the coupling lens group 205 are arranged on the lower platform.
  • the isolator 206 isolator 206 .
  • the lower surface of the PCBA board 201 is provided with a support plate 402 that blocks the window 215 , and the heat sink 401 is placed on the support plate 402 .
  • both the transmitter driver chip 212 and the receiver TIA chip 213 are located in the silicon optical integrated chip 203 away from the laser group 204 and the FA.
  • the transmitter driver chip 212 is located in the direction from the laser group 204 to the silicon optical integrated chip 203
  • the receiving TIA chip 213 is located from the FA component 210 to the silicon optical integrated chip 210. in the direction of the chip 203 .
  • the laser group 204 includes a first laser 204-1 and a second laser 204-2, and both the first laser 204-1 and the second laser 204-2 include a laser chip 501 and a ceramic heat sink 502,
  • the laser chip 501 is eutectic above the ceramic heat sink 502 , and the upper surface of the ceramic heat sink 502 has a positive electrode and a negative electrode of the laser chip 501 .
  • the grinding angle of the end face of the FA component 210 is equal to the inclination angle ⁇ of the receiving input waveguide unit in the silicon optical integrated chip 203, and the main body of the FA component 210 is inclined toward the direction of the central axis of the entire optical component.
  • the FA component 210 A side away from the silicon photonics integrated chip 203 is connected to the MPO/MT optical interface 202 through an optical fiber cable 211 .
  • Embodiments of the present invention provide another technical solution: a method for coupling silicon-optical multi-channel parallel optical components, comprising the following steps:
  • the jumper 701 is connected to an external optical device, the FA assembly 210 is fixed, and the coupling is completed.
  • the present invention has the beneficial effects as follows: an integrated silicon photonic chip is adopted, the transmitting part still adopts a two-way direct current laser group, the receiving chip is integrated in the silicon photonic chip, and the optical interface adopts the mature FA-MPO in the industry. It has the advantages of mature technology, high degree of integration, relatively low cost, and few coupling processes, and is one of the advantageous choices for rates above 400G.
  • FIG. 1 is a schematic diagram of a silicon photonics integrated chip according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a silicon photonics multi-channel parallel optical component of a silicon photonics integrated chip provided by an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a top view of a silicon-optical multi-channel parallel optical component of a silicon-optical integrated chip according to an embodiment of the present invention
  • FIG. 4 is a cross-sectional view of a side view of a silicon-optical multi-channel parallel optical component of a silicon-optical integrated chip provided by an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a laser group of a silicon-optical multi-channel parallel optical component of a silicon-optical integrated chip according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a side view angle of a receiving part of a silicon optical multi-channel parallel optical component of a silicon optical integrated chip according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of coupling and fiber connection of a silicon-optical multi-channel parallel optical component of a silicon-optical integrated chip according to an embodiment of the present invention.
  • an embodiment of the present invention provides a silicon photonics integrated chip, including a transmit input waveguide unit, a splitter unit, a modulator unit, a transmit output waveguide unit, a receive input waveguide unit, and a receive detector integrated inside the chip unit;
  • the transmit input waveguide unit is used to receive the optical signal input from the outside in the transmit part;
  • the splitter unit is used to split light;
  • the modulator unit is used to modulate the optical signal;
  • the transmit output waveguide unit used to output the optical signal modulated by the modulator unit to the outside world;
  • the receiving input waveguide unit is used to receive the optical signal input by the external link in the receiving part;
  • the receiving detector unit is used to convert the optical signal converted into photocurrent.
  • a transmit input waveguide unit, a splitter unit, a modulator unit, a transmit output waveguide unit, a receive input waveguide unit, and a receive detector unit are integrated in a chip, wherein both the transmit area and the receive area are integrated into the chip , which not only reduces the cost but also reduces the subsequent coupling process.
  • the transmit input waveguide unit includes a first transmit input waveguide 101-1 and a second transmit input waveguide 101-2
  • the splitter unit includes a first 3db splitter unit Splitter 102-1, second 3db splitter 102-2, first proportional splitter 103-1, second proportional splitter 103-2, third proportional splitter 103-3 and fourth proportional splitter
  • the modulator 103-4, the modulator unit includes a first MZ waveguide type modulator 104-1, a second MZ waveguide type modulator 104-2, a third MZ waveguide type modulator 104-3 and a fourth MZ waveguide type modulator 104-3
  • the modulator 104-4, the transmit output waveguide unit includes a first transmit output waveguide 105-4, a second transmit output waveguide 105-3, a third transmit output waveguide 105-2 and a fourth transmit output waveguide 105-1, so
  • the receiving input waveguide unit includes a first receiving input waveguide 106-1, a second receiving input
  • a receiving detector 107-1, a second receiving detector 107-2, a third receiving detector 107-3 and a fourth receiving detector 107-4, the first transmitting input waveguide 101-1, the first transmitting The 3db splitter 102-1, the first proportional splitter 103-1, the first MZ waveguide type modulator 104-1, and the first transmit output waveguide 105-4 are connected in sequence, and the first The receiving input waveguide 106-1 is in communication with the first receiving detector 107-1, the first transmitting input waveguide 101-1, the first 3db splitter 102-1, and the second proportional splitter 103- 2.
  • the second MZ waveguide type modulator 104-2 and the second transmit output waveguide 105-3 are connected in sequence, and the second receive input waveguide 106-2 is communicated with the second receive detector 107-2, The second transmit input waveguide 101-2, the second 3db splitter 102-2, the third proportional splitter 103-3, the third MZ waveguide type modulator 104-3, the The third transmit output waveguide 105-2 is connected in sequence, the third receive input waveguide 106-3 is connected with the third receive detector 107-3, the second transmit input waveguide 101-2, the second 3db branch 102-2, the fourth proportional splitter 103-4, the fourth MZ waveguide type modulator 104-4, and the fourth transmit output waveguide 105-1 are connected in sequence, and the fourth receive input waveguide 106-4 communicates with the fourth receiving detector 107-4.
  • the integrated chip further includes a monitoring detector unit, and the monitoring detector unit includes a first monitoring detector 108-1, a second monitoring detector 108-2, a third monitoring detector 108-3 and a fourth monitoring detector Detector 108-4, the first transmit input waveguide 101-1, the first 3db splitter 102-1, the first proportional splitter 103-1, the first MZ waveguide type modulator 104-1 and the loop where the first transmit output waveguide 105-4 is located are connected to the first monitoring detector 108-1, the first transmit input waveguide 101-1, the first 3db splitter 102 -1.
  • the monitoring detector unit includes a first monitoring detector 108-1, a second monitoring detector 108-2, a third monitoring detector 108-3 and a fourth monitoring detector Detector 108-4, the first transmit input waveguide 101-1, the first 3db splitter 102-1, the first proportional splitter 103-1, the first MZ waveguide type modulator 104-1 and the loop where the first transmit output waveguide 105-4 is located are connected to the first monitoring detector
  • the second monitoring detector is connected to the loop where the second proportional splitter 103-2, the second MZ waveguide type modulator 104-2 and the second transmission output waveguide 105-3 are located 108-2, the second transmit input waveguide 101-2, the second 3db splitter 102-2, the third proportional splitter 103-3, the third MZ waveguide type modulator 104- 3 and the loop where the third transmission output waveguide 105-2 is located is connected to the third monitoring detector 108-3, the second transmission input waveguide 101-2, the second 3db splitter 102-2 , the fourth proportional splitter 103-4, the fourth MZ waveguide type modulator 104-4 and the loop where the fourth transmission output waveguide 105-1 is located are connected with the fourth monitoring detector 108- 4.
  • first 3dB splitter 102-1 and the second 3dB splitter 102- 2 wherein the first transmit input waveguide 101-1 corresponds to the first 3dB splitter 102-1, and the second transmit input waveguide 101-2 corresponds to the second 3dB splitter 102-2; in the first 3dB splitter 102- A first proportional splitter 103-1 and a second proportional splitter 103-2 are arranged above the The proportional splitter 103-3 and the fourth proportional splitter 103-4, wherein the third proportional splitter 103-3 is located on the left side, and the right side of the second proportional splitter 103-2 is the third proportional splitter 103-3, wherein the first proportional splitter 103-1 and the third proportional splitter 103-3 are both 97:3 splitters, the second proportional splitter 103-2 and the fourth proportional splitter 103 -4 are all 3:97 splitters; the first ratio splitter 103-1
  • the third ratio splitter 103-3 outputs two waveguides, wherein the splitting ratio of the left waveguide arm is 97%, and the MZ is set above it.
  • the modulator 104-3 the light splitting ratio of the right waveguide arm is 3%, and a monitoring detector 108-3 is arranged above it.
  • the second proportional splitter 103-2 outputs two waveguides, of which the left waveguide arm splits light. The ratio is 3%, the monitoring detector 108-2 is set above it, the light splitting ratio of the right waveguide arm is 97%, and the MZ modulator 104-2 is set above it.
  • the fourth ratio splitter 103-4 outputs two In the strip waveguide, the light splitting ratio of the left waveguide arm is 3%, the monitoring detector 108-4 is arranged above it, and the light splitting ratio of the right waveguide arm is 97%, and the MZ modulator 104-4 is arranged above it.
  • the first proportional splitter 103-1, the second proportional splitter 103-2, the third proportional splitter 103-3 and the fourth proportional splitter 103-4 The adjustment range of the proportional relationship is between 95:5 ⁇ 99.5:0.5 or 0.5:99.5 ⁇ 5:95.
  • the 3:97 ratio splitter and the 97:3 ratio splitter are just a preferred ratio, and the splitting ratio is not limited. Adjust according to power needs.
  • an auxiliary waveguide unit is arranged between the transmitting output waveguide unit and the receiving input waveguide unit.
  • the auxiliary waveguide unit includes a first auxiliary waveguide 113-1, a second auxiliary waveguide 113-2, a third auxiliary waveguide 113-3 and a fourth auxiliary waveguide 113-4.
  • the auxiliary waveguide unit is self-loop coupled, all the The first auxiliary waveguide 113-1 is connected to the second auxiliary waveguide 113-2, and the third auxiliary waveguide 113-3 is connected to the fourth auxiliary waveguide 113-4.
  • Each waveguide in the transmitting input waveguide unit, each waveguide in the transmitting output waveguide unit, each waveguide in the receiving input waveguide unit, and each waveguide in the auxiliary waveguide unit are arranged obliquely.
  • Each waveguide in the transmitting input waveguide unit, each waveguide in the transmitting output waveguide unit, each waveguide in the receiving input waveguide unit, and each waveguide in the auxiliary waveguide unit are all located in the chip.
  • each waveguide is inclined in the same direction, and the inclination angle ⁇ is controlled between 6 and 12 degrees.
  • each waveguide in the transmitting and outputting waveguide unit each waveguide in the receiving and inputting waveguide unit, and each waveguide in the auxiliary waveguide unit, the spacing between adjacent two waveguides is 0.25/ cos( ⁇ ) mm.
  • two transmission input waveguides namely the first transmission input waveguide 101-1 and the second transmission input waveguide 101-2
  • four transmission output waveguides namely the fourth transmission The output waveguide 105-1, the third transmission output waveguide 105-2, the second transmission output waveguide 105-3, the first transmission output waveguide 105-4, the four receiving input waveguides, namely the first receiving input waveguide 106-1, the The second receiving input waveguide 106-2, the third receiving input waveguide 106-3, the fourth receiving input waveguide 106-4, four auxiliary waveguides, namely the first auxiliary waveguide 113-1, the second auxiliary waveguide 113-2, the third auxiliary waveguide
  • the auxiliary waveguide 113-3 and the fourth auxiliary waveguide 113-4 there are
  • the boundary end of the silicon photonics chip The first transmission input waveguide 101-1 and the second transmission input waveguide 101-2 are both located on the left side, and between the first transmission input waveguide 101-1 and the second transmission input waveguide 101-2 The distance between them is preferably 0.8-2 mm; on the right side of the second transmission input waveguide 101-2 are the fourth transmission output waveguide 105-1, the third transmission output waveguide 105-2, and the second transmission output waveguide 105. -3.
  • the first transmission output waveguide 105-4, the distance between the second transmission input waveguide 101-2 and the fourth transmission output waveguide 105-1 is preferably 1-2 mm; in the first transmission output waveguide 105-4 On the right side are the first auxiliary waveguide 113-1, the second auxiliary waveguide 113-2, the third auxiliary waveguide 113-3, and the fourth auxiliary waveguide 113-4, and on the right side of the fourth auxiliary waveguide 113-4 are The first receive input waveguide 106-1, the second receive input waveguide 106-2, the third receive input waveguide 106-3, the fourth receive input waveguide 106-4, and the twelve waveguides, namely the fourth transmit output waveguide 105- 1.
  • the third transmit output waveguide 105-2, the second transmit output waveguide 105-3, the first transmit output waveguide 105-4, the first receive input waveguide 106-1, the second receive input waveguide 106-2, the third receive Spacing between the input waveguide 106-3, the fourth receiving input waveguide 106-4, the first auxiliary waveguide 113-1, the second auxiliary waveguide 113-2, the third auxiliary waveguide 113-3, and the fourth auxiliary waveguide 113-4 All are standard 0.25/cos( ⁇ ) mm.
  • the integrated chip further includes a pad area 109 for transmitting high-speed signals, a pad area 110 for transmitting DC control signals, a pad area 111 for receiving high-speed signals, and a pad area 111 for receiving high-speed signals integrated on the surface of the chip.
  • the control signal pad area 112, the chip is rectangular, the transmitting high-speed signal pad area 109 and the receiving high-speed signal pad area 111 are both located at the boundary of the chip relative to the boundary where the transmission input waveguide unit is located, The transmitting DC control signal pad area 110 and the receiving control signal pad area 112 are respectively located at the other two boundaries.
  • the four MZ modulators are the first MZ modulator 104-1, the second MZ modulator 104-2, the third MZ modulator 104-3, and the fourth MZ modulator 104 in order from left to right -4, the MZ modulator connects four transmit output waveguides in sequence through waveguides: the first transmit output waveguide 105-4, the second transmit output waveguide 105-3, the third transmit output waveguide 105-2, and the fourth transmit output waveguide 105-1 .
  • the transmit DC control signal pad area 110 On the left side of the four MZ modulator regions is the transmit DC control signal pad area 110 , and above it is the transmit high speed signal pad area 109 .
  • a first receiving detector 107-1 is provided above the first receiving input waveguide 106-1, the second receiving input waveguide 106-2, the third receiving input waveguide 106-3, and the fourth receiving input waveguide 106-4 , the second receiving detector 107-2, the third receiving detector 107-3, the fourth receiving detector 107-4, the first receiving input waveguide 106-1, the second receiving input waveguide 106-2, the third receiving input
  • the waveguide 106-3 and the fourth receiving input waveguide 106-4 are sequentially connected to the first receiving detector 107-1, the second receiving detector 107-2, the third receiving detector 107-3, and the fourth receiving detector 107 through the waveguide -4.
  • the first receiving detector 107-1, the second receiving detector 107-2, the third receiving detector 107-3, and the fourth receiving detector 107-4 are located on the right side of the emission area and on the upper right of the entire chip.
  • a receiving high-speed signal pad area 111 is provided above the first receiving detector 107-1, the second receiving detector 107-2, the third receiving detector 107-3, and the fourth receiving detector 107-4, a receiving high-speed signal pad area 111 is provided, and on the right side A receiving control signal pad area 112 is provided.
  • the transmitting high-speed signal pad area 109 and the receiving high-speed signal pad area 111 are located on one side of the long boundary of the silicon photonic chip, and are parallel to the long boundary, and the transmitting DC control signal pad area 110 and the receiving control signal pad area 112 are located on the silicon photonic chip.
  • the first auxiliary waveguide 113-1, the second auxiliary waveguide 113-2, the third auxiliary waveguide 113-3 and the fourth auxiliary waveguide 113-4 can be used for self-loop coupling or can be suspended for use.
  • An auxiliary waveguide 113-1 is connected to the second auxiliary waveguide 113-2 through a waveguide, and the third auxiliary waveguide 113-3 and the fourth auxiliary waveguide 113-4 are connected through a waveguide.
  • the first transmission input waveguide 101-1 and the second transmission input waveguide 101-2 are specially designed stable mode waveguides with a length greater than 1 mm and an insertion loss of about 1 dB, so that any light beam input from the outside can pass through the first transmission input.
  • the waveguide 101-1 and the second input waveguide 101-2 have a stable single-mode field, and any light beam includes obliquely incident light beams, light beams exceeding or smaller than the theoretical single-mode aperture of the waveguide, non-uniform light beams, and multi-transverse mode fields. Beams, beams with multiple peaks in intensity, etc. Since the first transmission input waveguide 101-1 and the second transmission input waveguide 101-2 are stable mode waveguides, the light wave input to the 3dB splitter is a uniform single-mode field, and the light splitting ratio of the 3dB splitter is very stable, thus It also ensures the stability of the input mode fields of 2 97:3 ratio splitters, 2 3:97 ratio splitters, 4 MZ modulators and 4 monitoring detectors.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • an embodiment of the present invention provides a silicon-optical multi-channel parallel optical component, including a laser group 204, an FA component 210, and the above-mentioned silicon-optical integrated chip 203, the emission output waveguide unit and the The receiving and input waveguides are all connected to the FA assembly 210 , and the transmitting and input waveguide units are arranged in the same path as the laser group 204 .
  • a coupling lens group 205, an isolator 206, a prism group 207 and an emitter glass strip are arranged in sequence. 208.
  • a receiving end glass strip 209 is further provided between the FA component 210 and the silicon optical integrated chip 203 .
  • the component also includes a PCBA board 201, the PCBA board 201 is provided with a window 215 penetrating the upper and lower surfaces of the PCBA board 201, the silicon optical integrated chip 203, the laser group 204, the coupling lens group 205, The isolator 206 , the prism group 207 , the transmitting end glass strip 208 , the receiving end glass strip 209 and the FA component 210 are all placed in the window 215 .
  • the window 215 is provided with a heat sink 401, the silicon optical integrated chip 203, the laser group 204, the coupling lens group 205, the isolator 206, the prism group 207, and the emission end glass strip 208 , the receiving end glass strip 209 and the FA component 210 are all arranged on the heat sink 401 .
  • the heat sink 401 is in the shape of steps, the silicon photonics integrated chip 203 is arranged on the higher platform of the step shape, and the laser group 204, the coupling lens group 205, the The isolator 206 is described.
  • the lower surface of the PCBA board 201 is provided with a support plate 402 that blocks the window 215 , and the heat sink 401 is placed on the support plate 402 .
  • the isolator 206 is a dual-channel isolator, and the dual-channel isolator is bonded to the heat sink 401 . Both the laser group 204 and the coupling lens group 205 are adhered to the heat sink 401 .
  • the FA component 210 is suspended above the heat sink 401 .
  • a DSP chip 214 is arranged in the middle of the upper surface of the PCBA board 201 , and a window 215 is arranged at about 3/4 of the right side of the upper surface. The window 215 completely penetrates the PCBA board 201 and is symmetrically distributed along the central axis of the PCBA board 201 .
  • the silicon photonics integrated chip 203 , the laser group 204 , the coupling lens group 205 , the isolator 206 , the prism group 207 , the transmitting end glass strip 208 , the receiving end glass strip 209 , the FA component 210 and the heat sink 401 are all located within the area of the window 215 , the support plate 402 is located below the window 215 and completely covers the window 215 , is close to the PCBA board 201 , and is bonded under the PCBA board 201 through structural adhesive curing.
  • a heat sink 401 is provided above the support plate 402 and inside the window 215 , and the heat sink 401 is bonded to the top of the support plate 402 by a high thermal conductivity glue.
  • the heat sink 401 has a rectangular step shape, and a gap of 0.05 mm to 0.1 mm is reserved between the surrounding and the window 215 .
  • the heat sink 401 has two layers of surfaces, a high-level surface and a low-level surface, on which the silicon optical integrated chip 203 is fixed by a high thermal conductivity adhesive, and a laser group 204, a coupling lens group 205, and an isolator 206 and Prism group 207.
  • the silicon photonics integrated chip 203 completely covers the high-level surface of the heat sink 401 , and the upper surface of the silicon photonics integrated chip 203 is substantially equal to the upper surface of the PCBA board 201 in height.
  • the transmitting part includes two groups of transmitting elements, each group includes a laser, a coupling lens and a prism, and the isolator is shared by the two groups.
  • the prism group 207 is directly fixed on the right side of the silicon photonics integrated chip 203 by the refractive index matching glue.
  • the bottom of the prism group 207 is not in direct contact with the heat sink 401 and is suspended.
  • the corner is the emitting end glass strip 208 , and the emitting end glass strip 208 is directly bonded to the top of the silicon photonics integrated chip 203 and the left side of the prism group 207 for fixing the prism group 207 .
  • the centers of the first prism 207-1 and the second prism 207-2 are aligned one-to-one with the first transmission input waveguide 101-1 and the second transmission input waveguide 101-2.
  • the isolator 206 is disposed on the right side of the prism group 207 and is a conventional magneto-optical isolator with a U-shaped structure, which is inverted and bonded on the lower surface of the heat sink 401 .
  • On the right side of the isolator 206 is the coupling lens group 205, and the coupling lens group 205 is directly fixed on the lower surface of the heat sink 401 by UV dual-curing glue.
  • the laser group 204 On the right side of the coupling lens group 205 is the laser group 204 , the laser group 204 is directly fixed on the lower surface of the heat sink 401 by high thermal conductivity glue, and the laser group 204 is located at the right end of the heat sink 401 . Because the first emission input waveguide 101-1 and the second emission input waveguide 101-2 are arranged obliquely, a prism group 207 is used to refract the optical path, so that the transmission angle of the light beam emitted by the laser chip is the same as that of the first emission input waveguide 101- 1. The tilt angles of the second transmission input waveguide 101-2 are matched to obtain the maximum coupling efficiency.
  • the coupling lens group 205 may be a single lens type or a double lens type.
  • the main body of the receiving part is integrated inside the silicon photonics integrated chip 203 , and the outside is connected to the silicon photonics integrated chip 203 through the FA component 210 .
  • the FA component 210 has a total of 12 single-mode fibers, and the spacing between each core is 0.25 mm. In particular, the grinding angle of the end face of the FA component 210 is equal to the inclination angle ⁇ of the receiving input waveguide unit in the silicon optical integrated chip 203 .
  • the FA component 210 is directly bonded to the silicon photonics integrated chip 203 through the refractive index matching glue, and the 12-core optical fiber of the FA component 210 is connected to the twelve channels of the chip.
  • the four receiving input waveguides 106-4, the first auxiliary waveguide 113-1, the second auxiliary waveguide 113-2, the third auxiliary waveguide 113-3, and the fourth auxiliary waveguide 113-4 are aligned one-to-one to achieve low insertion loss.
  • a receiving end glass strip 209 is arranged on the upper right corner of the FA component 210 and the silicon photonics integrated chip 203 , and the receiving end glass strip 209 is directly bonded to the FA component 210 and the silicon photonics integrated chip 203 through refractive index matching glue.
  • the main body of the FA assembly 210 is inclined in the direction of the central axis of the entire optical assembly, so it will not exceed the window 215 , so it will not occupy the space of the PCBA board 201 , which is beneficial to the layout of the PCBA board 201 .
  • the FA assembly 210 is not in direct contact with the heat sink 401 , but is suspended above the heat sink 401 .
  • the FA assembly 210 is integrated with the optical fiber cable 211 , and the optical fiber cable 211 is suspended above the PCBA board 201 .
  • the component further includes a transmitter driver chip 212 and a receiver TIA chip 213 , and the transmitter driver chip 212 and the receiver TIA chip 213 are both located in The side of the silicon photonics integrated chip 203 away from the laser group 204 and the FA component 210, the transmitter driver chip 212 is located in the direction from the laser group 204 to the silicon photonics integrated chip 203, the The receiving end TIA chip 213 is located in the direction from the FA component 210 to the silicon photonics integrated chip 203 .
  • the setting direction of the silicon photonics integrated chip 203 satisfies: the transmitting high-speed signal pad area 109 and the receiving high-speed signal pad area 111 are located on the left side, close to the left border of the window 215, and the receiving control signal pad area 112 Located above, close to the upper boundary of the window 215 , the transmit DC control signal pad area 110 is located below, close to the lower boundary of the window 215 . In this way, the 12 waveguides of the silicon photonics integrated chip 203 are all located on the right side.
  • the transmitter driver chip 212 is located on the upper surface of the PCBA board 201 , on the right side of the DSP chip 214 , close to the left border of the window 215 , and close to the transmitting high-speed signal pad area 109 of the silicon photonics chip, and the receiver TIA chip 213 is located on the PCBA board 201 . , the right side of the DSP chip 214, the left border of the window 215, and the receiving high-speed signal pad area 111 of the silicon photonics chip.
  • the transmitter driver chip 212 can be close to the left border of the window 215, or can be at a certain distance from the left border of the window 215.
  • the high-speed output pad of the transmitter driver chip 212 and the The emission high-speed signal pad area 109 of the silicon photonics chip is directly gold wire bonded.
  • the high-speed output pad of the transmitter driver chip 212 is connected to the high-frequency signal set on the PCBA board 201.
  • Gold wire bonding is performed on the wiring, and then gold wire bonding is performed between the high frequency wiring provided on the PCBA board 201 and the emission high-speed signal pad area 109 of the silicon photonics chip. Because the receiving end TIA chip is close to the left border of the window 215, the high frequency pad of the receiving end TIA chip can be directly gold wire bonded to the receiving high speed signal pad area 111 of the silicon photonics chip.
  • the laser group 204 includes a first laser 204-1 and a second laser 204-2, the first laser 204-1 and the second laser 204-1
  • the lasers 204-2 each include a laser chip 501 and a ceramic heat sink 502, the laser chip 501 is eutectic above the ceramic heat sink 502, and the upper surface of the ceramic heat sink 502 has a positive electrode and a negative electrode of the laser chip 501 .
  • the laser chip 501 is a DC type high-power laser chip. The chip itself does not need to add high-frequency signals, but only for DC current.
  • the light-emitting direction of the laser chip 501 faces to the left, that is, the direction of the silicon photonics chip.
  • the light-emitting direction of the laser chip 501, the coupling lens group 205 and the isolator 206 are all parallel to the short boundary of the silicon photonics chip, and the light-emitting direction of the laser chip 501 is the same as that of the silicon photonics chip.
  • the coupling lens group 205 is coaxially arranged, so the light beam emitted from the laser chip 501 is still parallel to the short boundary of the silicon optical integrated chip 203 after passing through the coupling lens group 205 and the isolator 206 .
  • the grinding angle of the end face of the FA component 210 is equal to the inclination angle ⁇ of the receiving input waveguide unit in the silicon photonics integrated chip 203 , and the main body of the FA component 210 is Tilt in the direction of the central axis of the entire optical assembly.
  • a side of the FA component 210 away from the silicon optical integrated chip 203 is connected to the MPO/MT optical interface 202 through an optical fiber cable 211 .
  • the end of the optical fiber cable 211 is connected to the MPO/MT optical interface 202, and the MPO/MT optical interface 202 meets the optical interface of international standards, so the transmitting output optical interface and the receiving input optical interface of the entire parallel optical assembly are common Integrated inside the MPO/MT optical interface 202 .
  • an embodiment of the present invention provides a method for coupling a silicon-optical multi-channel parallel optical component, including the following steps: S1 , completing the silicon-optical integrated chip 203 , the laser group 204 , the coupling lens group 205 , and the isolator 206 and the assembly of the prism group 207 on the PCBA board 201; S2, turn on the laser group 204, make the response current of the monitoring detector unit maximum, solidify the coupling lens group 205; S3, turn on the response current of the receiving detector unit monitor, and connect the FA assembly 210 to an external jumper 701; S4, connect the jumper 701 to an external optical device, fix the FA assembly 210, and complete the coupling.
  • the external optical device includes a light source, an optical power meter, and the like.
  • the first method is to first complete the assembly of the silicon optical integrated chip 203, the assembly of the PCBA board 201, the assembly of the laser group 204, the assembly of the isolator 206, and the assembly of the prism group 207, and then turn on the laser group.
  • the response current of the monitoring detector unit is maximized, the coupling lens group 205 is cured, and then the MZ modulator is kept without bias voltage, and the response current monitoring of the receiving detector unit is turned on at the same time, and the MPO of the FA assembly 210 is connected to an external 1x8 MPO.
  • the corresponding four-way transmitting fiber of the MPO-FC jumper is connected to the four-channel optical power meter 702
  • the corresponding four-way receiving fiber of the MPO-FC jumper is connected to the four-channel light source 703
  • the FA component 210 is coupled to make the four channels
  • the four-channel optical power of the channel optical power meter 702 is the largest, the response current of the four-channel receiving detector 107 is the largest, and the FA assembly 210 is fixed.
  • the second is to first complete the assembly of the silicon photonics integrated chip 203, the PCBA board 201, the laser group 204, the isolator 206, and the prism group 207, and then the laser group 204 is turned on, so that the response current of the monitoring detector unit is maximized and cured Coupling the lens group 205, then keep the MZ modulator without bias voltage, turn on the response current monitoring of the receiving detector unit, connect the MPO of the FA component 210 to the 1x8 MPO-FC jumper 701, and the first auxiliary waveguide 113-1 , the second auxiliary waveguide 113-2, the third auxiliary waveguide 113-3, and the four fibers of the MPO-FC jumper corresponding to the fourth auxiliary waveguide 113-4 are sequentially connected to the light source 704, the optical power meter 705, the light source 706, the optical power The meter 707 is coupled to the FA assembly 210 so that the optical power of the optical power meters 705 and 707 is maximized, and the FA assembly 210 is fixed.
  • the coupling method of the auxiliary waveguide 113 due to the coupling method of the auxiliary waveguide 113, it is only necessary to connect a 1x8 MPO-FC jumper to the optical part of the optical component to realize the coupling, and the simple strip of the ribbon fiber 211 of the FA component 210 is maintained.
  • the shape structure is beneficial to the spatial distribution of the optical module.

Abstract

一种硅光集成芯片（203）、一种硅光多通道并行光组件及耦合方法涉及光通信技术领域，硅光集成芯片（203）包括集成于芯片（203）内部的发射输入波导单元、分路器单元、调制器单元、发射输出波导单元、接收输入波导单元以及接收探测器单元。硅光多通道并行光组件采用集成的硅光芯片（203），发射部分仍采用两路直流激光器组（204），接收芯片集成在硅光芯片（203）内部，光接口采用业界成熟的FA-MPO，具有工艺成熟，集成程度高，成本相对较低，耦合工序少等优点，是400G以上速率的优势选择之一。

Description

硅光多通道并行光组件及其耦合方法 技术领域
本发明涉及光通信技术领域，具体为一种硅光集成芯片、硅光多通道并行光组件及其耦合方法。
背景技术
对于多通道并行光组件，多用于40Gpbs以上速率的场景，如40G、100G、200G以及400G、800G等应用中，在数据中心的应用中，通常是中短距离的数据传输，传输距离为50-2Km，使用的是SR、DR、FR等多种产品。通过400G、800G等高速光模块而言，光纤的色散是制约光模块传输距离的主要因素，EML型激光器以获得窄谱宽、外调制的方法是获得稳定调制并且色散低的技术方案，也是现今市场的主流的选择，如专利CN110764202A。然而应用于400G、800G速率的EML型激光器芯片，属于高端有技术瓶颈的核心芯片，价格昂贵，而并行光组件意味着采用多路EML芯片，所以光组件的物料成本很高。如何降低并行光组件的成本一直是业界努力的方向。
发明内容
本发明的目的在于提供一种硅光集成芯片、硅光多通道并行光组件及其耦合方法，通过硅光集成芯片进行并行光组件的封装可以极大地降低成本。
为实现上述目的，本发明实施例提供如下技术方案：一种硅光集成芯片，包括激光器组204、FA组件210以及硅光集成芯片203，所述发射输出波导单元和所述接收输入波导均与所述FA组件210对接，所述发射输入波导单元与所述激光器组204同路设置，沿所述激光器组204至所述硅光集成芯片203的方向，所述激光器组204和硅光集成芯片203之间还依次设有耦合透镜组205、隔离器206、棱镜组207以及发射端玻璃条208。
进一步，沿所述FA组件210至所述硅光集成芯片203的方向，所述FA组件210和所述硅光集成芯片203之间还设有接收端玻璃条209。
进一步，还包括PCBA板201，所述PCBA板201上开设有贯通所述PCBA板201的上下表面的窗口215，所述硅光集成芯片203、所述激光器组204、所述耦合透镜组205、所述隔离器206、所述棱镜组207、所述发射端玻璃条208、所述接收端玻璃条209以及所述FA组件210均置于所述窗口215中。
进一步，所述窗口215内设置有热沉401，所述硅光集成芯片203、所述激光器组204、所述耦合透镜组205、所述隔离器206、所述棱镜组207、所述发射端玻璃条208、所述接收端玻璃条209以及所述FA组件210均设在热沉401上。
进一步，所述热沉401呈台阶状，所述台阶状的较高的平台上设有所述硅光集成芯片203，较低的平台上设有所述激光器组204、所述耦合透镜组205、所述隔离器206。
进一步，所述PCBA板201下表面设有封堵所述窗口215的支撑板402，所述热沉401置于所述支撑板402上。
进一步，还包括发射端driver芯片212以及接收端TIA芯片213，所述发射端driver芯片212和所述接收端TIA芯片213均位于所述硅光集成芯片203远离所述激光器组204和所述FA组件210的一侧，所述发射端driver芯片212位于所述激光器组204至所述硅 光集成芯片203的方向上，所述接收端TIA芯片213位于所述FA组件210至所述硅光集成芯片203的方向上。
进一步，所述激光器组204包括第一激光器204-1和第二激光器204-2，所述第一激光器204-1和所述第二激光器204-2均包括激光器芯片501和陶瓷热沉502，激光器芯片501共晶在所述陶瓷热沉502上方，所述陶瓷热沉502的上表面具有所述激光器芯片501的正电极和负电极。
进一步，所述FA组件210端面研磨角度，角度等于硅光集成芯片203中接收输入波导单元的倾斜角θ，并且FA组件210的主体是向整个光组件中心轴的方向倾斜，所述FA组件210远离所述硅光集成芯片203的一侧通过光纤线缆211连接有MPO/MT光接口202。
本发明实施例提供另一种技术方案：一种硅光多通道并行光组件的耦合方法，包括如下步骤：
S1，完成硅光集成芯片203、激光器组204、耦合透镜组205、隔离器206以及棱镜组207在PCBA板201上的组装；
S2，开启所述激光器组204，使得监控探测器单元的响应电流最大，固化所述耦合透镜组205；
S3，打开接收探测器单元的响应电流监控，并使FA组件210外接跳线701；
S4，所述跳线701接外部光器件，固定所述FA组件210，完成耦合。
与现有技术相比，本发明的有益效果是：采用集成的硅光芯片，发射部分仍采用两路直流激光器组，接收芯片集成在硅光芯片内部，光接口采用业界成熟的FA-MPO，具有工艺成熟，集成程度高，成本相对较低，耦合工序少等优点，是400G以上速率的优势选择之一。
附图说明
图1为本发明实施例提供的一种硅光集成芯片的示意图；
图2为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的示意图；
图3为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的俯视视角的示意图；
图4为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的侧视视角的剖视图；
图5为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的激光器组的示意图；
图6为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的接收部分的侧视视角的示意图；
图7为本发明实施例提供的一种硅光集成芯片的硅光多通道并行光组件的耦合接纤示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本 发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
实施例一：
请参阅图1，本发明实施例提供一种硅光集成芯片，包括集成于芯片内部的发射输入波导单元、分路器单元、调制器单元、发射输出波导单元、接收输入波导单元以及接收探测器单元；所述发射输入波导单元，用于在发射部分接收外界输入的光信号；所述分路器单元，用于分光；所述调制器单元，用于调制光信号；所述发射输出波导单元，用于向外界输出所述调制器单元调制后的光信号；所述接收输入波导单元，用于在接收部分接收外部链路输入的光信号；所述接收探测器单元，用于将光信号转换成光电流。在本实施例中，在芯片中集成发射输入波导单元、分路器单元、调制器单元、发射输出波导单元、接收输入波导单元以及接收探测器单元，其中将发射区域和接收区域均集成于芯片中，既降低了成本还减少了后续的耦合工序。
作为本发明实施例的优化方案，请参阅图1，所述发射输入波导单元包括第一发射输入波导101-1和第二发射输入波导101-2，所述分路器单元包括第一3db分路器102-1、第二3db分路器102-2、第一比例分路器103-1、第二比例分路器103-2、第三比例分路器103-3以及第四比例分路器103-4，所述调制器单元包括第一MZ波导型调制器104-1、第二MZ波导型调制器104-2、第三MZ波导型调制器104-3以及第四MZ波导型调制器104-4，所述发射输出波导单元包括第一发射输出波导105-4、第二发射输出波导105-3、第三发射输出波导105-2以及第四发射输出波导105-1，所述接收输入波导单元包括第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3以及第四接收输入波导106-4，所述接收探测器单元包括第一接收探测器107-1、第二接收探测器107-2、第三接收探测器107-3以及第四接收探测器107-4，所述第一发射输入波导101-1、所述第一3db分路器102-1、所述第一比例分路器103-1、所述第一MZ波导型调制器104-1以及所述第一发射输出波导105-4依次连通，所述第一接收输入波导106-1和第一接收探测器107-1连通，所述第一发射输入波导101-1、所述第一3db分路器102-1、所述第二比例分路器103-2、所述第二MZ波导型调制器104-2、所述第二发射输出波导105-3依次连通，所述第二接收输入波导106-2以和第二接收探测器107-2连通，所述第二发射输入波导101-2、所述第二3db分路器102-2、所述第三比例分路器103-3、所述第三MZ波导型调制器104-3、所述第三发射输出波导105-2依次连通，所述第三接收输入波导106-3和第三接收探测器107-3连通，所述第二发射输入波导101-2、所述第二3db分路器102-2、所述第四比例分路器103-4、所述第四MZ波导型调制器104-4、所述第四发射输出波导105-1依次连通，所述第四接收输入波导106-4和第四接收探测器107-4连通。优选的，本集成芯片还包括监控探测器单元，所述监控探测器单元包括第一监控探测器108-1、第二监控探测器108-2、第三监控探测器108-3以及第四监控探测器108-4，所述第一发射输入波导101-1、所述第一3db分路器102-1、所述第一比例分路器103-1、所述第一MZ波导型调制器104-1以及所述第一发射输出波导105-4所在的回路连接有所述第一监控探测器108-1，所述第一发射输入波导101-1、所述第一3db分路器102-1、所述第二比例分路器103-2、所述第二MZ波 导型调制器104-2以及所述第二发射输出波导105-3所在的回路连接有所述第二监控探测器108-2，所述第二发射输入波导101-2、所述第二3db分路器102-2、所述第三比例分路器103-3、所述第三MZ波导型调制器104-3以及所述第三发射输出波导105-2所在的回路连接有所述第三监控探测器108-3，所述第二发射输入波导101-2、所述第二3db分路器102-2、所述第四比例分路器103-4、所述第四MZ波导型调制器104-4以及所述第四发射输出波导105-1所在的回路连接有所述第四监控探测器108-4。在本实施例中，对于发射区域，在第一发射输入波导101-1、第二发射输入波导101-2的上方依次是第一3dB分路器102-1、第二3dB分路器102-2，其中第一发射输入波导101-1对应第一3dB分路器102-1、第二发射输入波导101-2对应第二3dB分路器102-2；在第一3dB分路器102-1上方设置第一比例分路器103-1和第二比例分路器103-2，其中第一分路器103-1位于左侧，在第二3dB分路器102-2上方设置第三比例分路器103-3和第四比例分路器103-4，其中第三分路器103-3位于左侧，第二比例分路器103-2的右侧是第三比例分路器103-3，其中第一比例分路器103-1和第三比例分路器103-3均为97:3分路器，第二比例分路器103-2和第四比例分路器103-4均为3:97分路器；在第一比例分路器103-1输出两条波导，其中左侧波导臂分光比例是97％，其上方设置MZ调制器104-1，右侧波导臂分光比例是3％，其上方设置监控探测器108-1，同样的，在第三比例分路器103-3输出两条波导，其中左侧波导臂分光比例是97％，其上方设置MZ调制器104-3，右侧波导臂分光比例是3％，其上方设置监控探测器108-3，同样的，在第二比例分路器103-2输出两条波导，其中左侧波导臂分光比例是3％，其上方设置监控探测器108-2，右侧波导臂分光比例是97％，其上方设置MZ调制器104-2，同样的，在第四比例分路器103-4输出两条波导，其中左侧波导臂分光比例是3％，其上方设置监控探测器108-4，右侧波导臂分光比例是97％，其上方设置MZ调制器104-4。优选的，所述第一比例分路器103-1、所述第二比例分路器103-2、所述第三比例分路器103-3以及所述第四比例分路器103-4的比例关系的调整范围在95：5～99.5：0.5之间或0.5：99.5～5：95，3：97比例分路器和97：3比例分路器只是一个优选比例，分光比不限，可根据功率需要调整。
作为本发明实施例的优化方案，请参阅图1，所述发射输出波导单元和所述接收输入波导单元之间设有辅助波导单元。所述辅助波导单元包括第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3以及第四辅助波导113-4，当所述辅助波导单元自环耦合时，所述第一辅助波导113-1与所述第二辅助波导113-2连接，所述第三辅助波导113-3与所述第四辅助波导113-4连接。所述发射输入波导单元中的各条波导、所述发射输出波导单元中的各条波导、所述接收输入波导单元中的各条波导以及所述辅助波导单元中的各条波导均倾斜设置。所述发射输入波导单元中的各条波导、所述发射输出波导单元中的各条波导、所述接收输入波导单元中的各条波导以及所述辅助波导单元中的各条波导均位于芯片的同一条边界处，且各波导均朝同一方向倾斜设置，倾斜的角度θ控制在6～12度之间。所述发射输出波导单元中的各条波导、所述接收输入波导单元中的各条波导以及所述辅助波导单元中的各条波导中，相邻的两条波导之间的间距均为0.25/cos(θ)毫米。在本实施例中，在芯片的最下端设置两路发射输入波导，即所述第一发射输入波导101-1和所述第二 发射输入波导101-2，四路发射输出波导即第四发射输出波导105-1、第三发射输出波导105-2、第二发射输出波导105-3、第一发射输出波导105-4，四路接收输入波导，即第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4，四路辅助波导，即第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3、第四辅助波导113-4，总计14条波导，14条波导全部倾斜设置，并且倾斜方向是向左倾斜，倾斜角度为θ，以6-12度为宜，并且全部位于硅光芯片的边界端部。其中所述第一发射输入波导101-1和所述第二发射输入波导101-2均位于左侧，所述第一发射输入波导101-1和所述第二发射输入波导101-2之间的间距以0.8-2毫米为宜；在所述第二发射输入波导101-2的右侧依次是第四发射输出波导105-1、第三发射输出波导105-2、第二发射输出波导105-3、第一发射输出波导105-4，第二发射输入波导101-2与第四发射输出波导105-1之间的间距以1-2毫米为宜；在第一发射输出波导105-4的右侧依次是第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3、第四辅助波导113-4，在第四辅助波导113-4的右侧依次是第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4，并且十二路波导，即第四发射输出波导105-1、第三发射输出波导105-2、第二发射输出波导105-3、第一发射输出波导105-4、第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4、第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3以及第四辅助波导113-4之间的间距全部是标准的0.25/cos(θ)毫米。
作为本发明实施例的优化方案，请参阅图1，本集成芯片还包括集成于芯片表面的发射高速信号焊盘区109、发射直流控制信号焊盘区110、接收高速信号焊盘区111以及接收控制信号焊盘区112，所述芯片呈长方形，所述发射高速信号焊盘区109和所述接收高速信号焊盘区111均位于芯片相对所述发射输入波导单元所处的边界的边界处，所述发射直流控制信号焊盘区110和所述接收控制信号焊盘区112分别位于另外两个边界处。在本实施例中，四个MZ调制器从左到右依次是第一MZ调制器104-1、第二MZ调制器104-2、第三MZ调制器104-3、第四MZ调制器104-4，MZ调制器通过波导依次连接四个发射输出波导第一发射输出波导105-4、第二发射输出波导105-3、第三发射输出波导105-2、第四发射输出波导105-1。在四个MZ调制器区域的左侧是发射直流控制信号焊盘区110，上方是发射高速信号焊盘区109。对于接收区域，第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4的上方设置第一接收探测器107-1、第二接收探测器107-2、第三接收探测器107-3、第四接收探测器107-4，第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4通过波导依次连接第一接收探测器107-1、第二接收探测器107-2、第三接收探测器107-3、第四接收探测器107-4。第一接收探测器107-1、第二接收探测器107-2、第三接收探测器107-3、第四接收探测器107-4位于发射区域的右侧，位于整个芯片的右上方。在第一接收探测器107-1、第二接收探测器107-2、第三接收探测器107-3、第四接收探测器107-4的上方设置接收高速信号焊盘区111，在右侧设置接收控制信号焊盘区112。发射高速信号焊盘区109和接收高速信号焊盘区111位于硅光芯片的长边界的一侧，并平行于长边界， 发射直流控制信号焊盘区110和接收控制信号焊盘区112位于硅光芯片的短边界的一侧，并平行于短边界。第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3以及第四辅助波导113-4，可用于自环耦合，也可悬空不用，在自环耦合时，第一辅助波导113-1与第二辅助波导113-2通过波导连接，第三辅助波导113-3与第四辅助波导113-4通过波导连接。第一发射输入波导101-1、第二发射输入波导101-2是经过特殊设计的稳模波导，长度大于1毫米，具有约1dB的插入损耗，使得从外界输入的任意光束通过第一发射输入波导101-1、第二发射输入波导101-2之后具有稳定的单模场，任意光束包括倾斜入射的光束、超过或小于波导理论单模口径的光束、不均匀的光束、多横模场的光束、强度多峰的光束等等。由于第一发射输入波导101-1、第二发射输入波导101-2是稳模波导，所以输入到3dB分路器的光波是均匀的单模场，3dB分路器的分光比例非常稳定，从而也确保了2个97：3比例分路器、2个3：97比例分路器、4个MZ调制器以及4个监控探测器的输入模场的稳定性。
实施例二：
请参阅图1至图6，本发明实施例提供一种硅光多通道并行光组件，包括激光器组204、FA组件210、以及上述的硅光集成芯片203，所述发射输出波导单元和所述接收输入波导均与所述FA组件210对接，所述发射输入波导单元与所述激光器组204同路设置。沿所述激光器组至所述硅光集成芯片203的方向，所述激光器组204和硅光集成芯片203之间还依次设有耦合透镜组205、隔离器206、棱镜组207以及发射端玻璃条208。沿所述FA组件210至所述硅光集成芯片203的方向，所述FA组件210和所述硅光集成芯片203之间还设有接收端玻璃条209。本组件还包括PCBA板201，所述PCBA板201上开设有贯通所述PCBA板201的上下表面的窗口215，所述硅光集成芯片203、所述激光器组204、所述耦合透镜组205、所述隔离器206、所述棱镜组207、所述发射端玻璃条208、所述接收端玻璃条209以及所述FA组件210均置于所述窗口215中。所述窗口215内设置有热沉401，所述硅光集成芯片203、所述激光器组204、所述耦合透镜组205、所述隔离器206、所述棱镜组207、所述发射端玻璃条208、所述接收端玻璃条209以及所述FA组件210均设在热沉401上。所述热沉401呈台阶状，所述台阶状的较高的平台上设有所述硅光集成芯片203，较低的平台上设有所述激光器组204、所述耦合透镜组205、所述隔离器206。所述PCBA板201下表面设有封堵所述窗口215的支撑板402，所述热沉401置于所述支撑板402上。优选的，所述隔离器206为双通道隔离器，所述双通道隔离器粘接在所述热沉401上。所述激光器组204以及所述耦合透镜组205均粘接在所述热沉401上。所述FA组件210悬设于所述热沉401的上方。在本实施例中，在PCBA板201的上表面中部设置DSP芯片214，在上表面右侧约3/4设置窗口215，窗口215完全贯通PCBA板201，并且沿PCBA板201的中心轴对称分布。硅光集成芯片203、激光器组204、耦合透镜组205、隔离器206、棱镜组207、发射端玻璃条208、接收端玻璃条209、FA组件210以及热沉401全部位于窗口215的区域之内，支撑板402位于窗口215的下方，并且完全覆盖窗口215，紧贴PCBA板201，通过结构胶固化粘接在PCBA板201的下方。在支撑板402的上方、窗口215的内部设置热沉401，热沉401通过高导热胶粘接在支撑板402的上方。热 沉401呈现长方形台阶状，四周与窗口215之间预留0.05毫米-0.1毫米的缝隙。热沉401有两层表面，一高层表面和一低层表面，在高层表面上通过高导热胶固定硅光集成芯片203，在低层表面上设置有激光器组204、耦合透镜组205以及隔离器206和棱镜组207。硅光集成芯片203完全覆盖热沉401的高层表面，在高度上硅光集成芯片203的上表面与PCBA板201的上表面基本持平。发射部分共包含两组发射元件，每组各包含一个激光器、耦合透镜和棱镜，其中隔离器是两组共用。棱镜组207通过折射率匹配胶直接固定在硅光集成芯片203的右侧面，棱镜组207的底部与热沉401没有直接接触，是悬空的，在棱镜组207与硅光集成芯片203的左上角是发射端玻璃条208，发射端玻璃条208直接粘接在硅光集成芯片203的上方、棱镜组207的左侧，用于固定棱镜组207。第一棱镜207-1、第二棱镜207-2的中心与第一发射输入波导101-1、第二发射输入波导101-2是一一对齐的。隔离器206设置于棱镜组207的右侧，是常规的磁光型隔离器，结构是U型，倒扣并粘接在热沉401的低层表面上。在隔离器206的右侧是耦合透镜组205，耦合透镜组205通过紫外双固化胶直接固定在热沉401的低层表面上。在耦合透镜组205的右侧是激光器组204，激光器组204通过高导热胶直接固定在热沉401的低层表面上，激光器组204位于热沉401的右端。因为第一发射输入波导101-1、第二发射输入波导101-2是倾斜设置的，所以采用棱镜组207用于转折光路，使得激光器芯片发射的光束的传输角度与第一发射输入波导101-1、第二发射输入波导101-2的倾斜角度匹配，以获得最大的耦合效率。耦合透镜组205可以是单透镜型，也可以是双透镜型。接收部分的主体集成在硅光集成芯片203的内部，外部通过FA组件210与硅光集成芯片203对接。FA组件210共有12芯单模光纤，每芯的间距分别是0.25毫米，特殊的是，FA组件210端面研磨角度，角度等于硅光集成芯片203中接收输入波导单元的倾斜角θ。FA组件210通过折射率匹配胶与硅光集成芯片203直接粘接在一起，并且FA组件210的12芯光纤与芯片的十二路所述第四发射输出波导105-1、第三发射输出波导105-2、第二发射输出波导105-3、第一发射输出波导105-4、第一接收输入波导106-1、第二接收输入波导106-2、第三接收输入波导106-3、第四接收输入波导106-4、第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3以及第四辅助波导113-4一一对齐，以实现低的插入损耗。在FA组件210与硅光集成芯片203的右上角设置接收端玻璃条209，接收端玻璃条209通过折射率匹配胶与FA组件210、硅光集成芯片203直接粘接在一起。按此倾斜方式的FA组件210的主体是向整个光组件中心轴的方向倾斜的，所以不会超出窗口215，因此不会占用PCBA板201的空间，利于PCBA板201的布板。另外FA组件210与热沉401并没有直接接触，而是悬空在热沉401的上方。FA组件210与光纤线缆211是一体的，光纤线缆211悬空在PCBA板201的上方。
作为本发明实施例的优化方案，请参阅图1至图6，本组件还包括发射端driver芯片212以及接收端TIA芯片213，所述发射端driver芯片212和所述接收端TIA芯片213均位于所述硅光集成芯片203远离所述激光器组204和所述FA组件210的一侧，所述发射端driver芯片212位于所述激光器组204至所述硅光集成芯片203的方向上，所述接收端TIA芯片213位于所述FA组件210至所述硅光集成芯片203的方向上。在本实施例中，硅光集成芯片203的设置方向满足：发射高速信号焊盘区109和接收高速信号焊盘区111 位于左侧，靠近窗口215的左侧边界，接收控制信号焊盘区112位于上方，靠近窗口215的上方边界，发射直流控制信号焊盘区110位于下方，靠近窗口215的下方边界。按此方式，硅光集成芯片203的12条波导全部位于右侧。发射端driver芯片212位于PCBA板201的上表面、DSP芯片214的右侧、靠近窗口215的左侧边界、靠近硅光芯片的发射高速信号焊盘区109，接收端TIA芯片213位于PCBA板201的上表面、DSP芯片214的右侧、紧靠窗口215的左侧边界、靠近硅光芯片的接收高速信号焊盘区111。发射端driver芯片212可以紧靠窗口215的左侧边界，也可以距离窗口215的左侧边界一定的距离，当紧靠窗口215的左侧边界时，发射端driver芯片212的高速输出焊盘与硅光芯片的发射高速信号焊盘区109直接进行金丝键合，当距离窗口215的左侧边界一定的距离时，发射端driver芯片212的高速输出焊盘与PCBA板201上设置的高频走线进行金丝键合，再将PCBA板201上设置的高频走线与硅光芯片的发射高速信号焊盘区109进行金丝键合。因接收端TIA芯片紧靠窗口215的左侧边界，所以接收端TIA芯片的高频焊盘可与硅光芯片的接收高速信号焊盘区111直接进行金丝键合。
作为本发明实施例的优化方案，请参阅图1至图6，所述激光器组204包括第一激光器204-1和第二激光器204-2，所述第一激光器204-1和所述第二激光器204-2均包括激光器芯片501和陶瓷热沉502，激光器芯片501共晶在所述陶瓷热沉502上方，所述陶瓷热沉502的上表面具有所述激光器芯片501的正电极和负电极。在本实施例中，激光器芯片501是直流型大功率激光器芯片，芯片本身不需要加高频信号，仅供直流电流，激光器芯片501共晶在陶瓷热沉502的上方，位于陶瓷热沉502的左侧，陶瓷热沉502的上表面共两个电极层，分别是激光器芯片501的正、负电极。激光器芯片501的出光方向朝向左侧，即朝向硅光芯片方向，激光器芯片501的出光方向、耦合透镜组205和隔离器206均平行于硅光芯片的短边界，并且激光器芯片501的出光方向与耦合透镜组205同轴设置，所以激光器芯片501出射的光束经过耦合透镜组205、隔离器206之后仍平行于硅光集成芯片203的短边界。
作为本发明实施例的优化方案，请参阅图1至图6，所述FA组件210端面研磨角度，角度等于硅光集成芯片203中接收输入波导单元的倾斜角θ，并且FA组件210的主体是向整个光组件中心轴的方向倾斜。所述FA组件210远离所述硅光集成芯片203的一侧通过光纤线缆211连接有MPO/MT光接口202。在本实施例中，光纤线缆211的端部连接MPO/MT光接口202，MPO/MT光接口202满足国际标准的光接口，所以整个并行光组件的发射输出光接口与接收输入光接口共同集成在MPO/MT光接口202内部。
实施例三：
请参阅图1至图7，本发明实施例提供一种硅光多通道并行光组件的耦合方法，包括如下步骤：S1，完成硅光集成芯片203、激光器组204、耦合透镜组205、隔离器206以及棱镜组207在PCBA板201上的组装；S2，开启所述激光器组204，使得监控探测器单元的响应电流最大，固化所述耦合透镜组205；S3，打开接收探测器单元的响应电流监控，并使FA组件210外接跳线701；S4，所述跳线701接外部光器件，固定所述FA组件210，完成耦合。在本实施例中，该外部光器件包括光源、光功率计等。具体地，整个光组件的 耦合方法有两种，第一种：先完成硅光集成芯片203组装、PCBA板201组装、激光器组204组装、隔离器206组装、棱镜组207组装，然后开启激光器组204，使得监控探测器单元的响应电流最大，固化耦合透镜组205，接着保持MZ调制器不加偏置电压，同时打开接收探测器单元的响应电流监控，将FA组件210的MPO外接1x8的MPO-FC跳线701，MPO-FC跳线的对应的四路发射纤接四通道光功率计702，MPO-FC跳线的对应的四路接收纤接四通道光源703，耦合FA组件210使得四通道光功率计702的四路光功率最大、四路接收探测器107的响应电流最大，固定FA组件210。第二种，先完成硅光集成芯片203组装、PCBA板201组装、激光器组204组装、隔离器206组装、棱镜组207组装，然后开启激光器组204，使得监控探测器单元的响应电流最大，固化耦合透镜组205，接着保持MZ调制器不加偏置电压，同时打开接收探测器单元的响应电流监控，将FA组件210的MPO外接1x8的MPO-FC跳线701，第一辅助波导113-1、第二辅助波导113-2、第三辅助波导113-3以及第四辅助波导113-4对应的MPO-FC跳线的四根纤依次接光源704、光功率计705、光源706、光功率计707，耦合FA组件210，使得光功率计705、707的光功率最大，固定FA组件210。特别是对于第二种耦合方法，由于辅助波导113的耦合方法，只需要在光组件光部接1x8的MPO-FC跳线即可实现耦合，保持了FA组件210带状纤211的简洁的带状结构，利于光模块的空间分布。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。

Claims (10)

  1. 一种硅光多通道并行光组件，其特征在于：包括激光器组(204)、FA组件(210)以及硅光集成芯片(203)，所述发射输出波导单元和所述接收输入波导均与所述FA组件(210)对接，所述发射输入波导单元与所述激光器组(204)同路设置，沿所述激光器组(204)至所述硅光集成芯片(203)的方向，所述激光器组(204)和硅光集成芯片(203)之间还依次设有耦合透镜组(205)、隔离器(206)、棱镜组(207)以及发射端玻璃条(208)。
  2. 如权利要求1所述的硅光多通道并行光组件，其特征在于：沿所述FA组件(210)至所述硅光集成芯片(203)的方向，所述FA组件(210)和所述硅光集成芯片(203)之间还设有接收端玻璃条(209)。
  3. 如权利要求2所述的硅光多通道并行光组件，其特征在于：还包括PCBA板(201)，所述PCBA板(201)上开设有贯通所述PCBA板(201)的上下表面的窗口(215)，所述硅光集成芯片(203)、所述激光器组(204)、所述耦合透镜组(205)、所述隔离器(206)、所述棱镜组(207)、所述发射端玻璃条(208)、所述接收端玻璃条(209)以及所述FA组件(210)均置于所述窗口(215)中。
  4. 如权利要求3所述的硅光多通道并行光组件，其特征在于：所述窗口(215)内设置有热沉(401)，所述硅光集成芯片(203)、所述激光器组(204)、所述耦合透镜组(205)、所述隔离器(206)、所述棱镜组(207)、所述发射端玻璃条(208)、所述接收端玻璃条(209)以及所述FA组件(210)均设在热沉(401)上。
  5. 如权利要求4所述的硅光多通道并行光组件，其特征在于：所述热沉(401)呈台阶状，所述台阶状的较高的平台上设有所述硅光集成芯片(203)，较低的平台上设有所述激光器组(204)、所述耦合透镜组(205)、所述隔离器(206)。
  6. 如权利要求4所述的硅光多通道并行光组件，其特征在于：所述PCBA板(201)下表面设有封堵所述窗口(215)的支撑板(402)，所述热沉(401)置于所述支撑板(402)上。
  7. 如权利要求1所述的硅光多通道并行光组件，其特征在于：还包括发射端driver芯片(212)以及接收端TIA芯片(213)，所述发射端driver芯片(212)和所述接收端TIA芯片(213)均位于所述硅光集成芯片(203)远离所述激光器组(204)和所述FA组件(210)的一侧，所述发射端driver芯片(212)位于所述激光器组(204)至所述硅光集成芯片(203)的方向上，所述接收端TIA芯片(213)位于所述FA组件(210)至所述硅光集成芯片(203)的方向上。
  8. 如权利要求1所述的硅光多通道并行光组件，其特征在于：所述激光器组(204)包括第一激光器(204-1)和第二激光器(204-2)，所述第一激光器(204-1)和所述第二激光器(204-2)均包括激光器芯片(501)和陶瓷热沉(502)，激光器芯片(501)共晶在所述陶瓷热沉(502)上方，所述陶瓷热沉(502)的上表面具有所述激光器芯片(501)的正电极和负电极。
  9. 如权利要求1所述的硅光多通道并行光组件，其特征在于：所述FA组件(210)端面研磨角度，角度等于硅光集成芯片(203)中接收输入波导单元的倾斜角θ，并且FA组件 (210)的主体是向整个光组件中心轴的方向倾斜，所述FA组件(210)远离所述硅光集成芯片(203)的一侧通过光纤线缆(211)连接有MPO/MT光接口(202)。
  10. 一种硅光多通道并行光组件的耦合方法，其特征在于，包括如下步骤：
    S1，完成硅光集成芯片(203)、激光器组(204)、耦合透镜组(205)、隔离器(206)以及棱镜组(207)在PCBA板(201)上的组装；
    S2，开启所述激光器组(204)，使得监控探测器单元的响应电流最大，固化所述耦合透镜组(205)；
    S3，打开接收探测器单元的响应电流监控，并使FA组件(210)外接跳线(701)；
    S4，所述跳线(701)接外部光器件，固定所述FA组件(210)，完成耦合。
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