WO2022210617A1 - Semiconductor device and semiconductor system - Google Patents

Semiconductor device and semiconductor system Download PDF

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Publication number
WO2022210617A1
WO2022210617A1 PCT/JP2022/015219 JP2022015219W WO2022210617A1 WO 2022210617 A1 WO2022210617 A1 WO 2022210617A1 JP 2022015219 W JP2022015219 W JP 2022015219W WO 2022210617 A1 WO2022210617 A1 WO 2022210617A1
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Prior art keywords
semiconductor device
layer
semiconductor
insulating material
electrically insulating
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PCT/JP2022/015219
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French (fr)
Japanese (ja)
Inventor
尚吾 水本
秀彰 ▲柳▼田
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株式会社Flosfia
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Priority to JP2023511315A priority Critical patent/JPWO2022210617A1/ja
Publication of WO2022210617A1 publication Critical patent/WO2022210617A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Definitions

  • the present invention relates to a semiconductor device and a semiconductor system incorporating a semiconductor element, and more particularly to a semiconductor device and a semiconductor system capable of suppressing the influence of thermal stress while improving the heat dissipation of the semiconductor element.
  • a so-called modularization technology is known, in which semiconductor devices are mounted three-dimensionally with high density by stacking circuit boards on which semiconductor elements are mounted.
  • a modularized semiconductor device there is one disclosed in Patent Document 1, for example.
  • an integrated chip component 68 with a low heat resistance temperature is mounted on an upper module substrate 66, and a heat-generating semiconductor chip IC1 or the like is mounted on a lower module substrate 51, and both substrates are electrically connected. Connection is made by a connecting member 65 .
  • problems such as heat dissipation and electromagnetic wave shielding are usually studied, but as countermeasures against these problems progress, higher densities are required.
  • the amount of heat dissipation differs between the upper part of the module and the lower part of the module, resulting in a temperature difference in the thickness direction of the module. Distortion occurs.
  • each part in the module is affected over time, such as peeling at the connection part of the component including the semiconductor element, thereby inducing deterioration in performance.
  • thermal stress caused by the different heat generation amounts of the respective semiconductor elements may similarly induce performance deterioration.
  • Bipolar Transistor Bipolar Transistor
  • bipolar transistors bipolar transistors
  • MOSFETs metal-oxide-semiconductor field-effect transistors
  • an object of the present invention is to provide a highly reliable semiconductor device and semiconductor system capable of suppressing the influence of thermal stress while improving the heat dissipation of semiconductor elements.
  • a semiconductor device is a semiconductor device including a laminate in which at least one semiconductor element is arranged between a first layer and a second layer, wherein the first layer A metal layer is provided on the upper side with a first electrically insulating material interposed therebetween, and a second electrically insulating material is at least partly between the first layer and the second layer. and wherein the first electrically insulating material has a lower elastic modulus than the second electrically insulating material.
  • the elastic modulus of the first electrically insulating material is lower than that of the second electrically insulating material, the upper and lower sides of the first layer The first electrically insulating material absorbs thermal distortion due to temperature differences.
  • the second electrically insulating material interposed between the first layer and the second layer is less likely to be affected by bending or strain due to thermal stress, thereby ensuring the reliability of the semiconductor device. be done.
  • FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention
  • FIG. 1 is a block configuration diagram showing an example of a control system employing a semiconductor device according to an embodiment of the invention
  • FIG. 1 is a circuit diagram showing an example of a control system employing a semiconductor device according to an embodiment of the invention
  • FIG. 3 is a block configuration diagram showing another example of a control system employing the semiconductor device according to the embodiment of the invention
  • FIG. 10 is a circuit diagram showing another example of a control system employing the semiconductor device according to the embodiment of the invention
  • FIG. 1 is a cross-sectional view showing a first embodiment of a semiconductor device according to the present invention.
  • a semiconductor device 110 has first and second semiconductor elements 2 and 3 arranged on a circuit board 1 as semiconductor elements.
  • the first semiconductor element 2 is a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET).
  • the second semiconductor element 3 may be a diode such as an SBD (Schottky Barrier Diode) or a PiN diode, which is a semiconductor component, but is not limited to this.
  • SBD Schottky Barrier Diode
  • PiN diode which is a semiconductor component, but is not limited to this.
  • an upper wiring layer (first layer) 4 and a lower wiring layer (second layer) 5 are arranged in parallel above and below the circuit board 1 to form a laminate.
  • Semiconductor elements 2 and 3 are electrically and thermally connected to upper wiring layer 4 and lower wiring layer 5 through vias 6 , 7 and 8 .
  • the upper wiring layer 4 and the lower wiring layer 5 are electrically connected by a through hole 9 .
  • Vias 6, 7, 8 and through hole 9 are mainly composed of a material having excellent electrical and thermal conductivity such as copper (Cu).
  • the semiconductor elements 2 and 3 comprise a semiconductor layer, a first electrode provided on the first surface of the semiconductor layer, and a second electrode provided on the side opposite to the first surface of the semiconductor layer. second electrodes (neither shown) provided on two surfaces, said first electrode and said second electrode being connected through vias 6, 7, 8 respectively to the first layer 4 and the first layer 4; It is electrically connected with the second layer 5 .
  • the electrical insulating material 10 is filled, thereby sealing the inside of the semiconductor device 110 .
  • the electrical insulating material 10 is made of prepreg or the like, and includes a material having anisotropy in strength, such as glass fiber or carbon fiber, and is a material with a relatively high elastic modulus.
  • a plurality of holes are formed by laser processing or drilling, and the surfaces of these holes are plated with copper to form vias 6, 7, 8 and through hole 9 are formed.
  • a metal layer 12 is laminated on top of the first circuit layer 4 with an electrical insulating layer (first electrical insulating material) 11 interposed therebetween.
  • the electrical insulating layer 11 is a thin film made of, for example, epoxy resin, polyamide resin, or polymer alloyed resin, and is a material with a relatively low elastic modulus having predetermined flexibility in addition to electrical insulation. .
  • the elastic modulus of the electrical insulating layer 11 is selected to be smaller than the elastic modulus of the electrical insulating material 10 .
  • the electrically insulating layer 11 is preferably a thermally isotropic material.
  • the thermal conductivity of the electrical insulating layer 11 is preferably higher than that of the electrical insulating material 10 .
  • the metal layer 12 is made of a thin plate whose main component is, for example, copper (Cu).
  • a metal layer 12 is laminated on the electrically insulating layer 11 .
  • the metal layer 12 has a surface (first surface) facing and connected to the electrical insulating layer 11 and a surface (second surface) exposed to the outside of the semiconductor device 110.
  • first surface facing and connected to the electrical insulating layer 11
  • second surface exposed to the outside of the semiconductor device 110.
  • the metal layer 12 and the electrical insulating layer 11 may be laminated separately, for example, by preparing in advance a member having a two-layer structure such as RCC (Resin Coated Copper), the metal layer 12 and the electrical insulating layer 11 lamination steps can be simplified to a single step.
  • RCC Resin Coated Copper
  • the first and second semiconductor elements 2 and 3 are arranged at substantially equal distances from the upper wiring layer 4 and the lower wiring layer 5 in the thickness direction of the semiconductor device 110 . is set.
  • the metal layer 12 and the electrical insulation layer 11 are provided above the upper wiring layer 4 . That is, when semiconductor device 110 is viewed from its cross section, semiconductor elements 2 and 3 which are heat sources are located below the center line of semiconductor device 110 . That is, as is clear from FIG. 1, the semiconductor device 110 according to the embodiment of the present invention has a layered structure that is asymmetrical in the thickness direction with respect to the first and second semiconductor elements 2 and 3 arranged side by side. is doing.
  • the semiconductor device 110 drives and controls the semiconductor device 110 via a control device (not shown) to supply a control current to the driven object.
  • a control device not shown
  • the semiconductor elements 2 and 3 are so-called horizontal elements
  • the current required for drive control is input to the semiconductor elements 2 and 3 on the circuit board 1 through the vias 8 from the lower wiring layer 5 .
  • Outputs from the semiconductor elements 2 and 3 are supplied to the controlled object from the lower wiring layer 5 through the vias 8 .
  • the current required for drive control can pass through the vias 6 and 7 and the upper wiring layer 4 in addition to the paths described above. configured as follows.
  • the current output to the upper wiring layer 6 side is returned to the lower wiring layer 5 via the through hole 9 and then supplied to the controlled object.
  • the semiconductor elements 2 and 3 When current flows through the semiconductor elements 2 and 3 by driving and controlling the semiconductor device 110, the semiconductor elements 2 and 3 generate heat. Part of the generated heat is transmitted downward from the semiconductor elements 2 and 3 . That is, the heat is transmitted to the lower wiring layer 5 through the circuit board 1 and the vias 8, and the heat is radiated from the lower wiring layer 5 to the outside of the housing.
  • part of the generated heat is transmitted upward from the semiconductor elements 2 and 3. That is, the heat is transmitted to the upper wiring layer 4 through the vias 6 and 7, and then radiated to the outside of the housing through the electrical insulating layer 11 and the metal layer 12.
  • FIG. 1 part of the generated heat is transmitted upward from the semiconductor elements 2 and 3. That is, the heat is transmitted to the upper wiring layer 4 through the vias 6 and 7, and then radiated to the outside of the housing through the electrical insulating layer 11 and the metal layer 12.
  • an electrical insulation layer 11 is provided in the middle of the heat dissipation path to the upper part of the housing. Therefore, since the amount of heat released to the upper part of the housing differs from the amount of heat released to the lower part of the housing, a temperature difference occurs in the thickness direction of the module. In such a case, bending and distortion due to thermal stress between the upper and lower parts of the housing may occur, causing delamination in the connecting parts of the components including the semiconductor element. There is a risk of inducing performance deterioration.
  • the elastic modulus of the electrical insulating layer 11 is smaller than the elastic modulus of the electrical insulating material 10, so the elastic deformation of the electrical insulating layer 11 absorbs the deflection and strain of the semiconductor device 110. be done. That is, in FIG. 1 , the difference in thermal stress between the upper portion and the lower portion of the housing with the electrical insulating layer 11 as a boundary is effectively absorbed by the elastic deformation of the electrical insulating layer 11 . This effect can be enjoyed regardless of whether the amount of heat radiated from the upper part of the housing or the lower part of the housing is dominant.
  • the semiconductor device 110 generates heat, the designed heat dissipation function of the semiconductor device 110 is of course maintained, and the deterioration of the performance of the semiconductor device 110 due to heat generation is greatly suppressed. Then, it is not necessary to arrange the semiconductor elements 2 and 3, which are heat sources, on the center line of the semiconductor device 110 (that is, at symmetrical positions in the thickness direction). Therefore, the degree of freedom in designing the housing of the semiconductor device 110 is greatly improved, at least with respect to the stacking direction of the modules, and further miniaturization and higher density are possible.
  • the balance between the amount of heat dissipation from the top surface of the module and the amount of heat dissipation from the bottom surface of the module it will be possible to design to increase the amount of heat dissipation from the top surface of the module more than before.
  • a thermally isotropic material as the material of the electrical insulating layer 11
  • the heat transmitted from the first and second semiconductor elements 2 and 3 to the upper surface side is transferred to the thickness of the metal layer 12. Since the heat can be transmitted in both the vertical direction (upward direction) and the plane direction (horizontal direction), efficient heat dissipation from the upper surface of the module using the metal layer 12 can be expected.
  • the semiconductor device 110 incorporates, as different semiconductor elements, a first semiconductor element 2 that is a switching element and a second semiconductor element 3 that is a diode. Even when a plurality of semiconductor elements 2 and 3 having different heat generation amounts are built in, the effect of thermal stress in the stacking direction due to the different heat generation amounts can be reduced.
  • the semiconductor elements 2 and 3 are a vertical device, a horizontal device, or a combination of a vertical device and a horizontal device. That is, even if heat generation is dominant on either the upper surface or the lower surface of the semiconductor elements 2 and 3, the presence of the electrical insulating layer 11 effectively reduces the influence of thermal stress in the stacking direction. .
  • the electrical insulating material 10 has an elastic modulus of, for example, 1 ⁇ 10 4 MPa or more. Also, the elastic modulus of the electrical insulating layer 11 is, for example, 5 ⁇ 10 3 MPa or less.
  • the electrical insulating material 10 When a material having anisotropic strength such as prepreg is selected as the electrical insulating material 10, its elastic modulus is about 2 ⁇ 10 4 MPa. , and its elastic modulus is about 2 ⁇ 10 3 MPa.
  • the present invention is not limited to the combination of these elastic moduli, and the effect of the present invention can be expected as long as the elastic modulus of the electrical insulating layer 11 is smaller than the elastic modulus of the electrical insulating material 10 is selected. be able to.
  • the thickness of the metal layer 12 is not particularly limited as long as it does not hinder the object of the present invention, but the thickness of the metal layer 12 is preferably 30 ⁇ m or more. With such a preferred configuration, even if the electrical insulating layer 11 has a low elastic modulus, the effects of the present invention can be achieved without lowering the mechanical strength of the semiconductor device. Moreover, in the embodiment of the present invention, it is also preferable that the thickness of the metal layer 12 is 100 ⁇ m or more. By setting such a preferable thickness, the heat radiation characteristic from the metal layer 12 can be further improved.
  • a heat dissipation pattern is formed on the surface of the metal layer 12 in order to further improve heat dissipation.
  • the formation of the heat dissipation pattern increases the surface area of the metal layer 12, and thus an improvement in the heat dissipation effect can be expected.
  • the thermal conductivity is 8.0 W / m K
  • the thermal conductivity is 0.7 W / m K. . Therefore, by using RCC for the electrical insulating layer 11 and the metal layer 12, it is possible to promote heat dissipation from the upper surface of the housing while ensuring electrical insulation.
  • a semiconductor device includes a semiconductor element using silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), etc., which are widely known as semiconductor materials for power semiconductors.
  • SiC silicon carbide
  • GaN gallium nitride
  • Ga2O3 gallium oxide
  • FIG. 2 is a block configuration diagram showing an example of a control system using a semiconductor device according to an embodiment of the present invention
  • FIG. 3 is a circuit diagram of the same control system, which is particularly suitable for mounting on an electric vehicle. control system.
  • the control system 500 has a battery (power supply) 501, a step-up converter 502, a step-down converter 503, an inverter 504, a motor (to be driven) 505, and a drive control section 506, which are mounted on an electric vehicle.
  • the battery 501 is composed of a storage battery such as a nickel-metal hydride battery or a lithium-ion battery, and stores electric power by charging at a power supply station or regenerative energy during deceleration, and is necessary for the operation of the running system and electrical system of the electric vehicle. DC voltage can be output.
  • the boost converter 502 is a voltage conversion device equipped with a chopper circuit, for example, and boosts the DC voltage of, for example, 200 V supplied from the battery 501 to, for example, 650 V by switching operation of the chopper circuit, and outputs it to a running system such as a motor. be able to.
  • the step-down converter 503 is also a voltage conversion device equipped with a chopper circuit. It can be output to the electrical system including
  • the inverter 504 converts the DC voltage supplied from the boost converter 502 into a three-phase AC voltage by switching operation, and outputs the three-phase AC voltage to the motor 505 .
  • the motor 505 is a three-phase AC motor that constitutes the running system of the electric vehicle, and is rotationally driven by the three-phase AC voltage output from the inverter 504. The rotational driving force is transmitted to the wheels of the electric vehicle via a transmission or the like (not shown). to
  • various sensors are used to measure actual values such as the number of revolutions and torque of the wheels and the amount of depression of the accelerator pedal (acceleration amount) from the running electric vehicle. is entered.
  • the output voltage value of inverter 504 is also input to drive control section 506 .
  • the drive control unit 506 has the function of a controller equipped with a calculation unit such as a CPU (Central Processing Unit) and a data storage unit such as a memory. By outputting it as a feedback signal, the switching operation of the switching element is controlled.
  • the AC voltage applied to the motor 505 by the inverter 504 is corrected instantaneously, so that the operation control of the electric vehicle can be accurately executed, and safe and comfortable operation of the electric vehicle is realized. It is also possible to control the output voltage to inverter 504 by giving the feedback signal from drive control section 506 to boost converter 502 .
  • FIG. 3 is a circuit configuration excluding the step-down converter 503 in FIG. 2, that is, only a configuration for driving the motor 505.
  • the semiconductor device according to the embodiment of the present invention is employed as a Schottky barrier diode in boost converter 502 and inverter 504 for switching control.
  • Boost converter 502 is incorporated in a chopper circuit to perform chopper control
  • inverter 504 is incorporated in a switching circuit including IGBTs to perform switching control.
  • IGBTs IGBTs
  • the drive control unit 506 is provided with an operation unit 507 consisting of a CPU (Central Processing Unit) and a storage unit 508 consisting of a non-volatile memory.
  • the signal input to the drive control unit 506 is supplied to the calculation unit 507, and programmed calculation is performed as necessary to generate a feedback signal for each semiconductor element.
  • the storage unit 508 temporarily holds the calculation result by the calculation unit 507, accumulates physical constants and functions required for drive control in the form of a table, and outputs them to the calculation unit 507 as appropriate.
  • the calculation unit 507 and the storage unit 508 can employ known configurations, and their processing capabilities can be arbitrarily selected.
  • diodes and switching elements such as thyristors, power transistors, IGBTs, MOSFETs, etc. are used for switching operations of the boost converter 502, the step-down converter 503, and the inverter 504.
  • gallium oxide (Ga 2 O 3 ) especially corundum-type gallium oxide ( ⁇ -Ga 2 O 3 ), as the material for these semiconductor elements, the switching characteristics are greatly improved.
  • the semiconductor device according to the embodiment of the present invention extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 500 can be realized. That is, each of the boost converter 502, the step-down converter 503, and the inverter 504 can expect the effect of the present invention.
  • the effect of the present invention can be expected in any of the above.
  • control system 500 can apply not only the semiconductor device according to the embodiment of the present invention to the control system of an electric vehicle, but also various devices such as stepping up and stepping down power from a DC power supply and converting power from DC to AC. It can be applied to the control system of the application. It is also possible to use a power source such as a solar cell as the battery.
  • FIG. 4 is a block configuration diagram showing another example of a control system employing a semiconductor device according to an embodiment of the present invention
  • FIG. 5 is a circuit diagram of the same control system, showing infrastructure equipment that operates on power from an AC power supply. This control system is suitable for installation in home appliances, etc.
  • the control system 600 receives power supplied from an external, for example, a three-phase AC power source (power source) 601, and includes an AC/DC converter 602, an inverter 604, a motor (to be driven) 605, It has a drive control unit 606, which can be mounted on various devices (described later).
  • the three-phase AC power supply 601 is, for example, a power generation facility of an electric power company (a thermal power plant, a hydroelectric power plant, a geothermal power plant, a nuclear power plant, etc.), and its output is stepped down via a substation and supplied as an AC voltage. be.
  • AC/DC converter 602 is a voltage conversion device that converts AC voltage to DC voltage, and converts AC voltage of 100V or 200V supplied from three-phase AC power supply 601 to a predetermined DC voltage. Specifically, the voltage is converted into a generally used desired DC voltage such as 3.3V, 5V, or 12V. If the object to be driven is a motor, conversion to 12V is performed.
  • a single-phase AC power supply can be used instead of the three-phase AC power supply. In that case, the same system configuration can be achieved by using a single-phase input AC/DC converter.
  • the inverter 604 converts the DC voltage supplied from the AC/DC converter 602 into a three-phase AC voltage by switching operation, and outputs the three-phase AC voltage to the motor 605 .
  • the form of the motor 604 differs depending on the object to be controlled, but if the object to be controlled is a train, it drives the wheels; if it is factory equipment, it drives pumps and various power sources; It is a three-phase AC motor, and is rotationally driven by a three-phase AC voltage output from inverter 604, and transmits its rotational driving force to a drive target (not shown).
  • Inverter 604 is no longer required in control system 600, and as shown in FIG. 4, DC voltage is supplied from AC/DC converter 602 to the driven object.
  • a personal computer is supplied with a DC voltage of 3.3V
  • an LED lighting device is supplied with a DC voltage of 5V.
  • various sensors are used to measure actual values such as the rotational speed and torque of the driven object, or the temperature and flow rate of the surrounding environment of the driven object, and these measurement signals are input to the drive control unit 606.
  • the output voltage value of inverter 604 is also input to drive control section 606 .
  • drive control section 606 gives a feedback signal to inverter 604 to control the switching operation of the switching element.
  • the AC voltage applied to the motor 605 by the inverter 604 is corrected instantaneously, so that the operation control of the object to be driven can be accurately executed, and stable operation of the object to be driven is realized.
  • FIG. 5 shows the circuit configuration of FIG.
  • the semiconductor device according to the embodiment of the present invention is employed as a Schottky barrier diode in an AC/DC converter 602 and an inverter 604 for switching control.
  • the AC/DC converter 602 uses, for example, a Schottky barrier diode circuit configured in a bridge shape, and performs DC conversion by converting and rectifying the negative voltage component of the input voltage into a positive voltage.
  • the inverter 604 is incorporated in the switching circuit in the IGBT and performs switching control.
  • a capacitor (such as an electrolytic capacitor) is interposed between the AC/DC converter 602 and the inverter 604 to stabilize the voltage.
  • the drive control unit 606 is provided with an operation unit 607 made up of a CPU and a storage unit 608 made up of a non-volatile memory.
  • the signal input to the drive control unit 606 is supplied to the calculation unit 607, and programmed calculation is performed as necessary to generate a feedback signal for each semiconductor element.
  • the storage unit 608 temporarily holds the result of calculation by the calculation unit 607, accumulates physical constants and functions required for drive control in the form of a table, and outputs them to the calculation unit 607 as appropriate.
  • the calculation unit 607 and the storage unit 608 can employ known configurations, and their processing capabilities can be arbitrarily selected.
  • the rectifying operation and switching operation of the AC/DC converter 602 and the inverter 604 are performed by diodes, switching elements such as thyristors, and power transistors. , IGBT, MOSFET, etc. are used. Switching characteristics are improved by using gallium oxide (Ga 2 O 3 ), particularly corundum type gallium oxide ( ⁇ -Ga 2 O 3 ), as the material for these semiconductor elements. Furthermore, by applying the semiconductor device according to the embodiment of the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 600 can be realized. That is, AC/DC converter 602 and inverter 604 can each be expected to have the effect of the present invention. can be expected.
  • the motor 605 is exemplified as an object to be driven in Figs. 4 and 5, the object to be driven is not necessarily limited to those that operate mechanically, and can be applied to many devices that require AC voltage.
  • the control system 600 as long as the drive object is driven by inputting power from an AC power supply, it can be applied to infrastructure equipment (for example, power equipment such as buildings and factories, communication equipment, traffic control equipment, water and sewage treatment). Equipment, system equipment, labor-saving equipment, trains, etc.) and home appliances (e.g., refrigerators, washing machines, personal computers, LED lighting equipment, video equipment, audio equipment, etc.). can.
  • infrastructure equipment for example, power equipment such as buildings and factories, communication equipment, traffic control equipment, water and sewage treatment.
  • home appliances e.g., refrigerators, washing machines, personal computers, LED lighting equipment, video equipment, audio equipment, etc.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
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Abstract

[Problem] The purpose is to provide a reliable semiconductor device and semiconductor system with which it is possible to reduce the influence of thermal stress while improving heat dissipation of a semiconductor element. [Solution] A semiconductor device comprising a stack in which at least one semiconductor element is disposed between a first layer and a second layer, wherein a metal layer is provided on the upper side of the first layer with a first electrically insulating material therebetween, and a second electrically insulating material is provided in at least a part of a gap between the first layer and the second layer, the first electrically insulating material having an elastic modulus lower than that of the second electrically insulating material.

Description

半導体装置および半導体システムSemiconductor equipment and semiconductor systems
 本発明は半導体素子を内蔵する半導体装置および半導体システムに係り、特に、半導体素子の放熱性を高めつつ熱応力の影響を抑制することが可能な半導体装置および半導体システムに関する。 The present invention relates to a semiconductor device and a semiconductor system incorporating a semiconductor element, and more particularly to a semiconductor device and a semiconductor system capable of suppressing the influence of thermal stress while improving the heat dissipation of the semiconductor element.
 半導体素子を搭載した回路基板を積層することで半導体装置を三次元的に高密度実装する、いわゆるモジュール化技術が知られている。モジュール化された半導体装置として、例えば、特許文献1に開示されたものがある。特許文献1に開示された半導体装置は、耐熱温度の低い集積チップ部品68を上層のモジュール基板66に搭載し、発熱を伴う半導体チップIC1等を下層のモジュール基板51に搭載し、両基板の電気接続を接続部材65によって行っている。通常、このようなモジュール化技術では、放熱や電磁波遮蔽といった課題についての検討も行われるが、これらの課題への対策が進むにつれより一層の高密度化が求められる。 A so-called modularization technology is known, in which semiconductor devices are mounted three-dimensionally with high density by stacking circuit boards on which semiconductor elements are mounted. As a modularized semiconductor device, there is one disclosed in Patent Document 1, for example. In the semiconductor device disclosed in Patent Document 1, an integrated chip component 68 with a low heat resistance temperature is mounted on an upper module substrate 66, and a heat-generating semiconductor chip IC1 or the like is mounted on a lower module substrate 51, and both substrates are electrically connected. Connection is made by a connecting member 65 . In such modularization technology, problems such as heat dissipation and electromagnetic wave shielding are usually studied, but as countermeasures against these problems progress, higher densities are required.
特開2011-198866号公報JP 2011-198866 A
 電力変換機能を有するパワー半導体を複数基板間に内蔵したモジュールなどのように、半導体素子の発熱量が大きい場合には、モジュール内が必要以上に高温になるのを避けるため、新たな放熱経路の確保が必要となる。特許文献1の構成の場合、モジュール下方への放熱に加えて、モジュール上方への放熱も行われる。しかし、モジュール上方は外部に露出するため、感電などのリスクを避けるために電気的絶縁性の確保が求められる。このことから、モジュール上方に樹脂層(例えばエポキシ樹脂など)を介在させる必要がある。しかし、樹脂は熱伝導率が低いため、モジュール下方に比べてモジュール上方は放熱量が制約され、これが放熱の妨げとなる。 When the amount of heat generated by a semiconductor element is large, such as in a module in which power semiconductors with power conversion functions are embedded between multiple substrates, a new heat dissipation path is required to prevent the inside of the module from becoming hotter than necessary. need to secure. In the case of the configuration of Patent Document 1, in addition to the heat dissipation to the lower part of the module, heat is also dissipated to the upper part of the module. However, since the upper part of the module is exposed to the outside, it is required to ensure electrical insulation in order to avoid risks such as electric shock. For this reason, it is necessary to interpose a resin layer (such as epoxy resin) above the module. However, since resin has a low thermal conductivity, the amount of heat dissipation is limited above the module compared to below the module, which hinders heat dissipation.
 また、内蔵される半導体素子を基準としてその厚み方向に非対称な積層構造の場合、モジュール上方とモジュール下方の放熱量が異なるため、モジュールの厚み方向に温度差が生じることから、熱応力による撓みや歪みが生じる。そして、半導体素子を含む構成要素の接続部に剥離を生じさせるなど、モジュール内の各部に経時的に影響を与え性能の劣化を誘起してしまう。また、異なる複数の半導体素子をモジュール内に内蔵した場合には、それぞれの半導体素子の発熱量が異なることによる熱応力も同様に性能劣化を誘起する恐れがある。 In addition, in the case of a laminated structure that is asymmetrical in the thickness direction with respect to the built-in semiconductor element, the amount of heat dissipation differs between the upper part of the module and the lower part of the module, resulting in a temperature difference in the thickness direction of the module. Distortion occurs. As a result, each part in the module is affected over time, such as peeling at the connection part of the component including the semiconductor element, thereby inducing deterioration in performance. Moreover, when a plurality of different semiconductor elements are incorporated in a module, thermal stress caused by the different heat generation amounts of the respective semiconductor elements may similarly induce performance deterioration.
 このような問題は、モジュール全体が小型化・高密度化する場合に顕著となるばかりでなく、ショットキー・バリア・ダイオード(SBD:Schottky Barrier Diode)、絶縁ゲート型バイポーラ・トランジスタ(IGBT:Insulated Gate Bipolar Transistor)、あるいはバイポーラ・トランジスタ、金属酸化膜半導体電界効果トランジスタ(MOSFET:Metal-Oxide-Semiconductor Field Effect Transistor)といった発熱量の大きな半導体素子をモジュール化する場合にも懸念される。 Such a problem becomes more pronounced when the entire module is miniaturized and densified. Bipolar Transistor), bipolar transistors, metal-oxide-semiconductor field-effect transistors (MOSFETs), and other semiconductor devices that generate a large amount of heat.
 そこで本発明は、半導体素子の放熱性を高めつつ熱応力の影響を抑制することが可能な、信頼性の高い半導体装置および半導体システムの提供を目的とする。 Accordingly, an object of the present invention is to provide a highly reliable semiconductor device and semiconductor system capable of suppressing the influence of thermal stress while improving the heat dissipation of semiconductor elements.
 本発明者らは、以下に示す半導体装置が、上記した従来の課題を解決できることを見出した。
 本発明の実施形態に係る半導体装置は、第1の層および第2の層との間に少なくとも1つの半導体素子が配置されている積層体を含む半導体装置であって、前記第1の層の上側には、第1の電気絶縁性材料を介して金属層が設けられており、前記第1の層と前記第2の層との間の少なくとも一部には第2の電気絶縁性材料が設けられており、前記第1の電気的絶縁性材料は前記第2の電気絶縁性材料よりも弾性率が低いことを特徴とする半導体装置である。
The present inventors have found that the semiconductor device described below can solve the conventional problems described above.
A semiconductor device according to an embodiment of the present invention is a semiconductor device including a laminate in which at least one semiconductor element is arranged between a first layer and a second layer, wherein the first layer A metal layer is provided on the upper side with a first electrically insulating material interposed therebetween, and a second electrically insulating material is at least partly between the first layer and the second layer. and wherein the first electrically insulating material has a lower elastic modulus than the second electrically insulating material.
 上記のように構成された本発明の実施形態によれば、第1の電気絶縁性材料の弾性率が第2の電気絶縁性材料よりも低いため、第1の層の上側と下側との温度差による熱的な歪みが発生した場合に第1の電気絶縁性材料がこれを吸収する。これにより、第1の層と第2の層との間に介在する第2の電気絶縁性材料に熱応力に起因する撓みや歪みの影響が及びにくくなることから、半導体素子の信頼性が確保される。 According to the embodiment of the present invention configured as described above, since the elastic modulus of the first electrically insulating material is lower than that of the second electrically insulating material, the upper and lower sides of the first layer The first electrically insulating material absorbs thermal distortion due to temperature differences. As a result, the second electrically insulating material interposed between the first layer and the second layer is less likely to be affected by bending or strain due to thermal stress, thereby ensuring the reliability of the semiconductor device. be done.
本発明の第1の実施形態に係る半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention; FIG. 本発明の実施形態に係る半導体装置を採用した制御システムの一例を示すブロック構成図である。1 is a block configuration diagram showing an example of a control system employing a semiconductor device according to an embodiment of the invention; FIG. 本発明の実施形態に係る半導体装置を採用した制御システムの一例を示す回路図である。1 is a circuit diagram showing an example of a control system employing a semiconductor device according to an embodiment of the invention; FIG. 本発明の実施形態に係る半導体装置を採用した制御システムの他の例を示すブロック構成図である。FIG. 3 is a block configuration diagram showing another example of a control system employing the semiconductor device according to the embodiment of the invention; 本発明の実施形態に係る半導体装置を採用した制御システムの他の例を示す回路図である。FIG. 10 is a circuit diagram showing another example of a control system employing the semiconductor device according to the embodiment of the invention;
 以下、本発明に係る幾つかの実施形態を図面を参照しながら説明する。なお、同一構成要素には同一符号を付すことで、重複する説明を省略する。 Several embodiments of the present invention will be described below with reference to the drawings. In addition, the overlapping description is abbreviate|omitted by attaching|subjecting the same code|symbol to the same component.
 図1は本発明に係る半導体装置の第1実施形態を示す断面図である。図1に示すように半導体装置110は、回路基板1上に半導体素子として第1および第2の半導体素子2,3が配置されている。第1の半導体素子2は、スイッチング素子であるIGBT(絶縁ゲート型バイポーラ・トランジスタ:Insulated Gate Bipolar Transistor)や金属酸化膜半導体電界効果トランジスタ(MOSFET:Metal-Oxide-Semiconductor Field Effect Transistor)である。また、第2の半導体素子3は、半導体部品であるSBD(Schottky Barrier Diode)やPiNダイオードなどのダイオードが挙げられるが、これに限定されるものではない。回路基板1の上下には上部配線層(第1の層)4と下部配線層(第2の層)5が平行に配置されており、これらによる積層体を構成している。半導体素子2,3はビア6,7,8を介して上部配線層4および下部配線層5と電気的および熱的に接続されている。さらに、上部配線層4と下部配線層5とは、スルーホール9によって電気的に接続している。ビア6,7,8やスルーホール9は銅(Cu)などの電気伝導性および熱伝導性の優れた材料を主成分としている。本発明の実施形態においては、半導体素子2,3が、半導体層、前記半導体層の第1の面に設けられている第1の電極、前記半導体層の第1の面とは反対側の第2の面に設けられている第2の電極(いずれも図示せず)を含み、前記第1の電極および前記第2の電極がビア6,7,8を介してそれぞれ第1の層4および第2の層5と電気的に接続されている。 FIG. 1 is a cross-sectional view showing a first embodiment of a semiconductor device according to the present invention. As shown in FIG. 1, a semiconductor device 110 has first and second semiconductor elements 2 and 3 arranged on a circuit board 1 as semiconductor elements. The first semiconductor element 2 is a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET). The second semiconductor element 3 may be a diode such as an SBD (Schottky Barrier Diode) or a PiN diode, which is a semiconductor component, but is not limited to this. An upper wiring layer (first layer) 4 and a lower wiring layer (second layer) 5 are arranged in parallel above and below the circuit board 1 to form a laminate. Semiconductor elements 2 and 3 are electrically and thermally connected to upper wiring layer 4 and lower wiring layer 5 through vias 6 , 7 and 8 . Furthermore, the upper wiring layer 4 and the lower wiring layer 5 are electrically connected by a through hole 9 . Vias 6, 7, 8 and through hole 9 are mainly composed of a material having excellent electrical and thermal conductivity such as copper (Cu). In an embodiment of the present invention, the semiconductor elements 2 and 3 comprise a semiconductor layer, a first electrode provided on the first surface of the semiconductor layer, and a second electrode provided on the side opposite to the first surface of the semiconductor layer. second electrodes (neither shown) provided on two surfaces, said first electrode and said second electrode being connected through vias 6, 7, 8 respectively to the first layer 4 and the first layer 4; It is electrically connected with the second layer 5 .
 第1の回路層4と第2の回路層5との間でかつ半導体素子2,3の周囲の空間(図中に空白で示されている領域)には、電気絶縁材料(第2の電気絶縁性材料)10が充填され、これによって半導体装置110内が封止されている。電気絶縁材料10は、プリプレグなどからなり、例えばガラス繊維または炭素繊維などの強度的に異方性を有する材料を含んでおり、比較的弾性率の高い材料である。 An electrical insulating material (a second electrical Insulating material) 10 is filled, thereby sealing the inside of the semiconductor device 110 . The electrical insulating material 10 is made of prepreg or the like, and includes a material having anisotropy in strength, such as glass fiber or carbon fiber, and is a material with a relatively high elastic modulus.
 そして、半導体装置110の内部に電気絶縁材料10を充填した後に、レーザ加工やドリル加工を施すことで複数の孔を形成し、さらにこれら孔の表面に銅をめっき加工することにより、ビア6,7,8やスルーホール9を成形する。 After filling the interior of the semiconductor device 110 with the electrical insulating material 10, a plurality of holes are formed by laser processing or drilling, and the surfaces of these holes are plated with copper to form vias 6, 7, 8 and through hole 9 are formed.
 第1の回路層4の上部には、電気絶縁層(第1の電気絶縁性材料)11を介して金属層12が積層されている。電気絶縁層11は、例えばエポキシ樹脂やポリアミド樹脂、もしくはこれらをポリマアロイ化した樹脂などからなる薄膜であり、電気絶縁性に加えて、所定の屈曲性を備えた比較的弾性率の低い材料である。そして、本発明の実施形態においては、電気絶縁層11の弾性率としては、電気絶縁材料10の弾性率よりも小さいものが選定される。本発明の実施形態においては、電気絶縁層11は、熱的に等方性を有する材料であるのが好ましい。また、電気絶縁層11の熱伝導率は、電気絶縁材料10の熱伝導率よりも大きい材料であるのが好ましい。 A metal layer 12 is laminated on top of the first circuit layer 4 with an electrical insulating layer (first electrical insulating material) 11 interposed therebetween. The electrical insulating layer 11 is a thin film made of, for example, epoxy resin, polyamide resin, or polymer alloyed resin, and is a material with a relatively low elastic modulus having predetermined flexibility in addition to electrical insulation. . In the embodiment of the present invention, the elastic modulus of the electrical insulating layer 11 is selected to be smaller than the elastic modulus of the electrical insulating material 10 . In the embodiment of the present invention, the electrically insulating layer 11 is preferably a thermally isotropic material. Moreover, the thermal conductivity of the electrical insulating layer 11 is preferably higher than that of the electrical insulating material 10 .
 金属層12は、例えば銅(Cu)を主成分とする薄板からなる。金属層12は、電気絶縁層11の上に積層される。金属層12は、電気絶縁層11に対向し接続する側の面(第1の面)と、半導体装置110の外部に露出する側の面(第2の面)とを有しているが、第1の面の表面粗さを大きくすることで、電気絶縁層11との接触面積を増加させ、電気的絶縁性と熱伝導性の両方を高めている。また、第2の面の表面粗さを小さくすることにより、第2の面上に金属製(例えば銅製)の放熱フィン等の放熱部材を接続する際にも、銅と銅との拡散接合などの直接接合を可能としている。一般的に、銅などの金属薄板を製造する過程でその両面の表面粗さが異なるものとなるため、上記の配置とするのが好ましい。 The metal layer 12 is made of a thin plate whose main component is, for example, copper (Cu). A metal layer 12 is laminated on the electrically insulating layer 11 . The metal layer 12 has a surface (first surface) facing and connected to the electrical insulating layer 11 and a surface (second surface) exposed to the outside of the semiconductor device 110. By increasing the surface roughness of the first surface, the contact area with the electrical insulation layer 11 is increased, and both electrical insulation and thermal conductivity are enhanced. In addition, by reducing the surface roughness of the second surface, even when connecting a heat radiation member such as a heat radiation fin made of metal (for example, made of copper) on the second surface, diffusion bonding between copper and the like can be performed. It is possible to directly join the In general, the surface roughness of both surfaces of the thin metal plate such as copper is different during the manufacturing process, so the above arrangement is preferable.
 なお、金属層12と電気絶縁層11は別々に積層されてもよいが、例えば、RCC(Resin Coated Copper)などの2層構造をなす部材をあらかじめ準備することにより、金属層12と電気絶縁層11の積層工程を一回の工程に簡略化することができる。 Although the metal layer 12 and the electrical insulating layer 11 may be laminated separately, for example, by preparing in advance a member having a two-layer structure such as RCC (Resin Coated Copper), the metal layer 12 and the electrical insulating layer 11 lamination steps can be simplified to a single step.
 図1に示されるように、第1および第2の半導体素子2,3は、半導体装置110の厚み方向に対して、上部配線層4と下部配線層5のそれぞれからほぼ等距離の位置に並設されている。そして、金属層12と電気絶縁層11は、上部配線層4より上方に設けられている。すなわち、半導体装置110をその断面から見た場合に、熱源である半導体素子2,3は、半導体装置110の中心線より下方に位置している。すなわち、図1からも明らかなように、本発明の実施形態に係る半導体装置110は、併設された第1および第2の半導体素子2,3を基準としてその厚み方向に非対称な積層構造を有している。 As shown in FIG. 1, the first and second semiconductor elements 2 and 3 are arranged at substantially equal distances from the upper wiring layer 4 and the lower wiring layer 5 in the thickness direction of the semiconductor device 110 . is set. The metal layer 12 and the electrical insulation layer 11 are provided above the upper wiring layer 4 . That is, when semiconductor device 110 is viewed from its cross section, semiconductor elements 2 and 3 which are heat sources are located below the center line of semiconductor device 110 . That is, as is clear from FIG. 1, the semiconductor device 110 according to the embodiment of the present invention has a layered structure that is asymmetrical in the thickness direction with respect to the first and second semiconductor elements 2 and 3 arranged side by side. is doing.
 このように構成された本発明の実施形態に係る半導体装置110の動作について説明する。 The operation of the semiconductor device 110 according to the embodiment of the present invention configured in this manner will be described.
 図示しない制御装置を介して半導体装置110を駆動制御し、駆動対象に制御電流を供給する。半導体素子2,3がいわゆる横型素子の場合は、駆動制御に必要な電流は、下部配線層5からビア8を介して回路基板1上の半導体素子2,3に入力される。また、半導体素子2,3からの出力は、ビア8を介して下部配線層5から制御対象に供給される。一方、半導体素子2,3の少なくとも一方がいわゆる縦型デバイスの場合は、駆動制御に必要な電流は、上記した経路の他に、ビア6やビア7および上部配線層4を経由することができるよう構成される。上部配線層6側に出力された電流は、スルーホール9を介して下部配線層5に戻されてから制御対象に供給される。 It drives and controls the semiconductor device 110 via a control device (not shown) to supply a control current to the driven object. When the semiconductor elements 2 and 3 are so-called horizontal elements, the current required for drive control is input to the semiconductor elements 2 and 3 on the circuit board 1 through the vias 8 from the lower wiring layer 5 . Outputs from the semiconductor elements 2 and 3 are supplied to the controlled object from the lower wiring layer 5 through the vias 8 . On the other hand, when at least one of the semiconductor elements 2 and 3 is a so-called vertical device, the current required for drive control can pass through the vias 6 and 7 and the upper wiring layer 4 in addition to the paths described above. configured as follows. The current output to the upper wiring layer 6 side is returned to the lower wiring layer 5 via the through hole 9 and then supplied to the controlled object.
 半導体装置110を駆動制御することで半導体素子2,3に電流が流れると、半導体素子2,3が発熱する。発生した熱の一部は、半導体素子2,3から下方向に伝達される。すなわち、回路基板1およびビア8を介して下部配線層5に伝達され、下部配線層5から筐体外部に放熱される。 When current flows through the semiconductor elements 2 and 3 by driving and controlling the semiconductor device 110, the semiconductor elements 2 and 3 generate heat. Part of the generated heat is transmitted downward from the semiconductor elements 2 and 3 . That is, the heat is transmitted to the lower wiring layer 5 through the circuit board 1 and the vias 8, and the heat is radiated from the lower wiring layer 5 to the outside of the housing.
 一方、発生した熱の一部は、半導体素子2,3から上方向に伝達される。すなわち、ビア6,7を介して上部配線層4に伝達され、さらに、電気絶縁層11と金属層12を介して筐体外部に放熱される。 On the other hand, part of the generated heat is transmitted upward from the semiconductor elements 2 and 3. That is, the heat is transmitted to the upper wiring layer 4 through the vias 6 and 7, and then radiated to the outside of the housing through the electrical insulating layer 11 and the metal layer 12. FIG.
 本発明の実施形態においては、半導体装置110の金属層12を電気的に絶縁するために、筐体上部への放熱経路の途中に電気絶縁層11を設けている。したがって、筐体上部への放熱量と筐体下部への放熱量が異なるため、モジュールの厚み方向に温度差が生じる。このような場合、筐体上部と筐体下部との熱応力に起因する撓みや歪みが生じ、半導体素子を含む構成要素の接続部に剥離を生じさせるなど、モジュール内の各部に経時的に影響を与え性能の劣化を誘起してしまう恐れがある。しかしながら、本発明の実施形態では、電気絶縁層11の弾性率が電気絶縁材料10の弾性率よりも小さい材料であることから、電気絶縁層11の弾性変形によって半導体装置110の撓みや歪みが吸収される。すなわち、図1において、電気絶縁層11を境界とした筐体上部と筐体下部の熱応力の差が、電気絶縁層11の弾性変形によって効果的に吸収される。この効果は、筐体上部と筐体下部とでどちらからの放熱量が支配的か否かに関係なく享受される。したがって、半導体装置110が発熱したとしても、半導体装置110の設計時の放熱機能が維持されることはもちろん、発熱による半導体装置110の性能劣化も大幅に抑制される。そして、熱源である半導体素子2,3を半導体装置110の中心線上(すなわち厚み方向において対称となる位置)に配置する必要がなくなる。よって、少なくともモジュールの積層方向に関して、半導体装置110の筐体設計の自由度が大幅に向上するとともに、より一層の小型化・高密度化が可能となる。 In the embodiment of the present invention, in order to electrically insulate the metal layer 12 of the semiconductor device 110, an electrical insulation layer 11 is provided in the middle of the heat dissipation path to the upper part of the housing. Therefore, since the amount of heat released to the upper part of the housing differs from the amount of heat released to the lower part of the housing, a temperature difference occurs in the thickness direction of the module. In such a case, bending and distortion due to thermal stress between the upper and lower parts of the housing may occur, causing delamination in the connecting parts of the components including the semiconductor element. There is a risk of inducing performance deterioration. However, in the embodiment of the present invention, the elastic modulus of the electrical insulating layer 11 is smaller than the elastic modulus of the electrical insulating material 10, so the elastic deformation of the electrical insulating layer 11 absorbs the deflection and strain of the semiconductor device 110. be done. That is, in FIG. 1 , the difference in thermal stress between the upper portion and the lower portion of the housing with the electrical insulating layer 11 as a boundary is effectively absorbed by the elastic deformation of the electrical insulating layer 11 . This effect can be enjoyed regardless of whether the amount of heat radiated from the upper part of the housing or the lower part of the housing is dominant. Therefore, even if the semiconductor device 110 generates heat, the designed heat dissipation function of the semiconductor device 110 is of course maintained, and the deterioration of the performance of the semiconductor device 110 due to heat generation is greatly suppressed. Then, it is not necessary to arrange the semiconductor elements 2 and 3, which are heat sources, on the center line of the semiconductor device 110 (that is, at symmetrical positions in the thickness direction). Therefore, the degree of freedom in designing the housing of the semiconductor device 110 is greatly improved, at least with respect to the stacking direction of the modules, and further miniaturization and higher density are possible.
 例えば、モジュール上面からの放熱量とモジュール下面からの放熱量のバランスを比較的自由に設定できるようになり、モジュール上面からの放熱量を従来以上に増やすための設計も可能となる。特に、電気絶縁層11の材料として、熱的に等方性を有する材料を選択することにより、第1および第2の半導体素子2,3から上面側に伝わった熱を、金属層12の厚さ方向(上方向)と面方向(横方向)の両方に伝えることができるため、金属層12を利用したモジュール上面からの効率的な放熱が期待できる。 For example, it will be possible to relatively freely set the balance between the amount of heat dissipation from the top surface of the module and the amount of heat dissipation from the bottom surface of the module, and it will be possible to design to increase the amount of heat dissipation from the top surface of the module more than before. In particular, by selecting a thermally isotropic material as the material of the electrical insulating layer 11, the heat transmitted from the first and second semiconductor elements 2 and 3 to the upper surface side is transferred to the thickness of the metal layer 12. Since the heat can be transmitted in both the vertical direction (upward direction) and the plane direction (horizontal direction), efficient heat dissipation from the upper surface of the module using the metal layer 12 can be expected.
 また、本発明の実施形態においては、半導体装置110内に、異なる半導体素子として、スイッチング素子である第1の半導体素子2およびダイオードである第2の半導体素子3が内蔵されている。このような発熱量の異なる複数の半導体素子2,3が内蔵されている場合であっても、異なる発熱量による積層方向での熱応力の影響を低減することができる。 In addition, in the embodiment of the present invention, the semiconductor device 110 incorporates, as different semiconductor elements, a first semiconductor element 2 that is a switching element and a second semiconductor element 3 that is a diode. Even when a plurality of semiconductor elements 2 and 3 having different heat generation amounts are built in, the effect of thermal stress in the stacking direction due to the different heat generation amounts can be reduced.
 また、本発明の実施形態においては、半導体素子2,3が縦型デバイスであっても横型デバイスであっても、あるいは縦型デバイスと横型デバイスの組合せであっても有効である。すなわち、半導体素子2,3の上面もしくは下面のいずれの面での発熱が支配的であったとしても、電気絶縁層11の存在によって、積層方向での熱応力の影響が効果的に低減される。 Further, in the embodiment of the present invention, it is effective whether the semiconductor elements 2 and 3 are a vertical device, a horizontal device, or a combination of a vertical device and a horizontal device. That is, even if heat generation is dominant on either the upper surface or the lower surface of the semiconductor elements 2 and 3, the presence of the electrical insulating layer 11 effectively reduces the influence of thermal stress in the stacking direction. .
 本発明の実施形態においては、電気絶縁材料10の弾性率は、例えば1×10MPa以上である。また、電気絶縁層11の弾性率は、例えば5×10MPa以下である。なお、電気絶縁材料10としてプリプレグなどの強度的に異方性を有する材料を選定した場合には、その弾性率は2×10MPa程度、電気絶縁層11としてエポキシ樹脂を選定した場合には、その弾性率は2×103MPa程度である。もちろん、本発明はこれら弾性率の組合せに限定されるものではなく、電気絶縁層11の弾性率が電気絶縁材料10の弾性率よりも小さい材料が選定される限りにおいて本発明の効果を期待することができる。 In an embodiment of the present invention, the electrical insulating material 10 has an elastic modulus of, for example, 1×10 4 MPa or more. Also, the elastic modulus of the electrical insulating layer 11 is, for example, 5×10 3 MPa or less. When a material having anisotropic strength such as prepreg is selected as the electrical insulating material 10, its elastic modulus is about 2×10 4 MPa. , and its elastic modulus is about 2×10 3 MPa. Of course, the present invention is not limited to the combination of these elastic moduli, and the effect of the present invention can be expected as long as the elastic modulus of the electrical insulating layer 11 is smaller than the elastic modulus of the electrical insulating material 10 is selected. be able to.
 本発明の実施形態においては、金属層12の厚みは、本発明の目的を阻害しない限り、特に限定されないが、金属層12の厚みは30μm以上であるのが好ましい。このような好ましい構成とすることにより、電気絶縁層11の弾性率が低い場合であっても、半導体装置の機械的強度を低下させることなく本発明の効果を奏することができる。また、本発明の実施形態においては、金属層12の厚みが100μm以上であるのも好ましい。このような好ましい厚みとすることにより、金属層12からの放熱特性をさらに向上させることができる。なお、本発明の実施形態においては、さらにより放熱性を向上させるために、金属層12の表面に放熱パターンが形成されているのも好ましい。放熱パターンの形成によって金属層12の表面積が増え、これによって放熱効果の向上が期待できる。 In the embodiment of the present invention, the thickness of the metal layer 12 is not particularly limited as long as it does not hinder the object of the present invention, but the thickness of the metal layer 12 is preferably 30 μm or more. With such a preferred configuration, even if the electrical insulating layer 11 has a low elastic modulus, the effects of the present invention can be achieved without lowering the mechanical strength of the semiconductor device. Moreover, in the embodiment of the present invention, it is also preferable that the thickness of the metal layer 12 is 100 μm or more. By setting such a preferable thickness, the heat radiation characteristic from the metal layer 12 can be further improved. In addition, in the embodiment of the present invention, it is also preferable that a heat dissipation pattern is formed on the surface of the metal layer 12 in order to further improve heat dissipation. The formation of the heat dissipation pattern increases the surface area of the metal layer 12, and thus an improvement in the heat dissipation effect can be expected.
 なお、前述のRCCを用いた場合には、熱伝導率は8.0W/m・Kであり、一般的なプリプレグを用いた場合には、熱伝導率は0.7W/m・Kである。したがって、電気絶縁層11および金属層12としてRCCを用いることで、電気的な絶縁も確保しつつ、筐体上面からの放熱を促進することが可能となる。 In addition, when the above-mentioned RCC is used, the thermal conductivity is 8.0 W / m K, and when a general prepreg is used, the thermal conductivity is 0.7 W / m K. . Therefore, by using RCC for the electrical insulating layer 11 and the metal layer 12, it is possible to promote heat dissipation from the upper surface of the housing while ensuring electrical insulation.
 本発明の実施形態に係る半導体装置は、パワー半導体の半導体材料として広く知られている炭化ケイ素(SiC)、窒化ガリウム(GaN)、酸化ガリウム(Ga2O3)などが用いられた半導体素子を含む場合に有用である。特に、バンドギャップの高いコランダム構造の酸化ガリウム(α-Ga2O3)や、βガリア構造の酸化ガリウム(β-Ga2O3)が用いられた半導体素子を含む場合に極めて有用であり、半導体装置の高密度化のみならず信頼性向上にも貢献する。 A semiconductor device according to an embodiment of the present invention includes a semiconductor element using silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), etc., which are widely known as semiconductor materials for power semiconductors. Useful. In particular, it is extremely useful when including a semiconductor element using gallium oxide (α-GaO) with a corundum structure having a high bandgap or gallium oxide (β-GaO) with a β-gallia structure, increasing the density of the semiconductor device. It also contributes to reliability improvement.
 なお、上述した本発明に係る一部の構成要素を公知の構成要素に置き換えることももちろん可能であり、そのようなものも本発明の実施形態に属する。 It should be noted that it is of course possible to replace some of the constituent elements according to the present invention described above with known constituent elements, and such also belong to the embodiments of the present invention.
 上述した本発明の実施形態に係る半導体装置は、上記した機能を発揮させるべく、インバータやコンバータなどの電力変換装置に適用することができる。図2は、本発明の実施形態に係る半導体装置を用いた制御システムの一例を示すブロック構成図、図3は同制御システムの回路図であり、特に電気自動車(Electric Vehicle)への搭載に適した制御システムである。 The semiconductor device according to the embodiment of the present invention described above can be applied to power converters such as inverters and converters in order to exhibit the functions described above. FIG. 2 is a block configuration diagram showing an example of a control system using a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a circuit diagram of the same control system, which is particularly suitable for mounting on an electric vehicle. control system.
 図2に示すように、制御システム500はバッテリー(電源)501、昇圧コンバータ502、降圧コンバータ503、インバータ504、モータ(駆動対象)505、駆動制御部506を有し、これらは電気自動車に搭載されてなる。バッテリー501は例えばニッケル水素電池やリチウムイオン電池などの蓄電池からなり、給電ステーションでの充電あるいは減速時の回生エネルギーなどにより電力を貯蔵するとともに、電気自動車の走行系や電装系の動作に必要となる直流電圧を出力することができる。昇圧コンバータ502は例えばチョッパ回路を搭載した電圧変換装置であり、バッテリー501から供給される例えば200Vの直流電圧を、チョッパ回路のスイッチング動作により例えば650Vに昇圧して、モータなどの走行系に出力することができる。降圧コンバータ503も同様にチョッパ回路を搭載した電圧変換装置であるが、バッテリー501から供給される例えば200Vの直流電圧を、例えば12V程度に降圧することで、パワーウインドーやパワーステアリング、あるいは車載の電気機器などを含む電装系に出力することができる。 As shown in FIG. 2, the control system 500 has a battery (power supply) 501, a step-up converter 502, a step-down converter 503, an inverter 504, a motor (to be driven) 505, and a drive control section 506, which are mounted on an electric vehicle. It becomes The battery 501 is composed of a storage battery such as a nickel-metal hydride battery or a lithium-ion battery, and stores electric power by charging at a power supply station or regenerative energy during deceleration, and is necessary for the operation of the running system and electrical system of the electric vehicle. DC voltage can be output. The boost converter 502 is a voltage conversion device equipped with a chopper circuit, for example, and boosts the DC voltage of, for example, 200 V supplied from the battery 501 to, for example, 650 V by switching operation of the chopper circuit, and outputs it to a running system such as a motor. be able to. The step-down converter 503 is also a voltage conversion device equipped with a chopper circuit. It can be output to the electrical system including
 インバータ504は、昇圧コンバータ502から供給される直流電圧をスイッチング動作により三相の交流電圧に変換してモータ505に出力する。モータ505は電気自動車の走行系を構成する三相交流モータであり、インバータ504から出力される三相の交流電圧によって回転駆動され、その回転駆動力を図示しないトランスミッション等を介して電気自動車の車輪に伝達する。 The inverter 504 converts the DC voltage supplied from the boost converter 502 into a three-phase AC voltage by switching operation, and outputs the three-phase AC voltage to the motor 505 . The motor 505 is a three-phase AC motor that constitutes the running system of the electric vehicle, and is rotationally driven by the three-phase AC voltage output from the inverter 504. The rotational driving force is transmitted to the wheels of the electric vehicle via a transmission or the like (not shown). to
 一方、図示しない各種センサを用いて、走行中の電気自動車から車輪の回転数やトルク、アクセルペダルの踏み込み量(アクセル量)などの実測値が計測され、これらの計測信号が駆動制御部506に入力される。また同時に、インバータ504の出力電圧値も駆動制御部506に入力される。駆動制御部506はCPU(Central Processing Unit)などの演算部やメモリなどのデータ保存部を備えたコントローラの機能を有するもので、入力された計測信号を用いて制御信号を生成してインバータ504にフィードバック信号として出力することで、スイッチング素子によるスイッチング動作を制御する。これによって、インバータ504がモータ505に与える交流電圧が瞬時に補正されることで、電気自動車の運転制御を正確に実行させることができ、電気自動車の安全・快適な動作が実現する。なお、駆動制御部506からのフィードバック信号を昇圧コンバータ502に与えることで、インバータ504への出力電圧を制御することも可能である。 On the other hand, various sensors (not shown) are used to measure actual values such as the number of revolutions and torque of the wheels and the amount of depression of the accelerator pedal (acceleration amount) from the running electric vehicle. is entered. At the same time, the output voltage value of inverter 504 is also input to drive control section 506 . The drive control unit 506 has the function of a controller equipped with a calculation unit such as a CPU (Central Processing Unit) and a data storage unit such as a memory. By outputting it as a feedback signal, the switching operation of the switching element is controlled. As a result, the AC voltage applied to the motor 505 by the inverter 504 is corrected instantaneously, so that the operation control of the electric vehicle can be accurately executed, and safe and comfortable operation of the electric vehicle is realized. It is also possible to control the output voltage to inverter 504 by giving the feedback signal from drive control section 506 to boost converter 502 .
 図3は、図2における降圧コンバータ503を除いた回路構成、すなわちモータ505を駆動するための構成のみを示した回路構成である。同図に示されるように、本発明の実施形態に係る半導体装置は、例えばショットキーバリアダイオードとして昇圧コンバータ502およびインバータ504に採用されることでスイッチング制御に供される。昇圧コンバータ502においてはチョッパ回路に組み込まれてチョッパ制御を行い、またインバータ504においてはIGBTを含むスイッチング回路に組み込まれてスイッチング制御を行う。なお、バッテリー501の出力にインダクタ(コイルなど)を介在させることで電流の安定化を図り、またバッテリー501、昇圧コンバータ502、インバータ504のそれぞれの間にキャパシタ(電解コンデンサなど)を介在させることで電圧の安定化を図っている。 FIG. 3 is a circuit configuration excluding the step-down converter 503 in FIG. 2, that is, only a configuration for driving the motor 505. As shown in the figure, the semiconductor device according to the embodiment of the present invention is employed as a Schottky barrier diode in boost converter 502 and inverter 504 for switching control. Boost converter 502 is incorporated in a chopper circuit to perform chopper control, and inverter 504 is incorporated in a switching circuit including IGBTs to perform switching control. By interposing an inductor (such as a coil) in the output of the battery 501, the current is stabilized. It is stabilizing the voltage.
 また、図3中に点線で示すように、駆動制御部506内にはCPU(Central Processing Unit)からなる演算部507と不揮発性メモリからなる記憶部508が設けられている。駆動制御部506に入力された信号は演算部507に与えられ、プログラムされた演算を必要に応じて行うことで各半導体素子に対するフィードバック信号を生成する。また記憶部508は、演算部507による演算結果を一時的に保持したり、駆動制御に必要な物理定数や関数などをテーブルの形で蓄積して演算部507に適宜出力する。演算部507や記憶部508は公知の構成を採用することができ、その処理能力等も任意に選定できる。 In addition, as indicated by the dotted line in FIG. 3, the drive control unit 506 is provided with an operation unit 507 consisting of a CPU (Central Processing Unit) and a storage unit 508 consisting of a non-volatile memory. The signal input to the drive control unit 506 is supplied to the calculation unit 507, and programmed calculation is performed as necessary to generate a feedback signal for each semiconductor element. Further, the storage unit 508 temporarily holds the calculation result by the calculation unit 507, accumulates physical constants and functions required for drive control in the form of a table, and outputs them to the calculation unit 507 as appropriate. The calculation unit 507 and the storage unit 508 can employ known configurations, and their processing capabilities can be arbitrarily selected.
 図2や図3に示されるように、制御システム500においては、昇圧コンバータ502、降圧コンバータ503、インバータ504のスイッチング動作にはダイオードやスイッチング素子であるサイリスタ、パワートランジスタ、IGBT、MOSFET等が用いられる。これらの半導体素子に酸化ガリウム(Ga)、特にコランダム型酸化ガリウム(α-Ga)をその材料として用いることでスイッチング特性が大幅に向上する。さらに、本発明の実施形態に係る半導体装置を適用することで、極めて良好なスイッチング特性が期待できるとともに、制御システム500の一層の小型化やコスト低減が実現可能となる。すなわち、昇圧コンバータ502、降圧コンバータ503、インバータ504のそれぞれが本発明による効果を期待できるものとなり、これらのいずれか一つ、もしくは任意の二つ以上の組合せ、あるいは駆動制御部506も含めた形態のいずれにおいても本発明の効果を期待することができる。 As shown in FIGS. 2 and 3, in the control system 500, diodes and switching elements such as thyristors, power transistors, IGBTs, MOSFETs, etc. are used for switching operations of the boost converter 502, the step-down converter 503, and the inverter 504. . By using gallium oxide (Ga 2 O 3 ), especially corundum-type gallium oxide (α-Ga 2 O 3 ), as the material for these semiconductor elements, the switching characteristics are greatly improved. Furthermore, by applying the semiconductor device according to the embodiment of the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 500 can be realized. That is, each of the boost converter 502, the step-down converter 503, and the inverter 504 can expect the effect of the present invention. The effect of the present invention can be expected in any of the above.
 なお、上述の制御システム500は本発明の実施形態に係る半導体装置を電気自動車の制御システムに適用できるだけではなく、直流電源からの電力を昇圧・降圧したり、直流から交流へ電力変換するといったあらゆる用途の制御システムに適用することが可能である。また、バッテリーとして太陽電池などの電源を用いることも可能である。 Note that the above-described control system 500 can apply not only the semiconductor device according to the embodiment of the present invention to the control system of an electric vehicle, but also various devices such as stepping up and stepping down power from a DC power supply and converting power from DC to AC. It can be applied to the control system of the application. It is also possible to use a power source such as a solar cell as the battery.
 図4は、本発明の実施形態に係る半導体装置を採用した制御システムの他の例を示すブロック構成図、図5は同制御システムの回路図であり、交流電源からの電力で動作するインフラ機器や家電機器等への搭載に適した制御システムである。 FIG. 4 is a block configuration diagram showing another example of a control system employing a semiconductor device according to an embodiment of the present invention, and FIG. 5 is a circuit diagram of the same control system, showing infrastructure equipment that operates on power from an AC power supply. This control system is suitable for installation in home appliances, etc.
 図4に示すように、制御システム600は、外部の例えば三相交流電源(電源)601から供給される電力を入力するもので、AC/DCコンバータ602、インバータ604、モータ(駆動対象)605、駆動制御部606を有し、これらは様々な機器(後述する)に搭載することができる。三相交流電源601は、例えば電力会社の発電施設(火力発電所、水力発電所、地熱発電所、原子力発電所など)であり、その出力は変電所を介して降圧されながら交流電圧として供給される。また、例えば自家発電機等の形態でビル内や近隣施設内に設置されて電力ケーブルで供給される。AC/DCコンバータ602は交流電圧を直流電圧に変換する電圧変換装置であり、三相交流電源601から供給される100Vや200Vの交流電圧を所定の直流電圧に変換する。具体的には、電圧変換により3.3Vや5V、あるいは12Vといった、一般的に用いられる所望の直流電圧に変換される。駆動対象がモータである場合には12Vへの変換が行われる。なお、三相交流電源に代えて単相交流電源を採用することも可能であり、その場合にはAC/DCコンバータを単相入力のものとすれば同様のシステム構成とすることができる。 As shown in FIG. 4, the control system 600 receives power supplied from an external, for example, a three-phase AC power source (power source) 601, and includes an AC/DC converter 602, an inverter 604, a motor (to be driven) 605, It has a drive control unit 606, which can be mounted on various devices (described later). The three-phase AC power supply 601 is, for example, a power generation facility of an electric power company (a thermal power plant, a hydroelectric power plant, a geothermal power plant, a nuclear power plant, etc.), and its output is stepped down via a substation and supplied as an AC voltage. be. In addition, for example, in the form of a private power generator or the like, it is installed in a building or in a nearby facility and supplied by a power cable. AC/DC converter 602 is a voltage conversion device that converts AC voltage to DC voltage, and converts AC voltage of 100V or 200V supplied from three-phase AC power supply 601 to a predetermined DC voltage. Specifically, the voltage is converted into a generally used desired DC voltage such as 3.3V, 5V, or 12V. If the object to be driven is a motor, conversion to 12V is performed. A single-phase AC power supply can be used instead of the three-phase AC power supply. In that case, the same system configuration can be achieved by using a single-phase input AC/DC converter.
 インバータ604は、AC/DCコンバータ602から供給される直流電圧をスイッチング動作により三相の交流電圧に変換してモータ605に出力する。モータ604は、制御対象によりその形態が異なるが、制御対象が電車の場合には車輪を、工場設備の場合にはポンプや各種動力源を、家電機器の場合にはコンプレッサなどを駆動するための三相交流モータであり、インバータ604から出力される三相の交流電圧によって回転駆動され、その回転駆動力を図示しない駆動対象に伝達する。 The inverter 604 converts the DC voltage supplied from the AC/DC converter 602 into a three-phase AC voltage by switching operation, and outputs the three-phase AC voltage to the motor 605 . The form of the motor 604 differs depending on the object to be controlled, but if the object to be controlled is a train, it drives the wheels; if it is factory equipment, it drives pumps and various power sources; It is a three-phase AC motor, and is rotationally driven by a three-phase AC voltage output from inverter 604, and transmits its rotational driving force to a drive target (not shown).
 なお、例えば家電機器においてはAC/DCコンバータ602から出力される直流電圧をそのまま供給することが可能な駆動対象も多く(例えばパソコン、LED照明機器、映像機器、音響機器など)、その場合には制御システム600にインバータ604は不要となり、図4中に示すように、AC/DCコンバータ602から駆動対象に直流電圧を供給する。この場合、例えばパソコンなどには3.3Vの直流電圧が、LED照明機器などには5Vの直流電圧が供給される。 For example, in home appliances, there are many driven objects that can be directly supplied with the DC voltage output from the AC/DC converter 602 (for example, personal computers, LED lighting equipment, video equipment, audio equipment, etc.). Inverter 604 is no longer required in control system 600, and as shown in FIG. 4, DC voltage is supplied from AC/DC converter 602 to the driven object. In this case, for example, a personal computer is supplied with a DC voltage of 3.3V, and an LED lighting device is supplied with a DC voltage of 5V.
 一方、図示しない各種センサを用いて、駆動対象の回転数やトルク、あるいは駆動対象の周辺環境の温度や流量などといった実測値が計測され、これらの計測信号が駆動制御部606に入力される。また同時に、インバータ604の出力電圧値も駆動制御部606に入力される。これらの計測信号をもとに、駆動制御部606はインバータ604にフィードバック信号を与え、スイッチング素子によるスイッチング動作を制御する。これによって、インバータ604がモータ605に与える交流電圧が瞬時に補正されることで、駆動対象の運転制御を正確に実行させることができ、駆動対象の安定した動作が実現する。また、上述のように、駆動対象が直流電圧で駆動可能な場合には、インバータへのフィードバックに代えてAC/DCコンバータ602をフィードバック制御することも可能である。 On the other hand, various sensors (not shown) are used to measure actual values such as the rotational speed and torque of the driven object, or the temperature and flow rate of the surrounding environment of the driven object, and these measurement signals are input to the drive control unit 606. At the same time, the output voltage value of inverter 604 is also input to drive control section 606 . Based on these measurement signals, drive control section 606 gives a feedback signal to inverter 604 to control the switching operation of the switching element. As a result, the AC voltage applied to the motor 605 by the inverter 604 is corrected instantaneously, so that the operation control of the object to be driven can be accurately executed, and stable operation of the object to be driven is realized. Further, as described above, when the object to be driven can be driven with a DC voltage, it is possible to feedback-control AC/DC converter 602 instead of feedback to the inverter.
 図5は、図4の回路構成を示したものである。同図に示されるように、本発明の実施形態に係る半導体装置は、例えばショットキーバリアダイオードとしてAC/DCコンバータ602およびインバータ604に採用されることでスイッチング制御に供される。AC/DCコンバータ602は、例えばショットキーバリアダイオードをブリッジ状に回路構成したものが用いられ、入力電圧の負電圧分を正電圧に変換整流することで直流変換を行う。またインバータ604においてはIGBTにおけるスイッチング回路に組み込まれてスイッチング制御を行う。なお、AC/DCコンバータ602とインバータ604の間にキャパシタ(電解コンデンサなど)を介在させることで電圧の安定化を図っている。 FIG. 5 shows the circuit configuration of FIG. As shown in the figure, the semiconductor device according to the embodiment of the present invention is employed as a Schottky barrier diode in an AC/DC converter 602 and an inverter 604 for switching control. The AC/DC converter 602 uses, for example, a Schottky barrier diode circuit configured in a bridge shape, and performs DC conversion by converting and rectifying the negative voltage component of the input voltage into a positive voltage. Also, the inverter 604 is incorporated in the switching circuit in the IGBT and performs switching control. A capacitor (such as an electrolytic capacitor) is interposed between the AC/DC converter 602 and the inverter 604 to stabilize the voltage.
 また、図5中に点線で示すように、駆動制御部606内にはCPUからなる演算部607と不揮発性メモリからなる記憶部608が設けられている。駆動制御部606に入力された信号は演算部607に与えられ、プログラムされた演算を必要に応じて行うことで各半導体素子に対するフィードバック信号を生成する。また記憶部608は、演算部607による演算結果を一時的に保持したり、駆動制御に必要な物理定数や関数などをテーブルの形で蓄積して演算部607に適宜出力する。演算部607や記憶部608は公知の構成を採用することができ、その処理能力等も任意に選定できる。 In addition, as indicated by the dotted line in FIG. 5, the drive control unit 606 is provided with an operation unit 607 made up of a CPU and a storage unit 608 made up of a non-volatile memory. The signal input to the drive control unit 606 is supplied to the calculation unit 607, and programmed calculation is performed as necessary to generate a feedback signal for each semiconductor element. Further, the storage unit 608 temporarily holds the result of calculation by the calculation unit 607, accumulates physical constants and functions required for drive control in the form of a table, and outputs them to the calculation unit 607 as appropriate. The calculation unit 607 and the storage unit 608 can employ known configurations, and their processing capabilities can be arbitrarily selected.
 このような制御システム600においても、図2や図3に示した制御システム500と同様に、AC/DCコンバータ602やインバータ604の整流動作やスイッチング動作にはダイオードやスイッチング素子であるサイリスタ、パワートランジスタ、IGBT、MOSFET等が用いられる。これら半導体素子に酸化ガリウム(Ga)、特にコランダム型酸化ガリウム(α-Ga)をその材料として用いることでスイッチング特性が向上する。さらに、本発明の実施形態に係る半導体装置を適用することで、極めて良好なスイッチング特性が期待できるとともに、制御システム600の一層の小型化やコスト低減が実現可能となる。すなわち、AC/DCコンバータ602、インバータ604のそれぞれが本発明による効果を期待できるものとなり、これらのいずれか一つ、もしくは組合せ、あるいは駆動制御部606も含めた形態のいずれにおいても本発明の効果を期待することができる。 In such a control system 600, as in the control system 500 shown in FIGS. 2 and 3, the rectifying operation and switching operation of the AC/DC converter 602 and the inverter 604 are performed by diodes, switching elements such as thyristors, and power transistors. , IGBT, MOSFET, etc. are used. Switching characteristics are improved by using gallium oxide (Ga 2 O 3 ), particularly corundum type gallium oxide (α-Ga 2 O 3 ), as the material for these semiconductor elements. Furthermore, by applying the semiconductor device according to the embodiment of the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 600 can be realized. That is, AC/DC converter 602 and inverter 604 can each be expected to have the effect of the present invention. can be expected.
 なお、図4および図5では駆動対象としてモータ605を例示したが、駆動対象は必ずしも機械的に動作するものに限られず、交流電圧を必要とする多くの機器を対象とすることができる。制御システム600においては、交流電源から電力を入力して駆動対象を駆動する限りにおいては適用が可能であり、インフラ機器(例えばビルや工場等の電力設備、通信設備、交通管制機器、上下水処理設備、システム機器、省力機器、電車など)や家電機器(例えば、冷蔵庫、洗濯機、パソコン、LED照明機器、映像機器、音響機器など)といった機器を対象とした駆動制御のために搭載することができる。  In addition, although the motor 605 is exemplified as an object to be driven in Figs. 4 and 5, the object to be driven is not necessarily limited to those that operate mechanically, and can be applied to many devices that require AC voltage. In the control system 600, as long as the drive object is driven by inputting power from an AC power supply, it can be applied to infrastructure equipment (for example, power equipment such as buildings and factories, communication equipment, traffic control equipment, water and sewage treatment). Equipment, system equipment, labor-saving equipment, trains, etc.) and home appliances (e.g., refrigerators, washing machines, personal computers, LED lighting equipment, video equipment, audio equipment, etc.). can.
1 回路基板
2, 3 半導体素子
4, 5 配線層
6, 7, 8 ビア
9 スルーホール
10 電気絶縁材料(第2の電気絶縁性材料)
11 電気絶縁層(第1の電気絶縁性材料)
12 金属層
110 半導体装置
500  制御システム
501  バッテリー(電源)
502  昇圧コンバータ
503  降圧コンバータ
504  インバータ
505  モータ(駆動対象)
506  駆動制御部
507  演算部
508  記憶部
600  制御システム
601  三相交流電源(電源)
602  AC/DCコンバータ
604  インバータ
605  モータ(駆動対象)
606  駆動制御部
607  演算部
608  記憶部
 
 

 
1 circuit board
2, 3 Semiconductor device
4, 5 wiring layers
6, 7, 8 vias
9 through hole
10 electrical insulating material (second electrical insulating material)
11 electrical insulation layer (first electrical insulation material)
12 metal layers
110 Semiconductor equipment
500 control system
501 battery (power supply)
502 Boost Converter
503 Buck Converter
504 Inverter
505 motor (driven)
506 drive controller
507 Calculator
508 Memory
600 control system
601 Three-phase AC power supply (power supply)
602 AC/DC converter
604 Inverter
605 motor (driven)
606 drive controller
607 Calculator
608 memory


Claims (18)

  1.  第1の層および第2の層の間に少なくとも1つの半導体素子が配置されている積層体を含む半導体装置であって、
     前記第1の層の上側には、第1の電気絶縁性材料を介して金属層が設けられており、前記第1の層と前記第2の層との間の少なくとも一部には第2の電気絶縁性材料が設けられており、前記第1の電気的絶縁性材料は前記第2の電気絶縁性材料よりも弾性率が低いことを特徴とする半導体装置。
    A semiconductor device comprising a stack having at least one semiconductor element disposed between a first layer and a second layer,
    A metal layer is provided on the upper side of the first layer with a first electrically insulating material interposed therebetween, and a second metal layer is provided at least partly between the first layer and the second layer. , wherein the first electrically insulating material has a lower elastic modulus than the second electrically insulating material.
  2.  前記第1の電気絶縁性材料および前記第2の電気絶縁性材料は樹脂を含むことを特徴とする請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein said first electrically insulating material and said second electrically insulating material contain resin.
  3.  前記第1の電気絶縁性材料はエポキシ樹脂もしくはポリアミド樹脂を含むことを特徴とする請求項2記載の半導体装置。 3. The semiconductor device according to claim 2, wherein said first electrically insulating material contains epoxy resin or polyamide resin.
  4.  前記第2の電気絶縁性材料は強度的に異方性を有する材料を含むことを特徴とする請求項2記載の半導体装置。 3. The semiconductor device according to claim 2, wherein said second electrically insulating material includes a material having anisotropy in strength.
  5.  前記第1の電気絶縁性材料は熱的に等方性を有する材料を含むことを特徴とする請求項2記載の半導体装置。 3. The semiconductor device according to claim 2, wherein said first electrically insulating material includes a thermally isotropic material.
  6.  前記第1の電気絶縁性材料は、前記第2の電気絶縁性材料よりも熱伝導率が大きいことを特徴とする請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein said first electrically insulating material has a higher thermal conductivity than said second electrically insulating material.
  7.  前記半導体素子として、第1の半導体素子および第2の半導体素子が、前記第1の層および前記第2の層の間に配置されている請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein a first semiconductor element and a second semiconductor element are arranged between the first layer and the second layer as the semiconductor elements.
  8.  前記第1の半導体素子がスイッチング素子であり、前記第2の半導体素子がダイオードである請求項7記載の半導体装置。 The semiconductor device according to claim 7, wherein said first semiconductor element is a switching element and said second semiconductor element is a diode.
  9.  前記金属層の厚みが30μm以上である請求項1記載半導体装置。 The semiconductor device according to claim 1, wherein the metal layer has a thickness of 30 µm or more.
  10.  前記半導体素子が、半導体層と、前記半導体層の第1の面に設けられている第1の電極と、前記半導体層の前記第1の面と反対側の面である第2の面に設けられている第2の電極とを有しており、前記第1の電極と前記第1の層、および前記第2の電極および前記第2の層とが、それぞれビアを介して電気的に接続されていることを特徴とする請求項1記載の半導体装置。 The semiconductor element comprises a semiconductor layer, a first electrode provided on a first surface of the semiconductor layer, and a second surface opposite to the first surface of the semiconductor layer. The first electrode and the first layer, and the second electrode and the second layer are electrically connected through vias, respectively. 2. The semiconductor device according to claim 1, wherein the semiconductor device is
  11.  前記金属層の表面上に放熱パターンが形成されている請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein a heat dissipation pattern is formed on the surface of said metal layer.
  12.  前記半導体装置が、前記半導体素子を基準としてその厚み方向に非対称な積層構造を有する請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein said semiconductor device has a laminated structure asymmetrical in its thickness direction with respect to said semiconductor element.
  13.  前記金属層は、前記第1の電気絶縁性材料に接続する第1の面と、前記第1の面と反対側の第2の面とを有し、前記第1の面は前記第2の面より表面粗さが大きいことを特徴とする請求項1記載の半導体装置。 The metal layer has a first surface connected to the first electrically insulating material and a second surface opposite the first surface, the first surface being connected to the second surface. 2. The semiconductor device according to claim 1, wherein the surface roughness is larger than that of the surface.
  14.  前記金属層の前記第2の面に放熱部材を接続可能としたことを特徴とする請求項13記載の半導体装置。 14. The semiconductor device according to claim 13, wherein a heat radiating member can be connected to said second surface of said metal layer.
  15.  前記金属層は銅を主成分とする材料からなることを特徴とする請求項1記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the metal layer is made of a material containing copper as a main component.
  16.  前記半導体素子は、スイッチング機能を備えていることを特徴とする請求項1記載の半導体装置。 The semiconductor device according to claim 1, wherein the semiconductor element has a switching function.
  17.  請求項1記載の半導体装置を用いた電力変換装置。 A power converter using the semiconductor device according to claim 1.
  18.  請求項1記載の半導体装置を用いた制御システム。

     
    A control system using the semiconductor device according to claim 1 .

PCT/JP2022/015219 2021-03-31 2022-03-28 Semiconductor device and semiconductor system WO2022210617A1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013073964A (en) * 2011-09-26 2013-04-22 Hitachi Automotive Systems Ltd Power module
WO2020157963A1 (en) * 2019-02-01 2020-08-06 三菱電機株式会社 Semiconductor device and power conversion device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013073964A (en) * 2011-09-26 2013-04-22 Hitachi Automotive Systems Ltd Power module
WO2020157963A1 (en) * 2019-02-01 2020-08-06 三菱電機株式会社 Semiconductor device and power conversion device

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