WO2022205929A1

WO2022205929A1 - Analogue front-end circuit, chip and signal processing apparatus

Info

Publication number: WO2022205929A1
Application number: PCT/CN2021/130506
Authority: WO
Inventors: 严波; 王悦; 方超敏; 李建伟
Original assignee: 普源精电科技股份有限公司
Priority date: 2021-03-29
Filing date: 2021-11-15
Publication date: 2022-10-06
Also published as: CN115149916A

Abstract

Provided are an analogue front-end circuit, a chip and a signal processing apparatus. The analogue front-end circuit comprises a receiving circuit (10), a first operational amplification module (20), a second operational amplification module (30) and a control module (40), wherein the receiving circuit (10) is configured to receive an input signal of the analogue front-end circuit; the first operational amplification module (20) is configured to perform in-phase amplitude regulation on a signal output from the receiving circuit (10), so as to output a first analogue signal; the second operational amplification module (30) is configured to perform inverting amplitude regulation on the signal output from the receiving circuit (10), so as to output a second analogue signal; and the control module (40) is configured to choose, according to an attribute of the input signal, the first analogue signal or the second analogue signal, to output the first analogue signal or the second analogue signal.

Description

Analog front-end circuit, chip and signal processing device

This application claims the priority of the Chinese patent application with application number 202110336444.2 filed with the China Patent Office on March 29, 2021, the entire contents of which are incorporated herein by reference.

technical field

The present application relates to the technical field of integrated circuits, for example, to an analog front-end circuit, a chip, and a signal processing device.

Background technique

A front-end circuit configured to process analog signals in a chip is usually provided with an operational amplifier to adjust the gain of the analog signal it receives. In the related art, there are mainly two ways to adjust the gain of the analog signal received by the chip. Inverting amplification; the second method is to set a non-inverting operational amplifier in the chip, and input the received analog signal to the non-inverting input terminal of the operational amplifier for non-inverting amplification.

However, for the first method, when the inverting operational amplifier inverts and amplifies the received analog signal, it also multiplies the noise at the receiving end, which will affect the performance of the output signal, for example, when the received signal When changing within a small amplitude range, the noise has a greater impact, and because the inverting amplifier circuit is usually provided with feedforward and feedback networks, there are various parasitic capacitances and parasitic inductances in the inverting amplifier circuit, resulting in inversion The amplified in-band flatness is poor; for the second method, the dynamic range of the input and output of the non-inverting operational amplifier is small, which will limit the application scenarios of the chip.

SUMMARY OF THE INVENTION

The present application provides an analog front-end circuit, a chip, and a signal processing device, which can adjust the amplitude of a received analog signal while having a large dynamic range of input and output, and the circuit itself has a good frequency response characteristics and in-band flatness.

The application provides an analog front-end circuit, including: a receiving circuit, a first operational amplifier module, a second operational amplifier module, and a control module;

The receiving circuit is configured to receive the input signal of the analog front-end circuit;

The first operational amplifier module is configured to perform in-phase amplitude adjustment on the signal output by the receiving circuit, and output a first analog signal;

The second operational amplifier module is configured to perform inverse amplitude adjustment on the signal output by the receiving circuit, and output a second analog signal;

The control module is configured to select and output the first analog signal or the second analog signal according to the properties of the input signal, the first analog signal or the second analog signal.

The present application also provides a chip, including: the above-mentioned analog front-end circuit.

The present application also provides a signal processing device, comprising: the above-mentioned chip.

Description of drawings

1 is a schematic structural diagram of an analog front-end circuit provided by an embodiment of the present application;

2 is a schematic structural diagram of another analog front-end circuit provided by an embodiment of the present application;

3 is a schematic structural diagram of yet another analog front-end circuit provided by an embodiment of the present application;

4 is a schematic structural diagram of another analog front-end circuit provided by an embodiment of the present application;

5 is a schematic structural diagram of a first channel provided by an embodiment of the present application;

6 is a schematic structural diagram of another first passage provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of still another first path provided by an embodiment of the present application;

8 is a schematic diagram of a circuit structure of a first path provided by an embodiment of the present application;

FIG. 9 is a schematic structural diagram of a second channel provided by an embodiment of the present application.

Detailed ways

The present application will be described below with reference to the accompanying drawings and embodiments. The specific embodiments described herein are merely used to explain the present application. For the convenience of description, only the parts related to the present application are shown in the drawings.

The embodiments of the present application provide an analog front-end circuit, which can adjust the gain of a signal received by a chip. The analog front-end circuit can be integrated into a chip, and the chip can be applied to a signal processing device, for example, the signal processing device includes but not Limited to oscilloscopes.

FIG. 1 is a schematic structural diagram of an analog front-end circuit provided by an embodiment of the present application. As shown in FIG. 1 , the analog front-end circuit includes a receiving circuit 10, a first operational amplifier module 20, a second operational amplifier module 30, and a control module 40; the receiving circuit 10 is configured to receive the input signal Vin of the analog front-end circuit; the first The operational amplifier module 20 is configured to perform in-phase amplitude adjustment on the signal output by the receiving circuit 10, and output the first analog signal Va1; Two analog signals Va2; the control module 40 is configured to selectively output the first analog signal Va1 or the second analog signal Va2 according to the properties of the input signal Vin, the first analog signal Va1 or the second analog signal Va2.

The implementations of the receiving circuit 10 , the first operational amplifier module 20 , the second operational amplifier module 30 , and the control module 40 are related to the functions to be implemented by themselves, and can be set by those skilled in the art according to actual conditions, which are not limited here. The signals output by the receiving circuit 10 to the first operational amplifier module 20 and the second operational amplifier module 30 may be the same or different; the signals output from the receiving circuit 10 to the first operational amplifier module 20 and the second operational amplifier module 30 are the same signal When the receiving circuit 10 is a receiving port of the chip, etc.; and when the signals output by the receiving circuit 10 to the first operational amplifier module 20 and the second operational amplifier module 30 are different signals, the receiving circuit 10 may include the first operational amplifier module 20 and the second operational amplifier module 30. The receiving circuit and the second receiving circuit are respectively set to receive and/or process the signals input to the first operational amplifier module 20 and the second operational amplifier module 30. The implementation of the first receiving circuit and the second receiving circuit in the embodiment of the present application The method is not limited. Meanwhile, the signal processed by the analog front-end circuit is usually an analog signal, and the received signal usually has attributes such as bandwidth, internal resistance, current, and voltage, which are not limited in this embodiment of the present application.

The attributes of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 are used as the basis for the control module 40 to select and output the first analog signal Va1 or the second analog signal Va2. At this time, the input signal Vin and the first analog signal can be given priority. An attribute (eg, voltage attribute) of Va1 or the second analog signal Va2, and the value of the attribute is used as the main basis for the control module 40 to select and output the first analog signal Va1 or the second analog signal Va2. For the convenience of description, the embodiments of the present application take the voltage attribute as the attribute basis for the control module 40 to select and output the first analog signal Va1 or the second analog signal Va2 as an example to exemplify the technical solutions of the embodiments of the present application. When other attributes such as resistance and current are the attribute basis for the control module 40 to select and output the first analog signal Va1 or the second analog signal Va2, the technical principle is similar to the above-mentioned when the voltage attribute is the attribute that needs to be prioritized, and it is not repeated here. One more elaboration.

Exemplarily, compared with the in-phase amplitude adjustment, the in-phase amplitude adjustment has the advantages of low noise, high linearity and high in-band flatness, but the dynamic range of the input and output is relatively small; compared with the in-phase amplitude adjustment Adjustment, although the noise of the inverse amplitude adjustment is relatively large, the dynamic range of its input and output is relatively large. Therefore, when the voltage of the input signal Vin is small, the receiving circuit 10 will output a signal to the non-inverting input terminal IN1+ of the first operational amplifier module 20 when receiving the input signal Vin of the analog front-end circuit, so that the first operational amplifier module 20 The signal output by the receiving circuit 10 is adjusted in-phase and the amplitude is adjusted to output the first analog signal Va1; at the same time, when the receiving circuit 10 receives the input signal Vin of the analog front-end circuit, it will output the signal to the second operational amplifier module 30. Phase input terminal IN2-, so that the second operational amplifier module 30 performs inverse amplitude adjustment on the signal output by the receiving circuit 10 and outputs the second analog signal Va2; at this time, compared with the second analog signal Va2, the first analog signal Va2 is The analog signal Va1 has the advantages of low noise, high linearity, and high in-band flatness; when the control module 40 determines that the voltage of the input signal Vin is small, it can choose to output the first analog signal Va1 as the output signal of the analog front-end circuit, so that the The output signal has low noise, high linearity, and high in-band flatness. On the contrary, when the voltage of the input signal Vin is large, although the inverse amplitude adjustment will multiply its noise, the noise can be ignored for the input signal Vin with a large voltage; at this time, when the control module 40 When it is judged that the voltage of the input signal Vin is relatively large, the second analog signal Va2 can be selected to be output as the output signal of the analog front-end circuit, so as to ensure that the noise at the inverting input end of the second operational amplifier module 30 has a stronger effect on the second analog signal Va2. Under the premise of small influence, the analog front-end circuit can have a larger dynamic range of input and output.

FIG. 1 is only an exemplary drawing of the embodiment of the present application. In FIG. 1 , it exemplarily shows that the control module 40 is electrically connected to the input end of the input signal Vin, that is, the control module 40 can select the input terminal according to the attribute of the input signal Vin. The first analog signal Va1 or the second analog signal Va2 is output; and in the embodiment of the present application, the control module may also select to output the first analog signal or the second analog signal according to the properties of the first analog signal or the second analog signal.

In order to realize the above functions, one end of the receiving circuit 10 can be electrically connected to the input end of the input signal Vin, and the other end of the receiving circuit 10 can be respectively connected to the non-inverting input terminal IN1+ of the first operational amplifier module 20 and the inverting terminal of the second operational amplifier module 30. The phase input terminal IN2- is electrically connected, the output terminal of the first operational amplifier module 20 can be electrically connected to the inverting input terminal IN1- of the first operational amplifier module 20 and an input terminal of the control module 40, and the output terminal of the second operational amplifier module 30 is electrically connected. The non-inverting input terminal IN2+ can be electrically connected to the input terminal of the reference voltage Vref, and the output terminal of the second operational amplifier module 30 can be connected to the inverting input terminal IN2- of the second operational amplifier module 30 and the other one of the control module 40 through an impedance element. The input terminal is electrically connected; when the control module 40 selects to output the first analog signal Va1 or the second analog signal Va2 according to the attribute of the input signal Vin, one end of the control module 40 can also be electrically connected to the input terminal of the input signal Vin. In this way, the receiving circuit 10 and the first operational amplifying module 20 form a first channel, the receiving circuit 10 and the second operational amplifying module 30 also constitute a second channel, and the control module 40 can respond to the input signal Vin, the first analog signal Va1 or the first Two attributes of the analog signal Va2, select to output the first analog signal Va1 of the first channel or the second analog signal Va2 of the second channel.

Exemplarily, FIG. 2 is a schematic structural diagram of another analog front-end circuit provided by an embodiment of the present application. As shown in FIG. 2 , the control module 40 is electrically connected to the output terminal of the first operational amplifier module 20 and the output terminal of the second operational amplifier module 30 respectively, so that the first operational amplifier module 20 outputs the first analog signal Va1 to the control module 40 , the second operational amplifier module 30 outputs the second analog signal Va2 to the control module 40 . At this time, the control module 40 can choose to output the first analog signal Va1 or the second analog signal Va2 according to the voltage of the first analog signal Va1. For example, when the voltage of the first analog signal Va1 is small, the control module 40 can choose to output the first analog signal Va1. analog signal Va1; when the voltage of the first analog signal Va1 is relatively large, the control module 40 can choose to output the second analog signal Va2; or, the control module 40 can choose to output the first analog signal Va1 according to the voltage of the second analog signal Va2 Or the second analog signal Va2, for example, when the voltage of the second analog signal Va2 is small, the control module 40 can choose to output the first analog signal Va1; when the voltage of the second analog signal Va2 is high, the control module 40 can choose to output the first analog signal Va2. Two analog signals Va2.

In the analog front-end circuit provided by the embodiment of the present application, the in-phase amplitude adjustment and the in-phase amplitude adjustment are respectively performed on the signal output by the receiving circuit, and the control module according to the attributes of the input signal, the first analog signal or the second analog signal, Selecting to output the first analog signal adjusted by the in-phase amplitude or the second analog signal adjusted by the inverse amplitude, so that when the input signal changes in a smaller amplitude range, the second analog signal is selected to output, so that it outputs The signal has good in-band flatness, and when the input signal changes in a large amplitude range, the first analog signal can be selected to output, so that it has a large dynamic range of input and output, so that the analog signal can be output. The front-end circuit can adjust the amplitude of the received analog signal while having a large dynamic range of input and output, and the analog front-end circuit has good frequency response characteristics and in-band flatness.

On the basis of the above technical solution, optionally, the attributes of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 may include the effective value and/or peak-to-peak value of the current or voltage; at this time, the control module 40 sets In order to obtain the effective value and/or peak-to-peak value of the current or voltage of the input signal Vin, the first analog signal Va1 or the second analog signal Va2, and determine whether the obtained value is less than the first preset threshold; when the obtained value is less than the first When the threshold is preset, the first analog signal Va1 is selected to be output; when the acquired value is greater than or equal to the first preset threshold, the second analog signal Va2 is selected to be output.

In other embodiments, the properties of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 may be specific parameters such as internal resistance, current or voltage, and the specific parameters may be understood as having internal resistance, current or voltage, etc. characteristics. Specific parameters are not limited to rms or peak-to-peak values, and their content is determined by whether the property corresponds to internal resistance, current, or voltage. For example, for voltage, the property may also be voltage polarity.

Exemplarily, take the control module 40 acquiring the voltage properties of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 as an example. At this time, the maximum voltage that the first operational amplifier module 20 can withstand can be calculated according to the maximum power that the first operational amplifier module 20 can withstand and the current when the first operational amplifier module 20 adjusts the in-phase amplitude of the input signal Vin. The rms value and/or the peak-to-peak value of , set a first preset threshold, the first preset threshold may be less than or equal to the rms value and/or the peak-to-peak value of the maximum voltage that the first operational amplifier module 20 can withstand. In this way, the control module 40 can control the effective value of the voltage of the input signal Vin received by the receiving circuit 10, the first analog signal Va1 output by the first operational amplifier module 20 or the second analog signal Va2 output by the second operational amplifier module 30 and/ or peak-to-peak value for identification, and when the rms value and/or the peak-to-peak value of the voltage of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 is less than the first preset threshold, the output can be selected by the first operational amplifier module. 20. The first analog signal Va1 after the in-phase amplitude adjustment is performed; when the rms voltage and/or the peak-to-peak value of the input signal Vin, the first analog signal Va1 or the second analog signal Va2 is greater than or equal to the first preset threshold, the Selecting and outputting the second analog signal Va2 whose inverse amplitude is adjusted by the second operational amplifier module 30 can reduce the influence of noise on the signal while having a larger dynamic range of input and output, and has a higher dynamic range. in-band flatness.

1 and 2 are exemplary drawings of the embodiments of the present application, and only the receiving circuit 10 , the first operational amplifier module 20 , the second operational amplifier module 30 , and the control circuit 10 , the first operational amplifier module 20 , the second operational amplifier module 30 , and the control circuit 10 are exemplarily shown in FIGS. 1 and 2 . The relative relationship between the modules 40; however, the embodiment of the present application is not limited to this connection relationship.

The connection relationship between multiple modules in the analog front-end circuit provided by the embodiments of the present application and the structures of the multiple modules have various implementation manners. The following examples describe the embodiments of the present application, but do not limit the present application.

FIG. 3 is a schematic structural diagram of still another analog front-end circuit provided by an embodiment of the present application. As shown in FIG. 3 , the control module 40 includes a judging unit 41 and a gating switch unit 42; the gating switch unit 42 includes at least one switch input end I4 and a switch output end O4; The output terminal of the operational amplifier module 20 is electrically connected to the output terminal of the second operational amplifier module 30; An analog signal Va1 or a second analog signal Va2.

Exemplarily, in the actual operation process, the determination unit 41 may preferentially determine the attribute of the first analog signal Va1 or the second analog signal Va2, for example, the determination unit 41 preferentially determines the voltage attribute of the first analog signal Va1. When the determination unit 41 determines that the voltage of the first analog signal Va1 is small, it can directly output the first analog signal Va1 to the switch input terminal I4, and control the switch input terminal I4 and the switch output terminal O4 to conduct, so as to output the first analog signal Va1; when the judging unit 41 judges that the voltage of the first analog signal Va1 is larger, it can choose to output the second analog signal Va2 to the switch input terminal I4, and control the switch input terminal I4 and the switch output terminal O4 to conduct, so as to output the first analog signal Va2. Two analog signals Va2. In this way, the judging unit 41 judges the attribute of the first analog signal Va1, and selects and outputs the first analog signal Va1 or the second analog signal Va2 to the gate switch unit 42, so that the analog front-end circuit has a large input and output dynamic At the same time, the amplitude of the received analog signal can be adjusted, and the analog front-end circuit has good frequency response characteristics and in-band flatness.

When the judging unit 41 preferentially judges the voltage attribute of the second analog signal Va2, the technical principle is similar to the above-mentioned judgment unit 41 preferentially judging the voltage attribute of the first analog signal Va1. The description of the voltage property of the analog signal Va1 will not be repeated here.

In addition, the judging unit 41 can also judge the properties of the first analog signal Va1 and the second analog signal Va2 at the same time. Exemplarily, the judging unit 41 simultaneously compares the magnitude of the first analog signal Va1 with the preset voltage range and the magnitude of the second analog signal Va2 with the preset voltage range; when the first analog signal Va1 exceeds the preset voltage range, the second When the analog signal Va2 is within the preset voltage range, the determination unit 41 can control the gating switch unit 42 to selectively output the second analog signal Va2; or, when the first analog signal Va1 is within the preset voltage range, the second analog signal Va2 When the voltage is not within the preset voltage range, the determination unit 41 may control the gating switch unit 42 to selectively output the first analog signal Va1. In this way, the analog front-end circuit can also adjust the amplitude of the received analog signal while having a larger dynamic range of input and output, and the analog front-end circuit has good frequency response characteristics and in-band flatness.

FIG. 4 is a schematic structural diagram of another analog front-end circuit provided by an embodiment of the present application. As shown in FIG. 4 , the control module 40 includes a judgment unit 41 and a gating switch unit 42 ; the gating switch unit 42 includes at least two switch input ends I41 , I42 and a switch output end O4 ; the output end of the first operational amplifier module 20 and the output end of the second operational amplifier module 30 are respectively electrically connected with different switch input ends I41 and I42; the switch output end O4 is electrically connected with the judgment unit 41; the judgment unit 41 is set to control the gating switch unit 42 to select and output the first analog signal Va1 or the second analog signal Va2, and determine the attribute of the analog signal selected and output by the gating switch unit 42, and selectively output the first analog signal Va1 or the second analog signal Va2.

Exemplarily, in the actual operation process, the judgment unit 41 preferentially controls the switch input terminal I41 or I42 of the gating switch unit 42 to conduct with its switch output terminal O4; the judgment unit 41 preferentially controls the switch input terminal of the gating switch unit 42 For example, I41 and its switch output terminal O4 are turned on. When the switch input terminal I41 and its switch output terminal O4 are turned on, the first analog signal Va1 output by the first operational amplifier module 20 is transmitted to the judging unit 41 through the turned on switch input terminal I41 and the switch output terminal O4, where the judging unit 41 When judging that the voltage of the first analog signal Va1 is small, the first analog signal Va1 can be directly output as the output signal of the analog front-end circuit; and when the judging unit 41 judges that the voltage of the first analog signal Va1 is relatively large, it can control the selection. The switch input terminal I41 of the switch unit 42 is disconnected from its switch output terminal O4, and the switch input terminal I42 of the gate switch unit 42 is controlled to be turned on with its switch output terminal O4, so that the second analog signal output by the second operational amplifier module 30 is Va2 is transmitted to the judgment unit 42 through the switched input terminal I42 and the switched output terminal O4, and the judgment unit 42 outputs the second analog signal Va2 as the output signal of the analog front-end circuit. In this way, the judging unit 41 selectively turns on the switch input terminal I41 or I42 and the switch output terminal O4 of the gating switch unit 42, and selects and outputs the first analog signal Va1 according to the properties of the first analog signal Va1 or the second analog signal. Or the second analog signal Va2, which enables the analog front-end circuit to adjust the amplitude of the received analog signal while having a larger dynamic range of input and output, and the analog front-end circuit has good frequency response characteristics and bandwidth. Internal flatness.

When the judging unit 41 preferentially controls the switch input terminal I42 of the gating switch unit 42 and its switch output terminal O4 to conduct, the technical principle is the same as the above-mentioned judging unit 41 preferentially controls the switch input terminal I41 of the gating switch unit 42 and its switch output terminal O4 The technical principle of turn-on is similar, and the similarities can be referred to the above description of when the judgment unit 41 preferentially controls the switch input terminal I41 of the gating switch unit 42 and its switch output terminal O4 to be turned on, which will not be repeated here.

Optionally, FIG. 5 is a schematic structural diagram of a first channel provided by an embodiment of the present application. As shown in FIG. 5 , the first operational amplifier module 20 may include a first operational amplifier U1 and a second operational amplifier U2; the first operational amplifier U1 is configured to perform the first stage on the input signal Vin whose attribute is within the first preset range After the in-phase amplitude adjustment, output to the second operational amplifier U2; the second operational amplifier U2 is set to perform in-phase amplitude adjustment on the input signal Vin whose attributes are within the second preset range, or to the signal output by the first operational amplifier U1 Perform the second-level in-phase amplitude adjustment.

Since an operational amplifier capable of in-phase amplitude adjustment usually works within a specific bandwidth and/or voltage range; therefore, the first preset range may be the frequency range and/or voltage in which the first operational amplifier U1 can work normally range, and the second preset range is the frequency range and/or voltage range in which the second operational amplifier U2 can work normally. At this time, the receiving circuit 10 can input the input signal Vin with the frequency and/or voltage within the first preset range to the first operational amplifier U1 for in-phase amplitude adjustment, and input the frequency and/or voltage within the second preset range The input signal Vin within the range is input to the second operational amplifier U2 for in-phase amplitude adjustment. In this way, the input signal Vin with the frequency and/or voltage within the first preset range will be sequentially converted into the first analog signal Va1 by the first operational amplifier U1 and the second operational amplifier U2 after two-stage in-phase amplitude adjustment, while the frequency And/or the input signal Vin with the voltage within the second preset range will be converted into the first analog signal Va1 after in-phase amplitude adjustment by the second operational amplifier U2; wherein the frequency and/or the frequency at which the first operational amplifier U1 can work normally Or the voltage may be lower than the frequency and/or voltage at which the second operational amplifier U1 can work normally. In this way, on the premise that both the first operational amplifier U1 and the second operational amplifier U2 can work normally, it is beneficial to increase the working bandwidth and/or the working voltage range of the first operational amplifier module 20 as a whole.

Exemplarily, in order to realize the above functions, one end of the receiving circuit 10 can be electrically connected to the input end of the input signal Vin, and the other end of the receiving circuit 10 can be respectively connected to the non-inverting input end of the first operational amplifier U1 and the non-inverting input end of the second operational amplifier U2. The non-inverting input terminal is electrically connected, the output terminal of the first operational amplifier U1 can be electrically connected with the non-inverting input terminal of the second operational amplifier U2, and the output terminal of the second operational amplifier U2 can be the output terminal of the first operational amplifier module 20; The output terminal of the operational amplifier U2 can also be electrically connected to the inverting input terminal of the second operational amplifier U2 and the inverting input terminal of the first operational amplifier U1. In this way, the receiving circuit 10 can convert the input signal Vin to the first preset range in which the first operational amplifier U1 can work normally, and then output it to the non-inverting input terminal of the first operational amplifier U1, and convert the input signal Vin to the second operational amplifier U1. The amplifier U2 is outputted to the non-inverting input terminal of the second operational amplifier U2 within the second preset range in which the amplifier U2 can work normally.

The first operational amplifier U1 may be a precision operational amplifier, and the second operational amplifier U2 may be a broadband operational amplifier. "Precision" refers to the accuracy of the operational amplifier. Generally speaking, "precision" targets parameters such as offset voltage, offset voltage temperature drift, or equivalent input noise. The range of parameters varies according to different application scenarios. For example, the offset voltage is within ±25uV, the temperature drift of the offset voltage is within 0.6uV/℃, and the noise spectral density is within

and many more. The bandwidths of the first operational amplifier and the second operational amplifier are generally quite different. For example, the bandwidth of the first operational amplifier is 25MHz, and the bandwidth of the second operational amplifier is 2GHz.

In the case where the first operational amplifier U1 is a precision operational amplifier and the second operational amplifier U2 is a broadband operational amplifier, the first operational amplifier U1 has the characteristics of small bandwidth and large gain, while the second operational amplifier U2 has the characteristics of large bandwidth and small gain specialty. The bandwidth of the first operational amplifier U1 is smaller than the bandwidth of the second operational amplifier U2. In this way, by adjusting the in-phase amplitude of the input signal Vin in the low frequency range by the first operational amplifier U1, the signal after the in-phase amplitude adjustment by the first operational amplifier U1 has higher accuracy, smaller offset and lower noise; and the input signal Vin in the high frequency range is adjusted in-phase amplitude by the second operational amplifier U2, so that the first operational amplifier module 20 has lower noise, lower offset and higher The bandwidth of the first operational amplifier module 20 can be increased on the premise of the in-band flatness of 1000000000 .

The above-mentioned receiving circuit 10 has the function of signal conversion to convert the frequency and/or voltage of the input signal Vin into the frequency and/or voltage range that the first operational amplifier U1 and the second operational amplifier U2 can work normally, respectively. In this example, the first operational amplifier module 20 may be integrated with a structure that can be configured to adjust at least one of the attribute parameters such as frequency, voltage, and gain of the signal.

Optionally, FIG. 6 is a schematic structural diagram of another first channel provided by an embodiment of the present application. As shown in FIG. 6, on the basis of the above-mentioned embodiment, the first operational amplifier module 20 further includes a clamping unit 210; the clamping unit 210 is configured to clamp the signal input to the first operational amplifier U1 to the first pre-amplifier. within the preset range, and/or the signal input to the second operational amplifier U2 is clamped to within the second preset range. In this way, by setting the clamping unit 210, the first operational amplifier module 20 can be internally integrated with a structure configured to adjust the frequency and/or voltage input to the non-inverting input terminal of the first operational amplifier U1 and the non-inverting input terminal of the second operational amplifier U2 , thereby ensuring that the first operational amplifier U1 and the second operational amplifier U2 work within a safe frequency and/or voltage range.

FIG. 6 is only an exemplary drawing of the embodiment of the present application, and FIG. 6 only exemplarily shows that the clamping unit 210 is disposed between the receiving circuit 10 and the non-inverting input terminal of the first operational amplifier U1, and the receiving circuit 10 and the non-inverting input terminal of the second operational amplifier U2; in addition, in the path connected to the inverting input terminal of the first operational amplifier, a corresponding clamping structure can also be set, so that the input to the first operational amplifier The signal at the inverting input terminal can also be clamped within a safe range for normal operation of the first operational amplifier.

Exemplarily, FIG. 7 is a schematic structural diagram of still another first passage provided by an embodiment of the present application. As shown in FIG. 7 , the clamping unit 210 may include a first clamping sub-unit 211 , a second clamping sub-unit 212 and a third clamping sub-unit 213 . The first clamping subunit 211 is electrically connected between the receiving circuit 10 and the non-inverting input terminal of the second operational amplifier U2, and the second clamping subunit 212 is electrically connected between the receiving circuit 10 and the non-inverting input terminal of the first operational amplifier U1, The third clamping unit 213 is electrically connected to the inverting input terminal of the first operational amplifier U1 and the output terminal of the first operational amplifier U1, and between the inverting input terminal of the first operational amplifier U1 and the output terminal of the second operational amplifier U2 between. In this way, the first clamping sub-unit 211 can clamp the input signal Vin transmitted from the receiving circuit 10 to the non-inverting input terminal of the second operational amplifier U2 to the voltage and/or frequency range that the non-inverting input terminal of the second operational amplifier U2 can withstand. , the second clamping subunit 212 can clamp the input signal Vin transmitted from the receiving circuit 10 to the non-inverting input terminal of the first operational amplifier U1 to the voltage and/or frequency range that the non-inverting input terminal of the first operational amplifier U1 can withstand, The third clamping sub-unit 213 can clamp the signal fed back from the output terminal of the first operational amplifier U1 and/or the output terminal of the second operational amplifier U2 to the inverting input terminal of the first operational amplifier U1 to the inverting terminal of the first operational amplifier U1 within the voltage and/or frequency range that the phase input can withstand.

Continuing to refer to FIG. 7 , on the basis of the above embodiment, the first operational amplifier module 20 may further include a low frequency gain adjustment unit 220 and an intermediate frequency gain adjustment unit 230; the low frequency gain adjustment unit 220 is configured to adjust the first operational amplifier U1 to the receiving circuit The gain degree of the low frequency signal output by 10; the intermediate frequency gain adjustment unit 230 is set to adjust the gain degree of the intermediate frequency signal output by the receiving circuit 10 by the second operational amplifier U2. In this way, by integrating the low frequency gain adjustment unit 220 and the intermediate frequency gain adjustment unit 230 in the first operational amplifier module 20, the frequency response of the low frequency type and the intermediate frequency type signal can be calibrated, so that the signal transmitted by the receiving circuit 10 to the first When the signals of the non-inverting input terminal of the first operational amplifier U1 and the non-inverting input terminal of the second operational amplifier U2 of an operational amplifier module 20 are in the low frequency and intermediate frequency ranges, the first operational amplifier module 20 can have high linearity, low noise and high In-band flatness output.

FIG. 7 is only an exemplary drawing of the embodiment of the present application. FIG. 7 exemplarily shows that the low-frequency gain adjustment unit 220 is connected to the inverting input terminal of the first operational amplifier U1, the output terminal of the first operational amplifier U1 and the The non-inverting input terminal of the second operational amplifier U2 is electrically connected, and the intermediate frequency gain adjustment unit 230 is electrically connected to the inverting input terminal of the first operational amplifier U1 and the output terminal of the second operational amplifier U2 respectively; The connection relationship between the adjustment unit 220 and the intermediate frequency gain adjustment unit 230 and the first operational amplifier U1 and the second operational amplifier U2 is not limited to this. Meanwhile, the realization forms of the low frequency gain adjustment unit 220 and the intermediate frequency gain adjustment unit 230 are related to the functions to be realized, and those skilled in the art can set them according to the actual situation, which is not limited here.

Exemplarily, FIG. 8 is a schematic diagram of a circuit structure of a first path provided by an embodiment of the present application. As shown in FIG. 8 , the low-frequency gain adjustment unit 220 may include resistors R13, R14 and R15 and a capacitor C12; one end of the capacitor C12 is electrically connected to the inverting input end of the first operational amplifier U1 through the third clamping subunit 213, and the capacitor C12 The other end of the capacitor C12 is grounded through the resistor R15 and electrically connected to the output end of the first operational amplifier U1 through the resistor R14, and the other end of the capacitor C12 is also electrically connected to the non-inverting input end of the second operational amplifier U2 through the resistors R14 and R13 in turn; wherein, Resistor R15 is a variable resistor. The intermediate frequency gain adjustment unit 230 may include resistors R16, R17 and R18; one end of the resistor R17 is electrically connected to the input end of the compensation power supply VOFFSET, and the other end of the resistor R17 is grounded through the resistor R18 and connected to the output end of the second operational amplifier U2 through the resistor R16 For electrical connection, the other end of the resistor R17 is also electrically connected to the inverting input end of the first operational amplifier U1 through the third clamping subunit 213 ; wherein the resistor R18 is a variable resistor. In this way, by setting the variable resistor R15 in the low frequency gain adjustment unit 220, the variable resistor R15 can be combined with other resistors and capacitors to realize low frequency gain adjustment; by setting the variable resistor R18 in the intermediate frequency gain adjustment unit 230, the variable resistor R15 can be R18 and other resistor structures realize intermediate frequency gain adjustment; at the same time, the gain adjustment step and adjustment range of the low frequency gain adjustment unit 220 and the intermediate frequency gain adjustment unit 230 can be set as required to ensure the realization of the low frequency gain adjustment unit 220 and the intermediate frequency gain adjustment unit. 230 has high gain adjustment accuracy.

In addition, since the gain adjustment step of the low frequency gain adjustment unit 220 is related to the resistance adjustment precision of the variable resistor R15, and the gain adjustment range of the low frequency gain adjustment unit 220 is related to the resistance adjustment range of the variable resistor R15, the gain adjustment can be adjusted according to the gain The adjustment needs to set the resistance adjustment accuracy and range of the variable resistor R15; correspondingly, the gain adjustment step of the intermediate frequency gain adjustment unit 230 is related to the resistance adjustment accuracy of the variable resistor R18, and the gain adjustment range of the intermediate frequency gain adjustment unit 230 is related to The adjustment range of the resistance value of the variable resistor R18 is related, so the adjustment precision and range of the resistance value of the variable resistor R18 can be set according to the gain adjustment needs.

In the embodiment of the present application, the structure configured to adjust the frequency and voltage of the signals input to the first operational amplifier U1 and the second operational amplifier U2 can be integrated into the first operational amplifier module 20, and the receiving circuit 10 may include a signal receiving circuit. The port is set to be the input of the input signal Vin; alternatively, the structure of adjusting the signal frequency and voltage input to the first operational amplifier U1 and the second operational amplifier U2 is set in the receiving circuit 10; alternatively, it is set to adjust the input to The structure of the signal frequency of the first operational amplifier U1 and the second operational amplifier U2 is arranged in the receiving circuit 10, and the structure arranged to adjust the signal voltage input to the first operational amplifier U1 and the second operational amplifier U2 is integrated in the first operational amplifier. In the amplification module; and when the receiving circuit 10 has the function of adjusting the frequency and/or voltage of the signals input to the first operational amplifier U1 and the second operational amplifier U2, the receiving circuit 10 may include corresponding electronic components, the Electronic components may include active components and/or passive components. The active elements may include transistors, etc., and the passive elements may include resistors, capacitors, inductors, and the like.

Exemplarily, continue to refer to FIG. 8, a structure configured to adjust the signal frequencies input to the first operational amplifier U1 and the second operational amplifier U2 is arranged in the receiving circuit 10, and is configured to adjust the input to the first operational amplifier U1 and U2. The structure of the signal voltage of the second operational amplifier U2 is integrated in the first operational amplifier module 20 as an example. The receiving circuit 10 may include a capacitor C11 and resistors R11 and R12; wherein the capacitor C11 is disposed between the input end of the input signal Vin and the first clamping sub-unit 211, so that the capacitor C11 adjusts the frequency of the input signal Vin to the second operational amplifier Within the frequency range that U2 can work normally, the first clamping subunit 211 clamps the voltage of the input signal Vin to the voltage range that the second operational amplifier U2 can work normally; and the resistors R11 and R12 in the receiving circuit 10 can The signals input to the first clamping sub-unit 211 and the second clamping sub-unit 212 are divided into voltages, respectively. Correspondingly, the first clamping sub-unit 211 , the second clamping sub-unit 212 and the third clamping sub-unit 213 may include but not limited to diodes.

Correspondingly, when the receiving circuit includes a first receiving circuit and a second receiving circuit, the first receiving circuit can be electrically connected between the first operational amplifier module and the input end of the input signal, and the second receiving circuit can be electrically connected to the second receiving circuit. Between the operational amplifier module and the input end of the input signal, the implementation forms of the first receiving circuit and the second receiving circuit are related to the functions to be implemented, and those skilled in the art can also set them according to the actual situation. The first receiving circuit and the second receiving circuit may have the same or different circuit structures, and when the second receiving circuit and the first receiving circuit have different circuit structures, the embodiment of the present application does not make any difference to the structure of the second receiving circuit limited.

FIG. 9 is a schematic structural diagram of a second channel provided by an embodiment of the present application. As shown in FIG. 9 , the second operational amplifier module 30 may include a third operational amplifier U3 and a fourth operational amplifier U4; the inverting input terminal of the third operational amplifier U3 is the non-inverting input terminal of the second operational amplifier module 30, and the third operational amplifier U3 The inverting input terminal of the operational amplifier U3 is the inverting input terminal of the second operational amplifier module 30; the inverting input terminal of the fourth operational amplifier U4 is electrically connected to the inverting input terminal of the third operational amplifier U3, and the third operational amplifier U3 The output terminal of , is electrically connected to the non-inverting input terminal of the fourth operational amplifier U4. In this way, by arranging two operational amplifiers (the third operational amplifier U3 and the fourth operational amplifier U4) in the second operational amplifier module 30, the bandwidth of the second operational amplifier module 30 can be increased, and the bandwidth of the second operational amplifier module 30 can be increased. The dynamic range of the input and output of the analog front-end circuit.

Optionally, the third operational amplifier U3 may be a high-precision operational amplifier, and the fourth operational amplifier U4 may be a broadband operational amplifier. The bandwidth of the third operational amplifier U3 is smaller than that of the fourth operational amplifier U. In one embodiment, the gain of the third operational amplifier is 120 dB, and the gain of the fourth operational amplifier is 60 dB. In this way, the third operational amplifier U3 can have the characteristics of high DC switching gain, low offset, and low frequency noise, and the fourth operational amplifier U4 can have the characteristics of high bandwidth and low high frequency noise, so that the third operational amplifier U3 and the fourth operational amplifier U3 can be included. Under the premise of low noise and low offset, the second operational amplifier module 30 of the operational amplifier U4 can adjust the gain of various types of signals in the full frequency band, and improve the dynamic range of the input and output of the analog front-end circuit.

The embodiment of the present application further provides a chip, and the chip includes the analog front-end circuit provided by the embodiment of the present application. Therefore, the chip provided by the embodiment of the present application includes the technical features of the analog front-end circuit provided by the embodiment of the present application, and can achieve the implementation of the present application. For the technical effect of the analog front-end circuit provided by the example, reference may be made to the above description of the analog front-end circuit provided by the embodiment of the present application for the same point, which will not be repeated here.

Embodiments of the present application further provide a signal processing apparatus, where the signal processing apparatus includes but is not limited to an oscilloscope. The signal processing apparatus provided by the embodiment of the present application includes the chip provided by the embodiment of the present application. Therefore, the signal processing apparatus provided by the embodiment of the present application includes the technical features of the chip provided by the embodiment of the present application, and can achieve the advantages of the chip provided by the embodiment of the present application. For the technical effect, reference may be made to the above description of the chip provided by the embodiment of the present application for the same point, and details are not repeated here.

Claims

An analog front-end circuit, comprising: a receiving circuit, a first operational amplifier module, a second operational amplifier module, and a control module;

The receiving circuit is configured to receive the input signal of the analog front-end circuit;

The first operational amplifier module is configured to perform in-phase amplitude adjustment on the signal output by the receiving circuit, and output a first analog signal;

The second operational amplifying module is configured to perform inverse amplitude adjustment on the signal output by the receiving circuit, and output a second analog signal;

The control module is configured to select and output the first analog signal or the second analog signal according to the properties of the input signal, the first analog signal or the second analog signal.
The analog front-end circuit of claim 1, wherein the property includes at least one of an rms value and a peak-to-peak value of current or voltage;

The control module is set to:

Acquire at least one of the effective value and peak-to-peak value of the current or voltage of the input signal, the first analog signal or the second analog signal, and determine whether the acquired value is less than a first preset threshold; in response to When the obtained value is smaller than the first preset threshold, the first analog signal is selected to be output; in response to the obtained value greater than or equal to the first preset threshold, the second analog signal is selected to be output.
The analog front-end circuit according to claim 1, wherein the control module comprises a judgment unit and a gating switch unit;

The gating switch unit includes at least one switch input terminal and a switch output terminal;

The judging unit is electrically connected to the switch input end, the output end of the first operational amplifier module, and the output end of the second operational amplifier module; the judging unit is configured to be based on the first analog signal or The attribute of the second analog signal controls the gating switch unit to select and output the first analog signal or the second analog signal.
The analog front-end circuit according to claim 1, wherein the control module comprises a judgment unit and a gating switch unit;

The gating switch unit includes at least two switch input ends and a switch output end; the output end of the first operational amplifier module and the output end of the second operational amplifier module are respectively electrically connected to different switch input ends; the switch output terminal is electrically connected with the judgment unit;

The judging unit is configured to control the gating switch unit to select and output the first analog signal or the second analog signal, and determine the attribute of the analog signal selected and output by the gating switch unit, and selectively output the the first analog signal or the second analog signal.
The analog front-end circuit according to claim 1, wherein the first operational amplifier module comprises a first operational amplifier and a second operational amplifier;

The first operational amplifier is configured to perform first-stage in-phase amplitude adjustment on the input signal whose attribute is within a first preset range, and output the adjusted signal to the second operational amplifier;

The second operational amplifier is configured to perform in-phase amplitude adjustment on the input signal whose attribute is within a second preset range, or perform second-stage in-phase amplitude adjustment on the signal output by the first operational amplifier.
The analog front-end circuit according to claim 5, wherein the first operational amplifier module further comprises a clamping unit;

The clamping unit is set to at least one of the following: clamping the signal input to the first operational amplifier within the first preset range, and clamping the signal input to the second operational amplifier to within the first predetermined range; within the second preset range.
6. The analog front-end circuit of claim 5, wherein the bandwidth of the first operational amplifier is smaller than the bandwidth of the second operational amplifier.
The analog front-end circuit according to claim 5, wherein the first operational amplifier module further comprises a low frequency gain adjustment unit and an intermediate frequency gain adjustment unit;

The low-frequency gain adjustment unit is configured to adjust the gain of the first operational amplifier to the low-frequency signal output by the receiving circuit;

The intermediate frequency gain adjustment unit is configured to adjust the degree of gain of the intermediate frequency signal output by the second operational amplifier to the receiving circuit.
The analog front-end circuit according to claim 1, wherein the second operational amplifier module comprises a third operational amplifier and a fourth operational amplifier;

The non-inverting input terminal of the third operational amplifier is the non-inverting input terminal of the second operational amplifier module, and the inverting input terminal of the third operational amplifier is the inverting input terminal of the second operational amplifier module;

The inverting input terminal of the fourth operational amplifier is electrically connected to the inverting input terminal of the third operational amplifier, and the output terminal of the third operational amplifier is electrically connected to the non-inverting input terminal of the fourth operational amplifier.
9. The analog front-end circuit of claim 9, wherein the bandwidth of the third operational amplifier is smaller than the bandwidth of the fourth operational amplifier.
A chip, comprising: the analog front-end circuit according to any one of claims 1 to 10.
A signal processing device, comprising: the chip of claim 11 .