TWI693788B - Predistorter for compensating linearity of amplifier - Google Patents

Abstract

The present invention discloses a predistorter for compensating linearity of a amplifier. The predistorter has a first capacitor and an impedance conversion circuit. A first end of the first capacitor is coupled to a first node of the amplifier. The impedance conversion circuit is configured to perform an impedance conversion to provide a variable capacitance. The impedance conversion circuit has a first bias input circuit and a bipolar junction transistor (BJT). The first bias input circuit is configured to receive a first input bias. A base of the BJT is coupled to an output end of the first bias input circuit and a second end of the first capacitor, a collector of the BJT is floating, and an emitter of the BJT is coupled to a second node of the amplifier.

Description

Pre-compensator for compensating the linearity of the amplifier

The invention relates to a predistorter for compensating the linearity of the amplifier.

In all kinds of different communication systems, whether it is a transmitter or a receiver, linearity is a basic and important specification. For the transmitter, the amplifier is an important and indispensable component. The communication distance, communication quality, standby time, etc. are inseparable from the amplifier.

Please refer to Figure 1 and Figure 2. FIG. 1 is a schematic diagram of the amplifier 100 in the prior art, and FIG. 2 is used to represent the amplitude distortion (Amplitude distortion or AM-AM Distortion) and phase distortion (Phase distortion or AM-PM Distortion) of the amplifier 100. . The amplifier 100 is used to amplify the input signal Sin to generate the output signal Sout. The amplifier 100 includes a resistor Ra and a bipolar junction transistor (BJT) T1. The emitter of the double carrier junction transistor T1 is coupled to the ground GND. The curve 101 in FIG. 2 is used to represent the phase distortion of the amplifier 100, and the curve 102 is used to represent the amplitude distortion of the amplifier 100. The horizontal axis of the relationship diagram shown in FIG. 2 represents the output power Pout of the amplifier 100, and the vertical axis represents the amplitude distortion and phase distortion of the amplifier 100, wherein the unit of amplitude distortion is "dB" and the unit of phase distortion is "Degree". It can be seen from FIG. 2 that curve 101 is the curve of the notch upward, and curve 102 is the curve of the notch downward, so the phase distortion of the amplifier 100 will be As the output power Pout increases, the amplitude distortion of the amplifier 100 decreases as the output power Pout increases. However, since the directions of the notches of the curves 101 and 102 are different, it is not easy to improve the linearity of the amplifier 100.

An embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The pre-compensator includes a first capacitor and an impedance conversion circuit. The first terminal of the first capacitor is coupled to the first node of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a bipolar junction transistor (BJT). The first bias voltage input circuit is used to receive the first bias voltage. The base of the bipolar junction transistor is coupled to the output end of the first bias input circuit and the second end of the first capacitor, the collector of the bipolar junction transistor is floating, and the bipolar junction transistor The emitter is coupled to the second node of the amplifier.

Another embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The pre-compensator includes a first capacitor and an impedance conversion circuit. The first terminal of the first capacitor is coupled to the first node of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit, a second bias input circuit, a first resistor, a second capacitor, and a field effect transistor. The first bias voltage input circuit is used to receive the first bias voltage. The second bias input circuit is used to receive the second bias voltage. The gate electrode of the field effect transistor is coupled to the output end of the first bias input circuit, and the first electrode in the source and the drain of the field effect transistor is coupled to the second end of the first capacitor and the first resistor The first terminal of the source, the second electrode of the source and drain of the field effect transistor is coupled to the output terminal of the second bias input circuit, the first terminal of the second capacitor and the second terminal of the first resistor, and The second terminal of the second capacitor is coupled to the second node of the amplifier.

Another embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The pre-compensator includes a first bias input circuit, a first capacitor, a second capacitor, and an impedance conversion circuit. The first bias voltage input circuit is used to receive the first bias voltage. The first terminal of the first capacitor is coupled to the output terminal of the first stage circuit of the amplifier. The second terminal of the second capacitor is coupled to the input terminal of the second stage circuit of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first resistor and a bipolar junction transistor. The second terminal of the first resistor is coupled to the reference potential. The base of the bipolar junction transistor is coupled to the output end of the first bias input circuit and the second end of the first capacitor, the collector of the bipolar junction transistor is floating, and the bipolar junction transistor The emitter is coupled to the first end of the first resistor and the first end of the second capacitor.

Another embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The pre-compensator includes a first bias input circuit, a second bias input circuit, a first capacitor, a second capacitor, and an impedance conversion circuit. The first bias voltage input circuit is used to receive the first bias voltage. The second bias input circuit is used to receive the second bias voltage. The first terminal of the first capacitor is coupled to the output terminal of the first stage circuit of the amplifier. The second terminal of the second capacitor is coupled to the input terminal of the second stage circuit of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first resistor and a field effect transistor. The gate electrode of the field effect transistor is coupled to the output end of the first bias input circuit, and the first electrode in the source and the drain of the field effect transistor is coupled to the output end of the second bias input circuit, the first The second end of the capacitor and the first end of the first resistor, the second electrode in the source and the drain of the field effect transistor are coupled to the first end of the second capacitor and the second end of the first resistor.

Another embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The input signal is input to the amplifier via the signal amplification path and amplified by the amplifier. The pre-compensator is formed with a signal shunt path different from the signal amplification path. The pre-compensator includes the first capacitor and resistor Anti-conversion circuit. The first capacitor is disposed on the signal shunt path, and the first end of the first capacitor is coupled to the first node of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a diode. The first bias voltage input circuit is used to input the first bias voltage. The diode is disposed on the signal shunt path, and the anode of the diode is coupled to the output terminal of the first bias input circuit and a second terminal of the first capacitor, and the cathode of the diode is coupled to the reference potential.

Another embodiment of the invention discloses a pre-compensator for compensating the linearity of the amplifier. The pre-compensator includes a first capacitor and an impedance conversion circuit. The first terminal of the first capacitor is coupled to the output terminal of the first stage circuit of the amplifier. The impedance conversion circuit is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes a first bias input circuit and a diode. The first bias voltage input circuit is used to input the first bias voltage. The anode of the diode is coupled to the output of the first bias input circuit and the second end of the first capacitor, and the cathode of the diode is coupled to the input of the second stage circuit of the amplifier.

100, 200, 250, 570, 580: amplifier

101, 102: Curve

300, 300’, 400, 600, 600’, 700: pre-compensator

310, 410, 610, 710: impedance conversion circuit

320, 420, 430, 620, 720, 730: bias input circuit

500: Dynamic bias voltage adjustment circuit

510, 520: resistance capacitance circuit

531: input

532: output

550: Select circuit

582: Bias circuit

630: first stage circuit

640: Second stage circuit

B, N1, N2: Node

C1, C2: capacitance

Con: variable capacitance value

GND: ground terminal

L1: signal amplification path

L2: Signal shunt path

IM1, IM2, Ron, Z: impedance

IN1: the first input

IN2: the second input

M1: Field effect transistor

N3: collector

O1: the first output

O2: second output

OP1: operational amplifier

P1: Control terminal

Pin: input power

Pout: output power

Q1, T, T1, T2: Bipolar junction transistor

R: variable resistance

R1, R2, R3, Ra: resistance

Sc: Select control signal

Sin: input signal

Sout: output signal

T: transistor; bipolar junction transistor

V1, V2, VR: bias voltage

VA, Vb1 to Vbn, Vdet: voltage

Vbat: system voltage

Vbias: constant voltage

VL1: upper limit

Vref: reference potential

Figure 1 is a schematic diagram of an amplifier in the prior art.

Figure 2 shows the amplitude and phase distortion of the amplifier.

FIG. 3 is a schematic diagram of an amplifier according to an embodiment of the invention.

Fig. 4 is a graph showing the relationship between the output power of the amplifier of Fig. 3 and the bias voltage of the collector of the double carrier junction transistor.

FIG. 5 is a schematic diagram of a pre-compensator for improving the linearity of an amplifier according to an embodiment of the invention.

FIG. 6 is a circuit diagram of a pre-compensator according to an embodiment of the invention.

FIG. 7 is a circuit diagram of a pre-compensator according to another embodiment of the invention.

Figure 8 shows the relationship between the input power of the amplifier and the constant voltage Vbias.

FIG. 9 is a waveform diagram of the input signal Sin of FIG. 6.

FIG. 10 is a waveform diagram of the output signal Sout of FIG. 6.

FIG. 11 is a relationship diagram of voltage VA and output power of the amplifier in FIG. 6.

FIG. 12 is a graph showing the relationship between the impedance Ron of the impedance conversion circuit and the output power of the amplifier.

FIG. 13 is a circuit diagram of a pre-compensator according to an embodiment of the invention.

Figure 14 shows the relationship between the input power of the amplifier and the voltage Vdet.

FIG. 15 is a circuit diagram of a bias dynamic adjustment circuit according to an embodiment of the invention.

Figure 16 is an equivalent circuit diagram of the pre-compensator in Figure 6, Figure 7, or Figure 13.

FIG. 17 is a graph of the relationship between the voltage VA in FIG. 6 and the output power of the amplifier when the bias voltage V1 is the voltage Vdet.

Figure 18 is a graph of the relationship between the impedance Ron and the output power of the amplifier in Figure 6 when the bias voltage V1 is the voltage Vdet.

FIG. 19 is a schematic diagram of a selection circuit according to an embodiment of the invention.

FIG. 20 is a schematic diagram of the front compensator of FIG. 13 further including a dynamic bias voltage adjustment circuit and a selection circuit.

Fig. 21 and Fig. 22 are used to illustrate the different positions of the pre-compensator of the present invention in the amplifier.

FIG. 23 is a circuit diagram of a pre-compensator according to an embodiment of the invention.

FIG. 24 is a circuit diagram of a pre-compensator according to another embodiment of the invention.

FIG. 25 is a circuit diagram of a pre-compensator according to an embodiment of the invention.

Figure 26 is an equivalent circuit diagram of the pre-compensator in Figure 23, Figure 24, or Figure 25.

Please refer to FIG. 3, which is a schematic diagram of an amplifier 200 according to an embodiment of the present invention. enlarge The device 200 may be a power amplifier, but the invention is not limited thereto. The amplifier 200 includes dual carrier junction transistors T1 and T2, wherein the collector and emitter of the dual carrier junction transistor T2 are coupled to each other, so that the amplitude distortion and phase distortion of the amplifier 200 can follow the output of the amplifier 200 The power increases simultaneously or decreases simultaneously. Please refer to FIG. 3 and FIG. 4 at the same time. FIG. 4 is a diagram showing the relationship between the output power Pout of the amplifier 100 and the bias voltage VR of the collector of the two-carrier junction transistor T2. Among them, when the output power Pout increases, the bias voltage VR will decrease accordingly. However, when the two-carrier junction transistor T2 is a heterojunction bipolar transistor (HBT) made of gallium arsenide (GaAs), the capacitance of the depletion region and the square root of the bias voltage VR Inversely proportional, the capacitance of the depletion region of the two-carrier junction transistor T2 is less sensitive to the bias voltage VR and makes the impedance of the node B lower. Therefore, the two-carrier junction transistor T2 needs to have a large enough volume so that the capacitance in the depletion region is not too small. However, increasing the volume of the T2 transistor of the double carrier junction may result in a lower gain and a smaller bandwidth of the amplifier 200.

Please refer to FIG. 5, which is a schematic diagram of a pre-compensator 300 for improving the linearity of the amplifier 250 according to an embodiment of the present invention. The amplifier 250 may be a power amplifier, but the invention is not limited thereto, for example, it may also be a low noise amplifier. In this embodiment, for convenience of explanation, the precompensator 300 and the amplifier 250 in FIG. 5 are represented by different devices. However, it should be understood that the pre-compensator 300 can also be integrated into the amplifier 250 and become a part of the amplifier 250. As shown in the figure, the pre-compensator 300 is coupled between the node N1 and the node N2, where the node N1 is the input terminal of the amplifier 250, and the node N2 is coupled to the reference potential Vref. In an embodiment of the invention, the reference potential Vref may be a ground potential, but the invention is not limited thereto. The amplifier 250 amplifies the input signal Sin input to generate the output signal Sout. The pre-compensator 300 is used to compensate the linearity of the amplifier 250. The pre-compensator 300 compensates the linearity of the amplifier 250, including the compensation of the amplitude distortion (AM-AM Distortion) and phase distortion (AM-PM Distortion) of the amplifier. Due to the function of the pre-compensator 300, the amplitude distortion and phase distortion of the amplifier 250 can be the same as the output power of the amplifier 250 Increasing from time to time or decreasing at the same time. In addition, the pre-compensator 300 can provide a variable capacitance value to adjust the linearity of the amplifier 250, and the provided variable capacitance value can avoid the amplifier 200 as shown in FIG. The problem is that the gain is too low or the bandwidth is too small.

Please refer to FIG. 6, which is a circuit diagram of the pre-compensator 300 according to an embodiment of the invention. The pre-compensator 300 is coupled between the node N1 and the node N2, and includes a capacitor C1 and an impedance conversion circuit 310. The node N1 is coupled to the base of the bipolar junction transistor T1, and the bipolar junction transistor T1 is an element of the amplifier 250 of FIG. The first end of the capacitor C1 is coupled to the first node N1 of the amplifier. The input signal Sin is input to the amplifier 250 through the signal amplification path L1 and then amplified to an output signal Sout, and the pre-compensator 300 is formed with a signal shunt path L2 different from the signal amplification path L1. Since the signal shunt path L2 of the pre-compensator 300 is different from the signal amplification path L1, and the pre-compensator 300 isolates the DC signal by the capacitor C1 to reduce the influence on the signal amplification path L1, the pre-compensator 300 can When the design of the original amplifier 250 has little influence, the linearity of the amplifier 250 is compensated. In addition, the impedance conversion circuit 310 is used to perform impedance conversion to provide a variable capacitance value to the amplifier 250, and then adjust the linearity of the amplifier 250 by the provided variable capacitance value. The impedance conversion circuit 310 includes a bias input circuit 320 and a bipolar junction transistor (BJT) Q1. The bias input circuit 320 is used to receive the bias voltage V1. The bipolar junction transistor Q1 and the capacitor C1 are both disposed on the signal shunt path L2. The base of the bipolar junction transistor Q1 is coupled to the output end of the bias input circuit 320 and the second end of the capacitor C1. The collector of the bipolar junction transistor Q1 is floating, and the bipolar junction electrode The emitter of the crystal Q1 is coupled to the node N2, and the node N2 is coupled to the reference potential Vref.

In another embodiment, a diode can also be used instead of the bipolar junction transistor Q1. Please refer to FIG. 7, which is a circuit diagram of a pre-compensator 300' according to another embodiment of the present invention. The difference between the pre-compensators 300' and 300 is that the transistor Q1 of the pre-compensator 300 is replaced by a diode D1. among them, The anode of the diode D1 corresponds to the base of the transistor Q1, and the cathode of the diode corresponds to the emitter of the transistor Q1. Both the diode D1 and the capacitor C1 are disposed on the signal shunt path L2. Compared with the transistor Q1, the diode D1 occupies a larger layout area.

In one embodiment, the bias voltage V1 in FIGS. 6 and 7 is a constant voltage Vbias whose voltage value does not change with the input signal Sin or the input power of the amplifier 250. In an embodiment, the constant voltage Vbias can be selected from a plurality of voltages with fixed voltage values. Please refer to FIG. 8. FIG. 8 is a relationship diagram of the input power Pin of the amplifier 250 and the constant voltage Vbias. The constant voltage Vbias is selected from a plurality of voltages Vb1 to Vbn with fixed voltage values. As can be seen from FIG. 7, the voltages Vb1 to Vbn do not change with the input power Pin of the amplifier 250. Due to the magnitude of the constant voltage Vbias (that is, the bias voltage V1), the degree of linear adjustment of the amplifier 250 can be affected. Therefore, by selecting an appropriate voltage from the voltages Vb1 to Vbn as the constant voltage Vbias, the linearity of the amplifier 250 can be fine-tuned to meet different amplifier design requirements.

Please refer to figure 6 again. In this embodiment, the bias voltage V1 is a positive voltage with a fixed voltage value, and since the collector of the bipolar junction transistor Q1 is floating, the bipolar junction transistor Q1 can be regarded as a forward bias The diode has the function of clipping. Please refer to FIG. 9 and FIG. 10, FIG. 9 is a waveform diagram of the input signal Sin, and FIG. 10 is a waveform diagram of the output signal Sout. For convenience of description, the input signal Sin is represented by a sine wave, but it should be noted that the present invention is not limited to this, and the input signal Sin may be other radio frequency (radio frequency) signals. Since the bipolar junction transistor Q1 has the function of cutting the wave, the peak of the output signal Sout will not exceed the upper limit VL1. Therefore, when the input signal Sin is a sine wave, the output signal Sout is not necessarily a sine wave. Since the bipolar junction transistor Q1 has the function of cutting waves, the impedance Ron of the impedance conversion circuit 310 is affected. The variable capacitance value provided by the impedance conversion circuit 310 due to impedance conversion is related to the impedance Ron. Please refer to Figure 11 and Figure 12, Figure 11 is The relationship between the voltage VA in FIG. 6 and the output power Pout of the amplifier 250 is shown in FIG. 12, and the relationship between the impedance Ron of the impedance conversion circuit 310 and the output power Pout of the amplifier 250 is shown in FIG. Among them, as the output power Pout of the amplifier 250 increases, the voltage VA will decrease, and the impedance Ron will increase accordingly. Because the pre-compensator 300 has the above-mentioned characteristics, the pre-compensator 300 is suitable for improving the AM-AM Distortion problem and improving the linearity of the amplifier.

Please refer to FIG. 6 again. In another embodiment of the present invention, the bias input circuit 320 may include a resistor R2. The first end of the resistor R2 is used to input the bias voltage V1, and the second end of the resistor R2 is coupled to the output end of the bias input circuit 320. The resistor R2 has a fixed resistance value, and the resistance value of the resistor R2 can be determined according to different amplifier design requirements. When the resistor R2 with a larger resistance is selected, the impedance Ron will be relatively larger; and when the resistor R2 with a smaller resistance is selected, the impedance Ron will also be relatively smaller.

In some embodiments of the present invention, the bipolar junction transistor Q1 may be a heterojunction bipolar transistor (HBT). In other embodiments of the present invention, the bipolar junction transistor Q1 may be a homojunction junction carrier transistor.

Please refer to FIG. 13, which is a circuit diagram of a pre-compensator 400 according to an embodiment of the invention. The pre-compensator 400 is also coupled between the node N1 and the node N2, and includes a capacitor C1 and an impedance conversion circuit 410. The first end of the capacitor C1 is coupled to the node N1. The impedance conversion circuit 410 is used for impedance conversion to provide a variable capacitance value. The impedance conversion circuit 410 includes a bias input circuit 420, a bias input circuit 430, a resistor R1, a capacitor C2, and a field effect transistor M1. The bias voltage input circuit 420 is used to input a bias voltage V1, and the bias voltage input circuit 430 is used to input a bias voltage V2. The gate of the field effect transistor M1 is coupled to the output end of the bias input circuit 420, and one of the source and the drain of the field effect transistor M1 is coupled to the second end of the capacitor C1 and the first end of the resistor R1 At one end, the source and drain of the field effect transistor M1 The other electrode is coupled to the output end of the bias input circuit 430, the first end of the capacitor C2 and the second end of the resistor R1, and the second end of the capacitor C2 is coupled to the node N2 of the amplifier, and the node N2 is coupled to Reference potential Vref.

In this embodiment, the bias voltage V1 is a constant voltage Vbias whose voltage value does not change with the input signal Sin or the input power of the amplifier, and the bias voltage V2 is a voltage value which will follow the input signal Sin or the input of the amplifier Vdet varies with power. Please refer to FIG. 14, which is a relationship diagram between the input power Pin of the amplifier and the voltage Vdet. When the input power Pin of the amplifier is larger, the voltage Vdet is also larger. The impedance conversion circuit 410 can also be regarded as a diode that is forward biased and has a function of cutting waves. The relationship between the voltage VA of the pre-compensator 400 and the output power Pout of the amplifier is also shown in FIG. 11, and the relationship between the impedance Ron of the pre-compensator 400 and the output power Pout of the amplifier is also shown in FIG. 12. This will not be repeated here. The variable capacitance value provided by the impedance conversion circuit 410 due to impedance conversion is related to the impedance Ron.

The aforementioned voltage Vdet can be generated by the bias dynamic adjustment circuit 500 of the pre-compensator 400. Please refer to FIG. 15, which is a circuit diagram of a bias dynamic adjustment circuit 500 according to an embodiment of the invention. The bias dynamic adjustment circuit 500 is coupled to the input end of the amplifier (such as node N1), and is used to dynamically adjust the magnitude of the voltage Vdet according to the input power of the amplifier. The input terminal 531 of the bias dynamic adjustment circuit 500 can be used to receive the input signal Sin, and the output terminal 532 of the bias dynamic adjustment circuit 500 outputs the voltage Vdet. The bias dynamic adjustment circuit 500 includes a resistance-capacitance circuit 510, a transistor T, a resistance-capacitance circuit 520, and an operational amplifier OP1. The input terminal of the resistor-capacitor circuit 510 is coupled to the input terminal N1 of the amplifier. The transistor T may be a bipolar junction transistor. The collector (first end) of the bipolar junction transistor T is coupled to the system voltage Vbat, and the base (control end) of the bipolar junction transistor T is coupled to the output end of the resistance capacitance circuit 510, while the bipolar The emitter (second end) of the junction transistor T is coupled to the input end of the resistance capacitance circuit 520. The above system voltage Vbat is, for example, the output voltage of the battery, and the system voltage Vbat is usually higher than the reference potential Vref. The resistance capacitance circuit 520 is coupled between the reference potential Vref and the emitter of the bipolar junction transistor T. The positive input terminal of the operational amplifier OP1 is coupled to the emitter of the bipolar junction transistor T, the negative input terminal of the operational amplifier OP1 is coupled to the output terminal of the operational amplifier OP1, and the output terminal of the operational amplifier OP1 outputs the voltage Vdet.

Please refer to FIG. 13 again. In an embodiment of the present invention, the bias input circuit 420 includes a resistor R2, and the bias input circuit 430 includes a resistor R3. The first end of the resistor R2 inputs the bias voltage V1, and the second end of the resistor R2 is coupled to the output terminal of the bias input circuit 420. The first terminal of the resistor R3 receives the bias voltage V2, and the second terminal of the resistor R3 is coupled to the output terminal of the bias input circuit 430.

Please refer to FIG. 16, which is an equivalent circuit diagram of the pre-compensator 300, 300', or 400 in FIG. 6, FIG. 7, or FIG. Taking the pre-compensator 400 in FIG. 13 as an example, the pre-compensator 400 can be regarded as being connected in parallel with the input stage circuit and the output stage circuit of the amplifier. The input stage circuit of the amplifier has an impedance IM1, and the output stage circuit of the amplifier has an impedance IM2. The pre-compensator 400 includes a capacitor C1 and an impedance conversion circuit 410. The impedance conversion circuit 410 is used for impedance conversion to provide a variable resistance R. Among them, the impedance Z is an intermediate stage matching impedance (interstage matching), which may be an inductor or a capacitor. A capacitor C2 exists between the emitter of the bipolar junction transistor Q1 and the reference potential Vref. The equivalent circuit diagrams of the pre-compensators 300 and 300' in Figs. 6 and 7 are similar to those in Fig. 16. In detail, after removing the capacitor C2 in FIG. 16, one end of the variable resistor R is directly coupled to the reference potential Vref, which is the pre-compensators 300 and 300 ′ in FIG. 6 and FIG. 7. Equivalent circuit diagram.

Compared with the above-mentioned impedance Ron will increase with the increase of the output power Pout, the impedance Ron of the pre-compensator according to another embodiment of the invention will decrease with the increase of the output power Pout. Please refer to figure 6 again. When the bias voltage V1 is changed to the voltage value in Figure 6, it will change with the input signal Sin or the input power of the amplifier When the voltage Vdet is changed, the impedance Ron decreases as the output power Pout increases. Please refer to Figure 17 and Figure 18. FIG. 17 is a graph showing the relationship between the voltage VA in FIG. 6 and the output power Pout of the amplifier when the bias voltage V1 is the voltage Vdet. FIG. 18 is a graph showing the relationship between the impedance Ron of the impedance conversion circuit 310 and the output power Pout of the amplifier when the bias voltage V1 is the voltage Vdet. Among them, as the output power Pout of the amplifier 250 increases, the voltage VA will increase accordingly, and the impedance Ron will decrease accordingly. Therefore, by setting the bias voltage V1 to the constant voltage Vbias or the voltage Vdet, the impedance characteristic of the pre-compensator 300 can be changed to adjust and compensate the linearity of the amplifier in different directions.

Similarly, when the bias voltage V1 of the pre-compensator 400 in FIG. 13 is the voltage Vdet and the bias voltage V2 is the constant voltage Vbias, the voltage VA of the pre-compensator 400 will vary with the output power Pout of the amplifier 250 The increase increases, and the impedance Ron of the pre-compensator 400 decreases as the output power Pout of the amplifier 250 increases. The impedance characteristic of the pre-compensator 400 can be changed by setting the bias voltage V1 to one of the constant voltage Vbias and the voltage Vdet and the bias voltage V2 to the other of the constant voltage Vbias and the voltage Vdet Adjust and compensate the linearity of the amplifier in different directions. Because the pre-compensator 400 has the above characteristics, when the bias voltage V1 is a constant voltage Vbias and the bias voltage V2 is a voltage Vdet (or when the bias voltage V1 is a voltage Vdet and the bias voltage V2 is a constant voltage Vbias), The compensator 400 is suitable for improving its AM-AM Distortion problem, and at the same time improving the linearity of the amplifier.

To facilitate the switching between the constant voltage Vbias and the voltage Vdet, the pre-compensator 300 or 400 described above may further include a selection circuit 550. Please refer to FIGS. 19 and 20. FIG. 19 is a schematic diagram of the above selection circuit 550, and FIG. 20 is a schematic diagram of the pre-compensator 400 of FIG. 13 further including the bias dynamic adjustment circuit 500 and the selection circuit 550. The selection circuit 550 includes a first input terminal IN1, a second input terminal IN2, a first output terminal O1, a second output terminal O2, and a control terminal P1. The first input terminal IN1 is used to receive a constant voltage Vbias, the second input terminal IN2 is used to receive a voltage Vdet, and the first output terminal O1 is coupled to the bias input circuit The input terminal of the circuit 420 provides the bias voltage V1, the second output terminal O2 is coupled to the input terminal of the bias input circuit 430 to provide the bias voltage V2, and the control terminal P1 is used to receive the selection control signal Sc. When the control signal Sc is selected to be the first potential (such as a high potential), the selection circuit 550 couples the first input terminal IN1 to the first output terminal O1, and couples the second input terminal IN2 to the second output terminal O2; and when the selection control signal Sc is the second potential (such as a low potential), the selection circuit 550 couples the first input terminal IN1 to the second output terminal O2, and couples the second input terminal IN2 to the first output End O1. Accordingly, it is determined that the bias voltage V1 is the constant voltage Vbias or the voltage Vdet. When the bias voltage V1 is a constant voltage Vbias, the bias voltage V2 is the voltage Vdet; and when the bias voltage V1 is the voltage Vdet, the bias voltage V2 is the constant voltage Vbias. Therefore, by selecting the circuit 550, it is more convenient when switching the constant voltage Vbias and the voltage Vdet.

The pre-compensators 300 and 400 in the above embodiment are disposed between the nodes N1 and N2 of the amplifier, where the node N1 may be the input terminal of the amplifier, and the node N2 may be the reference potential Vref, as shown in FIG. 5. However, the invention is not limited to this. Please refer to FIG. 21 and FIG. 22, FIG. 21 and FIG. 22 are used to illustrate the different positions of the pre-compensators 300 and 400 of the present invention in the amplifier. In the embodiment of FIG. 21, the node N1 is one end of the bias circuit 582 of the amplifier 580, and the node N2 is coupled to the reference potential Vref. In the embodiment of FIG. 22, node N1 is coupled to the output of the first stage circuit 630 of the amplifier 570, and node N2 is coupled to the input of the second stage circuit 640 of the amplifier 570. The first-stage circuit 630 and the second-stage circuit 640 are used to amplify the input signal Sin twice to output the output signal Sout.

Please refer to FIG. 23, which is a circuit diagram of a pre-compensator 600 according to an embodiment of the present invention. The pre-compensator 600 is coupled between the first stage circuit 630 and the second stage circuit 640 of the amplifier. The first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The pre-compensator 600 includes a bias input circuit 620, a capacitor C1, a capacitor C2, and an impedance conversion circuit 610. The bias input circuit 620 is used to input Into a constant voltage Vbias. The first terminal of the capacitor C1 is coupled to the output terminal of the first stage circuit 630 of the amplifier, and the second terminal of the capacitor C2 is coupled to the input terminal of the second stage circuit 640 of the amplifier. The impedance conversion circuit 610 is used for impedance conversion to provide a variable capacitance value Con, and can also provide a variable resistance R. The impedance conversion circuit 610 includes a resistor R1 and a bipolar junction transistor Q1. The second end of the resistor R1 is coupled to the reference potential Vref, the base of the bipolar junction transistor Q1 is coupled to the output end of the first bias input circuit 620 and the second end of the capacitor C1, and the bipolar junction transistor Q1 The collector of the is floating, and the emitter of the bipolar junction transistor Q1 is coupled to the first end of the resistor R1 and the first end of the capacitor C2. In this embodiment, the constant voltage Vbias is a positive voltage with a fixed voltage value, and because the collector of the bipolar junction transistor Q1 is floating, the bipolar junction transistor Q1 can be regarded as a forward bias The diode, but has the function of cutting wave. The linear compensation of the pre-compensator 600 is similar to the linear compensation of the pre-compensator 300, and can also be used to adjust the intermediate stage matching impedance to obtain better linearity.

In another embodiment, the bipolar junction transistor Q1 in FIG. 23 can also be replaced with a diode. Please refer to FIG. 24, which is a circuit diagram of a pre-compensator 600' according to another embodiment of the present invention. The difference between the pre-compensator 600' and 600 is that the transistor Q1 of the pre-compensator 600 is replaced by a diode D1. Among them, the anode of the diode D1 corresponds to the base of the transistor Q1, and the cathode of the diode corresponds to the emitter of the transistor Q1. Compared with the transistor Q1 in FIG. 23, the diode D1 in FIG. 24 occupies a larger layout area.

Please refer to FIG. 25, which is a circuit diagram of a pre-compensator 700 according to an embodiment of the present invention. The pre-compensator 700 is coupled between the first-stage circuit 630 and the second-stage circuit 640 of the amplifier. The first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The precompensator 700 includes a bias input circuit 720, a bias input circuit 730, a capacitor C1, a capacitor C2, and an impedance conversion circuit 710. The bias input circuit 720 is used to input a bias voltage V1, and the bias input circuit 730 is used to input a bias voltage V2. Bias V1 and V2 may be a constant voltage Vbias and a voltage Vdet, respectively. Wherein, when the bias voltage V1 is a constant voltage Vbias, the bias voltage V2 is the voltage Vdet; and when the bias voltage V1 is the voltage Vdet, the bias voltage V2 is the constant voltage Vbias. The first end of the capacitor C1 is coupled to the output end of the first stage circuit 630, and the second end of the capacitor C2 is coupled to the input end of the second stage circuit 640. The impedance conversion circuit 710 is used for impedance conversion to provide a variable capacitance value Con, and at the same time can provide a variable resistance R. The impedance conversion circuit 710 includes a resistor R1 and a field effect transistor M1. The gate of the field effect transistor M1 is coupled to the output of the bias input circuit 720, and one of the source and the drain of the field effect transistor M2 is coupled to the output of the bias input circuit 730 and the capacitor C1 The second end and the first end of the resistor R1, and the other electrode of the source and the drain of the field effect transistor M2 are coupled to the first end of the capacitor C2 and the second end of the resistor R1. The linear compensation characteristic of the pre-compensator 700 is similar to the linear compensation characteristic of the pre-compensator 400, when the bias voltage V1 is a constant voltage Vbias and the bias voltage V2 is a voltage Vdet (or when the bias voltage V1 is a voltage Vdet and the bias voltage V2 For a constant voltage Vbias), the pre-compensator 700 is suitable for improving the problem of amplitude distortion and improving the linearity of the amplifier.

Please refer to FIG. 26, which is an equivalent circuit diagram of the pre-compensator 600, 600', or 700 in FIG. 23, FIG. 24, or FIG. 25. Taking the pre-compensator 600 of FIG. 23 as an example, the first stage circuit 630 and the second stage circuit 640 have impedances IM1 and IM2, respectively. The pre-compensator 600 is coupled between the first-stage circuit 630 and the second-stage circuit 640 of the amplifier, and includes a bias input circuit 620, a capacitor C1, a capacitor C2, and an impedance conversion circuit 610. The impedance conversion circuit 610 is used for impedance conversion to provide a variable resistance R. Among them, the impedance Z is an intermediate stage matching impedance (interstage matching), which may be an inductor or a capacitor. Similarly, the equivalent circuit diagrams of the pre-compensators 600' and 700 in Figs. 24 and 25 are also shown in Fig. 26.

In the embodiment of the present invention, the pre-compensator can compensate the linearity of the amplifier, and the pre-compensator has an impedance conversion circuit for performing impedance conversion to provide a variable capacitance value, which can prevent the amplifier from being too bulky and having a low gain or The bandwidth is too small.

The above are only the preferred embodiments of the present invention, and all changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.

400: pre-compensator

410: Impedance conversion circuit

420, 430: Bias input circuit

C1, C2: capacitance

N1, N2: Node

M1: Field effect transistor

T1: Bipolar junction transistor

R1, R2, R3: resistance

Ron: impedance

Sin: input signal

Sout: output signal

V1, V2: bias voltage

VA: voltage

Vref: reference potential

Claims (8)

A pre-compensator is used for compensating the linearity of an amplifier. The pre-compensator includes: a first capacitor, a first end of the first capacitor is coupled to a first node of the amplifier; one An impedance conversion circuit for performing impedance conversion to provide a variable capacitance value. The impedance conversion circuit includes: a first bias input circuit for inputting a first bias voltage; and a second bias input circuit for Input a second bias voltage; a first resistor; a second capacitor; and a field effect transistor; and a selection circuit for selecting a voltage from a first voltage and a second voltage as the first bias voltage , Wherein the first voltage is a constant voltage, and the voltage value of the second voltage changes with the input power of the amplifier; wherein a gate of the field effect transistor is coupled to the first bias input circuit At the output end, a first electrode of a source and a drain of the field effect transistor is coupled to a second end of the first capacitor and a first end of the first resistor, the field effect transistor A second electrode of a source and a drain is coupled to the output terminal of the second bias input circuit, a first terminal of the second capacitor and a second terminal of the first resistor, and the A second terminal of the second capacitor is coupled to a second node of the amplifier. The preceding compensator as claimed in claim 1, wherein the first node is an input terminal of the amplifier, and the second node is coupled to a reference potential. The preceding compensator as described in claim 1, wherein the first node is a bias voltage of the amplifier One end of the circuit, and the second node is coupled to a reference potential. The preceding compensator as claimed in claim 1, wherein the first node is coupled to the output of a first-stage circuit of the amplifier, and the second node is coupled to the input of a second-stage circuit of the amplifier . The front compensator as described in claim 1, wherein the selection circuit includes: a first input terminal for receiving the first voltage; a second input terminal for receiving the second voltage; and a first output End, coupled to the input end of the first bias input circuit to provide the first bias; a second output end, coupled to the input end of the second bias input circuit to provide the second bias And a control terminal for receiving a selection control signal; wherein when the selection control signal is a first potential, the selection circuit couples the first input terminal to the first output terminal, and connects the first Two input terminals are coupled to the second output terminal; and when the selection control signal is at a second potential, the selection circuit couples the first input terminal to the second output terminal and connects the second input terminal The terminal is coupled to the first output terminal. As described in claim 1, the pre-compensator further includes a bias voltage dynamic adjustment circuit, coupled to the input terminal of the amplifier, for dynamically adjusting the second voltage according to the input power of the amplifier. The pre-compensator according to claim 6, wherein the dynamic bias voltage adjustment circuit includes: a first resistance-capacitance circuit, an input terminal of the first resistance-capacitance circuit is coupled to an input of the amplifier A transistor, the first end of the transistor is coupled to a system voltage, and the control end of the transistor is coupled to the output of the first resistor-capacitor circuit; a second resistor-capacitor circuit is coupled to Between a reference potential and the second terminal of the transistor; and an operational amplifier, a first input terminal of the operational amplifier is coupled to the second terminal of the transistor, a second input terminal of the operational amplifier is coupled Connected to an output terminal of the operational amplifier, the output terminal of the operational amplifier outputs the second voltage. The pre-compensator according to claim 1, wherein the first bias input circuit includes a second resistor, and the second bias input circuit includes a third resistor; wherein a first terminal of the second resistor Input the first bias voltage, a second end of the second resistor is coupled to the output end of the first bias input circuit; and wherein a first end of the third resistor inputs the second bias voltage, the first A second terminal of the three resistors is coupled to the output terminal of the second bias input circuit.

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