WO2022196342A1 - Power element drive device - Google Patents

Abstract

This power element drive device is equipped with: an off-drive circuit (14) for driving so as to perform a normal off operation from an off-drive terminal (MN) by taking away the gate voltage of a power element (1, 1a, 1b) on the basis of a drive signal (MIN) off command; a soft isolation circuit (20) for driving so as to turn the power element off from an isolation drive terminal by taking away the gate voltage at a different speed than when the off-drive circuit drives so as to turn the same off; an off-holding drive circuit (29) for holding the state of the power element being off, by connecting the source and the gate of the power element at an impedance which is lower compared to the off-drive circuit; a first voltage detection circuit (18) for monitoring the control voltage of the power element at the off-drive terminal; a second voltage detection circuit (27) for monitoring the control voltage of the power element at the isolation drive terminal; and a control unit (11) for determining and controlling the control content on the basis of the drive signal and the monitoring results of the control voltage from the first and second voltage detection circuits.

Description

Power device driver Cross-reference to related applications

This application is based on Japanese Application No. 2021-042450 filed on March 16, 2021, and the contents thereof are incorporated herein.

The present disclosure relates to a power element driving device.

The applicant has proposed a device for driving a power element as in Patent Document 1. According to Patent Document 1, each of a plurality of power elements is provided with a gate voltage detection, and resonance is detected by configuring a resistor and a diode in parallel between the control pole and the control voltage detection section of each power element. blocking the route.

By the way, as a circuit for turning off the power element, in addition to the normal off drive circuit, a soft cutoff circuit and an off hold drive circuit are provided. The drive IC is provided with terminals corresponding to outputs from the respective drive units. Further, the drive IC has a gate voltage detection section for detecting the gate voltage of the power element. The number of terminals of the gate voltage detection section is reduced by sharing the terminal with the off-holding drive section which is driven after the power element is turned off.

However, if it is desired to use an external element to keep the power element off in order to more reliably keep it off, two terminals are required: a terminal for monitoring the gate voltage and a terminal for driving the external terminal. In order to reduce the number of terminals, the off-holding function cannot be integrated into one terminal, and the gate voltage detection section cannot share the terminal with the off-holding drive section, so it is necessary to provide a separate terminal for the gate voltage detection section. produces As a result, the number of terminals of the driving IC increases, which hinders miniaturization of the driving IC.

JP 2018-148745 A

The present disclosure has been made in view of the above circumstances, and aims to provide a power element driving device capable of reducing the number of terminals and miniaturizing the device.

According to one aspect of the present disclosure, an off drive circuit, a soft cutoff circuit, an off hold drive circuit, a first voltage detection circuit, a second voltage detection circuit, and a control section are provided. The off-drive circuit normally off-drives from the off-drive terminal by extracting the gate charge of the power element based on the off command of the drive signal. The soft cutoff circuit off-drives the power element from the cutoff drive terminal at a speed different from the off-driving speed of the off-drive circuit. The OFF hold drive circuit holds the OFF state of the power element by connecting the control terminal of the power element to a low impedance. The first voltage detection circuit monitors the control voltage of the power element at the off drive terminal of the off drive circuit. The second voltage detection circuit monitors the control voltage of the power element at the cutoff drive terminal of the soft cutoff circuit. The control unit determines and controls the contents of control based on the drive signal and the results of monitoring of the control voltage by the first voltage detection circuit and the second voltage detection circuit.

The first voltage detection circuit can monitor the control voltage of the power element from the off-drive terminal, the second voltage detection circuit can monitor the control voltage of the power element from the cut-off drive terminal, and the off-drive terminal and the cut-off drive terminal are used for voltage detection. can be shared as a terminal for Voltage detection, off-driving, and soft shut-off can also be performed through the shut-off drive terminal and the off-drive terminal, and the power element can be driven while reducing the number of terminals and achieving miniaturization.

The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. The drawing is
FIG. 1 is an electrical configuration diagram of a power element driving system in the first embodiment, FIG. 2 is a normal time chart for explaining the flow of the first embodiment, FIG. 3 is a time chart schematically showing voltage changes at each part when half-on detection is performed in the first embodiment; FIG. 4 is an electrical configuration diagram of the power element drive system in the second embodiment, FIG. 5 is a time chart schematically showing voltage changes at each part when short-circuit overcurrent is detected in the second embodiment, FIG. 6 is an electrical configuration diagram of the power element drive system in the third embodiment, FIG. 7 is an electrical configuration diagram of a power element driving system in the fourth embodiment, FIG. 8 is an electrical configuration diagram showing a part of the power element drive system in the fifth embodiment, FIG. 9 is an electrical configuration diagram of a power device driving system according to the sixth embodiment.

Several embodiments will be described below with reference to the drawings. In each of the embodiments described below, the same or similar reference numerals are given to components that perform the same or similar operations, and description thereof will be omitted as necessary.

(First embodiment)
A first embodiment of the present disclosure will be described below with reference to FIGS. 1 to 3. FIG. As shown in FIG. 1, the power element driving device A is a device for driving a gate-driven IGBT 1, and is mainly composed of a driving IC 10. As shown in FIG. The IGBT 1 is connected between its collector and emitter to a feed path to a load (not shown). IGBT is an abbreviation for Insulated Gate Bipolar Transistor, and is used as a power element to be driven. In this embodiment, a single IGBT 1 to be driven is shown.

The IGBT 1 has a sense emitter for current detection, and the sense emitter is connected to a resistor 2 for current detection. The drain and source of an N-channel MOS transistor 6 are connected between the gate of the IGBT 1 and the ground through a parallel connection circuit 5 of a resistor 3 and a diode 4 . The MOS transistor 6 is provided as a semiconductor element that keeps the gate of the IGBT 1 in an off state by setting the gate of the IGBT 1 to a lower impedance state than the off drive circuit 20 .

The driving IC 10, which is an integrated circuit, functions as a semiconductor element driving circuit, and performs gate drive control for ON-driving and OFF-driving the IGBT1. The driving IC 10 supplies power to the gate G of the IGBT 1 from the DC power supply Vcc to turn it on, and discharges the gate charge of the IGBT 1 to the ground through the parallel connection circuit 5 to turn it off. The drive IC 10 includes an ON drive terminal MP, a current detection terminal SOC, a cutoff drive terminal SCO, an OFF drive terminal MN, and an OFF hold drive terminal SOUT.

The driving IC 10 is mainly composed of the control unit 11. The control unit 11 is composed of a microcomputer or a logic circuit. The control unit 11 is a circuit that, when a drive signal MIN for the IGBT 1 is given from the outside, gives a drive signal to the gate G of the IGBT 1 in response to the drive signal MIN, thereby controlling the gate G of the IGBT 1 to be turned on or off. The control unit 11 determines and controls the contents of control based on the monitoring result of the gate voltage of the IGBT 1 by the drive signal MIN and the first voltage detection circuit 18 and the second voltage detection circuit 27 .

The ON drive circuit 12 is configured inside the drive IC 10, and is configured using, for example, a MOS transistor and a buffer circuit. The on-drive circuit 12 is powered by a DC power supply Vcc and outputs a gate drive signal through an on-drive terminal MP. The on-drive circuit 12 drives the IGBT 1 by giving the drive signal from the on-drive terminal MP to the gate G of the IGBT 1 through the resistor 13 when the drive signal is given from the control section 11 .

The off drive circuit 14 is configured inside the drive IC 10 and includes, for example, an N-channel MOS transistor 15 and a buffer circuit 16 . The MOS transistor 15 has a drain connected to the off drive terminal MN and a source connected to the ground. Buffer circuit 16 applies a gate drive signal to gate G of MOS transistor 15 when a drive signal is applied from control unit 11 . The off drive terminal MN is connected to the gate G of the IGBT 1 through the resistor 17 and the parallel connection circuit 5 .

A parallel connection circuit 5 is configured between the gate of the IGBT 1 and the off drive terminal MN of the off drive circuit 14 . The parallel connection circuit 5 has a configuration in which a resistor 3 and a diode 4 are connected in parallel between the gate of the IGBT 1 and the resistor 17, respectively. Diode 4 has its anode connected to the gate of IGBT 1 and its cathode connected to off drive terminal MN through resistor 17 .

The first voltage detection circuit 18 has a comparator 19 and inputs the off-holding threshold value Vt to the inverting input terminal. The first voltage detection circuit 18 is connected in common with the off-drive terminal MN to which the off-drive circuit 14 is connected, detects the gate voltage of the IGBT 1 at the off-drive terminal MN through the parallel connection circuit 5 and the resistor 17, It is detected whether or not the detected voltage exceeds the OFF holding threshold value Vt. The off-holding threshold Vt is predetermined according to the threshold voltage of the IGBT 1 and the off-control voltage, and if the voltage of the off-drive terminal MN exceeds the off-holding threshold Vt, a high-level detection signal is output.

The soft cutoff circuit 20 includes an N-channel MOS transistor 21 and a buffer circuit 22 . The MOS transistor 21 has a drain connected to the cutoff drive terminal SCO and a source connected to the ground. Buffer circuit 22 receives a drive signal from control unit 11 and provides a gate drive signal to MOS transistor 21 . A cut-off drive terminal SCO is connected to the gate G of the IGBT 1 via a resistor 23 and a parallel connection circuit 24 . A parallel connection circuit 24 is formed between the gate of the IGBT 1 and the cutoff drive terminal SCO of the off drive circuit 14 . The parallel connection circuit 24 has a configuration in which a resistor 26 and a diode 25 are connected in parallel between the gate of the IGBT 1 and the resistor 23, respectively. Diode 25 has its anode connected to the gate of IGBT 1 and its cathode connected to cutoff drive terminal SCO through resistor 23 .

Note that in the present embodiment, the resistor 17 and the resistor 23 are set such that the resistance value of the resistor 23 is greater than the resistance value of the resistor 17 . This is because the gate charge of the IGBT 1 is discharged in a longer period of time than in normal times during soft shutdown. The resistance values of the resistors 17 and 23 can be set to appropriate values according to the characteristics of the IGBT 1, and may be set so that the magnitude relationship is reversed.

The second voltage detection circuit 27 has a comparator 28 and inputs the off-holding threshold value Vt to the inverting input terminal. A non-inverting input terminal of the comparator 28 is connected to a common connection point between the cutoff drive terminal SCO and the drain of the MOS transistor 21 .

The second voltage detection circuit 27 is connected in common with the cutoff drive terminal SCO to which the soft cutoff circuit 20 is connected, detects the gate voltage of the IGBT 1 at the cutoff drive terminal SCO through the parallel connection circuit 24 and the resistor 23, It is detected whether or not this detection voltage exceeds the OFF holding threshold value Vt.

The comparator 28 inputs the gate voltage of the IGBT 1 through the parallel connection circuit 24, the resistor 23, and the cutoff drive terminal SCO, and outputs a high-level detection signal if it exceeds the off-holding threshold Vt.

The hold-off driving circuit 29 includes an N-channel MOS transistor 30 and a buffer circuit 31, and in response to a hold-off signal supplied from the control unit 11, the gate of the MOS transistor 6 for holding off, which is an external output element. An OFF hold signal is output from the OFF hold drive terminal SOUT.

The external element drive circuit 32 is configured inside the drive IC 10, is configured by a buffer circuit, and is commonly connected to the OFF hold drive terminal SOUT to which the OFF hold drive circuit 29 is connected. The external element drive circuit 32 is a circuit for driving the MOS transistor 6, which is an external output element, in accordance with the OFF hold signal supplied from the control unit 11. Outputs a hold-off signal.

The current detection circuit 33 is a circuit configured as a first short-circuit overcurrent detection unit that detects whether or not an overcurrent or a short-circuit current has flowed through the IGBT 1, and is connected to the sense emitter of the IGBT 1 via a current detection terminal SOC. ing. The current detection circuit 33 has a comparator 34 and inputs the short-circuit overcurrent threshold Vk to its inverting input terminal.

The current detection circuit 33 detects the sense current by detecting the voltage of the current detection resistor 2 of the IGBT 1 from the current detection terminal SOC, and determines whether the detected voltage of the sense current exceeds the short-circuit overcurrent threshold Vk. To detect. The short-circuit overcurrent threshold Vk is predetermined according to the overcurrent threshold and the short-circuit current threshold of the IGBT 1, and if the voltage of the current detection terminal SOC exceeds the short-circuit overcurrent threshold Vk, a high-level detection signal is output. .

Next, the operation of the above configuration will be described with reference to FIG. 2 during normal operation. Next, the operation when half-on is detected will be described with reference to FIG.

<Normal operation>
FIG. 2 is a timing chart corresponding to normal operation. In the control unit 11, a drive signal is applied to the OFF drive circuit 14 and the OFF hold drive circuit 29 during the time t0 to t1 before the ON drive drive signal MIN is applied from the outside.

At this time, the MOS transistor 15 of the off-drive circuit 14 is turned on, and the off-holding MOS transistor 30 of the off-holding drive circuit 29 is turned on. As a result, the charge on the gate G of the IGBT 1 is discharged, and the gate voltage is at the low potential level.

Next, at time t1, when an ON drive signal is given as a gate drive signal from the outside, the control section 11 switches the OFF drive circuit 14 and the OFF hold drive circuit 29 to the OFF state, and sends the ON drive signal to the ON drive circuit 12. give.

As a result, the MOS transistor 15 of the off-drive circuit 14 is turned off, and the first voltage detection circuit 18 connected to the off-drive terminal MN becomes capable of detecting the gate voltage of the IGBT1. Further, since the soft cutoff circuit 20 is in the OFF state, the second voltage detection circuit 27 connected to the cutoff drive terminal SCO is in a state capable of detecting the gate voltage of the IGBT1.

The ON drive circuit 12 applies a voltage from the DC power supply Vcc to the gate G of the IGBT1. As a result, the gate voltage of the IGBT1 rises, and when the gate voltage of the IGBT1 reaches the on-threshold voltage, the IGBT1 is turned on, and the load is energized from the IGBT1. If at least the gate voltage of the IGBT 1 reaches the on-threshold voltage, the first voltage detection circuit 18 and the second voltage detection circuit 27 output high-level detection signals to the control section 11 .

After that, at time t3, when the drive signal MIN reaches the level corresponding to the off-drive, the control section 11 stops driving the on-drive circuit 12 and drives the off-drive circuit 14 . As a result, the gate G of the IGBT 1 is cut off.

At time t3, a drive command is received and the off-drive circuit 14 is driven to turn on the MOS transistor 15. After time t4, the gate charge of the IGBT 1 is transferred from the parallel connection circuit 5 and the resistor 17 to the off-drive terminal It is discharged to ground through MOS transistor 15 via MN. At this time, the parallel connection circuit 5 is configured by connecting the resistor 3 and the diode 4 in parallel. . As a result, the gate voltage of the IGBT1 can be quickly lowered. After that, the gate voltage of IGBT1 also decreases.

During this period, the first voltage detection circuit 18 is detecting the voltage of the off-drive terminal MN, but as shown from time t4 to t5, the voltage of the off-drive terminal MN becomes low at the same time when the MOS transistor 15 is turned on. level, it falls below the hold-off threshold Vt at time t5.

On the other hand, the second voltage detection circuit 27 detects the gate voltage of the IGBT 1 from the cut-off drive terminal SCO through the parallel connection circuit 24 and the resistor 23 since the MOS transistor 21 of the soft cut-off circuit 20 is in the OFF state also during the time t4-t5. can. Therefore, after the control unit 11 drives the off-drive circuit 14 , the gate voltage of the IGBT 1 can be detected from the cut-off drive terminal SCO using the detection signal of the second voltage detection circuit 27 .

When the gate voltage of the IGBT 1 drops and the voltage of the cutoff drive terminal SCO drops to the OFF holding threshold Vt at time t6, the second voltage detection circuit 27 outputs a low-level detection signal. As a result, the control unit 11 outputs an off-hold drive signal to the off-hold drive circuit 29 at time t6.

The off-hold driving circuit 29 is turned on by applying a drive signal to the gate of the off-holding MOS transistor 30 via the off-holding drive terminal SOUT. Then, the gate charge of the IGBT 1 is rapidly discharged via the ON resistance of the MOS transistor 6, and the gate voltage instantly drops to the low potential level. Since the gate voltage of IGBT1 is held at a low potential level, it is fixed to the off state.

It should be noted that, in the above operation, the detection value of the first voltage detection circuit 18 cannot be used during the period from time t3 to time t6, since driving is performed by the off-drive circuit 14 . However, since neither the off-drive circuit 14 nor the soft cut-off circuit 20 is used during the other period except the time t3 to t6, neither the first voltage detection circuit 18 nor the second voltage detection circuit 27 is used. can be used. By using both detection signals, erroneous detection due to noise or the like can be prevented and reliability can be improved.

In summary, the control unit 11 turns off the off-holding drive circuit 29 when the voltages of both the off-drive terminal MN and the cut-off drive terminal SCO drop to a predetermined off-holding threshold value Vt while the IGBT 1 is off-driven. is controlled to maintain the OFF state. As a result, off-hold driving can be reliably performed.

<Operation at half-on>
Next, with reference to FIG. 3, the operation when the half-on state is continuously detected after the IGBT 1 is turned off will be described. A half-on state indicates a state in which the IGBT 1 operates in the active region.

Time t13 shown in FIG. 3 corresponds to time t3 in FIG. 2, and the operation before time t13 is the same as the operation from time t0 to time t3 in FIG. 2, so a description thereof will be omitted. At time t13 in FIG. 3, when the drive signal MIN reaches the level corresponding to the off-drive, the control unit 11 stops driving the on-drive circuit 12 and drives the off-drive circuit .

As a result, the output of the ON drive circuit 12 is turned off, and the gate G of the IGBT 1 is de-energized. When the off-drive circuit 14 is turned on, the gate charge of the IGBT 1 is discharged from the parallel connection circuit 5 and the resistor 17 to the ground level through the MOS transistor 15 via the off-drive terminal MN. As a result, the gate voltage of the IGBT1 is lowered.

During this period, the first voltage detection circuit 18 detects the voltage of the off-drive terminal MN. The voltage detection circuit 18 cannot detect the gate voltage of the IGBT1. On the other hand, the second voltage detection circuit 27 can detect the gate voltage of the IGBT 1 because the MOS transistor 21 of the soft cutoff circuit 20 is in the OFF state.

Therefore, when the control unit 11 drives the off drive circuit 14, the detection signal of the second voltage detection circuit 27 is used to detect the gate voltage of the IGBT1. When the half-on state continues, the gate voltage of the IGBT 1 decreases slowly, and the voltage at the cutoff drive terminal SCO does not reach the OFF hold threshold Vt even at time t15 after a predetermined time T1 has elapsed from time t13.

At time t15, the second voltage detection circuit 27 does not output a low-level detection signal either. Therefore, at time t15 when the predetermined time T1 has elapsed from time t13, the controller 11 outputs the off-hold drive signal to the off-hold drive circuit 29. to output

The off-holding drive circuit 29 applies a drive signal to the off-holding MOS transistor 6 via the off-holding drive terminal SOUT to turn it on. Then, the gate charge of IGBT 1 is rapidly discharged through the ON resistance of MOS transistor 6, and the gate voltage instantly drops to the low potential level. As a result, the gate voltage of the IGBT1 is held at the low potential level, so that the IGBT1 is fixed in the off state.

It should be noted that neither the off drive circuit 14 nor the soft cutoff circuit 20 is used during the period other than the time t13 to t15. A detection signal can be used, and by using both detection signals, erroneous detection due to noise or the like can be prevented, and reliability can be improved.

In this embodiment, the half-on state is detected when the voltage of the cut-off drive terminal SCO is higher than the off-holding threshold value Vt even after the control unit 11 measures the predetermined time T1. If neither the first voltage detection circuit 18 nor the second voltage detection circuit 27 outputs a detection signal even after T1 is measured, the half-on state may be detected.

In summary, when half-on is detected, the control unit 11 determines that the voltage of either the off-drive terminal MN or the cut-off drive terminal SCO is higher than the predetermined off-holding threshold value Vt when the IGBT 1 is off-driven. When it continues for time T1 or more, half-on detection is performed, and control is performed so that the off-state is maintained by the off-hold driving circuit 29 at the timing of the half-on detection. As a result, off-hold driving can be reliably performed.

As described above, according to this embodiment, the first voltage detection circuit 18 can monitor the gate voltage of the IGBT 1 from the off drive terminal MN, and the second voltage detection circuit 27 can monitor the gate voltage from the cutoff drive terminal SCO. The off-drive terminal MN and cut-off drive terminal SCO can also be shared as terminals for voltage detection. Voltage detection, off-driving, and soft shut-off can also be performed through the cut-off drive terminal SCO and the off-drive terminal MN, and the IGBT 1 can be driven while miniaturizing by suppressing the number of terminals.

(Second embodiment)
A second embodiment will be described with reference to FIGS. 4 and 5. FIG. In this embodiment, the configuration and operation for detecting short-circuit overcurrent will be described.

As shown in FIG. 4, the first voltage detection circuit 18 includes a comparator 19a and is configured to input the short-circuit overcurrent threshold Vm to the inverting input terminal and to input the detected voltage of the off-drive terminal MN to the non-inverting input terminal. be. The comparator 19a is used as a second short-circuit overcurrent detector. The first voltage detection circuit 18 includes a comparator 19b, and is configured by inputting the off-holding threshold Vt to an inverting input terminal and inputting the voltage of the off drive terminal MN to a non-inverting input terminal.

The comparator 19b has the same function as the comparator 19 of the above-described embodiment, so description thereof will be omitted. The comparator 19a detects a voltage based on the gate voltage of the IGBT 1 at the off-drive terminal MN, and outputs a detection signal for determining whether or not the short-circuit overcurrent threshold value Vm is reached to the control unit 11. Based on this detection signal, the control unit 11 can determine whether a short circuit or an overcurrent has occurred.

The second voltage detection circuit 27 has a comparator 28a and is configured by inputting the short-circuit overcurrent threshold value Vm to the inverting input terminal and inputting the detected voltage of the cutoff drive terminal SCO to the non-inverting input terminal. The comparator 28a is used as a second short-circuit overcurrent detector. The second voltage detection circuit 27 includes a comparator 28b, and is configured by inputting the off-holding threshold value Vt to an inverting input terminal and inputting the voltage of the cutoff drive terminal SCO to a non-inverting input terminal.

The comparator 28b has the same function as the comparator 28 of the above-described embodiment, so description thereof will be omitted. The comparator 28a detects a voltage based on the gate voltage of the IGBT 1 at the cutoff drive terminal SCO, and outputs a detection signal for determining whether or not the short circuit overcurrent threshold value Vm is reached to the control unit 11. Based on this detection signal, the control unit 11 can determine whether a short circuit or an overcurrent has occurred.

<Operation at short circuit/overcurrent detection>
Next, the operation when a short circuit or overcurrent is detected when the IGBT 1 is turned on will be described with reference to FIG. As shown in FIG. 4, between times t20 and t21 before the on-driving drive signal MIN is applied, the drive signal is applied to the off-drive circuit 14 and the off-hold drive circuit 29, and the charge of the gate G of the IGBT 1 is reduced. is in a discharged state, and the gate voltage is 0V and ground level.

Next, at time t21, when the drive signal MIN for ON drive is given, the control unit 11 switches the OFF drive circuit 14 and the OFF hold drive circuit 29 to the OFF state, and further gives the ON drive signal to the ON drive circuit 12. . As a result, the IGBT 1 is turned on. When the gate voltage of the IGBT 1 reaches the threshold voltage, the comparator 19 b of the first voltage detection circuit 18 and the comparator 28 b of the second voltage detection circuit 27 output high-level detection signals to the control section 11 .

After that, when a short-circuit current flows through the IGBT1 around time t23, a current corresponding to the short-circuit current also flows through the sense emitter, so the voltage of the sense emitter of the IGBT1 exceeds the short-circuit overcurrent threshold Vk and increases. On the other hand, the detected voltage at the off-drive terminal MN exceeds the short-circuit overcurrent threshold Vm and becomes high. When the voltage of the sense emitter of the IGBT 1 exceeds the short circuit overcurrent threshold Vk, the comparator 34 of the current detection circuit 33 outputs a high level detection signal to the control section 11 . Further, when the detected voltage of the off-drive terminal MN exceeds the short-circuit overcurrent threshold value Vm and becomes higher, the comparator 19 a of the first voltage detection circuit 18 outputs a high-level detection signal to the control section 11 .

When the current detection circuit 33 detects that the short-circuit overcurrent threshold Vk has been exceeded and the comparator 19a of the first voltage detection circuit 18 detects that the short-circuit overcurrent threshold Vm has been exceeded, the control unit 11 starts driving. The IC 10 turns on its internal flag at time t23a, and thereafter stops driving the ON drive circuit 12 and drives the soft cutoff circuit 20. FIG.

As a result, the gate G of the IGBT 1 is cut off, and the MOS transistor 21 of the soft cutoff circuit 20 is turned on, so that the gate charge of the IGBT 1 is discharged from the resistor 23 to the ground through the cutoff drive terminal SCO and the MOS transistor 21 from time t24. be done. At this time, since the parallel connection circuit 24 is formed between the cut-off drive terminal SCO and the gate of the IGBT 1, when the same current flows through the resistor 26 and the diode 25, the forward voltage Vf of the diode 25 is instantaneously applied. Since the voltage drops, the gate voltage of the IGBT 1 can be lowered quickly. Even after that, the gate voltage of the IGBT 1 continues to decrease.

During this time, the second voltage detection circuit 27 detects the voltage of the cutoff drive terminal SCO. The cutoff drive terminal SCO drops to the ground level at time t24 when the MOS transistor 21 is turned on. Therefore, the detection operation cannot be performed through the cutoff drive terminal SCO. On the other hand, the first voltage detection circuit 18 is maintained in a state capable of detecting the gate voltage of the IGBT 1 because the MOS transistor 15 of the off drive circuit 14 is in the off state.

The control unit 11 uses the detection signal of the first voltage detection circuit 18 when the soft cutoff circuit 20 is driven. When the gate voltage of the IGBT 1 decreases and reaches the OFF holding threshold Vt at time t25, the first voltage detection circuit 18 outputs a high-level detection signal. As a result, the control unit 11 outputs an off-hold drive signal to the off-hold drive circuit 29 .

The off-hold driving circuit 29 applies a drive signal to the gate of the off-holding MOS transistor 6 via the off-holding drive terminal SOUT to turn it on. Then, the gate charge of the IGBT 1 is rapidly discharged via the ON resistance of the MOS transistor 6, and the gate voltage instantly drops to the ground level. As a result, the gate voltage of the IGBT 1 is held at the ground level, so that the IGBT 1 is fixed in the off state.

In the above operation, the second voltage detection circuit 27 cannot be used from the time t24 to the time t25 because the soft cutoff circuit 20 performs soft cutoff. However, during periods other than time t24-time t25, neither the off-drive circuit 14 nor the soft cutoff circuit 20 is used. Either detection signal can be used, and by using both detection signals, erroneous detection due to noise or the like can be prevented, and reliability can be improved.

According to the present embodiment, the control unit 11 detects that the predetermined short-circuit overcurrent threshold value Vk has been reached by the current detection circuit 33 when the power device 1 is on-driven, and the off-drive terminal MN is turned on. A short circuit or overcurrent is determined when the voltage is determined to be higher than a predetermined short circuit overcurrent threshold value Vm.

For example, even if an overcurrent temporarily flows through the power element 1 due to some noise and the current detection circuit 33 detects that the detected current has reached the short-circuit overcurrent threshold value Vk, the detected voltage at the off-drive terminal MN does not reach the short-circuit overcurrent threshold value Vm, it is not determined as a short-circuit or overcurrent. This eliminates the influence of noise. The reliability of short-circuit or overcurrent detection can be improved by using the detection voltage of the off-drive terminal MN.

(Modification)
In the present embodiment, when it is detected that the detected current of the power element 1 reaches the short-circuit overcurrent threshold Vk and the detection voltage of the off-drive terminal MN reaches the short-circuit overcurrent threshold Vm, the control unit 11 is controlled by software. Although the cutoff circuit 20 is driven and the voltage of the off-drive terminal MN is monitored by the comparator 19a of the first voltage detection circuit 18, it is not limited to this.

When it is detected that the detected current of the power element 1 reaches the short-circuit overcurrent threshold Vk and the detection voltage of the off-drive terminal MN reaches the short-circuit overcurrent threshold Vm, the control unit 11 turns off the off-drive circuit 14. You can drive. At this time, since the MOS transistor 21 of the soft cutoff circuit 20 is in the off state, the second voltage detection circuit 27 preferably detects the gate voltage of the IGBT 1, and the voltage of the soft cutoff terminal SCO reaches the short-circuit overcurrent threshold value Vm by the comparator 28a. It is preferable to detect whether or not it has been reached. As a result, the influence of noise can be excluded as described above, and the reliability of short-circuit or overcurrent detection can be improved by using the detection voltage of the off-drive terminal MN.

The current detection circuit 34 detects that the detected current of the power element 1 has reached the short-circuit overcurrent threshold Vk regardless of whether or not the voltage detected at the off drive terminal MN has reached the short-circuit overcurrent threshold Vm. A short circuit or an overcurrent may be determined under the condition that the short circuit or overcurrent is detected. Even if a short circuit or overcurrent flows, it can be safely detected. In this case, the control unit 11 may drive the soft cutoff circuit 20 or the off drive circuit 14 . As a result, the same effect as described above can be obtained.

(Third embodiment)
A third embodiment will be described with reference to FIG. As shown in FIG. 6, a plurality of IGBTs 1a and 1b to be driven may be connected in parallel and driven. The number of parallel-connected IGBTs 1a and 1b to be simultaneously driven may be determined according to the driving capability of the power element driving device A, and is not limited to two, and may be three or more.

As shown in FIG. 6, the power element driving device A is mainly composed of a driving IC 110, and is configured to simultaneously drive IGBTs 1a and 1b as a plurality of power elements through resistors 13a and 13b. A sense emitter is formed in each of the plurality of IGBTs 1a and 1b. These multiple IGBTs 1a and 1b are used with their collectors and emitters connected in parallel, not shown.

Resistors 2a and 2b are connected to the sense emitters of the IGBTs 1a and 1b, respectively, and the detected voltages of the resistors 2a and 2b are input to the current detection circuit 33 through current detection terminals SOC1 and SOC2. The current detection circuit 33 has comparators 34a and 34b, and inputs the short-circuit overcurrent threshold value Vk to the inverting input terminal as a comparison reference.

The off-drive circuit 14 is configured to turn off the plurality of IGBTs 1a and 1b simultaneously through the off-drive terminal MN and the resistor 17. A parallel connection circuit 5 is formed between the gates of the plurality of IGBTs 1a and 1b and the off-drive terminal MN of the off-drive circuit 14, respectively. The off drive circuit 14 is configured to turn off the plurality of IGBTs 1a and 1b by applying the same control voltage to the gates of all the plurality of IGBTs 1a and 1b through the parallel connection circuit 5.

The soft cutoff circuit 20 is configured to softly cut off the plurality of IGBTs 1 a and 1 b simultaneously through the soft cutoff terminal SCO and the resistor 23 . A parallel connection circuit 24 is formed between the gates of the plurality of IGBTs 1a and 1b and the soft cutoff terminal SCO of the soft cutoff circuit 20, respectively. The soft cutoff circuit 20 is configured to softly cut off the plurality of IGBTs 1a and 1b by applying the same control voltage to the gates of all the plurality of IGBTs 1a and 1b through a parallel connection circuit 24 . It has been confirmed that this embodiment also behaves in the same manner as the above-described normal operation, half-on detection operation, and short-circuit overcurrent detection operation. .

(Fourth embodiment)
A fourth embodiment will be described with reference to FIG. A short circuit or an overcurrent may be detected by detecting the gate voltages of the plurality of IGBTs 1a and 1b through the cut-off drive terminal SCO and the off-drive terminal MN.

The first voltage detection circuit 18 includes a comparator 19a and is configured by inputting the short-circuit overcurrent threshold value Vm to an inverting input terminal and inputting the voltage of the off-drive terminal MN to a non-inverting input terminal. The first voltage detection circuit 18 includes a comparator 19b, and is configured by inputting the off-holding threshold value Vt to an inverting input terminal and inputting the voltage of the off drive terminal MN to a non-inverting input terminal.

The comparator 19b has the same function as the comparator 19 of the above-described embodiment, so description thereof will be omitted. The comparator 19a detects a voltage based on the gate voltage of the IGBT 1 through the off drive terminal MN, and outputs a detection signal for determining whether or not the short circuit overcurrent threshold value Vm is reached to the control unit 11. Based on this detection signal, the control unit 11 can determine whether a short circuit or an overcurrent has occurred.

The second voltage detection circuit 27 includes a comparator 28a and is configured by inputting the short-circuit overcurrent threshold Vm to an inverting input terminal and inputting the voltage of the cutoff drive terminal SCO to a non-inverting input terminal. The second voltage detection circuit 27 includes a comparator 28b, and is configured by inputting the off-holding threshold value Vt to an inverting input terminal and inputting the voltage of the cutoff drive terminal SCO to a non-inverting input terminal.

The comparator 28b has the same function as the comparator 28 of the above-described embodiment, so description thereof will be omitted. The comparator 28a detects a voltage based on the gate voltage of the IGBT 1 through the cutoff drive terminal SCO, and outputs a detection signal for determining whether or not the short circuit overcurrent threshold value Vm is reached to the control unit 11. Based on this detection signal, the control unit 11 can determine whether a short circuit or an overcurrent has occurred. Also in this embodiment, the same effects as those of the above-described embodiment can be obtained.

(Fifth embodiment)
A fifth embodiment will be described with reference to FIG. As shown in FIG. 8, the current detection circuit 33 includes comparators 34c and 34d. The comparator 34c is configured as a short-circuit detection section having a predetermined short-circuit determination threshold value Vk1 input to an inverting input terminal and a sense emitter current detection voltage input to a non-inverting input terminal through a current detection terminal SOC.

The comparator 34d is configured as an overcurrent detection section having a predetermined overcurrent determination threshold value Vk2 input to an inverting input terminal and a sense emitter current detection voltage input to a non-inverting input terminal through a current detection terminal SOC. Since other configurations of the power element driving device A are the same as those of FIG. 1, illustration and description thereof are omitted.

In such a configuration, it is preferable that the short circuit determination threshold Vk1 and the overcurrent determination threshold Vk2 are set to mutually different values. Then short circuit detection and overcurrent detection can be separated. If the short-circuit determination threshold Vk1 and the overcurrent determination threshold Vk2 are set to different values, the thresholds can be flexibly adjusted, and the degree of freedom in setting can be increased.

(Sixth embodiment)
A sixth embodiment will be described with reference to FIG. As shown in FIG. 9, in addition to the comparator 19, the first voltage detection circuit 18 includes comparators 19c and 19d. The comparator 19c is configured as a short-circuit detection section having a predetermined short-circuit determination threshold value Vm1 input to its inverting input terminal and having a non-inverting input terminal input to the detection voltage of the off-drive terminal MN. The comparator 19d is configured as an overcurrent detection unit having a predetermined overcurrent determination threshold value Vm2 input to its inverting input terminal and having a non-inverting input terminal input to the detection voltage of the off-drive terminal MN.

In addition to the comparator 28, the second voltage detection circuit 27 includes comparators 28c and 28d. The comparator 28c is configured as a short-circuit detection unit having a predetermined short-circuit determination threshold value Vm1 input to an inverting input terminal and a detection voltage of the soft cut-off terminal SCO input to a non-inverting input terminal. The comparator 28d is configured as an overcurrent detection unit having a predetermined overcurrent determination threshold value Vm2 input to its inverting input terminal and having a non-inverting input terminal input to the detection voltage of the soft cutoff terminal SCO. Since other configurations of the power element driving device A are the same as those of FIG. 1, description thereof will be omitted.

In such a configuration, it is preferable that the short circuit determination threshold Vm1 and the overcurrent determination threshold Vm2 are set to mutually different values. Then short circuit detection and overcurrent detection can be separated. If the short-circuit determination threshold value Vm1 and the overcurrent determination threshold value Vm2 are set to different values, the threshold values can be flexibly adjusted, and the degree of freedom in setting can be increased.

(Other embodiments)
The present invention is not limited to the above-described embodiments, and for example, the following modifications or extensions are possible. Although IGBTs 1, 1a, and 1b have been exemplified as power elements, they are not limited to these, and MOSFETs may also be used. For example, power elements using silicon carbide (SiC) or silicon (Si) as a semiconductor material can be applied.

In the drawing, 1, 1a, 1b are IGBTs as power elements, 11 is a control section, 14 is an off drive circuit, MN is an off drive terminal, 20 is a soft cutoff circuit, 29 is an off hold drive circuit, and 18 is a first voltage. A detection circuit, 27 a second voltage detection circuit, 34c a comparator (short-circuit detection unit), 34d a comparator as a short-circuit detection unit, Vk a first short-circuit overcurrent threshold, Vm a second short-circuit overcurrent threshold, Vk1, Vm1 indicates a short circuit determination threshold, and Vk2 and Vm2 indicate overcurrent determination thresholds.

While the present disclosure has been described in reference to the embodiments described above, it is understood that the present disclosure is not limited to such embodiments or structures. The present disclosure also includes various modifications and modifications within the equivalent range. In addition, various combinations and configurations, as well as other combinations and configurations including one, more, or less elements thereof, are within the scope and spirit of this disclosure.

Claims (11)

1. an off-driving circuit (14) for normally off-driving from an off-driving terminal (MN) by extracting gate charges of the power elements (1, 1a, 1b) based on an off command of the driving signal (MIN);
   a soft cutoff circuit (20) for off-driving the power element from the cutoff drive terminal by extracting the gate charge at a speed different from that during the off-drive by the off-drive circuit;
   an OFF hold drive circuit (29) that holds the OFF state of the power element by connecting the gate and source of the power element to an impedance lower than that of the OFF drive circuit;
   a first voltage detection circuit (18) for monitoring the control voltage of the power element at the off drive terminal of the off drive circuit; and a second voltage detection circuit (18) for monitoring the control voltage of the power element at the cutoff drive terminal of the soft cutoff circuit a two-voltage detection circuit (27);
   a control unit (11) for determining and controlling contents of control based on the drive signal and monitoring results of the control voltage by the first voltage detection circuit and the second voltage detection circuit;
   A power element driving device comprising:
2. The power element driving device according to claim 1, wherein one power element to be driven is driven.
3. The power element driving device according to claim 1, wherein a plurality of said power elements to be driven are connected in parallel and driven.
4. When the voltages of both terminals of the off-drive terminal (MN) and the cut-off drive terminal (SCO) drop to a predetermined off-holding threshold while the power element is off-driven, the control unit 4. The power element driving device according to any one of claims 1 to 3, wherein control is performed so that the off state is maintained by an off-hold driving circuit.
5. When the power element is off-driven, the control unit maintains a state in which the voltage of either one of the off-drive terminal (MN) and the cut-off drive terminal (SCO) is higher than a predetermined off-holding threshold for a predetermined time. 4. The power element driving device according to any one of claims 1 to 3, wherein half-on is detected when the state continues for more than (T1), and control is performed so that the off-state is maintained by the off-hold driving circuit at the timing when the half-on is detected. .
6. A first short circuit overcurrent detection for detecting whether the detected current of the power element reaches a predetermined first short circuit overcurrent threshold (Vk) to detect whether an overcurrent or a short circuit current has flowed through the power element. 6. A power element driving device according to any one of claims 1 to 5, comprising a portion (33).
7. A second short-circuit overcurrent detection unit (19a, 28a) for detecting whether the detected voltage of the gate voltage of the power element has reached a predetermined short-circuit overcurrent threshold (Vm),
   The control unit detects that a predetermined first short-circuit overcurrent threshold (Vk) has been reached by the first short-circuit overcurrent detection unit when the power element is on-driven, and detects that the second short-circuit overcurrent threshold (Vk) has been reached. A short circuit or overcurrent is detected when the overcurrent detection unit determines that the voltage of either one of the off drive terminal (MN) and the cutoff drive terminal (SCO) is higher than a predetermined second short circuit overcurrent threshold (Vm). 7. The power element driving device according to claim 6, wherein the determination is as follows.
8. The first short-circuit overcurrent detection unit includes a short-circuit detection unit (34c) that determines short-circuiting of the power element using a predetermined short-circuit determination threshold value (Vk1), and a predetermined overcurrent determination threshold value (Vk2). an overcurrent detection unit (34d) that detects whether or not the current flowing through the power element is overcurrent,
   8. The power element drive according to claim 6 or 7, wherein the short circuit determination threshold (Vk1) and the overcurrent determination threshold (Vk2) are set to different values as the predetermined first short circuit overcurrent threshold (Vk). Device.
9. The second short-circuit overcurrent detection unit includes a short-circuit detection unit (19c) that determines short-circuiting of the power element using a predetermined short-circuit determination threshold value (Vm1), and a predetermined overcurrent determination threshold value (Vm2). an overcurrent detection unit (19d) that detects whether or not the current flowing through the power element is overcurrent,
   8. The power element drive according to claim 6 or 7, wherein the short-circuit determination threshold (Vm1) and the overcurrent determination threshold (Vm2) are set to different values as the predetermined second short-circuit overcurrent threshold (Vm). Device.
10. 10. The power element driving device according to any one of claims 1 to 9, wherein a parallel connection circuit (5) of a resistor (3) and a diode (4) is provided between the gate of the power element and the off drive terminal. .
11. 11. A power element driving device according to any one of claims 1 to 10, wherein a parallel connection circuit (24) of a resistor (26) and a diode (25) is provided between the gate of the power element and the cut-off drive terminal. .
    

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