WO2022188194A1 - 面板驱动电路和显示装置 - Google Patents

面板驱动电路和显示装置 Download PDF

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Publication number
WO2022188194A1
WO2022188194A1 PCT/CN2021/080960 CN2021080960W WO2022188194A1 WO 2022188194 A1 WO2022188194 A1 WO 2022188194A1 CN 2021080960 W CN2021080960 W CN 2021080960W WO 2022188194 A1 WO2022188194 A1 WO 2022188194A1
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WO
WIPO (PCT)
Prior art keywords
connector
module
grounding
power supply
detection feedback
Prior art date
Application number
PCT/CN2021/080960
Other languages
English (en)
French (fr)
Inventor
刘金风
Original Assignee
Tcl华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US17/280,199 priority Critical patent/US11783791B2/en
Publication of WO2022188194A1 publication Critical patent/WO2022188194A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50—Protective arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present application belongs to the field of display technology, and in particular relates to a panel driving circuit and a display device.
  • control board Cboard and the screen horizontal direction scanning driver board Xboard are connected through a flexible flat cable (Flexible Flat Cable, FFC).
  • FFC Flexible Flat Cable
  • FIG. 1 is a schematic structural diagram of a panel driving circuit in the related art.
  • Connector the connector of the horizontal scanning driver board Xboard and the control board Cboard. If the operation is improper, the problem of oblique insertion will easily occur, which will easily lead to chip-on-chip (Chip) On Film, COF) chip ((Integrated Circuit, IC) burned out.
  • FIG. 2 is a schematic structural diagram of an internal power supply circuit of a chip on film chip in the related art.
  • the ground pin of the connector corresponding to the oblique insertion part is not really connected to the system ground, resulting in the left screen horizontal scanning driver board XBoard and the right screen horizontal scanning driver board XBoard not sharing the ground, and there is a potential. Poor, resulting in a voltage jump on the ground of the horizontal scanning driver board XBoard in the horizontal direction of the screen at the oblique insertion position.
  • FIG. 3 is a schematic diagram of the variation trend of each voltage in the related art.
  • the embodiments of the present application provide a panel driving circuit and a display device, which can avoid irreversible damage to the display caused by poor wiring.
  • Embodiments of the present application provide a panel drive circuit, including:
  • control board and a plurality of drive modules; of which,
  • the control board is provided with a plurality of first connectors and a plurality of first anti-slant insertion protection circuits, and each of the first anti-slant insertion protection circuits is connected with the first connector at the corresponding position or is arranged in the corresponding position. on the first connector;
  • Each of the drive modules includes a drive circuit board and a plurality of drive chips, the drive circuit board is connected to the plurality of drive chips, and each of the drive circuit boards is provided with a second connector and a second anti-slant insertion protection circuit, each of the first connectors is connected with the second connector at the corresponding position through a cable, and each of the second anti-slant insertion protection circuit is connected with the second connector at the corresponding position or is arranged at the corresponding position. on the second connector;
  • the first anti-oblique insertion protection circuit and the second anti-oblique insertion protection circuit are used to protect the driving chip when the cable is obliquely inserted.
  • the first anti-slanting protection circuit includes a first grounding module and a second grounding module, and the first grounding module and the second grounding module are correspondingly connected to the pins at both ends of the first connector, for grounding the pins at both ends of the first connector;
  • the second anti-slanting protection circuit includes a third grounding module and a fourth grounding module, and the third grounding module and the fourth grounding module are correspondingly connected to the pins at both ends of the second connector for connecting the The pins at both ends of the second connector are grounded.
  • the first grounding module includes a first grounding resistance
  • the second grounding module includes a second grounding resistance
  • the third grounding module includes a third grounding resistance
  • the fourth grounding module includes a fourth grounding resistance .
  • the first anti-slanting protection circuit includes a first detection feedback pin, and the first detection feedback pin is arranged on the first connector;
  • the second anti-slanting protection circuit includes a second detection feedback pin, the second detection feedback pin is arranged on the second connector, and the first detection feedback pin is connected to the corresponding position.
  • the second detection feedback pin is connected, and the first detection feedback pin and the second detection feedback pin are used for outputting the oblique insertion detection signal.
  • first detection feedback pin is arranged at the center of the first connector
  • second detection feedback pin is arranged at the center of the second connector
  • a power management circuit is also provided on the control board, and the power management circuit includes an AND gate, a control logic module and an output module, and the multiple input ends of the AND gate are respectively connected with the second detection feedback at the corresponding position. pin connection, the output end of the AND gate is connected to the input end of the output module through the control logic module, and the output end of the output module outputs the first power supply voltage, the second power supply voltage and the third power supply voltage respectively .
  • the second power supply voltage is greater than the first power supply voltage.
  • the third power supply voltage is a gamma voltage.
  • the voltage sequence output by the power management circuit to the driver chip is to output the first power supply voltage first, and then output the second power supply voltage and the third power supply voltage to the driver chip after the driver chip works normally. the driver chip.
  • Embodiments of the present application provide a display device, including a display panel and the panel drive circuit provided by the embodiments of the present application, where the panel drive circuit is connected to the display panel to drive the display panel to work.
  • the control board is provided with a plurality of first connectors and a plurality of first anti-slant insertion protection circuits, and each first anti-slant insertion protection circuit corresponds to a corresponding position
  • the first connector is connected or arranged on the first connector at the corresponding position
  • each drive module includes a drive circuit board and a plurality of drive chips
  • each drive circuit board is provided with a second connector and a second anti-slant insertion protection circuit
  • each first connector is connected with the second connector at the corresponding position through a cable
  • each second anti-slanting protection circuit is connected with the second connector at the corresponding position or is arranged at the second connector at the corresponding position
  • the first anti-slanting protection circuit and the second anti-slanting protection circuit are used to protect the driver chip when the cable is inserted obliquely, that is, when the cable is inserted obliquely, the first anti-slanting protection circuit and the
  • FIG. 1 is a schematic diagram of a circuit structure of a panel driving circuit in the related art.
  • FIG. 2 is a schematic structural diagram of an internal power supply circuit of a chip on film chip in the related art.
  • FIG. 3 is a schematic diagram of a variation trend of each voltage in the related art.
  • FIG. 4 is a schematic diagram of a circuit structure of a panel driving circuit provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a scenario of setting a grounding resistance according to an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a scenario of setting a detection feedback pin according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a power management circuit provided by an embodiment of the present application.
  • FIG. 8 is a schematic waveform diagram of a signal level of a power management circuit terminal when a cable is normally connected according to an embodiment of the present application.
  • FIG. 9 is a schematic waveform diagram of a signal level of a power management circuit terminal when a cable is not normally connected according to an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a display device provided by an embodiment of the present application.
  • Embodiments of the present application provide a panel drive circuit, including:
  • control board and a plurality of drive modules; of which,
  • the control board is provided with a plurality of first connectors and a plurality of first anti-slant insertion protection circuits, and each of the first anti-slant insertion protection circuits is connected with the first connector at the corresponding position or is arranged in the corresponding position. on the first connector;
  • Each of the drive modules includes a drive circuit board and a plurality of drive chips, the drive circuit board is connected to the plurality of drive chips, and each of the drive circuit boards is provided with a second connector and a second anti-slant insertion protection circuit, each of the first connectors is connected with the second connector at the corresponding position through a cable, and each of the second anti-slant insertion protection circuit is connected with the second connector at the corresponding position or is arranged at the corresponding position. on the second connector;
  • the first anti-oblique insertion protection circuit and the second anti-oblique insertion protection circuit are used to protect the driving chip when the cable is obliquely inserted.
  • the first anti-slanting protection circuit includes a first grounding module and a second grounding module, and the first grounding module and the second grounding module are correspondingly connected to the pins at both ends of the first connector , for grounding the pins at both ends of the first connector;
  • the second anti-slanting protection circuit includes a third grounding module and a fourth grounding module, and the third grounding module and the fourth grounding module are correspondingly connected to the pins at both ends of the second connector for connecting the The pins at both ends of the second connector are grounded.
  • the first grounding module includes a first grounding resistor
  • the second grounding module includes a second grounding resistor
  • the third grounding module includes a third grounding resistor
  • the fourth grounding module includes a third grounding resistor.
  • the first anti-slanting protection circuit includes a first detection feedback pin, and the first detection feedback pin is arranged on the first connector;
  • the second anti-slanting protection circuit includes a second detection feedback pin, the second detection feedback pin is arranged on the second connector, and the first detection feedback pin is connected to the corresponding position.
  • the second detection feedback pin is connected, and the first detection feedback pin and the second detection feedback pin are used for outputting the oblique insertion detection signal.
  • the first detection feedback pin is arranged at the center of the first connector, and the second detection feedback pin is arranged at the center of the second connector.
  • control board is further provided with a power management circuit
  • the power management circuit includes an AND gate, a control logic module and an output module, and the multiple input ends of the AND gate are respectively connected to the second corresponding position.
  • the detection feedback pin is connected, the output end of the AND gate is connected with the input end of the output module through the control logic module, and the output end of the output module outputs the first power supply voltage, the second power supply voltage and the first power supply voltage respectively.
  • the second power supply voltage is greater than the first power supply voltage.
  • the third power supply voltage is a gamma voltage.
  • the voltage sequence output by the power management circuit to the driving chip is to output the first power supply voltage first, and then output the second power supply voltage and the third power supply voltage after the driving chip works normally. supply voltage to the driver chip.
  • the control board receives the color compression signal, the control signal and the power supply signal, after being processed by the timing controller on the control board, the processed signal is transmitted to the driving module, and the processed signal is transmitted through the The drive module is transmitted to the display panel.
  • the driving circuit board generates a scanning control driving signal in the horizontal direction of the screen according to the timing signal transmitted by the control board.
  • An embodiment of the present application further provides a display device, including a display panel and the above-mentioned panel driving circuit, where the panel driving circuit is connected to the display panel to drive the display panel to work.
  • FIG. 4 is a schematic diagram of a circuit structure of a panel driving circuit provided by an embodiment of the present application.
  • the panel driving circuit includes a control board 101 and a plurality of driving modules 102, the control board 101 is connected with the plurality of driving modules 102, and the control board 101 may be a Cboard board.
  • the panel drive circuit includes two drive modules 102 as an example for illustration.
  • the number of drive modules can be adjusted according to specific requirements.
  • the number of drive modules is four. and many more.
  • the number of driving modules used is related to the size of the display panel. For example, when the size of the display panel is 65 inches, two driving modules can be used for driving. When the size of the display panel is more than 65 inches , 4 drive modules can be used for driving. This embodiment of the present application does not limit the number of driving modules.
  • the control board 101 is provided with a plurality of first connectors and a plurality of first anti-slant insertion protection circuits (not shown in FIG. 4 ), and each first anti-slant insertion protection circuit is connected to a first connector at a corresponding position It is connected or arranged on the first connector at the corresponding position, that is, each first anti-slant insertion protection circuit is respectively connected with a first connector, or each first anti-slant insertion protection circuit is respectively arranged on the first connector at a different position. on a connector.
  • each driver module 102 includes a driver circuit board 201 and a plurality of driver chips 202, that is, each driver module 102 includes a driver circuit board 201 and a plurality of driver chips 202.
  • each driver The module 102 includes 6 driver chips 202 as an example for illustration.
  • the number of driver chips in each driver module can be adjusted according to specific needs, for example, the driver chips in each driver module can be increased or decreased according to the actual application.
  • the number of chips for example, the number of driver chips in each driver module can be set to 4, for another example, the number of driver chips in each driver module can be set to 8, and so on.
  • the driving circuit board 201 is connected to a plurality of driving chips 202 , and each driving circuit board 201 is provided with a second connector 203 and a second anti-slant insertion protection circuit (not shown in FIG. 4 ).
  • Each of the first connectors is connected to the second connector 203 at the corresponding position through the cable 103 respectively, and each second anti-slant insertion protection circuit is connected to the second connector 203 at the corresponding position or is arranged at the second connector 203 at the corresponding position.
  • the cable 103 may be a flexible flat cable, ie, FFC.
  • the control board 101 After the control board 101 receives the color compression signal, the control signal and the power supply signal, after being processed by the timing controller on the control board 101, the processed signal is transmitted to the driving module 102, and then transmitted to the display panel through the driving module 102, so that the The display panel obtains the power supply and signals required for presenting the image, so that the display panel displays the corresponding image.
  • the driving circuit board 201 can generate the horizontal direction scanning control driving signal of the screen according to the timing signal transmitted by the control board 101 .
  • the first anti-oblique insertion protection circuit and the second anti-oblique insertion protection circuit are used to protect the driving chip 202 when the cable 103 is obliquely inserted. 202 is burned out, or, when the cable 103 is inserted obliquely, the pins corresponding to the oblique insertion position on the first connector 104 and the second connector 203 are forced to be grounded to ensure that all the driving circuit boards 201 share the ground and avoid voltage generation. jump to prevent the driver chip 202 from burning out.
  • the control board 101 is provided with a plurality of first connectors and a plurality of first anti-slant insertion protection circuits, each first anti-slant insertion protection circuit Connected with the first connector at the corresponding position or arranged on the first connector at the corresponding position, each drive module 102 includes a drive circuit board 201 and a plurality of drive chips 202, and each drive circuit board 201 is provided with a second connection Each first connector is connected to the second connector 203 at the corresponding position through the cable 103, and each second anti-slant insertion protection circuit is connected to the second connector 203 at the corresponding position.
  • the first anti-oblique insertion protection circuit and the second anti-oblique insertion protection circuit are used to protect the driver chip 202 when the cable is inserted obliquely, that is, when the cable 103 is inserted obliquely.
  • the first anti-slanting protection circuit and the second anti-slanting protection circuit can prevent the drive chip 202 from being burned out due to voltage jumps, and play a protective role.
  • the embodiment of the present application can avoid irreversible damage to the display caused by poor wiring.
  • the first anti-slanting protection circuit may include a first grounding module and a second grounding module, and the first grounding module and the second grounding module are correspondingly connected to the pins at both ends of the first connector, using for grounding the pins at both ends of the first connector. That is, the first grounding module is connected to the pins of one end of the first connector, the second grounding module is connected to the pins of the other end of the first connector, and the pins of one end of the first connector are grounded through the first grounding module. The pin at the other end of the connector is grounded through the second grounding module.
  • the first grounding module may be connected to the first pin of the first connector, and the second grounding module may be connected to the 60th pin of the first connector, or, The first grounding module may be connected to the 60th pin of the first connector, and the second grounding module may be connected to the first pin of the first connector.
  • the first pin and the 60th pin of the first connector can also be grounded, so as to realize the common ground between all the driving circuit boards 201, thereby avoiding A voltage jump is generated to prevent the driver chip 202 from being burned out.
  • the first connector is provided with 80 pins
  • the first grounding module can be connected to the first pin of the first connector
  • the second grounding module can be connected to the first pin of the first connector.
  • the 80th pin is connected, or the first ground module can be connected to the 80th pin of the first connector, and the second ground module can be connected to the first pin of the first connector.
  • the second anti-slanting protection circuit may include a third grounding module and a fourth grounding module, the third grounding module and the fourth grounding module are correspondingly connected to the pins at both ends of the second connector 203 for connecting the two ends of the second connector 203 terminal pin to ground. That is, the third grounding module is connected to the pins of one end of the second connector 203, the fourth grounding module is connected to the pins of the other end of the second connector 203, and the pins of one end of the second connector 203 are grounded through the third grounding module. , the pin at the other end of the second connector 203 is grounded through the fourth grounding module.
  • the third grounding module can be connected to the first pin of the second connector 203
  • the fourth grounding module can be connected to the 60th pin of the second connector 203
  • the third grounding module may be connected to the 60th pin of the second connector 203
  • the fourth grounding module may be connected to the first pin of the second connector 203 .
  • the second connector 203 is provided with 80 pins
  • the third grounding module can be connected to the first pin of the second connector 203
  • the fourth grounding module can be connected to the second The 80th pin of the connector 203 is connected, or the third ground module can be connected to the 80th pin of the second connector 203 , and the fourth ground module can be connected to the 1st pin of the second connector 203 .
  • the first pin and the 80th pin of the second connector 203 can also be grounded, so as to realize the common ground between all the driving circuit boards 201. In this way, voltage jumps are avoided, and the driver chip is prevented from being burned out.
  • FIG. 5 is a schematic diagram of a scenario of setting a grounding resistance provided by an embodiment of the present application.
  • the first grounding module includes a first grounding resistance R1
  • the second grounding module includes a second grounding resistance R2
  • the third grounding module includes a third grounding resistance R3
  • the fourth grounding module includes a fourth grounding resistance R4.
  • the first connector 104 and the second connector 203 are both provided with 60 pins for illustration.
  • the pins provided by the first connector 104 and the second connector 203 are The number can be adjusted according to actual needs, such as setting to 80 pins.
  • the pins at both ends of the first connector 104 and the second connector 203 are ground pins, and the first ground resistance R1 is added to the first pin of each first connector 104 on the control board 101, and the first ground resistance R1 is added at the 60th lead.
  • a second grounding resistor R2 is added to the pin, a third grounding resistor R3 is added to the 60th pin of the second connector 203 on each driver circuit board 201, and a third grounding resistor R3 is added to the 60th pin of the second connector 203 on each driver circuit board 201.
  • a fourth ground resistor R4 is added to the 1 pin.
  • the pin at one end of the connector is not properly connected, the pin at the other end of the connector can ensure that the drive circuit board 201 is connected to the system ground due to the increased grounding resistance. It can be seen that even if the cables 103 are inserted obliquely, all the driving circuit boards 201 can be guaranteed to share the ground. In this way, voltage jumps during oblique insertion can be avoided, thereby protecting the driving chip 202 and preventing the driving chip 202 from burning out.
  • the effective mechanism for preventing the oblique insertion of the cable 103 can avoid irreversible damage to the display caused by poor insertion.
  • the grounding resistance is only added to the pins at one end of the first connector and the second connector.
  • the cable is inserted obliquely, if the grounding resistance is added to the connector The pins at one end of the connector are not plugged in. Since the grounding resistance is not added to the pins at the other end of the connector, the drive circuit boards cannot share the ground, so the drive chip cannot be completely guaranteed to avoid burnout.
  • the first anti-slanting protection circuit includes a first detection feedback pin, and the first detection feedback pin is disposed on the first connector 104 .
  • the second anti-slanting protection circuit includes a second detection feedback pin, the second detection feedback pin is disposed on the second connector 203, the first detection feedback pin and the second detection feedback pin at the corresponding position connection, that is, the first detection feedback pin is connected with the second detection feedback pin at the corresponding position, and the first detection feedback pin and the second detection feedback pin are used to output the oblique insertion detection signal.
  • the first detection feedback pin and the second detection feedback pin are used to output the oblique insertion detection signal.
  • the first detection feedback pin is set as a pin close to the center of the first connector 104
  • the second detection feedback pin is set as a pin close to the center of the second connector 203 .
  • both the first connector 104 and the second connector 203 are provided with 60 pins
  • the 29th pin in the first connector 104 can be selected as the first detection feedback pin
  • the second connector 203 can be selected as the first detection feedback pin.
  • the 29th pin in the pin as the second detection feedback pin.
  • both the first connector 104 and the second connector 203 are provided with 80 pins, and the 39th pin in the first connector 104 can be selected as the first detection feedback pin, The 39th pin in the second connector 203 is selected as the second detection feedback pin.
  • the 42nd pin in the first connector 104 can be selected as the first detection feedback pin, and the second connection is selected. The 42nd pin in the device 203 is used as the second detection feedback pin.
  • the first detection feedback pin can be set at the center of the first connector 104
  • the second detection feedback pin can be set at the center of the second connector 203.
  • the first connector 104 and Each of the second connectors 203 has 60 pins, and the 30th pin in the first connector 104 can be selected as the first detection feedback pin, and the 30th pin in the second connector 203 can be selected as the second
  • the detection feedback pin for another example, the 31st pin in the first connector 104 can be selected as the first detection feedback pin, and the 31st pin in the second connector 203 can be selected as the second detection feedback pin. foot.
  • both the first connector 104 and the second connector 203 are provided with 80 pins, and the 39th pin in the first connector 104 can be selected as the first detection feedback pin, The 39th pin in the second connector 203 is selected as the second detection feedback pin.
  • the 41st pin in the first connector 104 can be selected as the first detection feedback pin, and the second connection is selected. The 41st pin in the device 203 is used as the second detection feedback pin.
  • both ends of the cable 103 can also be aligned with the two ends of the first connector 104 and the second connector 203 .
  • the output voltage to the driver chip 202 can be stopped to protect the driver chip 202 from being burned out.
  • FIG. 6 is a schematic diagram of a scene of setting a detection feedback pin according to an embodiment of the present application.
  • the 26th pin near the center can be selected as the detection feedback Detected Function, DF) pins DF1, DF2, since FIG. 6 is illustrated with two driving circuit boards 201 as an example, the corresponding second detection feedback pins on each driving circuit board 201 are marked as DF1, DF2, respectively, If there are four driving circuit boards 201, the corresponding second detection feedback pins on each driving circuit board 201 are marked as DF1, DF2, DF3, DF4, etc. respectively.
  • DF detection feedback Detected Function
  • the control board 101 is further provided with a power management circuit.
  • the power management circuit 105 may be a power management integrated circuit (Power Management IC, PMIC), and the power management circuit 105 may include an AND gate 501, a control logic module 502 and an output module 503, wherein a plurality of input terminals of the AND gate 501 are respectively Connect with the second detection feedback pin at the corresponding position, the output end DF of the AND gate 501 is connected with the input end of the output module 503 through the control logic module 502, and the three output ends of the output module 503 output the first power supply voltage, the third Two power supply voltages VAA and third power supply voltages GAMMA.
  • the first power supply voltage may be 3.3V. In practical applications, the first power supply voltage may also be other voltage values.
  • the second power supply voltage VAA is greater than the first power supply voltage 3.3V
  • the third power supply voltage GAMMA is a gamma voltage.
  • the value of the second power supply voltage VAA may be 16V ⁇ 18V
  • the value of the third power supply voltage GAMMA may be 0.3V ⁇ 16V
  • the third power supply voltage GAMMA is used for calibration.
  • the output slope of the The working logic of the plug-in detection signal is that when the driver chip 202 on the COF receives the 3.3V voltage provided by the power management circuit 105 and the logic module in the driver chip 202 operates normally, the driver chip 202 sends the second detection feedback pin DF1. , The signal of DF2 is pulled up to a high level, and this high level signal is given to the power management circuit 105 on the control board 101 through the cable 103. The second detection feedback pins DF1 and DF2 will be connected to the power management circuit 105 After being processed by the AND gate 501, it is sent to the control logic module 502.
  • the voltage sequence output by the power management circuit 105 to the driving chip 202 is to output the first power supply voltage 3.3V first, and after ensuring the normal operation of the driving chip 202, the power management circuit 105 outputs the second power supply voltage VAA and the third power supply voltage GAMMA to the driving chip 202 .
  • the second power supply voltage VAA and the third power supply voltage GAMMA can be cut off from the power output source, so as to avoid the problem of burning out the driving chip 202 .
  • FIG. 8 is a schematic waveform diagram of a signal level of a power management circuit terminal when a cable is normally connected according to an embodiment of the present application.
  • the cable is connected normally, that is, when the cable is not inserted obliquely, the cable is aligned with all pins on the first connector and all pins on the second connector, and the driver chip receives the first power supply voltage 3.3 After V voltage, the oblique detection signal is output to the two second detection feedback pins DF1 and DF2.
  • the oblique detection signals of the two second detection feedback pins are all high level, as shown in Figure 7 , the signals of the two second detection feedback pins DF1, DF2 are also high level through the DF signal output by the AND gate 501, and the AND gate 501 gives the DF signal to the logic control module 502, and the second power supply voltage VAA and The third power supply voltage GAMMA is normally supplied to the driving chip 202 .
  • FIG. 9 is a schematic waveform diagram of a signal level of a power management circuit terminal when a cable is not normally connected according to an embodiment of the present application.
  • the cable is not connected normally, that is, when the cable is inserted obliquely, there are two possibilities, one of which is that the cable is not connected to the pin where the first power supply voltage 3.3V is located, and the driver chip does not receive it.
  • the voltage reaches 3.3V, the oblique detection signals of the two second detection feedback pins DF1 and DF2 are both low level, and the power management circuit will not output the second power supply voltage VAA and the third power supply voltage GAMMA to the driver chip.
  • the pin where the first power supply voltage 3.3V is connected happens to be connected, the driver chip receives the first power supply voltage of 3.3V, and the logic module in the driver chip works and outputs the output to the two second detectors.
  • the oblique detection signal of the feedback pins DF1 and DF2 is high level, and the high level is transmitted to the direction of the power management circuit on the control board, but due to oblique insertion, it is impossible to have two pins spaced apart (ie. The pin where the first power supply voltage 3.3V is located and the second detection feedback pins DF1 and DF2 are generally selected when the detection feedback pin is selected.
  • the second detection and feedback pins DF1 and DF2 can not be connected to the control board at this time, as shown in the abnormal state of Figure 9, the power management circuit on the control board recognizes The oblique detection signals of the two second detection feedback pins DF1 and DF2 are low level (the default is low level when not pulled high), at this time, the power management circuit no longer outputs the second power supply voltage VAA and The third power supply voltage GAMMA is supplied to the driver chip, that is, the problem of burning the driver chip will no longer occur when the cable is inserted obliquely, and the driver chip is protected. At this time, the screen cannot be turned on, and the user is reminded to check and re-plug the cable normally to avoid irreversible damage to the display.
  • FIG. 10 is a schematic structural diagram of the display device provided by the embodiment of the present application.
  • the display device 600 includes a display panel 602 and a panel driving circuit 601 provided by the embodiment of the present application.
  • the panel driving circuit 601 is connected to the display panel 602 to drive the display panel 602 to work, that is, drive the display panel 602 to display.
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium.
  • the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program codes .

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Abstract

公开了一种面板驱动电路和显示装置，面板驱动电路包括：控制板(101)和多个驱动模块(102)；控制板(101)上设有多个第一连接器和多个第一防斜插保护电路；每个驱动模块(102)包括驱动电路板(201)和多个驱动芯片(202)，驱动电路板(201)与多个驱动芯片(202)连接，驱动电路板(201)上设有第二连接器(203)和第二防斜插保护电路。显示装置可以避免插线不良对显示器产生不可逆的损伤。

Description

面板驱动电路和显示装置 技术领域
本申请属于显示技术领域，尤其涉及一种面板驱动电路和显示装置。
 背景技术
在目前的液晶显示器（Liquid Crystal Display，LCD）产品中，控制板Cboard与屏水平方向扫描驱动板Xboard两个电路板通过柔性扁平电缆（Flexible Flat Cable，FFC）连接。
请参阅图1，图1为相关技术中面板驱动电路的结构示意图。生产时，将FFC线材接到屏水平方向扫描驱动板Xboard和控制板Cboard的连接器（Connector）上，若操作不当，则容易出现斜插的问题，此时容易导致覆晶薄膜（Chip On Film，COF）芯片（(Integrated Circuit，IC）烧坏。
请参阅图2，图2为相关技术中覆晶薄膜芯片内部电源电路的结构示意图。出现斜插时，斜插部分对应的连接器的接地引脚没有真正接系统地，导致左侧的屏水平方向扫描驱动板XBoard和右侧的屏水平方向扫描驱动板XBoard不共地，存在电位差，导致出现斜插位置的屏水平方向扫描驱动板XBoard的地产生电压跳变，比如，当左侧的FFC出现斜插时，则左侧的屏水平方向扫描驱动板XBoard的地产生电压跳变。此时伽马电压Vgamma对地二极管或PN结顺偏，大电流造成电压跳变，进而导致电源电压VAA对地短路，产生大电流，从而烧伤覆晶薄膜。具体可参阅图3，图3为相关技术中各电压的变化趋势示意图，横坐标是时间，纵坐标是电压，图3中具体示出了电源电压VAA、出现斜插时左侧的屏水平方向扫描驱动板XBoard的地电平XR GND，伽马电压Vgamma以及控制板的地电平XC GND的变化趋势。由于相关技术中没有相关的保护机制，因此当FFC线材斜插时，很容易导致液晶显示器产品出现不可逆的损伤。
 技术问题
本申请实施例提供一种面板驱动电路和显示装置，可以避免插线不良对显示器产生不可逆的损伤。
 技术解决方案
本申请实施例提供一种面板驱动电路，包括：
控制板和多个驱动模块；其中，
所述控制板上设有多个第一连接器和多个第一防斜插保护电路，每个所述第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上；
每个所述驱动模块包括驱动电路板和多个驱动芯片，所述驱动电路板与所述多个驱动芯片连接，每个所述驱动电路板上设有第二连接器和第二防斜插保护电路，每个所述第一连接器分别通过电缆与对应位置的第二连接器连接，每个所述第二防斜插保护电路与对应位置的第二连接器连接或设置在对应位置的第二连接器上；
所述第一防斜插保护电路和第二防斜插保护电路用于在所述电缆出现斜插时保护所述驱动芯片。
进一步地，所述第一防斜插保护电路包括第一接地模块和第二接地模块，所述第一接地模块和第二接地模块与所述第一连接器两端的引脚对应连接，用于将所述第一连接器两端的引脚接地；
所述第二防斜插保护电路包括第三接地模块和第四接地模块，所述第三接地模块和第四接地模块与所述第二连接器两端的引脚对应连接，用于将所述第二连接器两端的引脚接地。
进一步地，所述第一接地模块包括第一接地电阻，所述第二接地模块包括第二接地电阻，所述第三接地模块包括第三接地电阻，所述第四接地模块包括第四接地电阻。
进一步地，所述第一防斜插保护电路包括第一侦测反馈引脚，所述第一侦测反馈引脚设置在所述第一连接器上；
所述第二防斜插保护电路包括第二侦测反馈引脚，所述第二侦测反馈引脚设置在所述第二连接器上，所述第一侦测反馈引脚与对应位置的第二侦测反馈引脚连接，所述第一侦测反馈引脚与所述第二侦测反馈引脚用于输出斜插侦测信号。
进一步地，第一侦测反馈引脚设置在所述第一连接器的中心位置，所述第二侦测反馈引脚设置在所述第二连接器的中心位置。
进一步地，所述控制板上还设有电源管理电路，所述电源管理电路包括与门、控制逻辑模块和输出模块，所述与门的多个输入端分别与对应位置的第二侦测反馈引脚连接，所述与门的输出端通过所述控制逻辑模块与所述输出模块的输入端连接，所述输出模块的输出端分别输出第一电源电压、第二电源电压和第三电源电压。
进一步地，所述第二电源电压大于所述第一电源电压。
进一步地，所述第三电源电压为伽马电压。
进一步地，所述电源管理电路输出到所述驱动芯片的电压时序为先输出所述第一电源电压，在所述驱动芯片正常工作后，再输出所述第二电源电压和第三电源电压给所述驱动芯片。
本申请实施例提供了一种显示装置，包括显示面板和本申请实施例提供的所述面板驱动电路，所述面板驱动电路与所述显示面板连接以驱动所述显示面板工作。
 有益效果
本申请实施例中，通过设置控制板和多个驱动模块，控制板上设有多个第一连接器和多个第一防斜插保护电路，每个第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上，每个驱动模块包括驱动电路板和多个驱动芯片，每个驱动电路板上设有第二连接器和第二防斜插保护电路，每个第一连接器分别通过电缆与对应位置的第二连接器连接，每个第二防斜插保护电路与对应位置的第二连接器连接或设置在对应位置的第二连接器上，第一防斜插保护电路和第二防斜插保护电路用于在电缆出现斜插时保护驱动芯片，即当电缆出现斜插时，第一防斜插保护电路和第二防斜插保护电路可以防止由于电压跳变导致的烧坏驱动芯片，起到保护作用，因此本申请实施例可以避免插线不良对显示器产生不可逆的损伤。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为相关技术中面板驱动电路的电路结构示意图。
图2为相关技术中覆晶薄膜芯片内部电源电路的结构示意图。
图3为相关技术中各电压的变化趋势示意图。
图4为本申请实施例提供的面板驱动电路的电路结构示意图。
图5为本申请实施例提供的设置接地电阻的场景示意图。
图6为本申请实施例提供的设置侦测反馈引脚的场景示意图。
图7为本申请实施例提供的电源管理电路的结构示意图。
图8为本申请实施例提供的电缆正常接入时电源管理电路端信号电平的波形示意图。
图9为本申请实施例提供的电缆未正常接入时电源管理电路端信号电平的波形示意图。
图10为本申请实施例提供的显示装置的结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
本申请实施例提供一种面板驱动电路，包括：
控制板和多个驱动模块；其中，
所述控制板上设有多个第一连接器和多个第一防斜插保护电路，每个所述第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上；
每个所述驱动模块包括驱动电路板和多个驱动芯片，所述驱动电路板与所述多个驱动芯片连接，每个所述驱动电路板上设有第二连接器和第二防斜插保护电路，每个所述第一连接器分别通过电缆与对应位置的第二连接器连接，每个所述第二防斜插保护电路与对应位置的第二连接器连接或设置在对应位置的第二连接器上；
所述第一防斜插保护电路和第二防斜插保护电路用于在所述电缆出现斜插时保护所述驱动芯片。
本申请实施例中，所述第一防斜插保护电路包括第一接地模块和第二接地模块，所述第一接地模块和第二接地模块与所述第一连接器两端的引脚对应连接，用于将所述第一连接器两端的引脚接地；
所述第二防斜插保护电路包括第三接地模块和第四接地模块，所述第三接地模块和第四接地模块与所述第二连接器两端的引脚对应连接，用于将所述第二连接器两端的引脚接地。
本申请实施例中，所述第一接地模块包括第一接地电阻，所述第二接地模块包括第二接地电阻，所述第三接地模块包括第三接地电阻，所述第四接地模块包括第四接地电阻。
本申请实施例中，所述第一防斜插保护电路包括第一侦测反馈引脚，所述第一侦测反馈引脚设置在所述第一连接器上；
所述第二防斜插保护电路包括第二侦测反馈引脚，所述第二侦测反馈引脚设置在所述第二连接器上，所述第一侦测反馈引脚与对应位置的第二侦测反馈引脚连接，所述第一侦测反馈引脚与所述第二侦测反馈引脚用于输出斜插侦测信号。
本申请实施例中，第一侦测反馈引脚设置在所述第一连接器的中心位置，所述第二侦测反馈引脚设置在所述第二连接器的中心位置。
本申请实施例中，所述控制板上还设有电源管理电路，所述电源管理电路包括与门、控制逻辑模块和输出模块，所述与门的多个输入端分别与对应位置的第二侦测反馈引脚连接，所述与门的输出端通过所述控制逻辑模块与所述输出模块的输入端连接，所述输出模块的输出端分别输出第一电源电压、第二电源电压和第三电源电压。
本申请实施例中，所述第二电源电压大于所述第一电源电压。
本申请实施例中，所述第三电源电压为伽马电压。
本申请实施例中，所述电源管理电路输出到所述驱动芯片的电压时序为先输出所述第一电源电压，在所述驱动芯片正常工作后，再输出所述第二电源电压和第三电源电压给所述驱动芯片。
本申请实施例中，所述控制板接收颜色压缩信号、控制信号和电源信号后，经过所述控制板上的时序控制器处理后，将处理后的信号传输至所述驱动模块，通过所述驱动模块传输至显示面板。
本申请实施例中，所述驱动电路板按照所述控制板传送的时序信号，产生屏水平方向扫描控制驱动信号。
本申请实施例还提供一种显示装置，包括显示面板和如上所述的面板驱动电路，所述面板驱动电路与所述显示面板连接以驱动所述显示面板工作。
请参阅图4，图4为本申请实施例提供的面板驱动电路的电路结构示意图。该面板驱动电路包括控制板101和多个驱动模块102，控制板101与该多个驱动模块102连接，该控制板101可以是Cboard板。
需要说明的是，图4中是以面板驱动电路包括2个驱动模块102为例进行说明的，实际应用中，可以根据具体需求相应调整驱动模块的数量，例如，驱动模块的数量为4个，等等。可以理解的是，所使用的驱动模块的数量与显示面板的尺寸有关，比如，当显示面板的尺寸为65寸时，则可以使用2个驱动模块进行驱动，当显示面板的尺寸为65寸以上时，可以使用4个驱动模块进行驱动。本申请实施例对驱动模块的数量不做限制。
其中，控制板101上设有多个第一连接器和多个第一防斜插保护电路（图4中未示出），每个第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上，即每个第一防斜插保护电路分别与一个第一连接器对应连接，或者每个第一防斜插保护电路分别设置在不同位置的第一连接器上。
对于驱动模块102，每个驱动模块102包括驱动电路板201和多个驱动芯片202，即每个驱动模块102均包括一个驱动电路板201和多个驱动芯片202，图4中是以每个驱动模块102中包括6个驱动芯片202为例进行说明的，实际应用中，可以根据具体需求相应调整每个驱动模块中驱动芯片的数量，比如可以根据实际应用相应增加或减少每个驱动模块中驱动芯片的数量，比如，可以将每个驱动模块中驱动芯片的数量设置为4个，再比如，可以将每个驱动模块中驱动芯片的数量设置为8个，等等。
本申请实施例中，驱动电路板201与多个驱动芯片202连接，每个驱动电路板201上设有第二连接器203和第二防斜插保护电路（图4中未示出），每个第一连接器分别通过电缆103与对应位置的第二连接器203连接，每个第二防斜插保护电路与对应位置的第二连接器203连接或设置在对应位置的第二连接器203上。在一种实施方式中，电缆103可以是柔性扁平电缆，即FFC。
当控制板101接收颜色压缩信号、控制信号和电源信号后，经过控制板101上的时序控制器处理后，将处理后的信号传输至驱动模块102，通过驱动模块102传输至显示面板，可以使显示面板获得呈现画面所需要的电源和信号等，以使显示面板显示对应的画面。
其中，驱动电路板201可以按照控制板101传送的时序信号，产生屏水平方向扫描控制驱动信号。第一防斜插保护电路和第二防斜插保护电路用于在电缆103出现斜插时保护驱动芯片202，比如在电缆103出现斜插时，不向驱动芯片202传送电压，以防止驱动芯片202烧坏，或者，在电缆103出现斜插时，强制使第一连接器104和第二连接器203上对应斜插位置的引脚接地，以保证所有驱动电路板201共地，避免产生电压跳变，以防止驱动芯片202烧坏。
本申请实施例中，通过设置控制板101和多个驱动模块102，控制板101上设有多个第一连接器和多个第一防斜插保护电路，每个第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上，每个驱动模块102包括驱动电路板201和多个驱动芯片202，每个驱动电路板201上设有第二连接器203和第二防斜插保护电路，每个第一连接器分别通过电缆103与对应位置的第二连接器203连接，每个第二防斜插保护电路与对应位置的第二连接器203连接或设置在对应位置的第二连接器203上，第一防斜插保护电路和第二防斜插保护电路用于在电缆出现斜插时保护驱动芯片202，即当电缆103出现斜插时，第一防斜插保护电路和第二防斜插保护电路可以防止由于电压跳变导致的烧坏驱动芯片202，起到保护作用。
比如在电缆103出现斜插时，不向驱动芯片202传送电压，以防止驱动芯片202烧坏，或者，在电缆103出现斜插时，强制使第一连接器104和第二连接器203上对应斜插位置的引脚接地，以保证所有驱动电路板201共地，避免产生电压跳变，以防止驱动芯片202烧坏。因此本申请实施例可以避免插线不良对显示器产生不可逆的损伤。
比如，在一种实施方式中，第一防斜插保护电路可以包括第一接地模块和第二接地模块，第一接地模块和第二接地模块与第一连接器两端的引脚对应连接，用于将第一连接器两端的引脚接地。即第一接地模块与第一连接器一端的引脚连接，第二接地模块与第一连接器另一端的引脚连接，第一连接器一端的引脚通过第一接地模块实现接地，第一连接器另一端的引脚通过第二接地模块实现接地。例如，第一连接器设置有60个引脚，则第一接地模块可以与第一连接器的第1引脚连接，第二接地模块可以与第一连接器的第60引脚连接，或者，第一接地模块可以与第一连接器的第60引脚连接，第二接地模块可以与第一连接器的第1引脚连接。当电缆103插接第一连接器时，若出现斜插，也能保证第一连接器的第1引脚和第60引脚接地，从而实现所有驱动电路板201之间的共地，进而避免产生电压跳变，防止烧坏驱动芯片202。
再如，在一种实施方式中，第一连接器设置有80个引脚，则第一接地模块可以与第一连接器的第1引脚连接，第二接地模块可以与第一连接器的第80引脚连接，或者，第一接地模块可以与第一连接器的第80引脚连接，第二接地模块可以与第一连接器的第1引脚连接。当电缆103插接第一连接器时，若出现斜插，也能保证第一连接器的第1引脚和第80引脚接地，从而实现所有驱动电路板201之间的共地，进而避免产生电压跳变，防止烧坏驱动芯片。
第二防斜插保护电路可以包括第三接地模块和第四接地模块，第三接地模块和第四接地模块与第二连接器203两端的引脚对应连接，用于将第二连接器203两端的引脚接地。即第三接地模块与第二连接器203一端的引脚连接，第四接地模块与第二连接器203另一端的引脚连接，第二连接器203一端的引脚通过第三接地模块实现接地，第二连接器203另一端的引脚通过第四接地模块实现接地。例如，第二连接器203设置有60个引脚，则第三接地模块可以与第二连接器203的第1引脚连接，第四接地模块可以与第二连接器203的第60引脚连接，或者，第三接地模块可以与第二连接器203的第60引脚连接，第四接地模块可以与第二连接器203的第1引脚连接。当电缆103插接第二连接器203时，若出现斜插，也能保证第二连接器203的第1引脚和第60引脚接地，从而实现所有驱动电路板201之间的共地，进而避免产生电压跳变，防止烧坏驱动芯片。
再如，在一种实施方式中，第二连接器203设置有80个引脚，则第三接地模块可以与第二连接器203的第1引脚连接，第四接地模块可以与第二连接器203的第80引脚连接，或者，第三接地模块可以与第二连接器203的第80引脚连接，第四接地模块可以与第二连接器203的第1引脚连接。当电缆103插接第二连接器203时，若出现斜插，也能保证第二连接器203的第1引脚和第80引脚接地，从而实现所有驱动电路板201之间的共地，进而避免产生电压跳变，防止烧坏驱动芯片。
比如，在一种实施方式中，请参阅图5，图5为本申请实施例提供的设置接地电阻的场景示意图。具体而言，第一接地模块包括第一接地电阻R1，第二接地模块包括第二接地电阻R2，第三接地模块包括第三接地电阻R3，第四接地模块包括第四接地电阻R4。
例如，以第一连接器104和第二连接器203均设有60个引脚为例进行说明，当然，在实际应用中，第一连接器104和第二连接器203所设置的引脚个数可以根据实际需求进行相应调整，如设置为80个引脚。第一连接器104和第二连接器203两端的引脚均为接地引脚，在控制板101上的每个第一连接器104的第1引脚增加第一接地电阻R1，在第60引脚增加第二接地电阻R2，在每个驱动电路板201上的第二连接器203的第60引脚增加第三接地电阻R3，在每个驱动电路板201上的第二连接器203的第1引脚增加第四接地电阻R4。通过增加接地电阻，可以保证第一连接器104和第二连接器203两端的引脚的输入不受外界影响，把电平拉低。
当电缆103出现斜插时，假如与连接器中其中一端的引脚未接插好，则连接器中另一端的引脚由于增加了接地电阻，其能保证驱动电路板201接系统地。可知，即使电缆103出现斜插，也能保证所有驱动电路板201共地。这样就可以避免斜插时的电压跳变，从而可以保护驱动芯片202，避免驱动芯片202烧坏。该防止电缆103斜插的有效机制，可以避免插线不良对显示器产生不可逆的损伤。
比如，在一种实施方式中，仅在第一连接器和第二连接器其中一端的引脚上增加接地电阻，这种情况下，当电缆出现斜插时，假如与连接器中增加接地电阻的一端的引脚未接插上，由于连接器中另一端的引脚未增加接地电阻，导致驱动电路板之间不能共地，因此不能完全保证驱动芯片避免烧坏。
比如，在一种实施方式中，第一防斜插保护电路包括第一侦测反馈引脚，第一侦测反馈引脚设置在第一连接器104上。第二防斜插保护电路包括第二侦测反馈引脚，第二侦测反馈引脚设置在第二连接器203上，第一侦测反馈引脚与对应位置的第二侦测反馈引脚连接，即第一侦测反馈引脚与对应位置的第二侦测反馈引脚是连通的，第一侦测反馈引脚与第二侦测反馈引脚用于输出斜插侦测信号，用于进行防斜插检测。
一般会将第一侦测反馈引脚设置为靠近第一连接器104中心位置的引脚，将第二侦测反馈引脚设置为靠近第二连接器203中心位置的引脚。比如，第一连接器104和第二连接器203均设有60个引脚，可以选择第一连接器104中的第29引脚作为第一侦测反馈引脚，选择第二连接器203中的第29引脚作为第二侦测反馈引脚，再比如，可以选择第一连接器104中的第32引脚作为第一侦测反馈引脚，选择第二连接器203中的第32引脚作为第二侦测反馈引脚。
比如，在一种实施方式中，第一连接器104和第二连接器203均设有80个引脚，可以选择第一连接器104中的第39引脚作为第一侦测反馈引脚，选择第二连接器203中的第39引脚作为第二侦测反馈引脚，再比如，可以选择第一连接器104中的第42引脚作为第一侦测反馈引脚，选择第二连接器203中的第42引脚作为第二侦测反馈引脚。
优选的，可以将第一侦测反馈引脚设置在第一连接器104的中心位置，将第二侦测反馈引脚设置在第二连接器203的中心位置，比如，第一连接器104和第二连接器203均设有60个引脚，可以选择第一连接器104中的第30引脚作为第一侦测反馈引脚，选择第二连接器203中的第30引脚作为第二侦测反馈引脚，再比如，可以选择第一连接器104中的第31引脚作为第一侦测反馈引脚，选择第二连接器203中的第31引脚作为第二侦测反馈引脚。
比如，在一种实施方式中，第一连接器104和第二连接器203均设有80个引脚，可以选择第一连接器104中的第39引脚作为第一侦测反馈引脚，选择第二连接器203中的第39引脚作为第二侦测反馈引脚，再比如，可以选择第一连接器104中的第41引脚作为第一侦测反馈引脚，选择第二连接器203中的第41引脚作为第二侦测反馈引脚。
因为只要电缆103与第一连接器104和第二连接器203的中心位置对齐，则电缆103的两端也能与第一连接器104和第二连接器203的两端位置对齐。当第一侦测反馈引脚和第二侦测反馈引脚检测到电缆103出现斜插时，可以停止向驱动芯片202输出电压，以保护驱动芯片202，使其避免烧坏。
请参阅图6，图6为本申请实施例提供的设置侦测反馈引脚的场景示意图。比如，若第一连接器和第二连接器为具有60个引脚的接口，可以选择靠近中心位置的第26引脚作为侦测反馈Detected Function，DF）引脚DF1、DF2，由于图6是以2个驱动电路板201为例进行说明的，每个驱动电路板201上对应的第二侦测反馈引脚分别标记为DF1、DF2，若含有4个驱动电路板201时，则每个驱动电路板201上对应的第二侦测反馈引脚分别标记为DF1、DF2、DF3、DF4等。
比如，在一种实施方式中，控制板101上还设有电源管理电路，请参阅图7，图7为本申请实施例提供的电源管理电路的结构示意图。该电源管理电路105可以是电源管理集成电路(Power Management IC，PMIC) ，该电源管理电路105可以包括与门501、控制逻辑模块502和输出模块503，其中，与门501的多个输入端分别与对应位置的第二侦测反馈引脚连接，与门501的输出端DF通过控制逻辑模块502与输出模块503的输入端连接，输出模块503的3个输出端分别输出第一电源电压、第二电源电压VAA和第三电源电压GAMMA。本申请实施例中，第一电源电压可以为3.3V，在实际应用中，第一电源电压也可以为其他电压值。
其中，第二电源电压VAA大于第一电源电压3.3V，第三电源电压GAMMA为伽马电压。第二电源电压VAA的取值可以为16V~18V，第三电源电压GAMMA的取值可以为0.3V~16V，第三电源电压GAMMA用于校正。
比如，以2个驱动电路板201为例，当选择靠近第一连接器104和第二连接器203中心位置的第26引脚作为第二侦测反馈引脚DF1、DF2时，其输出的斜插侦测信号的工作逻辑是当COF上的驱动芯片202接收到电源管理电路105提供的3.3V电压，驱动芯片202中的逻辑模块正常运转后，驱动芯片202将第二侦测反馈引脚DF1、DF2的信号上拉到高电平，此该高电平的信号通过电缆103给到控制板101上的电源管理电路105，第二侦测反馈引脚DF1、DF2在电源管理电路105内部会经过与门501处理后给到控制逻辑模块502。
比如，本申请实施例中，电源管理电路105输出到驱动芯片202的电压时序为先输出第一电源电压3.3V，在保证驱动芯片202正常工作后，电源管理电路105再输出第二电源电压VAA和第三电源电压GAMMA给驱动芯片202。通过设置侦测反馈引脚，可以从电源输出源头断绝第二电源电压VAA和第三电源电压GAMMA，避免出现驱动芯片202烧坏问题。
比如，在一种实施方式中，请参阅图8，图8为本申请实施例提供的电缆正常接入时电源管理电路端信号电平的波形示意图。当电缆正常接入时，即电缆未出现斜插时，电缆与第一连接器上的所有引脚和第二连接器上的所有引脚均已对齐连接，驱动芯片接收到第一电源电压3.3V电压后，输出斜插侦测信号给2个第二侦测反馈引脚DF1、DF2，2个第二侦测反馈引脚的斜插侦测信号均为高电平，如图7所示，2个第二侦测反馈引脚DF1、DF2的信号经过与门501输出的DF信号也为高电平，与门501将该DF信号给到逻辑控制模块502，将第二电源电压VAA和第三电源电压GAMMA正常输送到驱动芯片202。
比如，在一种实施方式中，请参阅图9，图9为本申请实施例提供的电缆未正常接入时电源管理电路端信号电平的波形示意图。当电缆未正常接入时，即电缆出现斜插时，此时有两种可能，其中一种可能是电缆与第一电源电压3.3V所在的引脚也未对接上，此时驱动芯片未接收到3.3V电压，2个第二侦测反馈引脚DF1、DF2的斜插侦测信号均为低电平，电源管理电路不会输出第二电源电压VAA和第三电源电压GAMMA给驱动芯片。
另一种可能是即使电缆斜插但第一电源电压3.3V所在的引脚恰巧对接上了，驱动芯片接收到第一电源电压3.3V，驱动芯片中的逻辑模块工作输出给2个第二侦测反馈引脚DF1、DF2的斜插侦测信号为高电平，该高电平向控制板上的电源管理电路的方向传递，但由于斜插不可能出现间隔开的2个引脚（即第一电源电压3.3V所在的引脚与第二侦测反馈引脚DF1、DF2，一般在选择侦测反馈引脚时，会选择与第一电源电压3.3V所在的引脚具有一段距离的引脚作为侦测反馈引脚）都同时能对接上，故此时第二侦测反馈引脚DF1、DF2未能连接到控制板，如图9的非正常状态，在控制板上的电源管理电路识别到的2个第二侦测反馈引脚DF1、DF2的斜插侦测信号是低电平（未拉高时默认为低电平），此时电源管理电路不再输出第二电源电压VAA和第三电源电压GAMMA给到驱动芯片，即电缆斜插时不会再出现烧毁驱动芯片的问题，保护了驱动芯片。此时屏幕无法点亮，提醒使用者检查并重新正常插好电缆，避免显示器产生不可逆的损伤。
本申请实施例还提供一种显示装置，请参阅图10，图10为本申请实施例提供的显示装置的结构示意图。该显示装置600包括显示面板602和本申请实施例提供的面板驱动电路601，该面板驱动电路601与显示面板602连接，以驱动显示面板602工作，即驱动显示面板602进行显示。
需要说明的是，本申请实施例以上各实施例之间可以相互结合，共同作用以在电缆出现斜插时保护驱动芯片，进而可以避免插线不良对显示器产生不可逆的损伤，在此不再一一举例说明。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备（可以是个人计算机，服务器，或者网络设备等）执行本发明各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器（Read-Only Memory ，ROM）、随机存取存储器（Random Access Memory，RAM）、磁碟或者光盘等各种可以存储程序代码的介质。

Claims (12)

  1. 一种面板驱动电路，其中，包括：
    控制板和多个驱动模块；其中，
    所述控制板上设有多个第一连接器和多个第一防斜插保护电路，每个所述第一防斜插保护电路与对应位置的第一连接器连接或设置在对应位置的第一连接器上；
    每个所述驱动模块包括驱动电路板和多个驱动芯片，所述驱动电路板与所述多个驱动芯片连接，每个所述驱动电路板上设有第二连接器和第二防斜插保护电路，每个所述第一连接器分别通过电缆与对应位置的第二连接器连接，每个所述第二防斜插保护电路与对应位置的第二连接器连接或设置在对应位置的第二连接器上；
    所述第一防斜插保护电路和第二防斜插保护电路用于在所述电缆出现斜插时保护所述驱动芯片。
  2. 根据权利要求1所述的面板驱动电路，其中，所述第一防斜插保护电路包括第一接地模块和第二接地模块，所述第一接地模块和第二接地模块与所述第一连接器两端的引脚对应连接，用于将所述第一连接器两端的引脚接地；
    所述第二防斜插保护电路包括第三接地模块和第四接地模块，所述第三接地模块和第四接地模块与所述第二连接器两端的引脚对应连接，用于将所述第二连接器两端的引脚接地。
  3. 根据权利要求2所述的面板驱动电路，其中，所述第一接地模块包括第一接地电阻，所述第二接地模块包括第二接地电阻，所述第三接地模块包括第三接地电阻，所述第四接地模块包括第四接地电阻。
  4. 根据权利要求1所述的面板驱动电路，其中，所述第一防斜插保护电路包括第一侦测反馈引脚，所述第一侦测反馈引脚设置在所述第一连接器上；
    所述第二防斜插保护电路包括第二侦测反馈引脚，所述第二侦测反馈引脚设置在所述第二连接器上，所述第一侦测反馈引脚与对应位置的第二侦测反馈引脚连接，所述第一侦测反馈引脚与所述第二侦测反馈引脚用于输出斜插侦测信号。
  5. 根据权利要求4所述的面板驱动电路，其中，第一侦测反馈引脚设置在所述第一连接器的中心位置，所述第二侦测反馈引脚设置在所述第二连接器的中心位置。
  6. 根据权利要求5所述的面板驱动电路，其中，所述控制板上还设有电源管理电路，所述电源管理电路包括与门、控制逻辑模块和输出模块，所述与门的多个输入端分别与对应位置的第二侦测反馈引脚连接，所述与门的输出端通过所述控制逻辑模块与所述输出模块的输入端连接，所述输出模块的输出端分别输出第一电源电压、第二电源电压和第三电源电压。
  7. 根据权利要求6所述的面板驱动电路，其中，所述第二电源电压大于所述第一电源电压。
  8. 根据权利要求6所述的面板驱动电路，其中，所述第三电源电压为伽马电压。
  9. 根据权利要求6所述的面板驱动电路，其中，所述电源管理电路输出到所述驱动芯片的电压时序为先输出所述第一电源电压，在所述驱动芯片正常工作后，再输出所述第二电源电压和第三电源电压给所述驱动芯片。
  10. 根据权利要求1所述的面板驱动电路，其中，所述控制板接收颜色压缩信号、控制信号和电源信号后，经过所述控制板上的时序控制器处理后，将处理后的信号传输至所述驱动模块，通过所述驱动模块传输至显示面板。
  11. 根据权利要求1所述的面板驱动电路，其中，所述驱动电路板按照所述控制板传送的时序信号，产生屏水平方向扫描控制驱动信号。
  12. 一种显示装置，其中，包括显示面板和如权利要求1所述的面板驱动电路，所述面板驱动电路与所述显示面板连接以驱动所述显示面板工作。
PCT/CN2021/080960 2021-03-08 2021-03-16 面板驱动电路和显示装置 WO2022188194A1 (zh)

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