WO2022179564A1

WO2022179564A1 - Bridgeless voltage-drop power factor correction circuit

Info

Publication number: WO2022179564A1
Application number: PCT/CN2022/077685
Authority: WO
Inventors: 田新凯; 程志勇
Original assignee: 广州金升阳科技有限公司
Priority date: 2021-02-26
Filing date: 2022-02-24
Publication date: 2022-09-01
Also published as: CN113037074A

Abstract

A bridgeless voltage-drop power factor correction circuit, comprising an MOS transistor Q1, an MOS transistor Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, an inductor L1, an inductor L2 and a resistor R1. In the present invention, an existing power factor correction circuit is improved, and by means of removing a full-bridge rectifier circuit, when the MOS transistor Q1 is switched on, the diode D3 in a main loop is connected in series to the MOS transistor Q1, or when the MOS transistor Q2 is switched on, the diode D2 in the main loop is connected in series to the MOS tube Q2, thereby reducing the number of diodes which are connected in series in the main loop during working, reducing the rectification loss of the circuit, and realizing the characteristics of no bridge and voltage-drop power factor correction.

Description

Bridgeless Buck Power Factor Correction Circuit

technical field

The invention relates to the technical field of AC-DC switching power supplies, in particular to a bridgeless step-down power factor correction circuit.

Background technique

In switching power supply applications, performance parameters such as switching power supply efficiency, harmonic current, and power-on inrush current are often listed as the main indicators. Therefore, most switching power supplies have taken measures such as active power factor correction and limiting power-on inrush current. As the output power of the switching power supply increases, especially at a lower input voltage, the rectification loss of the full-bridge rectifier cannot be ignored, usually 2% to 3.5% of the output power of the switching power supply. It is imminent to reduce the rectification loss of the full-bridge rectification.

With the improvement of the performance of the switching power supply, the input voltage range of the power supply is getting wider and wider. The power supply voltage in different regions varies. For example, the maximum power supply voltage of a single item reaches 300VAC to 420VAC. The output voltage of the power factor correction circuit is higher, which brings great difficulties to the design of the post-stage converter of the switching power supply. It is very important to use the step-down power factor correction.

Fig. 1 is a schematic diagram of an existing power factor correction circuit, as shown in Fig. 1, including a resistor R1, a capacitor C1, a capacitor C2, a MOS transistor Q1, an inductor L2, a diode D1, a diode D2, a diode D3, and a diode D4 and diode D5.

Diode D1, diode D3, diode D4 and diode D5 form a full-bridge rectifier circuit, so when MOS tube Q1 is turned on, there are two diodes in the main circuit, diodes D1, D4, or diodes D5, D3, and MOS tube Q1, they are The phases are connected in series, so the rectification loss of this circuit is relatively large.

The above-mentioned MOS transistor Q1 can also be replaced with other switching transistors, such as electronic switching devices such as IGBTs.

The diode D1, the diode D3, the diode D4 and the diode D5 in the above-mentioned full-bridge rectifier circuit can also be replaced with MOS transistors to form a synchronous rectifier circuit.

SUMMARY OF THE INVENTION

In view of this, the present invention mainly provides a bridgeless step-down power factor correction circuit, which can not only realize step-down power factor correction, but also make the circuit have the characteristics of a bridgeless power factor correction circuit.

The technical scheme provided by the present invention is as follows:

A bridgeless step-down power factor correction circuit is characterized in that: it comprises a MOS tube Q1, a MOS tube Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, an inductance L1, an inductance L2 and a resistor R1, and are electrically connected to each other. The relationship is: AC power input AC POWER L is connected to the drain of MOS tube Q2 and the cathode of diode D3, the source of MOS tube Q2 is connected to the cathode of diode D4 and the No. 1 terminal of inductor L2, and the anode of diode D4 is connected to one end of capacitor C1 , the anode of the diode D1, one end of the resistor R1 and the output terminal VOUT-, the AC power input AC POWER N is connected to the cathode of the diode D2 and the drain of the MOS transistor Q1, and the anode of the diode D2 is connected to the No. 2 terminal of the inductor L2 and the capacitor C1. The other end is connected to the other end of the resistor R1, the other end of the resistor R1 is connected to the output terminal VOUT+, the source of the MOS transistor Q1 is connected to the cathode of the diode D1 and the No. 1 terminal of the inductor L1, and the No. 2 terminal of the inductor L1 is connected to the anode of the diode D3 and the Output terminal VOUT+.

Another embodiment of the bridgeless step-down power factor correction circuit is characterized in that it includes a MOS transistor Q1, a MOS transistor Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, a transformer TX1, a transformer TX2 and Resistor R1, the electrical connection relationship is: AC power input AC POWER L is connected to the drain of MOS tube Q2 and the cathode of diode D3, the source of MOS tube Q2 is connected to the No. 1 terminal of the primary winding of transformer TX2, and the anode of diode D2 is connected to the transformer The No. 2 terminal of the primary winding of TX2, the cathode of the diode D4 is connected to the No. 1 terminal of the secondary winding of the transformer TX2, the anode of the diode D4 is connected to one end of the capacitor C1, the anode of the diode D1, one end of the resistor R1 and the output terminal VOUT-, the capacitor The other end of C1 is connected to the No. 2 terminal of the secondary winding of the transformer TX2, the other end of the capacitor C1 and the other end of the resistor R1, the other end of the resistor R1 is connected to the output terminal VOUT+, the AC power input AC POWER N is connected to the cathode of the diode D2 and the MOS The drain of the tube Q1; the source of the MOS tube Q1 is connected to the No. 1 terminal of the primary winding of the transformer TX1, the anode of the diode D3 is connected to the No. 2 terminal of the primary winding of the transformer TX1, and the cathode of the diode D1 is connected to the 1 of the secondary winding of the transformer TX1. No. terminal, the output terminal VOUT+ is connected to the No. 2 terminal of the secondary winding of the transformer TX1, and other electrical connection relationships remain unchanged; in the above, the No. 1 terminal of the primary winding of the transformer TX1 and the No. 1 terminal of the secondary winding of the transformer are the terminals of the same name. The No. 1 terminal of the primary winding of TX2 and the No. 1 terminal of the secondary winding are the terminals of the same name.

Preferably, the MOS transistor Q1 and the MOS transistor Q2 work alternately in the positive half cycle and the negative half cycle of the alternating current.

In the above, the terminal No. 1 of the primary winding of the transformer TX1 and the terminal No. 1 of the secondary winding of the transformer TX1 are the terminals of the same name, and the terminal No. 1 of the primary winding of the transformer TX2 and the terminal No. 1 of the secondary winding of the transformer TX2 are the terminals of the same name.

Preferably, the bridgeless step-down power factor correction circuit is respectively used as unit circuit 1, unit circuit 2, and unit circuit 3 to form a three-phase bridgeless step-down power factor correction circuit through delta connection, and the electrical connection relationship is: The AC power input AC POWER N in circuit 1 is connected to the AC power input AC POWER L in unit circuit 2 as the AC power input AC POWER A, and the AC power input AC POWER N in unit circuit 2 is connected to the AC power input in unit circuit 3 AC POWER L is used as the AC power input AC POWER B, the AC power input in the unit circuit 3 is connected to the AC power input AC POWER N in the unit circuit 1, and the AC power input AC POWER L is used as the AC power input AC POWER C, and the output terminal VOUT+ in the unit circuit 1 It is electrically connected to the output terminal VOUT+ of the unit circuit 2 and the unit circuit 3 respectively, and is used as the total output terminal VOUT+. The output terminal VOUT- of the unit circuit 1 is electrically connected to the output terminal VOUT- of the unit circuit 2 and the unit circuit 3 respectively. , and as the total output terminal VOUT-, other electrical connections remain unchanged.

Preferably, the three groups of the bridgeless step-down power factor correction circuits are respectively used as unit circuit 1, unit circuit 2, and unit circuit 3 through star connection to form a three-phase bridgeless step-down power factor correction circuit. The electrical connection relationship It is: the AC power input AC POWER N in the unit circuit 1 is electrically connected to the AC power input AC POWER N in the unit circuit 2 and the unit circuit 3 respectively, and is used as the total AC power input AC POWER N of the three-phase star connection, and the unit The AC power input AC POWER L in circuit 1, unit circuit 2 and unit circuit 3 are respectively used as AC power input AC POWER A, AC power input AC POWER B, AC power input AC POWER C, and the output terminal VOUT+ in unit circuit 1 It is electrically connected to the output terminal VOUT+ of the unit circuit 2 and the unit circuit 3 respectively, and is used as the total output terminal VOUT+. The output terminal VOUT- of the unit circuit 1 is electrically connected to the output terminal VOUT- of the unit circuit 2 and the unit circuit 3 respectively. , and as the total output terminal VOUT-, other electrical connections remain unchanged.

The working principle of the present invention will be analyzed in detail in conjunction with specific embodiments, which will not be repeated here. The beneficial effects are as follows:

1. The full-bridge rectifier circuit is removed, the number of diodes connected in series in the main circuit during operation is reduced, the rectification loss of the circuit is reduced, and the conversion efficiency of the circuit is improved;

2. The characteristics of the step-down power factor correction circuit are realized, the output voltage of the power factor correction circuit is reduced, and the design of the power converter of the rear stage of the switching power supply is more convenient;

3. Since the circuit between the output capacitor C1 and the AC input is not conducting when the MOS transistor Q1 and the MOS transistor Q2 in the circuit are turned off, the power-on impulse current of the switching power supply is eliminated.

Description of drawings

Fig. 1 is a schematic diagram of an existing power factor correction circuit;

2 is a schematic diagram of the first embodiment of the bridgeless step-down power factor correction circuit of the present invention;

FIG. 3 is a simulation waveform diagram of the first embodiment of the bridgeless step-down power factor correction circuit according to the present invention;

4 is a schematic diagram of a second embodiment of a bridgeless step-down power factor correction circuit according to the present invention;

5 is a schematic diagram of a third embodiment of a bridgeless step-down power factor correction circuit according to the present invention;

FIG. 6 is a schematic diagram of a fourth embodiment of a bridgeless step-down power factor correction circuit according to the present invention.

Detailed ways

In order to make it easier for those skilled in the art to understand the present invention, the present invention will be described below with reference to specific embodiments.

first embodiment

2 is a schematic diagram of the first embodiment of the bridgeless step-down power factor correction circuit of the present invention, the circuit includes a MOS transistor Q1, a MOS transistor Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, an inductance L1, an inductance The electrical connection relationship between L2 and resistor R1 is: AC power input AC POWER L is connected to the drain of MOS transistor Q2 and the cathode of diode D3, the source of MOS transistor Q2 is connected to the cathode of diode D4 and the No. 1 terminal of inductor L2, diode D4 The anode is connected to one end of the capacitor C1, the anode of the diode D1, one end of the resistor R1 and the output terminal VOUT-, the AC power input AC POWER N is connected to the cathode of the diode D2 and the drain of the MOS tube Q1, and the anode of the diode D2 is connected to the inductor L2. Terminal 2, the other end of capacitor C1 and the other end of resistor R1, the other end of resistor R1 is connected to the output terminal VOUT+, the source of MOS transistor Q1 is connected to the cathode of diode D1 and the No. 1 terminal of inductor L1, and No. 2 of inductor L1 The terminal is connected to the anode of diode D3 and the output terminal VOUT+.

In Fig. 2, the upper end of L1, which is marked with the symbol of the same name, is the No. 1 terminal, and the other end thereof is the No. 2 terminal, and the same is true for L2.

Compared with the existing power factor correction circuit in Figure 1, the full-bridge rectifier circuit is removed. When the MOS transistor Q1 is turned on, the diode D3 in the main circuit is connected in series with the MOS transistor Q1, or when the MOS transistor Q2 is turned on. When the diode D2 in the main circuit is connected in series with the MOS transistor Q2, the number of diodes connected in series in the main circuit during operation is reduced, the rectification loss of the circuit is reduced, and the bridgeless and power factor correction characteristics are realized.

Working principle description:

Figure 3 shows the simulation waveform diagram of the first embodiment of the present invention, and the analysis is as follows:

1. When the AC power input AC POWER L and the AC power input AC POWER N input AC power, the MOS transistor Q1 and the MOS transistor Q2 work alternately in the positive half cycle and the negative half cycle of the AC power, and Q2 GATE and Q2 SOURCE are the MOS transistor Q2. The driving pulse signal, Q1 GATE and Q1 SOURCE are the driving pulse signals of the MOS transistor Q1, and the duration of the high level changes according to the sine law of the positive half cycle or the negative half cycle of the alternating current.

2. When the alternating current is a positive half cycle, the phase synchronization of AC1 is high level, between Q2 GATE and Q2 SOURCE is high level, the MOS transistor Q2 is passively turned on, the current is input from the AC power input AC POWER L terminal, and flows in turn. Through the drain of MOS tube Q2, the source of MOS tube Q2, the terminal of inductor L21, the terminal of inductor L22, the anode of diode D2, the cathode of diode D2 to the AC power input AC POWER N terminal, at this time, the inductor L2 stores energy, and at the same time , the diode D4, the diode D1, the diode D3, and the MOS transistor Q1 are in the cut-off state.

3. When the level between Q2 GATE and Q2 SOURCE is low, the MOS transistor Q2 is turned off. Since the current across the inductor L2 cannot change abruptly, the current continues to flow through the output from the inductor L21 and the inductor L22. Terminal VOUT+, output terminal VOUT-, capacitor C1 and resistor R1 are connected in parallel between output terminal VOUT+ and output terminal VOUT-, inductor L2 discharges resistor R1, charges capacitor C1, inductor L2 stores energy, output terminal VOUT+ and output terminal VOUT The voltage between - is controlled by the duration of the high level between Q2 GATE and Q2 SOURCE, and the cycle repeats until the AC power input AC POWER L and AC power input AC POWER N When the input AC phase is a negative half cycle, the AC1 phase is synchronized to be low level.

4. When the alternating current is negative half cycle, AC2 phase synchronization is high level, between Q1 GATE and Q1 SOURCE is high level, MOS transistor Q1 is passively turned on, the current is input from the AC power input AC POWER N terminal, and flows in turn. Through the drain of MOS tube Q1, the source of MOS tube Q1, the terminal of inductor L11, the terminal of inductor L12, the anode of diode D3, the cathode of diode D3 to the AC power input AC POWER L terminal, at this time, the inductor L1 stores energy, and at the same time , the diode D1, the diode D2, the diode D4, and the MOS transistor Q2 are in the cut-off state.

5. When the level between Q1 GATE and Q1 SOURCE is low, the MOS transistor Q1 is turned off. Since the current across the inductor L1 cannot change abruptly, the current continues to flow through the output from the inductor L11 and the inductor L12. Terminal VOUT+, output terminal VOUT-, capacitor C1 and resistor R1 are connected in parallel between output terminal VOUT+ and output terminal VOUT-, inductor L1 discharges resistor R1, charges capacitor C1, inductor L1 stores energy, output terminal VOUT+ and output terminal VOUT The voltage between - is controlled by the duration of the high level between Q1 GATE and Q1 SOURCE, and it repeats itself, until the AC power input AC POWER L and AC power input AC POWER N input AC phase is a positive half cycle, AC2 phase synchronization is low level.

Through the above analysis of the working principle of the circuit, the bridgeless step-down power factor correction circuit of the present invention is driven by the pulse signal between Q2 GATE and Q2 SOURCE or between Q1 GATE and Q1 SOURCE, according to the positive half cycle or negative half cycle of the alternating current sinusoidal Regular changes, control the conduction time of MOS tube Q2 and MOS tube Q1, respectively realize the correction of the load power factor of the positive half cycle or the negative half cycle of the alternating current. At the same time, when the MOS tube Q1 is turned on, the diode D3 in the main circuit The series connection with the MOS transistor Q1, or when the MOS transistor Q2 is turned on, the diode D2 in the main circuit is connected in series with the MOS transistor Q2, which reduces the number of diodes in series in the main circuit during operation, reduces the rectification loss of the circuit, and realizes the Bridgeless and reduced power factor correction features.

Second Embodiment

4 is a schematic diagram of the second embodiment of the bridgeless step-down power factor correction circuit of the present invention. On the basis of the first embodiment, the inductor L2 is replaced by the transformer TX2, and the inductor L1 is replaced by the transformer TX1. The electrical connection relationship is: The source of the MOS transistor Q2 is connected to the No. 1 terminal of the primary winding of the transformer TX2, the anode of the diode D2 is connected to the No. 2 terminal of the primary winding of the transformer TX2, the cathode of the diode D4 is connected to the No. 1 terminal of the secondary winding of the transformer TX2, and the capacitor C1 The other end is connected to the No. 2 terminal of the secondary winding of the transformer TX2; the source of the MOS transistor Q1 is connected to the No. 1 terminal of the primary winding of the transformer TX1, the anode of the diode D3 is connected to the No. 2 terminal of the primary winding of the transformer TX1, and the cathode of the diode D1 is connected. The No. 1 terminal of the secondary winding of the transformer TX1, the output terminal VOUT+ is connected to the No. 2 terminal of the secondary winding of the transformer TX1, and other electrical connections remain unchanged.

In the above, the terminal No. 1 of the primary winding of the transformer TX1 and the terminal No. 1 of the secondary winding of the transformer TX1 are the terminals of the same name, and the terminal No. 1 of the primary winding of the transformer TX2 and the terminal No. 1 of the secondary winding of the transformer TX2 are the terminals of the same name. The upper end of the primary winding and the secondary winding of the transformer TX1 shown in Figure 4, that is, the end marked with the same name is their No. 1 end, and their lower end is their No. 2 end. Transformer TX2 is the same.

Explanation of the working principle: The first embodiment is similar and will not be repeated here.

The difference from the first embodiment is that the second embodiment can realize the isolation of the input side and the output side of the bridgeless step-down power factor correction circuit.

Third Embodiment

5 is a schematic diagram of the third embodiment of the bridgeless step-down power factor correction circuit of the present invention. On the basis of the first embodiment, the bridgeless step-down power factor correction circuit in the first embodiment is used as the unit circuit 1, Unit circuit 2 and unit circuit 3 are electrically connected to form a three-phase bridgeless step-down power factor correction circuit through a combination of delta connections. The power input AC POWER L is used as the AC power input AC POWER A, the AC power input in the unit circuit 2 AC POWER N is connected to the AC power input AC POWER L in the unit circuit 3 as the AC power input AC POWER B, the AC power in the unit circuit 3 is connected The power input AC POWER N is connected to the AC power input AC POWER L in the unit circuit 1 as the AC power input AC POWER C, and the output terminal VOUT+ in the unit circuit 1 is respectively electrically connected with the output terminal VOUT+ in the unit circuit 2 and the unit circuit 3, And as the output terminal VOUT+, the output terminal VOUT- in the unit circuit 1 is electrically connected to the output terminal VOUT- in the unit circuit 2 and the unit circuit 3 respectively, and serves as the output terminal VOUT-, and other electrical connection relationships remain unchanged.

Description of the working principle: The working principle of each of the unit circuit 1 , the unit circuit 2 , and the unit circuit 3 is the same as that of the first embodiment, and will not be repeated here.

The difference from the first embodiment is that the third embodiment can realize bridgeless step-down power factor correction with three-phase delta connection.

Fourth Embodiment

6 is a schematic diagram of the fourth embodiment of the bridgeless step-down power factor correction circuit of the present invention. On the basis of the first embodiment, the bridgeless step-down power factor correction circuit in the first embodiment is used as the unit circuit 1, Unit circuit 2 and unit circuit 3 are electrically connected by star connection to form a three-phase bridgeless step-down power factor correction circuit. The AC power input AC POWER N in the unit circuit 3 is electrically connected and is the AC power input AC POWER N as a three-phase star connection, and the AC power input AC POWER L in the unit circuit 1, the unit circuit 2, and the unit circuit 3 are sequentially As AC power input AC POWER A, AC power input AC POWER B, and AC power input AC POWER C, the output terminal VOUT+ in unit circuit 1 is electrically connected with the output terminal VOUT+ in unit circuit 2 and unit circuit 3 respectively, and is used as The output terminal VOUT+ and the output terminal VOUT- of the unit circuit 1 are respectively electrically connected to the output terminal VOUT- of the unit circuit 2 and the unit circuit 3, and serve as the output terminal VOUT-, and other electrical connection relationships remain unchanged.

The difference from the first embodiment is that the fourth embodiment can realize bridgeless step-down power factor correction with three-phase star connection.

The above are only the preferred embodiments of the present invention. It should be noted that the above-mentioned preferred embodiments should not be regarded as limitations of the present invention. For the MOS transistor Q1 and the MOS transistor Q2: they can also be understood as switching transistors. The switching transistors include MOS transistors, IGBT and other electronic switching devices. For diode D1, diode D2, diode D3, and diode D4: it can also be understood as a synchronous rectifier tube composed of MOS tubes. For those of ordinary skill in the art, without departing from the spirit and scope of the present invention, several equivalent transformations, improvements and modifications can also be made, and these equivalent transformations, improvements and modifications should also be regarded as the protection scope of the present invention , the embodiments are not repeated here, and the protection scope of the present invention should be based on the scope defined by the claims. All the relationships of "electrical connection", "connection" and "connection" involved in the patent do not mean that the components are directly connected, but refer to the fact that a better connection can be formed by adding or reducing connection accessories according to the specific implementation. In the present invention, the place where "electrical connection" is explicitly used is only to emphasize this meaning, but it does not exclude that the places where "connection" and "connection" are used also have such meaning. Various technical features in the present invention can be combined interactively on the premise of not contradicting each other.

Claims

A bridgeless step-down power factor correction circuit is characterized in that: it comprises a MOS tube Q1, a MOS tube Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, an inductance L1, an inductance L2 and a resistor R1, and are electrically connected to each other. The relationship is: AC power input AC POWER L is connected to the drain of MOS tube Q2 and the cathode of diode D3, the source of MOS tube Q2 is connected to the cathode of diode D4 and the No. 1 terminal of inductor L2, and the anode of diode D4 is connected to one end of capacitor C1 , the anode of the diode D1, one end of the resistor R1 and the output terminal VOUT-, the AC power input AC POWER N is connected to the cathode of the diode D2 and the drain of the MOS transistor Q1, and the anode of the diode D2 is connected to the No. 2 terminal of the inductor L2 and the capacitor C1. The other end is connected to the other end of the resistor R1, the other end of the resistor R1 is connected to the output terminal VOUT+, the source of the MOS transistor Q1 is connected to the cathode of the diode D1 and the No. 1 terminal of the inductor L1, and the No. 2 terminal of the inductor L1 is connected to the anode of the diode D3 and the Output terminal VOUT+.
The bridgeless step-down power factor correction circuit according to claim 1 is further characterized in that: the MOS transistor Q1 and the MOS transistor Q2 work alternately in the positive half cycle and the negative half cycle of the alternating current.
The bridgeless step-down power factor correction circuit according to claim 1, wherein the bridgeless step-down power factor correction circuit is connected as a unit circuit 1, a unit circuit 2, and a unit circuit 3 through a delta connection method respectively. Three-phase bridgeless step-down power factor correction circuit, the electrical connection relationship is: AC power input AC POWER N in unit circuit 1 is connected to AC power input AC POWER L in unit circuit 2 as AC power input AC POWER A, unit circuit 2 The AC power input AC POWER N in the unit circuit 3 is connected to the AC power input AC POWER L as the AC power input AC POWER B, and the AC power input AC POWER N in the unit circuit 3 is connected to the AC power input AC POWER in the unit circuit 1. L is used as the AC power input AC POWER C, the output terminal VOUT+ in the unit circuit 1 is electrically connected with the output terminal VOUT+ in the unit circuit 2 and the unit circuit 3 respectively, and serves as the total output terminal VOUT+, the output terminal VOUT- in the unit circuit 1 It is electrically connected to the output terminal VOUT- of the unit circuit 2 and the unit circuit 3 respectively, and is used as the total output terminal VOUT-, and other electrical connection relationships remain unchanged.
The bridgeless step-down power factor correction circuit according to claim 1, wherein the bridgeless step-down power factor correction circuit is respectively used as unit circuit 1, unit circuit 2, unit circuit 3 and connected by star connection A three-phase bridgeless step-down power factor correction circuit is formed, and the electrical connection relationship is as follows: the AC power input AC POWER N in the unit circuit 1 is electrically connected to the AC power input AC POWER N in the unit circuit 2 and the unit circuit 3 respectively and acts as three The total AC power input AC POWER N of the phase star connection method, the AC power input AC POWER L in the unit circuit 1, the unit circuit 2, and the unit circuit 3 are respectively used as the AC power input AC POWER A, AC power input AC POWER B, The AC power input AC POWER C, the output terminal VOUT+ in the unit circuit 1 is electrically connected with the output terminal VOUT+ in the unit circuit 2 and the unit circuit 3 respectively, and serves as the total output terminal VOUT+, and the output terminal VOUT- in the unit circuit 1 is respectively connected with The output terminals VOUT- in the unit circuit 2 and the unit circuit 3 are electrically connected, and serve as the total output terminal VOUT-, and other electrical connection relationships remain unchanged.
A bridgeless step-down power factor correction circuit is characterized in that: it comprises a MOS transistor Q1, a MOS transistor Q2, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, a transformer TX1, a transformer TX2 and a resistor R1, and are electrically connected to The relationship is: AC power input AC POWER L is connected to the drain of the MOS transistor Q2 and the cathode of the diode D3, the source of the MOS transistor Q2 is connected to the No. 1 terminal of the primary winding of the transformer TX2, and the anode of the diode D2 is connected to the primary winding of the transformer TX2. Terminal 2, the cathode of diode D4 is connected to terminal 1 of the secondary winding of transformer TX2, the anode of diode D4 is connected to one end of capacitor C1, the anode of diode D1, one end of resistor R1 and the output terminal VOUT-, and the other end of capacitor C1 is connected Terminal 2 of the secondary winding of the transformer TX2, the other end of the capacitor C1 and the other end of the resistor R1, the other end of the resistor R1 is connected to the output terminal VOUT+, the AC power input AC POWER N is connected to the cathode of the diode D2 and the drain of the MOS transistor Q1 ; The source of the MOS transistor Q1 is connected to the No. 1 terminal of the primary winding of the transformer TX1, the anode of the diode D3 is connected to the No. 2 terminal of the primary winding of the transformer TX1, and the cathode of the diode D1 is connected to the No. 1 terminal of the secondary winding of the transformer TX1, and the output terminal VOUT+ is connected to the No. 2 terminal of the secondary winding of the transformer TX1, and other electrical connections remain unchanged; in the above, the No. 1 terminal of the primary winding of the transformer TX1 and the No. 1 terminal of the secondary winding of the transformer are the same name terminals, and the terminal of the primary winding of the transformer TX2 The No. 1 terminal and the No. 1 terminal of the secondary winding have the same name as each other.