WO2022173271A1 - Method for manufacturing printed circuit board - Google Patents

Method for manufacturing printed circuit board Download PDF

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Publication number
WO2022173271A1
WO2022173271A1 PCT/KR2022/002208 KR2022002208W WO2022173271A1 WO 2022173271 A1 WO2022173271 A1 WO 2022173271A1 KR 2022002208 W KR2022002208 W KR 2022002208W WO 2022173271 A1 WO2022173271 A1 WO 2022173271A1
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WO
WIPO (PCT)
Prior art keywords
printed circuit
circuit board
atomic layer
layer deposition
base substrate
Prior art date
Application number
PCT/KR2022/002208
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French (fr)
Korean (ko)
Inventor
신웅철
백민
Original Assignee
신웅철
백민
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Application filed by 신웅철, 백민 filed Critical 신웅철
Publication of WO2022173271A1 publication Critical patent/WO2022173271A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks

Definitions

  • the present invention relates to a printed circuit board and a method of manufacturing the same, and more particularly, to a printed circuit board in which an insulating atomic layer deposition film is formed over the entire surface including a connection pad, and a method of manufacturing the same.
  • This conventional printed circuit board manufacturing method uses a large amount of gold, which is an expensive precious metal, so that the manufacturing cost is high, the process is very complicated, and there are problems in that bonding characteristics are not good during wire bonding.
  • the technical problem to be solved by the present invention is to provide a printed circuit board in which an insulating atomic layer deposition film is formed over the entire surface including a connection pad, thereby having excellent bonding properties during wire bonding and lowering the manufacturing cost, and a method for manufacturing the same.
  • a printed circuit board for solving the above-described technical problem, the base substrate layer; a first connection pad patterned and disposed on a specific region of one surface of the base substrate layer and made of a first metal; a second connection pad patterned and disposed on a specific region of the other surface of the base substrate layer and made of the first metal; a first solder resist layer disposed on one surface of the base substrate layer and formed in a pattern for opening an upper surface of the first connection pad; a second solder resist layer disposed on the other surface of the base substrate layer and formed in a pattern for opening an upper surface of the second connection pad; and an insulating atomic layer deposition film formed over the entire surface of both surfaces of the base substrate layer including the first and second connection pads and the surfaces of the first and second solder resist layers, and formed by an atomic layer deposition process.
  • the insulating atomic layer deposition film is preferably an insulating oxide film or an insulating nitride film.
  • the insulating atomic layer deposition film is preferably at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 .
  • the insulating atomic layer deposition film is preferably made of multiple layers each including at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO.
  • the insulating atomic layer deposition film is preferably formed to a thickness of 1nm ⁇ 50nm.
  • the base substrate layer preferably has a multilayer structure.
  • the present invention comprises the steps of: 1) preparing a printed circuit board comprising a base substrate layer in which first and second connection pads are patterned on specific regions of one surface and the other surface, respectively; 2) forming first and second solder resist layers on one surface and the other surface of the base substrate layer, respectively, so that upper surfaces of the first and second connection pads are opened; 3) forming an insulating atomic layer deposition film on the entire area of both surfaces of the printed circuit board including the upper surfaces of the first and second connection pads and the surfaces of the first and second solder resist layers by an atomic layer deposition method; It also provides a method for manufacturing a printed circuit board comprising.
  • step 3) is preferably performed by a batch-type atomic layer deposition apparatus that simultaneously deposits the insulating atomic layer deposition film by loading a plurality of printed circuit boards in parallel into the atomic layer deposition apparatus.
  • step 3 it is preferable to form the insulating atomic layer deposition film to a thickness of 1 nm to 50 nm.
  • the insulating atomic layer deposition film is preferably at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 .
  • step 3 in the method for manufacturing a printed circuit board according to the present invention, after performing step 3), one of the methods of wire bonding, soldering, or flip chip bumping on the upper surfaces of the first and second connection pads. It is preferable that the step of forming a bonding (bonding) by any one or more methods is further performed.
  • the base substrate layer preferably has a multilayer structure.
  • an insulating atomic layer deposition layer on the front surface of the printed circuit board including the connection pad immediately before the bonding structure is formed by an atomic layer deposition method, a nickel layer and gold for wire bonding.
  • FIG. 1 is a cross-sectional view schematically showing the structure of a printed circuit board according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view schematically showing the structure of a printed circuit board according to another embodiment of the present invention.
  • FIG. 3 is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present invention.
  • FIGS. 4 to 7 are views illustrating processes of a method for manufacturing a printed circuit board according to an embodiment of the present invention.
  • FIG. 8 is a view showing a process of a conventional printed circuit board manufacturing method.
  • the printed circuit board 100 has a base substrate layer 110 , a first connection pad 120 , a second connection pad 130 , and a first solder resist layer 140 . ), a second solder resist layer 150 and an insulating atomic layer deposition layer 160 .
  • the base substrate layer 110 is a component forming the basis of the printed circuit board according to the present embodiment, and provides an installation space for other components.
  • the base substrate layer 110 is specifically made of epoxy resin, polyimide resin, bismalemide triazine (BT) resin, FR-4 (Flame Retardant 4), FR-5, ceramic, silicon, or a material including glass. can be made with
  • the base substrate layer 110 may be a single layer or may include a multi-layer structure including wiring patterns therein.
  • the base substrate layer 110 may be a single rigid flat plate, formed by bonding a plurality of rigid flat plates, or bonding a thin flexible substrate and a rigid flat plate as shown in FIG. 2 .
  • a plurality of rigid flat plates or flexible substrates bonded to each other may each include a wiring pattern.
  • the first connection pad 120 is patterned and disposed on a specific area of one surface of the base substrate layer 110 , and is a component made of a first metal.
  • the first connection pad 120 means a portion formed in a predetermined pattern on one surface of the base substrate layer 110 to be used as a connection pad of a printed circuit board, and the first metal is copper ( Cu).
  • Another structure made of the same first metal and formed on one surface of the base substrate layer 110 is a component used as a wiring or the like.
  • the second connection pad 130 is patterned and disposed on a specific region of the other surface of the base substrate layer 110 , and is a component made of the first metal. That is, the second connection pad 130 is formed on the opposite surface of the base substrate layer 110 on which the first connection pad 120 is formed, and is also used as a connection pad of the printed circuit board. And in the present embodiment, the second connection pad 130 is made of a first metal in the same manner as the first connection pad 120 .
  • the first solder resist layer 140 is positioned on one surface of the base substrate layer 110 and forms an area for wire bonding among the upper surface of the first connection pad 120 . It is a component formed in an opening pattern.
  • the first solder resist layer 140 is specifically coated with a photo-imageable solder resist on one surface of the base substrate layer 110 by a screen printing method or a spray coating method, or a film-type solder resist material is applied. After bonding by a laminating method, unnecessary portions may be removed by exposure and development, and may be formed by curing with heat, UV or IR.
  • the second solder resist layer 150 is positioned on the other surface of the base substrate layer 110 , and a pattern for opening a soldering region among the top surface of the second connection pad 130 . It is a component formed by The second solder resist layer 150 may be formed by substantially the same method as the first solder resist layer 140 .
  • the insulating atomic layer deposition film 160 includes surfaces of the first and second connection pads 120 and 130 and the first and second solder resist layers 130 and 140 . It is formed over the entire surface of both surfaces of the base substrate layer 110 and is a component formed by an atomic layer deposition process. That is, the insulating atomic layer deposition film 160 is made of an insulating oxide film or an insulating nitride film having insulating properties, and has an atomic layer deposition method (Atomic Layer) having excellent step coverage characteristics on a printed circuit board having various stepped structures. Deposition) is preferably formed.
  • Atomic Layer atomic layer deposition method having excellent step coverage characteristics on a printed circuit board having various stepped structures. Deposition
  • the insulating atomic layer deposition layer 160 is preferably made of at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 which is an oxide of a metal different from the first metal.
  • the insulating atomic layer deposition film 160 may be formed of a plurality of layers each including at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO.
  • it may have a three-layer structure in which an atomic layer deposition film made of Al 2 O 3 is formed at the top and bottom, and an atomic layer deposition film made of ZnO is disposed therebetween.
  • the insulating atomic layer deposition film 160 is formed by the atomic layer deposition method, it is preferably formed to a thin thickness of 1 nm to 50 nm.
  • the printed circuit board 100 includes a base substrate layer 110 in which first and second connection pads 120 and 130 are patterned on specific areas of one surface and the other surface, respectively.
  • the base substrate layer 110 may have a multilayer structure.
  • a step S200 of forming the first and second solder resist layers 140 and 150 is performed. That is, in this step (S200), as shown in FIG. 5 on the printed circuit board 100 prepared in the previous step (S100), wire bonding or soldering among the upper surfaces of the first and second connection pads 120 and 130 is performed.
  • the first and second solder resist layers 140 and 150 are respectively formed on one surface and the other surface of the base substrate layer 110 so that the region to be used is opened.
  • the step of forming the insulating atomic layer deposition film 160 ( S300 ) is performed.
  • this step (S300) as shown in FIG. 6 , the printed circuit including the upper surfaces of the first and second connection pads 120 and 130 and the surfaces of the first and second solder resist layers 140 and 150 .
  • An insulating atomic layer deposition film 160 is formed on the entire region of both surfaces of the substrate by an atomic layer deposition method.
  • the plurality of printed circuit boards 100 which have undergone the previous step (S200), are loaded into the atomic layer deposition apparatus in a state in which they are arranged in parallel to a cassette, etc., with respect to the plurality of printed circuit boards.
  • a batch type ALD for depositing the insulating atomic layer deposition film because the process can be efficiently performed and productivity can be secured.
  • the insulating atomic layer deposition film is preferably formed to have a thickness of 1 nm to 50 nm, and preferably at least one of Al 2 O 3 , ZnO, TiO 2 , SiO 2 that can be formed by an atomic layer deposition method. do.
  • a step ( S400 ) of forming bonding on the upper surfaces of the first and second connection pads 120 and 130 is performed.
  • this step (S400) specifically, as shown in FIG. 7 , wire bonding 170 is formed on the first connection pad 120 , or soldering (wire bonding) is formed on the second connection pad 130 .
  • bonding may be formed by any one or more methods of a method of forming soldering or a flip chip bumping method.
  • various bonding is performed without forming any additional processing or structure such as a gold plating layer or OSP on the upper surfaces of the first and second connection pads 120 and 130 on the printed circuit board that has undergone the previous step (S300). There are advantages to forming.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

The present invention relates to a printed circuit board on which an insulating atomic layer deposition film is formed over the entire surface thereof including a connection pad, and a method for manufacturing same. The printed circuit board according to the present invention comprises: a base substrate layer; a first connection pad made of a first metal, and patterned and disposed on a specific region of one surface of the base substrate layer; a second connection pad made of the first metal, and patterned and disposed on a specific region of the other surface of the base substrate layer; a first solder resist layer disposed on one surface of the base substrate layer, and formed in a pattern opening an upper surface of the first connection pad; a second solder resist layer disposed on the other surface of the base substrate layer, and formed in a pattern opening an upper surface of the second connection pad; and an insulating atomic layer deposition film formed over the entire surface of both surfaces of the base substrate layer including the first and second connection pads and surfaces of the first and second solder resist layers, and formed by an atomic layer deposition process.

Description

인쇄회로기판 제조방법Printed circuit board manufacturing method
본 발명은 인쇄회로기판 및 그 제조방법에 관한 것으로서, 보다 상세하게는 절연성 원자층 증착막이 연결 패드를 포함한 전면에 걸쳐서 형성되어 있는 인쇄회로기판 및 그 제조방법에 관한 것이다. The present invention relates to a printed circuit board and a method of manufacturing the same, and more particularly, to a printed circuit board in which an insulating atomic layer deposition film is formed over the entire surface including a connection pad, and a method of manufacturing the same.
전자 산업의 비약적인 발전 및 사용자의 요구에 따라 전자기기는 더욱 더 소형화 및 고성능화되고 있다. 따라서 전자기기에 포함되는 반도체 패키지 또한 소형화 및 고성능화가 진행됨에 따라, 반도체 패키지가 가지는 인쇄회로기판의 연결 패드의 신뢰성이 요구되고 있다.In accordance with the rapid development of the electronic industry and the needs of users, electronic devices are becoming smaller and higher in performance. Accordingly, as semiconductor packages included in electronic devices are also miniaturized and improved in performance, the reliability of the connection pads of the printed circuit board of the semiconductor package is required.
따라서 종래에는 인쇄회로기판 중 연결 패드를 이루는 구리의 산화를 방지하기 위하여 연결 패드 표면에 니켈을 도금하고, 그 상부에 다시 고가의 금(Au)을 도금하는 방식을 사용하였다. Therefore, in the prior art, in order to prevent oxidation of copper constituting the connection pad of the printed circuit board, nickel was plated on the surface of the connection pad, and a method of plating expensive gold (Au) on the surface of the connection pad was used.
이러한 종래의 인쇄회로기판 제조 방식은 고가의 귀금속인 금을 대량으로 사용하여 제조단가가 높아지고, 공정이 매우 복잡하며, 와이어 본딩시 본딩 특성이 좋지 않은 문제점이 있었다. This conventional printed circuit board manufacturing method uses a large amount of gold, which is an expensive precious metal, so that the manufacturing cost is high, the process is very complicated, and there are problems in that bonding characteristics are not good during wire bonding.
본 발명이 해결하고자 하는 기술적 과제는 절연성 원자층 증착막이 연결 패드를 포함한 전면에 걸쳐서 형성되어 와이어 본딩시 본딩 특성이 우수하고 제조 단가를 낮출 수 있는 인쇄회로기판 및 그 제조방법을 제공하는 것이다. The technical problem to be solved by the present invention is to provide a printed circuit board in which an insulating atomic layer deposition film is formed over the entire surface including a connection pad, thereby having excellent bonding properties during wire bonding and lowering the manufacturing cost, and a method for manufacturing the same.
전술한 기술적 과제를 해결하기 위한 본 발명에 따른 인쇄회로기판은, 베이스 기판층; 상기 베이스 기판층의 일면의 특정 영역에 패터닝되어 배치되며, 제1 금속으로 이루어지는 제1 연결 패드; 상기 베이스 기판층의 타면의 특정 영역에 패터닝되어 배치되며, 상기 제1 금속으로 이루어지는 제2 연결 패드; 상기 베이스 기판층의 일면 상에 위치하며, 상기 제1 연결 패드 상면을 개방시키는 패턴으로 형성되는 제1 솔더 레지스트층; 상기 베이스 기판층의 타면 상에 위치하며, 상기 제2 연결 패드 상면을 개방시키는 패턴으로 형성되는 제2 솔더 레지스트층; 상기 제1, 2 연결 패드 및 상기 제1, 2 솔더 레지스트층의 표면을 포함하는 상기 베이스 기판층의 양면의 전면에 걸쳐서 형성되며, 원자층 증착 공정으로 형성되는 절연성 원자층 증착막;을 포함한다. A printed circuit board according to the present invention for solving the above-described technical problem, the base substrate layer; a first connection pad patterned and disposed on a specific region of one surface of the base substrate layer and made of a first metal; a second connection pad patterned and disposed on a specific region of the other surface of the base substrate layer and made of the first metal; a first solder resist layer disposed on one surface of the base substrate layer and formed in a pattern for opening an upper surface of the first connection pad; a second solder resist layer disposed on the other surface of the base substrate layer and formed in a pattern for opening an upper surface of the second connection pad; and an insulating atomic layer deposition film formed over the entire surface of both surfaces of the base substrate layer including the first and second connection pads and the surfaces of the first and second solder resist layers, and formed by an atomic layer deposition process.
그리고 본 발명에서 상기 절연성 원자층 증착막은 절연성 산화막 또는 절연성 질화막인 것이 바람직하다. In the present invention, the insulating atomic layer deposition film is preferably an insulating oxide film or an insulating nitride film.
또한 본 발명에서 상기 절연성 원자층 증착막은 Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상인 것이 바람직하다. Also, in the present invention, the insulating atomic layer deposition film is preferably at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 .
또한 본 발명에서 상기 절연성 원자층 증착막은 Al2O3 로 이루어지는 원자층 증착막과 ZnO로 이루어지는 원자층 증착막을 각각 적어도 한층 이상 포함하는 다수층으로 이루어지는 것이 바람직하다. In addition, in the present invention, the insulating atomic layer deposition film is preferably made of multiple layers each including at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO.
또한 본 발명에서 상기 절연성 원자층 증착막은 1nm ~ 50nm 의 두께로 형성되는 것이 바람직하다. In addition, in the present invention, the insulating atomic layer deposition film is preferably formed to a thickness of 1nm ~ 50nm.
또한 본 발명에서 상기 베이스 기판층은 다층 구조를 가지는 것이 바람직하다. In addition, in the present invention, the base substrate layer preferably has a multilayer structure.
한편 본 발명은, 1) 제1, 2 연결 패드가 각각 일면 및 타면의 특정 영역에 패터닝되어 형성되는 베이스 기판층으로 이루어지는 인쇄회로기판을 준비하는 단계; 2) 상기 제1, 2 연결 패드의 상면이 개방되도록 상기 베이스 기판층의 일면 및 타면에 각각 제1, 2 솔더레지스트층을 형성하는 단계; 3) 상기 제1, 2 연결 패드의 상면 및 상기 제1, 2 솔더레지스트층의 표면을 포함하는 상기 인쇄회로기판의 양면의 전영역에 원자층 증착 방법으로 절연성 원자층 증착막을 형성하는 단계;를 포함하는 인쇄회로기판 제조방법도 제공한다. Meanwhile, the present invention comprises the steps of: 1) preparing a printed circuit board comprising a base substrate layer in which first and second connection pads are patterned on specific regions of one surface and the other surface, respectively; 2) forming first and second solder resist layers on one surface and the other surface of the base substrate layer, respectively, so that upper surfaces of the first and second connection pads are opened; 3) forming an insulating atomic layer deposition film on the entire area of both surfaces of the printed circuit board including the upper surfaces of the first and second connection pads and the surfaces of the first and second solder resist layers by an atomic layer deposition method; It also provides a method for manufacturing a printed circuit board comprising.
또한 본 발명에서 상기 3) 단계는, 다수장의 인쇄회로기판을 평행하게 배치한 상태에서 원자층 증착 장치 내에 로딩하여 동시에 상기 절연성 원자층 증착막을 증착하는 배치형 원자층 증착 장치에 의하여 이루어지는 것이 바람직하다. In addition, in the present invention, step 3) is preferably performed by a batch-type atomic layer deposition apparatus that simultaneously deposits the insulating atomic layer deposition film by loading a plurality of printed circuit boards in parallel into the atomic layer deposition apparatus. .
또한 본 발명에서 상기 3) 단계에서는, 상기 절연성 원자층 증착막을 1nm ~ 50nm 의 두께로 형성하는 것이 바람직하다. In the present invention, in step 3), it is preferable to form the insulating atomic layer deposition film to a thickness of 1 nm to 50 nm.
또한 본 발명에서 상기 절연성 원자층 증착막은 Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상인 것이 바람직하다. Also, in the present invention, the insulating atomic layer deposition film is preferably at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 .
또한 본 발명에 따른 인쇄회로기판 제조방법에서는, 상기 3) 단계 수행 후에, 상기 제1, 2 연결 패드 상면에 와이어 본딩(wire bonding), 솔더링(soldering) 또는 플립칩 범핑(Flip chip bumping) 방법 중 어느 하나 이상의 방법에 의하여 본딩(bonding)을 형성하는 단계가 더 수행되는 것이 바람직하다. In addition, in the method for manufacturing a printed circuit board according to the present invention, after performing step 3), one of the methods of wire bonding, soldering, or flip chip bumping on the upper surfaces of the first and second connection pads. It is preferable that the step of forming a bonding (bonding) by any one or more methods is further performed.
또한 본 발명에서 상기 베이스 기판층은 다층 구조를 가지는 것이 바람직하다. In addition, in the present invention, the base substrate layer preferably has a multilayer structure.
본 발명의 인쇄회로기판 및 그 제조방법에 의하면 본딩 구조 형성 직전에 연결 패드를 포함하는 인쇄회로기판의 전면에 원자층 증착 방법으로 절연성 원자층 증착층을 형성함으로써, 와이어 본딩을 위한 니켈층 및 금 도금층 형성 없이도 그리고 솔더링을 위한 OSP(Organic Solderability preservative) 형성 없이도 연결 패드의 산화 현상을 방지함과 동시에 본딩 특성(bondablity)을 현저하게 개선할 수 있는 장점이 있다. According to the printed circuit board and the method for manufacturing the same of the present invention, by forming an insulating atomic layer deposition layer on the front surface of the printed circuit board including the connection pad immediately before the bonding structure is formed by an atomic layer deposition method, a nickel layer and gold for wire bonding There is an advantage of preventing oxidation of the connection pad and remarkably improving bonding properties without forming a plating layer and without forming an organic solderability preservative (OSP) for soldering.
또한 종래의 인쇄회로기판 제조 방법에서는 도 8에 도시된 바와 같이, Dry Film 라미네이팅 하는 공정(S30), Au Plating Mask를 이용한 UV 노광 공정(S40), Developing 공정(S50), 금/니켈 도금 공정(S60), Dry Film 제거 공정(S70), OSP 형성 공정(S80) 등 매우 복잡하고 다양한 공정이 필요했으나, 본원발명의 인쇄회로기판 제조방법에 의하면 니켈 및 금 도금층 형성 공정 및 OSP 형성 공정이 불필요하므로, 공정이 단순해지고, 귀금속인 금 사용량을 대폭 절감하여 제조 단가를 낮출 수 있는 장점도 있다. In addition, in the conventional printed circuit board manufacturing method, as shown in FIG. 8, dry film laminating process (S30), UV exposure process using Au plating mask (S40), developing process (S50), gold/nickel plating process ( S60), dry film removal process (S70), OSP forming process (S80), etc. were very complicated and various processes were required, but according to the printed circuit board manufacturing method of the present invention, nickel and gold plating layer forming process and OSP forming process are unnecessary There are also advantages in that the manufacturing cost can be reduced by simplifying the process, and significantly reducing the amount of gold, which is a precious metal.
도 1은 본 발명의 일 실시예에 따른 인쇄회로기판의 구조를 모식적으로 도시하는 단면도이다. 1 is a cross-sectional view schematically showing the structure of a printed circuit board according to an embodiment of the present invention.
도 2는 본 발명의 다른 실시예에 따른 인쇄회로기판의 구조를 모식적으로 도시하는 단면도이다. 2 is a cross-sectional view schematically showing the structure of a printed circuit board according to another embodiment of the present invention.
도 3은 본 발명의 일 실시예에 따른 인쇄회로기판 제조방법의 공정도이다. 3 is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present invention.
도 4 내지 도 7은 본 발명의 일 실시예에 따른 인쇄회로기판 제조방법의 공정들을 도시하는 도면들이다. 4 to 7 are views illustrating processes of a method for manufacturing a printed circuit board according to an embodiment of the present invention.
도 8은 종래의 인쇄회로기판 제조방법의 공정을 도시하는 도면들이다. 8 is a view showing a process of a conventional printed circuit board manufacturing method.
이하에서는 첨부된 도면을 참조하여 본 발명의 구체적인 실시예를 상세하게 설명한다. Hereinafter, specific embodiments of the present invention will be described in detail with reference to the accompanying drawings.
본 실시예에 따른 인쇄회로기판(100)은 도 1에 도시된 바와 같이, 베이스 기판층(110), 제1 연결 패드(120), 제2 연결 패드(130), 제1 솔더 레지스트층(140), 제2 솔더 레지스트층(150) 및 절연성 원자층 증착층(160)을 포함하여 구성된다. As shown in FIG. 1 , the printed circuit board 100 according to this embodiment has a base substrate layer 110 , a first connection pad 120 , a second connection pad 130 , and a first solder resist layer 140 . ), a second solder resist layer 150 and an insulating atomic layer deposition layer 160 .
먼저 상기 베이스 기판층(110)은 본 실시예에 따른 인쇄회로기판의 기초를 이루는 구성요소로서, 다른 구성요소들의 설치 공간을 제공한다. 상기 베이스 기판층(110)은 구체적으로 에폭시 수지, 폴리이미드 수지, 비스말레마이드 트리아진(BT) 수지, FR-4(Flame Retardant 4), FR-5, 세라믹, 실리콘, 또는 유리를 포함하는 재질로 이루어질 수 있다. First, the base substrate layer 110 is a component forming the basis of the printed circuit board according to the present embodiment, and provides an installation space for other components. The base substrate layer 110 is specifically made of epoxy resin, polyimide resin, bismalemide triazine (BT) resin, FR-4 (Flame Retardant 4), FR-5, ceramic, silicon, or a material including glass. can be made with
그리고 본 실시예에서 상기 베이스 기판층(110)은 단일층이거나 또는 그 내부에 배선 패턴들을 포함하는 다층 구조를 포함할 수 있다. 예를 들어, 베이스 기판층(110)은 하나의 강성(Rigid) 평판이거나, 도 2에 도시된 바와 같이, 복수의 강성 평판이 접착되어 형성되거나, 얇은 가요성 기판과 강성 평판이 접착되어 형성될 수 있다. 또한 도 2에 도시된 바와 같이, 서로 접착되는 복수의 강성 평판들, 또는 가요성 기판들은 배선 패턴을 각각 포함할 수 있다.And in this embodiment, the base substrate layer 110 may be a single layer or may include a multi-layer structure including wiring patterns therein. For example, the base substrate layer 110 may be a single rigid flat plate, formed by bonding a plurality of rigid flat plates, or bonding a thin flexible substrate and a rigid flat plate as shown in FIG. 2 . can Also, as shown in FIG. 2 , a plurality of rigid flat plates or flexible substrates bonded to each other may each include a wiring pattern.
다음으로 상기 제1 연결 패드(120)는 도 1에 도시된 바와 같이, 상기 베이스 기판층(110)의 일면의 특정 영역에 패터닝(Paterning) 되어 배치되며, 제1 금속으로 이루어지는 구성요소이다. 상기 제1 연결 패드(120)는 상기 베이스 기판층(110)의 일면에 미리 정해진 패턴으로 형성되어 인쇄회로기판의 연결 패드로 사용되는 부분을 의미하며, 상기 제1 금속은 전기전도성이 우수한 구리(Cu)로 이루어질 수 있다. 동일한 제 1금속으로 이루어지며, 상기 베이스 기판층(110)의 일면에 형성되는 다른 구조물은 배선 등으로 사용되는 구성요소이다. Next, as shown in FIG. 1 , the first connection pad 120 is patterned and disposed on a specific area of one surface of the base substrate layer 110 , and is a component made of a first metal. The first connection pad 120 means a portion formed in a predetermined pattern on one surface of the base substrate layer 110 to be used as a connection pad of a printed circuit board, and the first metal is copper ( Cu). Another structure made of the same first metal and formed on one surface of the base substrate layer 110 is a component used as a wiring or the like.
다음으로 상기 제2 연결 패드(130)는 도 1에 도시된 바와 같이, 상기 베이스 기판층(110)의 타면의 특정 영역에 패터닝 되어 배치되며, 상기 제1 금속으로 이루어지는 구성요소이다. 즉, 상기 제2 연결 패드(130)는 상기 베이스 기판층(110) 중 상기 제1 연결 패드(120)가 형성되는 반대면에 형성되며, 역시 인쇄회로기판의 연결 패드로 사용되는 부분이다. 그리고 본 실시예에서 상기 제2 연결 패드(130)는 상기 제1 연결 패드(120)와 동일하게 제1 금속으로 이루어진다. Next, as shown in FIG. 1 , the second connection pad 130 is patterned and disposed on a specific region of the other surface of the base substrate layer 110 , and is a component made of the first metal. That is, the second connection pad 130 is formed on the opposite surface of the base substrate layer 110 on which the first connection pad 120 is formed, and is also used as a connection pad of the printed circuit board. And in the present embodiment, the second connection pad 130 is made of a first metal in the same manner as the first connection pad 120 .
물론 상기 베이스 기판층(110)의 타면에도 상기 제2 연결 패드(130) 이외에 상기 제1 금속으로 이루어지는 다른 구조물이 형성될 수 있으며, 이들은 배선 등으로 사용된다. Of course, other structures made of the first metal may be formed on the other surface of the base substrate layer 110 in addition to the second connection pad 130 , and these are used as wiring.
다음으로 상기 제1 솔더 레지스트층(140)은 도 1에 도시된 바와 같이, 상기 베이스 기판층(110)의 일면 상에 위치하며, 상기 제1 연결 패드(120) 상면 중 와이어 본딩을 위한 영역을 개방시키는 패턴으로 형성되는 구성요소이다. 상기 제1 솔더 레지스트층(140)은 구체적으로 상기 베이스 기판층(110)의 일면에 감광성 솔더 레지스트(Photo-Imageable Solder Resist)를 스크린 인쇄 방법 또는 스프레이 코팅 방법으로 전체 도포하거나 필름형 솔더 레지스트 물질을 라미네이팅(laminating) 방법으로 접착한 후, 불필요한 부분을 노광 및 현상으로 제거하고, 열, UV 또는 IR로 경화하여 형성할 수 있다. Next, as shown in FIG. 1 , the first solder resist layer 140 is positioned on one surface of the base substrate layer 110 and forms an area for wire bonding among the upper surface of the first connection pad 120 . It is a component formed in an opening pattern. The first solder resist layer 140 is specifically coated with a photo-imageable solder resist on one surface of the base substrate layer 110 by a screen printing method or a spray coating method, or a film-type solder resist material is applied. After bonding by a laminating method, unnecessary portions may be removed by exposure and development, and may be formed by curing with heat, UV or IR.
다음으로 상기 제2 솔더 레지스트층(150)은 도 1에 도시된 바와 같이, 상기 베이스 기판층(110)의 타면 상에 위치하며, 상기 제2 연결 패드(130) 상면 중 솔더링 영역을 개방시키는 패턴으로 형성되는 구성요소이다. 상기 제2 솔더 레지스트층(150)은 실질적으로 상기 제1 솔더 레지스트층(140)과 동일한 방법에 의하여 형성될 수 있다. Next, as shown in FIG. 1 , the second solder resist layer 150 is positioned on the other surface of the base substrate layer 110 , and a pattern for opening a soldering region among the top surface of the second connection pad 130 . It is a component formed by The second solder resist layer 150 may be formed by substantially the same method as the first solder resist layer 140 .
다음으로 상기 절연성 원자층 증착막(160)은 도 1에 도시된 바와 같이, 상기 제1, 2 연결 패드(120, 130) 및 상기 제1, 2 솔더 레지스트층(130, 140)의 표면을 포함하는 상기 베이스 기판층(110)의 양면의 전면에 걸쳐서 형성되며, 원자층 증착 공정으로 형성되는 구성요소이다. 즉, 상기 절연성 원자층 증착막(160)은 절연 성질을 가지는 절연성 산화막 또는 절연성 질화막으로 이루어지며, 다양한 단차 구조를 가지는 인쇄회로기판에 우수한 스텝 커버리지(step coverage) 특성을 가지는 원자층 증착 방법(Atomic Layer Deposition)으로 형성되는 것이 바람직하다. Next, as shown in FIG. 1 , the insulating atomic layer deposition film 160 includes surfaces of the first and second connection pads 120 and 130 and the first and second solder resist layers 130 and 140 . It is formed over the entire surface of both surfaces of the base substrate layer 110 and is a component formed by an atomic layer deposition process. That is, the insulating atomic layer deposition film 160 is made of an insulating oxide film or an insulating nitride film having insulating properties, and has an atomic layer deposition method (Atomic Layer) having excellent step coverage characteristics on a printed circuit board having various stepped structures. Deposition) is preferably formed.
구체적으로 상기 절연성 원자층 증착막(160)은 상기 제1 금속과 상이한 금속의 산화물인 Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상의 물질로 이루어지는 것이 바람직하다. Specifically, the insulating atomic layer deposition layer 160 is preferably made of at least one of Al 2 O 3 , ZnO, TiO 2 , and SiO 2 which is an oxide of a metal different from the first metal.
또한 본 실시예에서 상기 절연성 원자층 증착막(160)은 Al2O3 로 이루어지는 원자층 증착막과 ZnO로 이루어지는 원자층 증착막을 각각 적어도 한층 이상 포함하는 다수층으로 이루어질 수도 있다. 예를 들어 Al2O3 로 이루어지는 원자층 증착막이 상하에 형성되고, 그 사이에 ZnO로 이루어지는 원자층 증착막이 배치되는 3층 구조를 가질 수 있는 것이다. In addition, in the present embodiment, the insulating atomic layer deposition film 160 may be formed of a plurality of layers each including at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO. For example, it may have a three-layer structure in which an atomic layer deposition film made of Al 2 O 3 is formed at the top and bottom, and an atomic layer deposition film made of ZnO is disposed therebetween.
한편 본 실시예에서 상기 절연성 원자층 증착막(160)은 원자층 증착 방법에 의하여 형성되므로, 1nm ~ 50nm 의 얇은 두께로 형성되는 것이 바람직하다. Meanwhile, in the present embodiment, since the insulating atomic layer deposition film 160 is formed by the atomic layer deposition method, it is preferably formed to a thin thickness of 1 nm to 50 nm.
이하에서는 본 실시예에 따른 인쇄회로기판 제조방법을 설명한다. Hereinafter, a printed circuit board manufacturing method according to the present embodiment will be described.
먼저 도 3에 도시된 바와 같이, 인쇄회로기판(100)을 준비하는 단계(S100)가 진행된다. 이때 상기 인쇄회로기판(100)은 도 4에 도시된 바와 같이, 제1, 2 연결 패드(120, 130)가 각각 일면 및 타면의 특정 영역에 패터닝되어 형성되는 베이스 기판층(110)으로 이루어진다. 본 실시예에서 상기 베이스 기판층(110)은 다층 구조를 가질 수도 있다. First, as shown in FIG. 3 , a step ( S100 ) of preparing the printed circuit board 100 is performed. At this time, as shown in FIG. 4 , the printed circuit board 100 includes a base substrate layer 110 in which first and second connection pads 120 and 130 are patterned on specific areas of one surface and the other surface, respectively. In this embodiment, the base substrate layer 110 may have a multilayer structure.
다음으로는 도 3에 도시된 바와 같이, 제1, 2 솔더 레지스트층(140, 150)을 형성하는 단계(S200)가 진행된다. 즉, 이 단계(S200)에서는 전 단계(S100)에서 준비된 인쇄회로기판(100)에 도 5에 도시된 바와 같이, 상기 제1, 2 연결 패드(120, 130)의 상면 중 와이어 본딩이나 솔더링에 이용될 영역이 개방되도록 상기 베이스 기판층(110)의 일면 및 타면에 각각 제1, 2 솔더레지스트층(140, 150)을 형성하는 것이다. Next, as shown in FIG. 3 , a step S200 of forming the first and second solder resist layers 140 and 150 is performed. That is, in this step (S200), as shown in FIG. 5 on the printed circuit board 100 prepared in the previous step (S100), wire bonding or soldering among the upper surfaces of the first and second connection pads 120 and 130 is performed. The first and second solder resist layers 140 and 150 are respectively formed on one surface and the other surface of the base substrate layer 110 so that the region to be used is opened.
다음으로는 도 3에 도시된 바와 같이, 절연성 원자층 증착막(160)을 형성하는 단계(S300)가 진행된다. 이 단계(S300)에서는 도 6에 도시된 바와 같이, 상기 제1, 2 연결 패드(120, 130)의 상면 및 상기 제1, 2 솔더레지스트층(140, 150)의 표면을 포함하는 상기 인쇄회로기판의 양면의 전영역에 원자층 증착 방법으로 절연성 원자층 증착막(160)을 형성한다. Next, as shown in FIG. 3 , the step of forming the insulating atomic layer deposition film 160 ( S300 ) is performed. In this step (S300), as shown in FIG. 6 , the printed circuit including the upper surfaces of the first and second connection pads 120 and 130 and the surfaces of the first and second solder resist layers 140 and 150 . An insulating atomic layer deposition film 160 is formed on the entire region of both surfaces of the substrate by an atomic layer deposition method.
구체적으로 본 단계(S300)는 전 단계(S200)를 거친 다수장의 인쇄회로기판(100)을 카세트 등에 평행하게 배치한 상태에서 원자층 증착 장치 내에 로딩(loading)하여, 다수장의 인쇄회로기판에 대하여 동시에 상기 절연성 원자층 증착막을 증착하는 배치형 원자층 증착 장치(batch type ALD)에 의하여 이루어지는 것이, 공정을 효율적으로 수행하고 생산성을 확보할 수 있어서 바람직하다. Specifically, in this step (S300), the plurality of printed circuit boards 100, which have undergone the previous step (S200), are loaded into the atomic layer deposition apparatus in a state in which they are arranged in parallel to a cassette, etc., with respect to the plurality of printed circuit boards. At the same time, it is preferable to use a batch type ALD for depositing the insulating atomic layer deposition film because the process can be efficiently performed and productivity can be secured.
본 실시예에서 상기 절연성 원자층 증착막은 1nm ~ 50nm 의 두께로 형성하는 것이 바람직하며, 원자층 증착 방법에 의하여 형성될 수 있는 Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상인 것이 바람직하다. In this embodiment, the insulating atomic layer deposition film is preferably formed to have a thickness of 1 nm to 50 nm, and preferably at least one of Al 2 O 3 , ZnO, TiO 2 , SiO 2 that can be formed by an atomic layer deposition method. do.
다음으로는 도 3에 도시된 바와 같이, 상기 제1, 2 연결 패드(120, 130) 상면에 본딩(Bonding)을 형성하는 단계(S400)가 진행된다. 이 단계(S400)에서는 구체적으로 도 7에 도시된 바와 같이, 상기 제1 연결 패드(120) 상에 와이어 본딩(170, wire bonding)을 형성하거나, 상기 제2 연결 패드(130) 상에 솔더링(180, soldering)을 형성하는 방법 또는 플립칩 범핑(Flip chip bumping) 방법 중 어느 하나 이상의 방법에 의하여 본딩(bonding)을 형성할 수 있다. 이 단계(S400)는 전 단계(S300)를 거친 인쇄회로기판에 대하여 제1, 2 연결 패드(120, 130) 상면에 금도금층 또는 OSP 등 어떠한 추가적인 처리 또는 구조를 형성하지 않고서도, 다양한 본딩을 형성할 수 있는 장점이 있다. Next, as shown in FIG. 3 , a step ( S400 ) of forming bonding on the upper surfaces of the first and second connection pads 120 and 130 is performed. In this step (S400), specifically, as shown in FIG. 7 , wire bonding 170 is formed on the first connection pad 120 , or soldering (wire bonding) is formed on the second connection pad 130 . 180 , bonding may be formed by any one or more methods of a method of forming soldering or a flip chip bumping method. In this step (S400), various bonding is performed without forming any additional processing or structure such as a gold plating layer or OSP on the upper surfaces of the first and second connection pads 120 and 130 on the printed circuit board that has undergone the previous step (S300). There are advantages to forming.
종래의 인쇄회로기판 제조 방법에서는 도 8에 도시된 바와 같이, Dry Film 라미네이팅 하는 공정(S30), Au Plating Mask를 이용한 UV 노광 공정(S40), Developing 공정(S50), 금/니켈 도금 공정(S60), Dry Film 제거 공정(S70), OSP 형성 공정(S80) 등 매우 복잡하고 다양한 공정이 필요했으나, 본원발명의 인쇄회로기판 제조방법에 의하면 니켈 및 금 도금층 형성 공정 및 OSP 형성 공정이 불필요하므로, 공정이 단순해지고, 귀금속인 금 사용량을 대폭 절감하여 제조 단가를 낮출 수 있는 장점도 있다. In the conventional printed circuit board manufacturing method, as shown in FIG. 8, dry film laminating process (S30), UV exposure process using Au plating mask (S40), developing process (S50), gold/nickel plating process (S60) ), dry film removal process (S70), OSP formation process (S80), etc., were very complicated and various processes were required, but according to the printed circuit board manufacturing method of the present invention, nickel and gold plating layer forming process and OSP forming process are unnecessary There is also an advantage that the manufacturing cost can be lowered by simplifying the process and significantly reducing the amount of gold, which is a precious metal.

Claims (13)

  1. 베이스 기판층;base substrate layer;
    상기 베이스 기판층의 일면의 특정 영역에 패터닝되어 배치되며, 제1 금속으로 이루어지는 제1 연결 패드;a first connection pad patterned and disposed on a specific region of one surface of the base substrate layer and made of a first metal;
    상기 베이스 기판층의 타면의 특정 영역에 패터닝되어 배치되며, 상기 제1 금속으로 이루어지는 제2 연결 패드;a second connection pad patterned and disposed on a specific region of the other surface of the base substrate layer and made of the first metal;
    상기 베이스 기판층의 일면 상에 위치하며, 상기 제1 연결 패드 상면을 개방시키는 패턴으로 형성되는 제1 솔더 레지스트층;a first solder resist layer disposed on one surface of the base substrate layer and formed in a pattern for opening an upper surface of the first connection pad;
    상기 베이스 기판층의 타면 상에 위치하며, 상기 제2 연결 패드 상면을 개방시키는 패턴으로 형성되는 제2 솔더 레지스트층; a second solder resist layer disposed on the other surface of the base substrate layer and formed in a pattern for opening an upper surface of the second connection pad;
    상기 제1, 2 연결 패드 및 상기 제1, 2 솔더 레지스트층의 표면을 포함하는 상기 베이스 기판층의 양면의 전면에 걸쳐서 형성되며, 원자층 증착 공정으로 형성되는 절연성 원자층 증착막;을 포함하는 인쇄회로기판.An insulating atomic layer deposition film formed over the entire surface of both surfaces of the base substrate layer including the first and second connection pads and the surfaces of the first and second solder resist layers and formed by an atomic layer deposition process; printing including circuit board.
  2. 제1항에 있어서, 상기 절연성 원자층 증착막은, According to claim 1, wherein the insulating atomic layer deposition film,
    절연성 산화막 또는 절연성 질화막인 것을 특징으로 하는 인쇄회로기판.A printed circuit board comprising an insulating oxide film or an insulating nitride film.
  3. 제2항에 있어서, 상기 절연성 원자층 증착막은, According to claim 2, wherein the insulating atomic layer deposition film,
    Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상의 물질로 이루어지는 것을 특징으로 하는 인쇄회로기판. Al 2 O 3 , ZnO, TiO 2 , SiO 2 Printed circuit board, characterized in that consisting of any one or more materials.
  4. 제2항에 있어서, 상기 절연성 원자층 증착막은, According to claim 2, wherein the insulating atomic layer deposition film,
    Al2O3 로 이루어지는 원자층 증착막과 ZnO로 이루어지는 원자층 증착막을 각각 적어도 한층 이상 포함하는 다수층으로 이루어지는 것을 특징으로 하는 인쇄회로기판.A printed circuit board comprising a plurality of layers each comprising at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO.
  5. 제1항에 있어서, 상기 절연성 원자층 증착막은, According to claim 1, wherein the insulating atomic layer deposition film,
    1nm ~ 50nm 의 두께로 형성되는 것을 특징으로 하는 인쇄회로기판. A printed circuit board, characterized in that it is formed to a thickness of 1nm ~ 50nm.
  6. 제1항에 있어서, 상기 베이스 기판층은, According to claim 1, wherein the base substrate layer,
    다층 구조를 가지는 것을 특징으로 하는 인쇄회로기판.A printed circuit board, characterized in that it has a multi-layer structure.
  7. 1) 제1, 2 연결 패드가 각각 일면 및 타면의 특정 영역에 패터닝되어 형성되는 베이스 기판층으로 이루어지는 인쇄회로기판을 준비하는 단계;1) preparing a printed circuit board comprising a base substrate layer in which the first and second connection pads are patterned on specific areas of one surface and the other surface, respectively;
    2) 상기 제1, 2 연결 패드의 상면이 개방되도록 상기 베이스 기판층의 일면 및 타면에 각각 제1, 2 솔더레지스트층을 형성하는 단계;2) forming first and second solder resist layers on one surface and the other surface of the base substrate layer, respectively, so that upper surfaces of the first and second connection pads are opened;
    3) 상기 제1, 2 연결 패드의 상면 및 상기 제1, 2 솔더레지스트층의 표면을 포함하는 상기 인쇄회로기판의 양면의 전영역에 원자층 증착 방법으로 절연성 원자층 증착막을 형성하는 단계;를 포함하는 인쇄회로기판 제조방법. 3) forming an insulating atomic layer deposition film on the entire area of both surfaces of the printed circuit board including the upper surfaces of the first and second connection pads and the surfaces of the first and second solder resist layers by an atomic layer deposition method; A printed circuit board manufacturing method comprising.
  8. 제7항에 있어서, 상기 3) 단계는, The method of claim 7, wherein step 3) comprises:
    다수장의 인쇄회로기판을 평행하게 배치한 상태에서 원자층 증착 장치 내에 로딩하여 동시에 상기 절연성 원자층 증착막을 증착하는 배치형 원자층 증착 장치에 의하여 이루어지는 것을 특징으로 하는 인쇄회로기판 제조방법. A printed circuit board manufacturing method comprising a batch type atomic layer deposition apparatus in which a plurality of printed circuit boards are placed in parallel and loaded into an atomic layer deposition apparatus to simultaneously deposit the insulating atomic layer deposition film.
  9. 제7항에 있어서, 상기 3) 단계에서는, The method of claim 7, wherein in step 3),
    상기 절연성 원자층 증착막을 1nm ~ 50nm 의 두께로 형성하는 것을 특징으로 하는 인쇄회로기판 제조방법.A method for manufacturing a printed circuit board, characterized in that the insulating atomic layer deposition film is formed to a thickness of 1 nm to 50 nm.
  10. 제7항에 있어서, 상기 절연성 원자층 증착막은, The method of claim 7, wherein the insulating atomic layer deposition film,
    Al2O3, ZnO, TiO2, SiO2 중 어느 하나 이상의 물질로 이루어지는 것을 특징으로 하는 인쇄회로기판 제조방법. Al 2 O 3 , ZnO, TiO 2 , SiO 2 Method of manufacturing a printed circuit board, characterized in that consisting of any one or more materials.
  11. 제7항에 있어서, 상기 절연성 원자층 증착막은, The method of claim 7, wherein the insulating atomic layer deposition film,
    Al2O3 로 이루어지는 원자층 증착막과 ZnO로 이루어지는 원자층 증착막을 각각 적어도 한층 이상 포함하는 다수층으로 이루어지는 것을 특징으로 하는 인쇄회로기판 제조방법.A method for manufacturing a printed circuit board, comprising a plurality of layers each comprising at least one layer of an atomic layer deposition film made of Al 2 O 3 and an atomic layer deposition film made of ZnO.
  12. 제7항에 있어서, 상기 3) 단계 수행 후에, The method of claim 7, wherein after performing step 3),
    상기 제1, 2 연결 패드 상면에 와이어 본딩(wire bonding), 솔더링(soldering) 또는 플립칩 범핑(Flip chip bumping) 방법 중 어느 하나 이상의 방법에 의하여 본딩(bonding)을 형성하는 단계가 더 수행되는 것을 특징으로 하는 인쇄회로기판 제조방법. Forming bonding on the upper surface of the first and second connection pads by any one or more methods of wire bonding, soldering, and flip chip bumping is further performed Printed circuit board manufacturing method characterized in that.
  13. 제7항에 있어서, 상기 베이스 기판층은, The method of claim 7, wherein the base substrate layer,
    다층 구조를 가지는 것을 특징으로 하는 인쇄회로기판 제조방법.A method for manufacturing a printed circuit board, characterized in that it has a multilayer structure.
PCT/KR2022/002208 2021-02-15 2022-02-15 Method for manufacturing printed circuit board WO2022173271A1 (en)

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Citations (5)

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JP2002237671A (en) * 2001-02-08 2002-08-23 Alps Electric Co Ltd Electronic circuit unit
JP2005310875A (en) * 2004-04-19 2005-11-04 Matsushita Electric Ind Co Ltd Wiring board, balun using the same, high-frequency equipment using the same, and wiring board manufacturing method
KR20160050261A (en) * 2014-10-29 2016-05-11 주식회사 케이씨텍 Atomic layer deposition apparatus
KR20180133476A (en) * 2016-04-12 2018-12-14 피코순 오와이 Coating with ALD to suppress metal whiskers
KR102032306B1 (en) * 2017-10-19 2019-10-16 (주)심텍 Method of manufacturing printed circuit board

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TWI302426B (en) * 2005-04-28 2008-10-21 Phoenix Prec Technology Corp Conducting bump structure of circuit board and method for fabricating the same

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JP2002237671A (en) * 2001-02-08 2002-08-23 Alps Electric Co Ltd Electronic circuit unit
JP2005310875A (en) * 2004-04-19 2005-11-04 Matsushita Electric Ind Co Ltd Wiring board, balun using the same, high-frequency equipment using the same, and wiring board manufacturing method
KR20160050261A (en) * 2014-10-29 2016-05-11 주식회사 케이씨텍 Atomic layer deposition apparatus
KR20180133476A (en) * 2016-04-12 2018-12-14 피코순 오와이 Coating with ALD to suppress metal whiskers
KR102032306B1 (en) * 2017-10-19 2019-10-16 (주)심텍 Method of manufacturing printed circuit board

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