WO2022166852A1 - 以太网帧定帧方法和装置 - Google Patents

以太网帧定帧方法和装置 Download PDF

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Publication number
WO2022166852A1
WO2022166852A1 PCT/CN2022/074801 CN2022074801W WO2022166852A1 WO 2022166852 A1 WO2022166852 A1 WO 2022166852A1 CN 2022074801 W CN2022074801 W CN 2022074801W WO 2022166852 A1 WO2022166852 A1 WO 2022166852A1
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Prior art keywords
frame
receiving end
normal
locked
frames
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PCT/CN2022/074801
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English (en)
French (fr)
Inventor
杨剑
陈捷
刘峰
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中兴通讯股份有限公司
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Priority to US18/276,383 priority Critical patent/US20240223676A1/en
Publication of WO2022166852A1 publication Critical patent/WO2022166852A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/03—Protocol definition or specification 
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
    • H04L1/0008—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length by supplementing frame payload, e.g. with padding bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Definitions

  • Embodiments of the present invention relate to the field of communications, and in particular, to a method and device for framing an Ethernet frame.
  • Fg-BU Fine granularity-basic unit
  • the fine-grained basic unit uses the 64B/66B encoding type of IEEE 802.3 Clause 82.
  • the Fg-BU frame has a fixed length, including the start (S) code block, h (h is an integer greater than or equal to 1) data (D) code blocks and the end (T) code block.
  • the total length is h+2 64B /66B code block.
  • the start (S) code block format is shown in Figure 1
  • the data (D) code block is shown in Figure 2
  • the end (T) code block is shown in Figure 3, where the block type value in Figure 3 can be 0x87, 0x99, 0xAA, 0xB4, 0xCC, 0xD2, 0xE1 or 0xFF
  • the format of the Fg-BU frame is shown in Figure 5.
  • the end code block is T7 as an example
  • the T7 code block format As shown in FIG. 4, FIG. 6 is a schematic diagram of the Fg-BU frame overhead format.
  • 195 data blocks and end (T7) blocks provide 195 ⁇ 8+7 bytes of content with a total length of 1567 bytes.
  • Each Fg-BU contains 7 bytes of overhead and 1560 bytes of payload.
  • the specific format definition of the 7-byte overhead is shown in Figure 6.
  • MFI Multiple frame indication
  • CRC 7-bit length, calculated and generated from the first 41 bits (including the field after the Flag, excluding the initial 2-bit reserved bits and 6-bit MFI).
  • one Fg-BU contains 24 sub-slots (Sub-Slot), each sub-slot (Sub-Slot) is 65 bytes, and can carry 8 65bit code blocks (64B/66B code blocks are compressed into 65bit code block), each sub-slot (Sub-Slot) can be independently divided for use by a client.
  • Each sub-slot (Sub-Slot) bandwidth is 10Mbps.
  • Each sub-slot carries 8 64B/66B code blocks from customer services, and the unused time slots that are not allocated to services are filled with 8 Error code blocks.
  • the specific format of the 56-bit overhead of each Fg-BU frame is shown in Figure 6, including multi-frame indication (MFI), overhead channel usage indication (Flag), time slot increase adjustment announcement (S bit), time slot effective indication (C bit), slot adjustment request (CR bit), slot adjustment response (CA bit), GCC channel, client ID, sub-slot ID, CRC.
  • MFI multi-frame indication
  • Flag overhead channel usage indication
  • S bit time slot increase adjustment announcement
  • C bit time slot effective indication
  • C bit slot adjustment request
  • CA bit slot adjustment response
  • GCC channel client ID, sub-slot ID, CRC.
  • the GCC channel shares the bit position with the client ID and sub-slot ID.
  • the Flag value is 11
  • the Flag value it means that the corresponding bit position after CA in Figure 6 is used by the GCC channel.
  • the Flag value is 00, it means that the corresponding bit position is the client ID. , sub-slot ID use.
  • Embodiments of the present invention provide a method and device for framing an Ethernet frame, so as to at least solve the problem in the related art of how the receiving end determines whether the Fg-BU frame is locked or unlocked.
  • a method for framing an Ethernet frame including: a receiving end receives a data stream having a fine-grained basic unit Fg-BU; Whether the frame is normal or not determines whether the Fg-BU frame is locked or lost.
  • the receiving end determines that the Fg-BU frame is locked according to whether the Fg-BU frames in the data stream are normal, including: if the receiving end receives N consecutive normal Fg-BU frames , then it is judged that the Fg-BU frame is locked, where N is an integer greater than or equal to 1.
  • the Fg-BU frame is normal when the Fg-BU frame satisfies one or more of the following conditions: the start code block of the Fg-BU frame is normal; the Fg-BU frame is normal; - The CRC check in the overhead of the BU frame is correct; the end code block of the Fg-BU frame is normal; the a data code blocks of the Fg-BU frame are normal, where a is an integer greater than or equal to 0; the Fg - The length of the BU frame is the set number of code blocks.
  • the receiving end determines that the Fg-BU frame is out of lock according to whether the Fg-BU frames in the data stream are normal, including: if the receiving end receives M consecutive abnormal Fg-BU frames BU frame, it is judged that the Fg-BU frame is out of lock, wherein M is an integer greater than or equal to 1.
  • the Fg-BU frame is abnormal when the Fg-BU frame satisfies one or more of the following conditions: the start code block of the Fg-BU frame is abnormal; The end code block of the Fg-BU frame is abnormal; the CRC check in the overhead of the Fg-BU frame is incorrect; the b data code blocks of the Fg-BU frame are abnormal, where b is greater than or equal to 0 Integer; the length of the Fg-BU frame is not the set number of code blocks.
  • the method further includes: the receiving end extracts the Fg-BU frame for processing.
  • the method further includes: the receiving end reports alarm information of the loss of the Fg-BU frame.
  • the method further includes: the receiving end determines whether the Fg-BU multi-frame is locked or lost according to the MFI value indicated by the multi-frame.
  • the receiving end judging Fg-BU multiframe locking according to the MFI value indicated by the multiframe includes: if MFI values of X consecutive Fg-BU frames received by the receiving end are normal, judging Fg - BU multiframe locking, where X is an integer greater than or equal to 1.
  • the receiving end judging the loss of Fg-BU multiframe lock according to the MFI value indicated by the multiframe includes: if the MFI values of Y consecutive Fg-BU frames received by the receiving end are abnormal, then It is judged that the Fg-BU multiframe is out of lock, where Y is an integer greater than or equal to 1.
  • the method further includes: the receiving end extracts the Fg-BU multiframe for processing.
  • the method further includes: the receiving end reports alarm information of the multi-frame out of lock.
  • an Ethernet frame framing device which is applied to a receiving end.
  • the device includes: a receiving module configured to receive a data stream with a fine-grained basic unit Fg-BU; a first judgment The module is configured to judge whether the Fg-BU frame is locked or lost according to whether the Fg-BU frame in the data stream is normal.
  • the first judging module includes: a first judging unit, configured to judge that the Fg-BU frame is locked when N consecutive normal Fg-BU frames are received, where N is an integer greater than or equal to 1.
  • the first judging module includes: a second judging unit, configured to judge that the Fg-BU frame is out of lock when M consecutive abnormal Fg-BU frames are received, where M is an integer greater than or equal to 1.
  • the apparatus further includes: a second judging module, configured to judge whether the multiframe is locked or lost according to the MFI value indicated by the multiframe when the Fg-BU frame is locked.
  • the second judging module includes: a third judging unit, configured to judge the multi-frame lock when the MFI values of the received consecutive X frames are normal, where X is greater than or An integer equal to 1.
  • the second judging module includes: a fourth judging unit, configured to judge that the multi-frame is out of lock when the MFI value of the received consecutive Y frames is abnormal, where Y is greater than or An integer equal to 1.
  • a computer-readable storage medium where a computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute any one of the above methods when running steps in the examples.
  • an electronic device comprising a memory and a processor, wherein the memory stores a computer program, the processor is configured to run the computer program to execute any of the above Steps in Method Examples.
  • the receiving end determines whether the Fg-BU frame is locked or unlocked according to whether the received Fg-BU frame is normal, thereby realizing the determination of the locked or unlocked Fg-BU frame.
  • S start
  • FIG. 2 is a schematic diagram of a data (D) code block format according to the related art
  • T termination
  • FIG. 4 is a schematic diagram of the end (T7) code block format according to the related art
  • FIG. 5 is a schematic diagram of the Fg-BU frame format according to the related art.
  • FIG. 6 is a schematic diagram of the Fg-BU frame overhead format according to the related art.
  • FIG. 7 is a schematic structural diagram of a computer terminal according to an embodiment of the present invention.
  • FIG. 8 is a flowchart of a method for framing an Ethernet frame according to an embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of an apparatus for framing an Ethernet frame according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of an apparatus for framing an Ethernet frame according to another embodiment of the present invention.
  • FIG. 11 is a schematic flowchart of a method for judging Fg-BU frame lock and lock loss according to Embodiment 1 of the present invention.
  • FIG. 12 is a schematic flowchart of a method for judging Fg-BU frame lock and lock loss according to Embodiment 2 of the present invention.
  • FIG. 13 is a schematic flowchart of a method for judging Fg-BU frame lock and lock loss according to Embodiment 3 of the present invention.
  • FIG. 14 is a schematic flowchart of a method for judging Fg-BU multiframe locking and loss of lock according to Embodiment 4 of the present invention.
  • FIG. 15 is a schematic flowchart of a method for judging lock and loss of lock of an Fg-BU frame according to Embodiment 5 of the present invention.
  • FIG. 7 is a hardware structural block diagram of a computer terminal according to an embodiment of the present invention.
  • the computer terminal may include one or more (only one is shown in FIG. 7 ) processor 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned computer terminal may also include a transmission device 106 and an input and output device 108 for communication functions.
  • processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA
  • a memory 104 for storing data
  • the above-mentioned computer terminal may also include a transmission device 106 and an input and output device 108 for communication functions.
  • FIG. 7 is only for illustration, and does not limit the structure of the above-mentioned computer terminal.
  • the computer terminal may also include more or fewer components than shown in FIG. 7 , or have a different configuration than that shown in FIG. 7 .
  • the memory 104 may be configured to store computer programs, for example, software programs and modules of application software, such as a computer program corresponding to the Ethernet frame framing method in the embodiment of the present invention, the processor 102 runs the computer program stored in the memory 104 by running the computer program. , so as to perform various functional applications and data processing, that is, to implement the above method.
  • Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • memory 104 may further include memory located remotely from processor 102, which may be connected to a computer terminal through a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • Transmission means 106 are arranged to receive or transmit data via a network.
  • the specific example of the above-mentioned network may include a wireless network provided by the communication provider of the computer terminal.
  • the transmission device 106 includes a network adapter (Network Interface Controller, NIC for short), which can be connected to other network devices through a base station so as to communicate with the Internet.
  • the transmission device 106 may be a radio frequency (Radio Frequency, RF for short) module, which is used to communicate with the Internet in a wireless manner.
  • RF Radio Frequency
  • FIG. 8 is a flowchart of a method for framing an Ethernet frame according to an embodiment of the present invention. As shown in FIG. 8 , the process It includes the following steps:
  • Step S802 the receiving end receives the data stream with the fine-grained basic unit Fg-BU;
  • Step S804 the receiving end determines whether the Fg-BU frame is locked or lost according to whether the Fg-BU frame in the data stream is normal.
  • Fg-BU fine-grained basic unit
  • Method 1 The receiving end receives consecutive N (N is an integer greater than or equal to 1) normal Fg-BU frames. To judge that the Fg-BU frame is normal, the following two conditions must be met at the same time:
  • the start (S) block is normal, that is, the 2-bit sync header (sync header) of the S block and/or the 8-bit block type (block type) value is normal.
  • the S block synchronization header and the block type value are shown in FIG. 1 .
  • each frame is h+2 (h is an integer greater than or equal to 1) blocks, including a start (S) block, h data (D) blocks and an end (T) block. That is, it is equivalent to checking a data (D) block synchronization header (a is an integer less than or equal to h and greater than or equal to zero), and the synchronization header and/or block type of the end (T) block are normal.
  • the data (D) block sync header is as shown in FIG. 2 .
  • the end (T) block sync header and type value are shown in Figure 3.
  • Method 2 The receiving end receives consecutive N (N is an integer greater than or equal to 1) normal Fg-BU frames, and the following conditions must be met to judge that the Fg-BU frames are normal:
  • the start (S) block is normal, that is, the 2-bit sync header (sync header) of the S block and/or the 8-bit block type (block type) value is normal.
  • the S-block sync header and the block type value are as shown in Figure 1 Show.
  • the CRC check in the overhead of the Fg-BU frame is correct, and the format of the overhead of the Fg-BU frame is shown in Figure 6.
  • the end (T) block is normal, that is, the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value of the T block is normal.
  • Method 3 The receiving end receives consecutive N (N is an integer greater than or equal to 1) normal Fg-BU frames. To judge that the Fg-BU frames are normal, the following two conditions must be met at the same time:
  • the start (S) block is normal, that is, the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value of the S block is normal, and the S-block sync header and block type values are shown in Figure 1.
  • the CRC check in the Fg-BU frame overhead is correct, wherein the Fg-BU overhead format is shown in Figure 6.
  • the data block does not check whether its synchronization header is a data block, but only checks whether its length is p multiplied by 66 bits. For r data blocks, it must check whether its synchronization header is a data block), and the end (T) block.
  • Sync header and/or block type are OK. In this example.
  • the end (T) block sync header and type value are shown in Figure 3.
  • U Fg-BU frames are normal: U start (S) blocks are normal, that is, the 2-bit sync header (sync header) of the S block and/or the 8-bit block type (block type) value is normal, and the S block sync header and block Type values are shown in Figure 1.
  • V Fg-BU frames are normal: the CRC check in the overhead of the V Fg-BU frames is correct, and the format of the Fg-BU overhead is shown in Figure 6 .
  • each Fg-BU frame is h+2 (h is an integer greater than or equal to 1) blocks, including a start (S) block, h data (D) blocks and an end (T) block. That is, it is equivalent to check that a (a is an integer less than or equal to h and greater than or equal to zero) data (D) block synchronization headers, and the synchronization header and/or block type of the end (T) block are normal.
  • the data (D) block sync header is as shown in FIG. 2 .
  • the end (T) block sync header and type value are shown in Figure 3.
  • the method may further include: the receiving end extracts the Fg-BU frame for processing.
  • the following method can be used to determine the frame loss:
  • Method 1 M consecutive (M is an integer greater than or equal to 1) Fg-BU frames are abnormal, including: the S block is abnormal, that is, the 2-bit sync header of the S block is incorrect and/or the 8-bit block The block type value is incorrect; or the Fg-BU length is not h+2 blocks. That is, it is equivalent to checking that b (b is an integer greater than or equal to zero and less than or equal to h) D block synchronization headers, and that any of the synchronization headers of T blocks and the T block type is incorrect.
  • Method 2 Consecutive M (M is an integer greater than or equal to 1) Fg-BU frames are abnormal, including: the S block is abnormal, that is, the 2-bit sync header of the S block is incorrect and/or the 8-bit block The type (block type) value is incorrect; or the CRC check in the Fg-BU frame overhead is incorrect, and the Fg-BU overhead format is shown in Figure 6; or the Fg-BU length is not h+2 blocks. That is, it is equivalent to checking that b (b is an integer greater than or equal to zero and less than or equal to h) D block synchronization headers, and that any of the synchronization headers of T blocks and the T block type is incorrect.
  • Method 3 Consecutive M (M is an integer greater than or equal to 1) Fg-BU frames are abnormal, including: E (E is an integer greater than or equal to 0 and less than M) S blocks are abnormal, that is, 2 bits of the S block Incorrect sync header and/or incorrect 8-bit block type value; or CRC check in F (F is an integer greater than or equal to 0 and less than M) Fg-BU frame overhead Incorrect, the Fg-BU overhead format is shown in Figure 6; or G (G is an integer greater than or equal to 0 and less than M) Fg-BU frame length is not h+2 (h is an integer greater than or equal to 1) blocks, which is equivalent to checking b (b is an integer less than or equal to h and greater than or equal to zero) data blocks (do not check whether the synchronization header is a data block, only check whether the block length is b*66bit), and Either the sync header of the T block or the T block type is incorrect.
  • E+F+G M, where M
  • the receiving end may further include: the receiving end reports alarm information of the loss of the Fg-BU frame.
  • the receiving end may further include: judging whether the multi-frame is locked or lost according to the MFI value indicated by the multi-frame. That is, on the premise that the frame has been fixed, the MFI (6bit) is further checked.
  • the MFI value of consecutive X frames (X is an integer greater than or equal to 1) is normal, that is, the MFI value increases sequentially and conforms to the definition of the MFI value range (such as 0-19, or other predefined ranges), it is judged as multi-frame locking ;
  • the MFI value of consecutive Y frames is abnormal, that is, the MFI value does not increase sequentially, or does not meet the definition of the MFI value range, then it is judged that the multi-frame is out of lock.
  • the receiving end may further include: the receiving end reports alarm information of the multi-frame out of lock.
  • an Ethernet frame framing device is also provided, and the device is used to implement the above-mentioned embodiments and preferred implementations, and what has been described will not be repeated.
  • the term “module” or “unit” may be a combination of software and/or hardware that implements a predetermined function.
  • the apparatus described in the following embodiments is preferably implemented in software, implementations in hardware, or a combination of software and hardware, are also possible and contemplated.
  • FIG. 9 is a structural block diagram of an apparatus for framing an Ethernet frame according to an embodiment of the present invention. As shown in FIG. 9 , the apparatus for framing an Ethernet frame is applied to a receiving end, and the apparatus includes a receiving module 10 and a first judging module 20 .
  • the receiving module 10 is configured to receive the data stream with the fine-grained basic unit Fg-BU.
  • the first judging module 20 is configured to judge whether the Fg-BU frame is locked or lost according to whether the Fg-BU frame in the data stream is normal.
  • FIG. 10 is a structural block diagram of an apparatus for framing an Ethernet frame according to another embodiment of the present invention. As shown in FIG. 10 , the apparatus further includes a second judgment module 30 in addition to all the modules shown in FIG. 9 .
  • the second judging module 30 is configured to judge whether the multi-frame is locked or lost according to the MFI value indicated by the multi-frame when the Fg-BU frame is locked.
  • the first judging module 20 further includes a first judging unit 21 and a second judging unit 22 .
  • the first judging unit 21 is configured to judge that the Fg-BU frames are locked when N consecutive normal Fg-BU frames are received, where N is an integer greater than or equal to 1.
  • the second judging unit 22 is configured to judge that the Fg-BU frames are out of lock when M consecutive abnormal Fg-BU frames are received, where M is an integer greater than or equal to 1.
  • the second judging module 30 may further include a third judging unit 31 and a fourth judging unit 32 .
  • the third judging unit 31 is configured to judge the multi-frame locking when the MFI values of the received consecutive X frames are normal, where X is an integer greater than or equal to 1.
  • the fourth judging unit 32 is configured to judge that the multi-frame is out of lock when the MFI values of the received consecutive Y frames are abnormal, wherein Y is an integer greater than or equal to 1.
  • the above modules can be implemented by software or hardware, and the latter can be implemented in the following ways, but not limited to this: the above modules are all located in the same processor; or, the above modules can be combined in any combination The forms are located in different processors.
  • This embodiment provides a fine-grained basic unit (Fg-BU) frame lock and lock loss judgment method. As shown in Figure 11, it mainly includes the following steps:
  • Step S1101 In an Ethernet or an Ethernet technology-based Metro Transport Network (MTN) and a Slicing packet network (SPN), the sender sends a data flow.
  • MTN Metro Transport Network
  • SPN Slicing packet network
  • Step S1102 After receiving the data stream, the receiving end determines whether the Fg-BU frame is locked or lost.
  • N is an integer greater than or equal to 1
  • the judgment of the normal Fg-BU frame meets the following two conditions at the same time.
  • the S block is normal, including the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value is normal, the S block sync header and block type value, as shown in Figure 1.
  • each frame is h+2 (h is an integer greater than or equal to 1) blocks. That is to say, it is equivalent to checking the synchronization headers of h D blocks, and the synchronization headers and block types of T blocks are normal.
  • the D block sync header is shown in Figure 2.
  • the T-block sync header and type value are shown in Figure 3.
  • Fg-BU frames are abnormal, including: the S block is abnormal, that is, the 2-bit sync header is incorrect or the 8-bit sync header is incorrect.
  • the block type value is incorrect; or the Fg-BU frame length is not h+2 (h is an integer greater than or equal to 1) blocks, which is equivalent to checking h D block synchronization headers and T blocks If any of the synchronization header and T block type is incorrect, it is judged that the Fg-BU frame is out of lock.
  • Step S1103 After determining that the Fg-BU frame is locked, the receiving end extracts the Fg-BU frame for processing.
  • Step S1104 After the receiving end judges that the Fg-BU is out of lock, it reports a corresponding alarm.
  • This embodiment provides a fine-grained basic unit (Fg-BU) frame lock and lock loss judgment method. As shown in Figure 12, it mainly includes the following steps:
  • Step S1201 In an Ethernet or an Ethernet technology-based Metro Transport Network (MTN) and a Slicing packet network (SPN), the sender sends a data flow.
  • MTN Metro Transport Network
  • SPN Slicing packet network
  • Step S1202 After receiving the data stream, the receiving end determines whether the Fg-BU frame is locked or lost.
  • N is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1
  • the S block is normal, including the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value is normal, the S block sync header and block type value, as shown in Figure 1.
  • each frame is h+2 (h is an integer greater than or equal to 1) blocks. That is, it is equivalent to verifying that there are h 64B/66B blocks after the S block (whether the synchronization header is a data block is not verified), and that the synchronization header and/or block type of the T block are normal.
  • the T-block sync header and type value are shown in Figure 3.
  • Fg-BU frames are abnormal, including: the S block is abnormal, that is, the 2-bit sync header (sync header) is incorrect and/ Or the 8-bit block type value is incorrect; or the Fg-BU length is not h+2 blocks, which is equivalent to checking that there are h 64B/66B blocks after the S block (do not check whether the synchronization header is data block), or the synchronization header or type value of the T block is incorrect, it is judged that the Fg-BU frame is out of lock.
  • Step S1203 After determining that the Fg-BU frame is locked, the receiving end extracts the Fg-BU frame for processing.
  • Step S1204 After the receiving end judges that the Fg-BU is out of lock, it reports a corresponding alarm.
  • a fine-grained basic unit (Fg-BU) lock and lock loss judgment method is provided. As shown in Figure 13, it mainly includes the following steps:
  • Step S1301 the receiving end receives the Fg-BU frame
  • Step S1302 if N consecutive Fg-BU frames are normal, it is determined that the Fg-BU frame is locked. Among them, the normal judgment of the Fg-BU frame meets the following two conditions:
  • S block is normal, including the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value is normal (S block sync header and block type value, as shown in Figure 1), or Fg-BU frame
  • S block sync header and block type value as shown in Figure 1
  • Fg-BU frame Fg-BU frame
  • each frame is h+2 (h is an integer greater than or equal to 1) blocks, which is equivalent to checking a (a is an integer greater than or equal to 0 and less than or equal to h) D block synchronization headers, and T
  • the sync header and block type of the block are normal.
  • the D block sync header is shown in Figure 2.
  • the T-block sync header and type value are shown in Figure 3.
  • Step S1303 after the receiving end determines that the Fg-BU frame is locked, it extracts the Fg-BU frame for processing.
  • Step S1304 if the receiving end receives consecutive M (M is an integer greater than or equal to 1) Fg-BU frames are abnormal, including abnormal S blocks, that is, the 2-bit synchronization header (sync header) is incorrect, or the 8-bit block type (block type) value is incorrect; or the CRC check in the Fg-BU frame overhead (as shown in Figure 6) is incorrect; or the Fg-BU length is not h+2 blocks (equivalent to checking b D blocks Synchronization header, b is an integer greater than or equal to 0 and less than or equal to h, and either the synchronization header of the T block or the T block type is incorrect), then it is judged that the Fg-BU frame is out of lock.
  • M is an integer greater than or equal to 1
  • Fg-BU frames are abnormal, including abnormal S blocks, that is, the 2-bit synchronization header (sync header) is incorrect, or the 8-bit block type (block type) value is incorrect; or the CRC check in the Fg
  • Step S1305 after the receiving end judges that the Fg-BU is out of lock, it reports a corresponding alarm.
  • This embodiment provides a fine-grained basic unit (Fg-BU) multiframe lock and lock loss judgment method. As shown in Figure 14, it mainly includes the following steps:
  • Step 1401 in the Ethernet or the MTN or SPN network based on the Ethernet technology, the sender sends a data stream with a fine-grained basic unit (Fg-BU).
  • Fg-BU fine-grained basic unit
  • Step S1402 After receiving the data stream, the receiving end determines that the Fg-BU frame is locked, and further determines that the multi-frame is locked or lost.
  • the receiving end receives consecutive X frames (X is an integer greater than or equal to 1) with a normal MFI value, that is, the MFI value increases sequentially and meets the definition of the MFI value range, it is determined that the multi-frame is locked.
  • Step S1403 after determining that the Fg-BU multiframe is locked, the receiving end extracts the Fg-BU multiframe for processing.
  • the receiving end receives consecutive Y frames with an abnormal MFI value, that is, the MFI value is not sequentially incremented, or does not meet the definition of the MFI value range, it is determined that the multi-frame is out of lock.
  • Step S1404 after determining that the Fg-BU multiframe is out of lock, the receiving end reports a multi-frame out-of-lock alarm.
  • a fine-grained basic unit (Fg-BU) lock and lock loss judgment method is provided. As shown in Figure 15, it mainly includes the following steps:
  • Step S1501 the receiving end receives the Fg-BU frame
  • Step S1502 if N consecutive Fg-BU frames are normal, it is determined that the Fg-BU frame is locked. Among them, the normal judgment of the Fg-BU frame meets the following conditions:
  • the start (S) block is normal, that is, the 2-bit sync header (sync header) of the S block and/or the 8-bit block type (block type) value is normal.
  • the S-block sync header and the block type value are as shown in Figure 1 Show.
  • the CRC check in the overhead of the Fg-BU frame is correct, and the format of the overhead of the Fg-BU frame is shown in Figure 6.
  • the end (T) block is normal, that is, the 2-bit sync header (sync header) and/or the 8-bit block type (block type) value of the T block is normal, and the T block format is shown in Figure 3.
  • Step S1503 after the receiving end determines that the Fg-BU frame is locked, it extracts the Fg-BU frame for processing.
  • Step S1504 if the receiving end receives consecutive M (M is an integer greater than or equal to 1) Fg-BU frames are abnormal, including abnormal S blocks, that is, the 2-bit sync header (sync header) is incorrect, or the 8-bit block type (block type) value is incorrect; or the CRC check in the Fg-BU frame overhead (as shown in Figure 6) is incorrect; or either the synchronization header of the T block or any block in the T block type is incorrect), then judge Fg - BU frame lost lock.
  • M is an integer greater than or equal to 1
  • Fg-BU frames are abnormal, including abnormal S blocks, that is, the 2-bit sync header (sync header) is incorrect, or the 8-bit block type (block type) value is incorrect; or the CRC check in the Fg-BU frame overhead (as shown in Figure 6) is incorrect; or either the synchronization header of the T block or any block in the T block type is incorrect
  • Step S1505 after the receiving end judges that the Fg-BU is out of lock, it reports a corresponding alarm.
  • An embodiment of the present invention also provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.
  • the computer-readable storage medium may include, but is not limited to, a USB flash drive, a read-only memory (Read-Only Memory, referred to as ROM for short), and a random access memory (Random Access Memory, referred to as RAM for short) , mobile hard disk, magnetic disk or CD-ROM and other media that can store computer programs.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • An embodiment of the present invention also provides an electronic device, comprising a memory and a processor, where a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above method embodiments.
  • the above-mentioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the above-mentioned processor, and the input-output device is connected to the above-mentioned processor.
  • modules or steps of the present invention can be implemented by a general-purpose computing device, and they can be centralized on a single computing device or distributed in a network composed of multiple computing devices
  • they can be implemented in program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, in a different order than shown here.
  • the described steps, or they are respectively made into individual integrated circuit modules, or a plurality of modules or steps in them are made into a single integrated circuit module to realize.
  • the present invention is not limited to any particular combination of hardware and software.

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Abstract

本发明实施例提供了一种以太网帧定帧方法和装置，该方法包括：接收端接收具有细粒度基本单元Fg－BU的数据流；所述接收端根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。在本发明中，接收端可根据接收到的Fg－BU帧是否正常，实现了对Fg－BU帧的锁定或失锁的判断。

Description

以太网帧定帧方法和装置 技术领域
本发明实施例涉及通信领域，具体而言，涉及一种以太网帧定帧方法及装置。
背景技术
在现有以太网技术中，为了解决不同粒度业务灵活接入承载网中，在以太网物理编码子层(Physical Coding Sublayer，PCS)层定义了一种细粒度基本单元(Fine granularity－basic unit，Fg－BU)，以承载小颗粒的业务。
细粒度基本单元(Fg－BU)采用IEEE 802.3 Clause 82章的64B/66B编码类型。Fg－BU帧具有固定长度，含开始(S)码块、h(h为大于或等于1的整数)个数据(D)码块和结束(T)码块的总长度为h+2个64B/66B码块。开始(S)码块格式如图1所示，数据(D)码块如图2所示，结束(T)码块如图3所示，其中，图3中的块类型值可以为0x87、0x99、0xAA、0xB4、0xCC、0xD2、0xE1或0xFF，Fg－BU帧的格式如图5所示，在图5中，以h＝195为例，结束码块以T7为例，T7码块格式如图4所示，附图6为Fg－BU帧开销格式示意图。
195个数据码块和结束(T7)码块提供了195×8+7字节，总长度为1567字节的内容。每个Fg－BU，包含了7字节的开销和1560字节的净荷。7字节的开销具体格式定义如图6所示。其中：复帧指示(Multiple frame indication，MFI)为6个比特长度，用于指示复帧每个基本单元的编号，对于复帧中第一个基本单元，MFI为0，之后的基本单元MFI数值依次加1。对于5G通道，MFI取值范围为0－19；CRC：7个比特长度，由前41比特(含Flag之后字段，不含起始的2比特预留位及6比特MFI)计算生成。
对于5Gbps传输带宽，一个Fg－BU包含24个子时隙(Sub－Slot)，每个子时隙(Sub－Slot)为65字节，可以承载8个65bit码块(64B/66B码块经过压缩成为65bit码块)，每个子时隙(Sub－Slot)可以独立划分给一个客户使用。j个Fg－BU帧组成一个复帧，复帧内提供24×20＝480个子时隙(Sub－Slot)，当j等于20时。每个子时隙(Sub－Slot)带宽10Mbps。
每个sub－slot承载来自客户业务的8个64B/66B码块，未分配给业务的未使用时隙填充8个Error码块。24个sub－slot的合计24×8＝192个64B/66B码块经过66bit到65bit的压缩(比如65B第一比特位为0表示数据码块，为1表示控制码块)，填充进净荷时隙中。添加7字节开销后依次填充进fg－BU的D码块和T7码块的净荷中。
每个Fg－BU帧56比特开销的具体格式如图6所示，包括复帧指示(MFI)、开销通道使用指示(Flag)、时隙增大调整通告(S比特位)、时隙生效指示(C比特位)、时隙调整请求(CR比特位)、时隙调整应答(CA比特位)、GCC通道、client ID、sub－slot ID、CRC。其中GCC通道与client ID、sub－slot ID共用比特位置，当Flag值为11时，代表图6中CA之后相应比特位置为GCC通道使用，当Flag值为00时，代表相应比特位置为client ID、sub－slot ID使用。
当Fg－BU帧由发送端发送至接收端后，接收端如何判断锁定和失锁，目前尚未有明确定义。
发明内容
本发明实施例提供了一种以太网帧定帧方法及装置，以至少解决相关技术中接收端如何判断Fg－BU帧的锁定和失锁的问题。
根据本发明的一个实施例，提供了一种以太网帧定帧方法，包括：接收端接收具有细粒度基本单元Fg－BU的数据流；所述接收端根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
在一个示例性实施例中，所述接收端根据所述数据流中的Fg－BU帧是否正常判断Fg－BU帧锁定，包括：如果所述接收端接收到连续N个正常的Fg－BU帧，则判断所述Fg－BU帧锁定，其中N为大于或等于1的整数。
在一个示例性实施例中，当所述Fg－BU帧满足如下条件中的一种或几种时所述Fg－BU帧为正常：所述Fg－BU帧的开始码块正常；所述Fg－BU帧开销中的CRC校验正确；所述Fg－BU帧的结束码块正常；所述Fg－BU帧的a个数据码块正常，其中a为大于或等于0的整数；所述Fg－BU帧的长度为设定的码块数。
在一个示例性实施例中，所述接收端根据所述数据流中的Fg－BU帧是否正常判断Fg－BU帧失锁，包括：如果所述接收端接收到连续M个不正常的Fg－BU帧，则判断所述Fg－BU帧失锁，其中M为大于或等于1的整数。
在一个示例性实施例中，当所述Fg－BU帧满足如下条件中的一种或几种时所述Fg－BU帧为不正常：所述Fg－BU帧的开始码块不正常；所述Fg－BU帧的结束码块不正常；所述Fg－BU帧开销中的CRC校验不正确；所述Fg－BU帧的b个数据码块不正常，其中b为大于或等于0的整数；所述Fg－BU帧的长度不为设定的码块数。
在一个示例性实施例中，所述接收端判断所述Fg－BU帧锁定之后，还包括：所述接收端提取所述Fg－BU帧进行处理。
在一个示例性实施例中，所述接收端判断所述Fg－BU帧失锁之后，还包括：所述接收端报告所述Fg－BU帧失锁的告警信息。
在一个示例性实施例中，所述接收端判断所述Fg－BU帧锁定之后，还包括：所述接收端根据复帧指示MFI值判断Fg－BU复帧锁定或失锁。
在一个示例性实施例中，所述接收端根据复帧指示MFI值判断Fg－BU复帧锁定包括：如果所述接收端接收到的连续X个Fg－BU帧的MFI值正常，则判断Fg－BU复帧锁定，其中X为大于或等于1的整数。
在一个示例性实施例中，所述接收端根据复帧指示MFI值判断Fg－BU复帧失锁包括：如果所述接收端接收到的连续Y个Fg－BU帧的MFI值不正常，则判断Fg－BU复帧失锁，其中Y为大于或等于1的整数。
在一个示例性实施例中，所述接收端判断所述Fg－BU复帧锁定之后，还包括：所述接收端提取所述Fg－BU复帧进行处理。
在一个示例性实施例中，所述接收端判断所述复帧失锁之后，还包括：所述接收端报告所述复帧失锁的告警信息。
根据本发明的另一个实施例，提供了一种以太网帧定帧装置，应用于接收端，该装置包括：接收模块，设置为接收具有细粒度基本单元Fg－BU的数据流；第一判断模块，设置为根 据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
在一个示例性实施例中，所述第一判断模块包括：第一判断单元，设置为在接收到连续N个正常的Fg－BU帧的情况下，判断所述Fg－BU帧锁定，其中N为大于或等于1的整数。
在一个示例性实施例中，所述第一判断模块包括：第二判断单元，设置为在接收到连续M个不正常的Fg－BU帧的情况下，判断所述Fg－BU帧失锁，其中M为大于或等于1的整数。
在一个示例性实施例中，所述装置还包括：第二判断模块，设置为在所述Fg－BU帧锁定的情况下，根据复帧指示MFI值判断复帧锁定或失锁。
在一个示例性实施例中，所述第二判断模块包括：第三判断单元，设置为在接收到的连续X帧的MFI值正常的情况下，判断所述复帧锁定，其中X为大于或等于1的整数。
在一个示例性实施例中，所述第二判断模块包括：第四判断单元，设置为在接收到的连续Y帧的MFI值不正常的情况下，判断复帧失锁，其中Y为大于或等于1的整数。
根据本发明的又一个实施例，还提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
根据本发明的又一个实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
在本发明的上述实施例，接收端根据接收到的Fg－BU帧是否正常，来判断Fg－BU帧的锁定或失锁，从而实现了Fg－BU帧锁定或失锁的判断。
附图说明
图1是根据相关技术的开始(S)码块格式示意图；
图2是根据相关技术的数据(D)码块格式示意图；
图3是根据相关技术的结束(T)码块格式示意图；
图4是根据相关技术的结束(T7)码块格式示意图
图5根据相关技术的Fg－BU帧格式示意图；
图6是根据相关技术的Fg－BU帧开销格式示意图；
图7是根据本发明实施例的计算机终端结构示意图；
图8是根据本发明实施例的以太网帧定帧方法流程图；
图9是根据本发明实施例的以太网帧定帧装置结构示意图；
图10是根据本发明另一实施例的以太网帧定帧装置结构示意图；
图11是根据本发明实施例一的Fg－BU帧锁定及失锁判断方法流程示意图；
图12是根据本发明实施例二的Fg－BU帧锁定及失锁判断方法流程示意图；
图13是根据本发明实施例三的Fg－BU帧锁定及失锁判断方法流程示意图；
图14是根据本发明实施例四的Fg－BU复帧锁定及失锁判断方法流程示意图；
图15是根据本发明实施例五的Fg－BU帧锁定及失锁判断方法流程示意图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明的实施例。
需要说明的是，本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本申请实施例中所提供的方法实施例可以在移动终端、计算机终端或者类似的运算装置中执行。以运行在计算机终端上为例，图7是本发明实施例的一种计算机终端的硬件结构框图。如图7所示，计算机终端可以包括一个或多个(图7中仅示出一个)处理器102(处理器102可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)和用于存储数据的存储器104，其中，上述计算机终端还可以包括用于通信功能的传输设备106以及输入输出设备108。本领域普通技术人员可以理解，图7所示的结构仅为示意，其并不对上述计算机终端的结构造成限定。例如，计算机终端还可包括比图7中所示更多或者更少的组件，或者具有与图7所示不同的配置。
存储器104可设置为存储计算机程序，例如，应用软件的软件程序以及模块，如本发明实施例中的以太网帧定帧方法对应的计算机程序，处理器102通过运行存储在存储器104内的计算机程序，从而执行各种功能应用以及数据处理，即实现上述的方法。存储器104可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中，存储器104可进一步包括相对于处理器102远程设置的存储器，这些远程存储器可以通过网络连接至计算机终端。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输装置106设置为经由一个网络接收或者发送数据。上述的网络具体实例可包括计算机终端的通信供应商提供的无线网络。在一个实例中，传输装置106包括一个网络适配器(Network Interface Controller，简称为NIC)，其可通过基站与其他网络设备相连从而可与互联网进行通讯。在一个实例中，传输装置106可以为射频(Radio Frequency，简称为RF)模块，其用于通过无线方式与互联网进行通讯。
在本实施例中提供了一种可运行于上述计算机终端的以太网帧定帧方法，图8是根据本发明实施例的以太网帧定帧方法的流程图，如图8所示，该流程包括如下步骤：
步骤S802，接收端接收具有细粒度基本单元Fg－BU的数据流；
步骤S804，所述接收端根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
在本实施例中，对于细粒度基本单元(Fg－BU)，判断Fg－BU帧锁定可采用如下四种方法：
方法一：接收端收到连续N(N为大于或等于1的整数)个正常的Fg－BU帧。Fg－BU帧正常的判断，需同时满足以下2个条件：
1)开始(S)块正常，即S块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常。在本实施例中，S块同步头及块类型值如图1所示。
2)每帧长度为h+2(h为大于或等于1的整数)个块，包括一个开始(S)块、h个数据(D)块和一个结束(T)块。即相当于校验a个数据(D)块同步头(a为小于或等于h的且大于或等于零的整数)，以及结束(T)块的同步头和/或块类型均正常。在本实施例中，数据(D)块同步头如图2所示。结束(T)块同步头和类型值如图3所示。
方法二：接收端收到连续N(N为大于或等于1的整数)个正常Fg－BU帧，Fg－BU帧正常的判断，需满足以下条件：
开始(S)块正常，即S块2bit的同步头(sync header)和/或8bit的块类型(block type) 值正常，在本实施例中，S块同步头及块类型值如图1所示。或者Fg－BU帧开销中的CRC校验正确，其中，Fg－BU帧开销格式如图6所示。或者结束(T)块正常，即T块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常。
方法三：接收端收到连续N(N为大于或等于1的整数)个正常Fg－BU帧，Fg－BU帧正常的判断，需同时满足以下2个条件：
1)开始(S)块正常，即S块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，S块同步头及块类型值如图1所示。或者Fg－BU帧开销中的CRC校验正确，其中，Fg－BU开销格式如图6所示。
2)每帧长度为h+2(h为大于或等于1的整数)个块，包括一个开始(S)块、h个数据(D)块和一个结束(T)块。即相当于校验开始块之后的p+r(其中p，r均为为小于或等于h且大于或等零的整数，且p+r＝h)个64B/66B块，(其中对于p个数据块不校验其同步头是否为数据块，仅校验其长度是否为p乘以66bit，对于r个数据块块须校验其同步头是否为数据块)，及结束(T)块的同步头和/或块类型均正常。在本实施例中。结束(T)块同步头和类型值如图3所示。
方法四：接收端收到连续U+V(其中U，V均为大于或等于0的整数，且U+V＝N)个正常Fg－BU帧，Fg－BU帧正常的判断，需同时满足以下3个条件：
1)U个Fg－BU帧正常：U个开始(S)块正常，即S块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，S块同步头及块类型值如图1所示。
2)V个Fg－BU帧正常：V个Fg－BU帧开销中的CRC校验正确，其中，Fg－BU开销格式如图6所示。
3)每个Fg－BU帧长度为h+2(h为大于或等于1的整数)个块，包括一个开始(S)块、h个数据(D)块和一个结束(T)块。即相当于校验a(a为小于或等于h的且大于或等于零的整数)个数据(D)块同步头，及结束(T)块的同步头和/或块类型均正常。在本实施例中，数据(D)块同步头如图2所示。结束(T)块同步头和类型值如图3所示。
在本实施例中，在所述接收端判断所述Fg－BU帧锁定之后，还可以包括：所述接收端提取所述Fg－BU帧进行处理。
在本实施例中，对于细粒度基本单元(Fg－BU)，可采用如下方法判断帧失锁：
方法一：连续M(M为大于或等于1的整数)个Fg－BU帧不正常，包括：S块不正常，即S块的2bit的同步头(sync header)不正确和/或者8bit的块类型(block type)值不正确；或者Fg－BU长度不为h+2个块。即相当于校验b(b为大于或等于零且小于或等于h的整数)个D块同步头，及T块的同步头、T块类型中任一个块不正确。
方法二：连续M(M为大于或等于1的整数)个Fg－BU帧不正常，包括：S块不正常，即S块的2bit的同步头(sync header)不正确和/或者8bit的块类型(block type)值不正确；或者Fg－BU帧开销中的CRC校验不正确，Fg－BU开销格式如图6所示；或者Fg－BU长度不为h+2个块。即相当于校验b(b为大于或等于零且小于或等于h的整数)个D块同步头，及T块的同步头、T块类型中任一个块不正确。
方法三：连续M(M为大于或等于1的整数)个Fg－BU帧不正常，包括：E(E为大于或等于0且小于M的整数)个S块不正常，即S块的2bit的同步头(sync header)不正确和/ 或者8bit的块类型(block type)值不正确；或者F(F为大于或等于0且小于M的整数)个Fg－BU帧开销中的CRC校验不正确，Fg－BU开销格式如图6所示；或者G(G为大于或等于0且小于M的整数)个Fg－BU帧长度不为h+2(h为大于或等于1的整数)个块，即相当于校验b(b为小于或等于h且大于或等于零的整数)个数据块(不校验同步头是否为数据块，仅校验块长度是否为b＊66bit)，及T块的同步头、T块类型中任一个块不正确。其中E+F+G＝M，M为大于或等于1的整数。
在本实施例中，所述接收端判断所述Fg－BU帧失锁之后，还可以包括：所述接收端报告所述Fg－BU帧失锁的告警信息。
在本实施例中，所述接收端判断所述Fg－BU帧锁定之后，还可以包括：根据复帧指示MFI值判断复帧锁定或失锁。也就是在已定帧的前提上，进一步对MFI(6bit)校验。
在本实施例中，对于细粒度基本单元复帧，可采用如下方法判断锁定和失锁：
连续X帧(X为大于或等于1的整数)MFI值正常，即MFI值顺序递增，且符合MFI值范围定义(比如0－19，或者其它预定义的范围)，则判断为为复帧锁定；连续Y帧MFI值不正常，即MFI值未顺序递增，或不符合MFI值范围定义，则判断为复帧失锁。
在本实施例中，所述接收端判断所述复帧失锁之后，还可包括：所述接收端报告所述复帧失锁的告警信息。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
在本实施例中还提供了一种以太网帧定帧装置，该装置用于实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”或“单元”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图9是根据本发明实施例的以太网帧定帧装置的结构框图，如图9所示，该以太网帧定帧装置应用于接收端，该装置包括接收模块10和第一判断模块20。
接收模块10，设置为接收具有细粒度基本单元Fg－BU的数据流。
第一判断模块20，设置为根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
图10是根据本发明另一实施例的以太网帧定帧装置的结构框图，如图10所示，该装置除包括图9所示的所有模块外，还包括第二判断模块30。第二判断模块30设置为在所述Fg－BU帧锁定的情况下，根据复帧指示MFI值判断复帧锁定或失锁。
在本实施例中，所述第一判断模块20还包括第一判断单元21和第二判断单元22。
第一判断单元21，设置为在接收到连续N个正常的Fg－BU帧的情况下，判断所述Fg－BU帧锁定，其中N为大于或等于1的整数。
第二判断单元22，设置为在接收到连续M个不正常的Fg－BU帧的情况下，判断所述Fg－BU帧失锁，其中M为大于或等于1的整数。
在本实施例中，所述第二判断模块30还可包括第三判断单元31和第四判断单元32。
第三判断单元31，设置为在接收到的连续X帧的MFI值正常的情况下，判断所述复帧锁定，其中X为大于或等于1的整数。
第四判断单元32，设置为在接收到的连续Y帧的MFI值不正常的情况下，判断复帧失锁，其中Y为大于或等于1的整数。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
为了便于对本发明实施例所提供的技术方案的理解，下面将结合具体场景的实施例进行描述。
实施例一
本实施例提供了一种细粒度基本单元(Fg－BU)帧锁定及失锁判断方法。如图11所示，主要包括如下步骤：
步骤S1101：在以太网或基于以太网技术的城域传送网(Metro Transport Network，MTN)以及切片分组网(Slicing packet network，SPN)中，发送端发送具有细粒度基本单元(Fg－BU)的数据流。
步骤S1102：接收端收到数据流后判断Fg－BU帧锁定或失锁。
在本实施例中，若接收端收到连续N(N为大于等于1的整数)个正常的Fg－BU帧，则判断Fg－BU帧锁定。Fg－BU帧正常的判断，同时满足以下2个条件。
1)S块正常，包括2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，S块同步头及块类型值，如图1所示。
2)每帧长度为h+2(h为大于或等于1的整数)个块。即相当于校验h个D块同步头，及T块的同步头、块类型正常。D块同步头如图2所示。T块同步头和类型值如图3所示。
在本实施例中，若接收端收到连续M(M为大于等于1的整数)个Fg－BU帧不正常，包括：S块不正常，即2bit的同步头(sync header)不正确或者8bit的块类型(block type)值不正确；或者Fg－BU帧长度不为h+2(h为大于或等于1的整数)个块，即相当于校验h个D块同步头，及T块的同步头、T块类型中任一个块不正确，则判断Fg－BU帧失锁。
步骤S1103：接收端判断Fg－BU帧锁定后，则提取Fg－BU帧进行处理。
步骤S1104：接收端判断Fg－BU失锁后，则报告相应告警。
实施例二
本实施例提供了一种细粒度基本单元(Fg－BU)帧锁定及失锁判断方法。如图12所示，主要包括如下步骤：
步骤S1201：在以太网或基于以太网技术的城域传送网(Metro Transport Network，MTN)以及切片分组网(Slicing packet network，SPN)中，发送端发送具有细粒度基本单元(Fg－BU)的数据流。
步骤S1202：接收端收到数据流后判断Fg－BU帧锁定或失锁。
在本实施例中，若接收端收到连续N(N为大于等于1的整数)个正常的Fg－BU帧，则 判断Fg－BU帧锁定。Fg－BU帧正常的判断，同时满足以下2个条件。
1)S块正常，包括2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，S块同步头及块类型值，如图1所示。
2)每帧长度为h+2(h为大于或等于1的整数)个块。即相当于校验S块之后有h个64B/66B块(不校验同步头是否为数据块)，及T块的同步头和/或块类型正常。T块同步头和类型值如图3所示。
在本实施例中，若接收端收到连续M(M为大于等于1的整数)个Fg－BU帧不正常，包括：S块不正常，即2bit的同步头(sync header)不正确和/或者8bit的块类型(block type)值不正确；或者Fg－BU长度不为h+2个块，即相当于校验S块之后有h个64B/66B块(不校验其同步头是否是数据块)，或者T块的同步头或类型值不正确，则判断Fg－BU帧失锁。
步骤S1203：接收端判断Fg－BU帧锁定后，则提取Fg－BU帧进行处理。
步骤S1204：接收端判断Fg－BU失锁后，则报告相应告警。
实施例三
在本实施例中，提供了一种细粒度基本单元(Fg－BU)锁定及失锁判断方法。如图13所示，主要包括如下步骤：
步骤S1301，接收端收到Fg－BU帧；
步骤S1302，如果连续N个Fg－BU帧都正常，则判断Fg－BU帧锁定。其中，Fg－BU帧正常的判断，同时满足以下2个条件：
1)S块正常，包括2bit的同步头(sync header)和/或8bit的块类型(block type)值正常(S块同步头及块类型值，如图1所示)，或者Fg－BU帧开销中的CRC校验正确(如图6所示)。
2)每帧长度为h+2(h为大于或等于1的整数)个块，相当于校验a(a为大于或等于0且小于或等于h的整数)个D块同步头，及T块的同步头、块类型正常。D块同步头如图2所示。T块同步头和类型值如图3所示。
步骤S1303，接收端判断Fg－BU帧锁定后，则提取Fg－BU帧进行处理。
步骤S1304，若接收端收到连续M(M为大于等于1的整数)个Fg－BU帧不正常，包括S块不正常，即2bit的同步头(sync header)不正确，或者8bit的块类型(block type)值不正确；或者Fg－BU帧开销中的CRC校验(如图6所示)不正确；或者Fg－BU长度不为h+2个块(相当于校验b个D块同步头，b为大于或等于0且小于或等于h的整数，及T块的同步头、T块类型中任一个块不正确)，则判断Fg－BU帧失锁。
步骤S1305，接收端判断Fg－BU失锁后，则报告相应告警。
实施例四
本实施例提供了一种细粒度基本单元(Fg－BU)复帧锁定及失锁判断方法。如图14所示，主要包括如下步骤：
步骤1401，在以太网或基于以太网技术的MTN，SPN网络中，发送端发送具有细粒度基本单元(Fg－BU)的数据流。
步骤S1402：接收端收到数据流后判断Fg－BU帧锁定后，进一步判断其复帧锁定或失锁。
在本实施例中，若接收端收到连续X帧(X大于等于1的整数)MFI值正常，即MFI值顺序递增，且符合MFI值范围定义，则判断为复帧锁定。
步骤S1403，接收端判断Fg－BU复帧锁定后，则提取Fg－BU复帧进行处理。
在本实施例中，若接收端收到连续Y帧MFI值不正常，即MFI值未顺序递增，或不符合MFI值范围定义，则判断为复帧失锁。
步骤S1404，接收端判断Fg－BU复帧失锁后，则报告复帧失锁告警。
实施例五
在本实施例中，提供了一种细粒度基本单元(Fg－BU)锁定及失锁判断方法。如图15所示，主要包括如下步骤：
步骤S1501，接收端收到Fg－BU帧；
步骤S1502，如果连续N个Fg－BU帧都正常，则判断Fg－BU帧锁定。其中，Fg－BU帧正常的判断，满足以下条件：
开始(S)块正常，即S块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，在本实施例中，S块同步头及块类型值如图1所示。或者Fg－BU帧开销中的CRC校验正确，其中，Fg－BU帧开销格式如图6所示。或者结束(T)块正常，即T块2bit的同步头(sync header)和/或8bit的块类型(block type)值正常，T块格式如图3所示。
步骤S1503，接收端判断Fg－BU帧锁定后，则提取Fg－BU帧进行处理。
步骤S1504，若接收端收到连续M(M为大于等于1的整数)个Fg－BU帧不正常，包括S块不正常，即2bit的同步头(sync header)不正确，或者8bit的块类型(block type)值不正确；或者Fg－BU帧开销中的CRC校验(如图6所示)不正确；或者T块的同步头、T块类型中任一个块不正确)，则判断Fg－BU帧失锁。
步骤S1505，接收端判断Fg－BU失锁后，则报告相应告警。
本发明的实施例还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
在一个示例性实施例中，上述计算机可读存储介质可以包括但不限于：U盘、只读存储器(Read－Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存储计算机程序的介质。
本发明的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
在一个示例性实施例中，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路 模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (20)

  1. 一种以太网帧定帧方法，包括：
    接收端接收具有细粒度基本单元Fg－BU的数据流；
    所述接收端根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
  2. 根据权利要求1所述的方法，其中，所述接收端根据所述数据流中的Fg－BU帧是否正常判断Fg－BU帧锁定，包括：
    如果所述接收端接收到连续N个正常的Fg－BU帧，则判断所述Fg－BU帧锁定，其中N为大于或等于1的整数。
  3. 根据权利要求2所述的方法，其中，当所述Fg－BU帧满足如下条件中的一种或几种时所述Fg－BU帧为正常：
    所述Fg－BU帧的开始码块正常；
    所述Fg－BU帧开销中的CRC校验正确；
    所述Fg－BU帧的结束码块正常；
    所述Fg－BU帧的a个数据码块正常，其中a为大于或等于0的整数；
    所述Fg－BU帧的长度为设定的码块数。
  4. 根据权利要求1所述的方法，其中，所述接收端根据所述数据流中的Fg－BU帧是否正常判断Fg－BU帧失锁，包括：
    如果所述接收端接收到连续M个不正常的Fg－BU帧，则判断所述Fg－BU帧失锁，其中M为大于或等于1的整数。
  5. 根据权利要求4所述的方法，其中，当所述Fg－BU帧满足如下条件中的一种或几种时所述Fg－BU帧为不正常：
    所述Fg－BU帧的开始码块不正常；
    所述Fg－BU帧的结束码块不正常；
    所述Fg－BU帧开销中的CRC校验不正确；
    所述Fg－BU帧的b个数据码块不正常，其中b为大于或等于0的整数；
    所述Fg－BU帧的长度不为设定的码块数。
  6. 根据权利要求2所述的方法，其中，所述接收端判断所述Fg－BU帧锁定之后，还包括：
    所述接收端提取所述Fg－BU帧进行处理。
  7. 根据权利要求4所述的方法，其中，所述接收端判断所述Fg－BU帧失锁之后，还包括：
    所述接收端报告所述Fg－BU帧失锁的告警信息。
  8. 根据权利要求2所述的方法，其中，所述接收端判断所述Fg－BU帧锁定之后，还包括：
    所述接收端根据复帧指示MFI值判断Fg－BU复帧锁定或失锁。
  9. 根据权利要求8所述的方法，其中，所述接收端根据复帧指示MFI值判断Fg－BU复帧锁定包括：
    如果所述接收端接收到的连续X个Fg－BU帧的MFI值正常，则判断Fg－BU复帧锁定，其中X为大于或等于1的整数。
  10. 根据权利要求2所述的方法，其中，所述接收端根据复帧指示MFI值判断Fg－BU复帧失锁包括：
    如果所述接收端接收到的连续Y个Fg－BU帧的MFI值不正常，则判断Fg－BU复帧失锁，其中Y为大于或等于1的整数。
  11. 根据权利要求9所述的方法，其中，所述接收端判断所述Fg－BU复帧锁定之后，还包括：
    所述接收端提取所述Fg－BU复帧进行处理。
  12. 根据权利要求10所述的方法，其中，所述接收端判断所述复帧失锁之后，还包括：
    所述接收端报告所述复帧失锁的告警信息。
  13. 一种以太网帧定帧装置，应用于接收端，，包括：
    接收模块，设置为接收具有细粒度基本单元Fg－BU的数据流；
    第一判断模块，设置为根据所述数据流中的Fg－BU帧是否正常判断所述Fg－BU帧锁定或失锁。
  14. 根据权利要求13所述的装置，其中，所述第一判断模块包括：
    第一判断单元，设置为在接收到连续N个正常的Fg－BU帧的情况下，判断所述Fg－BU帧锁定，其中N为大于或等于1的整数。
  15. 根据权利要求13所述的装置，其中，所述第一判断模块包括：
    第二判断单元，设置为在接收到连续M个不正常的Fg－BU帧的情况下，判断所述Fg－BU帧失锁，其中M为大于或等于1的整数。
  16. 根据权利要求13所述的装置，其中，所述装置还包括：
    第二判断模块，设置为在所述Fg－BU帧锁定的情况下，根据复帧指示MFI值判断Fg－BU复帧锁定或失锁。
  17. 根据权利要求16所述的装置，其中，所述第二判断模块包括：
    第三判断单元，设置为在接收到的连续X个Fg－BU帧的MFI值正常的情况下，判断所述Fg－BU复帧锁定，其中X为大于或等于1的整数。
  18. 根据权利要求16所述的方法，其中，所述第二判断模块包括：
    第四判断单元，设置为在接收到的连续Y个Fg－BU帧的MFI值不正常的情况下，判断所述Fg－BU复帧失锁，其中Y为大于或等于1的整数。
  19. 一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被处理器执行时实现所述权利要求1至12任一项中所述的方法的步骤。
  20. 一种电子装置，包括存储器、处理器以及存储在所述存储器上并可在所述处理器上运行的计算机程序，其中，所述处理器执行所述计算机程序时实现所述权利要求1至12任一项中所述的方法的步骤。
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