WO2022166588A1 - 电路板组件及电子设备 - Google Patents

电路板组件及电子设备 Download PDF

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Publication number
WO2022166588A1
WO2022166588A1 PCT/CN2022/072798 CN2022072798W WO2022166588A1 WO 2022166588 A1 WO2022166588 A1 WO 2022166588A1 CN 2022072798 W CN2022072798 W CN 2022072798W WO 2022166588 A1 WO2022166588 A1 WO 2022166588A1
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Prior art keywords
circuit board
pads
pins
electronic device
board assembly
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PCT/CN2022/072798
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English (en)
French (fr)
Inventor
何彪胜
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芯海科技（深圳）股份有限公司
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Publication of WO2022166588A1 publication Critical patent/WO2022166588A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details

Definitions

  • the utility model relates to the technical field of integrated circuits, in particular to a circuit board assembly and an electronic device.
  • Circuit boards are widely used in the technical field of electronic products.
  • various small signal circuits are widely used, especially signal acquisition circuits for various electronic equipment, such as pressure electronic equipment, thermopile electronic equipment for infrared temperature measurement, etc.
  • small signal circuits often encounter the problem of signal leakage.
  • the main problem is that the flux is conductive after being wetted, and it is easy to leak current between the two pins of the component.
  • the commonly used method is to use board washing water to clean, then dry, and then apply moisture-proof paint for protection.
  • There is a standard that is difficult to measure whether it is cleaned with board washing water.
  • the production line is often difficult to control, and it is impossible to avoid leakage and incomplete cleaning. situation, and it is difficult to pick out in the subsequent environment, there is a great risk.
  • the present application provides a circuit board assembly and an electronic device to improve the above problems.
  • an embodiment of the present application provides a circuit board assembly, including a circuit board, an electronic device and/or a signal line, a plurality of pads and at least one isolation groove are formed on the circuit board, and the electronic device includes at least two pins , each pin is respectively welded to a pad; the signal line includes at least two wires, and each wire is respectively welded to a pad; wherein, an isolation groove is arranged between the at least two pads to electrically isolate the At least two pins of an electronic device and/or at least two wires of a signal line to which two pads are connected.
  • an embodiment of the present application further provides an electronic device, including the above circuit board assembly.
  • an isolation groove is provided on the circuit board, and when the solder paste flux is brushed and soldered, the generated flux can be directly dropped into the isolation groove, or from the isolation groove, so as to avoid the direct accumulation of the flux.
  • the surface of the circuit board so as to prevent the falling flux from connecting different pins in the electronic device or different wires in the signal line after being wet, effectively avoiding the connection between at least two pins of the electronic device and at least two signal lines. It is directly connected due to leakage, so as to solve the problems of circuit short circuit and signal leakage.
  • FIG. 1 is a schematic structural diagram of a circuit board assembly provided in an embodiment of the present application from a first perspective;
  • FIG. 2 is a schematic structural diagram of a circuit board assembly provided in an embodiment of the present application from a second viewing angle;
  • FIG. 3 is a schematic structural diagram of another circuit board assembly provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of another circuit board assembly provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of still another circuit board assembly according to an embodiment of the present application.
  • the flux is conductive after being wet.
  • the main sources of the flux include the solder paste flux brushed during surface mounting and the flux introduced during manual post-soldering. . Flux is easy to accumulate between two pads. When the flux is wet, it can conduct electricity, which will cause an electrical connection between two pins of an electronic device or two signal lines, resulting in a short circuit.
  • the commonly used method for removing flux is to use board washing water to clean, then dry, and then apply moisture-proof paint for protection. There is a standard that is difficult to measure whether it is cleaned with board washing water.
  • the production line is often difficult to control, and it is impossible to avoid leakage and Incomplete cleaning, and it is difficult to pick out in the follow-up environment, there is a great risk, and the drying time is long, which will affect production efficiency; brushing moisture-proof paint increases costs and affects production efficiency.
  • washing water and moisture-proof paint are both Toxic and harmful to human body.
  • an embodiment of the present application provides a circuit board assembly 100 , including a circuit board 110 , an electronic device 120 and/or a signal line 130 , and at least two pads 111 and at least one isolation groove 112 are formed on the circuit board 110 , the electronic device 120 includes at least two pins 121, and each pin 121 is soldered to a pad 111 respectively; the signal line 130 includes at least two wires 131 and 132, and each wire is soldered to a pad 111 respectively.
  • the isolation groove 112 is provided between the at least two pads 111 to electrically isolate at least two pins and/or at least two of the signal lines 130 of the electronic device connected to the at least two pads 111 . wire.
  • the depth of the isolation groove 112 may be equal to or less than the thickness of the circuit board 110.
  • the opening of the isolation groove 112 is provided on the welding surface of the circuit board 110, and the isolation The groove 112 has a bottom wall, which can receive the falling flux and prevent it from accumulating on the circuit board 110; when the depth of the isolation groove 112 is equal to the thickness of the circuit board 110, the isolation groove 112 penetrates the upper and lower surfaces of the circuit board 110, which can make The flux falls from the isolation trenches 112 and does not accumulate in the isolation trenches 112 or on the surface of the circuit board 110 .
  • the generated flux can be directly dropped into the isolation groove 112 or dropped through the isolation groove 112 when the solder paste flux is brushed and soldered, so as to avoid the soldering flux. It is directly stacked on the surface of the circuit board 110 , thereby preventing the dropped flux from connecting to different pins 121 in the electronic device or different wires in the signal line 130 after being wetted, effectively avoiding at least two pins 121 of the electronic device 120 Alternatively, at least two signal lines 130 on the circuit board 110 are directly connected due to leakage, so as to solve problems such as circuit short circuit and signal leakage.
  • circuit board assembly 100 may only include any one of the electronic device 120 and the signal line 130 , or may include both the electronic device 120 and the signal line 130 .
  • the electronic device 120 is a capacitor, resistor, chip or sensor.
  • the sensing device 210 may be a pressure sensor, a temperature sensor (eg, a thermopile sensor), a distance sensor (eg, an infrared ranging sensor, a laser ranging sensor, an ultrasonic sensor), or other types of sensors.
  • the isolation slot 112 is arranged between two pins of a capacitor, or between two pins of a resistor, or between four pins of a thermopile sensor, or between two rows of pins of a chip, or between multiple pins of the sensor.
  • the isolation groove 112 penetrates the circuit board 110 , that is, the isolation groove 112 penetrates two surfaces in the thickness direction of the circuit board 110 .
  • the generated flux can be directly dropped from the isolation groove 112 to prevent the flux from accumulating on the surface of the circuit board 110.
  • this method greatly improves the production. Efficiency, cost savings, no cleaning standards and other issues, and no introduction of harmful substances to the human body.
  • the electronic device 120 may include a device body 122 , a first pin row 123 and a second pin row 124 , and the first pin row 123 and the second pin row 124 respectively include At least one pin 121, the first pin row 123 and the second pin row 124 can be arranged oppositely on the device body 122, and the circuit board 110 is provided with a first pad group 1111 and a second pad group 1112 arranged oppositely, The first pad group 1111 is used for connecting with the first pin row 123, the second pad group 1112 is used for connecting with the second pin row 124, the isolation groove 112 includes a first isolation groove 1121, and the first isolation groove 1121 is provided. between the first pad group 1111 and the second pad group 1112 .
  • the first pin row 123 and the second pin row 124 may include a plurality of pins 121, respectively, and the device body 122 includes opposite first and second side edges 1221 and 1222, and the first side edge 1221 and the extending direction of the second side edge 1222 may be substantially parallel, wherein the plurality of pins 121 of the first pin row 123 may be arranged side by side along the first side edge 1221; the plurality of pins 121 of the second pin row 124 may be Arranged side by side along the second side edge 1222 .
  • the first pad group 1111 and the second pad group 1112 include at least one pad 111 respectively.
  • the first pad group 1111 and the second pad group 1112 may each include a plurality of pads 111 .
  • the plurality of pads 111 of the first pad group 1111 can be arranged side by side in a direction parallel to the first side edge 1221, and are arranged in a one-to-one correspondence with the plurality of pins 121 of the first pin row 123.
  • Each pad 111 in the disk group 1111 is used for electrical connection with one pin 121 in the first pin row 123 ;
  • the plurality of pads 111 of the second pad group 1112 may be parallel to the second side edge 1222 are arranged side by side in the direction of the second pin row 124 , and can be arranged in a one-to-one correspondence with the plurality of pins 121 of the second pin row 124 , and each pad 111 in the second pad group 1112 is used to Pin 121 is electrically connected.
  • the first isolation trench 1121 may be located between the first side edge 1221 and the second side edge 1222 and extend in a direction substantially parallel to the first side edge 1221 to isolate the first pad group 1111 and the pads in the second pad group 1112, wherein the extension length of the first isolation trench 1121 may be greater than the length of the first side edge 1221 or the second side edge 1222 of the device body, so that the first isolation trench 1121
  • the pads in the first pad group 1111 can be completely isolated from the pads in the second pad group 1112 to avoid any pad in the first pad group 1111 and any pad in the second pad group 1112
  • the pads are electrically connected to avoid short circuit between any pin 121 in the first pin row 123 and any pin in the second pin row 124 due to electrical connection.
  • the pads in the first pad group 1111 and the pads in the second pad group 1112 can be effectively isolated , so as to avoid the problem of short circuit and signal leakage caused by the connection between any pin in the first pin row 123 and any pin in the second pin row 124 during leakage.
  • the isolation trench 112 further includes a second isolation trench 1122 , and the second isolation trench 1122 is provided between two adjacent pads 111 in the first pad group 1111 , and/ Or, the second isolation trench 1122 is disposed between two adjacent pads 111 in the second pad group 1112 .
  • the number of the second isolation trenches 1122 may be multiple, and each second isolation trench 1122 may be provided between two adjacent pads 111 in the first pad group 1111; or, be provided in the second pad between two adjacent pads 111 in the group 1112; or, disposed between two adjacent pads 111 in the first pad group 1111 and extending to the corresponding adjacent pads in the second pad group 1112 between the two pads 111 .
  • the adjacent pads 111 in the first pin row 123 can be effectively avoided.
  • the two pins 121 and the adjacent two pins 121 in the second pin row 124 are connected during leakage, which causes a short circuit problem.
  • a predetermined angle is formed between the extending direction of the second isolation groove 1122 and the extending direction of the first isolation groove 1121 , wherein the predetermined angle may be less than or equal to 90°.
  • the second isolation trench 1122 may extend substantially in a direction perpendicular to the first side edge 1221 , and the second isolation trench 1122 may extend between two adjacent pads 111 in the first pad group 1111 To between two adjacent pads 111 in the second pad group 1112 , the extending direction of the second isolation trench 1122 may be substantially perpendicular to the extending direction of the first isolation trench 1121 , and the two pass through each other.
  • two adjacent pads 111 in the first pad group 1111 and two adjacent pads 111 in the second pad group 1112 can be isolated from each other, as well as the pads 111 in the first pad group 1111 It is isolated from the pads 111 in the second pad group 1112 to achieve the effect of complete isolation and avoid the occurrence of the occurrence of the connection between the pins 121 of the entire electronic device 120 and the adjacent pins 121 and the opposite pins 121 during leakage. short circuit.
  • the number of the first pad group 1111 and the second pad group 1112 may be multiple, wherein one first pad group 1111 and one second pad group 1112 may be used as a pad unit, each The pad units are used for soldering with multiple pins 121 of an electronic device 120 , and the multiple pad units can be arranged in different areas of the circuit board 110 , and the first isolation groove 1121 can be defined by the area where one of the pad units is located. Extending to the area where another pad unit is located, that is, the same first isolation trench 1121 can isolate the first pad group 1111 and the second pad group 1112 in the two pad units at the same time.
  • the isolation trench 1122 may also extend from the area where one pad unit is located to the area where the other pad unit is located, so as to isolate two adjacent pads 111 in the first pad group 1111 and the second pad group 1112 at the same time .
  • the circuit board assembly 100 may include a plurality of electronic devices 120, and the isolation grooves 112 may also be disposed between the plurality of pads 111 respectively connected to two adjacent electronic devices 120 to electrically isolate the phases.
  • two adjacent electronic devices 120 may be arranged side by side on the circuit board 110 along a certain direction, for example, may be arranged side by side in a direction parallel to the long side, short side or diagonal of the circuit board 110, and adjacent two At least one isolation slot 112 may be provided between the two electronic devices 120 , which can effectively isolate the pins of two adjacent electronic devices 120 and avoid the problem of signal leakage between two adjacent electronic devices 120 .
  • the isolation trench 112 includes at least two trench segments that intersect and extend in different directions.
  • the isolation groove 112 may include a first groove section 1124 and a second groove section 1125, wherein the first groove section 1124 and the second groove section 1125 are respectively extended in two intersecting directions and communicate with each other, and the first groove section 1125
  • the included angle formed between the extending directions of the segment 1124 and the second slot segment 1125 may be less than or equal to 90°, for example, when the included angle formed between the extending directions of the first slot segment 1124 and the second slot segment 1125 is 90° , the isolation groove 112 may be substantially an "L"-shaped groove, and when the included angle formed between the extending directions of the first groove section 1124 and the second groove section 1125 is less than 90°, the isolation groove 112 may be substantially a "V"-shaped groove , the pins 121 of the electronic device 120 may be located in the area enclosed by the first slot segment 1124 and the second slot segment 1125 to
  • the isolation groove 112 can be formed by connecting a plurality of "V"-shaped grooves in sequence, and each "V"-shaped groove can isolate a lead 121.
  • the isolation groove 112 may be an arc-shaped groove, and the arc-shaped groove may be disposed around the pins 121 .
  • the isolation slot 112 may include a third slot segment 1126, the third slot segment 1126 and the first slot segment 1124 may be located on opposite sides of the pin 121, respectively, and the second slot segment 1125 is connected to the third slot segment 1126 and the first slot segment 1124.
  • the isolation groove 112 can be roughly a "U"-shaped groove, so that the isolation groove 112 can be isolated from multiple directions of the pin 121, at least to achieve the pin 121 and the adjacent and opposite pins. Isolation between 121.
  • the plurality of bonding pads 111 includes four bonding pads 111 , two bonding pads 111 are disposed opposite to each other along the first direction X1 , and the other two bonding pads 111 are arranged along the second direction X2 Relatively arranged, the first direction X1 and the second direction X2 intersect, and the isolation groove 112 is arranged at the intersection of the first direction X1 and the second direction X2 to electrically isolate the two pads 111 along the first direction X1 and the two pads along the second direction X1.
  • the two pads 111 in the two directions X2 and the isolation grooves 112 may be regular-shaped grooves such as circular grooves, polygonal grooves, and elliptical grooves, or irregular-shaped groove structures.
  • the isolation groove 112 located at the intersection of the first direction X1 and the second direction X2 can isolate the two pins 121 located in the first direction X1 and the two pins 121 located in the second direction X2 at the same time, so that That is, the isolation of the plurality of pins 121 can be realized and the number of the isolation grooves 112 can be reduced.
  • the electronic device 120 may be a thermopile sensor
  • the thermopile sensor may include a pair of thermistor pins and a pair of thermopile pins
  • the thermistor pins include a first thermistor pin and a second thermistor pin Thermistor pins
  • the thermopile pins include a first thermopile pin and a second thermopile pin, wherein the first thermopile pin and the second thermopile pin are respectively welded to two pins on the first direction X1.
  • Each pad 111, the first thermistor pin and the second thermistor pin are respectively welded to the other two pads 111 in the second direction X2.
  • the circuit board assembly 100 can have the function of temperature detection, and at the same time, through the above-mentioned layout direction, the two pairs of pins 121 of the thermopile sensor can be isolated through the same isolation slot 112 .
  • the plurality of bonding pads 111 includes four bonding pads 111, which are used for soldering electronic devices with 4 pins.
  • the four bonding pads 111 are arranged in a matrix of two rows and two columns.
  • the first isolation trench 1121 and the second isolation trench 1122 isolate the four pads 111 two by two, and the intersection point of the first isolation trench 1121 and the second isolation trench 122 is located at the center of the matrix formed by the four pads 111 .
  • This embodiment is also applicable to the case where the electronic device is a thermopile sensor.
  • the at least two wires include a power wire and a ground wire, and/or the at least two wires include a positive communication wire and a negative communication wire.
  • the signal line 130 may include a power line and a ground line, or the signal line 130 may include a positive communication line and a negative communication line, or the signal line 130 may include a power line, a ground line, a positive communication line and a negative communication line at the same time.
  • both the power line and the ground line can be electrically connected to an external power supply to realize the power-on of the circuit board assembly 100; the positive communication line and the negative communication line can be connected to the communication interface, and communicate with the external device through the communication interface, so as to realize the connection with the external device. Communication with external devices.
  • the circuit board 110 is provided with an isolation groove 112, and when the solder paste flux is brushed and soldered, the generated flux can drop into the isolation groove 112, so that the dropped flux cannot be directly connected and soldered to the
  • the pins 121 or the signal lines 130 of the two pads 111 are used to avoid the problem of short circuit caused by direct connection between at least two pins 121 and at least two signal lines 130 of the electronic device 120 due to leakage current.
  • Embodiments of the present application further provide an electronic device, including the above-mentioned circuit board assembly 100 .
  • the electronic device is a mobile terminal, a wearable device, a personal computer, a measuring device, a household device, a TWS headset, or other devices with a built-in circuit board.
  • the electronic equipment can be temperature measuring equipment such as forehead thermometers and ear thermometers, as well as health measuring equipment such as body fat scales and body composition analyzers.
  • the electronic device provided by the present application is provided with the above-mentioned circuit board assembly 100. Since the above-mentioned circuit board assembly 100 is provided with an isolation groove 112, the isolation groove 112 can isolate at least two pads 111, and will not cause the electronic device 120 to lead A short circuit occurs between the pins 121 due to leakage current or a short circuit occurs between the signal lines 130, which can effectively improve the performance of the electronic device.
  • a plurality of refers to two or more.
  • “And/or” refers to any one or a combination of both, for example, “feature A and/or feature B” includes three technical solutions, namely: feature A, feature B, and a combination of feature A and feature B .

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Abstract

本申请实施例提供了一种电路板组件，包括电路板、电子器件和/或信号线，电路板上形成有多个焊盘和至少一个隔离槽，电子器件包括至少两个引脚，每个引脚分别焊接于焊盘；信号线至少包括第一导线和第二导线，第一导线和第二导线分别焊接于一个焊盘，其中，隔离槽设于至少两个焊盘之间，以电性隔离至少两个焊盘。本申请实施例通过在电路板上设有的隔离槽，避免助焊剂直接堆积在电路板的表面，从而防止掉落的助焊剂在受潮后连通电子器件中的不同引脚或信号线中的不同导线，有效地避免电子器件的至少两个引脚以及至少两个信号线之间因漏电而直接连通，从而解决电路短路和信号泄露等问题。此外，本申请还提供一种电子设备。

Description

电路板组件及电子设备
相关申请的交叉引用
本申请要求于2021年02月05日提交的申请号为202120340158.9的中国申请的优先权，其在此处于所有目的通过引用将其全部内容并入本文。
技术领域
本实用新型涉及集成电路技术领域，具体涉及一种电路板组件及电子设备。
背景技术
电路板广泛地使用在电子产品技术领域，例如，目前各种小信号电路被广泛应用，特别是各种电子设备信号采集电路，如压力电子设备、红外测温的热电堆电子设备等。然而小信号电路经常会遇到信号泄露的问题，主要问题为助焊剂受潮后导电，元器件的两个引脚之间容易漏电。目前常用的方法是采用洗板水清洗，然后烘干，再涂上防潮漆进行保护，洗板水清洗存在难以衡量是否清洗干净的标准，生产线往往难以控制，无法避免漏洗和清洗不彻底的情况，且在后续环境难以挑出，存在极大风险。
实用新型内容
鉴于以上问题，本申请提供一种电路板组件及电子设备，以改善上述的问题。
第一方面，本申请实施例提供一种电路板组件，包括电路板、电子器件和/或信号线，电路板上形成有多个焊盘和至少一个隔离槽，电子器件包括至少两个引脚，每个引脚分别焊接于一个焊盘；信号线包括至少两根导 线，每根导线分别焊接于一个焊盘；其中，隔离槽设于至少两个焊盘之间，以电性隔离与至少两个焊盘相连接的电子器件的至少两个引脚和/或信号线的至少两根导线。
第二方面，本申请实施例还提供一种电子设备，包括上述的电路板组件。
本申请实施例通过在电路板上设有隔离槽，在刷锡膏助焊剂和焊接时，产生的助焊剂可以直接掉落至隔离槽内，或从隔离槽中掉落，避免助焊剂直接堆积在电路板的表面，从而防止掉落的助焊剂在受潮后连通电子器件中的不同引脚或信号线中的不同导线，有效地避免电子器件的至少两个引脚以及至少两个信号线之间因漏电而直接连通，从而解决电路短路和信号泄露等问题。
本申请的这些方面或其他方面在以下实施例的描述中会更加简明易懂。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，而不是全部的实施例。基于本申请实施例，本领域普通技术人员在没有付出创造性劳动前提下所获得的所有其他实施例及附图，都属于本发明保护的范围。
图1为本申请实施例提供的一种电路板组件在第一视角下的结构示意图；
图2为本申请实施例提供的一种电路板组件在第二视角下的结构示意图；
图3为本申请实施例提供的另一种电路板组件的结构示意图；
图4为本申请实施例提供的又一种电路板组件的结构示意图；
图5为本申请实施例提供的再一种电路板组件的结构示意图。
具体实施方式
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。应当理解，此处描述的具体实施例仅用于解释本申请，并不用于限定本申请。
由于现有的电路板组件经常会遇到信号泄露的问题，主要问题为助焊剂受潮后导电，助焊剂的主要来源包括表面贴装时刷的锡膏助焊剂和人工后焊时引入的助焊剂。助焊剂容易堆积在两个焊盘之间，当助焊剂受潮后可导电，会造成电子器件的两个引脚或者两根信号线之间形成电连接，造成短路。目前常用的去除助焊剂的方法是采用洗板水清洗，然后烘干，再涂上防潮漆进行保护，洗板水清洗存在难以衡量是否清洗干净的标准，生产线往往难以控制，无法避免漏洗和清洗不彻底的情况，且在后续环境难以挑出，存在极大风险，而且烘干时长较长，会影响生产效率；刷防潮漆增加成本并影响生产效率，此外，洗板水和防潮漆均有毒对人体有害。
为此，以改善上述的问题，下面将通过具体实施例对本申请实施例提供的电路板组件及电子设备进行详细说明。
请参阅图1，本申请实施例提供一种电路板组件100，包括电路板110、电子器件120和/或信号线130，电路板110上形成有至少两个焊盘111和至少一个隔离槽112，电子器件120包括至少两个引脚121，每个引脚121分别焊接于一个焊盘111；信号线130包括至少两根导线131和132，每根导线分别焊接于一个焊盘111。其中，隔离槽112设于至少两个焊盘111之间，以电性隔离与至少两个焊盘111相连接的上述电子器件的至少两个引脚和/或信号线130中的至少两根导线。
可选地，隔离槽112的深度可以等于或小于电路板110的厚度，当隔离槽112的深度小于电路板110的厚度时，隔离槽112的开口设置于电路板110的焊接面，此时隔离槽112有底壁，可以承接掉落的助焊剂，避免其堆积在电路板110上；当隔离槽112的深度等于电路板110的厚度时，隔离槽112贯穿电路板110的上下表面，可以使助焊剂从隔离槽112中掉落，不堆积在隔离槽112内或电路板110的表面。
本申请实施例通过在电路板110上设有隔离槽112，在刷锡膏助焊剂和焊接时，产生的助焊剂可以直接掉落至隔离槽112内或通过隔离槽112掉落，避免助焊剂直接堆积在电路板110的表面，从而防止掉落的助焊剂在受潮后连通电子器件中的不同引脚121或信号线130中的不同导线，有效地避免电子器件120的至少两个引脚121或者电路板110上的至少两个信号线130之间因漏电而直接连通，从而解决电路短路、信号泄露等问题。
上述的“和/或”是指电路板组件100可以仅包括电子器件120和信号线130中的任一者，或者，也可以同时包括电子器件120和信号线130。
在一些实施方式中，电子器件120为电容、电阻、芯片或传感器。可选地，传感器件210可以为压力传感器、温度传感器(例如，热电堆传感器)、距离传感器(例如，红外测距传感器、激光测距传感器、超声波传感器)或者其它类型的传感器。相应地，隔离槽112设置在电容的两个引脚之间，或者电阻的两个引脚之间，或者热电堆传感器的四根引脚之间，或者芯片的两排引脚之间，或者传感器的多个引脚之间。
在一些实施方式中，隔离槽112贯穿电路板110，也即隔离槽112贯穿电路板110的厚度方向的两个表面，通过将隔离槽112贯穿电路板110，在刷锡膏助焊剂和焊接时，产生的助焊剂可以直接从隔离槽112中掉落，避免助焊剂堆积在电路板110的表面，此方式相较于洗板、烘干、刷防潮漆的方法来说，极大地提升了生产效率、节约了成本，更不存在清洗标准等问题，也没有引入 有害人体的物质。
在一些实施方式中，如图2所示，电子器件120可以包括器件主体122、第一引脚排123和第二引脚排124，第一引脚排123和第二引脚排124分别包括至少一个引脚121，第一引脚排123和第二引脚排124可以在器件主体122上相对设置，电路板110设有相对设置的第一焊盘组1111和第二焊盘组1112，第一焊盘组1111用于与第一引脚排123连接，第二焊盘组1112用于与第二引脚排124连接，隔离槽112包括第一隔离槽1121，第一隔离槽1121设于第一焊盘组1111与第二焊盘组1112之间。
作为一种示例，第一引脚排123和第二引脚排124可以分别包括多个引脚121，器件主体122包括相对的第一侧边缘1221和第二侧边缘1222，第一侧边缘1221和第二侧边缘1222的延伸方向可以大致平行，其中，第一引脚排123的多个引脚121可以沿第一侧边缘1221并排设置；第二引脚排124的多个引脚121可以沿第二侧边缘1222并排设置。第一焊盘组1111和第二焊盘组1112分别包括至少一个焊盘111，作为一种示例，第一焊盘组1111和第二焊盘组1112均可以包括多个焊盘111。其中，第一焊盘组1111的多个焊盘111可以沿平行于第一侧边缘1221的方向并排设置，并与第一引脚排123的多个引脚121一一对应设置，第一焊盘组1111中的每个焊盘111用于与第一引脚排123中的一个引脚121进行电连接；第二焊盘组1112的多个焊盘111可以沿平行于第二侧边缘1222的方向并排设置，并可以与第二引脚排124的多个引脚121一一对应设置，第二焊盘组1112中的每个焊盘111用于与第二引脚排124中的一个引脚121进行电连接。作为一种示例，第一隔离槽1121可以位于第一侧边缘1221和第二侧边缘1222之间，并大致沿平行于第一侧边缘1221的方向延伸设置，以隔离第一焊盘组1111中的焊盘与第二焊盘组1112中的焊盘，其中，第一隔离槽1121的延伸长度可以大于器件主体的第一侧边缘1221或第二侧边缘1222的长度，这样第一隔离槽1121可以完全将第一焊盘组1111中的焊盘与第二焊盘组1112中的焊盘进行隔离，避免第一焊盘组 1111中的任一焊盘与第二焊盘组1112的任一焊盘电连接，从而避免第一引脚排123中的任一个引脚121与第二引脚排124中的任一个引脚因电连接而短路。
通过将第一隔离槽1121设于第一焊盘组1111和第二焊盘组1112之间，可以有效地隔离第一焊盘组1111中的焊盘与第二焊盘组1112中的焊盘，以避免第一引脚排123中的任一引脚与第二引脚排124中的任一引脚在漏电时发生连通而造成短路和信号泄露的问题。
在一些实施方式中，如图2所示，隔离槽112还包括第二隔离槽1122，第二隔离槽1122设于第一焊盘组1111中相邻的两个焊盘111之间，和/或，第二隔离槽1122设于第二焊盘组1112中相邻的两个焊盘111之间。其中，第二隔离槽1122的数量可以为多个，每个第二隔离槽1122可以设于第一焊盘组1111中的相邻两个焊盘111之间；或者，设置于第二焊盘组1112中的相邻两个焊盘111之间；或者，设置于第一焊盘组1111中的相邻两个焊盘111之间并延伸至第二焊盘组1112中相应的相邻的两个焊盘111之间。通过将第二隔离槽1122设于第一焊盘组1111和/或第二焊盘组1112中的相邻两个焊盘111之间，可以有效地避免第一引脚排123中的相邻两个引脚121、第二引脚排124中的相邻两个引脚121在漏电时发生连通而造成短路问题。
在一些实施方式中，第二隔离槽1122的延伸方向与第一隔离槽1121的延伸方向之间成预设夹角，其中，预设夹角可以小于或等于90°。作为一种示例，第二隔离槽1122可以大致沿垂直于第一侧边缘1221的方向延伸设置，第二隔离槽1122可以由第一焊盘组1111中相邻的两个焊盘111之间延伸至第二焊盘组1112中的相邻两个焊盘111之间，其中，第二隔离槽1122的延伸方向可以与第一隔离槽1121的延伸方向大致垂直，且两者相互贯通。这样可以同时保证第一焊盘组1111中的相邻两个焊盘111以及第二焊盘组1112中的相邻两个焊盘111彼此隔离，以及第一焊盘组1111中的焊盘111与第二焊盘组1112中的焊盘111相互隔离，以达到完全隔离的效果，避免整个电子器件120的引 脚121在漏电时而与其相邻的引脚121以及相对的引脚121连通而发生短路。
在一些实施方式中，第一焊盘组1111和第二焊盘组1112的数量可以为多个，其中一个第一焊盘组1111和一个第二焊盘组1112可以作为一个焊盘单元，每个焊盘单元用于与一个电子器件120的多个引脚121进行焊接，多个焊盘单元可以设于电路板110的不同区域，第一隔离槽1121可以由其中一个焊盘单元所在的区域延伸至另一焊盘单元所在的区域，也即同一个第一隔离槽1121可以将两个焊盘单元中的第一焊盘组1111与第二焊盘组1112同时进行隔离，此外，第二隔离槽1122也可以由其中一个焊盘单元所在的区域延伸至另一焊盘单元所在的区域，以同时隔离第一焊盘组1111与第二焊盘组1112中的相邻两个焊盘111。
在一些实施方式中，电路板组件100可以包括多个电子器件120，隔离槽112还可以设置于与相邻的两个电子器件120分别连接的多个焊盘111之间，以电性隔离相邻的两个电子器件120。作为一种示例，多个电子器件120可以在电路板110上沿某一方向并排设置，例如可以沿平行于电路板110的长侧边、短侧边或者对角线方向并排设置，相邻两个电子器件120之间可以设有至少一个隔离槽112，这样可以有效地隔离相邻两个电子器件120的引脚，避免相邻的相邻两个电子器件120之间发生信号泄露的问题。
在一些实施方式中，如图4所示，隔离槽112包括至少两个相交且沿不同方向延伸的槽段。作为一种示例，隔离槽112可以包括第一槽段1124和第二槽段1125，其中第一槽段1124和第二槽段1125分别沿两个相交的方向延伸设置并相互连通，第一槽段1124和第二槽段1125的延伸方向之间形成的夹角可以小于或等于90°，例如，第一槽段1124和第二槽段1125的延伸方向之间形成的夹角为90°时，隔离槽112可以大致为“L”型槽，当第一槽段1124和第二槽段1125的延伸方向之间形成的夹角小于90°时，隔离槽112可以大致为“V”型槽，电子器件120的引脚121可以位于第一槽段1124和第二槽段1125围成的区域内，以实现引脚121的不同方向上的隔离。隔离槽112可以 由多个“V”型槽依次连接形成，每个“V”型槽可以隔离一引脚121。此外，隔离槽112可以为弧形槽，弧形槽可以围绕引脚121设置。此外，隔离槽112可以包括第三槽段1126，第三槽段1126和第一槽段1124可以分别位于引脚121的相对两侧，第二槽段1125连接于第三槽段1126和第一槽段1124之间，隔离槽112可以大致为“U”型槽，这样隔离槽112可以从该引脚121的多个方向进行隔离，至少可以实现该引脚121与相邻和相对的引脚121之间的隔离。
在一些实施方式中，如图5所示，多个焊盘111中包括四个焊盘111，其中两个焊盘111沿第一方向X1相对设置，另外两个焊盘111沿第二方向X2相对设置，第一方向X1与第二方向X2相交，隔离槽112设于第一方向X1与第二方向X2的交接处，以电性隔离沿第一方向X1的两个焊盘111和沿第二方向X2的两个焊盘111，隔离槽112可以为圆形槽、多边形槽、椭圆形槽等规则形状槽或者为不规则形状的槽结构。当电子器件120的多个引脚121中的其中两个引脚121沿第一方向X1焊接于其中两个焊盘111，另外两个引脚121沿第二方向X2焊接于另外两个焊盘111时，位于第一方向X1和第二方向X2交接处的隔离槽112，可以同时将位于第一方向X1的两个引脚121和位于第二方向X2的两个引脚121进行隔离，这样即能够实现多个引脚121的隔离又能够减少隔离槽112的设置数量。作为一种示例，电子器件120可以为热电堆传感器，热电堆传感器可以包括一对热敏电阻引脚和一对热电堆引脚，热敏电阻引脚包括第一热敏电阻引脚和第二热敏电阻引脚，热电堆引脚包括第一热电堆引脚和第二热电堆引脚，其中，第一热电堆引脚和第二热电堆引脚分别焊接于第一方向X1上的两个焊盘111，第一热敏电阻引脚和第二热敏电阻引脚分别焊接于第二方向X2上的另外两个焊盘111。通过设置热电堆传感器可以使得电路板组件100具有温度检测的功能，同时，通过上述的布设方向，可以通 过同一隔离槽112对热电堆传感器的两对引脚121实现隔离。
在一些实施方式中，多个焊盘111中包括四个焊盘111，用于焊接具有4个引脚的电子器件，四个焊盘111呈两行两列的矩阵分布，则可通过互相垂直的第一隔离槽1121和第二隔离槽1122将四个焊盘111两两隔离，此时第一隔离槽1121与第二隔离槽122的相交点位于四个焊盘111构成的矩阵中心。本实施方式也适用于电子器件为热电堆传感器的情况。
在一些实施方式中，至少两根导线包括电源线和地线，和/或，所述至少两根导线包括正通信线和负通信线。换言之，信号线130可以包括电源线和地线，或者信号线130可以包括正通信线和负通信线，或者信号线130可以同时包括电源线、地线、正通信线和负通信线。其中，电源线和地线均可以与外部电源电连接，以实现电路板组件100的通电；正通信线和负通信线可以连接于通信接口，通过通信接口与外接设备进行通信连接，以实现与外接设备的通信。
本申请实施例通过在电路板110上设有隔离槽112，在刷锡膏助焊剂和焊接时，产生的助焊剂可以掉落至隔离槽112内，使得掉落的助焊剂无法直接连通焊接于两个焊盘111的引脚121或信号线130，以避免电子器件120的至少两个引脚121以及至少两个信号线130之间因漏电而直接连通，导致电路短路的问题。
本申请实施例还提供一种电子设备，包括上述的电路板组件100。可选地，电子设备为移动终端、可穿戴设备、个人计算机、测量设备、家用设备、TWS耳机或者其他内置有电路板的设备。以测量设备为例，电子设备可以为额温枪、耳温枪等测温设备，还可以是体脂秤、人体成分分析仪等健康测量设备。
本申请提供的电子设备通过设置上述的电路板组件100，由于上述的电路板组件100设置有隔离槽112，隔离槽112至少可以将两个焊盘111进 行隔离，不会造成电子器件120的引脚121之间因漏电而发生短路或者信号线130之间发生短路，可以有效地提高电子设备的使用性能。
需要说明的是，上述各实施例中，“多个”指的是两个或两个以上。“和/或”指的是其中任意一个或两者的组合，例如，“特征A和/或特征B”包括3种技术方案，分别为：特征A、特征B、特征A与特征B的结合。
上面结合附图对本申请各实施例进行了描述，但是本申请并不局限于上述的具体实施例，上述的具体实施例仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形式，均属于本申请的保护范围之内。

Claims (12)

  1. 一种电路板组件，其特征在于，包括：
    电路板，所述电路板上形成有至少两个焊盘和至少一个隔离槽；
    电子器件和/或信号线，所述电子器件包括至少两个引脚，每个所述引脚分别焊接于一个所述焊盘；所述信号线包括至少两根导线，每根所述导线分别焊接于一个所述焊盘；
    其中，所述隔离槽设于至少两个所述焊盘之间，以电性隔离与至少两个所述焊盘相连接的所述电子器件的至少两个引脚和/或所述信号线的至少两根导线。
  2. 根据权利要求1所述的电路板组件，其特征在于，所述隔离槽贯穿所述电路板。
  3. 根据权利要求1所述的电路板组件，其特征在于，所述电子器件包括器件主体、第一引脚排和第二引脚排，所述第一引脚排和所述第二引脚排分别包括至少一个所述引脚，所述第一引脚排和所述第二引脚排在所述器件主体上相对设置，所述电路板设有相对设置的第一焊盘组和第二焊盘组，所述第一焊盘组和所述第二焊盘组包括至少一个所述焊盘，所述第一焊盘组用于所述第一引脚排连接，所述第二焊盘组用于与所述第二引脚排连接，所述隔离槽包括第一隔离槽，所述第一隔离槽设于所述第一焊盘组与所述第二焊盘组之间。
  4. 根据权利要求3所述的电路板组件，其特征在于，所述第一引脚排和所述第二引脚排分别包括多个所述引脚，所述第一焊盘组和所述第二焊盘组分别包括多个所述焊盘，所述隔离槽还包括第二隔离槽，所述第二隔离槽设于所述第一焊盘组中相邻的两个所述焊盘之间，和/或，所述第二隔离槽设于所述第 二焊盘组中相邻的两个所述焊盘之间。
  5. 根据权利要求4所述的电路板组件，其特征在于，所述第二隔离槽的延伸方向与所述第一隔离槽的延伸方向之间成预设夹角。
  6. 根据权利要求1所述的电路板组件，其特征在于，所述电路板组件包括多个所述电子器件，所述隔离槽还设置于与相邻的两个所述电子器件分别连接的多个所述焊盘之间，以电性隔离相邻的两个所述电子器件。
  7. 根据权利要求1所述的电路板组件，其特征在于，所述隔离槽包括至少两个相交且沿不同方向延伸的槽段。
  8. 根据权利要求1-7任一项所述的电路板组件，其特征在于，所述电子器件为电容、电阻、芯片或传感器。
  9. 根据权利要求1所述的电路板组件，其特征在于，所述多个焊盘中包括四个所述焊盘，其中两个所述焊盘沿第一方向相对设置，另外两个所述焊盘沿第二方向相对设置，所述第一方向与所述第二方向相交，所述隔离槽设于所述第一方向与所述第二方向的交接处，以电性隔离沿所述第一方向的两个所述焊盘和沿所述第二方向的两个所述焊盘。
  10. 根据权利要求9所述的电路板组件，其特征在于，所述电子器件为热电堆电子设备，所述热电堆电子设备包括第一热敏电阻引脚、第二热敏电阻引脚、第一热电堆引脚和第二热电堆引脚，其中，所述第一热电堆引脚和所述第二热电堆引脚分别焊接于所述第一方向上的两个所述焊盘，所述第一热敏电阻引脚和所述第二热敏电阻引脚分别焊接于所述第二方向上的另外两个所述焊盘。
  11. 根据权利要求1-7任一项所述的电路板组件，其特征在于，所述至少两根导线包括电源线和地线，和/或，所述至少两根导线包括正通信线和负通 信线。
  12. 一种电子设备，其特征在于，包括如权利要求1-11任一项所述的电路板组件。
PCT/CN2022/072798 2021-02-05 2022-01-19 电路板组件及电子设备 WO2022166588A1 (zh)

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CN114679841A (zh) * 2022-03-01 2022-06-28 维沃移动通信有限公司 电路板组件和电子设备
CN114828408B (zh) * 2022-04-02 2024-06-04 Tcl华星光电技术有限公司 印刷电路板和背光模组
WO2024050814A1 (zh) * 2022-09-09 2024-03-14 京东方科技集团股份有限公司 布线基板及其制造方法、电子装置

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