WO2022163722A1

WO2022163722A1 - Piezoelectric element, and sensor and actuator employing same

Info

Publication number: WO2022163722A1
Application number: PCT/JP2022/002951
Authority: WO
Inventors: 岳人石川; 岳圓岡; 大輔中村; 広宣待永; 聖鶴田
Original assignee: 日東電工株式会社
Priority date: 2021-02-01
Filing date: 2022-01-26
Publication date: 2022-08-04
Also published as: TW202303106A; JPWO2022163722A1

Abstract

Provided is a piezoelectric element with which a leakage current is suppressed and piezoelectric characteristics are improved. In the piezoelectric element, a piezoelectric layer and a first electrode are stacked in this order on a substrate, and a leakage current suppressing layer is disposed either between the first electrode and the piezoelectric layer, or between the substrate and the piezoelectric layer. A ratio of electrostatic capacitance per unit surface area of the leakage current suppressing layer to electrostatic capacitance per unit surface area of the piezoelectric layer is at least equal to 1.20 and less than 60.00.

Description

Piezoelectric element, sensor and actuator using the same

The present invention relates to piezoelectric elements, and sensors and actuators using the same.

Conventionally, piezoelectric elements that utilize the piezoelectric effect of substances have been used. The piezoelectric effect is a phenomenon in which the application of pressure to a substance produces polarization proportional to the pressure. Various sensors, such as stress sensors, acceleration sensors, and AE (acoustic emission) sensors for detecting elastic waves, have been manufactured using the piezoelectric effect.

In recent years, piezoelectric elements have been applied to touch panels of electronic devices such as smartphones and bulk acoustic wave (BAW) filters used as high-frequency bandpass filters. When applied to pressure sensors such as touch panels, high pressure responsiveness is required in order to detect finger operations with high sensitivity. When applied to a BAW filter, the operating principle is vibration in the thickness direction of the piezoelectric thin film, and therefore good piezoelectric characteristics in the thickness direction are required. In any application, miniaturization as an element and low power consumption are required.

A configuration has been proposed in which a current blocking layer is inserted between the upper and lower electrodes of a piezoelectric thin film element using perovskite crystals to maintain the electrical resistance value between the electrodes at a predetermined value or higher (for example, See Patent Document 1).

JP 2009-130182 A

Wurtzite crystals having crystal orientation in the c-axis direction are used as piezoelectric materials used in sensors and actuators that utilize the piezoelectric effect. Wurtzite crystals have a hexagonal crystal structure, and ZnO, AlN, GaN, and the like are used. Among them, ZnO, which is a group II-VI compound, tends to be an n-type semiconductor and tends to generate a minute leak current. GaN and AlN, which are group III-V compounds, also tend to exhibit semiconducting properties, and may generate a minute leak current. Piezoelectric characteristics are degraded due to minute leakage current.

An object of the present invention is to provide a piezoelectric element in which leakage current is suppressed and piezoelectric characteristics are improved.

In one aspect of the present invention, the piezoelectric element includes a piezoelectric layer and a first electrode laminated in this order on a substrate, and a contact between the first electrode and the piezoelectric layer or between the substrate and the piezoelectric layer. A leakage current suppression layer is arranged in at least one of the piezoelectric layers,
A ratio of the capacitance per unit area of the leakage current suppression layer to the capacitance per unit area of the piezoelectric layer is 1.20 or more and less than 60.00.

A piezoelectric element with suppressed leakage current and improved piezoelectric characteristics is realized.

1 is a first configuration example of a piezoelectric element according to an embodiment; 3 is a second configuration example of the piezoelectric element of the embodiment; 3 is a third configuration example of the piezoelectric element of the embodiment; 4 is a fourth configuration example of the piezoelectric element of the embodiment. 5 is a fifth configuration example of the piezoelectric element of the embodiment. 6 is a sixth configuration example of the piezoelectric element of the embodiment. It is a figure which shows the measurement result of an Example and a comparative example. FIG. 4 is a diagram showing the relationship between the film thickness of a leakage current suppression layer and the piezoelectric constant d33; FIG. 10 is a diagram showing the relationship between the capacitance ratio and the piezoelectric constant d33; It is a figure which expands the range of an electrostatic capacity ratio, and shows a relationship with the piezoelectric constant d33. FIG. 4B is an enlarged view near the threshold in FIGS. 4A and 4B; It is a schematic diagram which shows an example of the sensor using the piezoelectric element of embodiment.

In the embodiment, a leakage current suppressing layer that satisfies a predetermined capacitance relationship is provided between the piezoelectric layer provided on the substrate and the first electrode, or between the substrate and the piezoelectric layer, at least one of which suppresses the leakage current. suppresses and improves the piezoelectric characteristics. In this specification, the term "piezoelectric properties" includes both the amount of voltage generated per applied stress (positive piezoelectric effect) and the rate of mechanical displacement per applied electric field (reverse piezoelectric effect).

<Device structure>
FIG. 1A is a schematic diagram of a piezoelectric element 10A that is a first configuration example of the embodiment. In the piezoelectric element 10A, an electrode 12, a piezoelectric layer 13, and an electrode 16 are laminated in this order on a substrate 11, and a leakage current suppressing layer 15 is provided between the piezoelectric layer 13 and the electrode 16. For convenience, electrode 16 may be referred to as the "first electrode" or upper electrode and electrode 12 as the "second electrode" or lower electrode. Depending on the electrical properties of substrate 11, electrode 12 may be omitted, as will be described later.

Any type of substrate 11 can be used as long as it can stably support the laminate of the electrode 12, the piezoelectric layer 13, the leakage current suppression layer 15, and the electrode 16. As the substrate 11, a plastic substrate, a glass substrate, a ceramic substrate, or the like may be used. As one configuration example, the substrate 11 may be made of a flexible base material that gives flexibility to the piezoelectric element 10A. The thickness of the substrate 11 is 1 μm or more and 150 μm or less, preferably 10 or more and 100 μm or less, more preferably 20 or more and 80 μm or less. If the thickness is less than 1 μm, it becomes difficult to stably support the laminate including the electrode 12 , piezoelectric layer 13 , leakage current suppression layer 15 and electrode 16 . In addition, the substrate 11 tends to warp, and the warping of the substrate 11 affects the piezoelectric characteristics. If the thickness of the substrate 11 exceeds 150 μm, it becomes difficult to give the desired bendability to the entire piezoelectric element 10A.

Examples of materials for the flexible substrate include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), acrylic resin, cycloolefin polymer, polyimide (PI), and thin glass. can. Among these materials, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), acrylic resin, cycloolefin polymer, and thin film glass are particularly colorless and transparent materials, and the piezoelectric element 10A is used as a touch panel. It is suitable for application to permeable parts such as If the piezoelectric element 10A is not required to have optical transparency, for example, if it is applied to health care products such as a pulse monitor and a heart rate monitor, or to an in-vehicle pressure detection sheet, a translucent or opaque plastic material may be used. .

One or both of the

electrodes

12 and 16 may be transparent electrodes made of a conductive material transparent to visible light. Depending on the application field of the piezoelectric element 10A, the

electrodes

12 and 16 may not necessarily be transparent, but when the piezoelectric element 10A is applied to a display such as a touch panel, it is required to have optical transparency to visible light. As a conductive material transparent to visible light, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), IZTO (Indium Zinc Tin Oxide), IGZO (Indium Gallium Zinc Oxide), etc. can be used.

A metal electrode may be formed if optical transparency is not required. When forming a metal electrode, a hexagonal metal material having the same lattice structure as wurtzite may be used. As hexagonal metals, titanium (Ti), zirconium (Zr), hafnium (Hf), ruthenium (Ru), zinc (Zn), yttrium (Y), scandium (Sc), combinations thereof, and the like can be used. can.

A wurtzite crystal, a perovskite crystal, or the like can be used as the piezoelectric layer 13 . In the embodiment, wurtzite crystal, which has a simpler crystal structure than perovskite crystal, is used as the main component of the piezoelectric layer 13 . A predetermined amount of impurity element may be added to the piezoelectric layer 13 as an accessory component.

A material that crystallizes in a low-temperature process of 200°C or less is desirable as a wurtzite-type piezoelectric material. Examples include zinc oxide (ZnO), zinc sulfide (ZnS), zinc selenide (ZnSe), zinc telluride (ZnTe), aluminum nitride (AlN), gallium nitride (GaN), cadmium selenide (CdSe), telluride Cadmium (CdTe) and silicon carbide (SiC) can be used. Two or more of these materials may be combined. When combining two or more materials, each compound may be laminated, or a single layer may be formed using a plurality of targets.

When adding a subcomponent to the piezoelectric material, it is desirable to use an element that does not exhibit conductivity when added to the main component and does not interfere with the piezoelectric properties. As an example, using magnesium (Mg), silicon (Si), calcium (Ca), vanadium (V), titanium (Ti), zirconium (Zr), strontium (Sr), lithium (Li), or mixtures thereof can be done.

The thickness of the piezoelectric layer 13 is 50 nm or more and 5000 nm (5 μm) or less, preferably 50 nm or more and 3000 nm (3 μm) or less, more preferably 50 nm or more and 2000 nm (2 μm) or less, more preferably 100 nm or more and 1000 nm (1 μm) or less, more preferably. is 150 nm or more and 500 nm or less. When the thickness of the piezoelectric layer 14 exceeds 5000 nm, cracks are likely to occur. Cracks also cause leakage paths between electrodes. If the thickness of the piezoelectric layer 14 is less than 50 nm, it becomes difficult to exhibit sufficient piezoelectric properties in the film thickness direction.

Good crystal orientation in the c-axis direction of the wurtzite crystal piezoelectric layer 13 means good piezoelectric characteristics in the thickness direction. The crystal orientation in the c-axis direction can be evaluated by the full width at half maximum (FWHM) of the peak obtained by rocking curve measurement of X-ray diffraction from a predetermined crystal lattice plane. The FMHM of the piezoelectric layer 14 is desirably 5° or less, and desirably 4° or less when applied to sensors and actuators.

The leakage current suppression layer 15 is an inorganic insulating layer, preferably an amorphous inorganic insulating layer. Al ₂ O ₃ , SiO ₂ , Si ₃ N ₄ , ZrO ₂ , TiO ₂ , AlN, Ta ₂ O ₅ or a combination of two or more thereof may be used as the inorganic insulating layer. These films can be formed by dry processes such as sputtering and chemical vapor deposition (CVD) methods, and wet processes such as sol-gel methods.

In the leak current suppression layer 15, the term "amorphous inorganic insulating layer" does not necessarily mean that the entire inorganic insulating layer is completely amorphous. The ratio of the amorphous component in the leakage current suppressing layer 15 is preferably 90% or more, more preferably 95% or more.

The material and/or film thickness of the leakage current suppression layer 15 is determined by the ratio of the capacitance C _LS per unit area of the leakage current suppression layer 15 to the capacitance C _PIEZ per unit area of the piezoelectric layer 13 (C _LS /C _PIEZ ) is selected to be 1.20 or more and less than 60.00. As will be described later, by satisfying the condition of 1.20≦C _LS /C _PIEZ <60.00, the piezoelectric characteristics of the piezoelectric element 10A are improved.

The capacitance _CLS of the leakage current suppression layer 15 is
C _LS =(εr _LS ×ε ₀ ×S)/d _LS (1)
is represented by where ε ₀ is the dielectric constant of the vacuum, a material-independent constant. S is the area of the leakage current suppression layer 15 and _dLS is the film thickness of the leakage current suppression layer 15 .

The capacitance C _PIEZ of the piezoelectric layer 13 is
_CPIEZ ₌ ( _εrPIEZ ×ε0×S)/ _dPIEZ (2)
is represented by Here, S is the area of the piezoelectric layer 13, which is the same as the area S of the leakage current suppressing layer 15 from the structure of the piezoelectric element 10A. d _PIEZ is the film thickness of the piezoelectric layer 13 .

From equations (1) and (2), the ratio C _LS /C _PIEZ of the capacitance C _LS per unit area of the leakage current suppression layer 15 to the capacitance C _PIEZ per unit area of the piezoelectric layer 13 is
C _LS /C _PIEZ =(εr _LS ×d _PIEZ )/(εr _PIEZ ×d _LS ) (3)
becomes. Based on the formula (3), the material and thickness of the piezoelectric layer 13 and the material and thickness of the leakage current suppression layer 15 are designed so as to satisfy 1.20≦C _LS /C _PIEZ <60.00. As a result, minute leakage current is suppressed, and piezoelectric characteristics can be improved.

FIG. 1B is a schematic diagram of a piezoelectric element 10B that is a second configuration example of the embodiment. In the piezoelectric element 10B, an electrode 12, a piezoelectric layer 13, and an electrode 16 are layered in this order on a substrate 11, and between the substrate 11 and the piezoelectric layer 13, more specifically, the electrode 12 and the piezoelectric layer. A leakage current suppression layer 15 is provided between 13 .

In the piezoelectric element 10B, when the leakage current suppression layer 15 positioned below the piezoelectric layer 13 in the stacking direction is formed as an amorphous insulating layer, the leakage current suppression layer 15 functions as an underlying alignment film for the piezoelectric layer 13. can also By disposing an amorphous insulating layer between the electrode 12 and the piezoelectric layer 13 , the piezoelectric layer 13 can be grown with good orientation without being affected by the crystalline state of the electrode 12 .

In the arrangement configuration of FIG. _1B , the capacitance relationship between the leakage current suppression layer 15 and the piezoelectric layer 13 is: It is designed so that the ratio C _LS /C _PIEZ of the capacitance C _LS is 1.20 or more and less than 60.00. As a result, minute leakage current is suppressed in the piezoelectric element 10B, and the piezoelectric characteristics are improved.

FIG. 1C is a schematic diagram of a piezoelectric element 10C that is a third configuration example of the embodiment. In the piezoelectric element 10C, an electrode 12, a piezoelectric layer 13, and an electrode 16 are laminated in this order on a substrate 11, and a leakage current suppressing layer 15-1 is provided between the electrode 12 and the piezoelectric layer 13. A leakage current suppressing layer 15-2 is provided between 16 and the piezoelectric layer 13. FIG.

In the arrangement configuration of FIG. 1C as well, the relationship between the leakage current suppression layers 15-1 and 15-2 and the capacitance of the piezoelectric layer 13 is designed to satisfy 1.20≦C _LS /C _PIEZ <60.00. ing. When the leakage current suppression layers 15-1 and 15-2 are provided, the capacitance C _LS per unit area of the two leakage current suppression layers is
C _LS =C _LS1 ×C _LS2 /(C _LS1 +C _LS2 )
becomes. Here, _CLS1 is the capacitance per unit area of the leakage current suppression layer 15-1, and _CLS2 is the capacitance per unit area of the other leakage current suppression layer 15-2.

When the leakage current suppressing layer 15-1 is formed as an amorphous insulating layer, it can also function as an underlying alignment film for the piezoelectric layer 13. When the leakage current suppressing layer 15-2 is formed as an amorphous insulating layer, it can also function as an underlying alignment film for the electrode 16. FIG. By providing the leakage current suppression layer 15-1 between the electrode 12 and the piezoelectric layer 13 and providing the leakage current suppression layer 15-2 between the electrode 16 and the piezoelectric layer 13, the piezoelectric layer 13 is suppressed in the stacking direction. The occurrence of leak paths is suppressed on both the lower electrode 12 side and the upper electrode 16 side. In addition, the crystallinity of the piezoelectric layer 13 and the electrodes 16 is improved, further improving the piezoelectric characteristics.

FIG. 1D is a schematic diagram of a piezoelectric element 10D that is a fourth configuration example of the embodiment. A conductive substrate 21 is used in the piezoelectric element 10D. A piezoelectric layer 13 and an electrode 16 are laminated in this order on a substrate 21 , and a leakage current suppressing layer 15 is provided between the electrode 16 and the piezoelectric layer 13 . In this configuration, substrate 21 can function as the bottom electrode. The substrate 21 may be a metal substrate or a conductive transparent substrate such as ITO, IZO, IZTO, IGZO. When a metal substrate 21 is used, a metal film such as Al foil, Cu foil, Al--Ti alloy foil, Cu--Ti alloy foil, and stainless steel foil may be used. When the thickness of the metal film is thin, the substrate 21 becomes a flexible substrate. A metal adhesion film such as Ti or Ni may be inserted between the substrate 21 and the piezoelectric layer 13 .

As in FIG. 1A, the material and thickness of the piezoelectric layer 13 are such that the ratio C _LS /C _PIEZ of the capacitance C _LS per unit area of the leakage current suppression layer 15 is 1.20 or more and less than 60.00. thickness, and the material and thickness of the leakage current suppression layer 15 are designed. As a result, minute leakage current is suppressed and the piezoelectric characteristics are improved.

FIG. 1E is a schematic diagram of a piezoelectric element 10E that is a fifth configuration example of the embodiment. The conductive substrate 21 is also used in the piezoelectric element 10E. A piezoelectric layer 13 and an electrode 16 are laminated in this order on a substrate 21 . A leakage current suppressing layer 15 is provided between the substrate 21 and the piezoelectric layer 13 .

As in FIG. 1D, the substrate 21 may be a metal substrate or a conductive transparent substrate such as ITO, IZO, IZTO, IGZO. When a metal substrate 21 is used, a metal film such as Al foil, Cu foil, Al--Ti alloy foil, Cu--Ti alloy foil, and stainless steel foil may be used. When the thickness of the metal film is thin, the substrate 21 becomes a flexible substrate. A metal adhesion film such as Ti or Ni may be inserted between the substrate 21 and the leakage current suppressing layer 15 .

When the leakage current suppression layer 15 is formed as an amorphous insulating layer, the leakage current suppression layer 5 can function as an underlying alignment film for the piezoelectric layer 13 . By arranging an amorphous insulating layer between the substrate 21 and the piezoelectric layer 13, the piezoelectric layer 13 can be grown with good orientation without being affected by the crystalline state of the substrate 21. FIG.

The ratio C _LS /C _PIEZ of the capacitance C _LS per unit area of the leakage current suppression layer 15 to the capacitance C _PIEZ per unit area of the piezoelectric layer 13 is set to 1.20 or more and less than 60.00. 2, the material and thickness of the piezoelectric layer 13 and the material and thickness of the leakage current suppression layer 15 are designed. As a result, minute leakage current is suppressed and the piezoelectric characteristics are improved.

With the configuration of FIG. 1E, the occurrence of a leak path between the substrate 21 and the electrode 16 is suppressed, and a minute leak current is suppressed. In addition, the crystallinity of the piezoelectric layer 13 is improved, and the piezoelectric characteristics are further improved.

FIG. 1F is a schematic diagram of a piezoelectric element 10F that is a sixth configuration example of the embodiment. The conductive substrate 21 is also used in the piezoelectric element 10F. A piezoelectric layer 13 and an electrode 16 are laminated in this order on a substrate 21 . A leakage current suppression layer 15-1 is provided between the substrate 21 and the piezoelectric layer 13, and a leakage current suppression layer 15-2 is provided between the piezoelectric layer 13 and the electrode 16. FIG.

When the leakage current suppression layer 15-1 is formed as an amorphous insulating layer, the leakage current suppression layer 15-1 can function as an underlying alignment film for the piezoelectric layer 13. By arranging an amorphous insulating layer between the substrate 21 and the piezoelectric layer 13, the piezoelectric layer 13 can be grown with good orientation without being affected by the crystalline state of the substrate 21. FIG. When the leakage current suppressing layer 15-2 is formed as an amorphous insulating layer, it can also function as an underlying alignment film for the electrode 16. FIG.

The capacitance C _LS per unit area of the two leakage current suppression layers 15-1 and 5-12 in the configuration of FIG. 1F is as described with reference to FIG. 1C, and C _LS /C _PIEZ is 1. .20 or more and less than 60.00. By providing a leakage current suppression layer 15-1 between the substrate 21 and the piezoelectric layer 13 and providing a leakage current suppression layer 15-2 between the piezoelectric layer 13 and the electrode 16, the piezoelectric layer 13 is separated from the substrate 21 side. The occurrence of leak paths is suppressed on both sides of the electrode 16 . In addition, the crystallinity of the piezoelectric layer 13 and the electrodes 16 is improved, further improving the piezoelectric characteristics.

<Characteristic evaluation>
As described above, the piezoelectric element 10 of the embodiment is designed so that the capacitance relationship between the leakage current suppression layer 15 and the piezoelectric layer 13 satisfies a predetermined relationship. In the following, the grounds for the above simple capacitance system derived from the results of measurement and evaluation of a plurality of actually manufactured samples will be described.

Fig. 2 shows the specifications of the sample of the example and the sample of the comparative example. Except for Comparative Example 1, all the samples had a leakage current suppression layer. 1A, except for Comparative Example 1, a leakage current suppressing layer 15 is provided between the electrode 16 (first electrode) and the piezoelectric layer 13. In FIG. As will be described later, the characteristics of each sample are evaluated based on the piezoelectric characteristics of Comparative Example 1 without the leakage current suppression layer 15 . Fixing conditions common to all samples are as follows.

A PET film having a thickness of 50 μm is used as the substrate 11 . An IZO film with a thickness of 100 nm is formed on the PET film as the second electrode 12 using a batch sputtering apparatus. The film formation power is DC 400 W, the film formation pressure is 0.4 Pa, and the film is formed in a mixed gas atmosphere of argon (Ar) gas and 1% oxygen (O ₂ ).

A piezoelectric layer 13 of MgZnO is formed on the second electrode 12 using the same film forming apparatus. The film formation power is RF 500 W, the film formation pressure is 0.2 Pa, and the film is formed in a mixed gas atmosphere of Ar gas and 13% O ₂ . The composition of Mg in the piezoelectric layer 13 is 12 wt.%. The piezoelectric layer 13 has a dielectric constant εr _PIEZ of 9 and a FWHM of 4.6° obtained by the X-ray diffraction rocking curve method on the MgZnO (002) plane. These are the conditions common to all samples.

Next, a plurality of samples were prepared by changing the presence/absence, type, and thickness of the leakage current suppressing layer 15 and the thickness of the piezoelectric layer 13, and the leakage current with respect to the capacitance per unit area of the piezoelectric layer 13 was measured. The ratio C _LS /C _PIEZ of the capacitance per unit area of the suppression layer 15 is calculated. Also, as a piezoelectric characteristic, the piezoelectric constant d33 [pC/N] of each sample is measured. d33 is a value representing the expansion/contraction mode in the polarization direction, and is represented by the amount of polarization charge per unit pressure applied in the polarization direction. In the configuration of the embodiment, the expansion/contraction mode in the film thickness direction, that is, in the c-axis direction is represented.

The piezoelectric constant d33 is evaluated by the following procedure. A sample is placed on the stage with the second electrode 12 facing downward, a predetermined pressure is applied from the upper surface of the sample with an indenter, and the charge generated by polarization in the c-axis (film thickness) direction is measured. The d33 value is obtained by dividing the amount of charge generated when the applied load is changed from 5N to 6N by the load difference of 1N.

In Examples 1 to 4, 6, 9, and 10, Al ₂ O ₃ is formed as the leakage current suppressing layer 15 . The Al ₂ O ₃ film is formed in a mixed gas atmosphere of Ar gas and 11.5% O ₂ under the conditions of power RF of 300 W and pressure of 0.3 Pa using a batch sputtering apparatus. Al ₂ O ₃ has a dielectric constant of 9. First, Examples 1 to 4, 6, 9, and 10 in which an Al ₂ O ₃ film is provided as the leakage current suppressing layer 15 will be described.

The thickness of the piezoelectric layer 13 of Example 1 is 200 nm, and the thickness of the leakage current suppression layer 15 is 25 nm. The piezoelectric constant d33 of this sample is 19.8 pC/N, and the capacitance ratio C _LS /C _PIEZ is 8.000.

In Example 2, the thickness of the piezoelectric layer 13 is 200 nm, and the thickness of the leakage current suppression layer 15 is 50 nm. The piezoelectric constant d33 of this sample is 14.7 pC/N, and the capacitance ratio C _LS /C _PIEZ is 4.000.

The thickness of the piezoelectric layer 13 of Example 3 is 200 nm, and the thickness of the leakage current suppression layer 15 is 75 nm. The piezoelectric constant d33 of this sample is 13.4 pC/N, and the capacitance ratio C _LS /C _PIEZ is 2.667.

The thickness of the piezoelectric layer 13 of Example 4 is 200 nm, and the thickness of the leakage current suppression layer 15 is 125 nm. The piezoelectric constant d33 of this sample is 12.1 pC/N, and the capacitance ratio C _LS /C _PIEZ is 1.600. In Examples 1 to 4, the ratio of the thickness of the leakage current suppressing layer 15 to the thickness of the piezoelectric layer 13 is reflected in the capacitance ratio C _LS /C _PIEZ . There is a tendency for the capacitance ratio and the piezoelectric constant d33 to increase.

The thickness of the piezoelectric layer 13 of Example 6 is 500 nm, and the thickness of the leakage current suppression layer 15 is 100 nm. The piezoelectric constant d33 of this sample is 15.1 pC/N, and the capacitance ratio C _LS /C _PIEZ is 5.000.

The thickness of the piezoelectric layer 13 of Example 9 is 300 nm, and the thickness of the leakage current suppression layer 15 is 10 nm. The piezoelectric constant d33 of this sample is 20.9 pC/N, and the capacitance ratio C _LS /C _PIEZ is 30.000.

The thickness of the piezoelectric layer 13 in Example 10 is 500 nm, and the thickness of the leakage current suppression layer 15 is 10 nm. The piezoelectric constant d33 of this sample is 25.0 pC/N, and the capacitance ratio C _LS /C _PIEZ is 50.000.

In Examples 9 and 10, the piezoelectric constant d33 is improved by increasing the thickness of the piezoelectric layer 13 compared to Examples 1-4. On the other hand, in Example 6, the thickness of the piezoelectric layer 13 is the same as that of the tenth example, but the thickness of the leakage current suppressing layer 15 is ten times as thick as that of the tenth example. Although the piezoelectric characteristics differ due to the difference in the film thickness ratio of the leak current suppressing layer 15 to the piezoelectric layer 13, all of Examples 6, 9, and 10 show good values of the piezoelectric constant d33.

Next, characteristics when a SiO ₂ film is used as the leakage current suppressing layer 15 will be described. The SiO2 film is used in Examples 5 and 8. FIG. In Example 5, the piezoelectric layer 13 is formed with a thickness of 200 nm, and the leakage current suppression layer 15 is formed of SiO ₂ with a thickness of 15 nm. The SiO ₂ film was formed in a mixed gas atmosphere of Ar gas and 5.4% O ₂ under the conditions of power RF of 300 W and pressure of 0.3 Pa using the same batch sputtering apparatus that was used to form the Al ₂ O ₃ film. do. The dielectric constant of _SiO2 is 4. The piezoelectric constant d33 of the sample of Example 5 is 15.3 pC/N, and the capacitance ratio C _LS /C _PIEZ is 5.926.

In Example 8, the piezoelectric layer 13 is formed with a thickness of 500 nm, and the leakage current suppression layer 15 is formed of SiO ₂ with a thickness of 50 nm. The SiO ₂ film was formed in a mixed gas atmosphere of Ar gas and 5.4% O ₂ under the conditions of power RF of 300 W and pressure of 0.3 Pa using the same batch sputtering apparatus that was used to form the Al ₂ O ₃ film. do. The dielectric constant of _SiO2 is 4. The piezoelectric constant d33 of the sample of Example 8 is 14.8 pC/N, and the capacitance ratio C _LS /C _PIEZ is 4.444. The reason why the measurement results are slightly different between Example 5 and Example 8 is considered to be that the film thickness ratio between the piezoelectric layer 13 and the leakage current suppressing layer 15 is slightly different. However, in both Examples 5 and 8, good values of the piezoelectric constant d33 were obtained, and it can be seen that the SiO ₂ film functions effectively as a leakage current suppressing layer.

Next, characteristics when a Si ₃ N ₄ film is used as the leakage current suppressing layer 15 will be described. A Si ₃ N ₄ film is used in Example 7. In Example 7, the piezoelectric layer 13 is formed with a thickness of 500 nm, and a Si ₃ N ₄ film with a thickness of 50 nm is formed as the leakage current suppression layer 15 . The Si ₃ N ₄ film was formed in a mixed gas atmosphere of Ar gas and 20% N ₂ gas using the same batch sputtering apparatus as used for forming the Al ₂ O ₃ film under the conditions of power RF 300 W and pressure 0.3 Pa. form a film. Si ₃ N ₄ has a dielectric constant of 8. The piezoelectric constant d33 of the sample of Example 7 is 18.5 pC/N, and the capacitance ratio C _LS /C _PIEZ is 8.889. A good value of the piezoelectric constant d33 is obtained in the seventh embodiment as well, and it can be seen that the Si ₃ N ₄ film functions effectively as a leakage current suppressing layer.

Next, a comparative example will be explained. In Comparative Example 1, the piezoelectric layer 13 having a thickness of 200 nm is provided, but the leak current suppressing layer 15 is not used. The piezoelectric constant d33 of this sample is 10.2 pC/N. The piezoelectric properties of Comparative Example 1 are used as evaluation criteria.

In Comparative Example 2, a piezoelectric layer 13 with a thickness of 200 nm is provided, and an Al ₂ O ₃ film with a thickness of 225 nm is formed as the leakage current suppression layer 15 . The piezoelectric constant d33 of this sample is 8.3 pC/N, and the capacitance ratio C _LS /C _PIEZ is 0.889. As compared with Examples 1 to 4, the thickness of the leakage current suppressing layer 15 is increased, and the capacitance ratio is decreased, resulting in deterioration of the piezoelectric characteristics.

In Comparative Example 3, a piezoelectric layer 13 with a thickness of 200 nm is provided, and an Al ₂ O ₃ film with a thickness of 300 nm is formed as the leakage current suppression layer 15 . The piezoelectric constant d33 of this sample is 7.5 pC/N, and the capacitance ratio C _LS /C _PIEZ is 0.667. The thickness of the leakage current suppression layer 15 is further increased than in Comparative Example 2, the capacitance ratio is decreased, and the piezoelectric characteristics are degraded.

In Comparative Example 4, a piezoelectric layer 13 with a thickness of 200 nm is provided, and a SiO ₂ film with a thickness of 80 nm is formed as the leakage current suppression layer 15 . The piezoelectric constant d33 of this sample is 9.0 pC/N, and the capacitance ratio C _LS /C _PIEZ is 1.111. Although the same SiO ₂ film as in Example 5 is used as the leakage current suppression layer 15, the thickness of the leakage current suppression layer 15 is increased compared to Example 5, so the capacitance ratio is reduced and the piezoelectric characteristics are lowered. is doing.

In Comparative Example 5, a piezoelectric layer 13 with a thickness of 300 nm is provided, and an Al ₂ O ₃ film with a thickness of 5 nm is formed as the leakage current suppression layer 15 . The piezoelectric constant d33 of this sample is 9.5 pC/N, and the capacitance ratio C _LS /C _PIEZ is 60.000. Although the same Al ₂ O ₃ film as in Examples 1 to 4, 6, 9, and 10 is used as the leakage current suppression layer 15, the thickness of the leakage current suppression layer 15 is as thin as 5 nm, and the capacitance ratio does not increase. However, the piezoelectric characteristics are lower than those of Comparative Example 1, which serves as a reference. It can be seen that if the thickness of the leakage current suppression layer 15 is too thin, the leakage current suppression effect cannot be obtained.

FIG. 3 is a diagram plotting the relationship between the film thickness of the leak current suppression layer 15 and the piezoelectric constant d33 based on the evaluation results of FIG. Comparative Example 1 in which the leakage current suppressing layer 15 is not provided is used as a reference (initial characteristics), and the samples of Examples 1 to 10, in which the piezoelectric characteristics are improved from the initial characteristics, are regarded as effective samples. In FIG. 3, the piezoelectric properties of Comparative Example 1 are indicated by white triangles on the vertical axis. A dotted line parallel to the horizontal axis is the reference line. The piezoelectric properties of Comparative Examples 2-5 are lower than the reference. Of these, in Comparative Examples 2, 3, and 4, the film thickness ratio of the leak current suppressing layer 15 to the piezoelectric layer 13 is too large, so the capacitance ratio is lowered and sufficient piezoelectric characteristics are not obtained. On the other hand, in Comparative Example 5, since the film thickness ratio of the leakage current suppression layer 15 to the piezoelectric layer 13 is too small, the electrostatic capacitance ratio increases, but the leakage current suppression effect of the leakage current suppression layer 15 is increased. Piezoelectric characteristics are degraded because they cannot be exhibited.

4A and 4B are plots of the piezoelectric constant d33 as a function of the capacitance ratio C _LS /C _PIEZ . FIG. 5 is an enlarged view near the threshold in FIGS. 4A and 4B. FIG. 4A shows the distribution of the piezoelectric constant d33 _when the capacitance ratio C _LS /C _PIEZ is in the range of 0 to 10, and FIG _. The distribution of the piezoelectric constant d33 is shown in the range. Looking only at FIG. 4A, it appears that increasing the capacitance ratio improves the piezoelectric properties. By referring to FIG. 4B, it can be seen that sufficient piezoelectric control cannot be obtained even if the capacitance ratio is too large, that is, if the leakage current suppression layer 15 is too thin. From FIG. 4B, it is desirable that the capacitance ratio be less than 60.00.

In FIG. 5, in order to obtain the lower threshold of the capacitance ratio C _LS /C _PIEZ , fitting is performed using data points near the reference line (dotted line) horizontal to the horizontal axis. A fitting curve obtained from data points near the baseline is given by y=4.4272In(x)+9.0353. The coefficient of determination ^R2 of this fitting curve is 0.9479, indicating a very strong correlation.

Based on the piezoelectric characteristics of Comparative Example 1 in which the leakage current suppression layer 15 is not provided, the piezoelectric characteristics are equivalent to or improved from the initial characteristics when the capacitance ratio C _LS /C _PIEZ is 1.20 or more. 00, preferably 1.25 or more and less than 60.00, more preferably 1.29 or more and less than 60.00. The d33 value when the ratio C _LS /C _PIEZ is 1.20 is within the range of ±3% from the initial characteristics, and the d33 value when the ratio C _LS /C _PIEZ is 1.25 is ±2% from the initial characteristics. is within the range of , and can be regarded as within the range of error. From this, the capacitance relationship between the leak current suppression layer 15 and the piezoelectric layer 13 of the piezoelectric element 10 is as follows:
1.20≦C _LS /C _PIEZ <6.00
is guided.

FIG. 6 is a schematic diagram of a sensor 100 using the piezoelectric element 10 of the embodiment. The sensor 100 has a piezoelectric element 10 , a charge amplifier 24 and a display device 25 . When a mechanical force is applied to the piezoelectric element 10, the piezoelectric effect generates an amount of electric charge proportional to the applied force. By amplifying the generated charge with the charge amplifier 24 and outputting it to the display device 25, it is used as a pressure sensor.

Instead of directly measuring the generated charge amount, the resistance change due to strain may be measured. In this case, a bridge circuit is connected between the first electrode 16 and the second electrode 12 (between the first electrode 16 and the substrate 21 when a conductive substrate 21 is used) to convert the resistance change into a voltage change. It may be converted, amplified, analog-to-digital converted, etc., and then output.

When using the inverse piezoelectric effect of the piezoelectric element 10, an electric field applying means may be used to control the electric field applied to the piezoelectric element 10 and use it as an actuator. Due to the inverse piezoelectric effect, strain occurs according to the applied electric field. In the piezoelectric element, the leakage current suppressing layer 15 provides good d33 characteristics representing the expansion/contraction mode in the polarization direction, so an actuator with good drive efficiency can be obtained.

In both the case of using the piezoelectric effect and the case of using the inverse piezoelectric effect, the piezoelectric element 10 suppresses the generation of minute leakage current in the piezoelectric layer 13, and the device to which the piezoelectric element 10 is applied has good piezoelectric characteristics. shown.

Although the present invention has been described based on specific embodiments, the present invention is not limited to the above-described configuration examples. For example, the piezoelectric layer 13 may be formed by stacking two or more layers of piezoelectric films. The main component of each piezoelectric film may be the same material or may be different materials. From the viewpoint of lattice constant matching, the same material may be used for the main component. A subcomponent may be added to at least a part of the piezoelectric film. The subcomponents added in each layer may be the same or different. In any case, the film thickness of the piezoelectric layer as a whole is 5 μm or less, preferably 3 μm or less, more preferably 2 μm or less, more preferably 1 μm or less, and further preferably 500 nm or less. The material and thickness of the leakage current suppressing layer are determined so that 1.20≦C _LS /C _PIEZ <60.00 is satisfied in relation to the dielectric constant and film thickness of the entire piezoelectric layer. _The leakage current suppression layer is made of ZrO2, _TiO2 , AlN, _Ta2O5 _, or _two of these, in addition to _Al2O3 , _SiO2 , and _Si3N4 _, within the range that satisfies this capacitance ratio condition. Combinations of the above may also be used. If the dielectric constant of the leakage current suppressing layer is too high, it may become difficult for high-frequency signals to pass through, resulting in a dull signal waveform. Among the above materials, Al ₂ O ₃ , SiO ₂ and Si ₃ N ₄ are particularly suitable for the leakage current suppression layer when the piezoelectric element is applied to a high frequency device.

This application is based on Japanese Patent Application No. 2021-014369 filed on February 1, 2021 and Japanese Patent Application No. 2022-008468 filed on January 24, 2022. It claims the right and includes the entire contents of these Japanese patent applications.

10A to 10F

piezoelectric elements

11, 21 substrate 12 electrode (second electrode)
13 piezoelectric layers 15, 15-1, 15-2 leakage current suppression layer 16 electrode (first electrode)
100 sensor

Claims

A piezoelectric layer and a first electrode are laminated in this order on a substrate,
A leakage current suppression layer is disposed between at least one of the first electrode and the piezoelectric layer or between the substrate and the piezoelectric layer,
A ratio of the capacitance per unit area of the leakage current suppression layer to the capacitance per unit area of the piezoelectric layer is 1.20 or more and less than 60.00.
Piezoelectric element.
A ratio of the capacitance per unit area of the leakage current suppression layer to the capacitance per unit area of the piezoelectric layer is 1.29 or more and less than 60.00.
The piezoelectric element according to claim 1.
wherein the substrate is a flexible substrate;
The piezoelectric element according to claim 1 or 2.
The piezoelectric element according to any one of claims 1 to 3, wherein the substrate is a conductive substrate.
the substrate is an insulating substrate;
a second electrode disposed between the substrate and the piezoelectric layer;
A piezoelectric element according to any one of claims 1 to 3.
The piezoelectric layer has a wurtzite crystal structure,
The piezoelectric element according to any one of claims 1-5.
The piezoelectric element according to any one of claims 1 to 6, wherein the leakage current suppressing layer is an amorphous insulating layer.
The leakage current suppression layer is an amorphous layer of Al2O3 , SiO2 , Si3N4 , ZrO2, TiO2 , AlN, Ta2O5 , or a combination of two or more thereof.
The piezoelectric element according to any one of claims 1-7.
The full width at half maximum of the piezoelectric layer according to the X-ray rocking curve method is 5° or less.
The piezoelectric element according to any one of claims 1-8.
A sensor using the piezoelectric element according to any one of claims 1 to 9.
A piezoelectric element according to any one of claims 1 to 9;
an electric field applying means for applying a predetermined electric field to the piezoelectric element;
actuator.