WO2022158233A1 - 光検出装置、電子機器及び測距システム - Google Patents
光検出装置、電子機器及び測距システム Download PDFInfo
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- 238000001514 detection method Methods 0.000 title abstract description 16
- 238000005259 measurement Methods 0.000 title description 16
- 239000004065 semiconductor Substances 0.000 claims abstract description 258
- 239000000758 substrate Substances 0.000 claims abstract description 168
- 238000000926 separation method Methods 0.000 claims abstract description 69
- 238000006243 chemical reaction Methods 0.000 claims abstract description 30
- 239000011159 matrix material Substances 0.000 claims abstract description 16
- 239000012535 impurity Substances 0.000 claims description 23
- 238000009825 accumulation Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 8
- 229910052721 tungsten Inorganic materials 0.000 claims description 8
- 239000010937 tungsten Substances 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- -1 tungsten nitride Chemical class 0.000 claims description 2
- 238000000034 method Methods 0.000 description 59
- 238000003384 imaging method Methods 0.000 description 25
- 238000010586 diagram Methods 0.000 description 24
- 238000004891 communication Methods 0.000 description 18
- 238000012545 processing Methods 0.000 description 18
- 238000003860 storage Methods 0.000 description 16
- 230000000052 comparative effect Effects 0.000 description 15
- 238000005286 illumination Methods 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 14
- 230000006870 function Effects 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 230000003287 optical effect Effects 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000005401 electroluminescence Methods 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 238000010791 quenching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000005266 casting Methods 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000171 quenching effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000036772 blood pressure Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000007646 gravure printing Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000813 microcontact printing Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000007645 offset printing Methods 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14629—Reflectors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C3/00—Measuring distances in line of sight; Optical rangefinders
- G01C3/02—Details
- G01C3/06—Use of electric means to obtain final indication
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
- G01S17/06—Systems determining position data of a target
- G01S17/08—Systems determining position data of a target for measuring distance only
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/88—Lidar systems specially adapted for specific applications
- G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
- G01S17/894—3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
- G01S7/481—Constructional features, e.g. arrangements of optical elements
- G01S7/4816—Constructional features, e.g. arrangements of optical elements of receivers alone
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14649—Infrared imagers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
Definitions
- the present disclosure relates to a photodetector, an electronic device, and a ranging system.
- a SPAD Single Photon Avalanche Diode
- one light (photon) is incident, and electrons (charges) generated by photoelectric conversion are multiplied in the PN junction region (avalanche amplification), thereby detecting light with high accuracy.
- the distance measuring system the distance can be measured with high accuracy by detecting the timing at which the current due to the multiplied electrons flows.
- PDE Photodetection Efficiency
- the present disclosure proposes a photodetector, an electronic device, and a ranging system that can further improve the photodetection efficiency.
- a pixel array unit including a plurality of pixels that are arranged in a matrix on a semiconductor substrate and detect light, each pixel surrounds each pixel and separates each pixel from each other.
- a separation wall a photoelectric conversion section provided in the semiconductor substrate for generating electric charge by light, a multiplication region provided in the semiconductor substrate for amplifying the electric charge from the photoelectric conversion section, and outside the semiconductor substrate.
- first and second reflecting portions for reflecting light toward the inside of the semiconductor substrate; Provided is the photodetector provided so as to protrude from the wall toward the center of the pixel, and wherein the second reflecting portion is provided on a second surface of the semiconductor substrate that faces the first surface.
- a pixel array section including a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light
- the pixels surround the pixels and connect the pixels to each other.
- a pixel separation wall for separation;
- a photoelectric conversion section provided in the semiconductor substrate for generating charge by light;
- a multiplication region provided in the semiconductor substrate for amplifying the charge from the photoelectric conversion section;
- first and second reflectors for reflecting light directed to the outside of the semiconductor substrate into the semiconductor substrate, wherein the first reflector is on a first surface of the semiconductor substrate that receives light
- the photodetector is provided so as to protrude from the pixel separation wall toward the center of the pixel, and the second reflection section is provided on a second surface of the semiconductor substrate that faces the first surface.
- an illumination device that emits irradiation light and a photodetector that receives reflected light of the irradiation light reflected by an object are provided, and the photodetector is arranged in a matrix on a semiconductor substrate.
- a pixel array portion including a plurality of pixels arranged in a row and detecting light, each pixel including: a pixel separation wall surrounding and separating each pixel; and a pixel separation wall provided in the semiconductor substrate.
- a photoelectric conversion portion for generating charges by light
- a multiplication region provided in the semiconductor substrate for amplifying the charges from the photoelectric conversion portion
- first and second reflecting portions wherein the first reflecting portion protrudes from the pixel separation wall toward the center of the pixel on the light-receiving first surface of the semiconductor substrate
- the second reflector is provided on a second surface of the semiconductor substrate that faces the first surface.
- FIG. 2 is an explanatory diagram for explaining an example of a circuit configuration of a pixel 10;
- FIG. 4 is a graph showing changes in the cathode voltage VS of the photodiode 20 and the detection signal PF out according to incident light.
- 3 is a block diagram showing a configuration example of a photodetector 501.
- FIG. 2 is a block diagram showing a configuration example of a distance measuring system 611 incorporating a photodetector 501.
- FIG. FIG. 3 is a schematic plan view showing an example of a detailed configuration of a pixel 10a according to a comparative example;
- FIG. 3 is a cross-sectional schematic diagram showing an example of a detailed configuration of a pixel 10a according to a comparative example
- 1 is a schematic plan view showing an example of a detailed configuration of a pixel 10 according to the first embodiment of the present disclosure
- FIG. 1 is a cross-sectional schematic diagram showing an example of a detailed configuration of a pixel 10 according to the first embodiment of the present disclosure
- FIG. 4 is a schematic plan view showing an example of a detailed configuration of a pixel 10 according to a second embodiment of the present disclosure
- FIG. FIG. 10 is a cross-sectional schematic diagram (part 1) showing an example of a detailed configuration of a pixel 10 according to the second embodiment of the present disclosure
- FIG. 5 is a cross-sectional schematic diagram (Part 2) showing an example of the detailed configuration of the pixel 10 according to the second embodiment of the present disclosure
- FIG. 10 is a schematic plan view showing an example of a detailed configuration of a pixel 10 according to a third embodiment of the present disclosure
- FIG. 11 is an explanatory diagram for explaining a detailed configuration of a pixel 10 according to a fourth embodiment of the present disclosure
- FIG. 11 is an explanatory diagram for explaining a detailed configuration of a pixel 10 according to a fifth embodiment of the present disclosure
- FIG. FIG. 13 is a schematic plan view showing an example of a detailed configuration of a pixel array section 512 according to the sixth embodiment of the present disclosure
- FIG. 11 is a schematic plan view showing an example of a detailed configuration of a pixel 10 according to a sixth embodiment of the present disclosure
- FIG. 11 is a cross-sectional schematic diagram (part 1) showing an example of a detailed configuration of a pixel 10 according to the sixth embodiment of the present disclosure
- FIG. 21 is a schematic cross-sectional view (part 2) showing an example of the detailed configuration of the pixel 10 according to the sixth embodiment of the present disclosure
- FIG. 12 is a schematic diagram (part 1) for explaining a method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 21 is a schematic diagram (part 2) for explaining the method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 20 is a schematic diagram (Part 3) for explaining a method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 21 is a schematic diagram (part 4) for explaining the method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 20 is a schematic diagram (No. 5) for explaining the method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 21 is a schematic diagram (No. 6) for explaining the method for manufacturing the pixel 10 according to the seventh embodiment of the present disclosure
- FIG. 2 is a block diagram showing a configuration example of a smart phone 900 as an electronic device to which a ranging system 611 according to an embodiment of the present disclosure is applied;
- the drawings referred to in the following description are drawings for explaining the embodiments of the present disclosure and promoting understanding thereof, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings are actual. may differ.
- the photodetector shown in the drawings and the components included in the photodetector can be appropriately changed in design in consideration of the following description and known techniques.
- the vertical direction of the laminated structure of the photodetector is the case where the photodetector is arranged so that the light incident on the photodetector is directed from the bottom to the top. shall correspond to the relative orientation of
- electrically connected refers to a connection in which electricity (signal) is conducted between a plurality of elements. means that in addition, "electrically connected” in the following description includes not only the case of directly and electrically connecting a plurality of elements, but also the case of indirectly and electrically connecting a plurality of elements through other elements. It also includes the case of connecting to
- gate refers to the gate electrode of a field effect transistor.
- drain represents the drain region of the field effect transistor, and “source” represents the source region of the field effect transistor.
- first conductivity type refers to either “p-type” or “n-type”
- second conductivity type refers to the “p-type” different from the “first conductivity type”. ” or “n-type”.
- the term "provided in common” means that another element is provided so as to be shared by a plurality of one elements, in other words , other elements are shared by each of the predetermined number of one elements.
- FIG. 1 is an explanatory diagram for explaining an example of the circuit configuration of the pixel 10.
- FIG. 1 shows a photodiode (light-receiving element) 20 having a SPAD (Single Photon Avalanche Diode) structure, which is applicable to a distance measuring sensor that measures distance by a direct ToF (Time-of-Flight) method.
- SPAD Single Photon Avalanche Diode
- FIG. 1 shows a circuit configuration of a pixel 10 including;
- the pixel 10 includes a photodiode 20, a constant current source 22, an inverter 24, and a transistor 26, as shown in FIG.
- the photodiode 20 has a SPAD structure and can be operated at a bias voltage higher than the breakdown voltage VBD (Geiger mode).
- the photodiode 20 detects one light (photon) for each pixel 10 by multiplying electrons (charges) generated by photoelectric conversion in a high electric field PN junction region provided for each pixel 10. It is an element that can Specifically, the photodiode 20 avalanche-multiplies electrons (charges) generated by incident light and outputs a signal voltage VS obtained by the multiplication to the inverter 24 (single-photon avalanche photodiode). ).
- Photodiode 20 has a cathode electrically connected to constant current source 22 , the input terminal of inverter 24 , and the drain of transistor 26 . Furthermore, the photodiode 20 has an anode electrically connected to a power supply. For example, in order to efficiently detect light (photons), a voltage higher than the breakdown voltage VBD of the photodiode 20 (hereinafter referred to as excess bias) is applied to the photodiode 20 . Further, the power supply voltage VCC supplied to the anode of the photodiode 20 is, for example, the same negative bias (negative potential) as the breakdown voltage VBD of the photodiode 20 .
- the constant current source 22 is composed of, for example, a p-type MOS (Metal Oxide Semiconductor) transistor that operates in the saturation region, and performs passive quenching by acting as a quenching resistor.
- a power supply voltage VE is supplied to the constant current source 22 .
- a pull-up resistor or the like may be used as the constant current source 22 instead of the p-type MOS transistor.
- the drain of the transistor 26 is connected to the cathode of the photodiode 20, the input terminal of the inverter 24, and the constant current source 22, and the source of the transistor 26 is connected to ground (GND).
- a control signal is supplied to the gate of the transistor 26 from a pixel driving section (not shown) that drives the pixel 10 .
- a Lo (Low) control signal is supplied from the pixel driving section to the gate of the transistor 26 .
- a Hi (High) control signal is supplied from the pixel driving section to the gate of the transistor 26 .
- effective pixels are pixels that can detect light, while pixels that are not effective pixels mean pixels that do not detect light.
- the inverter 24 outputs a Hi signal PF out when the voltage VS from the cathode of the photodiode 20 as an input signal is Lo, and outputs a Lo signal PF out when the voltage VS from the cathode is Hi. do.
- FIG. 2 is a graph showing changes in the cathode voltage VS of the photodiode 20 and the detection signal PF out according to incident light.
- the transistor 26 is turned off by the Lo control signal.
- the cathode of the photodiode 20 is supplied with the power supply voltage VE, and the anode thereof is supplied with the power supply VCC. Therefore, by applying a reverse voltage higher than the breakdown voltage VBD to the photodiode 20, the photodiode 20 is set to the Geiger mode. In this state, the cathode voltage VS of the photodiode 20 is the same as the power supply voltage VE.
- avalanche multiplication occurs and current flows through the photodiode 20 .
- a current also flows through the p-type MOS transistor as the constant current source 22, and the resistance component of the MOS transistor causes a voltage rise. A descent will occur.
- the cathode voltage VS of the photodiode 20 becomes lower than 0 V
- a reverse voltage smaller than the breakdown voltage VBD is applied to the photodiode 20, so avalanche multiplication stops.
- the current generated by the avalanche multiplication flows through the constant current source 22 to generate a voltage drop, and the cathode voltage VS becomes lower than 0 V with the generated voltage drop, thereby performing the avalanche multiplication.
- the operation to stop is called a quench operation.
- a Hi (High) PF out signal is output during the period from time t1 to time t3.
- a Hi control signal is supplied from the pixel driving section (not shown) to the gate of the transistor 26 to turn on the transistor 26 .
- the cathode voltage VS of the photodiode 20 becomes 0 V (GND)
- the anode-cathode voltage of the photodiode 20 becomes equal to or less than the breakdown voltage VBD. never.
- FIG. 3 is a block diagram showing a configuration example of the photodetector 501. As shown in FIG. 3
- the photodetector 501 has a pixel driving section 511, a pixel array section 512, a MUX (multiplexer) 513, a time measuring section 514, and an input/output section 515.
- a pixel driving section 511 a pixel driving section 511
- a pixel array section 512 a pixel array section 512
- a MUX (multiplexer) 513 a time measuring section 514
- an input/output section 515 As shown in FIG. 3, for example, the photodetector 501 has a pixel driving section 511, a pixel array section 512, a MUX (multiplexer) 513, a time measuring section 514, and an input/output section 515.
- Pixels 10 are arranged in a matrix in a pixel array portion 512, which will be described later, and pixel drive lines 522 are horizontally wired for each row of the pixels 10.
- the pixel drive section 511 drives each pixel 10 by supplying a predetermined drive signal to each pixel 10 through the pixel drive line 522 .
- the pixel drive unit 511 drives part of the plurality of pixels 10 two-dimensionally arranged in a matrix at timing corresponding to a light emission timing signal supplied from the outside via an input/output unit 515, which will be described later. It is possible to perform control to make it an effective pixel.
- the pixel array unit 512 has a configuration in which the pixels 10 that detect light and output detection signals PF out indicating detection results as pixel signals are two-dimensionally arranged in rows and columns in a matrix. Note that the number of rows and the number of columns of the pixels 10 in the pixel array section 512 are not limited to the numbers shown in FIG. Then, as described above, the pixel driving lines 522 are wired in the horizontal direction for each pixel row in the matrix-like pixel arrangement of the pixel array section 512 . Furthermore, although the pixel drive line 522 is shown as one wiring, it can be configured with a plurality of wirings. Also, one end of the pixel driving line 522 is connected to an output terminal corresponding to each pixel row of the pixel driving section 511 .
- the MUX 513 selects outputs from effective pixels in accordance with switching between effective pixels and non-effective pixels in the pixel array section 512, and outputs pixel signals input from the selected effective pixels to the time measurement section 514, which will be described later. can be done.
- Time measurement unit 5114 Based on the pixel signal of the effective pixel supplied from the MUX 513 and the light emission timing signal indicating the light emission timing of the light emission source (not shown), the time measurement unit 514 measures the time when the effective pixel emits light after the light emission source emits light. generates a count value corresponding to the time to detect The light emission timing signal is externally supplied via an input/output unit 515, which will be described later.
- the input/output unit 515 outputs the effective pixel count value supplied from the time measurement unit 514 to the outside as a pixel signal.
- the input/output unit 515 also supplies an externally supplied light emission timing signal to the pixel driving unit 511 and the time measurement unit 514 .
- FIG. 4 is a block diagram showing a configuration example of a distance measuring system 611 incorporating the photodetector 501.
- the ranging system 611 is a system that captures a range image using, for example, the ToF method.
- the distance image is an image composed of distance pixel signals based on the detected distance detected by detecting the distance in the depth direction from the distance measuring system 611 to the subjects 612 and 613 for each pixel.
- the ranging system 611 has an illumination device 621 and an imaging device 622. The details of each block included in the distance measuring system 611 will be described below.
- the illumination device 621 has an illumination controller 631 and a light source 632 as shown in FIG.
- the illumination control unit 631 controls the pattern of light irradiation from the light source 632 under the control of the control unit 642 of the imaging device 622 .
- the illumination control unit 631 controls the pattern in which the light source 632 emits light according to the irradiation code included in the irradiation signal supplied from the control unit 642 .
- the irradiation code consists of two values of 1 (High) and 0 (Low). 632 is turned off.
- the light source 632 emits light in a predetermined wavelength range under the control of the illumination control section 631 .
- Light source 632 may comprise, for example, an infrared laser diode. Note that the type of the light source 632 and the wavelength range of the irradiation light can be arbitrarily set according to the application of the distance measuring system 611 and the like.
- the imaging device 622 is a device that receives light (irradiation light) emitted from the illumination device 621 and reflected by the subject 612 and the subject 613 or the like.
- the imaging device 622 has an imaging unit 641, a control unit 642, a display unit 643, and a storage unit 644, as shown in FIG.
- the imaging unit 641 has a lens 651, a signal processing circuit 653, and a photodetector 501, as shown in FIG.
- the lens 651 can form an image of incident light on the light receiving surface of the photodetector 501 .
- the configuration of the lens 651 is arbitrary, and for example, it is possible to configure the lens 651 with a plurality of lens groups.
- the photodetector 501 described above can be applied to the photodetector 501 .
- the photodetector 501 Under the control of the control unit 642 , the photodetector 501 receives reflected light from the subject 612 , the subject 613 , and the like, and supplies the resulting pixel signal to the signal processing circuit 653 .
- the pixel signal indicates a digital count value obtained by counting the time from when the illumination device 621 emits irradiation light until when the photodetector device 501 receives the light.
- a light emission timing signal indicating the timing at which the light source 632 emits light is supplied from the controller 642 to the photodetector 501 .
- the signal processing circuit 653 processes pixel signals supplied from the photodetector 501 under the control of the control unit 642 . For example, the signal processing circuit 653 detects the distances to the subjects 612 and 613 for each pixel 10 based on the pixel signals supplied from the photodetector 501, and indicates the distances to the subjects 612 and 613 for each pixel 10. Generate a range image. Specifically, the signal processing circuit 653 measures the time (count value) from when the light source 632 emits light to when each pixel 10 of the photodetector 501 receives light a plurality of times (for example, Thousands to tens of thousands of times). The signal processing circuit 653 creates a histogram corresponding to the acquired times.
- the signal processing circuit 653 determines the time until the light emitted from the light source 632 is reflected by the object 612 or 613 and returns. Further, the signal processing circuit 653 performs calculations to find the distances to the objects 612 and 613 based on the determined time and speed of light. The signal processing circuit 653 then supplies the generated distance image to the control section 642 .
- the control unit 642 is composed of, for example, a control circuit such as an FPGA (Field Programmable Gate Array) or a DSP (Digital Signal Processor), a processor, or the like.
- the controller 642 controls the illumination controller 631 and the photodetector 501 . Specifically, the controller 642 supplies an irradiation signal to the illumination controller 631 and a light emission timing signal to the photodetector 501 .
- the light source 632 emits irradiation light according to the irradiation signal.
- the light emission timing signal may be an illumination signal supplied to the illumination control section 631 .
- the control unit 642 supplies the distance image acquired from the imaging unit 641 to the display unit 643 and causes the display unit 643 to display it. Furthermore, the control unit 642 stores the distance image acquired from the imaging unit 641 in the storage unit 644 . Also, the control unit 642 outputs the distance image acquired from the imaging unit 641 to the outside.
- the display unit 643 is, for example, a panel-type display device such as a liquid crystal display device or an organic EL (Electro Luminescence) display device.
- a panel-type display device such as a liquid crystal display device or an organic EL (Electro Luminescence) display device.
- the storage unit 644 can be configured by any storage device, storage medium, or the like, and stores distance images and the like.
- FIG. 5 is a schematic plan view showing an example of the detailed configuration of the pixel 10a according to the comparative example. plane.
- FIG. 6 is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10a according to the comparative example, and specifically shows a cross section taken along line AA' shown in FIG.
- the comparative example means the pixel 10a that the inventors of the present invention repeatedly studied before making the embodiment of the present disclosure.
- the pixels 10a are of the back-illuminated type, in which light is incident from the lower surface (back surface 100a) side of FIG.
- the pixel 10a is not limited to the back-illuminated type, and is a front-illuminated pixel in which light is incident via a wiring layer (not shown) provided on the front surface 100b (see FIG. 6) of the semiconductor substrate. 10a.
- the cross-sectional configuration of the pixel 10a will be described.
- the cross-sectional view of the pixel 10a shown in FIG. 6 mainly shows the structure related to the semiconductor substrate 100, the lower side of FIG. 140, etc. are formed.
- the back surface 100a serves as a light receiving surface on which reflected light reflected from the subjects 612 and 613 is incident.
- the upper side of FIG. 6 is the surface 100b side of the semiconductor substrate 100, and although not shown, wiring layers (not shown) including circuits for driving the pixels 10a are formed.
- the pixel 10a includes an n-type sub-region 102, a p-type semiconductor region 104, an n-type semiconductor region 106, and a high-concentration semiconductor region 106 provided in an n-type semiconductor substrate 100 made of silicon. It has an n-type semiconductor region 106a, a hole accumulation region 108, and a high-concentration p-type semiconductor region 108a.
- the pixel 10a has a pixel separation portion (pixel separation wall) 120 that surrounds the pixel 10a and separates it from other adjacent pixels 10a.
- the pixel 10 has a cathode electrode 130 electrically connected to the high-concentration n-type semiconductor region 106a and an anode electrode 132 electrically connected to the high-concentration p-type semiconductor region 108a. Furthermore, the pixel 10 a has an on-chip lens (lens portion) 140 on the back surface 100 a of the semiconductor substrate 100 .
- the n-type sub-region (photoelectric conversion portion) 102 is a region with a low impurity concentration in the semiconductor substrate 100 having n-type conductivity, absorbs light, and converts electrons (charges) generated by photoelectric conversion into an avalanche region, which will be described later. Generating an electric field that transfers to the multiplication region.
- a p-type semiconductor region 104 and an n-type semiconductor region 106 are laminated on the n-type sub-region 102 in the semiconductor substrate 100 so as to form a PN junction.
- a depletion layer generated in a region where the p-type semiconductor region 104 and the n-type semiconductor region 106 are joined forms the above-described avalanche multiplication region.
- the balanche multiplication region can amplify electrons (charge).
- the impurity concentration of the n-type sub-region 102 is preferably set to a low concentration of 1E+14/cm 3 or less. By doing so, the photodetection efficiency called PDE (Photon Detection Efficiency) can be improved.
- the impurity concentration of each of the n-type semiconductor region 106 and the p-type semiconductor region 104 forming the avalanche multiplication region is preferably set to a high concentration of 1E+16/cm 3 or more.
- the n-type semiconductor region 106 has a high-concentration n-type semiconductor region 106a, which is a semiconductor region containing a high concentration of n-type impurities, formed at a predetermined depth from the surface 100b side of the semiconductor substrate 100 at the upper center thereof. have.
- the high-concentration n-type semiconductor region 106a functions as a contact portion connected to a cathode electrode (cathode portion) 130 for supplying a negative voltage for forming an avalanche multiplication region. Therefore, the power supply voltage VE is applied from the cathode electrode 130 to the high-concentration n-type semiconductor region 106a.
- the hole accumulation region 108 is a p-type semiconductor region formed so as to surround the outer surface of the n-type sub-region 102 and cover the inner surface of the pixel separation section 120, and accumulate holes generated by photoelectric conversion. be able to.
- the hole accumulation region 108 traps electrons generated at the interface with the pixel separation portion 120, which will be described later, and has the effect of suppressing DCR (dark count rate).
- DCR dark count rate
- a high-concentration p-type semiconductor region 108a having a high p-type impurity concentration is provided in a region of the hole accumulation region 108 near the surface 100b of the semiconductor substrate 100.
- the high-concentration p-type semiconductor region 108 a functions as a contact portion connected to the anode electrode (anode portion) 132 . Therefore, the power supply voltage VCC is applied from the anode electrode 132 to the high-concentration p-type semiconductor region 108a.
- the cathode electrode 130 and the anode electrode 132 described above are provided on the surface (second surface) 100b of the semiconductor substrate 100 via an insulating film (not shown). preferably formed.
- the cathode electrode 130 and the anode electrode 132 can transmit the semiconductor substrate 100 and reflect the light emitted from the surface 100 b of the semiconductor substrate 100 to the inside of the semiconductor substrate 100 .
- the photodetection efficiency (PDE) of 10a can be improved. That is, the cathode electrode 130 and the anode electrode 132 can function as a reflecting portion (second reflecting portion) that reflects light.
- the reflecting portion for reflecting the light emitted from the surface 100b of the semiconductor substrate 100 to the inside of the semiconductor substrate 100 may not be provided as the cathode electrode 130 or the anode electrode 132. It may be provided as a part.
- a pixel separation portion (pixel separation wall) 120 for separating the pixels 10a is provided in the pixel boundary portion of the pixel 10a which is the boundary with the adjacent pixel 10a.
- the pixel separation section 120 may have, for example, a double structure in which the outer side (n-type sub-region 102 side) of a metal film such as tungsten (W) is covered with an insulating film such as a silicon oxide film and a barrier metal film.
- each semiconductor region of the pixel 10a has a conductivity type that is the opposite of the conductivity type described above.
- the cathode electrode 130 and the anode electrode 132 are made of metal or the like that reflects light, so that the light transmitted through the semiconductor substrate 100 is transferred to the semiconductor substrate 100. It is reflected inside the substrate 100 .
- the light transmitted through the semiconductor substrate 100 can be absorbed again by the photodiode 20 in the semiconductor substrate 100, so that the PDE of the pixel 10a can be improved.
- a reflecting portion for reflecting light is provided on the front surface 100b side of the semiconductor substrate 100, so that the light transmitted through the semiconductor substrate 100 is reflected to the inside of the semiconductor substrate 100 by the reflecting portion. Therefore, the photodetection efficiency (PDE) of the pixel 10a can be improved.
- the pixel 10a according to the comparative example since there is no reflecting portion that reflects light as described above on the side of the back surface 100a of the semiconductor substrate 100, the light emitted from the back surface 100a to the outside is reflected by the semiconductor substrate 100. It cannot be made to enter the interior again. Therefore, in the pixel 10a according to the comparative example, since the incident light is not sufficiently utilized, there is a limit to the improvement of the photodetection efficiency (PDE).
- PDE photodetection efficiency
- the present inventors have made extensive studies on the structure of the pixel 10a in order to further improve the light detection efficiency, and created the first embodiment of the present disclosure described below. reached.
- the reflecting portion for reflecting light is provided only on the surface 100b side of the semiconductor substrate 100, but the pixel according to the first embodiment of the present disclosure created by the present inventors 10 (see FIG. 7), a reflecting portion 122 (see FIGS. 7 and 8) for reflecting light is also provided on the back surface 100a side of the semiconductor substrate 100.
- the reflecting portion 122 for reflecting light is provided not only on the front surface 100b side of the semiconductor substrate 100 but also on the back surface 100a side, so that the light emitted from the back surface 100a to the outside is can be reflected into the semiconductor substrate 100 . Furthermore, in the present embodiment, since it is necessary to allow light to enter the photodiode 20 in the semiconductor substrate 100, it is necessary to provide the reflecting section 122 on the rear surface 100a side without obstructing the passage of such light. , the reflecting portion 122 is provided so as to protrude (protrude) from the pixel separation portion 120 by a small amount.
- the light emitted from the back surface 100 a to the outside can be reflected inside the semiconductor substrate 100 , so that the photodiode 20 can absorb the light again.
- Detection efficiency (PDE) can be further improved.
- FIG. 7 is a schematic plan view showing an example of the detailed configuration of the pixel 10 according to this embodiment. Specifically, FIG. 7 shows a plane of a pixel array portion 512 in which four pixels 10 are arranged in a 2 ⁇ 2 matrix, viewed from above the back surface (first surface) 100a side of the semiconductor substrate 100. Illustration of the chip lens 140 (see FIG. 8) is omitted. In addition, in FIG. 7, in order to make it easy to understand the positional relationship of the constituent elements, the configuration is schematically shown, and may differ from the actual detailed configuration.
- each pixel 10 is formed in a grid pattern, that is, a pixel separating portion (pixel separating portion) having a substantially rectangular frame shape surrounding the pixel 10a. are separated from each other by a separation wall 120 .
- a reflective portion (first reflective portion) 122 is provided on the pixel separating portion 120 .
- the reflective portion 122 is provided so as to protrude (protrude) from the pixel separation portion 120 toward the center of the pixel 10 . That is, the width of the reflective portion 122 is wider than the width of the pixel separating portion 120 . Therefore, the pixel separation section 120 is not shown in FIG. 7 because it is blocked by the reflection section 122 .
- the reflecting portion 122 can reflect the light emitted from the back surface 100 a of the semiconductor substrate 100 to the inside of the semiconductor substrate 100 .
- the photodiodes 20 inside the semiconductor substrate 100 can again absorb the light emitted from the rear surface 100a to the outside, so that the photodetection efficiency (PDE) of the pixels 10 can be further improved.
- PDE photodetection efficiency
- the reflective portion 122 is not limited to being provided so as to protrude from the entire contour line of the pixel separation portion (pixel separation wall) 120, but at least a part of the contour line. It is sufficient if it is provided so as to protrude from the
- an n-type semiconductor region 106 forming an avalanche multiplication region is provided in the center of each pixel 10 .
- the reflective portion 122 is provided without overlapping the n-type semiconductor region 106, the photodiode (photoelectric diode) located in the center of the pixel 10 is reflected from the back surface 100a while reflecting the light emitted from the back surface 100a to the outside. It does not block the incidence of light to the conversion unit) 20 (see FIG. 8).
- the width of the reflective portion 122 is such that light emitted to the outside of the pixel 10 (semiconductor substrate 100) is reflected to the inside while ensuring that light enters the pixel 10 (inside the semiconductor substrate 100).
- the width is not particularly limited as long as it can be used.
- FIG. 8 is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to the present embodiment, and specifically shows a cross section taken along line BB' shown in FIG.
- FIG. 8 in order to make the positional relationship of the components easy to understand, it is schematically shown, and may differ from the actual cross section.
- the pixels 10 are assumed to be back-illuminated pixels 10 in which light (indicated by arrows in the figure) is incident from the lower surface (back surface 100a) of FIG. do.
- the pixel 10 is not limited to the back-illuminated type, and may be a front-illuminated pixel 10 in which light is incident through a wiring layer (not shown) provided on the front surface 100b of the semiconductor substrate 100. good.
- the pixel 10 has an n-type sub-region 102 provided in an n-type semiconductor substrate 100 made of a silicon substrate, similarly to the pixel 10a according to the comparative example described above. , a p-type semiconductor region 104, an n-type semiconductor region 106, a high-concentration n-type semiconductor region 106a, a hole accumulation region 108, and a high-concentration p-type semiconductor region 108a.
- Each pixel 10 has a pixel separation portion (pixel separation wall) 120 that surrounds the pixel 10 and separates it from other adjacent pixels 10 .
- the pixel 10 has a cathode electrode 130 electrically connected to the high-concentration n-type semiconductor region 106a and an anode electrode 132 electrically connected to the high-concentration p-type semiconductor region 108a. Furthermore, the pixel 10 has an on-chip lens (lens portion) 140 on the back surface 100 a of the semiconductor substrate 100 .
- the n-type sub-region (photoelectric conversion portion) 102 is a region with a low impurity concentration in the semiconductor substrate 100 having n-type conductivity. ) to the avalanche multiplication region described below.
- a p-type semiconductor region 104 containing impurities of p-type conductivity (first conductivity type) and an n-type conductivity type (second conductivity type) are formed on the n-type sub-region 102 in the semiconductor substrate 100.
- an n-type semiconductor region 106 containing impurities are stacked to form a PN junction.
- a depletion layer generated in a region where the p-type semiconductor region 104 and the n-type semiconductor region 106 are joined forms an avalanche multiplication region (multiplication region).
- the impurity concentration of the n-type sub-region 102 is preferably set to a low concentration of 1E+14/cm 3 or less.
- the impurity concentration of each of the n-type semiconductor region 106 and the p-type semiconductor region 104 forming the avalanche multiplication region is preferably set to a high concentration of 1E+16/cm 3 or more.
- the n-type semiconductor region 106 has a high-concentration n-type semiconductor region 106a, which is a semiconductor region containing n-type impurities at a high concentration, formed at a predetermined depth from the surface 100b side of the semiconductor substrate 100 in the upper central portion thereof. have.
- the high-concentration n-type semiconductor region 106a functions as a contact portion connected to a cathode electrode (cathode portion) 130 for supplying a negative voltage for forming an avalanche multiplication region.
- the hole accumulation region 108 is a p-type semiconductor region formed so as to surround the outer surface of the n-type sub-region 102 and cover the inner surface of the pixel separation portion (pixel separation wall) 120, and is generated by photoelectric conversion. can accumulate holes.
- the hole accumulation region 108 traps electrons generated at the interface with the pixel isolation portion 120 and has an effect of suppressing DCR.
- a high-concentration p-type semiconductor region 108a having a high impurity concentration is provided in a region of the hole accumulation region 108 in the vicinity of the surface 100b of the semiconductor substrate 100 .
- the high-concentration p-type semiconductor region 108 a functions as a contact portion connected to the anode electrode (anode portion) 132 .
- the cathode electrode 130 and the anode electrode 132 are provided on the surface (second surface) 100b of the semiconductor substrate 100 with an insulating film (not shown) interposed therebetween. preferable. By doing so, the cathode electrode 130 and the anode electrode 132 can transmit the semiconductor substrate 100 and reflect the light emitted to the outside from the surface 100 b to the inside of the semiconductor substrate 100 .
- the cathode electrode 130 and the anode electrode 132 can function as a reflecting portion (second reflecting portion) that reflects light.
- the reflecting portion for reflecting the light emitted to the outside from the surface 100b of the semiconductor substrate 100 to the inside of the semiconductor substrate 100 may not be provided as the cathode electrode 130 or the anode electrode 132. , may be provided as a functional portion that performs only reflection.
- a pixel separation portion (pixel separation wall) 120 for separating the pixels 10a is provided in the pixel boundary portion between the pixels 10, which is the boundary between the adjacent pixels 10.
- the pixel separation section 120 is formed of, for example, a metal film such as tungsten (W), aluminum (Al), titanium (Ti), titanium nitride (TiN), tungsten nitride (WN), or a laminated film thereof.
- the pixel separation section 120 may have a double structure in which the outer side (on the n-type sub-region 102 side) of the metal film such as tungsten is covered with an insulating film such as a silicon oxide film and a barrier metal film.
- the reflective portion (first reflective portion) 122 is provided on the pixel separation portion 120 and the hole accumulation region 108 on the back surface 100a side. Specifically, the reflective portion 122 is provided so as to protrude from the pixel separating portion 120 toward the center of the pixel 10 . That is, the width of the reflective portion 122 is wider than the width of the pixel separating portion 120 .
- the reflecting portion 122 is provided without overlapping the n-type semiconductor region 106 forming the avalanche multiplication region (multiplication region). That is, in the present embodiment, the width of the reflective portion 122 (the width of the reflective portion 122 in the cross-sectional view of FIG.
- the reflection section 122 is made of, for example, tungsten (W), aluminum (Al), titanium (Ti), titanium nitride (TiN), tungsten nitride (WN), or the like. or a laminated film of these.
- the film thickness of the reflective portion 122 is, for example, about 500 nm to 600 nm, and is not particularly limited as long as it is a film thickness that reflects light.
- the reflecting portion 122 As described above, in the present embodiment, since the reflecting portion 122 as described above is provided, the light emitted from the rear surface 100a to the outside (indicated by the arrow in FIG. 8) is reflected inside the semiconductor substrate 100. be able to. As a result, in this embodiment, the photodiodes 20 inside the semiconductor substrate 100 can again absorb the light emitted from the rear surface 100a to the outside.
- the reflecting portion 122 is provided without overlapping with the n-type semiconductor region 106, thereby blocking light from entering the photodiode 20 located in the center of the pixel 10 from the rear surface 100a. never. That is, in the present embodiment, the light detection efficiency ( PDE) can be further improved.
- each semiconductor region of the pixel 10 has a conductivity type that is the opposite of the conductivity type described above.
- FIG. 9 is a schematic plan view showing an example of the detailed configuration of the pixel 10 according to this embodiment. Specifically, FIG. 9 shows a plane of a pixel array portion 512 in which four pixels 10 are arranged in a 2 ⁇ 2 matrix, viewed from above the back surface (first surface) 100a side of the semiconductor substrate 100. Illustration of the chip lens 140 is omitted. In addition, in FIG. 9, in order to make the positional relationship of the components easy to understand, it is schematically shown, and may differ from the actual detailed configuration.
- reflective portions 122 are provided at the four corner positions of pixel separation portions (pixel separation walls) 120 formed in a grid pattern.
- the reflective portion 122 is not limited to being provided at all four corners of the pixel separation portion (pixel separation wall) 120, and is provided at least one of the four corners.
- the size of the reflective portion 122 is such that light emitted to the outside of the pixel 10 (semiconductor substrate 100) is reflected to the inside while ensuring that light enters the pixel 10 (inside the semiconductor substrate 100).
- the size is not particularly limited as long as it can be used.
- FIG. 10 is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to the present embodiment, and in detail shows a cross section taken along line CC' shown in FIG.
- FIG. 11 is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to the present embodiment, and specifically shows a cross section taken along line DD' shown in FIG.
- FIG.10 and FIG.11 in order to make the positional relationship of a component easy to understand, it represented typically, and may differ from an actual cross section.
- reflective portions (first reflective portions) 122 are provided on the rear surface 100a side at the four corners of the pixel separation portion (pixel separation wall) 120 . Also, the size of the reflective portion 122 is wider than the intersection portion of the pixel separating portion 120 . In addition, in the present embodiment, the reflecting portion 122 is provided without overlapping the n-type semiconductor region 106 forming the avalanche multiplication region (multiplication region). Furthermore, in the present embodiment, as shown in FIG. 11, the reflective portion (first reflective portion) 122 is not provided on the back surface 100a side of the side portion of the pixel separating portion 120 .
- the reflective portions 122 are provided at the four corner positions of the pixel separating portion 120 formed in a grid pattern. In this way, in the present embodiment, light emitted from the back surface 100a to the outside is prevented from being prevented from entering the photodiode 20 located in the center of the pixel 10 from the back surface 100a. can be reflected into the interior of the As a result, according to this embodiment, the photodetection efficiency (PDE) of the pixel 10 can be further improved.
- PDE photodetection efficiency
- FIG. 12 is a schematic plan view showing an example of the detailed configuration of the pixel 10 according to this embodiment. Specifically, FIG. 12 shows a plane of a pixel array portion 512 in which four pixels 10 are arranged in a 2 ⁇ 2 matrix, viewed from above on the back surface (first surface) 100a side of the semiconductor substrate 100. Illustration of the chip lens 140 is omitted. In addition, in FIG. 12, in order to make it easy to understand the positional relationship of the constituent elements, the configuration is schematically shown and may differ from the actual detailed configuration.
- a reflecting portion 122 is provided so as to protrude (protrude). Furthermore, in the present embodiment, the reflective portions 122 are not provided at the four corner positions of the pixel separating portion 120 . In this way, in the present embodiment, light emitted from the back surface 100a to the outside is prevented from being prevented from entering the photodiode 20 located in the center of the pixel 10 from the back surface 100a.
- the reflective portion 122 is not limited to being provided on all four side portions of the pixel separation portion (pixel separation wall) 120, and is provided on at least one of the four side portions. It is sufficient if it is provided in.
- the width of the reflective portion 122 is such that light emitted to the outside of the pixel 10 (semiconductor substrate 100) is reflected to the inside while ensuring that light enters the pixel 10 (inside the semiconductor substrate 100). The width is not particularly limited as long as it can be used.
- FIG. 12 corresponds to FIG. 10, and the FF' cross section of FIG. 12 corresponds to FIG. A description of the cross-sectional configuration is omitted.
- the reflective portions 122 are provided at the positions of the four sides of the pixel separation portion 120 formed in a grid pattern. In this way, in the present embodiment, light emitted from the back surface 100a to the outside is prevented from being blocked from entering the photodiode 20 located in the center of the pixel 10 from the back surface 100a. can be reflected into the interior of the As a result, according to this embodiment, the photodetection efficiency (PDE) of the pixel 10 can be further improved.
- PDE photodetection efficiency
- first to third embodiments of the present disclosure are preferably selected according to restrictions on the (chip) area of the semiconductor substrate 100 on which the pixels 10 are provided, the characteristics required of the pixels 10, and the like.
- FIG. 13 is an explanatory diagram for explaining the detailed configuration of the pixel 10 according to this embodiment, and more specifically, a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to this embodiment.
- the height of the on-chip lens 140 is low, as shown in the upper side of FIG. Therefore, it may not be possible to enter the photodiodes 20 in the semiconductor substrate 100 .
- the on-chip lens (lens section) 140 is adjusted so as to function to refract the light incident from the rear surface 100a side in order to prevent the light incident from the rear surface 100a side from being reflected by the reflecting section 122. .
- the photodetection efficiency (PDE) of the pixel 10 can be further improved.
- the adjustment of the height of the on-chip lens 140 is not limited to adjusting the height of the on-chip lens 140, but by changing the material forming the on-chip lens 140 to adjust the refractive index. Reflection of light incident from the side of 100a by the reflecting portion 122 may be prevented.
- FIG. 14 is an explanatory diagram for explaining the detailed configuration of the pixel 10 according to this embodiment, and more specifically, a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to this embodiment.
- a p-type semiconductor region 104 and an n-type semiconductor region 106 forming an avalanche multiplication region are positioned on the back surface 100a side to generate a Charges can be multiplied more efficiently.
- the n-type sub-region 102 between the high-concentration n-type semiconductor region 106a and the n-type semiconductor region 106 is likely to be depleted.
- depletion is likely to occur, making it difficult to efficiently apply a desired voltage from the cathode electrode 130 to the avalanche multiplication region via the high-concentration n-type semiconductor region 106a.
- an n-type well region (third semiconductor region) 110 is provided.
- the impurity concentration of the n-type well region 110 is preferably lower than that of the n-type semiconductor region 106 and higher than that of the n-type sub-region 102 .
- the n-type well region 110 is thicker than the avalanche multiplication region (multiplication region) formed from the p-type semiconductor region 104 and the n-type semiconductor region 106. good. By doing so, in the present embodiment, it is possible to prevent the space between the high-concentration n-type semiconductor regions 106a and 106 from becoming easily depleted.
- a voltage is applied to the avalanche multiplication region from the cathode electrode 130 via the avalanche multiplication region, a desired voltage can be efficiently applied to the avalanche multiplication region.
- the p-type semiconductor region 104 and the n-type semiconductor region 106 forming the avalanche multiplication region are positioned on the back surface 100a side, and the high-concentration n-type semiconductor region 106a and the n-type semiconductor region 106, an n-type well region 110 having n-type conductivity is provided.
- the generated charges can be multiplied more efficiently, and in addition, the avalanche multiplication region can be separated from the cathode electrode 130 via the high-concentration n-type semiconductor region 106a.
- a desired voltage can be efficiently applied to the increased avalanche multiplication region.
- FIG. 15A is a schematic plan view showing an example of the detailed configuration of the pixel array section 512 according to this embodiment.
- FIG. 15B is a schematic plan view showing an example of the detailed configuration of the pixel 10 according to this embodiment.
- FIG. 15C is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to the present embodiment, and specifically shows a cross section taken along line GG' shown in FIG. 15B.
- FIG. 15D is a schematic cross-sectional view showing an example of the detailed configuration of the pixel 10 according to the present embodiment, and specifically shows a cross section taken along line HH' shown in FIG. 15B.
- the incident angle of light to the pixel 10 changes depending on the position in the pixel array section 512 . Therefore, in the present embodiment, the position and width of the reflective portion 122 (degree of protrusion toward the center of the pixel 10) are changed depending on the position of the pixel 10 in the pixel array portion 512. FIG. By doing so, according to the present embodiment, even if the positions in the pixel array section 512 are different, in each pixel 10, the reflection section 122 does not block the incidence of light, and the light is emitted to the outside from the back surface 100a. It becomes possible to reflect the emitted light inside the semiconductor substrate 100, and the photodetection efficiency (PDE) of the pixel 10 can be further improved.
- PDE photodetection efficiency
- the reflecting portions 122 are provided so that the positions and widths (W1, W2) of the reflecting portions 122 are uniform.
- the reflection portion increases from the central portion 512c of the pixel array portion 512 toward the end portion 512s along the X direction (first direction) in the drawing.
- Reference numeral 122 denotes a width (distance) (W3, W4, W5) protruding from the pixel separation portion (pixel separation wall) 120 toward the center of the pixel 10 along the Y direction (second direction) in the figure. Become. That is, in the present embodiment, the width and the degree of protrusion (shift amount) of the reflecting section 122 increase toward the edge of the pixel array section 512 .
- the reflection section 122 does not block the incidence of light, and the light emitted from the back surface 100a to the outside is reflected from the semiconductor substrate.
- the light detection efficiency (PDE) of the pixel 10 can be further improved because the light can be reflected into the interior of the pixel 100 .
- the reflecting section 122 extends in the Y direction (second direction), the widths (distances) (W3, W4, W5) protruding from the pixel separating portion (pixel separating wall) 120 toward the center of the pixel 10 are not limited to increasing.
- the reflection section 122 extends in the X direction (first direction), the widths (distances) (W3, W4, W5) protruding from the pixel separating portion (pixel separating wall) 120 toward the center of the pixel 10 may be increased.
- the above two configurations may be combined.
- the position and height of the on-chip lens 140 may be changed toward the edge of the pixel array section 512 .
- FIGS. 16A to 16F are schematic diagrams for explaining the manufacturing method of the pixel 10 according to this embodiment, and more specifically, each drawing is a cross-sectional view of the pixel 10 at each stage in the manufacturing process.
- the upper side of the drawing is the side of the back surface 100a of the semiconductor substrate 100
- the lower side of the drawing is the side of the front surface 100b of the semiconductor substrate 100.
- a p-type semiconductor region 104, an n-type semiconductor region 106, a high-concentration n-type semiconductor region 106a, a hole accumulation region 108, and a high-concentration p-type semiconductor region 108a are formed at predetermined positions.
- a mask material 150 is layered on the back surface 100a of the semiconductor substrate 100 provided with the .
- a resist 160 having a predetermined pattern is formed on the mask material 150 .
- trenches 124 are formed through the semiconductor substrate 100 from the rear surface 100a to the front surface 100b.
- the mask material 150 is removed.
- an oxide film (not shown) and a barrier metal film (not shown) are formed so as to cover the bottom and side walls of the trench 124 .
- a metal film 126 is formed to fill the trenches 124 and cover the back surface 100 a of the semiconductor substrate 100 .
- a patterned resist 162 is formed on the metal film 126 .
- the pixel 10 according to the present embodiment can be obtained.
- the pixel 10 according to the embodiment of the present disclosure can be manufactured easily and inexpensively using existing manufacturing processes for semiconductor devices.
- the reflecting portion 122 as described above is provided, the light emitted from the back surface 100 a to the outside can be reflected inside the semiconductor substrate 100 .
- the photodiodes 20 inside the semiconductor substrate 100 can again absorb the light emitted from the rear surface 100a to the outside.
- the reflecting portion 122 since the reflecting portion 122 is provided without overlapping the n-type semiconductor region 106, it blocks the incidence of light from the rear surface 100a to the photodiode 20 located in the center of the pixel 10. never.
- the reflection section 122 can reflect the light emitted to the outside from the back surface 100 a to the inside of the semiconductor substrate 100 without blocking the incidence of light.
- Photodetection efficiency (PDE) can be further improved.
- the semiconductor substrate 100 does not necessarily have to be a silicon substrate, and may be another substrate (for example, an SOI (Silicon On Insulator) substrate, a SiGe substrate, etc.). Also, the semiconductor substrate 100 may be one in which a semiconductor structure or the like is formed on such various substrates.
- SOI Silicon On Insulator
- SiGe substrate SiGe substrate
- the conductivity types of the semiconductor substrate 100 and each semiconductor region may be reversed.
- this embodiment is applied to the pixels 10 that use holes as signal charges. It is possible. That is, in the embodiment of the present disclosure described above, the pixel 10 having the photodiode 20 in which the first conductivity type is the p-type, the second conductivity type is the n-type, and electrons are used as the signal charge has been described. , the embodiments of the present disclosure are not limited to such examples. For example, embodiments of the present disclosure can be applied to a pixel 10 having a photodiode 20 where the first conductivity type is n-type, the second conductivity type is p-type, and holes are used as signal charges. .
- the pixel 10 according to the embodiment of the present disclosure is not limited to being applied to the photodetector 501 applied to the distance measuring system 611.
- the pixel 10 according to the embodiment of the present disclosure may be applied to an imaging device that captures an image obtained by detecting the distribution of incident light amount of visible light.
- the present embodiment includes an imaging device that captures the distribution of incident amounts of infrared rays, X-rays, particles, etc. as an image, and a distribution of other physical quantities, such as pressure and capacitance, that is detected and captured as an image. It can be applied to an imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor.
- methods for forming each layer, each film, each element, etc. described above include, for example, a physical vapor deposition method (PVD method) and a chemical vapor deposition method (chemical vapor deposition method). Vapor deposition: CVD) and the like can be mentioned.
- the PVD method includes a vacuum deposition method using resistance heating or high frequency heating, an EB (electron beam) deposition method, various sputtering methods (magnetron sputtering method, RF (Radio Frequency)-DC (Direct Current) combined bias sputtering method, ECR (Electron Cyclotron Resonance) sputtering method, facing target sputtering method, high frequency sputtering method, etc.), ion plating method, laser ablation method, molecular beam epitaxy (MBE) method, laser transfer method, etc.
- Examples of CVD methods include plasma CVD, thermal CVD, MO (Metal Organic)-CVD, and optical CVD.
- other methods include electrolytic plating method, electroless plating method, spin coating method; immersion method; casting method; microcontact printing method; drop casting method; screen printing method, inkjet printing method, offset printing method, and gravure printing.
- Various printing methods such as printing method, flexographic printing method; stamp method; spray method; air doctor coater method, blade coater method, rod coater method, knife coater method, squeeze coater method, reverse roll coater method, transfer roll coater method, gravure coater method , kiss coater method, cast coater method, spray coater method, slit orifice coater method and calendar coater method.
- planarization techniques include a CMP (Chemical Mechanical Polishing) method, a laser planarization method, a reflow method, and the like. That is, the pixel 10 according to the embodiment of the present disclosure can be manufactured easily and inexpensively using existing manufacturing processes for semiconductor devices.
- each step in the manufacturing method according to the embodiment of the present disclosure described above does not necessarily have to be processed in the described order.
- each step may be processed in an appropriately changed order.
- the method used in each step does not necessarily have to be performed along the described method, and may be performed by another method.
- FIG. 17 is a block diagram showing a configuration example of a smart phone 900 as an electronic device to which the ranging system 611 according to the embodiment of the present disclosure is applied.
- a smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903.
- Smartphone 900 also includes storage device 904 , communication module 905 , and sensor module 907 .
- smart phone 900 includes ranging system 611 described above, and additionally includes imaging device 909 , display device 910 , speaker 911 , microphone 912 , input device 913 , and bus 914 .
- the smartphone 900 may have a processing circuit such as a DSP (Digital Signal Processor) in place of the CPU 901 or together with it.
- DSP Digital Signal Processor
- the CPU 901 functions as an arithmetic processing device and a control device, and controls all or part of the operations within the smartphone 900 according to various programs recorded in the ROM 902, RAM 903, storage device 904, or the like.
- a ROM 902 stores programs and calculation parameters used by the CPU 901 .
- a RAM 903 temporarily stores programs used in the execution of the CPU 901, parameters that change as appropriate during the execution, and the like.
- the CPU 901 , ROM 902 and RAM 903 are interconnected by a bus 914 .
- the storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900 .
- the storage device 904 is composed of, for example, a magnetic storage device such as a HDD (Hard Disk Drive), a semiconductor storage device, an optical storage device, or the like.
- the storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from the outside.
- the communication module 905 is, for example, a communication interface configured with a communication device for connecting to the communication network 906.
- the communication module 905 can be, for example, a communication card for wired or wireless LAN (Local Area Network), Bluetooth (registered trademark), or WUSB (Wireless USB).
- the communication module 905 may be a router for optical communication, a router for ADSL (Asymmetric Digital Subscriber Line), a modem for various types of communication, or the like.
- a communication network 906 connected to the communication module 905 is a wired or wireless network, such as the Internet, home LAN, infrared communication, or satellite communication.
- the sensor module 907 is, for example, a motion sensor (eg, an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biological information sensor (eg, a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (eg, GNSS (Global Navigation Satellite system) receiver, etc.) and various sensors.
- a motion sensor eg, an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.
- a biological information sensor eg, a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.
- GNSS Global Navigation Satellite system
- the distance measurement system 611 is provided on the surface of the smartphone 900, and can acquire, for example, the distance and three-dimensional shape of the subjects 612 and 613 facing the surface as distance measurement results.
- the imaging device 909 is provided on the surface of the smartphone 900 and can image subjects 612 and 613 located around the smartphone 900 .
- the imaging device 909 includes an imaging device (not shown) such as a CMOS (Complementary MOS) image sensor, and a signal processing circuit (not shown) that performs imaging signal processing on signals photoelectrically converted by the imaging device.
- an imaging device such as a CMOS (Complementary MOS) image sensor
- a signal processing circuit (not shown) that performs imaging signal processing on signals photoelectrically converted by the imaging device.
- the imaging device 909 includes an optical system mechanism (not shown) composed of an imaging lens, an aperture mechanism, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) for controlling the operation of the optical system mechanism. You can have more.
- the image sensor collects incident light from subjects 612, 613, etc., as an optical image, and the signal processing circuit photoelectrically converts the formed optical image pixel by pixel, and picks up the signal of each pixel.
- a picked-up image can be acquired by reading out as a signal and performing image processing.
- the display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display.
- the display device 910 can display an operation screen, captured images acquired by the imaging device 909 described above, and the like.
- the speaker 911 can output to the user, for example, call voice, voice accompanying the nesting content displayed by the display device 910 described above, and the like.
- the microphone 912 can collect, for example, the user's call voice, voice including commands for activating functions of the smartphone 900 , and ambient environment voice of the smartphone 900 .
- the input device 913 is, for example, a device operated by a user, such as a button, keyboard, touch panel, or mouse.
- the input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901 .
- the user can input various data to the smartphone 900 and instruct processing operations.
- a configuration example of the smartphone 900 has been shown above.
- Each component described above may be configured using general-purpose members, or may be configured by hardware specialized for the function of each component. Such a configuration can be changed as appropriate according to the technical level of implementation.
- a pixel array unit including a plurality of pixels arranged in a matrix on a semiconductor substrate and detecting light, Each pixel is a pixel separation wall surrounding each pixel and separating each pixel from each other; a photoelectric conversion unit that is provided in the semiconductor substrate and generates electric charges by light; a multiplication region provided in the semiconductor substrate for amplifying charges from the photoelectric conversion unit; first and second reflectors that reflect light directed toward the outside of the semiconductor substrate into the semiconductor substrate; have The first reflecting portion is provided on a light-receiving first surface of the semiconductor substrate so as to protrude from the pixel separation wall toward the center of the pixel, The second reflector is provided on a second surface of the semiconductor substrate that faces the first surface, Photodetector.
- the pixel separation wall has a substantially rectangular frame shape surrounding each pixel, The photodetector according to any one of (1) to (4) above.
- the first reflectors are positioned at four corners of the substantially rectangular frame, The photodetector according to (5) above.
- the first reflectors are positioned on four sides of the substantially rectangular frame, The photodetector according to (5) or (6) above.
- a photodetector according to claim 1. (9) According to the distance of each pixel from the center of the pixel array section, the height of the lens portion with respect to the first surface varies; The photodetector according to (8) above. (10) The multiplication region is a first semiconductor region provided on the second surface side of the photoelectric conversion unit and containing first conductivity type impurities; a second semiconductor region provided on the second surface side of the first semiconductor region and containing impurities of a second conductivity type opposite to the first conductivity type; having The photodetector according to any one of (1) to (9) above.
- Each pixel is a third semiconductor region provided on the second surface side of the second semiconductor region and containing impurities of the second conductivity type; the impurity concentration of the third semiconductor region is lower than that of the second semiconductor region; The photodetector according to (10) above. (12) the impurity concentration of the third semiconductor region is higher than that of the semiconductor substrate; The photodetector according to (11) above. (13) The photodetector according to (11) or (12) above, wherein the third semiconductor region is thicker than the multiplication region. (14) The photodetector according to any one of (1) to (13) above, wherein the second reflection section includes a cathode section electrically connected to the multiplication region.
- each pixel has a hole accumulation region covering an inner surface of the pixel isolation wall; The photodetector according to (14) above.
- the second reflector includes an anode provided on the second surface side of the hole accumulation region.
- the photodetector according to (17) above. (19) having a pixel array section including a plurality of pixels arranged in a matrix on a semiconductor substrate for detecting light; Each pixel is a pixel separation wall surrounding each pixel and separating each pixel from each other; a photoelectric conversion unit that is provided in the semiconductor substrate and generates electric charges by light; a multiplication region provided in the semiconductor substrate for amplifying charges from the photoelectric conversion unit; first and second reflectors that reflect light directed toward the outside of the semiconductor substrate into the semiconductor substrate; have The first reflecting portion is provided on a light-receiving first surface of the semiconductor substrate so as to protrude from the pixel separation wall toward the center of the pixel, The second reflector is provided on a second surface of the semiconductor substrate that faces the first surface, An electronic device equipped with a photodetector.
- a lighting device that emits irradiation light; a photodetector that receives reflected light of the irradiation light reflected by a subject; with The photodetector is having a pixel array section including a plurality of pixels arranged in a matrix on a semiconductor substrate for detecting light; Each pixel is a pixel separation wall surrounding each pixel and separating each pixel from each other; a photoelectric conversion unit that is provided in the semiconductor substrate and generates electric charges by light; a multiplication region provided in the semiconductor substrate for amplifying charges from the photoelectric conversion unit; first and second reflectors that reflect light directed toward the outside of the semiconductor substrate into the semiconductor substrate; have The first reflecting portion is provided on a light-receiving first surface of the semiconductor substrate so as to protrude from the pixel separation wall toward the center of the pixel, The second reflector is provided on a second surface of the semiconductor substrate that faces the first surface, ranging system.
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Abstract
Description
1. 本発明者らが本開示の実施形態を創作するに至る背景
1.1 画素10の回路構成
1.2 光検出装置501の構成例
1.3 測距システム611の構成例
1.4 比較例に係る画素10aの詳細構成
1.5 背景
2. 第1の実施形態
2.1 平面構成
2.2 断面構成
3. 第2の実施形態
3.1 平面構成
3.2 断面構成
4. 第3の実施形態
5. 第4の実施形態
6. 第5の実施形態
7. 第6の実施形態
8. 第7の実施形態
9. まとめ
10. 適用例
11. 補足
<1.1 画素10の回路構成>
まずは、本開示の実施形態の詳細を説明する前に、図1を参照して、本開示の実施形態を適用することができる画素10の回路構成の一例を説明する。図1は、画素10の回路構成の一例を説明するための説明図である。詳細には、図1は、直接型ToF(Time-of-Flight)法により距離計測を行う測距センサに適用可能な、SPAD(Single Photon Avalanche Diode)構造を持つフォトダイオード(受光素子)20を含む画素10の回路構成を示す。
上述した画素10は、例えば、図3に示される光検出装置501の画素に適用することができる。図3は、光検出装置501の構成例を示すブロック図である。
後述する画素アレイ部512には、マトリックス状に画素10が配列しており、画素10の行ごとに画素駆動線522が水平方向に沿って配線されている。そして、画素駆動部511は、画素駆動線522を介して所定の駆動信号を各画素10に供給することにより、各画素10を駆動する。具体的には、画素駆動部511は、後述する入出力部515を介して外部から供給される発光タイミング信号に応じたタイミングにより、マトリックス状に2次元配置された複数の画素10の一部を有効画素とする制御を行うことができる。
画素アレイ部512は、光を検出し、検出結果を示す検出信号PFoutを画素信号として出力する画素10が行方向及び列方向の行列状(マトリックス状)に2次元配置された構成を持つ。なお、画素アレイ部512の画素10の行数、列数が、図3に示す数に限定されるものではない。そして、先に説明したように、画素アレイ部512の行列状の画素配列に対して、画素行ごとに画素駆動線522が水平方向に沿って配線されている。さらに、画素駆動線522は、1本の配線として示しているが、複数の配線で構成することもできる。また、画素駆動線522の一端は、画素駆動部511の各画素行に対応した出力端に接続されている。
MUX513は、画素アレイ部512内の有効画素と非有効画素の切替えに従い、有効画素からの出力を選択し、選択した有効画素から入力される画素信号を、後述する時間計測部514へ出力することができる。
時間計測部514は、MUX513から供給される有効画素の画素信号と、発光源(図示省略)の発光タイミングを示す発光タイミング信号とに基づいて、発光源が光を発光してから有効画素が光を検出するまでの時間に対応するカウント値を生成する。なお、発光タイミング信号は、後述する入出力部515を介して外部から供給される。
入出力部515は、時間計測部514から供給される有効画素のカウント値を、画素信号として外部に出力する。また、入出力部515は、外部から供給される発光タイミング信号を、画素駆動部511及び時間計測部514に供給する。
上述した光検出装置501は、例えば、図4に示される測距システム611に適用することができる。図4は、光検出装置501を組み込んだ測距システム611の構成例を示すブロック図である。測距システム611は、例えば、ToF法を用いて距離画像の撮影を行うシステムである。ここで、距離画像とは、測距システム611から被写体612、613までの奥行き方向の距離を画素10毎に検出し、検出した距離に基づく距離画素信号からなる画像のことである。
照明装置621は、図4に示すように、照明制御部631及び光源632を有する。照明制御部631は、撮像装置622の制御部642の制御により、光源632の光を照射するパターンを制御する。具体的には、照明制御部631は、制御部642から供給される照射信号に含まれる照射コードに従って、光源632が光を照射するパターンを制御する。例えば、照射コードは、1(High)と0(Low)の2値からなり、照明制御部631は、照射コードの値が1のとき光源632を点灯させ、照射コードの値が0のとき光源632を消灯させる。
撮像装置622は、照明装置621から照射された光(照射光)が被写体612及び被写体613等により反射された反射光を受光する装置である。撮像装置622は、図4に示すように、撮像部641、制御部642、表示部643、及び、記憶部644を有する。
次に、図5及び図6を参照して、本開示の実施形態と比較される比較例に係る画素10aの詳細構成の一例を説明する。図5は、比較例に係る画素10aの詳細構成の一例を表す平面模式図であり、詳細には、4つの画素10aがマトリックス状に並ぶ半導体基板100の裏面100a(図6 参照)側から見た平面を示す。また、図6は、比較例に係る画素10aの詳細構成の一例を表す断面模式図であって、詳細には、図5に示すA-A´で切断した断面を示す。なお、図5及び図6においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の構成と異なっていてもよい。なお、ここで、比較例とは、本発明者らが本開示の実施形態をなす前に、検討を重ねていた画素10aのことを意味するものとする。
次に、上述した比較例に係る画素10aの構成を踏まえ、本発明者らが本開示の実施形態を創作するに至った背景の詳細を、図6を参照して説明する。先に説明した比較例に係る画素10aにおいては、図6に示すように、カソード電極130やアノード電極132を、光を反射する金属等により形成することにより、半導体基板100を透過した光を半導体基板100の内部へ反射する。このような構成を用いることにより、画素10aにおいては、半導体基板100を透過した光を半導体基板100内のフォトダイオード20に再度吸収させることができることから、画素10aのPDEを向上させることができる。すなわち、比較例に係る画素10aにおいては、半導体基板100の表面100b側に、光を反射させる反射部が設けることにより、当該反射部により半導体基板100を透過した光を半導体基板100の内部へ反射させることができることから、画素10aの光検出効率(PDE)を向上させることができる。
<2.1 平面構成>
まずは、図7を参照して、本発明者らが創作した本開示の第1の実施形態に係る画素10の平面構成の詳細を説明する。図7は、本実施形態に係る画素10の詳細構成の一例を表す平面模式図である。詳細には、図7は、4つの画素10が2×2でマトリックス状に並ぶ画素アレイ部512を、半導体基板100の裏面(第1の面)100a側の上方から見た平面を示し、オンチップレンズ140(図8参照)の図示が省略されている。なお、図7においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の詳細構成と異なっていてもよい。
次に、図8を参照して、本実施形態に係る画素10の断面構成の詳細を説明する。図8は、本実施形態に係る画素10の詳細構成の一例を表す断面模式図であり、詳細には、図7に示すB-B´で切断した断面を示す。なお、図8においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の断面と異なっていてもよい。
<3.1 平面構成>
次に、図9を参照して、本開示の第2の実施形態に係る画素10の平面構成の詳細を説明する。図9は、本実施形態に係る画素10の詳細構成の一例を表す平面模式図である。詳細には、図9は、4つの画素10が2×2でマトリックス状に並ぶ画素アレイ部512を、半導体基板100の裏面(第1の面)100a側の上方から見た平面を示し、オンチップレンズ140の図示が省略されている。なお、図9においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の詳細構成と異なっていてもよい。
次に、図10及び図11を参照して、本実施形態に係る画素10の断面構成の詳細を説明する。図10は、本実施形態に係る画素10の詳細構成の一例を表す断面模式図であり、詳細には、図9に示すC-C´で切断した断面を示す。また、図11は、本実施形態に係る画素10の詳細構成の一例を表す断面模式図であり、詳細には、図9に示すD-D´で切断した断面を示す。なお、図10及び図11においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の断面と異なっていてもよい。
次に、図12を参照して、本開示の第3の実施形態に係る画素10の平面構成の詳細を説明する。図12は、本実施形態に係る画素10の詳細構成の一例を表す平面模式図である。詳細には、図12は、4つの画素10が2×2でマトリックス状に並ぶ画素アレイ部512を、半導体基板100の裏面(第1の面)100a側の上方から見た平面を示し、オンチップレンズ140の図示が省略されている。なお、図12においては、構成要素の位置関係を分かりやすくするため、模式的に表したものであり、実際の詳細構成と異なっていてもよい。
次に、図13を参照して、本開示の第4の実施形態に係る画素10の構成の詳細を説明する。図13は、本実施形態に係る画素10の詳細構成を説明するための説明図であって、詳細には、本実施形態に係る画素10の詳細構成の一例を表す断面模式図である。
次に、図14を参照して、本開示の第5の実施形態に係る画素10の構成の詳細を説明する。図14は、本実施形態に係る画素10の詳細構成を説明するための説明図であって、詳細には、本実施形態に係る画素10の詳細構成の一例を表す断面模式図である。
次に、図15Aから図15Dを参照して、本開示の第6の実施形態に係る画素10の構成の詳細を説明する。図15Aは、本実施形態に係る画素アレイ部512の詳細構成の一例を表す平面模式図である。また、図15Bは、本実施形態に係る画素10の詳細構成の一例を表す平面模式図である。さらに、図15Cは、本実施形態に係る画素10の詳細構成の一例を表す断面模式図であり、詳細には、図15Bに示すG-G´で切断した断面を示す。また、図15Dは、本実施形態に係る画素10の詳細構成の一例を表す断面模式図であり、詳細には、図15Bに示すH-H´で切断した断面を示す。
次に、図16Aから図16Fを参照して、本実施形態に係る画素10の製造方法を説明する。図16Aから図16Fは、本実施形態に係る画素10の製造方法を説明するための模式図であり、詳細には、各図面は、製造工程における各段階における、画素10の断面図である。なお、これら図においては、図中上側が半導体基板100の裏面100a側となり、図中下側が半導体基板100の表面100b側となる。
以上のように、本開示の各実施形態によれば、上述のような反射部122が設けられることから、裏面100aから外部へ出射する光を半導体基板100の内部へ反射させることができる。その結果、各実施形態においては、裏面100aから外部へ出射する光を半導体基板100の内部のフォトダイオード20が再度吸収することができる。さらに、各実施形態においては、当該反射部122は、n型半導体領域106と重なることなく設けられていることから、裏面100aから画素10の中央に位置するフォトダイオード20への光の入射を遮ることはない。すなわち、本開示の各実施形態によれば、反射部122が、光の入射を遮ることなく、裏面100aから外部へ出射する光を半導体基板100の内部へ反射させることができることから、画素10の光検出効率(PDE)をより向上させることができる。
なお、上述した測距システム611は、例えば、測距機能を備えるカメラ、測距機能を備えたスマートフォン、生産ラインに設けられる産業用カメラといった各種の電子機器に適用することができる。そこで、図17を参照して、本技術を適用した電子機器としての、スマートフォン900の構成例について説明する。図17は、本開示の実施形態に係る測距システム611を適用した電子機器としてのスマートフォン900の構成例を示すブロック図である。
以上、添付図面を参照しながら本開示の好適な実施形態について詳細に説明したが、本開示の技術的範囲はかかる例に限定されない。本開示の技術分野における通常の知識を有する者であれば、請求の範囲に記載された技術的思想の範疇内において、各種の変更例または修正例に想到し得ることは明らかであり、これらについても、当然に本開示の技術的範囲に属するものと了解される。
(1)
半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を備え、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
光検出装置。
(2)
前記半導体基板を前記第1の面の上方から見た場合、前記第1の反射部の幅は、前記画素分離壁の幅より広い、上記(1)に記載の光検出装置。
(3)
前記半導体基板を前記第1の面の上方から見た場合、前記第1の反射部は、前記増倍領域と重なることなく設けられている、上記(1)又は(2)に記載の光検出装置。
(4)
前記第1の反射部は、タングステン、アルミニウム、チタン、窒化チタン、窒化タングステンからなる群から選択される少なくとも1つの材料を含む、上記(1)~(3)のいずれか1つに記載の光検出装置。
(5)
前記半導体基板を前記第1の面の上方から見た場合、
前記画素分離壁は、前記各画素を取り囲む略矩形の枠の形状を持つ、
上記(1)~(4)のいずれか1つに記載の光検出装置。
(6)
前記半導体基板を前記第1の面の上方から見た場合、
前記第1の反射部は、前記略矩形の枠の4隅に位置する、
上記(5)に記載の光検出装置。
(7)
前記半導体基板を前記第1の面の上方から見た場合、
前記第1の反射部は、前記略矩形の枠の4辺に位置する、
上記(5)又は(6)に記載の光検出装置。
(8)
前記各画素は、前記第1の面上に、外部からの光を前記第1の反射部で反射されないように屈折させる機能を持つレンズ部を有する、上記(1)~(7)のいずれか1つに記載の光検出装置。
(9)
前記各画素の、前記画素アレイ部の中心からの距離に応じて、
前記レンズ部の、前記第1の面に対する高さは、変化する、
上記(8)に記載の光検出装置。
(10)
前記増倍領域は、
前記光電変換部の前記第2の面側の上に設けられ、第1の導電型の不純物を含む第1の半導体領域と、
前記第1の半導体領域の前記第2の面側の上に設けられ、前記第1の導電型とは反対の導電型である第2の導電型の不純物を含む第2の半導体領域と、
を有する、
上記(1)~(9)のいずれか1つに記載の光検出装置。
(11)
前記各画素は、
前記第2の半導体領域の前記第2の面側の上に設けられ、前記第2の導電型の不純物を含む第3の半導体領域を有し、
前記第3の半導体領域の不純物の濃度は、前記第2の半導体領域に比べて薄い、
上記(10)に記載の光検出装置。
(12)
前記第3の半導体領域の不純物の濃度は、前記半導体基板に比べて濃い、
上記(11)に記載の光検出装置。
(13)
前記第3の半導体領域は、前記増倍領域に比べて厚い、上記(11)又は(12)に記載の光検出装置。
(14)
前記第2の反射部は、前記増倍領域と電気的に接続されるカソード部を含む、上記(1)~(13)のいずれか1つに記載の光検出装置。
(15)
前記各画素は、前記画素分離壁の内側面を覆うホール蓄積領域を有する、
上記(14)に記載の光検出装置。
(16)
前記第2の反射部は、前記ホール蓄積領域の前記第2の面側の上に設けられたアノード部を含む、上記(15)に記載の光検出装置。
(17)
第1の方向に沿って前記画素アレイ部の中心から端部へ向かうに従って、
前記第1の方向に対して垂直な第2の方向に沿って、前記画素分離壁から前記画素中心向かって突出する距離が長くなる、
上記(7)に記載の光検出装置。
(18)
前記第2の方向に沿って前記画素アレイ部の中心から端部へ向かうに従って、
前記第1の方向に沿って、前記画素分離壁から前記画素中心向かって突出する距離が長くなる、
上記(17)に記載の光検出装置。
(19)
半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を有し、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
光検出装置を、搭載する電子機器。
(20)
照射光を照射する照明装置と、
前記照射光が被写体により反射された反射光を受光する光検出装置と、
を備え、
前記光検出装置は、
半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を有し、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
測距システム。
20 フォトダイオード
22 定電流源
24 インバータ
26 トランジスタ
100 半導体基板
100a 裏面
100b 表面
102 n型サブ領域
104 p型半導体領域
106 n型半導体領域
106a 高濃度n型半導体領域
108 ホール蓄積領域
108a 高濃度p型半導体領域
110 n型ウェル領域
120 画素分離部
122 反射部
124 トレンチ
126 金属膜
130 カソード電極
132 アノード電極
140 オンチップレンズ
150 マスク材料
160、162 レジスト
501 光検出装置
511 画素駆動部
512 画素アレイ部
512c 中央部
512s 端部
513 MUX
514 時間計測部
515 入出力部
522 画素駆動線
611 測距システム
612、613 被写体
621 照明装置
622 撮像装置
631 照明制御部
632 光源
641 撮像部
642 制御部
643 表示部
644 記憶部
651 レンズ
653 信号処理回路
900 スマートフォン
901 CPU
902 ROM
903 RAM
904 ストレージ装置
905 通信モジュール
906 通信ネットワーク
907 センサモジュール
909 撮像装置
910 表示装置
911 スピーカ
912 マイクロフォン
913 入力装置
914 バス
Claims (20)
- 半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を備え、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
光検出装置。 - 前記半導体基板を前記第1の面の上方から見た場合、前記第1の反射部の幅は、前記画素分離壁の幅より広い、請求項1に記載の光検出装置。
- 前記半導体基板を前記第1の面の上方から見た場合、前記第1の反射部は、前記増倍領域と重なることなく設けられている、請求項1に記載の光検出装置。
- 前記第1の反射部は、タングステン、アルミニウム、チタン、窒化チタン、窒化タングステンからなる群から選択される少なくとも1つの材料を含む、請求項1に記載の光検出装置。
- 前記半導体基板を前記第1の面の上方から見た場合、
前記画素分離壁は、前記各画素を取り囲む略矩形の枠の形状を持つ、
請求項1に記載の光検出装置。 - 前記半導体基板を前記第1の面の上方から見た場合、
前記第1の反射部は、前記略矩形の枠の4隅に位置する、
請求項5に記載の光検出装置。 - 前記半導体基板を前記第1の面の上方から見た場合、
前記第1の反射部は、前記略矩形の枠の4辺に位置する、
請求項5に記載の光検出装置。 - 前記各画素は、前記第1の面上に、外部からの光を前記第1の反射部で反射されないように屈折させる機能を持つレンズ部を有する、請求項1に記載の光検出装置。
- 前記各画素の、前記画素アレイ部の中心からの距離に応じて、
前記レンズ部の、前記第1の面に対する高さは、変化する、
請求項8に記載の光検出装置。 - 前記増倍領域は、
前記光電変換部の前記第2の面側の上に設けられ、第1の導電型の不純物を含む第1の半導体領域と、
前記第1の半導体領域の前記第2の面側の上に設けられ、前記第1の導電型とは反対の導電型である第2の導電型の不純物を含む第2の半導体領域と、
を有する、
請求項1に記載の光検出装置。 - 前記各画素は、
前記第2の半導体領域の前記第2の面側の上に設けられ、前記第2の導電型の不純物を含む第3の半導体領域を有し、
前記第3の半導体領域の不純物の濃度は、前記第2の半導体領域に比べて薄い、
請求項10に記載の光検出装置。 - 前記第3の半導体領域の不純物の濃度は、前記半導体基板に比べて濃い、
請求項11に記載の光検出装置。 - 前記第3の半導体領域は、前記増倍領域に比べて厚い、請求項11に記載の光検出装置。
- 前記第2の反射部は、前記増倍領域と電気的に接続されるカソード部を含む、請求項1に記載の光検出装置。
- 前記各画素は、前記画素分離壁の内側面を覆うホール蓄積領域を有する、
請求項14に記載の光検出装置。 - 前記第2の反射部は、前記ホール蓄積領域の前記第2の面側の上に設けられたアノード部を含む、請求項15に記載の光検出装置。
- 第1の方向に沿って前記画素アレイ部の中心から端部へ向かうに従って、
前記第1の方向に対して垂直な第2の方向に沿って、前記画素分離壁から前記画素中心向かって突出する距離が長くなる、
請求項7に記載の光検出装置。 - 前記第2の方向に沿って前記画素アレイ部の中心から端部へ向かうに従って、
前記第1の方向に沿って、前記画素分離壁から前記画素中心向かって突出する距離が長くなる、
請求項17に記載の光検出装置。 - 半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を有し、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
光検出装置を、搭載する電子機器。 - 照射光を照射する照明装置と、
前記照射光が被写体により反射された反射光を受光する光検出装置と、
を備え、
前記光検出装置は、
半導体基板上にマトリックス状に配列し、光を検出する複数の画素を含む画素アレイ部を有し、
前記各画素は、
前記各画素を取り囲み、前記各画素を互いに分離する画素分離壁と、
前記半導体基板内に設けられ、光により電荷を発生する光電変換部と、
前記半導体基板内に設けられ、前記光電変換部からの電荷を増幅する増倍領域と、
前記半導体基板外へ向かう光を前記半導体基板内へ反射する第1及び第2の反射部と、
有し、
前記第1の反射部は、前記半導体基板の光を受光する第1の面上において、前記画素分離壁から画素中心に向かって突出するように設けられ、
前記第2の反射部は、前記半導体基板の、前記第1の面と対向する第2の面上に設けられる、
測距システム。
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