WO2022152919A1 - Schémas de modulation et de codage - Google Patents

Schémas de modulation et de codage Download PDF

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Publication number
WO2022152919A1
WO2022152919A1 PCT/EP2022/050923 EP2022050923W WO2022152919A1 WO 2022152919 A1 WO2022152919 A1 WO 2022152919A1 EP 2022050923 W EP2022050923 W EP 2022050923W WO 2022152919 A1 WO2022152919 A1 WO 2022152919A1
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Prior art keywords
mapping
information bits
bits
mcs
type information
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PCT/EP2022/050923
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English (en)
Inventor
Leif Wilhelmsson
Miguel Lopez
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Telefonaktiebolaget Lm Ericsson (Publ)
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Publication of WO2022152919A1 publication Critical patent/WO2022152919A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H04L1/0003—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H04L1/006—Trellis-coded modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/007—Unequal error protection

Definitions

  • the present disclosure relates generally to the field of signal processing for communication. More particularly, it relates to generation and processing of modulation symbols in relation to various modulation and coding schemes (MCSs).
  • MCSs modulation and coding schemes
  • LA link adaptation
  • signal processing e.g., in terms of one or more of: hardware utilization, required circuit size, power consumption, etc.
  • proper communication performance e.g., in terms of one or more of: data rate, bit error rate, etc.
  • the physical product may comprise one or more parts, such as controlling circuitry in the form of one or more controllers, one or more processors, or the like.
  • a first aspect is a method of using a single modulation alphabet to generate, based on information bits, modulated symbols for transmission according to first and second modulation and coding schemes (MCSs) with different data rates.
  • MCSs modulation and coding schemes
  • the method comprises - for a first time interval - generating first encoded bits by feeding the information bits of the first time interval to a first encoder that implements a first error correcting binary code, and generating modulated symbols according to the first MCS by a first mapping of the first encoded bits to the modulation alphabet.
  • the method also comprises - for a second time interval - organizing the information bits of the second time interval into first type information bits and second type information bits, generating second encoded bits by feeding the second type information bits to a second encoder that implements a second error correcting binary code, and generating modulated symbols according to the second MCS by a second mapping of a combination of the first type information bits and the second encoded bits to the modulation alphabet.
  • the second mapping is different than the first mapping.
  • the method further comprises transmitting the modulated symbols according to the first MCS during the first time interval and transmitting the modulated symbols according to the second MCS during the second time interval.
  • feeding the second type information bits to the second encoder comprises feeding only the second type information bits to the second encoder.
  • the first mapping comprises Gray mapping.
  • a Euclidean distance between two modulated symbols corresponding to the same value of the second encoded bits according to the second mapping exceeds a distance threshold value.
  • the second mapping comprises trellis coded modulation (TCM) mapping.
  • TCM trellis coded modulation
  • the method further comprises using the first and second MCSs for link adaptation.
  • the modulated symbols are generated using phase shift keying (PSK) or quadrature amplitude modulation (QAM).
  • PSK phase shift keying
  • QAM quadrature amplitude modulation
  • the modulation alphabet has a size of two to the power of k, wherein k is a positive integer larger than two.
  • the first and/or second error correcting binary code is a convolutional code.
  • the first MCS has a data rate which is lower than a data rate of the second MCS.
  • the second error correcting binary code is a same error correcting binary code as the first error correcting binary code, and/or the second encoder is a same encoder as the first encoder.
  • a second aspect is a method of processing modulated symbols in relation to a modulation and coding scheme (MCS), wherein the modulated symbols are based on information bits organized into first type information bits and second type information bits, the second type information bits fed to an encoder that implements an error correcting binary code to generate encoded bits, and the modulated symbols generated by a mapping of a combination of the first type information bits and the encoded bits to a modulation alphabet.
  • MCS modulation and coding scheme
  • the method comprises determining individual bit metrics for the encoded bits, feeding the individual bit metrics for the encoded bits to a decoder for the error correcting binary code to generate bit decisions for the second type information bits, determining a decision condition for the first type information bits, and applying the determined decision condition to the modulated symbols to generate bit decisions for the first type information bits.
  • the decision condition is associated with the modulation alphabet and is based on encoded bit values corresponding to the bit decisions for the second type information bits.
  • the MCS is a second MCS
  • the error correcting binary code is a second error correcting binary code
  • the encoder is a second encoder
  • the encoded bits are second encoded bits
  • the mapping is a second mapping. Then, modulated symbols according to a first MCS with different data rate than the second MCS are based on information bits fed to a first encoder that implements a first error correcting binary code to generate first encoded bits, and generated by a first mapping of the first encoded bits to the modulation alphabet, wherein the second mapping is different than the first mapping.
  • the method further comprises processing modulated symbols in relation to the first MCS by determining individual bit metrics for the first encoded bits, and feeding the individual bit metrics for the first encoded bits to the decoder to generate bit decisions for the information bits.
  • the method further comprises receiving the modulated symbols.
  • a third aspect is a computer program product comprising a non-transitory computer readable medium, having thereon a computer program comprising program instructions.
  • the computer program is loadable into a data processing unit and configured to cause execution of the method according to any of the first and second aspects when the computer program is run by the data processing unit.
  • a fourth aspect is an apparatus configured to cause using of a single modulation alphabet for generation, based on information bits, of modulated symbols for transmission according to first and second modulation and coding schemes (MCSs) with different data rates.
  • the apparatus comprises controlling circuitry.
  • the controlling circuitry is configured to cause - for a first time interval - generation of first encoded bits by feeding of the information bits of the first time interval to a first encoder that implements a first error correcting binary code, and generation of modulated symbols according to the first MCS by first mapping of the first encoded bits to the modulation alphabet.
  • the controlling circuitry is also configured to cause - for a second time interval - organization of the information bits of the second time interval into first type information bits and second type information bits, generation of second encoded bits by feeding of the second type information bits to a second encoder that implements a second error correcting binary code, and generation of modulated symbols according to the second MCS by second mapping of a combination of the first type information bits and the second encoded bits to the modulation alphabet.
  • the second mapping is different than the first mapping.
  • the apparatus further comprises one or more of: the first encoder, the second encoder, one or more serial-to-parallel converter, a modulation mapper configured for the first and second mappings, and a modulator.
  • a fifth aspect is an apparatus configured to cause processing of modulated symbols in relation to a modulation and coding scheme (MCS), wherein the modulated symbols are based on information bits organized into first type information bits and second type information bits, the second type information bits fed to an encoder that implements an error correcting binary code to generate encoded bits, and the modulated symbols generated by a mapping of a combination of the first type information bits and the encoded bits to a modulation alphabet.
  • MCS modulation and coding scheme
  • the apparatus comprises controlling circuitry.
  • the controlling circuitry is configured to cause determination of individual bit metrics for the encoded bits, feeding of the individual bit metrics for the encoded bits to a decoder for the error correcting binary code to generate bit decisions for the second type information bits, determination of a decision condition for the first type information bits, wherein the decision condition is associated with the modulation alphabet and is based on encoded bit values corresponding to the bit decisions for the second type information bits, and application of the determined decision condition to the modulated symbols to generate bit decisions for the first type information bits.
  • the MCS is a second MCS
  • the error correcting binary code is a second error correcting binary code
  • the encoder is a second encoder
  • the encoded bits are second encoded bits
  • the mapping is a second mapping. Then, modulated symbols according to a first MCS with different data rate than the second MCS are based on information bits fed to a first encoder that implements a first error correcting binary code to generate first encoded bits, and generated by a first mapping of the first encoded bits to the modulation alphabet, wherein the second mapping is different than the first mapping.
  • the apparatus is further configured to cause processing of modulated symbols in relation to the first MCS by the controlling circuitry being configured to cause determination of individual bit metrics for the first encoded bits, and feeding of the individual bit metrics for the first encoded bits to the decoder to generate bit decisions for the information bits.
  • the apparatus further comprises one or more of: a de-modulator, a bit metric calculator, and the decoder.
  • a sixth aspect is a transmitter comprising the apparatus of the fourth aspect.
  • a seventh aspect is a receiver comprising the apparatus of the fifth aspect.
  • An eighth aspect is a communication device comprising one or more of the apparatus of the fourth aspect, the apparatus of the fifth aspect, the transmitter of the sixth aspect, and the receiver of the seventh aspect.
  • any of the above aspects may additionally have features identical with or corresponding to any of the various features as explained above for any of the other aspects.
  • An advantage of some embodiments is that alternative approaches for modulation and coding are provided.
  • An advantage of some embodiments is that different MCSs are enabled (e.g., for link adaptation).
  • An advantage of some embodiments is that efficient signal processing is accomplished (e.g., in a transmitter and/or in a receiver).
  • An advantage of some embodiments is that efficient reuse of the hardware (e.g., more efficient than according to other approaches) may be enabled in relation to different MCSs.
  • encoding hardware and/or mapping hardware may be reused for generation of different MCSs in a transmitter.
  • decoding hardware and/or metric determining hardware may be reused for processing of different MCSs in a receiver.
  • An advantage of some embodiments is that proper communication performance is enabled.
  • Figure 1 is a flowchart illustrating example method steps according to some embodiments
  • Figure 2 is a flowchart illustrating example method steps according to some embodiments
  • Figure 3 is a collection of schematic block diagrams illustrating example arrangements according to some embodiments
  • Figure 4 is a collection of schematic drawings illustrating example mappings according to some embodiments.
  • Figure 5 is a simulation plot illustrating example results achievable by application of some embodiments.
  • Figure 6 is a simulation plot illustrating example results achievable for comparison with some embodiments
  • Figure 7 is a schematic block diagram illustrating an example apparatus according to some embodiments.
  • Figure 8 is a schematic block diagram illustrating an example apparatus according to some embodiments.
  • Figure 9 is a schematic drawing illustrating an example computer readable medium according to some embodiments.
  • a modulated symbol When a modulated symbol is referred to herein, it should be understood that that term encompasses both (i.e., can refer to either, or both, of - depending on the context) a symbol generated for transmission (i.e., a symbol of a modulation alphabet) and a symbol received after transmission over a communication channel (e.g., a combination of a symbol of a modulation alphabet and distortions caused by the communication channel).
  • a symbol generated for transmission i.e., a symbol of a modulation alphabet
  • a symbol received after transmission over a communication channel e.g., a combination of a symbol of a modulation alphabet and distortions caused by the communication channel.
  • the described embodiments will exemplify solutions where the first and second error correcting binary codes are the same error correcting binary code, and where a single encoder that implements the error correcting binary code is used as both the first encoder and the second encoder. It should be noted, however, that other embodiments encompass solutions where the first and second encoders are different encoders and/or where the first and second error correcting binary codes are different error correcting binary codes. Furthermore, it should be noted that some embodiments encompass solutions where different decoders are used for the first and second MCSs, even though the following examples uses the same decoder for the first and second MCSs.
  • Figure 1 illustrates an example method 100 according to some embodiments.
  • the method may, for example, be performed in a communication device comprising a transmitter.
  • the method 100 uses a single modulation alphabet and a single encoder that implements an error correcting binary code to generate modulated symbols for transmission.
  • the modulated symbols are generated based on (e.g., a stream of) information bits.
  • the error correcting binary code may be a convolutional code and/or the encoder may be a convolutional encoder (e.g., implemented using shift registers).
  • the encoder may be systematic or non-systematic.
  • the modulation alphabet may, for example, provide for modulated symbols generated using phase shift keying (PSK) or quadrature amplitude modulation (QAM).
  • PSK phase shift keying
  • QAM quadrature amplitude modulation
  • the modulation alphabet typically has a size of two to the power of k, wherein k is a positive integer (e.g., an integer larger than two).
  • Generation of the modulated symbols is performed according to first and second modulation and coding schemes (MCSs) with different data rates (i.e., different ratios of information bits per modulated symbol).
  • MCSs modulation and coding schemes
  • the first MCS may have a data rate which is lower than a data rate of the second MCS.
  • the different data rates may be achieved by using the encoder in different ways in relation to the information bits, as will be exemplified in the following.
  • Generation of modulated symbols is performed according to the first MCS during a first time interval and according to the second MCS during a second time interval.
  • the first and second time intervals may, for example, be determined using a link adaptation process. This is illustrated by optional steps 110 and 120.
  • step 110 it is determined whether the currently used MCS (e.g., defined via a current link adaptation setting) is adequate (Current MCS OK?). If so, the currently used MCS is maintained as indicated by the Y-path out of step 110. If the currently used MCS is not adequate (N-path out of step 110), another MCS may be selected as illustrated by step 120.
  • Link adaptation is well known and its principles will not be elaborated on further herein.
  • the method comprises feeding the information bits (e.g., all of the information bits) of the first time interval to the encoder, as illustrated by step 132, to generate first encoded bits. Then, the modulated symbols are generated according to the first MCS by a first mapping of the first encoded bits to the modulation alphabet, as illustrated by step 134.
  • the method comprises organizing (e.g., sorting or grouping) the information bits of the second time interval into first type information bits and second type information bits, as illustrated by step
  • the first type information bits may be regarded as un-coded information bits that will be used directly in the mapping to a modulation symbol.
  • the second type information bits may be regarded as coded information bits that will be processed by the encoder to produce encoded bits to be used in the mapping to a modulation symbol.
  • the second type information bits (e.g., only the second type information bits; not the first type information bits) are fed to the encoder, as illustrated by step 142, to generate second encoded bits.
  • the modulated symbols are generated according to the second MCS by a second mapping of a combination of the first type information bits and the second encoded bits to the modulation alphabet, as illustrated by step 144.
  • the method 100 may further comprise transmitting the modulated symbols, as illustrated by optional step 150.
  • the modulated symbols may be according to the first MCS during the first time interval and according to the second MCS during the second time interval.
  • the encoder is used in different ways in relation to the information bits for the first and second MCSs, there may be benefits from letting the first and second mappings being different mappings. It should be noted that such benefits may be relevant also when different encoders and/or different error correcting binary codes are used.
  • Gray mapping may be particularly suitable for mapping of bits that are provided by a powerful error correcting code.
  • a powerful error correcting code may be defined as a code with relatively low code rate and/or as a code which provides relatively high protection for all information bits and/or as a code which provides substantially equal protection for all information bits.
  • all bits that are used for the first mapping are encoded bits, which may motivate using Gray mapping.
  • the first mapping may comprise Gray mapping.
  • the second mapping may comprise TCM mapping.
  • the distance threshold value may be static or dynamic.
  • the distance threshold value may be equal to, or higher than, the average Euclidean distance between all pairs of modulated symbols in the modulation alphabet.
  • the distance threshold value may be only slightly less than the maximum Euclidean distance between all pairs of modulated symbols in the modulation alphabet. Thereby, the Euclidean distance between two modulated symbols corresponding to the same value of the second encoded bits (and different values of the first type information bit(s)) can be maximized.
  • Another way to express the latter is by using a mapping wherein a Euclidean distance between two modulated symbols corresponding to the same value of the second encoded bits (and different values of the first type information bit(s)) equals a maximum distance value, wherein the maximum distance value is the maximum Euclidean distance between all pairs of modulated symbols in the modulation alphabet.
  • Figure 2 illustrates an example method 200 according to some embodiments.
  • the method may, for example, be performed in a communication device comprising a receiver.
  • the method 200 implements processing of modulated symbols in relation to a modulation and coding scheme.
  • the modulated symbols comprise symbols received after transmission over a communication channel.
  • the processing of the modulated symbols has as a purpose to generate bit decisions for information bits which were used to generate the modulated symbols (e.g., before transmission over the communication channel).
  • the modulated symbols were generated (compare with steps 141, 142, 144 of Figure 1)
  • the modulated symbols were based on information bits organized into first type information bits and second type information bits, wherein the second type information bits were fed to an encoder that implements an error correcting binary code to generate encoded bits, and wherein the modulated symbols were generated by a mapping of a combination of the first type information bits and the encoded bits to the modulation alphabet.
  • Steps 241, 242, 243, 244 of Figure 2 illustrates processing of such modulated symbols (e.g., as received by a receiver).
  • the error correcting binary code may be a convolutional code.
  • the modulated symbols may, for example, correspond to modulated symbols according to the second MCS as described in connection with Figure 1.
  • the encoded bits correspond to the second encoded bits described in connection with Figure 1
  • the mapping corresponds to the second mapping described in connection with Figure 1.
  • individual bit metrics are determined for the encoded bits.
  • the individual bit metrics may be any suitable metric. Examples include any suitable soft bit value (e.g., a likelihood value, or a log-likelihood value).
  • step 242 the individual bit metrics for the encoded bits are fed to a decoder for the error correcting binary code to generate bit decisions for the second type information bits.
  • the decoder may be suitable for decoding of a convolutional code (e.g., a trellis decoder, such as a Viterbi decoder or a variation thereof).
  • a convolutional code e.g., a trellis decoder, such as a Viterbi decoder or a variation thereof.
  • a decision condition is determined for the first type information bits.
  • the decision condition is associated with the modulation alphabet and is based on encoded bit values corresponding to the bit decisions for the second type information bits.
  • the decision condition may comprise decision boundaries (e.g., corresponding to hard decisions) partitioning the modulation space.
  • the decision boundaries may partition the modulation space into two regions in relation to each first type information bit, or may partition the modulation space into two to the power of j regions in relation to collections comprising j first type information bits (j being a positive integer larger than one).
  • a decision boundary for a first type information bit may comprise (e.g., all) points in the modulation space that has the same Euclidean distance to two different modulated symbols that correspond to the same value of the second encoded bits and different values of the first type information bit.
  • step 244 the determined decision condition is applied to the modulated symbols to generate bit decisions for the first type information bits. Thus, no individual bit metrics need to be determined for the first type information bits.
  • the method 200 may comprise receiving the modulated symbols before processing.
  • the method 200 may comprise determining an applicable MCS, as illustrated by optional step 220.
  • step 220 may comprise extracting information regarding a currently used MCS from a communication packet comprising (or being otherwise associated with) the modulated symbols.
  • the determination of step 220 may be defined in association with a link adaptation approach. It may be determined that the first MCS as described in connection with Figure 1 is used in a first time interval and/or that the second MCS as described in connection with Figure 1 is used in a second time interval, for example.
  • the method comprises processing the modulated symbols by determining individual bit metrics for the first encoded bits as illustrated by optional step 231, and feeding the individual bit metrics for the first encoded bits to the decoder to generate bit decisions for the information bits as illustrated by optional step 232.
  • the method comprises processing the modulated symbols according to steps 241, 242, 243, and 244.
  • LA Link adaptation
  • MCS modulation and coding scheme
  • Different MCSs are typically obtained by combining a modulation scheme (e.g., defined by a modulation alphabet and a modulation mapping) with an error correcting (binary) code of a specific code rate.
  • the modulation schemes may typically be phase shift keying (PSK) or quadrature amplitude modulation (QAM).
  • the modulation alphabet is typically of size M (where M equals two to the power of k, where k is an integer greater or equal to 1).
  • Reasonable values for k may be in the range 1-4 for PSK, and in the range 1-10 for QAM.
  • the modulation mapping is typically Gray mapping for all supported modulation schemes. Since Gray mapping typically entails that different mapped bits have different reliabilities, interleaving may be employed to improve the performance of the error correcting code. However, no detailed design is traditionally done regarding which coded bit corresponds to which mapping bit for the M-ary symbols. This traditional approach is attractive in the sense that bit mapping used for the different modulations do not depend on the error correcting code.
  • TCM trellis coded modulation
  • k-1 bits of information may be transmitted as follows. One information bit is encoded with a rate 1/2 code, resulting in two coded bits, and the remaining k-2 information bits in the M-PSK symbol are defined by un-coded information bits. Forthis approach to provide proper performance, it may be considered important that the k-2 bits are properly mapped.
  • the TCM achieved in this way is rather simple. However, it is also limited to the situation where the overall data rate is relatively large, since the overall code rate to be (k-l)/k. It is noteworthy that the mapping of bits to M-ary symbols will generally not be according to Gray mapping for TCM.
  • Gray mapping typically works well with powerful error correcting codes, while TCM may be a better approach for some combinations of modulations and code rates. Gray mapping can generally not be used in combination with TCM, while bit mappings providing proper performance for TCM typically result in inferior performance when coding and modulation are not treated jointly. Thus, when LA is used, the use of a single bit mapping type (e.g., Gray mapping or TCM mapping) may result in degraded performance since a mapping that gives the best (or at least good) performance for TCM modes will often result in significantly degraded performance for non- TCM modes, and/or vice versa.
  • a single bit mapping type e.g., Gray mapping or TCM mapping
  • a method is proposed where the modulation bit mapping is selected based on the used encoding approach. Specifically, Gray mapping may be used as a default bit mapping and a small modification may be applied when TCM is employed, such that the bit mapping fulfills TCM requirements.
  • LA adaptation may be used over a large range of MCS, where the different MCSs can be optimized individually. This may allow for improved performance at a cost of insignificant increase in implementation complexity.
  • the principles of some embodiments will be illustrated by a specific example where the modulation alphabet is 8-PSK and where the error correcting code is a binary rate 1/2 convolutional code, implemented using an encoder with eight states.
  • the same code/encoder and modulation alphabet may be a goal to use the same code/encoder and modulation alphabet to obtain two different (first and second) modulation and coding schemes.
  • the data rates for the two different modulation and coding schemes are 1.5 information bits per symbol and 2 information bits per symbol, respectively.
  • Figure 3 schematically illustrates three example arrangements (a), (b), (c) according to some embodiments.
  • information bits 301 are fed to an encoder (ENC) 320 to provide encoded bits 304 (compare with step 132 of Figure 1).
  • the encoder may be a rate 1/2 encoder.
  • the encoded bits 304 are organized by a seria l-to-pa ra I lei converter (S/P) 330 into groups 305 of encoded bits. Each group may comprise three encoded bits.
  • Each group 305 of encoded bits is input to a mapper (MAP) 340 configured to map the group 305 of encoded bits to a symbol representation 306 of a modulation alphabet (compare with step 134 of Figure 1).
  • MAP mapper
  • the modulation alphabet may be an 8-PSK alphabet.
  • the mapper may employ Gray mapping.
  • the symbol representation 306 may be a complex number.
  • the symbol representation 306 is input to a modulator (MOD) 350 configured to generate a modulated symbol 307.
  • the modulator may be an in-phase/quadrature modulator.
  • a rate of 1.5 information bits per symbol may be obtained by first encoding the information bits using a rate 1/2 convolutional code and then mapping three encoded bits to one 8-PSK symbol.
  • this mapping is supported by the serial-to-parallel converter.
  • Gray mapping is typically used as it typically gives the best performance.
  • mapping In terms of symbol error rate, the mapping is of no importance. However, when the error correcting code is binary, the mapping typically has significant importance to the information bit error rate. As will be shown later, the impact of the mapping on performance is much larger for a coded system than for an un-coded system.
  • Gray mapping The basic idea of Gray mapping is that two adjacent modulation symbols should correspond to bit values that only differ in one of the bit positions; as this minimizes the (average) number of bit errors when a symbol error occurs.
  • Puncturing One approach for increasing the data rate is to increase the rate of the error correcting code by puncturing, meaning that some of the encoded bits are simply discarded. Puncturing enables the same encoder and decoder to be used for different data rate schemes, and for some situations the performance is acceptable. However, performance may be unacceptable in some situations. For example, in the case above with a low complexity code with only eight states, puncturing may give a noticeable loss.
  • information bits 301 are organized by a serial-to-parallel converter (S/P) 310 into first type information bits 302 and second type information bits 303 (compare with step 141 of Figure 1).
  • every other bit may be organized as a first type information bit and every other bit may be organized as a second type information bit.
  • the second type information bits 303 are fed to an encoder (ENC) 320 to provide encoded bits 304 (compare with step 142 of Figure 1).
  • the encoder may be a rate 1/2 encoder.
  • the encoded bits 304 are organized by a serial-to-pa ra I lei converter (S/P) 330 into groups 305 of encoded bits.
  • Each group may comprise two encoded bits.
  • Each group 305 of encoded bits, combined with one (or more) first type information bit 302, is input to a mapper (MAP) 340 configured to map the combination of one (or more) first type information bit 302 and a group 305 of encoded bits to a symbol representation 306 of a modulation alphabet (compare with step 144 of Figure 1).
  • the modulation alphabet may be an 8-PSK alphabet.
  • the mapper may employ TCM mapping.
  • the symbol representation 306 may be a complex number.
  • the symbol representation 306 is input to a modulator (MOD) 350 configured to generate a modulated symbol 307.
  • the modulator may be an in-phase/quadrature modulator.
  • a rate of 2 information bits per symbol may be obtained by employing trellis coded modulation; still reusing the same error correcting code (and corresponding encoder), but without puncturing.
  • the TCM mapping used in this example is illustrated in part (b) of Figure 4.
  • This approach relates to what Viterbi et al. refers to as a pragmatic approach, where two information bits are mapped into an 8-PSK signal by using one of the two information bits to select a half-plane of the modulation space (this bit is transmitted un-coded an is represented as the most significant bit in part (b) Figure 4; the left-most bit in the mapping).
  • the other one of the two information bits is encoded using the 1/2 convolutional encoder, and the encoded bits are used to select a symbol of the selected half-plane.
  • three bits are obtained and used for selecting the symbol to be transmitted.
  • TCM as such is well-known and will not be elaborated on further herein. It may, however, be emphasized that the mapping used for TCM should preferably be such that - using this example - a bit pattern [0 x y] corresponds to a symbol that is as far away as possible from the symbol that corresponds to the bit pattern [1 x y], where x and y can take the values 0 or 1. Since the most significant bit is un-coded, a decision for that bit is made once x and y are determined by decoding. Referring to part (a) of Figure 4 it is seen that, for example, [0 0 0] and [1 0 0] represent symbols that are next to each other.
  • Arrangement (c) of Figure 3 represents a combination of arrangements (a) and (b), in which a controller (CNTR) 300 controls the operations of a se ria l-to-pa ra I lei converter (S/P) 310, a serial- to-parallel converter (S/P) 330, and a mapper (MAP) 340.
  • CNTR controller
  • S/P se ria l-to-pa ra I lei converter
  • S/P serial- to-parallel converter
  • MAP mapper
  • a first mode e.g., for a first modulation and coding scheme
  • information bits 301 are fed directly to an encoder (ENC) 320 to provide encoded bits 304 (compare with step 132 of Figure 1).
  • the controller 300 bypasses the se ria l-to-pa ra I le I converter 310 such that there are no first type information bits 302 and such that the second type information bits 303 are identical to the information bits 301.
  • the encoded bits 304 are organized by the serial-to-parallel converter 330 into groups 305 of three encoded bits.
  • the controller 300 instructs the serial-to-parallel converter 330 such that groups of three encoded bits are provided.
  • Each group 305 of encoded bits is input to the mapper 340 that is configured to map the group 305 of encoded bits to a symbol representation 306 of a modulation alphabet (compare with step 134 of Figure 1).
  • the controller 300 instructs the mapper 340 to apply a suitable mapping, e.g., Gray mapping.
  • the symbol representation 306 is input to a modulator (MOD) 350 configured to generate a modulated symbol 307.
  • MOD modulator
  • information bits 301 are organized by the serial-to-parallel converter 310 into first type information bits 302 and second type information bits 303 (compare with step 141 of Figure 1).
  • the controller 300 instructs the serial-to-parallel converter 310 to perform the organization.
  • the second type information bits 303 are fed to the encoder 320 to provide encoded bits 304 (compare with step 142 of Figure 1).
  • the encoded bits 304 are organized by the serial-to-parallel converter 330 into groups 305 of two encoded bits.
  • the controller 300 instructs the serial-to-parallel converter 330 such that groups of two encoded bits are provided.
  • Each group 305 of encoded bits, combined with one first type information bit 302, is input to the mapper 340 to provide a symbol representation 306 of a modulation alphabet (compare with step 144 of Figure 1).
  • the controller 300 instructs the mapper 340 to apply a suitable mapping, e.g., TCM mapping.
  • the symbol representation 306 is input to the modulator 350 to generate a modulated symbol 307.
  • Gray mapping should preferably not be used for of TCM-type coding.
  • the system represented by arrangement (a) of Figure 3 has been simulated with Gray mapping and with TCM mapping for additive white Gaussian noise (AWGN).
  • AWGN additive white Gaussian noise
  • the bit error rate (BER) results are shown in Figure 5 as a function of Eb/NO, where Eb represents energy per bit and the AWGN noise is specified by NO.
  • Eb represents energy per bit
  • NO noise
  • TCM is preferable for some data rates, but has limited flexibility and is primarily intended for high spectrum efficiency modes, it may be concluded that there can be situations where it may be of interest to be able to perform link adaptation where some (e.g., only one or a few) of the modes are based on TCM, whereas other modes are treating coding and modulation as separate entities. In order to enable that, it may be preferable to carefully select what bit mapping to use, as has been demonstrated above.
  • a system for employing link adaptation where two MCSs with different data rates are using the same modulation alphabet, but with different bit mapping; depending on how the coding of the binary information data is performed.
  • calculation of the soft values may be based on the modulation symbol that corresponds to a transition of the decoder from a first encoder state to a second encoder state.
  • the soft value may typically be based on the Euclidian distance between the received symbol and the corresponding transmission modulation symbol.
  • the soft values are typically obtained in a different way. Specifically, a log-likelihood ratio may be obtained for the individual encoded bits and used for decoding.
  • decoding block implementations of the Viterbi algorithm for decoding of a convolutional code but if soft values are generated differently for TCM such decoding block can generally not be reused for TCM, at least not without some modification.
  • the encoded bits of the TCM scheme may be treated similarly to how encoded bits are treaded in the non-TCM scheme (the first MCS); by calculating the log-likelihood ratio (or another suitable metric, such as any suitable soft value) for the encoded bits.
  • the decoding is performed in the same way for the first and second MCS (e.g., using the Viterbi algorithm).
  • the corresponding encoded bits are determined for the second MCS (e.g., by re-encoding the decoded sequence or by using the output bits on what has been found to be the most likely path in the trellis).
  • the thus determined encoded bits (correctly estimated with high probability) may be used to determine a proper decision boundary for making a decision regarding the un-coded bit for the second MCS.
  • the log-likelihood ratios are calculated for all of the encoded bits, i.e., bit 2 and bit 3 in the symbols (refer to part (b) of Figure 4). This is done in the traditional way; by considering the symbols where a bit position has value 1 and the symbols where the same bit position has value 0, which together with the received symbol can be used to calculate the log-likelihood ratio for a bit position having value 1.
  • the decoding is then performed in the standard way, such that an estimation of the encoded bits is obtained. That is, for each 8-PSK symbol, values for the bits in positions 2 and 3 are now estimated. Based on the values of these bits, a maximum likelihood decision can be made for the bit in position 1.
  • the performance (at least for sufficiently small error rates) is known to be limited by the performance of the un-coded bit, rather than by the performance of the encoded bits. Therefore, any such minor performance loss typically has no practical significance.
  • a code may be used that is slightly more powerful than a code that otherwise would have been used. For the above example, a code with 8 states is used, although it is known that a code with only 4 states would suffice in case of optimum decoding metric.
  • PSK may be changed to another modulation type (e.g., QAM)
  • QAM modulation type
  • Code rate 1/2 may be changed to another code rate (any suitable)
  • Ratio between the number of first type information bits per second type information bit may be changed (any suitable)
  • mapping between bit values and symbols for the first MCS may be changed (as long as the principles explained above are followed; e.g., any Gray mapping)
  • mapping between bit values and symbols for the second MCS may be changed (as long as the principles explained above are followed; e.g., any TCM mapping and/or keeping symbols represented same encoded bit values far apart)
  • one of the mappings is a Gray mapping.
  • a method for decoding a TCM sequence generated using an error correcting code and uncoded bits wherein decoding of the error correcting code uses soft values based on a reliability of coded bits directly (rather than considering modulation symbols related to transitions in the decoding trellis).
  • the error correcting code is a convolutional code of rate 1/2 with 8 states.
  • Figure 7 schematically illustrates an example apparatus 710 according to some embodiments.
  • the apparatus 710 may, for example, be a transmitter device and/or a communication device; e.g., a wireless communication device, such as a radio access node (BS, AP) or a user device (UE, STA). Alternatively or additionally, the apparatus may be configured to perform (or cause performance of) any of the method steps as described in connection with Figure 1.
  • a wireless communication device such as a radio access node (BS, AP) or a user device (UE, STA).
  • UE user device
  • STA user device
  • the apparatus may comprise any of the arrangements (or any part(s) thereof) as described in connection with Figure 3.
  • the apparatus 710 is configured to cause using of a single modulation alphabet (and - in some embodiments - a single encoder that implements an error correcting binary code) for generation, based on information bits, of modulated symbols for transmission according to first and second modulation and coding schemes (MCSs) with different data rates.
  • MCSs modulation and coding schemes
  • the apparatus 710 comprises a controller (CNTR; e.g., controlling circuitry or a control module) 700.
  • CNTR e.g., controlling circuitry or a control module
  • the controller 700 is configured to cause, for a first time interval, generation of first encoded bits by feeding of the information bits of the first time interval to the encoder (compare with step 132 of Figure 1), and generation of modulated symbols according to the first MCS by first mapping of the first encoded bits to the modulation alphabet (compare with step 134 of Figure 1).
  • the controller 700 is also configured to cause, for a second time interval, organization of the information bits of the second time interval into first type information bits and second type information bits (compare with step 141 of Figure 1), generation of second encoded bits by feeding of the second type information bits to the encoder (compare with step 142 of Figure 1), and generation of modulated symbols according to the second MCS by second mapping of a combination of the first type information bits and the second encoded bits to the modulation alphabet (compare with step 144 of Figure 1).
  • the controller 700 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) one or more of: an encoder 702 (compare with 320 of Figure 3), one or more serial-to-parallel converter 702, 704 (compare with 310, 330 of Figure 3), a modulation mapper 705 (compare with 340 of Figure 3), and a modulator 706 (compare with 350 of Figure 3).
  • an encoder 702 (compare with 320 of Figure 3)
  • one or more serial-to-parallel converter 702, 704 (compare with 310, 330 of Figure 3)
  • a modulation mapper 705 compare with 340 of Figure 3
  • a modulator 706 compact with 350 of Figure 3
  • One or more of the above may be in the form of circuitry and/or a module configured to perform the corresponding function, as described herein.
  • a module when referred to herein, it is meant to encompass a hardware module, or a software module, or a combination thereof.
  • the controller 700 is further configured to cause transmission of the modulated symbols according to the first MCS during the first time interval and transmission of the modulated symbols according to the second MCS during the second time interval (compare with step 150 of Figure 1).
  • the controller 700 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) a transmitter (TX; e.g., transmitting circuitry or a transmission module) 730.
  • TX e.g., transmitting circuitry or a transmission module
  • the transmitter may be configured to transmit the modulated symbols.
  • the controller 700 is further configured to cause the first and second MCSs to be used for link adaptation (compare with steps 110, 120 of Figure 1).
  • the controller 700 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) a link adapter (LA; e.g., link adapting circuitry or a link adaptation module) 701.
  • LA link adapter
  • Figure 8 schematically illustrates an example apparatus 810 according to some embodiments.
  • the apparatus 810 may, for example, be a receiver device and/or a communication device; e.g., a wireless communication device, such as a radio access node (BS, AP) or a user device (UE, STA).
  • a wireless communication device such as a radio access node (BS, AP) or a user device (UE, STA).
  • BS radio access node
  • UE user device
  • the apparatus may be configured to perform (or cause performance of) any of the method steps as described in connection with Figure 2.
  • the apparatus 810 is configured to cause processing of modulated symbols in relation to a (second) modulation and coding scheme, wherein the modulated symbols are based on information bits organized into first type information bits and second type information bits, the second type information bits fed to an encoder that implements an error correcting binary code to generate (second) encoded bits, and the modulated symbols generated by a (second) mapping of a combination of the first type information bits and the encoded bits to the modulation alphabet.
  • the apparatus 810 comprises a controller (CNTR; e.g., controlling circuitry or a control module) 800.
  • CNTR e.g., controlling circuitry or a control module
  • the controller 800 is configured to cause determination of individual bit metrics for the encoded bits (compare with step 241 of Figure 2), feeding of the individual bit metrics for the encoded bits to a decoder for the error correcting binary code to generate bit decisions for the second type information bits (compare with step 242 of Figure 2), determination of a decision condition for the first type information bits (compare with step 243 of Figure 2), wherein the decision condition is associated with the modulation alphabet and is based on encoded bit values corresponding to the bit decisions for the second type information bits, and application of the determined decision condition to the modulated symbols to generate bit decisions for the first type information bits (compare with step 244 of Figure 2).
  • the controller 800 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) one or more of: a de-modulator 802, a bit metric calculator 803, a decoder 804, a decision condition determiner 805, and a second type information bit decider 806.
  • a de-modulator 802 e.g., connected, or connectable, to
  • a bit metric calculator 803 e.g., a processor 804
  • a decoder 804 e.g., a bit metric calculator 803
  • a decision condition determiner 805 e.g., a decision condition determiner 805
  • a second type information bit decider 806 e.g., a second type information bit decider 806.
  • One or more of the above may be in the form of circuitry and/or a module configured to perform the corresponding function, as described herein.
  • the apparatus 810 may also be configured to cause processing of modulated symbols in relation to a first MCS with different data rate than the second MCS, by the controlling circuitry being configured to cause determination of individual bit metrics for the first encoded bits (compare with step 231 of Figure 2), and feeding of the individual bit metrics for the first encoded bits to the decoder to generate bit decisions for the information bits (compare with step 232 of Figure 2).
  • the controller 800 is further configured to cause reception of the modulated symbols (compare with step 210 of Figure 2).
  • the controller 800 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) a receiver (RX; e.g., receiving circuitry or a reception module) 830.
  • the receiver may be configured to receive the modulated symbols.
  • controller 800 is further configured to cause determination of which of the first and second MCSs to be used (compare with steps 220 of Figure 2).
  • the controller 800 may comprise, or be otherwise associated with (e.g., connected, or connectable, to) a determiner (DET; e.g., determining circuitry or a determination module) 801.
  • a determiner e.g., determining circuitry or a determination module 801.
  • the described embodiments and their equivalents may be realized in software or hardware or a combination thereof.
  • the embodiments may be performed by general purpose circuitry. Examples of general purpose circuitry include digital signal processors (DSP), central processing units (CPU), co-processor units, field programmable gate arrays (FPGA) and other programmable hardware.
  • DSP digital signal processors
  • CPU central processing units
  • FPGA field programmable gate arrays
  • the embodiments may be performed by specialized circuitry, such as application specific integrated circuits (ASIC).
  • ASIC application specific integrated circuits
  • the general purpose circuitry and/or the specialized circuitry may, for example, be associated with or comprised in an apparatus such as a communication device.
  • Embodiments may appear within an electronic apparatus (such as a communication device) comprising arrangements, circuitry, and/or logic according to any of the embodiments described herein.
  • an electronic apparatus such as a communication device
  • an electronic apparatus may be configured to perform methods according to any of the embodiments described herein.
  • a computer program product comprises a tangible, or non-tangible, computer readable medium such as, forexample a universal serial bus (USB) memory, a plug-in card, an embedded drive or a read only memory (ROM).
  • Figure 9 illustrates an example computer readable medium in the form of a compact disc (CD) ROM 900.
  • the computer readable medium has stored thereon a computer program comprising program instructions.
  • the computer program is loadable into a data processor (PROC; e.g., data processing circuitry or a data processing unit) 920, which may, for example, be comprised in a communication device 910.
  • PROC data processor
  • the computer program may be stored in a memory (MEM) 930 associated with or comprised in the data processor.
  • the computer program may, when loaded into and run by the data processor, cause execution of method steps according to, for example, any of the methods illustrated in Figures 1 and 2 or otherwise described herein.
  • all terms used herein are to be interpreted according to their ordinary meaning in the relevant technical field, unless a different meaning is clearly given and/or is implied from the context in which it is used.
  • the method embodiments described herein discloses example methods through steps being performed in a certain order. However, it is recognized that these sequences of events may take place in another order without departing from the scope of the claims. Furthermore, some method steps may be performed in parallel even though they have been described as being performed in sequence. Thus, the steps of any methods disclosed herein do not have to be performed in the exact order disclosed, unless a step is explicitly described as following or preceding another step and/or where it is implicit that a step must follow or precede another step.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

L'invention concerne un procédé d'utilisation d'un alphabet de modulation unique pour générer, sur la base de bits d'informations, des symboles modulés pour la transmission selon des premier et second schémas de modulation et de codage (MCS) avec des débits de données différents, qui consiste à, pour un premier intervalle de temps, générer des premiers bits codés en fournissant les bits d'informations du premier intervalle de temps à un premier codeur qui implémente un premier code binaire de correction d'erreur et générer des symboles modulés selon le premier MCS par un premier mappage des premiers bits codés avec l'alphabet de modulation. Le procédé consiste également à, pendant un second intervalle de temps, organiser les bits d'informations du second intervalle de temps en bits d'informations de premier type et en bits d'informations de second type, générer des seconds bits codés en fournissant les bits d'informations de second type à un second codeur qui implémente un second code binaire de correction d'erreur et générer des symboles modulés selon le second MCS par un second mappage d'une combinaison des bits d'informations de premier type et des seconds bits codés avec l'alphabet de modulation. Le second mappage est différent du premier mappage.
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Citations (2)

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US20030067991A1 (en) * 2001-09-07 2003-04-10 Communications Research Lab., Ind. Admin, Inst. Multi-mode block-coded modulation/demodulation method
US20030123562A1 (en) * 2001-12-28 2003-07-03 Eun-A Choi Adaptive modem, pragmatic decoder and decoding method

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