WO2022151645A1 - 半导体结构尺寸的测量方法及设备 - Google Patents

半导体结构尺寸的测量方法及设备 Download PDF

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Publication number
WO2022151645A1
WO2022151645A1 PCT/CN2021/098842 CN2021098842W WO2022151645A1 WO 2022151645 A1 WO2022151645 A1 WO 2022151645A1 CN 2021098842 W CN2021098842 W CN 2021098842W WO 2022151645 A1 WO2022151645 A1 WO 2022151645A1
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Prior art keywords
probe
semiconductor structure
amplitude
tested
semiconductor
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PCT/CN2021/098842
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English (en)
French (fr)
Inventor
李政
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长鑫存储技术有限公司
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Application filed by 长鑫存储技术有限公司 filed Critical 长鑫存储技术有限公司
Priority to EP21772656.1A priority Critical patent/EP4050643A4/en
Priority to US17/392,430 priority patent/US11656245B2/en
Publication of WO2022151645A1 publication Critical patent/WO2022151645A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Definitions

  • the embodiments of the present application relate to the field of semiconductor technology, and in particular, to a method and device for measuring the size of a semiconductor structure.
  • CD Critical Dimension
  • Atomic Force Microscope is widely used in the measurement of nanoscale semiconductor structures due to its high measurement accuracy and the ability to measure semiconductor structures without destroying the semiconductor structure when using the non-contact measurement mode.
  • the probe of the AFM is usually controlled to oscillate at a distance of 5 to 10 nm above the surface of the semiconductor structure. At this time, by detecting the interaction between the semiconductor structure and the above probe The force can analyze the surface structure of the semiconductor structure.
  • the AFM probe needs to reach the surface of the trench for a certain distance, and it is easy to touch the trench during the measurement process. The sidewalls of the trenches cause damage to the semiconductor structure.
  • the embodiments of the present application provide a method and device for measuring the size of a semiconductor structure, which can solve the problem of AFM problems in the prior art when the surface of the semiconductor structure has a small width and a large aspect ratio, that is, there are trenches with a high aspect ratio.
  • the probe needs to reach the surface of the trench for a certain distance, which is a technical problem that it is easy to damage the semiconductor structure during the measurement process.
  • an embodiment of the present application provides a method for measuring the size of a semiconductor structure, the method comprising:
  • Controlling the probe to scan the surface of the semiconductor structure to be tested along the direction parallel to the top surface of the semiconductor structure to be tested at the first distance, and to detect that the probe is on the surface of the semiconductor structure to be tested The amplitude of each scan point of ;
  • the critical dimension of the semiconductor structure to be tested is determined.
  • the probe for controlling the atomic force microscope moves from a preset reference position in a direction perpendicular to the top surface of the semiconductor structure to be tested by a first distance toward the top surface of the semiconductor structure to be tested.
  • Also includes:
  • a first amplitude threshold value and a second amplitude threshold value are determined based on the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • the determining of the first amplitude threshold and the second amplitude threshold according to the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample includes:
  • the first amplitude threshold A 1 is calculated based on:
  • the second amplitude threshold A 2 is calculated based on:
  • Aj represents the amplitude of the jth scanning point of the probe on the top surface of the semiconductor reference sample
  • m Indicates the number of scanning points of the probe on the top surface of the semiconductor reference sample.
  • determining the critical dimension of the semiconductor structure to be tested according to the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested includes:
  • the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is greater than or equal to the first amplitude threshold and less than or equal to the second amplitude threshold, outputting a first identification at the current scanning point;
  • the critical dimension of the semiconductor structure to be tested is determined according to the identification output when the surface of the semiconductor structure to be tested is scanned.
  • the determining the critical dimension of the semiconductor structure to be tested according to the identification output when scanning the surface of the semiconductor structure to be tested includes:
  • a boundary between the first region and the second region is determined, and a critical dimension of the semiconductor structure to be tested is determined according to the boundary between the first region and the second region.
  • the method further includes:
  • a preset reminder message is output, and the reminder message is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested.
  • the method before the control of the probe to move from the preset reference position to the top surface of the semiconductor reference sample by the first distance in a direction perpendicular to the top surface of the semiconductor reference sample, the method also includes:
  • the value of the probe when the probe is at the preset reference position and the driving frequency is the target driving frequency value.
  • a first amplitude, and a second amplitude when the probe moves the first distance in a direction perpendicular to the top surface of the semiconductor reference sample and the drive frequency is the target drive frequency value;
  • the first distance is determined according to the recorded moving distance of each movement of the probe.
  • the determining the first distance according to the recorded moving distance of the probe each time includes:
  • the first distance Z 1 is calculated based on:
  • n represents the number of times the probe moves.
  • the second distance Z 2 is calculated based on:
  • the moving distance Z i is less than the first distance Z 1 or greater than the second distance Z 2 , preset reminder information is output, and the reminder information is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested.
  • an embodiment of the present application provides a device for measuring the size of a semiconductor structure, the device comprising:
  • control module for controlling the probe of the atomic force microscope to move a first distance toward the top surface of the semiconductor structure to be tested from a preset reference position along a direction perpendicular to the top surface of the semiconductor structure to be tested;
  • the detection module is used to control the probe to scan the surface of the semiconductor structure to be tested along the direction parallel to the top surface of the semiconductor structure to be tested and keep the first distance, and to detect that the probe is in the surface of the semiconductor structure to be tested. Measure the amplitude of each scanning point on the surface of the semiconductor structure;
  • the processing module is configured to determine the critical dimension of the semiconductor structure to be tested according to the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested.
  • control module is further configured to control the probe to move from the preset reference position to the top surface of the semiconductor reference sample by a direction perpendicular to the top surface of the semiconductor reference sample. the first distance;
  • the detection module is further configured to control the probe to scan the top surface of the semiconductor reference sample while maintaining the first distance in a direction parallel to the top surface of the semiconductor reference sample, and to detect that the probe is at the top surface of the semiconductor reference sample. the amplitude of each scan point on the top surface of the semiconductor reference sample;
  • the processing module is further configured to determine a first amplitude threshold and a second amplitude threshold according to the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • the processing module is used for:
  • the first amplitude threshold A 1 is calculated based on:
  • the second amplitude threshold A 2 is calculated based on:
  • Aj represents the amplitude of the jth scanning point of the probe on the top surface of the semiconductor reference sample
  • m Indicates the number of scanning points of the probe on the top surface of the semiconductor reference sample.
  • the processing module is used for:
  • the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is greater than or equal to the first amplitude threshold and less than or equal to the second amplitude threshold, outputting a first identification at the current scanning point;
  • the critical dimension of the semiconductor structure to be tested is determined according to the identification output when the surface of the semiconductor structure to be tested is scanned.
  • the processing module is used for:
  • a boundary between the first region and the second region is determined, and a critical dimension of the semiconductor structure to be tested is determined according to the boundary between the first region and the second region.
  • a reminder module configured to output preset reminder information if the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is smaller than the first amplitude threshold, the reminder information is used to remind testers of the semiconductor structure to be tested There is an abnormality on the surface.
  • control module is further used for:
  • the value of the probe when the probe is at the preset reference position and the driving frequency is the target driving frequency value.
  • a first amplitude, and a second amplitude when the probe moves the first distance in a direction perpendicular to the top surface of the semiconductor reference sample and the drive frequency is the target drive frequency value;
  • the processing module is also used for:
  • the first distance is determined according to the recorded moving distance of each movement of the probe.
  • the processing module is used for:
  • the first distance Z 1 is calculated based on:
  • n represents the number of times the probe moves.
  • the processing module is further used for:
  • the second distance Z 2 is calculated based on:
  • the moving distance Z i is less than the first distance Z 1 or greater than the second distance Z 2 , preset reminder information is output, and the reminder information is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested.
  • embodiments of the present application provide an atomic force microscope, including: at least one processor and a memory;
  • the memory stores computer-executable instructions
  • the at least one processor executes computer-executable instructions stored in the memory to cause the at least one processor to perform the method for measuring the dimensions of a semiconductor structure as provided by the first aspect.
  • an embodiment of the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are executed, the semiconductor structure size as provided in the first aspect is realized. measurement method.
  • embodiments of the present application provide a computer program product, including a computer program, which, when executed by a processor, implements the method for measuring the size of a semiconductor structure provided in the first aspect.
  • the probe of the atomic force microscope is first controlled from a preset reference position in a direction perpendicular to the top surface of the semiconductor structure to be tested, toward the semiconductor structure to be tested.
  • the top surface moves a first distance, and then the probe is controlled to scan the surface of the semiconductor structure to be tested by maintaining the above-mentioned first distance along the direction parallel to the top surface of the semiconductor structure to be tested, and each scanning point of the probe on the surface of the semiconductor structure to be tested is detected.
  • the amplitude of the semiconductor structure to be tested is determined according to the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested.
  • the distance between the probe of the atomic force microscope and the top surface of the semiconductor structure to be tested is not affected by the surface structure of the semiconductor structure to be tested. Therefore, when the surface of the semiconductor structure to be tested has a small width and a large aspect ratio, That is, when there is a trench with a high aspect ratio, the above-mentioned probe will not descend into the trench for scanning, so that it will not touch the sidewall of the trench during the measurement process, so as to avoid damage to the semiconductor structure to be measured; at the same time, the key dimensions of the semiconductor structure to be tested are determined by detecting the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested. It is simple, not affected by the surface structure of the semiconductor structure to be tested, and has a wider range of applications.
  • FIG. 1 is a schematic flowchart 1 of a method for measuring the size of a semiconductor structure provided in an embodiment of the application;
  • FIG. 2 is a schematic diagram 1 of a measurement scene of a semiconductor structure size provided in an embodiment of the application;
  • FIG. 3 is a second schematic diagram of a measurement scene of a semiconductor structure size provided in an embodiment of the application.
  • FIG. 4 is a second schematic flowchart of a method for measuring the size of a semiconductor structure provided in an embodiment of the application;
  • FIG. 5 is a schematic diagram of the curve relationship between the amplitude of the probe of the AFM and the driving frequency when there is no force and when there is a force in the embodiment of the application;
  • FIG. 6 is a schematic flowchart 3 of a method for measuring the size of a semiconductor structure provided in an embodiment of the application;
  • FIG. 7 is a schematic diagram of the distribution area of the first mark and the second mark output when scanning the top surface of the semiconductor structure to be tested in an embodiment of the present application;
  • FIG. 8 is a schematic diagram of a program module of a critical dimension measuring device provided in an embodiment of the application.
  • FIG. 9 is a schematic diagram of the hardware structure of an atomic force microscope provided in an embodiment of the present application.
  • Atomic Force Microscope has been widely used in nanoscale semiconductor structures due to its high measurement accuracy and the ability to measure semiconductor structures without destroying the semiconductor structure in the non-contact measurement mode.
  • Dynamic random access memory Dynamic Random Access Memory, DRAM process size measurement.
  • AFM studies the surface structure and properties of the semiconductor structure by detecting the extremely weak interatomic interaction force between the surface of the semiconductor structure to be tested and a miniature force-sensitive element.
  • one end of a pair of extremely sensitive micro-cantilevers is fixed, and the micro-probe at the other end is close to the surface of the semiconductor structure.
  • the micro-probe will interact with the surface of the semiconductor structure, and the force will cause the micro-cantilever to deform. or changes in motion status.
  • the force distribution information can be obtained, thereby obtaining the surface topography structure information and surface roughness information of the semiconductor structure with nanometer resolution.
  • the probe of the AFM is usually controlled to oscillate at a distance of 5-10 nm above the surface of the semiconductor structure.
  • the interaction force between the needles can analyze the surface structure of the semiconductor structure.
  • the AFM probe needs to reach the surface of the trench for a certain distance, and it is easy to touch the trench during the measurement process.
  • the sidewalls of the trenches cause damage to the semiconductor structure.
  • photoresists with high aspect ratio trenches it is difficult to measure the critical dimensions of the high aspect ratio trenches using the traditional non-contact measurement mode of AFM.
  • the embodiments of the present application provide a method for measuring the size of a semiconductor structure.
  • the distance between the probe of the AFM and the top surface of the semiconductor structure to be tested can be
  • the surface of the semiconductor structure has a small width and a large aspect ratio, that is, when there is a trench with a high aspect ratio, the probe of the AFM will not descend into the trench for scanning, so it will not touch the trench during measurement.
  • the sidewall of the trench avoids damage to the semiconductor structure to be tested; at the same time, the key dimensions of the semiconductor structure to be tested are determined by detecting the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested, without the need to detect the semiconductor to be tested
  • the interaction force between the structure and the above-mentioned probe is simple to measure, not affected by the surface structure of the semiconductor structure to be tested, and can be used to measure the key dimensions of the photoresist, and has a wider range of applications.
  • FIG. 1 is a schematic flow chart 1 of a method for measuring the size of a semiconductor structure provided in an embodiment of the application.
  • the execution body of this embodiment is an atomic force microscope, or an external device connected to the atomic force microscope, or can also It is performed by an atomic force microscope and an external device connected to the atomic force microscope, as shown in Figure 1.
  • the measurement methods of the semiconductor structure dimensions include:
  • FIG. 2 is a schematic diagram 1 of a measurement scene of a semiconductor structure size provided in the embodiments of the present application.
  • the probe 200 of the AFM can be controlled to move the first distance Z 1 from the preset reference position along the direction perpendicular to the top surface 101 of the semiconductor structure 100 to be tested toward the top surface 101 of the semiconductor structure 100 to be tested. .
  • the vertical distance between the reference position and the top surface 101 of the semiconductor structure 100 is greater than the first distance Z 1 .
  • FIG. 3 is a second schematic diagram of a measurement scene of a semiconductor structure size provided in the embodiments of the present application.
  • control probe 200 is controlled to scan the surface 101 of the semiconductor structure 100 to be tested along a direction parallel to the top surface 101 of the semiconductor structure 100 to be tested, maintaining a first distance Z 1 , for example, starting from the scanning point A1 , and scanning sequentially Point A2, scan point A3, scan point A4, scan point A5, etc. are scanned.
  • the distance of the probe 200 relative to the reference position during the scanning process keeps the first distance Z 1 unchanged. That is, when there is a trench on the top surface 101 of the semiconductor structure 100 to be tested, the probe does not descend into the trench for scanning, but maintains the first distance Z1 from the reference position for scanning.
  • the driving frequency of the probe 200 remains unchanged. That is, when the probe 200 has no applied force or the applied force remains unchanged, the amplitude of the probe 200 also remains unchanged.
  • the amplitude of the probe 200 at each scanning point is detected in real time.
  • the change in the distance between the probe of the AFM and the surface of the semiconductor structure to be tested can be determined according to the change of the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested. conditions, so as to determine the critical dimensions of the semiconductor structure to be tested.
  • the above-mentioned semiconductor structure to be tested is a photoresist.
  • CD-SEM Critical Dimension-Scanning Electron Microscope
  • CD-SEM is mainly based on The measurement is performed by bombarding the semiconductor surface with electron beams. Due to the low surface intensity of the photoresist, the existing CD-SEM cannot accurately measure the critical dimensions of the photoresist.
  • the measurement method provided in the embodiment of the present application by improving the AFM measurement method, enables the AFM to be applied to the measurement of the critical dimension of a photoresist with a high aspect ratio trench, and has a wider application range.
  • the distance between the probe of the atomic force microscope and the surface of the semiconductor structure to be tested is not affected by the surface structure of the semiconductor structure to be tested. It is small and has a large aspect ratio, that is, when there is a trench with a high aspect ratio, the above-mentioned probe will not descend into the trench for scanning, so that it will not touch the sidewall of the trench during the measurement process, avoiding treatment
  • the present application determines the key dimensions of the semiconductor structure to be tested by detecting the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested, and does not need to detect the difference between the semiconductor structure to be tested and the probe. The interaction force between them is simple to measure, not affected by the surface structure of the semiconductor structure to be tested, and has a wider range of applications.
  • FIG. 4 is a second schematic flowchart of a method for measuring the size of a semiconductor structure provided in an embodiment of the present application.
  • the method for measuring the size of the semiconductor structure further includes:
  • a reference position may be preset.
  • the probe of the AFM When the semiconductor reference sample is fixed on the measurement table of the AFM, and the probe of the AFM is at the reference position, the probe of the AFM can not be affected by the force on the top surface of the semiconductor reference sample .
  • the above-mentioned semiconductor reference sample can be understood as a semiconductor structure having the same surface structure as the semiconductor structure to be tested.
  • Step a According to the curve relationship between the probe's amplitude and the driving frequency when there is no force and when there is an acting force, determine the first amplitude of the probe when the probe is at the preset reference position and the driving frequency is the target driving frequency value , and a second amplitude when the probe moves a first distance in a direction perpendicular to the top surface of the semiconductor reference sample and the drive frequency is the target drive frequency value.
  • FIG. 5 is a schematic diagram of the curve relationship between the amplitude of the probe of the AFM and the driving frequency when there is no force and when there is a force in the embodiment of the present application. .
  • the amplitude of the probe of the AFM varies with the driving frequency both when there is no force and when there is a force.
  • it can be determined according to the curve relationship between the amplitude of the AFM probe and the driving frequency when there is no force and when the force is applied, the probe of the AFM when there is no force and when the force is applied can be determined.
  • the maximum value of the difference ⁇ A of the amplitudes, that is, the “maximum gradient position” shown in FIG. 5 is determined.
  • the driving frequency corresponding to the “maximum gradient position” is determined as the target driving frequency value, and when the driving frequency is the target driving frequency value, the probe of the AFM is inactive.
  • the amplitude at the time of the force is determined as the above-mentioned first amplitude, and the amplitude of the probe of the AFM when the force is applied is determined as the above-mentioned second amplitude.
  • Step b Adjust the probe to a preset reference position, and adjust the drive frequency of the probe to the target drive frequency value.
  • Step c control the probe to move several times from the preset reference position along the direction perpendicular to the top surface of the semiconductor reference sample, and record the moving distance of each movement of the probe and the amplitude of the probe after each movement, until the amplitude of the probe is reached is the second amplitude; wherein, the amplitude of the probe after each movement is greater than or equal to the above-mentioned second amplitude.
  • the probe can be controlled to move from a preset reference position along a direction perpendicular to the top surface of the semiconductor reference sample by a distance Z i , and the amplitude of the probe after the movement can be recorded, and then the probe can be controlled from the preset Set the reference position to move a distance Z i along the direction perpendicular to the top surface of the semiconductor reference sample, and record the amplitude of the probe after the movement, and reciprocate until the amplitude of the probe becomes the second amplitude.
  • the distance Z i the first distance/n.
  • the size of n may be preset, for example, n ⁇ 30.
  • the probe can be controlled to move a random distance from a preset reference position along the direction perpendicular to the top surface of the semiconductor reference sample, and the amplitude of the probe after the movement is recorded, and then the probe can be controlled to move from The preset reference position is randomly moved for a certain distance along the direction perpendicular to the top surface of the semiconductor reference sample, and the amplitude of the probe after the movement is recorded, and the process reciprocates until the amplitude of the probe becomes the second amplitude.
  • Step d Determine the first distance according to the recorded moving distance of each movement of the probe.
  • the first distance Z 1 can be calculated based on the following methods:
  • the second distance Z 2 is calculated based on:
  • the preset reminder information is output, and the reminder information is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested.
  • S402 control the probe to scan the top surface of the semiconductor reference sample at a first distance in a direction parallel to the top surface of the semiconductor reference sample, and detect the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • S403 Determine a first amplitude threshold and a second amplitude threshold according to the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • the first amplitude threshold A 1 may be calculated based on the following manner:
  • the second amplitude threshold A 2 is calculated based on:
  • the step S103 described above determines the key dimensions of the semiconductor structure to be tested according to the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested, specifically including:
  • the first identifier is output at the current scan point. For example, if the amplitude of the current scan point on the surface of the semiconductor structure to be tested is greater than or equal to the first amplitude threshold and less than or equal to the second amplitude threshold, "1" is output at the current scan point. If the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is greater than the second amplitude threshold, the second identification is output at the current scanning point. For example, if the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is greater than the second amplitude threshold, "0" is output at the current scanning point.
  • the probe since the top surface of the semiconductor reference sample is relatively flat, when the probe is controlled to scan the top surface of the semiconductor reference sample at a first distance in a direction parallel to the top surface of the semiconductor reference sample, the probe is affected by the top surface of the semiconductor reference sample.
  • the magnitude of the force can basically be kept within a small range, that is, the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample can be within a small range.
  • the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is greater than the first amplitude threshold and smaller than the second amplitude threshold, it means that the distance between the current scanning point and the probe is within a normal range;
  • the amplitude of the current scan point on the surface is greater than or equal to the second amplitude threshold, it means that the distance between the current scan point and the probe is significantly increased, so it can be inferred that the current scan point is located in the groove on the surface of the semiconductor structure to be tested above.
  • a preset reminder information is output, and the reminder information is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested .
  • the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is less than or equal to the first amplitude threshold, it means that the distance between the current scanning point and the probe is significantly reduced, so it can be inferred that the current scanning point may be There are abnormalities, such as particles, process residues, protrusions, etc. may exist at the current scan point.
  • a reminder message can be output at this time to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested, which is convenient for the tester to carry out special analysis.
  • FIG. 6 is a third schematic flowchart of a method for measuring the dimensions of a semiconductor structure provided in the embodiments of the present application.
  • the measurement method of the above-mentioned semiconductor structure size includes:
  • S602. Control the probe to scan the surface of the semiconductor structure to be tested along a direction parallel to the top surface of the semiconductor structure to be tested at a distance Z1, and detect the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested.
  • FIG. 7 is a schematic diagram of the distribution area of the first mark and the second mark output when scanning the top surface of the semiconductor structure to be tested in the embodiment of the present application.
  • FIG. 8 is a schematic diagram of a program module of a critical dimension measuring device provided in an embodiment of the present application.
  • the critical dimension measuring device 80 includes:
  • the control module 801 is configured to control the probe of the atomic force microscope to move from a preset reference position to the top surface of the semiconductor structure to be tested by a first distance along a direction perpendicular to the top surface of the semiconductor structure to be tested.
  • the detection module 802 is used to control the probe to scan the surface of the semiconductor structure to be tested while maintaining a first distance in a direction parallel to the top surface of the semiconductor structure to be tested, and to detect the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested.
  • the processing module 803 is configured to determine the critical dimension of the semiconductor structure to be tested according to the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested.
  • the distance between the probe of the atomic force microscope and the top surface of the semiconductor structure to be tested is not affected by the surface structure of the semiconductor structure to be tested, so when the surface of the semiconductor structure to be tested has a width It is very small and has a large aspect ratio, that is, when there is a trench with a high aspect ratio, the above-mentioned probe will not descend into the trench for scanning, so that it will not touch the sidewall of the trench during the measurement process, avoiding
  • the present application determines the key dimensions of the semiconductor structure to be tested by detecting the amplitude of each scanning point of the probe on the surface of the semiconductor structure to be tested, and does not need to detect the semiconductor structure to be tested and the above-mentioned probe.
  • the interaction force between them is simple to measure, not affected by the surface structure of the semiconductor structure to be tested, and has a wider range of applications.
  • control module 801 is further configured to control the probe to move from the preset reference position to the top surface of the semiconductor reference sample by a first distance along a direction perpendicular to the top surface of the semiconductor reference sample.
  • the detection module 802 is further configured to control the probe to scan the top surface of the semiconductor reference sample at a first distance along a direction parallel to the top surface of the semiconductor reference sample, and detect the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • the processing module 803 is further configured to determine the first amplitude threshold and the second amplitude threshold according to the amplitude of each scanning point of the probe on the top surface of the semiconductor reference sample.
  • processing module 803 is specifically configured to:
  • the first amplitude threshold A 1 is calculated based on:
  • the second amplitude threshold A 2 is calculated based on:
  • processing module 803 is specifically configured to:
  • the amplitude of the current scan point on the surface of the semiconductor structure to be tested is greater than or equal to the first amplitude threshold and less than or equal to the second amplitude threshold, output the first identification at the current scan point;
  • the critical dimension of the semiconductor structure to be tested is determined.
  • processing module 803 is specifically configured to:
  • the boundary between the first region and the second region is determined, and the critical dimension of the semiconductor structure to be tested is determined according to the boundary between the first region and the second region.
  • the above-mentioned critical dimension measuring device 80 further includes:
  • the reminder module is used for outputting preset reminder information if the amplitude of the current scanning point on the surface of the semiconductor structure to be tested is smaller than the first amplitude threshold.
  • the reminder information is used to remind the tester that the surface of the semiconductor structure to be tested is abnormal.
  • control module 801 is further configured to:
  • the first amplitude of the probe at the preset reference position and the drive frequency being the target drive frequency value according to the curve relationship between the probe's amplitude and the drive frequency when no force is applied and when the force is applied, and
  • the probe is moved a first distance in a direction perpendicular to the top surface of the semiconductor reference sample, and the drive frequency is a second amplitude at a target drive frequency value.
  • Control the probe to move several times from the preset reference position along the direction perpendicular to the top surface of the semiconductor reference sample, and record the moving distance of the probe for each movement and the amplitude of the probe after each movement, until the amplitude of the probe is the second amplitude.
  • the processing module 803 is also used to:
  • the first distance is determined according to the recorded moving distance of each probe movement.
  • processing module 803 is specifically configured to:
  • the first distance Z 1 is calculated based on:
  • processing module 803 is further configured to:
  • the second distance Z 2 is calculated based on:
  • the preset reminder information is output, and the reminder information is used to remind the tester that there is an abnormality on the surface of the semiconductor structure to be tested.
  • control module 801 the detection module 802 , and the processing module 803 in this embodiment of the present application, reference may be made to the relevant content in the embodiments shown in FIG. 1 to FIG. 7 , which will not be repeated here.
  • an atomic force microscope is also provided in the embodiments of the present application, and the atomic force microscope includes at least one processor and a memory; wherein, the memory stores computer execution instructions; the above-mentioned at least one processor The computer execution instructions stored in the memory are executed to implement each step in the method for measuring the size of the semiconductor structure as described in the foregoing embodiment, which is not repeated in this embodiment.
  • FIG. 9 is a schematic diagram of the hardware structure of an atomic force microscope provided by the embodiments of the present application.
  • the atomic force microscope 90 of this embodiment includes: a processor 901 and a memory 902; wherein:
  • a memory 902 for storing computer-executed instructions
  • the processor 901 is configured to execute the computer-executed instructions stored in the memory, so as to implement the various steps in the method for measuring the size of the semiconductor structure described in the foregoing embodiments. For details, please refer to the relevant descriptions in the foregoing method embodiments. No longer.
  • the memory 902 may be independent or integrated with the processor 901 .
  • the device further includes a bus 903 for connecting the memory 902 and the processor 901 .
  • a computer-readable storage medium stores computer-executable instructions.
  • the processor executes the computer-executable instructions , so as to realize the various steps in the method for measuring the size of the semiconductor structure described in the foregoing embodiments, for details, reference may be made to the relevant descriptions in the foregoing method embodiments, which will not be repeated here in this embodiment.
  • the embodiments of the present application also provide a computer program product, including a computer program, when the computer program is executed by a processor, the semiconductor structure dimensions described in the foregoing embodiments are realized.
  • a computer program product including a computer program, when the computer program is executed by a processor, the semiconductor structure dimensions described in the foregoing embodiments are realized.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are only illustrative.
  • the division of modules is only a logical function division. In actual implementation, there may be other division methods.
  • multiple modules may be combined or integrated into another A system, or some feature, can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or modules, and may be in electrical, mechanical or other forms.
  • Modules described as separate components may or may not be physically separated, and components shown as modules may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional module in each embodiment of the present application may be integrated in one processing unit, or each module may exist physically alone, or two or more modules may be integrated in one unit.
  • the units formed by the above modules can be implemented in the form of hardware, or can be implemented in the form of hardware plus software functional units.
  • the above-mentioned integrated modules implemented in the form of software functional modules may be stored in a computer-readable storage medium.
  • the above-mentioned software function modules are stored in a storage medium, and include several instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute the methods of the various embodiments of the present application. some steps.
  • processor may be a central processing unit (English: Central Processing Unit, referred to as: CPU), or other general-purpose processors, digital signal processors (English: Digital Signal Processor, referred to as: DSP), application-specific integrated circuits (English: Application Specific Integrated Circuit, referred to as: ASIC) and so on.
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in conjunction with the application can be directly embodied as executed by a hardware processor, or executed by a combination of hardware and software modules in the processor.
  • the memory may include high-speed RAM memory, and may also include non-volatile storage NVM, such as at least one magnetic disk memory, and may also be a U disk, a removable hard disk, a read-only memory, a magnetic disk or an optical disk, and the like.
  • NVM non-volatile storage
  • the bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, or the like.
  • ISA Industry Standard Architecture
  • PCI Peripheral Component
  • EISA Extended Industry Standard Architecture
  • the bus can be divided into address bus, data bus, control bus and so on.
  • the buses in the drawings of the present application are not limited to only one bus or one type of bus.
  • the above-mentioned storage medium may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable Except programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.
  • SRAM static random access memory
  • EEPROM electrically erasable programmable read only memory
  • EPROM erasable except programmable read only memory
  • PROM programmable read only memory
  • ROM read only memory
  • magnetic memory flash memory
  • flash memory magnetic disk or optical disk.
  • a storage medium can be any available medium that can be accessed by a general purpose or special purpose computer.
  • An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium may be located in application specific integrated circuits (Application Specific Integrated Circuits, ASIC for short).
  • ASIC Application Specific Integrated Circuits
  • the processor and the storage medium may also exist in the electronic device or the host device as discrete components.

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Abstract

一种半导体结构尺寸的测量方法及设备，在测量过程中，先控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝待测半导体结构顶表面移动第一距离（S101），然后控制探针沿平行于待测半导体结构顶表面的方向保持上述第一距离对待测半导体结构表面进行扫描，并检测探针在待测半导体结构表面上的各个扫描点的振幅（S102）；根据探针在待测半导体结构表面上的各个扫描点的振幅，确定待测半导体结构的关键尺寸（S103）。

Description

半导体结构尺寸的测量方法及设备
本申请要求于2021年01月15日提交中国专利局、申请号为202110053191.8、申请名称为“半导体结构尺寸的测量方法及设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及半导体技术领域，尤其涉及一种半导体结构尺寸的测量方法及设备。
背景技术
随着半导体芯片的集成度越来越高，集成电路刻线的图形线宽尺寸已进入纳米级别，加工形成的关键尺寸(Critical Dimension，简称CD)对半导体芯片性能的影响越来越大，因此，精确测量半导体芯片的CD已成为提升半导体芯片性能和质量的关键。
由于原子力显微镜(Atomic Force Microscope，简称AFM)测量精度高，而且在采用非接触测量模式时可以在不破坏半导体结构条件下实现对半导体结构的测量，因此广泛应用于纳米级半导体结构的测量。
目前，AFM采用非接触模式测量半导体结构表面时，通常是控制AFM的探针在距离半导体结构表面上方5～10nm的距离处振荡，此时，通过检测半导体结构与上述探针之间的相互作用力即可分析出半导体结构的表面结构。然而，当半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，AFM的探针需要到达沟槽的表面一定距离，在测量过程中很容易接触到该沟槽的侧壁，对半导体结构造成破坏。
发明内容
本申请实施例提供一种半导体结构尺寸的测量方法及设备，可以解决现有技术中当半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，AFM的探针需要到达沟槽的表面一定距离，在测量过程中很容易对半导体结构造成破坏的技术问题。
第一方面，本申请实施例提供了一种半导体结构尺寸的测量方法，该方法包括：
控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离；
控制所述探针沿平行于所述待测半导体结构顶表面的方向保持所述第一距离对所述待测半导体结构表面进行扫描，并检测所述探针在所述待测半导体结构表面上的各 个扫描点的振幅；
根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，所述控制原子力显微镜的探针从预设基准位置沿垂直于所述待测半导体结构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离之前，还包括：
控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离；
控制所述探针沿平行于所述半导体基准样品顶表面的方向保持所述第一距离对所述半导体基准样品顶表面进行扫描，并检测所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅；
根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
在一种可行的实施方式中，所述根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值，包括：
基于以下方式计算所述第一振幅阈值A 1：
Figure PCTCN2021098842-appb-000001
基于以下方式计算所述第二振幅阈值A 2：
Figure PCTCN2021098842-appb-000002
其中，
Figure PCTCN2021098842-appb-000003
表示所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示所述探针在所述半导体基准样品顶表面上的第j个扫描点的振幅，m表示所述探针在所述半导体基准样品顶表面上的扫描点的个数。
在一种可行的实施方式中，所述根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸，包括：
若所述待测半导体结构表面上当前扫描点的振幅大于或等于所述第一振幅阈值且小于或等于所述第二振幅阈值，则在当前扫描点输出第一标识；
若所述待测半导体结构表面上当前扫描点的振幅大于所述第二振幅阈值，则在当前扫描点输出第二标识；
根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，所述根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸，包括：
确定扫描所述待测半导体结构表面时输出的所述第一标识分布的第一区域与输出的所述第二标识分布的第二区域；
确定所述第一区域与所述第二区域之间的边界，并根据所述第一区域与所述第二区域之间的边界确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，所述方法还包括：
若所述待测半导体结构表面上当前扫描点的振幅小于所述第一振幅阈值，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
在一种可行的实施方式中，所述控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离之前，所述方法还包括：
根据在无作用力时和有作用力时，所述探针的振幅与驱动频率之间的曲线关系，确定所述探针在所述预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及所述探针沿垂直于半导体基准样品顶表面的方向移动所述第一距离，且驱动频率为所述目标驱动频率值时的第二振幅；
调节所述探针至所述预设基准位置，并将所述探针的驱动频率调节至所述目标驱动频率值；
控制所述探针从所述预设基准位置沿垂直于所述半导体基准样品顶表面的方向移动多次，并记录所述探针每次移动的移动距离以及每次移动后所述探针的振幅，直到所述探针的振幅为所述第二振幅；
根据已记录的所述探针每次移动的移动距离，确定所述第一距离。
在一种可行的实施方式中，所述根据已记录的所述探针每次移动的移动距离，确定所述第一距离，包括：
基于以下方式计算所述第一距离Z 1：
Figure PCTCN2021098842-appb-000004
其中，
Figure PCTCN2021098842-appb-000005
表示所述探针各次移动的移动距离的平均值，Z i表示所述探针第i次移动的移动距离，n表示所述探针移动的次数。
在一种可行的实施方式中，还包括：
基于以下方式计算第二距离Z 2：
Figure PCTCN2021098842-appb-000006
若移动距离Z i小于所述第一距离Z 1或大于所述第二距离Z 2，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
第二方面，本申请实施例提供了一种半导体结构尺寸的测量装置，该装置包括：
控制模块，用于控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结 构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离；
检测模块，用于控制所述探针沿平行于所述待测半导体结构顶表面的方向保持所述第一距离对所述待测半导体结构表面进行扫描，并检测所述探针在所述待测半导体结构表面上的各个扫描点的振幅；
处理模块，用于根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，所述控制模块，还用于控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离；
所述检测模块，还用于控制所述探针沿平行于所述半导体基准样品顶表面的方向保持所述第一距离对所述半导体基准样品顶表面进行扫描，并检测所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅；
所述处理模块，还用于根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
在一种可行的实施方式中，所述处理模块用于：
基于以下方式计算所述第一振幅阈值A 1：
Figure PCTCN2021098842-appb-000007
基于以下方式计算所述第二振幅阈值A 2：
Figure PCTCN2021098842-appb-000008
其中，
Figure PCTCN2021098842-appb-000009
表示所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示所述探针在所述半导体基准样品顶表面上的第j个扫描点的振幅，m表示所述探针在所述半导体基准样品顶表面上的扫描点的个数。
在一种可行的实施方式中，所述处理模块用于：
若所述待测半导体结构表面上当前扫描点的振幅大于或等于所述第一振幅阈值且小于或等于所述第二振幅阈值，则在当前扫描点输出第一标识；
若所述待测半导体结构表面上当前扫描点的振幅大于所述第二振幅阈值，则在当前扫描点输出第二标识；
根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，所述处理模块用于：
确定扫描所述待测半导体结构表面时输出的所述第一标识分布的第一区域与输出的所述第二标识分布的第二区域；
确定所述第一区域与所述第二区域之间的边界，并根据所述第一区域与所述第二区域之间的边界确定所述待测半导体结构的关键尺寸。
在一种可行的实施方式中，还包括：
提醒模块，用于若所述待测半导体结构表面上当前扫描点的振幅小于所述第一振幅阈值，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
在一种可行的实施方式中，所述控制模块还用于：
根据在无作用力时和有作用力时，所述探针的振幅与驱动频率之间的曲线关系，确定所述探针在所述预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及所述探针沿垂直于半导体基准样品顶表面的方向移动所述第一距离，且驱动频率为所述目标驱动频率值时的第二振幅；
调节所述探针至所述预设基准位置，并将所述探针的驱动频率调节至所述目标驱动频率值；
控制所述探针从所述预设基准位置沿垂直于所述半导体基准样品顶表面的方向移动多次，并记录所述探针每次移动的移动距离以及每次移动后所述探针的振幅，直到所述探针的振幅为所述第二振幅；
所述处理模块还用于：
根据已记录的所述探针每次移动的移动距离，确定所述第一距离。
在一种可行的实施方式中，所述处理模块用于：
基于以下方式计算所述第一距离Z 1：
Figure PCTCN2021098842-appb-000010
其中，
Figure PCTCN2021098842-appb-000011
表示所述探针各次移动的移动距离的平均值，Z i表示所述探针第i次移动的移动距离，n表示所述探针移动的次数。
在一种可行的实施方式中，所述处理模块还用于：
基于以下方式计算第二距离Z 2：
Figure PCTCN2021098842-appb-000012
若移动距离Z i小于所述第一距离Z 1或大于所述第二距离Z 2，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
第三方面，本申请实施例提供了一种原子力显微镜，包括：至少一个处理器和存储器；
所述存储器存储计算机执行指令；
所述至少一个处理器执行所述存储器存储的计算机执行指令，使得所述至少一个处理器执行如第一方面提供的半导体结构尺寸的测量方法。
第四方面，本申请实施例提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机执行指令，当执行所述计算机执行指令时，实现如第一方面提供的半导体结构尺寸的测量方法。
第五方面，本申请实施例提供了一种计算机程序产品，包括计算机程序，所述计算机程序被处理器执行时，实现如第一方面提供的半导体结构尺寸的测量方法。
本申请实施例所提供的半导体结构尺寸的测量方法及设备，在测量过程中，先控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝待测半导体结构顶表面移动第一距离，然后控制探针沿平行于待测半导体结构顶表面的方向保持上述第一距离对待测半导体结构表面进行扫描，并检测探针在待测半导体结构表面上的各个扫描点的振幅；根据探针在待测半导体结构表面上的各个扫描点的振幅，确定待测半导体结构的关键尺寸。即本申请中，原子力显微镜的探针与待测半导体结构顶表面的间隔距离不受待测半导体结构表面构造的影响，因此当待测半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，上述探针并不会下降到沟槽内进行扫描，从而不会在测量过程中接触到该沟槽的侧壁，避免对待测半导体结构造成破坏；同时，本申请通过检测探针在待测半导体结构表面上的各个扫描点的振幅，来确定待测半导体结构的关键尺寸，不需要检测待测半导体结构与上述探针之间的相互作用力，测量方式简单，不受待测半导体结构表面构造的影响，使用范围更加广泛。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对本申请实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其它的附图。
图1为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图一；
图2为本申请实施例中提供的一种半导体结构尺寸的测量场景示意图一；
图3为本申请实施例中提供的一种半导体结构尺寸的测量场景示意图二；
图4为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图二；
图5为本申请实施例中提供的在无作用力时和有作用力时，AFM的探针的振幅与驱动频率之间的曲线关系示意图；
图6为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图三；
图7为本申请实施例中扫描待测半导体结构顶表面时输出的第一标识与第二标识的分布区域示意图；
图8为本申请实施例中提供的一种关键尺寸的测量装置的程序模块示意图；
图9为本申请实施例中提供的一种原子力显微镜的硬件结构示意图。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本申请的实施例例如能够以除了在这里图示或描述的那些以外的顺序实施。
此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
目前，原子力显微镜(Atomic Force Microscope，简称AFM)由于测量精度高，而且在采用非接触测量模式时可以在不破坏半导体结构条件下实现对半导体结构的测量，已广泛应用于纳米级半导体结构，如动态随机存取存储器(Dynamic Random Access Memory，DRAM)工艺尺寸的测量。
其中，AFM通过检测待测半导体结构表面和一个微型力敏感元件之间的极微弱的原子间相互作用力来研究半导体结构的表面结构及性质。在测量过程中，将一对微型力极端敏感的微悬臂一端固定，另一端的微小探针接近半导体结构表面，这时微小探针将与半导体结构表面相互作用，作用力将使得微悬臂发生形变或运动状态发生变化。在探针扫描半导体结构表面时，利用传感器检测探针的这些变化，就可获得作用力分布信息，从而以纳米级分辨率获得半导体结构表面形貌结构信息及表面粗糙度信息。
在现有的测量过程中，AFM采用非接触模式测量半导体结构表面时，通常是控制AFM的探针在距离半导体结构表面上方5～10nm的距离处振荡，此时，通过检测半导体结构与上述探针之间的相互作用力即可分析出半导体结构的表面结构。然而，当半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，AFM的探针需要到达沟槽的表面一定距离，在测量过程中很容易接触到该沟槽的侧壁，对半导体结构造成破坏。另外，对于存在高深宽比沟槽的光阻而言，利用AFM传统的非接触测量模式，也难以对其高深宽比沟槽的关键尺寸进行测量。
为了解决上述技术问题，本申请实施例提供了一种半导体结构尺寸的测量方法，AFM的探针与待测半导体结构顶表面的间隔距离可以不受待测半导体结构表面构造的影响，当待测半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的 沟槽时，AFM的探针并不会下降到沟槽内进行扫描，从而不会在测量过程中接触到该沟槽的侧壁，避免对待测半导体结构造成破坏；同时，通过检测探针在待测半导体结构表面上的各个扫描点的振幅，来确定待测半导体结构的关键尺寸，不需要检测待测半导体结构与上述探针之间的相互作用力，测量方式简单，不受待测半导体结构表面构造的影响，且能够用于测量光阻的关键尺寸，使用范围更加广泛。
下面以具体的实施例对本申请的技术方案进行详细说明。可以理解的是，下面这几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
参照图1，图1为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图一，本实施例的执行主体为原子力显微镜，或者为与原子力显微镜连接的外部设备，或者还可以是由原子力显微镜和与原子力显微镜连接的外部设备一起执行，如图1所示，该半导体结构尺寸的测量方法包括：
S101、控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝待测半导体结构顶表面移动第一距离。
为了更好的理解本申请实施例，参照图2，图2为本申请实施例中提供的一种半导体结构尺寸的测量场景示意图一。
在图2中，可以先控制AFM的探针200从预设的基准位置沿垂直于待测半导体结构100的顶表面101的方向，朝待测半导体结构100的顶表面101移动第一距离Z 1。
其中，上述基准位置与半导体结构100的顶表面101之间的垂直距离大于第一距离Z 1。
S102、控制探针沿平行于待测半导体结构顶表面的方向保持第一距离对待测半导体结构表面进行扫描，并检测探针在待测半导体结构表面上的各个扫描点的振幅。
为了更好的理解本申请实施例，参照图3，图3为本申请实施例中提供的一种半导体结构尺寸的测量场景示意图二。
在图3中，控制探针200沿平行于待测半导体结构100的顶表面101的方向保持第一距离Z 1对待测半导体结构100的表面101进行扫描，例如从扫描点A1开始，依次经过扫描点A2、扫描点A3、扫描点A4、扫描点A5等进行扫描。
其中，探针200在扫描过程中相对于基准位置的距离保持第一距离Z 1不变。即当待测半导体结构100的顶表面101存在沟槽时，上述探针并不会下降到沟槽内进行扫描，而是保持与基准位置之间的第一距离Z 1进行扫描。
其中，探针200在扫描过程中，探针200的驱动频率保持不变。即探针200在无作用力或者受到的作用力保持不变时，其振幅也一直保持不变。
本申请实施例中，当探针200在待测半导体结构100的表面101上扫描时，实时的检测探针200在各个扫描点的振幅。
S103、根据探针在待测半导体结构表面上的各个扫描点的振幅，确定待测半导体 结构的关键尺寸。
可以理解的是，根据兰纳-琼斯势(Lennard-Jones potential)原理，AFM的探针与待测半导体结构顶表面之间的距离越小，探针受到的半导体结构表面的相互作用力就会越大。而在探针的驱动频率保持不变的情况下，探针受到的相互作用力越大，其振幅就会越小。
基于上述原理，本申请实施例中，根据探针在待测半导体结构表面上的各个扫描点的振幅的变化情况，即可确定出AFM的探针与待测半导体结构表面之间的距离的变化情况，从而确定出待测半导体结构的关键尺寸。
在一种可行的实施方式中，上述待测半导体结构为光阻。
需要说明的是，现有的关键尺寸扫描电子显微镜(Critical Dimension-Scanning Electron Microscope，简称CD-SEM)虽然也能够用于测量具有高深宽比沟槽的半导体结构，但是，CD-SEM主要是基于电子束轰击半导体表面的方式来进行测量，由于光阻的表面强度较低，所以现有的CD-SEM无法准确的测量光阻关键尺寸。本申请实施例所提供的测量方法，通过改进AFM的测量方式，使得AFM能够应用于具有高深宽比沟槽的光阻的关键尺寸测量，使用范围更加广泛。
本申请实施例所提供的半导体结构尺寸的测量方法，原子力显微镜的探针与待测半导体结构表面的间隔距离不受待测半导体结构表面构造的影响，因此当待测半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，上述探针并不会下降到沟槽内进行扫描，从而不会在测量过程中接触到该沟槽的侧壁，避免对待测半导体结构造成破坏；同时，本申请通过检测探针在待测半导体结构表面上的各个扫描点的振幅，来确定待测半导体结构的关键尺寸，不需要检测待测半导体结构与上述探针之间的相互作用力，测量方式简单，不受待测半导体结构表面构造的影响，使用范围更加广泛。
基于上述实施例中所描述的内容，在本申请一种可行的实施方式中，参照图4，图4为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图二。上述半导体结构尺寸的测量方法还包括：
S401、控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向，朝半导体基准样品顶表面移动第一距离。
本申请实施例中，可以预先设置一个基准位置，当半导体基准样品固定于AFM的测量台，且AFM的探针处于该基准位置时，AFM的探针能够不受半导体基准样品顶表面的作用力。
其中，上述半导体基准样品可以理解为与待测半导体结构的表面结构相同的半导体结构。
在一种可行的实施方式中，在测量之前，可以采用以下步骤先确定上述第一距离：
步骤a、根据在无作用力时和有作用力时，探针的振幅与驱动频率之间的曲线关 系，确定探针在预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及探针沿垂直于半导体基准样品顶表面的方向移动第一距离，且驱动频率为目标驱动频率值时的第二振幅。
为了更好的理解本申请实施例，参照图5，图5为本申请实施例中提供的在无作用力时和有作用力时，AFM的探针的振幅与驱动频率之间的曲线关系示意图。
从图5中可以看出，在无作用力时和有作用力时，AFM的探针的振幅均会随着驱动频率的变化而变化。本申请实施例中，可以根据在无作用力时和有作用力时，AFM的探针的振幅与驱动频率之间的曲线关系图，确定AFM的探针在无作用力时和有作用力时的振幅之差ΔA的最大值，即确定图5中所示的“最大坡度位置”。
在确定图5中所示的“最大坡度位置”之后，将“最大坡度位置”对应的驱动频率确定为目标驱动频率值，以及将驱动频率为目标驱动频率值时，AFM的探针在无作用力时的振幅确定为上述第一振幅、AFM的探针在有作用力时的振幅确定为上述第二振幅。
步骤b、调节探针至预设基准位置，并将探针的驱动频率调节至目标驱动频率值。
步骤c、控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向移动多次，并记录探针每次移动的移动距离以及每次移动后探针的振幅，直到探针的振幅为第二振幅；其中，每次移动后探针的振幅均大于或等于上述第二振幅。
在一种可行的实施方式中，可以先控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向移动距离Z i，并记录移动后探针的振幅，然后再控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向移动距离Z i，并记录移动后探针的振幅，以此往复，直到探针的振幅为第二振幅。
其中，距离Z i＝第一距离/n。
本申请实施例中，为了保障测量的准确性，可以预先设置n的大小，例如设置n≥30。
在另一种可行的实施方式中，可以先控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向随机移动一段距离，并记录移动后探针的振幅，然后再控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向随机移动一段距离，并记录移动后探针的振幅，以此往复，直到探针的振幅为第二振幅。
步骤d、根据已记录的探针每次移动的移动距离，确定第一距离。
在一种可行的实施方式中，可以基于以下方式计算第一距离Z 1：
Figure PCTCN2021098842-appb-000013
其中，
Figure PCTCN2021098842-appb-000014
表示探针各次移动的移动距离的平均值，Z i表示探针第i次移动的移动距离，n表示探针移动的次数。
在一种可行的实施方式中，还包括：
基于以下方式计算第二距离Z 2：
Figure PCTCN2021098842-appb-000015
若移动距离Z i小于第一距离Z 1或大于第二距离Z 2，则输出预设的提醒信息，提醒信息用于提醒测试人员待测半导体结构表面存在异常。
S402、控制探针沿平行于半导体基准样品顶表面的方向保持第一距离对半导体基准样品顶表面进行扫描，并检测探针在半导体基准样品顶表面上的各个扫描点的振幅。
S403、根据探针在半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
在一种可行的实施方式中，可以基于以下方式计算第一振幅阈值A 1：
Figure PCTCN2021098842-appb-000016
基于以下方式计算第二振幅阈值A 2：
Figure PCTCN2021098842-appb-000017
其中，
Figure PCTCN2021098842-appb-000018
表示探针在半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示探针在半导体基准样品顶表面上的第j个扫描点的振幅，m表示探针在半导体基准样品顶表面上的扫描点的个数。
基于上述实施例中所描述的内容，上述步骤S103中描述的根据探针在待测半导体结构表面上的各个扫描点的振幅，确定待测半导体结构的关键尺寸，具体包括：
若待测半导体结构表面上当前扫描点的振幅大于或等于第一振幅阈值且小于或等于第二振幅阈值，则在当前扫描点输出第一标识。例如若待测半导体结构表面上当前扫描点的振幅大于或等于第一振幅阈值且小于或等于第二振幅阈值，则在当前扫描点输出“1”。若待测半导体结构表面上当前扫描点的振幅大于第二振幅阈值，则在当前扫描点输出第二标识。例如，若待测半导体结构表面上当前扫描点的振幅大于第二振幅阈值，则在当前扫描点输出“0”。
可以理解的是，由于半导体基准样品顶表面相对平整，控制探针沿平行于半导体基准样品顶表面的方向保持第一距离对半导体基准样品顶表面进行扫描时，探针受半导体基准样品顶表面的作用力大小基本能够保持在一个较小的范围之内，即探针在半导体基准样品顶表面上的各个扫描点的振幅能够处于一个较小的范围之内。因此，当待测半导体结构表面上当前扫描点的振幅大于第一振幅阈值且小于第二振幅阈值时，说明当前扫描点与探针之间的距离处于正常的范围内；而当待测半导体结构表面上当前扫描点的振幅大于或等于第二振幅阈值时，则说明当前扫描点与探针之间的距离明显增大了，从而可以推测出当前扫描点位于待测半导体结构表面上的沟槽上方。
在一种可行的实施方式中，若待测半导体结构表面上当前扫描点的振幅小于第一 振幅阈值，则输出预设的提醒信息，该提醒信息用于提醒测试人员待测半导体结构表面存在异常。
可以理解的是，当待测半导体结构表面上当前扫描点的振幅小于或等于第一振幅阈值时，说明当前扫描点与探针之间的距离明显减小了，从而可以推测出当前扫描点可能存在异常，例如当前扫描点可能存在粒子、工艺残留、凸起等。为了避免探针接触到半导体结构表面，此时可以输出提醒信息的方式，提醒测试人员待测半导体结构表面存在异常，方便测试人员进行专项分析。
基于上述实施例中描述的内容，为了更好的理解本申请实施例，参照图6，图6为本申请实施例中提供的一种半导体结构尺寸的测量方法的流程示意图三。
在图6中，上述半导体结构尺寸的测量方法包括：
S601、控制探针从预设基准位置朝待测半导体结构顶表面移动距离Z 1。
S602、控制探针沿平行于待测半导体结构顶表面的方向保持距离Z 1对待测半导体结构表面进行扫描，并检测探针在待测半导体结构表面上的各个扫描点的振幅。
S603、确定第j个扫描点的振幅A j是否处于预设振幅区间，振幅区间A＝[A 1，A 2]；若A j∈A，则输出“1”；若A j>A 2，则输出“0”；若A j＜A 1，则输出提醒信息。
S604、根据输出的标识，确定待测半导体结构的关键尺寸。
在一种可行的实施方式中，可以先确定扫描待测半导体结构表面时输出的第一标识“1”分布的第一区域与输出的第二标识“0”分布的第二区域；然后确定第一区域与第二区域之间的边界，并根据第一区域与第二区域之间的边界确定待测半导体结构的关键尺寸。
为了更好的理解本申请实施例，参照图7，图7为本申请实施例中扫描待测半导体结构顶表面时输出的第一标识与第二标识的分布区域示意图。
在图7中，假设扫描待测半导体结构表面时输出的第一标识“1”均分布在格子状区域，而输出的第二标识“0”则均分布在白色区域，则可以通过测量格子状区域与白色区域的边界之间的距离，来得到待测半导体结构的关键尺寸(Critical Dimension，简称CD)。
基于上述实施例中所描述的内容，本申请实施例中还提供一种关键尺寸的测量装置，参照图8，图8为本申请实施例中提供的一种关键尺寸的测量装置的程序模块示意图，该关键尺寸的测量装置80包括：
控制模块801，用于控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝待测半导体结构顶表面移动第一距离。
检测模块802，用于控制探针沿平行于待测半导体结构顶表面的方向保持第一距离对待测半导体结构表面进行扫描，并检测探针在待测半导体结构表面上的各个扫描点的振幅。
处理模块803，用于根据探针在待测半导体结构表面上的各个扫描点的振幅，确定待测半导体结构的关键尺寸。
本申请实施例所提供的半导体结构尺寸的测量装置，原子力显微镜的探针与待测半导体结构顶表面的间隔距离不受待测半导体结构表面构造的影响，因此当待测半导体结构的表面存在宽度很小、且深宽比较大，即存在高深宽比的沟槽时，上述探针并不会下降到沟槽内进行扫描，从而不会在测量过程中接触到该沟槽的侧壁，避免对待测半导体结构造成破坏；同时，本申请通过检测探针在待测半导体结构表面上的各个扫描点的振幅，来确定待测半导体结构的关键尺寸，不需要检测待测半导体结构与上述探针之间的相互作用力，测量方式简单，不受待测半导体结构表面构造的影响，使用范围更加广泛。
在一种可行的实施方式中，控制模块801还用于控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向，朝半导体基准样品顶表面移动第一距离。
检测模块802还用于控制探针沿平行于半导体基准样品顶表面的方向保持第一距离对半导体基准样品顶表面进行扫描，并检测探针在半导体基准样品顶表面上的各个扫描点的振幅。
处理模块803还用于根据探针在半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
在一种可行的实施方式中，处理模块803具体用于：
基于以下方式计算第一振幅阈值A 1：
Figure PCTCN2021098842-appb-000019
基于以下方式计算第二振幅阈值A 2：
Figure PCTCN2021098842-appb-000020
其中，
Figure PCTCN2021098842-appb-000021
表示探针在半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示探针在半导体基准样品顶表面上的第j个扫描点的振幅，m表示探针在半导体基准样品顶表面上的扫描点的个数。
在一种可行的实施方式中，处理模块803具体用于：
若待测半导体结构表面上当前扫描点的振幅大于或等于第一振幅阈值且小于或等于第二振幅阈值，则在当前扫描点输出第一标识；
若待测半导体结构表面上当前扫描点的振幅大于第二振幅阈值，则在当前扫描点输出第二标识；
根据扫描待测半导体结构表面时输出的标识，确定待测半导体结构的关键尺寸。
在一种可行的实施方式中，处理模块803具体用于：
确定扫描待测半导体结构表面时输出的第一标识分布的第一区域与输出的第二标识分布的第二区域；
确定第一区域与第二区域之间的边界，并根据第一区域与第二区域之间的边界确 定待测半导体结构的关键尺寸。
在一种可行的实施方式中，上述关键尺寸的测量装置80还包括：
提醒模块，用于若待测半导体结构表面上当前扫描点的振幅小于第一振幅阈值，则输出预设的提醒信息，该提醒信息用于提醒测试人员待测半导体结构表面存在异常。
在一种可行的实施方式中，控制模块801还用于：
根据在无作用力时和有作用力时，探针的振幅与驱动频率之间的曲线关系，确定所探针在预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及探针沿垂直于半导体基准样品顶表面的方向移动第一距离，且驱动频率为目标驱动频率值时的第二振幅。
调节探针至预设基准位置，并将探针的驱动频率调节至目标驱动频率值。
控制探针从预设基准位置沿垂直于半导体基准样品顶表面的方向移动多次，并记录探针每次移动的移动距离以及每次移动后探针的振幅，直到探针的振幅为第二振幅。
处理模块803还用于：
根据已记录的探针每次移动的移动距离，确定第一距离。
在一种可行的实施方式中，处理模块803具体用于：
基于以下方式计算第一距离Z 1：
Figure PCTCN2021098842-appb-000022
其中，
Figure PCTCN2021098842-appb-000023
表示探针各次移动的移动距离的平均值，Z i表示探针第i次移动的移动距离，n表示探针移动的次数。
在一种可行的实施方式中，处理模块803具体还用于：
基于以下方式计算第二距离Z 2：
Figure PCTCN2021098842-appb-000024
若移动距离Z i小于第一距离Z 1或大于第二距离Z 2，则输出预设的提醒信息，提醒信息用于提醒测试人员待测半导体结构表面存在异常。
需要说明的是，本申请实施例中控制模块801、检测模块802、处理模块803具体执行的内容可以参阅图1至图7所示实施例中相关内容，此处不做赘述。
进一步的，基于上述实施例中所描述的内容，本申请实施例中还提供了一种原子力显微镜，该原子力显微镜包括至少一个处理器和存储器；其中，存储器存储计算机执行指令；上述至少一个处理器执行存储器存储的计算机执行指令，以实现如上述实施例中描述的半导体结构尺寸的测量方法中的各个步骤，本实施例此处不再赘述。
为了更好的理解本申请实施例，参照图9，图9为本申请实施例提供的一种原子力显微镜的硬件结构示意图。
如图9所示，本实施例的原子力显微镜90包括：处理器901以及存储器902；其中：
存储器902，用于存储计算机执行指令；
处理器901，用于执行存储器存储的计算机执行指令，以实现上述实施例中描述的半导体结构尺寸的测量方法中的各个步骤，具体可以参见前述方法实施例中的相关描述，本实施例此处不再赘述。
可选地，存储器902既可以是独立的，也可以跟处理器901集成在一起。
当存储器902独立设置时，该设备还包括总线903，用于连接存储器902和处理器901。
进一步的，基于上述实施例中所描述的内容，本申请实施例中还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机执行指令，当处理器执行计算机执行指令时，以实现上述实施例中描述的半导体结构尺寸的测量方法中的各个步骤，具体可以参见前述方法实施例中的相关描述，本实施例此处不再赘述。
进一步的，基于上述实施例中所描述的内容，本申请实施例中还提供了一种计算机程序产品，包括计算机程序，该计算机程序被处理器执行时，实现上述实施例中描述的半导体结构尺寸的测量方法中的各个步骤，具体可以参见前述方法实施例中的相关描述，本实施例此处不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的设备和方法，可以通过其它的方式实现。例如，以上所描述的设备实施例仅仅是示意性的，例如，模块的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个模块可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或模块的间接耦合或通信连接，可以是电性，机械或其它的形式。
作为分离部件说明的模块可以是或者也可以不是物理上分开的，作为模块显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能模块可以集成在一个处理单元中，也可以是各个模块单独物理存在，也可以两个或两个以上模块集成在一个单元中。上述模块成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
上述以软件功能模块的形式实现的集成的模块，可以存储在一个计算机可读取存储介质中。上述软件功能模块存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(英文：processor)执行本申请各个实施例方法的部分步骤。
应理解，上述处理器可以是中央处理单元(英文：Central Processing Unit，简称：CPU)，还可以是其他通用处理器、数字信号处理器(英文：Digital Signal Processor，简称：DSP)、专用集成电路(英文：Application Specific Integrated Circuit，简称： ASIC)等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合申请所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。
存储器可能包含高速RAM存储器，也可能还包括非易失性存储NVM，例如至少一个磁盘存储器，还可以为U盘、移动硬盘、只读存储器、磁盘或光盘等。
总线可以是工业标准体系结构(Industry Standard Architecture，ISA)总线、外部设备互连(Peripheral Component，PCI)总线或扩展工业标准体系结构(Extended Industry Standard Architecture，EISA)总线等。总线可以分为地址总线、数据总线、控制总线等。为便于表示，本申请附图中的总线并不限定仅有一根总线或一种类型的总线。
上述存储介质可以是由任何类型的易失性或非易失性存储设备或者它们的组合实现，如静态随机存取存储器(SRAM)，电可擦除可编程只读存储器(EEPROM)，可擦除可编程只读存储器(EPROM)，可编程只读存储器(PROM)，只读存储器(ROM)，磁存储器，快闪存储器，磁盘或光盘。存储介质可以是通用或专用计算机能够存取的任何可用介质。
一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于专用集成电路(Application Specific Integrated Circuits，简称：ASIC)中。当然，处理器和存储介质也可以作为分立组件存在于电子设备或主控设备中。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (20)

  1. 一种半导体结构尺寸的测量方法，其特征在于，所述方法包括：
    控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离；
    控制所述探针沿平行于所述待测半导体结构顶表面的方向保持所述第一距离对所述待测半导体结构表面进行扫描，并检测所述探针在所述待测半导体结构表面上的各个扫描点的振幅；
    根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸。
  2. 根据权利要求1所述的方法，其特征在于，所述控制原子力显微镜的探针从预设基准位置沿垂直于所述待测半导体结构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离之前，还包括：
    控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离；
    控制所述探针沿平行于所述半导体基准样品顶表面的方向保持所述第一距离对所述半导体基准样品顶表面进行扫描，并检测所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅；
    根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
  3. 根据权利要求2所述的方法，其特征在于，所述根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值，包括：
    基于以下方式计算所述第一振幅阈值A 1：
    Figure PCTCN2021098842-appb-100001
    基于以下方式计算所述第二振幅阈值A 2：
    Figure PCTCN2021098842-appb-100002
    其中，
    Figure PCTCN2021098842-appb-100003
    表示所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示所述探针在所述半导体基准样品顶表面上的第j个扫描点的振幅，m表示所述探针在所述半导体基准样品顶表面上的扫描点的个数。
  4. 根据权利要求3所述的方法，其特征在于，所述根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸，包括：
    若所述待测半导体结构表面上当前扫描点的振幅大于或等于所述第一振幅阈值且小于或等于所述第二振幅阈值，则在当前扫描点输出第一标识；
    若所述待测半导体结构表面上当前扫描点的振幅大于所述第二振幅阈值，则在当 前扫描点输出第二标识；
    根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸。
  5. 根据权利要求4所述的方法，其特征在于，所述根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸，包括：
    确定扫描所述待测半导体结构表面时输出的所述第一标识分布的第一区域与输出的所述第二标识分布的第二区域；
    确定所述第一区域与所述第二区域之间的边界，并根据所述第一区域与所述第二区域之间的边界确定所述待测半导体结构的关键尺寸。
  6. 根据权利要求4所述的方法，其特征在于，所述方法还包括：
    若所述待测半导体结构表面上当前扫描点的振幅小于所述第一振幅阈值，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
  7. 根据权利要求2所述的方法，其特征在于，所述控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离之前，所述方法还包括：
    根据在无作用力时和有作用力时，所述探针的振幅与驱动频率之间的曲线关系，确定所述探针在所述预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及所述探针沿垂直于半导体基准样品顶表面的方向移动所述第一距离，且驱动频率为所述目标驱动频率值时的第二振幅；
    调节所述探针至所述预设基准位置，并将所述探针的驱动频率调节至所述目标驱动频率值；
    控制所述探针从所述预设基准位置沿垂直于所述半导体基准样品顶表面的方向移动多次，并记录所述探针每次移动的移动距离以及每次移动后所述探针的振幅，直到所述探针的振幅为所述第二振幅；
    根据已记录的所述探针每次移动的移动距离，确定所述第一距离。
  8. 根据权利要求7所述的方法，其特征在于，所述根据已记录的所述探针每次移动的移动距离，确定所述第一距离，包括：
    基于以下方式计算所述第一距离Z 1：
    Figure PCTCN2021098842-appb-100004
    其中，
    Figure PCTCN2021098842-appb-100005
    表示所述探针各次移动的移动距离的平均值，Z i表示所述探针第i次移动的移动距离，n表示所述探针移动的次数。
  9. 根据权利要求8所述的方法，其特征在于，还包括：
    基于以下方式计算第二距离Z 2：
    Figure PCTCN2021098842-appb-100006
    若移动距离Z i小于所述第一距离Z 1或大于所述第二距离Z 2，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
  10. 一种半导体结构尺寸的测量装置，其特征在于，所述装置包括：
    控制模块，用于控制原子力显微镜的探针从预设基准位置沿垂直于待测半导体结构顶表面的方向，朝所述待测半导体结构顶表面移动第一距离；
    检测模块，用于控制所述探针沿平行于所述待测半导体结构顶表面的方向保持所述第一距离对所述待测半导体结构表面进行扫描，并检测所述探针在所述待测半导体结构表面上的各个扫描点的振幅；
    处理模块，用于根据所述探针在所述待测半导体结构表面上的各个扫描点的振幅，确定所述待测半导体结构的关键尺寸。
  11. 根据权利要求10所述的装置，其特征在于，
    所述控制模块，还用于控制所述探针从所述预设基准位置沿垂直于半导体基准样品顶表面的方向，朝所述半导体基准样品顶表面移动所述第一距离；
    所述检测模块，还用于控制所述探针沿平行于所述半导体基准样品顶表面的方向保持所述第一距离对所述半导体基准样品顶表面进行扫描，并检测所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅；
    所述处理模块，还用于根据所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅，确定第一振幅阈值与第二振幅阈值。
  12. 根据权利要求11所述的装置，其特征在于，所述处理模块用于：
    基于以下方式计算所述第一振幅阈值A 1：
    Figure PCTCN2021098842-appb-100007
    基于以下方式计算所述第二振幅阈值A 2：
    Figure PCTCN2021098842-appb-100008
    其中，
    Figure PCTCN2021098842-appb-100009
    表示所述探针在所述半导体基准样品顶表面上的各个扫描点的振幅的平均值，A j表示所述探针在所述半导体基准样品顶表面上的第j个扫描点的振幅，m表示所述探针在所述半导体基准样品顶表面上的扫描点的个数。
  13. 根据权利要求12所述的装置，其特征在于，所述处理模块用于：
    若所述待测半导体结构表面上当前扫描点的振幅大于或等于所述第一振幅阈值且小于或等于所述第二振幅阈值，则在当前扫描点输出第一标识；
    若所述待测半导体结构表面上当前扫描点的振幅大于所述第二振幅阈值，则在当前扫描点输出第二标识；
    根据扫描所述待测半导体结构表面时输出的标识，确定所述待测半导体结构的关键尺寸。
  14. 根据权利要求13所述的装置，其特征在于，所述处理模块用于：
    确定扫描所述待测半导体结构表面时输出的所述第一标识分布的第一区域与输出的所述第二标识分布的第二区域；
    确定所述第一区域与所述第二区域之间的边界，并根据所述第一区域与所述第二区域之间的边界确定所述待测半导体结构的关键尺寸。
  15. 根据权利要求13所述的装置，其特征在于，还包括：
    提醒模块，用于若所述待测半导体结构表面上当前扫描点的振幅小于所述第一振幅阈值，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
  16. 根据权利要求11所述的装置，其特征在于，所述控制模块还用于：
    根据在无作用力时和有作用力时，所述探针的振幅与驱动频率之间的曲线关系，确定所述探针在所述预设基准位置处且驱动频率为目标驱动频率值时的第一振幅，以及所述探针沿垂直于半导体基准样品顶表面的方向移动所述第一距离，且驱动频率为所述目标驱动频率值时的第二振幅；
    调节所述探针至所述预设基准位置，并将所述探针的驱动频率调节至所述目标驱动频率值；
    控制所述探针从所述预设基准位置沿垂直于所述半导体基准样品顶表面的方向移动多次，并记录所述探针每次移动的移动距离以及每次移动后所述探针的振幅，直到所述探针的振幅为所述第二振幅；
    所述处理模块还用于：
    根据已记录的所述探针每次移动的移动距离，确定所述第一距离。
  17. 根据权利要求16所述的装置，其特征在于，所述处理模块用于：
    基于以下方式计算所述第一距离Z 1：
    Figure PCTCN2021098842-appb-100010
    其中，
    Figure PCTCN2021098842-appb-100011
    表示所述探针各次移动的移动距离的平均值，Z i表示所述探针第i次移动的移动距离，n表示所述探针移动的次数。
  18. 根据权利要求17所述的装置，其特征在于，所述处理模块还用于：
    基于以下方式计算第二距离Z 2：
    Figure PCTCN2021098842-appb-100012
    若移动距离Z i小于所述第一距离Z 1或大于所述第二距离Z 2，则输出预设的提醒信息，所述提醒信息用于提醒测试人员所述待测半导体结构表面存在异常。
  19. 一种原子力显微镜，其特征在于，包括：至少一个处理器和存储器；
    所述存储器存储计算机执行指令；
    所述至少一个处理器执行所述存储器存储的计算机执行指令，使得所述至少一个 处理器执行如权利要求1所述的半导体结构尺寸的测量方法。
  20. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机执行指令，当执行所述计算机执行指令时，实现如权利要求1所述的半导体结构尺寸的测量方法。
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