WO2022141519A1 - 一种液晶显示面板及其制作方法、显示装置 - Google Patents

一种液晶显示面板及其制作方法、显示装置 Download PDF

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Publication number
WO2022141519A1
WO2022141519A1 PCT/CN2020/142414 CN2020142414W WO2022141519A1 WO 2022141519 A1 WO2022141519 A1 WO 2022141519A1 CN 2020142414 W CN2020142414 W CN 2020142414W WO 2022141519 A1 WO2022141519 A1 WO 2022141519A1
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WO
WIPO (PCT)
Prior art keywords
layer
metal layer
liquid crystal
substrate
color filter
Prior art date
Application number
PCT/CN2020/142414
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English (en)
French (fr)
Inventor
谢菲菲
刘梦阳
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/276,162 priority Critical patent/US20240085751A1/en
Publication of WO2022141519A1 publication Critical patent/WO2022141519A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G02F1/133516—Methods for their manufacture, e.g. printing, electro-deposition or photolithography
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133388—Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode

Definitions

  • the present invention relates to the field of display technology, in particular to a liquid crystal display panel, a manufacturing method thereof, and a display device.
  • the display device can convert the data of the computer into various characters, numbers, symbols or intuitive images for display, and can use input tools such as keyboards to input commands or data into the computer, and add, delete, and change the display at any time with the help of the hardware and software of the system.
  • Display devices are classified into plasma, liquid crystal, light emitting diode, and cathode ray tube types according to the display device used.
  • LCD short for Liquid Crystal Display
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • CF color filter
  • each sub-pixel has a thin film transistor, its gate (Gate) is connected to the horizontal line, the drain (Drain) is connected to the vertical data line, and the source (Source) is connected to the pixel electrode. .
  • Applying a sufficient voltage on the horizontal line will turn on all thin film transistors on the horizontal line.
  • the pixel electrodes on the horizontal line will be connected to the data lines in the vertical direction, thereby writing the display signal voltage on the data line.
  • the rotation direction of the liquid crystal molecules is controlled by the signal and voltage changes on the thin film transistors, so as to control whether the polarized light of each pixel is emitted or not to achieve the display purpose.
  • the thin film transistor liquid crystal has a semiconductor switch for each pixel, so as to completely control a pixel point independently.
  • the liquid crystal material is sandwiched between the array substrate and the color filter substrate, and the voltage value that stimulates the liquid crystal is controlled by changing the value.
  • the rotation direction of the liquid crystal molecules can control whether the polarized light of each pixel is emitted or not to achieve the display purpose, and to control the final light intensity and color.
  • the current GOA Gate Driver on Array for short
  • IC external line driver integrated circuit chip
  • FIG. 1 is a schematic structural diagram of an existing liquid crystal display panel using in-line sealing.
  • the liquid crystal display panel 90 includes an array substrate 91 and a color filter substrate 92 . There is also a gap between the gaps, the gap is filled with liquid crystal to form a liquid crystal layer 93, and indium tin oxide (ITO) is provided on the side of the array substrate 91 and the color filter substrate 92 facing the liquid crystal layer as the wiring layer 94, so as to realize the protection of the liquid crystal layer 93.
  • ITO indium tin oxide
  • the drive display of the 100°C in which the edges of the array substrate 91 and the color filter substrate 92 are sealed with sealant 95.
  • the array substrate is provided with a wire-changing metal layer 96 at the position corresponding to the sealant 95 and is disposed on the wire-changing metal layer 96 Therefore, the distance between the wiring layer 94 on the side of the array substrate 91 and the wiring layer 94 on the side of the color filter substrate 92 is reduced.
  • the liquid crystal display panel 90 When the liquid crystal display panel 90 is subjected to external static electricity, the The discharge between the wiring layers 94 at the sealant 95 position, the external static electricity causes the melting resistance of the wiring layer 94 to increase, and burns and heats up during the lighting test process, and then the melted indium tin oxide of the wiring layer 94 causes the wiring layer 94 to melt on the side of the array substrate 91 or A short circuit (short) occurs on the side of the color filter substrate 92, resulting in a black screen problem.
  • An object of the present invention is to provide a liquid crystal display panel, a method for manufacturing the same, and a display device, which can solve the problem that the current liquid crystal display panel is induced to discharge between the wiring layers at the sealant position when it is subjected to external static electricity, and the external static electricity As a result, the melting resistance of the trace layer becomes larger, and it burns and generates heat during the lighting test.
  • the trace layer molten indium tin oxide causes a short circuit on the side of the array substrate or the side of the color filter substrate, resulting in a technical problem of black screen.
  • an embodiment of the present invention provides a liquid crystal display panel, which includes: a display area and a non-display area surrounding the display area, the non-display area having a first area; an array substrate; A film substrate, the color filter substrate is disposed opposite to the array substrate, the side of the color filter substrate facing the array substrate has a first wiring layer, and the first wiring layer extends from the display area to the the non-display area, and at a position corresponding to the first area, a gap is formed on the first wiring on the color filter substrate.
  • the liquid crystal display panel further includes a sealant, and the sealant is disposed between the array substrate and the color filter substrate, distributed in the first region, and filled in the gap.
  • the first wiring layer has a common electrode wiring.
  • a side of the array substrate facing the color filter substrate has a second wiring layer, and the second wiring layer extends from the display area to the non-display area.
  • the second wiring layer has signal wirings.
  • the array substrate includes: a first substrate; a first metal layer, disposed on the first substrate; a gate insulating layer, disposed on the first substrate and covering the first metal layer; a passivation layer, disposed on the gate insulating layer; a second metal layer, embedded in one side of the upper surface of the passivation layer and located in the first region; and the second wiring layer, disposed on the passivation layer, the second wiring layer is electrically connected to the first metal layer through the passivation layer and the gate insulating layer and extends to the first region and the The second metal layer is electrically connected.
  • the second metal layer is provided on the upper surface of the gate insulating layer; above the second metal layer, the passivation layer is formed with at least two protrusions, and the second groove is formed between two adjacent bumps.
  • Another embodiment of the present invention also provides a method for fabricating a liquid crystal display panel as described above, comprising the steps of:
  • a color filter substrate is produced, and a first wiring layer is arranged in the color filter substrate; the first wiring layer extends from the display area to the non-display area, and is at a position corresponding to the first area , the first trace is formed with a gap; and
  • the color filter substrate and the array substrate are arranged opposite to each other, and a sealant is arranged in the non-display area to connect the color filter substrate and the array substrate, and the sealant is distributed in the first area and filled in the in the gap.
  • the gap is formed at a position corresponding to the sealant in the first region by using a mask plate.
  • the step of fabricating the array substrate includes:
  • a second metal layer is embedded inside the upper surface of the passivation layer, the second metal layer is located in the first region; the passivation layer is provided with a second metal layer extending to the surface of the first metal layer a groove and a second groove on the surface of the second metal layer; and
  • a second wiring layer is formed on the passivation layer, and the second wiring layer extends to the surfaces of the first groove and the second groove and the first metal layer and the second Metal layer connection.
  • the step of fabricating the array substrate includes:
  • the second metal layer is located in the first region
  • a passivation layer is formed on the gate insulating layer, the passivation layer covers the second metal layer; the passivation layer is provided with a first groove extending to the surface of the first metal layer and the a second groove on the surface of the second metal layer; and
  • a second wiring layer is formed on the passivation layer, and the second wiring layer extends to the surfaces of the first groove and the second groove and the first metal layer and the second Metal layer connection.
  • Another embodiment of the present invention also provides a display device including the liquid crystal display panel of the present invention.
  • the present invention relates to a liquid crystal display panel, a method for manufacturing the same, and a display device.
  • a second wiring layer is not provided in the position of the sealant corresponding to the non-display area, so that the sealant will not be induced in the sealant when subjected to external static electricity. Discharge between the second wiring layers at the position to avoid burns and heat during the lighting test process.
  • the melt of the second wiring layer may cause a short circuit on the side of the array substrate or the side of the color filter substrate, so as to avoid a black screen.
  • increase the distance between the array substrate and the color filter substrate at the sealant position thereby increasing the distance between the second wiring layers, so as to avoid the discharge between the second wiring layers at the sealant position without being induced by external static electricity.
  • Improve product reliability improve product reliability.
  • FIG. 1 is a schematic structural diagram of a conventional liquid crystal display panel using in-line sealing.
  • FIG. 2 is a schematic structural diagram of a liquid crystal display panel according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel according to Embodiment 2 of the present invention.
  • FIG. 4 is a flowchart of a method for fabricating a liquid crystal display panel according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of the step of fabricating the color filter substrate described in FIG. 4 .
  • Liquid crystal display panel 101. Display area,
  • the second wiring layer 5.
  • the first polyimide layer 5.
  • the second metal layer 81. Gap
  • the component can be directly on the other component; an intervening component may also be present and the component is placed on the intervening component , and the intermediate component is placed on another component.
  • an intervening component may also be present and the component is placed on the intervening component
  • the intermediate component is placed on another component.
  • a liquid crystal display panel 100 includes a display area 101 and a non-display area 102 surrounding the display area 101 , and the non-display area 102 has a first area therein.
  • the liquid crystal display panel 100 in the non-display area 102 includes an array substrate 110, a color filter substrate 120, a liquid crystal layer 7 and a sealant 11, wherein the color filter substrate 120 is disposed opposite to the array substrate 110, and the liquid crystal layer 7 is disposed between the array substrate 110 and the color filter substrate 120 , and the sealant 11 is disposed around the liquid crystal layer 7 and in the non-display area 102 .
  • the area where the sealant 11 is distributed also corresponds to the GOA area of the non-display area 102 , and the corresponding area is the first area.
  • the array substrate 110 includes: a first substrate 1 , a gate insulating layer 2 , a passivation layer 3 , and a second wiring layer 4 .
  • the gate insulating layer 2 is disposed on the first substrate 1 , and a first metal layer 21 is disposed in the gate insulating layer 2 .
  • the gate insulating layer 2 (English full name: Gate Insulator, English abbreviation: GI) is an insulating layer between the gate metal and the semiconductor Si, and its composition material may be SiNx or SiOx.
  • the passivation layer 3 is disposed on the gate insulating layer 2, a second metal layer 31 is disposed in the passivation layer 3, and the passivation layer 3 is partially recessed downward until the first metal layer A first groove 111 is formed on the upper surface of 21, and the passivation layer 3 is partially recessed downward until a second groove 121 is formed on the upper surface of the second metal layer 31; the passivation layer 3 mainly plays the role of insulation and protection, Its constituent material can be SiNx or SiOx.
  • the second wiring layer 4 is electrically connected to the first metal layer 21 through the first groove 111 located in the passivation layer 3 and the insulating layer 2, and extends through the The second groove 121 is electrically connected to the second metal layer 31 .
  • the passivation layer 3 is provided with a first groove 111 extending to the surface of the first metal layer 21 and a second groove 121 extending to the surface of the second metal layer 31 .
  • the second wiring layer 4 is disposed on the passivation layer 3 , the first groove 111 and the second groove 121 .
  • the second wiring layer 4 is disposed on the passivation layer 3 and The surfaces extending to the first groove 111 and the second groove 121 are connected to the first metal layer 21 and the second metal layer 31 .
  • the second wiring layer 4 is used to connect the first metal layer 21 and the second metal layer 31 to form a low potential voltage;
  • the film has high light transmittance, and the second wiring layer 4 is used to enable the light emitted by the backlight module to pass through this layer and be utilized, thereby improving the light use efficiency.
  • the second wiring layer 4 has signal wirings for transmitting CK signals.
  • the first polyimide layer 5 is disposed on the second wiring layer 4; the solid content in the first polyimide layer 5 is a small molecular compound in the original solution, which polymerizes at high temperature
  • the reaction forms a long-chain macromolecular solid polymer polyamide with many branches.
  • the angle between the branch chain and the main chain in the polymer molecule is the so-called pretilt angle of the guiding layer.
  • the force between the branched groups of these polymers and the liquid crystal molecules is relatively strong, and has an anchoring effect on the liquid crystal molecules, which can make the liquid crystals align in the direction of the pretilt angle.
  • the color filter substrate 120 includes: a first wiring layer 8 , a black matrix layer 9 and a second substrate 10 .
  • the first wiring layer 8 and the second wiring layer 4 are made of the same material, both of which are indium tin oxide (ITO).
  • the black matrix layer 9 is disposed on a surface of the first wiring layer 8 away from the array substrate 110 ; the second substrate 10 is disposed on the black matrix layer 9 .
  • the first wiring layer 8 is provided with at least one gap 81 at a position corresponding to the sealant 11 , and the gap 81 divides the first wiring layer 8 of the non-display area 102 into at least one gap 81 .
  • the width of the notch 81 is the same as the width of the sealant 11 .
  • the electrode line segment of the first wiring layer 8 facing the display area 101 is a common electrode wiring.
  • the electrode line segments of the first wiring layer 8 away from the display area 101 are set as ground electrodes, thereby making the potential of the entire liquid crystal display panel 100 more stable.
  • the gaps 81 between the electrode line segments of the first wiring layer 8 are filled with the material used for the sealant 11 .
  • the array substrate 110 further includes at least two protrusions 12 disposed above the second metal layer 31 , the passivation layer 3 is formed with at least two protrusions 12 , and the second grooves 121 are located at the top of the second metal layer 31 . Between two adjacent protrusions 12 , the second wiring layer 4 covers the protrusions 12 and is electrically connected to the second metal layer 31 at the second grooves 121 .
  • the second metal layer 31 is embedded on the upper surface of the passivation layer 3 , and the protrusions 12 are partially located on the second metal layer 31 and partially located on the passivation layer 3 .
  • the protrusions 12 realize the insulation between the second metal layer 31 and the second wiring layer 4 .
  • the protrusions 12 are integrally formed with the passivation layer 3 .
  • the first wiring layer 8 is not provided at the position of the non-display area 102 corresponding to the sealant 11 , so that the sealant 11 will not be induced when external static electricity is applied. Discharge between the first wiring layers 8 avoids the occurrence of short-circuits on the array substrate 110 side or the color filter substrate 120 side caused by the melt of the first wiring layer 8 during the lighting test. This avoids a black screen. Moreover, since there are gaps 81 between the electrode line segments of the first wiring layer 8, undulating terrain is formed, thereby removing the unilateral electrodes forming the electrolytic cell, avoiding electrochemical corrosion caused by the formation of the electrolytic cell, and improving the reliability of the product.
  • a liquid crystal display panel 100 includes a display area 101 and a non-display area 102 surrounding the display area 101 , and the non-display area 102 has a first area therein.
  • the liquid crystal display panel 100 in the non-display area 102 includes an array substrate 110, a color filter substrate 120, a liquid crystal layer 7 and a sealant 11, wherein the color filter substrate 120 is disposed opposite to the array substrate 110, and the liquid crystal layer 7 is disposed between the array substrate 110 and the color filter substrate 120 , and the sealant 11 is disposed around the liquid crystal layer 7 and in the non-display area 102 .
  • the area where the sealant 11 is distributed also corresponds to the first area of the non-display area 102 .
  • the array substrate 110 includes: a first substrate 1 , a gate insulating layer 2 , a passivation layer 3 , a second wiring layer 4 , and a first polyimide layer 5 .
  • the gate insulating layer 2 is disposed on the first substrate 1 , and a first metal layer 21 is disposed in the gate insulating layer 2 .
  • the gate insulating layer 2 (English full name: Gate Insulator, English abbreviation: GI) is an insulating layer between the gate metal and the semiconductor Si, and its composition material may be SiNx or SiOx.
  • the passivation layer 3 is disposed on the gate insulating layer 2, a second metal layer 31 is disposed in the passivation layer 3, and the passivation layer 3 is partially recessed downward until the first metal layer A first groove 111 is formed on the upper surface of 21, and the passivation layer 3 is partially recessed downward until a second groove 121 is formed on the upper surface of the second metal layer 31; the passivation layer 3 mainly plays the role of insulation and protection, Its constituent material can be SiNx or SiOx.
  • the passivation layer 3 is provided with a first groove 111 extending to the surface of the first metal layer 21 and a second groove 121 extending to the surface of the second metal layer 31 .
  • the second wiring layer 4 is disposed on the passivation layer 3 , the first groove 111 and the second groove 121 .
  • the second wiring layer 4 is disposed on the passivation layer 3 and The surfaces extending to the first groove 111 and the second groove 121 are connected to the first metal layer 21 and the second metal layer 31 .
  • the second wiring layer 4 is used to connect the first metal layer 21 and the second metal layer 31 to form a low potential voltage;
  • the film has high light transmittance, and the second wiring layer 4 is used to enable the light emitted by the backlight module to pass through this layer and be utilized, thereby improving the light use efficiency.
  • the second wiring layer 4 has signal wirings for transmitting CK signals.
  • the first polyimide layer 5 is disposed on the second wiring layer 4; the solid content in the first polyimide layer 5 is a small molecular compound in the original solution, which polymerizes at high temperature
  • the reaction forms a long-chain macromolecular solid polymer polyamide with many branches.
  • the angle between the branch chain and the main chain in the polymer molecule is the so-called pretilt angle of the guiding layer.
  • the force between the branched groups of these polymers and the liquid crystal molecules is relatively strong, and has an anchoring effect on the liquid crystal molecules, which can make the liquid crystals align in the direction of the pretilt angle.
  • the color filter substrate 120 includes: a second polyimide layer 6 , a first wiring layer 8 , a black matrix layer 9 and a second substrate 10 .
  • the first wiring layer 8 and the second wiring layer 4 are made of the same material, both of which are indium tin oxide (ITO).
  • the second polyimide layer 6 is correspondingly disposed on the first polyimide layer 5 ; the first wiring layer 8 is disposed on the second polyimide layer 6, wherein the first wiring layer 8 includes a plurality of electrode line segments spaced apart from each other; the black matrix layer 9 is disposed on the side surface of the first wiring layer 8 away from the array substrate 110; The second substrate 10 is disposed on the black matrix layer 9 .
  • the electrode line segments of the first wiring layer 8 are arranged at intervals from each other, wherein the gaps 81 between the electrode line segments of the first wiring layer 8 are arranged corresponding to the positions of the first metal layer 21 . ;
  • the gap 81 between the electrode line segments of the first wiring layer 8 is set corresponding to the position of the second metal layer 31 .
  • This setting is mainly because the positions of the first metal layer 21 and the second metal layer 31 are very easy to be corroded compared to other parts, so the corresponding positions of the first metal layer 21 and the second metal layer 31 are removed.
  • the first wiring layer 8 can thus avoid the formation of an electrolytic cell, thereby avoiding electrochemical corrosion in the first region and improving the reliability of the product.
  • the electrode line segment of the first wiring layer 8 facing the display area 101 is a common electrode wiring.
  • the electrode line segments of the first wiring layer 8 away from the display area 101 are set as ground electrodes, thereby making the potential of the entire liquid crystal display panel 100 more stable.
  • the gaps 81 between the electrode line segments of the first wiring layer 8 are filled with the material used by the second polyimide layer 6 , or also filled with the sealant 11 at the same time. s material. Mainly because there are gaps 81 between the electrode line segments of the first wiring layer 8 to form undulating terrain, the polyimide material used in the second polyimide layer 6 is easier to accumulate in the first area, resulting in the first The thickness of the second polyimide layer 6 in the area is increased, which increases the protection effect on the first wiring layer 8, ensures the normal conversion of signals, and improves the reliability of the product.
  • the second metal layer 31 is disposed on the gate insulating layer 2 , that is, the second metal layer 31 is disposed between the gate insulating layer 2 and the passivation layer 3 .
  • the protrusions 12 are disposed above the second metal layer 31
  • the passivation layer 3 is formed with at least two protrusions 12
  • the second grooves 121 are located between two adjacent protrusions 12 . .
  • the protrusions 12 realize the insulation between the second metal layer 31 and the second wiring layer 4 .
  • This design can reduce the thickness of the array substrate 110 at the position corresponding to the second metal layer 31 , thereby increasing the distance between the array substrate 110 and the color filter substrate 120 at the position of the sealant 11 , thereby increasing the distance between the array substrate 110 and the color filter substrate 120 .
  • the distance between the first wiring layers 8 is increased, so as not to induce discharge between the first wiring layers 8 at the position of the sealant 11 when subjected to external static electricity.
  • the first wiring layer 8 is not provided at the position of the non-display area 102 corresponding to the sealant 11 , so that the sealant 11 will not be induced when external static electricity is applied. Discharge between the first wiring layers 8 avoids the occurrence of short-circuits on the array substrate 110 side or the color filter substrate 120 side caused by the melt of the first wiring layer 8 during the lighting test. This avoids a black screen. Moreover, since there are gaps 81 between the electrode line segments of the first wiring layer 8, undulating terrain is formed, thereby removing the unilateral electrodes forming the electrolytic cell, avoiding electrochemical corrosion caused by the formation of the electrolytic cell, and improving the reliability of the product.
  • the present invention also provides a method for fabricating the liquid crystal display panel 100 described above, which includes the following steps S1-S4:
  • the step of fabricating a color filter substrate is to fabricate a color filter substrate 120.
  • the color filter substrate 120 is provided with a second wiring layer; the second wiring layer is provided with at least one gap 81 in the non-display area. , the gap 81 divides the second wiring layer of the non-display area into at least two electrode line segments spaced apart from each other;
  • the color filter substrate 120 and the array substrate 110 are arranged opposite to each other, and a sealant is arranged in the non-display area to connect the color filter substrate 120 and the array substrate 110.
  • the sealant around the display area are arranged and distributed in the first area and correspond to the at least one notch 81;
  • a liquid crystal layer is fabricated between the array substrate 110 and the color filter substrate 120 .
  • the step S1 of fabricating the array substrate it can be fabricated according to the structure of the first embodiment or the second embodiment.
  • the main difference is that the positions of the second metal layer 31 in the first embodiment and the second embodiment are different , preferably the structure of the array substrate 110 of the second embodiment, which can reduce the thickness of the array substrate 110 at the position corresponding to the second metal layer 31 , thereby increasing the thickness of the array substrate 110 and the sealant 11 at the position of the sealant 11 .
  • the spacing between the color filter substrates 120 increases the spacing between the first wiring layers 8 , so as to avoid that the first wiring layers 8 at the sealant 11 will not be induced when external static electricity is applied. discharge between.
  • the mask plate 200 used is not provided with the first wiring layer 8 at the position of the non-display area 102 corresponding to the sealant 11 , but The cutout 81 is formed at the position corresponding to the sealant 11, so that the discharge will not be induced between the first wiring layers 8 at the position of the sealant 11 when subjected to external static electricity, so as to avoid the lighting test process.
  • the melt of the first wiring layer 8 may cause a short circuit on the side of the array substrate 110 or the side of the color filter substrate 120 , so as to avoid a black screen.
  • the mask plate 200 used does not provide the first wiring layer 8 at the position of the non-display area 102 corresponding to the sealant 11 , as opposed to firstly fabricating the first wiring layer 8 and then engraving
  • the quality of the method of forming the notch 81 by etching is better, because the method of forming the first wiring layer 8 first and then etching the notch 81 has the defect of light leakage from the color filter substrate 120 due to etching.
  • the step S1 of fabricating the array substrate includes:
  • a gate insulating layer 2 is formed on the first substrate 1, and the gate insulating layer 2 covers the first metal layer 21;
  • a passivation layer 3 is formed on the gate insulating layer 2;
  • a second metal layer 31 is embedded inside the upper surface side of the passivation layer 3 , and the second metal layer 31 is located in the first region; the passivation layer 3 is provided with extending to the first metal layer the first groove 111 on the surface of the layer 21 and the second groove 121 on the surface of the second metal layer 31; and
  • a second wiring layer 4 is formed on the passivation layer 3, and the second wiring layer 4 extends to the surfaces of the first groove 111 and the second groove 121 and the first metal layer 21 is connected to the second metal layer 31 .
  • the step S1 of fabricating the array substrate includes:
  • a gate insulating layer 2 is formed on the first substrate 1, and the gate insulating layer 2 covers the first metal layer 21;
  • a second metal layer 31 is formed on the gate insulating layer 2, and the second metal layer 31 is located in the first region;
  • a passivation layer 3 is formed on the gate insulating layer 2 , and the passivation layer 3 covers the second metal layer 31 ; a groove 111 and a second groove 121 on the surface of the second metal layer 31; and
  • a second wiring layer 4 is formed on the passivation layer 3, and the second wiring layer 4 extends to the surfaces of the first groove 111 and the second groove 121 and the first metal layer 21 is connected to the second metal layer 31 .
  • an embodiment of the present disclosure provides a display device including the display panel 100 provided by the above embodiments.
  • the display device in the embodiment of the present disclosure may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • the working principle of the display device provided in this embodiment is the same as the working principle of the foregoing embodiment of the display panel 100 .

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Abstract

一种液晶显示面板（100）及其制作方法、显示装置。通过将非显示区（102）的对应框胶（11）位置不设置走线层，使得在受到外部静电时不会诱发在框胶（11）位置的走线层之间放电，避免在点灯测试过程中烧伤发热出现走线层熔融物造成在阵列基板（110）侧或彩膜基板（120）侧发生短路的情况，从而避免出现黑屏。

Description

一种液晶显示面板及其制作方法、显示装置 技术领域
本发明涉及显示技术领域，具体涉及一种液晶显示面板及其制作方法、显示装置。
 背景技术
显示装置可以把计算机的数据变换成各种文字、数字、符号或直观的图像显示出来，并且可以利用键盘等输入工具把命令或数据输入计算机，借助系统的硬件和软件随时增添、删改、变换显示内容。显示装置根据所用之显示器件分为等离子、液晶、发光二极管和阴极射线管等类型。
LCD （ Liquid Crystal Display 的简称）液晶显示器。目前主流的LCD是TFT-LCD（薄膜晶体管液晶显示器），是由原有的液晶显示技术发展扩展而来的。 与CRT的原理完全不同的是，LCD 的构造是在两片平行的玻璃基板当中放置液晶盒，下基板玻璃上设置薄膜晶体管（TFT），上基板玻璃上设置彩色滤光片（CF）。
TFT-LCD主动式液晶显示器中，每个子像素具有一个薄膜晶体管，其栅极(Gate)连接至水平线，漏极(Drain)连接至垂直方向的数据线，源极(Source)则连接至像素电极。在水平线上施加足够的电压，会使得该条水平线上的所有薄膜晶体管打开，此时该条水平线上的像素电极会与垂直方向上的数据线连通，从而将数据线上的显示信号电压写入像素，通过薄膜晶体管上的信号与电压改变来控制液晶分子的转动方向，从而达到控制每个像素点偏振光出射与否而达到显示目的。薄膜晶体管液晶为每个像素都设有一个半导体开关，以此做到完全的单独的控制一个像素点，液晶材料被夹在阵列基板和彩膜基板之间，通过改变刺激液晶的电压值进而控制液晶分子的转动方向，从而控制每个像素点偏振光出射与否而达到显示目的，控制最后出现的光线强度与色彩。
目前的GOA（Gate Driver on Array的简称）技术是直接将栅极驱动电路做在阵列基板上，可以代替外接的线驱动集成电路芯片（IC），从而从一定程度上降低成本；同时因为集成度高，面板可以把边框做的更薄。基于窄边框和低成本的优势，目前已经被广为使用。
但是，传统窄边框产品或提升玻璃利用率而采用线上密封（Seal on busline）设计，但是这样的设计会导致黑屏问题。具体如图1所示，图1为现有的一种采用线上密封的液晶显示面板结构示意图，液晶显示面板90包含阵列基板91和彩膜基板92，在阵列基板91和彩膜基板92之间还设有缺口，该缺口内填充液晶形成液晶层93，在阵列基板91和彩膜基板92朝向液晶层的一侧均设置氧化铟锡（ITO）作为走线层94，实现对液晶层93的驱动显示，其中在阵列基板91和彩膜基板92的边缘采用框胶95进行密封，一方面由于阵列基板在对应框胶95位置设有换线金属层96以及设置在换线金属层96上的堤坝结构97，因此导致位于阵列基板91一侧的走线层94与位于彩膜基板92一侧的走线层94之间的间距减小，当液晶显示面板90受到外部静电时会诱发在框胶95位置的走线层94之间放电，外部静电导致走线层94熔融阻抗变大，在点灯测试过程中烧伤发热，进而走线层94熔融物氧化铟锡造成在阵列基板91侧或彩膜基板92侧发生短路（short），从而出现黑屏问题。
因此我们需要寻求一种新型的液晶显示面板以避免上述问题。
 技术问题
本发明的一个目的是提供一种液晶显示面板及其制作方法、显示装置，其能够解决目前的液晶显示面板中在受到外部静电时会诱发在框胶位置的走线层之间放电，外部静电导致走线层熔融阻抗变大，在点灯测试过程中烧伤发热，进而走线层熔融物氧化铟锡造成在阵列基板侧或彩膜基板侧发生短路，从而出现黑屏的技术问题。
 技术解决方案
为了解决上述问题，本发明的一个实施方式提供了一种液晶显示面板，其中包括：显示区和围绕所述显示区的非显示区，所述非显示区中具有第一区域；阵列基板；彩膜基板，所述彩膜基板与所述阵列基板相对设置，所述彩膜基板朝向所述阵列基板的一面具有第一走线层，所述第一走线层从所述显示区延伸至所述非显示区，且在对应所述第一区域的位置，所述彩膜基板上的第一走线形成有缺口。
进一步地，所述液晶显示面板还包括框胶，所述框胶设置在所述阵列基板和所述彩膜基板之间，分布在所述第一区域，且填充于所述缺口中。
进一步地，所述第一走线层中具有公共电极走线。
进一步地，所述阵列基板朝向所述彩膜基板的一面具有第二走线层，所述第二走线层从所述显示区延伸至所述非显示区。
进一步地，所述第二走线层中具有信号走线。
进一步地，所述阵列基板包括：第一基板；第一金属层，设于所述第一基板上；栅极绝缘层，设于所述第一基板上且覆盖所述第一金属层；钝化层，设于所述栅极绝缘层上；第二金属层，嵌设于所述钝化层的上表面一侧内部，并位于所述第一区域；以及所述第二走线层，设于所述钝化层上，所述第二走线层穿过所述钝化层及所述栅极绝缘层与所述第一金属层电性连接并延伸至所述第一区域与所述第二金属层电性连接。
进一步地，所述第二金属层设于所述栅极绝缘层的上表面；在所述第二金属层的上方，所述钝化层形成有至少两个凸起，所述第二凹槽位于两个相邻的凸起之间。
本发明的另一个实施方式还提供了一种前文所述的液晶显示面板的制作方法，包括步骤：
制作一阵列基板；
制作一彩膜基板，所述彩膜基板中设有第一走线层；所述第一走线层从所述显示区延伸至所述非显示区，且在对应所述第一区域的位置，所述第一走线形成有缺口；以及
将所述彩膜基板与所述阵列基板相对设置，在所述非显示区内设置框胶连接所述彩膜基板和所述阵列基板，所述框胶分布在所述第一区域且填充于所述缺口中。
进一步地，在制作所述彩膜基板步骤中，通过采用的掩膜板在所述第一区域的对应所述框胶的位置形成所述缺口。
进一步地，在一实施例中，所述制作阵列基板步骤包括：
在一第一基板上制作第一金属层；
在所述第一基板上制作栅极绝缘层，所述栅极绝缘层覆盖所述第一金属层；
在所述栅极绝缘层上制作钝化层；
在所述钝化层的上表面一侧内部嵌设第二金属层，所述第二金属层位于所述第一区域；所述钝化层设有延伸至所述第一金属层表面的第一凹槽和所述第二金属层表面的第二凹槽；以及
在所述钝化层上制作第二走线层，所述第二走线层延伸至所述第一凹槽和所述第二凹槽的表面与所述第一金属层和所述第二金属层连接。
进一步地，在另一实施例中，所述制作阵列基板步骤包括：
在一第一基板上制作第一金属层；
在所述第一基板上制作栅极绝缘层，所述栅极绝缘层覆盖所述第一金属层；
在所述栅极绝缘层上制作第二金属层，所述第二金属层位于所述第一区域；
在所述栅极绝缘层上制作钝化层，所述钝化层覆盖所述第二金属层；所述钝化层设有延伸至所述第一金属层表面的第一凹槽和所述第二金属层表面的第二凹槽；以及
在所述钝化层上制作第二走线层，所述第二走线层延伸至所述第一凹槽和所述第二凹槽的表面与所述第一金属层和所述第二金属层连接。
本发明的另一个实施方式还提供了一种显示装置，其中包括本发明涉及的液晶显示面板。
 有益效果
本发明涉及一种液晶显示面板及其制作方法、显示装置，本发明通过将所述非显示区的对应框胶位置不设置第二走线层，使得在受到外部静电时不会诱发在框胶位置的第二走线层之间放电，避免在点灯测试过程中烧伤发热出现第二走线层熔融物造成在阵列基板侧或彩膜基板侧发生短路的情况，从而避免出现黑屏。同时在框胶位置增加阵列基板与彩膜基板的间距，从而增加第二走线层之间的间距，避免在受到外部静电时不会诱发在框胶位置的第二走线层之间放电，提高产品的信赖性。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为现有的一种采用线上密封的液晶显示面板结构示意图。
图2为本发明实施例一中的一种液晶显示面板的结构示意图。
图3为本发明实施例二中的一种液晶显示面板的结构示意图。
图4为本发明实施例中一种液晶显示面板的制作方法流程图。
图5为图4中所述制作彩膜基板步骤的结构示意图。
图中部件标识如下：
100、液晶显示面板，              101、显示区，
102、非显示区，                  1、第一基板，
2、栅极绝缘层，                  3、钝化层，
4、第二走线层，                  5、第一聚酰亚胺层，
6、第二聚酰亚胺层，              7、液晶层，
8、第一走线层，                  9、黑色矩阵层，
10、第二基板，                   11、框胶，
12、凸起，                       21、第一金属层，
31、第二金属层，                 81、缺口，
110、阵列基板，                  111、第一凹槽，
120、彩膜基板，                  121、第二凹槽，
200、掩膜板。
 本发明的实施方式
以下结合说明书附图详细说明本发明的优选实施例，以向本领域中的技术人员完整介绍本发明的技术内容，以举例证明本发明可以实施，使得本发明公开的技术内容更加清楚，使得本领域的技术人员更容易理解如何实施本发明。然而本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例，下文实施例的说明并非用来限制本发明的范围。
本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是附图中的方向，本文所使用的方向用语是用来解释和说明本发明，而不是用来限定本发明的保护范围。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。此外，为了便于理解和描述，附图所示的每一组件的尺寸和厚度是任意示出的 ，本发明并没有限定每个组件的尺寸和厚度。
当某些组件，被描述为“在”另一组件“上”时，所述组件可以直接置于所述另一组件上；也可以存在一中间组件，所述组件置于所述中间组件上，且所述中间组件置于另一组件上。当一个组件被描述为“安装至”或“连接至”另一组件时，二者可以理解为直接“安装”或“连接”，或者一个组件通过一中间组件“安装至”或“连接至”另一个组件。
实施例一、
如图2所示，一种液晶显示面板100，其中包括显示区101和围绕所述显示区101的非显示区102，所述非显示区102中具有第一区域。其中所述非显示区102的液晶显示面板100包括阵列基板110、彩膜基板120、液晶层7以及框胶11，其中所述彩膜基板120与所述阵列基板110相对设置，所述液晶层7设置于所述阵列基板110与所述彩膜基板120之间，所述框胶11设置于所述液晶层7周围并位于非显示区102内。其中所述框胶11分布的区域也与所述非显示区102的GOA区对应，该对应区域为所述第一区域。
如图2所示，其中阵列基板110包括：第一基板1、栅极绝缘层2、钝化层3、第二走线层4。
如图2所示，其中所述栅极绝缘层2设置于所述第一基板1上，所述栅极绝缘层层2中设有第一金属层21。栅极绝缘层2（英文全称：Gate Insulator，英文简称：GI）是栅极金属和半导体Si之间的绝缘层，其组成材料可以为SiNx或者SiOx。
其中所述钝化层3设置于所述栅极绝缘层2上，所述钝化层3中设有第二金属层31，所述钝化层3局部向下凹陷直至所述第一金属层21上表面形成第一凹槽111，所述钝化层3局部向下凹陷直至所述第二金属层31上表面形成第二凹槽121；所述钝化层3主要是起绝缘保护作用，其组成材料可以为SiNx或者SiOx。具体的，所述第二走线层4穿过位于所述钝化层3及所述绝缘层2的第一凹槽111与所述第一金属层21电性连接，并延伸穿过所述第二凹槽121与所述第二金属层31电性连接。
其中所述钝化层3设有延伸至所述第一金属层21表面的第一凹槽111和所述第二金属层31表面的第二凹槽121。所述第二走线层4设置于所述钝化层3、第一凹槽111以及第二凹槽121上，具体的所述第二走线层4设于所述钝化层3上且延伸至所述第一凹槽111和所述第二凹槽121的表面与所述第一金属层21和所述第二金属层31连接。首先，由于氧化铟锡（ITO）薄膜具有高导电率，因此利用第二走线层4联通第一金属层21和第二金属层31，形成低电位电压；其次，由于氧化铟锡（ITO）薄膜具有高透光率，利用第二走线层4使背光模组发出的光能透过该层并被利用，提高光使用效率。所述第二走线层4中具有信号走线，用于传输CK信号。
其中所述第一聚酰亚胺层5设置于所述第二走线层4上；第一聚酰亚胺层5中的固含成份在原液中是小分子化合物，它在高温下产生聚合反应，形成带很多支链的长链大分子固体聚合物聚酰胺。聚合物分子中支链与主链的夹角就是所谓的导向层预倾角。这些聚合物的支链基团与液晶分子间的作用力比较强，对液晶分子有锚定的作用，可以使液晶按预倾角方向排列。
如图2所示，其中所述彩膜基板120包括：第一走线层8、黑色矩阵层9以及第二基板10。所述第一走线层8与所述第二走线层4的材质相同，均为氧化铟锡（ITO）。
如图2所示，所述黑色矩阵层9设置于所述第一走线层8远离所述阵列基板110的一侧表面上；所述第二基板10设置于所述黑色矩阵层9上。
如图2所示，所述第一走线层8在对应所述框胶11位置设有至少一缺口81，所述缺口81将所述非显示区102的第一走线层8分为至少两段相互间隔的电极线段。优选所述缺口81的宽度与所述框胶11的宽度相同。
如图2所示，所述第一走线层8中朝向所述显示区101的电极线段为公共电极走线。所述第一走线层8远离所述显示区101的电极线段设置为接地电极，由此可以使整个液晶显示面板100的电位更加稳定。
如图2所示，所述第一走线层8的电极线段之间的缺口81内填充有所述框胶11采用的材料。
其中所述阵列基板110还包括至少两个凸起12，设于所述第二金属层31的上方，所述钝化层3形成有至少两个凸起12，所述第二凹槽121位于两个相邻的凸起12之间，所述第二走线层4覆盖在所述凸起12上并在所述第二凹槽121处与所述第二金属层31电性连接。
本实施例中，所述第二金属层31嵌设于所述钝化层3的上表面，所述凸起12部分位于所述第二金属层31上并部分位于所述钝化层3上。所述凸起12实现了所述第二金属层31与所述第二走线层4的绝缘。优选所述凸起12与所述钝化层3一体成型。
本实施例通过将所述非显示区102的对应所述框胶11的位置不设置所述第一走线层8，使得在受到外部静电时不会诱发在所述框胶11位置的所述第一走线层8之间放电，避免在点灯测试过程中烧伤发热出现所述第一走线层8熔融物造成在所述阵列基板110侧或所述彩膜基板120侧发生短路的情况，从而避免出现黑屏。而且由于所述第一走线层8的电极线段之间具有缺口81，形成起伏地势，从而去除形成电解池的单边电极，避免构成电解池导致发生电化学腐蚀，提高产品的信赖性。
实施例二、
如图3所示，一种液晶显示面板100，其中包括显示区101和围绕所述显示区101的非显示区102，所述非显示区102中具有第一区域。其中所述非显示区102的液晶显示面板100包括阵列基板110、彩膜基板120、液晶层7以及框胶11，其中所述彩膜基板120与所述阵列基板110相对设置，所述液晶层7设置于所述阵列基板110与所述彩膜基板120之间，所述框胶11设置于所述液晶层7周围并位于非显示区102内。其中所述框胶11分布的区域也与所述非显示区102的第一区域对应。
如图3所示，其中阵列基板110包括：第一基板1、栅极绝缘层2、钝化层3、第二走线层4、第一聚酰亚胺层5。
如图3所示，其中所述栅极绝缘层2设置于所述第一基板1上，所述栅极绝缘层层2中设有第一金属层21。栅极绝缘层2（英文全称：Gate Insulator，英文简称：GI）是栅极金属和半导体Si之间的绝缘层，其组成材料可以为SiNx或者SiOx。
其中所述钝化层3设置于所述栅极绝缘层2上，所述钝化层3中设有第二金属层31，所述钝化层3局部向下凹陷直至所述第一金属层21上表面形成第一凹槽111，所述钝化层3局部向下凹陷直至所述第二金属层31上表面形成第二凹槽121；所述钝化层3主要是起绝缘保护作用，其组成材料可以为SiNx或者SiOx。
其中所述钝化层3设有延伸至所述第一金属层21表面的第一凹槽111和所述第二金属层31表面的第二凹槽121。所述第二走线层4设置于所述钝化层3、第一凹槽111以及第二凹槽121上，具体的所述第二走线层4设于所述钝化层3上且延伸至所述第一凹槽111和所述第二凹槽121的表面与所述第一金属层21和所述第二金属层31连接。首先，由于氧化铟锡（ITO）薄膜具有高导电率，因此利用第二走线层4联通第一金属层21和第二金属层31，形成低电位电压；其次，由于氧化铟锡（ITO）薄膜具有高透光率，利用第二走线层4使背光模组发出的光能透过该层并被利用，提高光使用效率。所述第二走线层4中具有信号走线，用于传输CK信号。
其中所述第一聚酰亚胺层5设置于所述第二走线层4上；第一聚酰亚胺层5中的固含成份在原液中是小分子化合物，它在高温下产生聚合反应，形成带很多支链的长链大分子固体聚合物聚酰胺。聚合物分子中支链与主链的夹角就是所谓的导向层预倾角。这些聚合物的支链基团与液晶分子间的作用力比较强，对液晶分子有锚定的作用，可以使液晶按预倾角方向排列。
如图3所示，其中所述彩膜基板120包括：第二聚酰亚胺层6、第一走线层8、黑色矩阵层9以及第二基板10。所述第一走线层8与所述第二走线层4的材质相同，均为氧化铟锡（ITO）。
如图3所示，其中所述第二聚酰亚胺层6对应设置于所述第一聚酰亚胺层5上；所述第一走线层8设置于所述第二聚酰亚胺层6上，其中所述第一走线层8包括若干相互间隔的电极线段；所述黑色矩阵层9设置于所述第一走线层8远离所述阵列基板110的一侧表面上；所述第二基板10设置于所述黑色矩阵层9上。
如图3所示，所述第一走线层8的电极线段相互间隔设置，其中所述第一走线层8的电极线段之间的缺口81对应于所述第一金属层21的位置设置；所述第一走线层8的电极线段之间的缺口81对应于所述第二金属层31的位置设置。如此设置主要是因为，第一金属层21和第二金属层31的位置处相对于其他部位而言，极容易遭受侵蚀，因此去除第一金属层21和第二金属层31对应的位置处的第一走线层8，由此可以避免形成电解池，从而避免第一区域发生电化学腐蚀，提高产品的信赖性。
如图3所示，所述第一走线层8中朝向所述显示区101的电极线段为公共电极走线。所述第一走线层8远离所述显示区101的电极线段设置为接地电极，由此可以使整个液晶显示面板100的电位更加稳定。
如图3所示，所述第一走线层8的电极线段之间的缺口81内填充有所述第二聚酰亚胺层6采用的材料，或者还同时填充有所述框胶11采用的材料。主要是由于所述第一走线层8的电极线段之间具有缺口81，形成起伏地势，第二聚酰亚胺层6采用的聚酰亚胺材料更加容易在第一区域堆积，导致第一区域的第二聚酰亚胺层6厚度增大，加大对所述第一走线层8的保护作用，保证信号正常转换，提高产品的信赖性。
本实施例中，所述第二金属层31设于所述栅极绝缘层2上，即所述第二金属层31设于所述栅极绝缘层2和所述钝化层3之间。所述凸起12设于所述第二金属层31的上方，所述钝化层3形成有至少两个凸起12，所述第二凹槽121位于两个相邻的凸起12之间。所述凸起12实现了所述第二金属层31与所述第二走线层4的绝缘。这样设计可使得所述阵列基板110在对应所述第二金属层31的位置的厚度减少，从而在所述框胶11位置增加了所述阵列基板110与所述彩膜基板120的间距，从而增加所述第一走线层8之间的间距，避免在受到外部静电时不会诱发在所述框胶11位置的所述第一走线层8之间放电。
本实施例通过将所述非显示区102的对应所述框胶11的位置不设置所述第一走线层8，使得在受到外部静电时不会诱发在所述框胶11位置的所述第一走线层8之间放电，避免在点灯测试过程中烧伤发热出现所述第一走线层8熔融物造成在所述阵列基板110侧或所述彩膜基板120侧发生短路的情况，从而避免出现黑屏。而且由于所述第一走线层8的电极线段之间具有缺口81，形成起伏地势，从而去除形成电解池的单边电极，避免构成电解池导致发生电化学腐蚀，提高产品的信赖性。
如图4所示，本发明还提供了一种前文所述的液晶显示面板100的制作方法，其包括以下步骤S1-S4：
S1、制作阵列基板步骤，制作一阵列基板110，所述阵列基板110中设有第一走线层；
S2、制作彩膜基板步骤，制作一彩膜基板120，所述彩膜基板120中设有第二走线层；所述第二走线层在所述非显示区内设有至少一缺口81，所述缺口81将所述非显示区的第二走线层分为至少两段相互间隔的电极线段；
S3、成盒步骤，将所述彩膜基板120与所述阵列基板110相对设置，在所述非显示区内设置框胶连接所述彩膜基板120和所述阵列基板110，所述框胶围绕所述显示区设置分布在所述第一区域且对应所述至少一缺口81；以及
S4、制作液晶层步骤，在所述阵列基板110于所述彩膜基板120之间制作液晶层。
值得注意的是，在制作阵列基板步骤S1中，可以根据上述实施例一或实施例二的结构对应制作，其主要区别在于实施例一与实施例二的所述第二金属层31的位置不同，优选为实施例二的阵列基板110结构，可使得所述阵列基板110在对应所述第二金属层31的位置的厚度减少，从而在所述框胶11位置增加了所述阵列基板110与所述彩膜基板120的间距，从而增加所述第一走线层8之间的间距，避免在受到外部静电时不会诱发在所述框胶11位置的所述第一走线层8之间放电。
在制作彩膜基板步骤S2中，如图5所示，采用的掩膜板200在所述非显示区102的对应所述框胶11的位置不设置所述第一走线层8，而是在对应所述框胶11的位置形成所述缺81，使得在受到外部静电时不会诱发在所述框胶11位置的所述第一走线层8之间放电，避免在点灯测试过程中烧伤发热出现所述第一走线层8熔融物造成在所述阵列基板110侧或所述彩膜基板120侧发生短路的情况，从而避免出现黑屏。而且由于所述第一走线层8的电极线段之间具有缺口81，形成起伏地势，从而去除形成电解池的单边电极，避免构成电解池导致发生电化学腐蚀，提高产品的信赖性。而且采用的掩膜板200在所述非显示区102的对应所述框胶11的位置不设置所述第一走线层8的方式，相对于先制作所述第一走线层8后刻蚀制作所述缺口81的方式的品质更好，这是由于先制作所述第一走线层8后刻蚀制作所述缺口81的方式存在蚀刻导致所述彩膜基板120漏光的缺陷。
在一实施例中，所述制作阵列基板步骤S1包括：
在一第一基板1上制作第一金属层21；
在所述第一基板1上制作栅极绝缘层2，所述栅极绝缘层2覆盖所述第一金属层21；
在所述栅极绝缘层2上制作钝化层3；
在所述钝化层3的上表面一侧内部嵌设第二金属层31，所述第二金属层31位于所述第一区域；所述钝化层3设有延伸至所述第一金属层21表面的第一凹槽111和所述第二金属层31表面的第二凹槽121；以及
在所述钝化层3上制作第二走线层4，所述第二走线层4延伸至所述第一凹槽111和所述第二凹槽121的表面与所述第一金属层21和所述第二金属层31连接。
在另一实施例中，所述制作阵列基板步骤S1包括：
在一第一基板1上制作第一金属层21；
在所述第一基板1上制作栅极绝缘层2，所述栅极绝缘层2覆盖所述第一金属层21；
在所述栅极绝缘层2上制作第二金属层31，所述第二金属层31位于所述第一区域；
在所述栅极绝缘层2上制作钝化层3，所述钝化层3覆盖所述第二金属层31；所述钝化层3设有延伸至所述第一金属层21表面的第一凹槽111和所述第二金属层31表面的第二凹槽121；以及
在所述钝化层3上制作第二走线层4，所述第二走线层4延伸至所述第一凹槽111和所述第二凹槽121的表面与所述第一金属层21和所述第二金属层31连接。
基于同样的发明构思，本公开实施例提供一种显示装置，该显示装置包括由以上实施例所提供的显示面板100。本公开实施例中的显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本实施例提供的显示装置的工作原理，与前述显示面板100的实施例工作原理一致，具体结构关系及工作原理参见前述显示面板100实施例，此处不再赘述。
以上对本发明所提供的液晶显示面板及其制作方法、显示装置进行了详细介绍。应理解，本文所述的示例性实施方式应仅被认为是描述性的，用于帮助理解本发明的方法及其核心思想，而并不用于限制本发明。在每个示例性实施方式中对特征或方面的描述通常应被视作适用于其他示例性实施例中的类似特征或方面。尽管参考示例性实施例描述了本发明，但可建议所属领域的技术人员进行各种变化和更改。本发明意图涵盖所附权利要求书的范围内的这些变化和更改，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种液晶显示面板，其中，包括：
    显示区和围绕所述显示区的非显示区，所述非显示区中具有第一区域；
    阵列基板；
    彩膜基板，所述彩膜基板与所述阵列基板相对设置，所述彩膜基板朝向所述阵列基板的一面具有第一走线层，所述第一走线层从所述显示区延伸至所述非显示区，且在对应所述第一区域的位置，所述第一走线形成至少一个缺口。
  2. 根据权利要求1所述的液晶显示面板，其中，还包括：
    框胶，设置在所述阵列基板和所述彩膜基板之间，分布在所述第一区域，且填充于所述缺口中。
  3. 根据权利要求1所述的液晶显示面板，其中，所述阵列基板朝向所述彩膜基板的一面具有第二走线层，所述第二走线层从所述显示区延伸至所述非显示区。
  4. 根据权利要求3所述的液晶显示面板，其中，所述阵列基板包括：
    第一基板；
    第一金属层，设于所述第一基板上；
    栅极绝缘层，设于所述第一基板上且覆盖所述第一金属层；
    钝化层，设于所述栅极绝缘层上；
    第二金属层，嵌设于所述钝化层的上表面一侧内部，并位于所述第一区域； 所述钝化层设有延伸至所述第一金属层表面的第一凹槽和所述第二金属层表面的第二凹槽；
    所述第二走线层设于所述钝化层上且延伸至所述第一凹槽和所述第二凹槽的表面与所述第一金属层和所述第二金属层连接。
  5. 根据权利要求4所述的液晶显示面板，其中，
    所述第二金属层设于所述栅极绝缘层的上表面；
    在所述第二金属层的上方，所述钝化层形成有至少两个凸起，所述第二凹槽位于两个相邻的凸起之间。
  6. 一种权利要求1所述的液晶显示面板的制作方法，其中，包括步骤：
    制作一阵列基板；
    制作一彩膜基板，所述彩膜基板中设有第一走线层；所述第一走线层从所述显示区延伸至所述非显示区，且在对应所述第一区域的位置，所述第一走线形成有缺口；以及
    将所述彩膜基板与所述阵列基板相对设置，在所述非显示区内设置框胶连接所述彩膜基板和所述阵列基板，所述框胶分布在所述第一区域且填充于所述缺口中。
  7. 根据权利要求6所述的液晶显示面板的制作方法，其中，在制作所述彩膜基板步骤中，通过采用的掩膜板在所述第一区域的对应所述框胶的位置形成所述缺口。
  8. 根据权利要求6所述的液晶显示面板的制作方法，其中，所述制作阵列基板步骤包括：
    在一第一基板上制作第一金属层；
    在所述第一基板上制作栅极绝缘层，所述栅极绝缘层覆盖所述第一金属层；
    在所述栅极绝缘层上制作钝化层；
    在所述钝化层的上表面一侧内部嵌设第二金属层，所述第二金属层位于所述第一区域；所述钝化层设有延伸至所述第一金属层表面的第一凹槽和所述第二金属层表面的第二凹槽；以及
    在所述钝化层上制作第二走线层，所述第二走线层延伸至所述第一凹槽和所述第二凹槽的表面与所述第一金属层和所述第二金属层连接。
  9. 根据权利要求6所述的液晶显示面板的制作方法，其中，所述制作阵列基板步骤包括：
    在一第一基板上制作第一金属层；
    在所述第一基板上制作栅极绝缘层，所述栅极绝缘层覆盖所述第一金属层；
    在所述栅极绝缘层上制作第二金属层，所述第二金属层位于所述第一区域；
    在所述栅极绝缘层上制作钝化层，所述钝化层覆盖所述第二金属层；所述钝化层设有延伸至所述第一金属层表面的第一凹槽和所述第二金属层表面的第二凹槽；以及
    在所述钝化层上制作第二走线层，所述第二走线层延伸至所述第一凹槽和所述第二凹槽的表面与所述第一金属层和所述第二金属层连接。
  10. 一种显示装置，其中，包括权利要求1所述的液晶显示面板。
PCT/CN2020/142414 2020-12-30 2020-12-31 一种液晶显示面板及其制作方法、显示装置 WO2022141519A1 (zh)

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