WO2022121043A1 - 一种低功耗的fpga电路 - Google Patents

一种低功耗的fpga电路 Download PDF

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WO2022121043A1
WO2022121043A1 PCT/CN2020/141694 CN2020141694W WO2022121043A1 WO 2022121043 A1 WO2022121043 A1 WO 2022121043A1 CN 2020141694 W CN2020141694 W CN 2020141694W WO 2022121043 A1 WO2022121043 A1 WO 2022121043A1
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voltage
fpga
temperature
chip
power consumption
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PCT/CN2020/141694
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戴朝龙
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威创集团股份有限公司
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • the present invention relates to the field of FPGA peripheral circuits, and more particularly, to an FPGA circuit with low power consumption.
  • FPGA field-programmable gate array
  • the low power consumption design method of the present invention is mainly proposed for Intel series FPGAs.
  • the present invention proposes to reduce power consumption from the direction of voltage control, which is different from the previous method of adding heat sinks or fans.
  • the present invention aims to overcome the above-mentioned deficiencies of the prior art, and provides an FPGA circuit with low power consumption, and the simple peripheral circuit and chip cooperate with the FPGA to reduce the power consumption of the FPGA.
  • a low-power FPGA circuit which includes a monitoring module, a voltage regulator chip and an FPGA chip, the monitoring module obtains the operating voltage range value, current operating temperature and current operating voltage of the FPGA chip, and the voltage regulator chip is based on The information acquired by the monitoring module adjusts its voltage output range.
  • the low power consumption design method of the present invention is mainly: For Intel series FPGAs, the present invention proposes to reduce power consumption from the direction of voltage control, which is different from the previous method of adding heat sinks or fans, and solves the problems of high temperature and high power consumption from the characteristics of the FPGA itself. Only simple peripheral circuit coordination is required to effectively reduce FPGA power consumption, lower implementation costs, and improve product stability.
  • the monitoring module includes a voltage reading module, which is used to read the working voltage range value inside the FPGA chip; a temperature detection module, which detects the current working temperature of the FPGA; and a voltage detection module, which detects the current working voltage of the FPGA.
  • the voltage regulator chip judges and calculates and processes output control parameters according to the information obtained by the monitoring module, writes the control parameters into the voltage regulator chip according to the timing requirements of the voltage regulator chip, configures and controls The voltage output of the voltage regulator chip, the voltage output range of the voltage regulator chip is reduced in stages.
  • the voltage regulator chip judges and calculates and processes output control parameters according to the information obtained by the monitoring module, writes the control parameters into the voltage regulator chip according to the timing requirements of the voltage regulator chip, configures and controls The voltage output of the voltage regulator chip, the voltage output range of the voltage regulator chip is reduced in stages.
  • the voltage range obtained by the voltage reading module of the FPGA is a voltage range set inside the FPGA chip: VL to VH, where VL represents the lowest voltage that can be adjusted, and VH represents the highest voltage that can be adjusted.
  • the voltage regulator chip when the temperature detection module detects that the temperature exceeds 40°C, the voltage regulator chip is activated to adjust its output range, and when the temperature detection module detects that the temperature is less than or equal to 40°C, the voltage regulator chip is maintained working status.
  • the voltage regulator chip controls the output voltage to be VL.
  • the voltage regulator chip adjusts the voltage output range by limiting the highest value Vm in the voltage output range.
  • each temperature interval ranges from 8 to 12°C.
  • the invention requires simple peripheral circuits and chips to cooperate with the FPGA to achieve the purpose of reducing the power consumption of the FPGA; the power supply is supplied to the FPGA through an external voltage stabilizer, and the FPGA controls the voltage stabilizer chip through internal processing, and adjusts the output voltage of the voltage stabilizer chip in real time.
  • the power consumption P UI
  • FIG. 1 is a block diagram of the overall flow of the present invention.
  • FIG. 2 is a flow chart of the monitoring module of the present invention.
  • a low-power FPGA circuit includes a monitoring module, a voltage regulator chip and an FPGA chip, and the monitoring module obtains the operating voltage range value, current operating temperature and current operating voltage of the FPGA chip, The voltage regulator chip adjusts its voltage output range according to the information obtained by the monitoring module.
  • the low power consumption design method of the present invention is mainly: For Intel series FPGAs, the present invention proposes to reduce power consumption from the direction of voltage control, which is different from the previous method of adding heat sinks or fans, and solves the problems of high temperature and high power consumption from the characteristics of the FPGA itself. Only simple peripheral circuit coordination is required to effectively reduce FPGA power consumption, lower implementation costs, and improve product stability.
  • the monitoring module includes
  • a voltage reading module used for reading the working voltage range value inside the FPGA chip
  • the temperature detection module detects the current working temperature of the FPGA
  • the voltage detection module detects the current working voltage of the FPGA.
  • the voltage regulator chip judges and calculates and processes output control parameters according to the information obtained by the monitoring module, writes the control parameters into the voltage regulator chip according to the timing requirements of the voltage regulator chip, configures and controls The voltage output of the voltage regulator chip, the voltage output range of the voltage regulator chip is reduced in stages.
  • the voltage regulator chip judges and calculates and processes output control parameters according to the information obtained by the monitoring module, writes the control parameters into the voltage regulator chip according to the timing requirements of the voltage regulator chip, configures and controls The voltage output of the voltage regulator chip, the voltage output range of the voltage regulator chip is reduced in stages.
  • the voltage range obtained by the voltage reading module of the FPGA is a voltage range set inside the FPGA chip: VL to VH, where VL represents the lowest voltage that can be adjusted, and VH represents the highest voltage that can be adjusted.
  • the voltage regulator chip when the temperature detection module detects that the temperature exceeds 40°C, the voltage regulator chip is activated to adjust its output range, and when the temperature detection module detects that the temperature is less than or equal to 40°C, the voltage regulator chip is maintained working status.
  • the voltage regulator chip controls the output voltage to be VL.
  • the voltage regulator chip adjusts the voltage output range by limiting the highest value Vm in the voltage output range.
  • each temperature interval ranges from 8 to 12°C.
  • the range value read by the voltage reading module is a voltage range in which the FPGA chip can work normally, the monitoring module converts the range value into identifiable voltage value data, and converts the voltage value into The data is transmitted to the voltage regulator chip for processing;
  • the temperature detection module mainly detects and monitors the current operating temperature data of the FPGA chip in real time, and then converts the temperature data into an identifiable temperature value.
  • the voltage regulator chip can be judged from the operating temperature of the FPGA chip. Whether the chip works normally, and the current temperature value of the FPGA chip is transmitted to the voltage regulator chip for processing;
  • the voltage detection module mainly detects the current working voltage data of the FPGA chip in real time. From the working voltage data, it can be judged whether the power supply voltage of the FPGA chip is normal, and the power supply voltage is transmitted to the voltage regulator chip for processing. ;
  • the temperature range detected by the temperature detection module of the FPGA module is set to be above 40°C, the
  • the starting temperature of the regulation function of the voltage regulator chip is 40°C.
  • the temperature range is: 10°C,
  • the voltage regulator chip When the temperature is below 40°C, the voltage regulator chip maintains the current working state
  • the output voltage range of the voltage regulator chip is configured: VH-0.2*(VH-VL) ⁇ VL.
  • the output voltage range of the voltage regulator chip is configured: VH-0.4*(VH-VL) ⁇ VL.
  • the output voltage range of the voltage regulator chip is configured: VH-0.6* (VH-VL) ⁇ VL.
  • the output voltage range of the voltage regulator chip is configured: VH-0.8*(VH-VL) ⁇ VL.
  • the temperature range detected by the temperature detection module of the FPGA module is set to be above 40°C, that is, the start-up temperature of the regulation function of the voltage regulator chip is 40°C, and when the temperature range is: 8°C,
  • the voltage regulator chip When the temperature is below 40°C, the voltage regulator chip maintains the current working state
  • the invention requires simple peripheral circuits and chips to cooperate with the FPGA to achieve the purpose of reducing the power consumption of the FPGA.
  • the power supply supplies power to the FPGA through an external voltage stabilizer, and the FPGA controls the voltage stabilizer chip through internal processing, and adjusts the output voltage of the voltage stabilizer chip in real time.

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Abstract

一种低功耗的FPGA电路，涉及FPGA工作电路领域。包括监测模块、稳压芯片及FPGA芯片，所述监测模块获取所述FPGA芯片的工作电压范围值、当前工作温度和当前工作电压，所述稳压芯片根据所述监测模块获取的信息调节其电压输出范围；由于FPGA的特性，高速处理数据时功耗会变的非常大，温度也相应的升高，影响FPGA工作的稳定性，对产品性能和甚至整个系统产生不良影响；本发明的低功耗设计方法主要是针对Intel系列FPGA提出的，本发明提出从电压控制方向来降低功耗，不同于以往的增加散热片或者风扇的方式，从FPGA本身特性来解决温度高、功耗大问题；只需简单的外围电路配合，有效的降低FPGA功耗，实现成本较低，提高产品稳定性。

Description

一种低功耗的FPGA电路
本申请要求于2020年12月8日提交中国专利局、申请号为202011443518.4、发明名称为“一种低功耗的FPGA电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及FPGA外围电路领域，更具体地，涉及一种低功耗的FPGA电路。
背景技术
FPGA的灵活性和高速并行处理能力在大数据时代越来越重要；尤其是在AV音视频行业，随着分辨率的不断提高，大量的音视频数据需要实时处理，而FPGA的高速处理能力能够在AV行业发挥不可替代的作用，因此FPGA广泛应用在AV音视频行业。
由于FPGA的特性，高速处理数据时功耗会变的非常大，温度也相应的升高，影响FPGA工作的稳定性，对产品性能和甚至整个系统产生不良影响。
本发明的低功耗设计方法主要是针对Intel系列FPGA提出的，本发明提出从电压控制方向来降低功耗，不同于以往的增加散热片或者风扇的方式。
发明内容
本发明旨在克服上述现有技术的不足，提供一种低功耗的FPGA电路，简单的外围电路和芯片与FPGA配合达到降低FPGA功耗。
本发明采取的技术方案是，
一种低功耗的FPGA电路，其包括监测模块、稳压芯片及FPGA芯片，所述监测模块获取所述FPGA芯片的工作电压范围值、当前工作温度和当 前工作电压，所述稳压芯片根据所述监测模块获取的信息调节其电压输出范围。
由于高速处理数据时FPGA的功耗会变的非常大，温度也相应的升高，影响FPGA工作的稳定性，对产品性能和甚至整个系统产生不良影响；本发明的低功耗设计方法主要是针对Intel系列FPGA提出的，本发明提出从电压控制方向来降低功耗，不同于以往的增加散热片或者风扇的方式，从FPGA本身特性来解决温度高、功耗大问题。只需简单的外围电路配合，有效的降低FPGA功耗，实现成本较低，提高产品稳定性。
优选的，所述监测模块包括电压读取模块，用于读取所述FPGA芯片内部的工作电压范围值；温度检测模块，检测FPGA的当前工作温度；电压检测模块，检测FPGA的当前工作电压。优选的，所述稳压芯片根据所述监测模块获取的信息对其进行判断及计算处理输出控制参数，根据所述稳压芯片的时序要求将所述控制参数写入稳压芯片，配置和控制稳压芯片的电压输出，所述稳压芯片阶段性降低其电压输出范围。
优选的，所述稳压芯片根据所述监测模块获取的信息对其进行判断及计算处理输出控制参数，根据所述稳压芯片的时序要求将所述控制参数写入稳压芯片，配置和控制稳压芯片的电压输出，所述稳压芯片阶段性降低其电压输出范围。
优选的，所述电压读取模块获取所述FPGA的电压范围为FPGA芯片内部设定的电压范围：VL至VH，所述VL表示可以调节的最低电压，所述VH表示可以调节的最高电压。
优选的，当所述温度检测模块检测到温度超过40℃时，启动所述稳压 芯片调节其输出范围，当所述温度检测模块检测到温度小于或者等于40℃时，维持所述稳压芯片的工作状态。
优选的，当所述温度检测模块检测到温度超过85度时，所述稳压芯片控制输出电压为VL。
优选的，所述稳压芯片通过限制电压输出范围中的最高值Vm调节电压输出范围。
优选的，当所述FPGA芯片的工作温度分为具有n个区间的温度范围，当所述温度检测模块获取当前的温度属于第i个区间时，
Figure PCTCN2020141694-appb-000001
当i＝n时，Vm＝VL。
优选的，每个温度区间范围为8～12℃。
与现有技术相比，本发明的有益效果为：
本发明需要简单的外围电路和芯片与FPGA配合达到降低FPGA功耗的目的；电源经过外部稳压器供电给FPGA，FPGA经过内部处理控制稳压芯片，实时调节稳压芯片的输出电压，在电流I不变和FPGA能正常工作的情况下，功耗P＝UI，
在温度较高而不影响所述FPGA芯片工作的情况下，尽可能地降低稳压器的输出电压可以降低FPGA的整体功耗。
附图说明
图1为本发明的整体流程框图。
图2为本发明的监测模块流程框图。
具体实施方式
本发明附图仅用于示例性说明，不能理解为对本发明的限制。为了更好说明以下实施例，附图某些部件会有省略、放大或缩小，并不代表实际产品的尺寸；对于本领域技术人员来说，附图中某些公知结构及其说明可能省略是可以理解的。
实施例1
如图1所示，一种低功耗的FPGA电路，其包括监测模块、稳压芯片及FPGA芯片，所述监测模块获取所述FPGA芯片的工作电压范围值、当前工作温度和当前工作电压，所述稳压芯片根据所述监测模块获取的信息调节其电压输出范围。
由于高速处理数据时FPGA的功耗会变的非常大，温度也相应的升高，影响FPGA工作的稳定性，对产品性能和甚至整个系统产生不良影响；本发明的低功耗设计方法主要是针对Intel系列FPGA提出的，本发明提出从电压控制方向来降低功耗，不同于以往的增加散热片或者风扇的方式，从FPGA本身特性来解决温度高、功耗大问题。只需简单的外围电路配合，有效的降低FPGA功耗，实现成本较低，提高产品稳定性。
如图2所示，优选的，所述监测模块包括
电压读取模块，用于读取所述FPGA芯片内部的工作电压范围值；
温度检测模块，检测FPGA的当前工作温度；
电压检测模块，检测FPGA的当前工作电压。
优选的，所述稳压芯片根据所述监测模块获取的信息对其进行判断及计算处理输出控制参数，根据所述稳压芯片的时序要求将所述控制参数写入稳压芯片，配置和控制稳压芯片的电压输出，所述稳压芯片阶段性降低 其电压输出范围。
优选的，所述稳压芯片根据所述监测模块获取的信息对其进行判断及计算处理输出控制参数，根据所述稳压芯片的时序要求将所述控制参数写入稳压芯片，配置和控制稳压芯片的电压输出，所述稳压芯片阶段性降低其电压输出范围。
优选的，所述电压读取模块获取所述FPGA的电压范围为FPGA芯片内部设定的电压范围：VL至VH，所述VL表示可以调节的最低电压，所述VH表示可以调节的最高电压。
优选的，当所述温度检测模块检测到温度超过40℃时，启动所述稳压芯片调节其输出范围，当所述温度检测模块检测到温度小于或者等于40℃时，维持所述稳压芯片的工作状态。
优选的，当所述温度检测模块检测到温度超过85度时，所述稳压芯片控制输出电压为VL。
优选的，所述稳压芯片通过限制电压输出范围中的最高值Vm调节电压输出范围。
优选的，当所述FPGA芯片的工作温度分为具有n个区间的温度范围，当所述温度检测模块获取当前的温度属于第i个区间时，
Figure PCTCN2020141694-appb-000002
当i＝n时，Vm＝VL。
优选的，每个温度区间范围为8～12℃。
具体的，所述电压读取模块读取的范围值为所述FPGA芯片可以正常工作的电压范围，所述监测模块把所述范围值转换成可识别的电压值数据，并把所述电压值数据传递给所述稳压芯片作处理；
所述温度检测模块主要是实时检测和监控所述FPGA芯片的当前工作温度数据，然后把所述温度数据转换成可识别的温度值，所述稳压芯片从所述FPGA芯片的工作温度可以判断芯片工作是否正常，并所述FPGA芯片当前的温度值传递给所述稳压芯片作处理；
所述电压检测模块主要是实时检测所述FPGA芯片的当前工作电压数据，从所述工作电压数据可以判断所述FPGA芯片的供电电压是否正常，并把所述供电电压传递给稳压芯片作处理；
所述稳压芯片调节模块接收上述三个模块传递过来的电压范围值、工作温度值和所述FPGA芯片当前工作电压值，对上述参数进行判断及计算处理后根据所述稳压芯片的时序要求把上述参数写入所述稳压芯片，配置和控制所述稳压芯片的电压输出，保证所述FPGA芯片能正常工作的情况下，降低所述稳压芯片的输出电压，根据公司功耗P＝UI，电压降低时，FPGA工作的总功耗也相应的降低。
具体的，对所述FPGA模块的温度检测模块检测的温度范围设置为40℃以上时，即所述
稳压芯片的调节功能启动温度为40℃，当所述温度区间为：10℃时，
温度在40℃以下时，所述稳压芯片维持当前工作状态；
温度在40～50℃时，配置所述稳压芯片的输出电压范围：VH-0.2*(VH-VL)～VL。
温度在50～60℃时，配置所述稳压芯片的输出电压范围：VH-0.4*(VH-VL)～VL。
温度在60～70℃时，配置所述稳压芯片的输出电压范围：VH-0.6* (VH-VL)～VL。
温度在70～80℃时，配置所述稳压芯片的输出电压范围：VH-0.8*(VH-VL)～VL。
温度在80℃以上时，配置所述稳压芯片的输出电压范围：VL。
具体的，对所述FPGA模块的温度检测模块检测的温度范围设置为40℃以上时，即所述稳压芯片的调节功能启动温度为40℃，当所述温度区间为：8℃时，
温度在40℃以下时，所述稳压芯片维持当前工作状态；
温度在40～48℃时，配置所述稳压芯片的输出电压范围：
Figure PCTCN2020141694-appb-000003
(VH-VL)～VL。
温度在48～56℃时，配置所述稳压芯片的输出电压范围：
Figure PCTCN2020141694-appb-000004
Figure PCTCN2020141694-appb-000005
温度在56～64℃时，配置所述稳压芯片的输出电压范围：
Figure PCTCN2020141694-appb-000006
Figure PCTCN2020141694-appb-000007
温度在64～72℃时，配置所述稳压芯片的输出电压范围：
Figure PCTCN2020141694-appb-000008
Figure PCTCN2020141694-appb-000009
温度在72～80℃时，配置所述稳压芯片的输出电压范围：
Figure PCTCN2020141694-appb-000010
Figure PCTCN2020141694-appb-000011
温度在80℃以上时，配置所述稳压芯片的输出电压范围：VL。
本发明需要简单的外围电路和芯片与FPGA配合达到降低FPGA功耗的目的。电源经过外部稳压器供电给FPGA，FPGA经过内部处理控制稳压芯片，实时调节稳压芯片的输出电压，在电流I不变和FPGA能正常工 作的情况下，功耗P＝UI，在温度较高而不影响所述FPGA芯片工作的情况下，尽可能地降低稳压器的输出电压可以降低FPGA的整体功耗。
显然，本发明的上述实施例仅仅是为清楚地说明本发明技术方案所作的举例，而并非是对本发明的具体实施方式的限定。凡在本发明权利要求书的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明权利要求的保护范围之内。

Claims (9)

  1. 一种低功耗的FPGA电路，其特征在于，包括监测模块、稳压芯片及FPGA芯片，所述监测模块获取所述FPGA芯片的工作电压范围值、当前工作温度和当前工作电压，所述稳压芯片根据所述监测模块获取的信息调节其电压输出范围。
  2. 根据权利要求1所述的一种低功耗的FPGA电路，其特征在于，所述监测模块包括
    电压读取模块，用于读取所述FPGA芯片内部的工作电压范围值；
    温度检测模块，检测FPGA的当前工作温度；
    电压检测模块，检测FPGA的当前工作电压。
  3. 根据权利要求1所述的一种低功耗的FPGA电路，其特征在于，所述稳压芯片根据所述监测模块获取的信息对其进行判断及计算处理输出控制参数，根据所述稳压芯片的时序要求将所述控制参数写入稳压芯片，配置和控制稳压芯片的电压输出，所述稳压芯片阶段性降低其电压输出范围。
  4. 根据权利要求2所述的一种低功耗的FPGA电路，其特征在于，所述电压读取模块获取所述FPGA的电压范围为FPGA芯片内部设定的电压范围：VL至VH，所述VL表示可以调节的最低电压，所述VH表示可以调节的最高电压。
  5. 根据权利要求4所述的一种低功耗的FPGA电路，其特征在于，当所述温度检测模块检测到温度超过40℃时，启动所述稳压芯片调节其输出范围，当所述温度检测模块检测到温度小于或者等于40℃时，维持所述稳压芯片的工作状态。
  6. 根据权利要求5所述的一种低功耗的FPGA电路，其特征在于，当所述温度检测模块检测到温度在85～90℃时，所述稳压芯片控制输出电压为VL。
  7. 根据权利要求6所述的一种低功耗的FPGA电路，其特征在于，所述稳压芯片通过限制电压输出范围中的最高值Vm调节电压输出范围。
  8. 根据权利要求7所述的一种低功耗的FPGA电路，其特征在于，当所述FPGA芯片的工作温度分为具有n个区间的温度范围，当所述温度检测模块获取当前的温度属于第i个区间时，
    Figure PCTCN2020141694-appb-100001
    当i＝n时，Vm＝VL。
  9. 根据权利要求8所述的一种低功耗的FPGA电路，其特征在于，每个区间的温度范围为8～12℃。
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