WO2022111089A1 - 电平转换电路、显示面板的驱动电路及显示装置 - Google Patents
电平转换电路、显示面板的驱动电路及显示装置 Download PDFInfo
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/041—Temperature compensation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Definitions
- the present disclosure relates to the field of display technology, and in particular, to a level conversion circuit, a drive circuit of a display panel, and a display device.
- the gate driver on array (GOA) technology of an array substrate is a technology that integrates a gate driver circuit on an array substrate, and a circuit integrated with the GOA technology is also called a GOA circuit.
- the GOA circuit can be respectively connected to a plurality of signal terminals (eg, a clock signal terminal and an AC power terminal), and the plurality of signal terminals can be connected to a level conversion circuit.
- the level shifting circuit can provide a signal to each signal terminal, and the GOA circuit can work under the driving of the signal from each signal terminal.
- the high level or the low level provided by the level conversion circuit to each signal terminal is the same.
- the present disclosure provides a level conversion circuit, a driving circuit of a display panel and a display device.
- the technical solution at least includes the following contents:
- a level conversion circuit includes:
- each of the first switch sub-circuits is respectively connected to at least one input control terminal of the plurality of input control terminals and at least one of the level conversion sub-circuits; each of the first switches The sub-circuit is used for providing the input control signal provided by each of the connected input control terminals to the connected level conversion sub-circuit in response to the first switch control signal;
- Each of the level conversion sub-circuits is further connected to at least one first power supply terminal, at least one second power supply terminal, and at least one of the output signal terminals, and each of the output signal terminals is further for connecting with a gate drive circuit; each of the level conversion sub-circuits is used for transmitting a first power supply terminal to each of the connected output signal terminals in response to the received input control signal the first power supply signal provided, or, transmitting a second power supply signal provided by the second power supply terminal;
- the level of the first power supply signal provided by the first power supply terminal connected to each of the level conversion subcircuits is different, and each of the level conversion subcircuits has different levels.
- the levels of the second power supply signals provided by the connected second power supply terminals are different.
- each of the first switch sub-circuits includes: a plurality of first switches
- the control terminal of each of the first switches is used to receive the first switch control signal, the first terminal of each of the first switches is connected to one of the input control terminals, and the first terminal of each of the first switches is connected to one of the input control terminals.
- the two terminals are connected to one of the level conversion subcircuits.
- the number of the first switches included in each of the first switch sub-circuits is the same as the number of the plurality of input control terminals, and each of the first switches and each of the input control terminals is one by one. corresponding connection.
- the level conversion circuit includes: a plurality of the first switch sub-circuits
- Each of the first switch subcircuits is respectively connected to the plurality of input control terminals and one of the level conversion subcircuits, and each of the level conversion subcircuits is connected to the plurality of output signal terminals.
- each of the level conversion sub-circuits is respectively connected to a plurality of first power supply terminals and a second power supply terminal;
- the level conversion circuit further includes: a switch control sub-circuit and at least two second power supply terminals a switch subcircuit, and the number of the second switch subcircuits included in the level conversion circuit is the same as that of the level conversion subcircuit;
- the switch control subcircuit is connected to each of the second switch subcircuits, and the switch control subcircuit is used for transmitting a second switch control signal to each of the second switch subcircuits;
- Each of the second switch sub-circuits is further connected to a plurality of first initial power terminals and the plurality of first power terminals, respectively, and the plurality of first initial power terminals and the plurality of first power terminals are connected one by one.
- each of the second switch sub-circuits is configured to transmit a first initial power supply signal provided by one of the first initial power supply terminals to a corresponding one of the first power supply terminals in response to the second switch control signal ;
- the level of the first initial power signal provided by each of the first initial power terminals is different.
- the switch control subcircuit comprises: a temperature detection secondary circuit and a switch control secondary circuit;
- the temperature detection secondary circuit is connected to the switch control secondary circuit, and the temperature detection secondary circuit is configured to transmit an initial control signal to the switch control secondary circuit based on the detected temperature;
- the switch control secondary circuit is connected to each of the second switch sub-circuits, the switch control sub-circuit for transmitting a second switch control to each of the second switch sub-circuits based on the initial control signal Signal.
- the temperature detection secondary circuit comprises: a thermistor, a first resistor and a capacitor;
- the switch control secondary circuit comprises: a current source, a second resistor and a third resistor;
- One end of the thermistor and one end of the capacitor are both connected to the first DC power terminal, the other end of the thermistor is connected to the first node, and the other end of the capacitor is connected to the second DC power terminal ;
- One end of the first resistor is connected to the first node, and the other end of the first resistor is connected to the second DC power supply end;
- the current source is respectively connected to the first node and one end of the second resistor, and the other end of the second resistor is connected to the second node;
- One end of the third resistor is connected to the second node, the other end of the third resistor is connected to the second DC power source, and the second node is connected to each of the second switch sub-circuits .
- each of the second switch sub-circuits includes: a plurality of second switches
- the control terminal of each of the second switches is connected to the switch control sub-circuit, the first terminal of each of the second switches is connected to one of the first initial power terminals, and the first terminal of each of the second switches is connected to the first initial power supply terminal.
- the two terminals are connected to one of the first power terminals.
- each of the level shifting sub-circuits is connected to two of the first power supply terminals; each of the second switching sub-circuits is connected to two of the first initial power supply terminals; and each The second switch subcircuit includes: two of the second switches.
- the level shifting circuit further includes: at least two amplifying sub-circuits, and the number of the amplifying sub-circuits included in the level shifting circuit is the same as the number of the level shifting sub-circuits;
- each of the amplifying sub-circuits is connected to one of the two first initial power supply terminals, and the output terminal of each of the amplifying sub-circuits is connected to two of the first initial power supply terminals.
- the other one of the power supply terminals is connected to the first initial power supply terminal; each of the amplifying sub-circuits is used to amplify the first initial power supply signal provided by one of the first initial power supply terminals, and then transmit it to the other first initial power supply terminal. an initial power supply terminal.
- each of the amplifying sub-circuits includes: an amplifier, a fourth resistor, and a fifth resistor;
- the positive input terminal of the amplifier is connected to one of the first initial power supply terminals, and the negative input terminal of the amplifier is respectively connected to one end of the fourth resistor and one end of the fifth resistor.
- the output terminal is connected to another first initial power supply terminal;
- the other end of the fourth resistor is connected to the second DC power supply end
- the other end of the fifth resistor is connected to the output end of the amplifier.
- the level conversion circuit further comprises: an inverting sub-circuit
- the inverting sub-circuit is respectively connected to the plurality of input control terminals and each of the first switch sub-circuits, and the inverting sub-circuit is used to invert the input control signal provided by each of the input control terminals Then, it is transmitted to each of the first switching sub-circuits.
- the inverting sub-circuit includes: a plurality of NOT gates
- An input terminal of each of the NOT gates is connected to one of the input control terminals, and an output terminal of each of the NOT gates is connected to a first terminal of a first switch included in each of the first switch sub-circuits.
- the level shifting circuit includes: two of the level shifting subcircuits.
- the level shifting circuit includes: two of the first switching subcircuits.
- each of the level shifting sub-circuits includes: a first transistor and a second transistor;
- the gate of the first transistor is connected to the first switch sub-circuit, the first pole of the first transistor is connected to at least one of the first power supply terminals, and the second pole of the first transistor is connected to at least one of the first power supply terminals.
- the output signal terminal is connected;
- the gate of the second transistor is connected to the first switch sub-circuit, the first pole of the second transistor is connected to at least one of the second power supply terminals, and the second pole of the second transistor is connected to at least one of the second power supply terminals.
- the output signal terminal is connected.
- a drive circuit of a display panel includes: a gate drive circuit, and the level conversion circuit according to the above aspect;
- the level conversion circuit is connected to the gate driving circuit, the level conversion circuit is used for providing a driving signal to the gate driving circuit, and the gate driving circuit is used for work under drive.
- the material of the transistor included in the gate driving circuit is a metal oxide semiconductor material.
- a display device comprising: a display panel, and the drive circuit of the display panel according to the above aspect;
- the drive circuit of the display panel is connected to the display panel, and the drive circuit of the display panel is used to drive the display panel to display.
- FIG. 1 is a schematic structural diagram of a level conversion circuit in the related art
- FIG. 2 is a schematic structural diagram of a level conversion circuit provided by an embodiment of the present disclosure
- FIG. 3 is a schematic structural diagram of another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 4 is a schematic structural diagram of another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 5 is a schematic structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 6 is a schematic structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 7 is a schematic partial structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 8 is a partial structural schematic diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 9 is a schematic partial structure diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 10 is a partial structural schematic diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 11 is a partial structural schematic diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 12 is a partial structural schematic diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- FIG. 13 is a schematic diagram of a change curve of a resistance ratio with temperature provided by an embodiment of the present disclosure
- FIG. 14 is a schematic structural diagram of a drive circuit of a display panel provided by an embodiment of the present disclosure.
- FIG. 15 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
- FIG. 1 is a structural diagram of a level conversion circuit in the related art. As shown in FIG. 1 , one end of the level conversion circuit is connected to the input end INPUT, and the other end is connected to the output end OUTPUT, and the OUTPUT can be connected to each signal end of the GOA circuit. In addition, the level of the high-level signal transmitted to OUTPUT by the level conversion circuit is only VGH, and the level of the low-level signal is only VGL.
- the GOA circuit drives the display panel under the drive of the signal provided by the level conversion circuit, the display panel is prone to display abnormal display (AD). A defective phenomenon, thereby resulting in poor reliability of the product (ie, the display device).
- an embodiment of the present disclosure provides a new level conversion circuit to provide signals for each signal terminal of the GOA circuit. After testing, it is found that the use of this level conversion circuit to provide signals for the GOA circuit can effectively solve the AD phenomenon that occurs in the display panel at high temperature and low temperature in the related art. It can be determined that the reliability of products using this level conversion circuit is better. .
- FIG. 2 is a schematic structural diagram of a level conversion circuit provided by an embodiment of the present disclosure.
- the level conversion circuit may include: at least two level conversion sub-circuits 10 and at least one first switch sub-circuit 20 .
- each of the first switch sub-circuits 20 may be respectively connected to at least one input control terminal of the plurality of input control terminals and to at least one level conversion sub-circuit 10 .
- Each of the first switch sub-circuits 20 may be configured to provide an input control signal provided by each of the connected input control terminals to the connected level shift sub-circuit 10 in response to the first switch control signal.
- the shown level shift circuit includes: two level shift sub-circuits 10 and two first switch sub-circuits 20 , and each first switch sub-circuit 20 is connected to a plurality of input control circuits
- the terminals INPUT_1 to INPUT_N are connected with a level conversion sub-circuit 10, and N is a positive integer greater than 1.
- Each first switch sub-circuit 20 can provide the input control signal provided by each connected input control terminal to the connected level conversion sub-circuit when the level of the received first switch control signal is an active level 10. In this way, the input control signal received by each level conversion sub-circuit 10 can be adjusted by flexibly setting the first switch control signal.
- the first switch control signal may be provided by a power management integrated circuit (PMIC). That is, each of the first switch sub-circuits 20 may also be connected to the PMIC and receive the first switch control signal transmitted by the PMIC.
- PMIC power management integrated circuit
- Each level conversion sub-circuit 10 may also be connected to at least one first power supply terminal, at least one second power supply terminal, and at least one output signal terminal among the plurality of output signal terminals, respectively. Each output signal terminal can also be used to connect with a gate drive circuit (ie, a GOA circuit). Each level conversion sub-circuit 10 may be configured to transmit a first power signal provided by a first power terminal to each connected output signal terminal, or transmit a second power terminal, in response to the received input control signal provided second power signal.
- a gate drive circuit ie, a GOA circuit
- the number of output signal terminals and the number of input control terminals may be the same and correspond one-to-one. That is, as shown in FIG. 2 , the level conversion circuit may include N input control terminals INPUT_1 to INPUT_N, and N output signal terminals OUTPUT_1 to OUTPUT_N corresponding to the N input control terminals INPUT_1 to INPUT_N one-to-one.
- the level of the first power supply signal provided by the first power supply terminal connected to each level conversion sub-circuit 10 may be different, and the power level of the second power supply signal provided by the second power supply terminal connected to each level conversion subcircuit 10 Flat can be different.
- one level conversion sub-circuit 10 (hereinafter referred to as the first level conversion sub-circuit 10 in the following embodiments) is respectively connected to a first power supply terminal VGH1_O, a second power terminal VGL1_O and a plurality of output signal terminals OUTPUT_1 to OUTPUT_N are connected.
- Another level conversion sub-circuit 10 (hereinafter referred to as the second level conversion sub-circuit 10) is respectively connected to a first power supply terminal VGH2_O, a second power supply terminal VGL2_O and a plurality of output signal terminals OUTPUT_1 to OUTPUT_N.
- the level of the first power signal provided by the first power terminal VGH1_O is different from the level of the first power signal provided by the first power terminal VGH2_O, and the level of the second power signal provided by the second power terminal VGL1_O is different from that of the second power terminal.
- the levels of the second power signals provided by VGL2_O are different.
- each level conversion sub-circuit 10 can transmit the first power supply provided by one of the connected first power supply terminals to each of the connected output signal terminals when the received input control signal level is the first level Signal. And when the level of the received input control signal is the second level, the second power supply signal provided by one of the connected second power supply terminals can be transmitted to each of the connected output signal terminals.
- the first level conversion sub-circuit 10 can transmit the first power to each output signal terminal when the level of the received input control signal is the first level
- the first power signal provided by the terminal VGH1_O, and the second power signal provided by the second power terminal VGL1_O can be transmitted to each output signal terminal when the level of the received input control signal is the second level. The same is true for the second level conversion sub-circuit 10, and details are not repeated here.
- one level may be a high level
- the other level may be a low level
- both the two levels may be valid levels.
- the level of one power supply signal may be a high level
- the level of the other power supply signal may be a low level. In this way, not only a low-level signal and a high-level signal can be provided to the GOA circuit, but also a first power supply signal with different high levels can be provided to the GOA circuit, and a first power supply signal with different low levels can be provided to the GOA circuit.
- each output signal terminal of the level conversion circuit described in the embodiments of the present disclosure may be used to connect to different signal terminals of the GOA circuit.
- the clock signal terminal CLK the turn-on signal terminal STV, the reset signal terminal RST or the AC power terminal V1.
- the level conversion circuit it can be known that using the level conversion circuit, it can be realized to provide different high-level signals or low-level signals for different signal terminals connected to the GOA circuit.
- the AD phenomenon of the display panel at high and low temperatures can be effectively solved, thereby reliably improving product reliability. , to ensure a better display effect.
- the embodiments of the present disclosure provide a level conversion circuit
- the level conversion circuit includes at least one first switch sub-circuit and at least two level conversion sub-circuits.
- each first switch subcircuit can control each level conversion subcircuit to transmit the first power supply signal or the second power supply signal to the gate driving circuit, and the electrical power of the first power supply signal provided by each level conversion subcircuit is If the level is different, the level of the second power supply signal provided is different. Therefore, it is possible to provide the first power supply signal and the second power supply signal of different levels for different signal terminals connected to the gate driving circuit, thereby improving product reliability and better display effect of the display panel.
- FIG. 3 is a schematic structural diagram of another level conversion circuit provided by an embodiment of the present disclosure.
- each first switch sub-circuit 20 may include: a plurality of first switches K1 .
- each first switch K1 can be used to receive the first switch control signal, the first terminal of each first switch K1 can be connected to an input control terminal, and the second terminal of each first switch K1 can be connected to an input control terminal. Connected to a level shift subcircuit 10 .
- the first terminals of the respective first switches K1 of each of the first switch sub-circuits 20 shown therein are respectively connected to the input control terminals INPUT1_1 to INPUT_N.
- the second terminals of each first switch K1 in one first switch sub-circuit 20 are connected to the first level conversion sub-circuit 10, and the second terminals of each first switch K1 in the other first switch sub-circuit 20 are connected to each other. to the second level shifting subcircuit 10 .
- each first switch sub-circuit 20 is: for each first switch K1 , if the first switch K1 If the level of the first switch control signal received by the control end of the switch K1 is an active level, the first end and the second end of the first switch K1 are conductive.
- the input control signal provided by the input control terminal connected to the first end of the first switch K1 can be further transmitted through the first switch K1 to the level conversion connected to the second end of the first switch K1.
- the level of the first switch control signal received by the control end of the first switch K1 is an invalid level, the first end and the second end of the first switch K1 are disconnected, and the first end of the first switch K1 is disconnected.
- the input control signal provided by the input control terminal connected to the first terminal cannot be further transmitted to the level conversion sub-circuit 10 connected to the second terminal.
- the first switch K1 connected to the input control terminal INPUT_1 and the first level conversion sub-circuit 10
- the control terminal of the first switch K1 receives a first switch control signal of an active level
- the first switch K1 The first terminal and the second terminal of the switch K1 are turned on.
- the input control signal provided by the input control terminal INPUT_1 can be transmitted to the first level conversion sub-circuit 10 through the first switch K1 .
- each voltage can be preset.
- the level conversion sub-circuits 10 follow different first switch sub-circuits 20 to work, that is, each level conversion sub-circuit 10 is set to work in response to signals transmitted by different first switch sub-circuits 20 .
- the levels of the first switch control signals provided to the first switches K1 connected to the same input control terminal in different first switch sub-circuits 20 may be controlled to be different.
- the number of the first switches K1 included in each first switch sub-circuit 20 may be the same as the number of the plurality of input control terminals. In this way, under the premise of ensuring that the input control signals provided by each input control terminal are reliably transmitted to the level conversion sub-circuit 10, problems such as larger circuit area and higher cost due to the arrangement of more first switches can be avoided.
- the number of the first switches K1 may also be greater than the number of the input control terminals.
- FIG. 4 is a schematic structural diagram of yet another level conversion circuit provided by an embodiment of the present disclosure. As shown in FIG. 4 , the level conversion circuit may further include: an inverting sub-circuit 30 .
- the inverting sub-circuit 30 may be respectively connected to a plurality of input control terminals INPUT_1 to INPUT_N and each of the first switching sub-circuits 20 .
- the inverter sub-circuit 30 may be connected to the first terminal of each first switch K1 in each of the first switch sub-circuits 20 .
- the inverting sub-circuit 30 can be used to invert the input control signal provided by each input control terminal and transmit it to each of the first switching sub-circuits 20 .
- the inversion sub-circuit 30 may invert the input control signal of the first level to the second level, and then transmit it to each of the first switch sub-circuits 20 .
- the inversion sub-circuit 30 may invert the input control signal of the second level to the first level, and then transmit it to each of the first switch sub-circuits 20 . In this way, the stability of signal transmission can be ensured, so that the level of the signal finally transmitted to the output signal terminal is consistent with the level of the input control signal provided by the input control terminal.
- FIG. 5 is a schematic structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- the inverting sub-circuit 30 may include: a plurality of NOT gates 301 .
- each NOT gate 301 may be connected to an input control terminal, and an output terminal of each NOT gate 301 may be connected to a first terminal of a first switch K1 included in each first switch sub-circuit 20 .
- the number of the NOT gates 301 included in the inversion sub-circuit 30 may be the same as the number of the input control terminals.
- the number of NOT gates 301 may also be smaller or larger than the number of input control terminals, which is not limited in this embodiment of the present disclosure.
- each level conversion sub-circuit 10 provided by the application may be respectively connected to a plurality of first power supply terminals and a second power supply terminal.
- the first level shifting sub-circuit 10 shown can be connected to two first power supply terminals VGH1_O and VGH3_O, and one second power supply terminal VGL1_O, respectively.
- the second level conversion sub-circuit 10 may be connected to two first power terminals VGH2_O and VGH4_O, and one second power terminal VGL2_O, respectively.
- the following embodiments are described with the structure of the level conversion circuit shown in FIG. 6 .
- each level conversion sub-circuit 10 may include: a first transistor Q1 and a second transistor Q2.
- the gate of the first transistor Q1 may be connected to the first switching sub-circuit 20, the first pole of the first transistor Q1 may be connected to at least one first power supply terminal, and the second pole of the first transistor Q1 may be connected to at least one output signal terminal connect.
- the gate of the second transistor Q2 may be connected to the first switching sub-circuit 20, the first pole of the second transistor Q2 may be connected to at least one second power supply terminal, and the second pole of the second transistor Q2 may be connected to at least one output signal terminal connect.
- each first transistor Q1 can be connected to the second terminal of the first switch K1, and in the first level conversion sub-circuit 10, the first pole of the first transistor Q1 can be Connected to the two first power supply terminals VGH1_O and VGH3_O, the first pole of the second transistor Q2 may be connected to a second power supply terminal VGL1_O, and the second pole of the first transistor Q1 and the second pole of the second transistor Q2 are both connected to A plurality of output signal terminals OUTPUT_1 to OUTPUT_N are connected.
- the first pole of the first transistor Q1 can be connected to two first power supply terminals VGH2_O and VGH4_O
- the first pole of the second transistor Q2 can be connected to a second power supply terminal VGL2_O
- the second pole of the first transistor Q1 and the second pole of the second transistor Q2 are both connected to the plurality of output signal terminals OUTPUT_1 to OUTPUT_N.
- each level conversion sub-circuit 10 may be different.
- one transistor may be an N-type transistor and the other transistor may be a P-type transistor.
- the active level can be high, and for P-type transistors, the active level can be low.
- the working principle of the level conversion sub-circuit 10 is:
- the first transistor Q1 is an N-type transistor
- the second transistor Q2 is a P-type transistor.
- the first level conversion sub-circuit 10 when the level of the received input control signal is a high level, the first transistor Q1 included therein can be turned on, and the second transistor Q2 can be turned off.
- the first power supply signal provided by any one of the two first power supply terminals VGH1_O and VGH3_O can be transmitted to the output signal terminal through the first transistor Q1.
- the first transistor Q1 included therein can be turned off, and the second transistor Q2 can be turned on.
- the second power supply signal provided by the second power supply terminal VGL1_O can be transmitted to the output signal terminal through the second transistor Q2.
- the same is true for the second level conversion sub-circuit 10, which is not repeated here.
- a combined test can be performed on the levels of the signals provided by different signal terminals connected to the GOA circuit, and different levels can be flexibly provided to each of the first switch sub-circuits 20 according to the test results.
- the first switch control signal so that the level of the signal finally transmitted to each signal terminal can ensure good product reliability.
- K1_1 represents the first switch K1 in the first switch subcircuit 20 connected to the first level conversion subcircuit 10
- K1_2 represents the first switch K1 connected to the second level conversion subcircuit 10
- 0 indicates an active level
- 1 indicates an inactive level
- ⁇ indicates no transmission
- ⁇ indicates Take transmission as an example.
- Table 1 below shows a determined signal truth table:
- INPUT_3 0/1 ⁇ ⁇ ... ... ... ... INPUT_N 1/0 ⁇ ⁇
- the first switch control signal provided by each of the first switches K1_1 connected to the input control terminals INPUT_1 to INPUT_3 The level of the inactive level is the inactive level, and the level of the first switch control signal provided by the first switch K1_1 connected to the input control terminal INPUT_N is the active level.
- the first level conversion sub-circuit 1 can transmit the first power signal provided by the first power terminal VGH1_O to the connected output signal terminal based on the input control signal provided by the input control terminal INPUT_N, or transmit the second power terminal VGL1_O provided second power signal.
- the first switch K1_2 connected to the input control terminals INPUT_1 to INPUT_3 provides the first switch K1_2.
- the level of the switch control signal is an active level
- the level of the first switch control signal provided by the first switch K1_2 connected to the input control terminal INPUT_N is an inactive level.
- the second level conversion sub-circuit 1 can transmit the first power supply signal provided by the first power supply terminal VGH2_O to the connected output signal terminal, or transmit the second power supply signal based on the input control signals provided by the input control terminals INPUT_1 to INPUT_3 The second power signal provided by the power terminal VGL2_O.
- the first switch control signal can be provided to each of the first switches K1 through the PMIC according to the above Table 1.
- Table 1 only schematically shows a combination in some embodiments. When used, a combination with a better effect of improving reliability can be determined based on the structures or materials of different GOA circuits. This embodiment of the present disclosure does not limit this.
- FIG. 7 shows yet another level conversion circuit.
- the level conversion circuit may further include: a switch control sub-circuit 40 and at least two second switch sub-circuits 50 .
- the number of the second switch sub-circuits 50 is the same as the number of the level conversion sub-circuits 10 .
- FIG. 7 shows a total of two first switch sub-circuits 50 .
- the switch control sub-circuit 40 may be connected to each of the second switch sub-circuits 50 .
- the switch control subcircuit 40 may be used to transmit a second switch control signal to each of the second switch subcircuits 50 .
- Each second switch sub-circuit 50 may also be connected to a plurality of first initial power terminals and a plurality of first power terminals, respectively, and the plurality of first initial power terminals and the plurality of first power terminals correspond one-to-one. That is, the number of the first initial power supply terminals connected to each second switch subcircuit 50 is the same as the number of the first power supply terminals connected to each level conversion subcircuit 10 .
- Each of the second switch sub-circuits can be configured to transmit a first initial power signal provided by a first initial power terminal to a corresponding one of the first power terminals in response to the second switch control signal.
- the level of the first initial power signal provided by each of the first initial power terminals may be different.
- one level conversion sub-circuit 10 can be enabled to transmit the first power supply signals of different levels to the output signal terminal.
- each level conversion sub-circuit 10 is connected to two first power supply terminals.
- each of the second switch sub-circuits 50 may be respectively connected to two first initial power supply terminals.
- a second switch sub-circuit 50 shown is connected to the first initial power supply terminals VGH1 and VGH3, VGH1 may correspond to VGH1_O, and VGH3 may correspond to VGH3_O.
- Another second switch sub-circuit 50 is connected to the first initial power supply terminals VGH2 and VGH4, VGH2 may correspond to VGH2_O, and VGH4 may correspond to VGH4_O.
- Each second switch sub-circuit 50 can transmit the first initial power signal provided by one of the first initial power terminals to which it is connected to the corresponding one when the level of the received second switch control signal is an active level. the first power terminal.
- FIG. 8 is a schematic structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- each second switch sub-circuit 50 may include: a plurality of second switches K2.
- each second switch K2 can be connected to the switch control sub-circuit 40, the first terminal of each second switch K2 can be connected to a first initial power terminal, and the second terminal of each second switch K2 Can be connected to a first power terminal.
- the first terminal and the second terminal of the second switch K2 can be turned on. Furthermore, the first initial power supply signal provided by the first initial power supply terminal connected to the first terminal of the second switch K2 can be transmitted to the first power supply connected to the second terminal of the second switch K2 through the second switch end.
- each second switch subcircuit 50 in order to enable each second switch subcircuit 50 to reliably transmit an initial power supply signal provided by an initial power supply terminal, two second switches in each second switch subcircuit 50
- the type of K2 can be different. That is, one second switch K2 may be turned on in response to a low-level second control signal, and one second switch K2 may be turned on in response to a high-level second control signal.
- each second switch sub-circuit 50 is connected to two first initial power terminals in total.
- the level conversion circuit may further include: at least two amplifying sub-circuits 60, and the number of the amplifying sub-circuits 60 included in the level conversion circuit may be the same as the number of the level conversion sub-circuits 10.
- FIG. 9 shows a total of two amplifier sub-circuits 60 .
- each amplifying sub-circuit 60 may be connected to one of the two first initial power supply terminals, and the output terminal of each amplifying sub-circuit 60 may be connected to one of the two first initial power supply terminals. Another first initial power supply terminal is connected.
- Each amplifying sub-circuit 60 can be used to amplify the first initial power supply signal provided by one first initial power supply terminal, and then transmit it to another first initial power supply terminal.
- two amplifier subcircuits 60 are shown.
- the input terminal of one amplifier sub-circuit 60 is connected to the first initial power supply terminal VGH1, and the output terminal is connected to the first initial power supply terminal VGH3.
- the amplifying sub-circuit 60 can amplify the first power supply signal provided by the first initial power supply terminal VGH1 and transmit it to the first initial power supply terminal VGH3.
- the level of the first power supply terminal VGH3_O connected to the first level conversion sub-circuit 10 may be higher than the level of VGH1_O.
- the input terminal of the other amplifying sub-circuit 60 is connected to the first initial power supply terminal VGH2, and the output terminal is connected to the first initial power supply terminal VGH4.
- the amplifying sub-circuit 60 can amplify the first power supply signal provided by the first initial power supply terminal VGH2 and transmit it to the first initial power supply terminal VGH4.
- the level of the first power supply terminal VGH4_O connected to the second level conversion sub-circuit 10 may be higher than the level of VGH2_O.
- each amplifying sub-circuit 60 may include: an amplifier A1 , a fourth resistor R4 and a fifth resistor R5 .
- the positive input terminal of the amplifier A1 can be connected to a first initial power supply terminal (eg, VGH1), and the negative input terminal of the amplifier A1 can be connected to one end of the fourth resistor R4 and one end of the fifth resistor R5 respectively.
- the output terminal of A1 can be connected to another first initial power terminal (eg, VGH3).
- the other end of the fourth resistor R4 may be connected to the second DC power supply terminal VSS, and the other end of the fifth resistor R5 may be connected to the output end of the amplifier A1.
- the second DC power terminal VSS may be a ground terminal.
- the first initial power signal transmitted to the level conversion sub-circuit may be further controlled based on the ambient temperature. That is, with reference to FIG. 10 , whether the second switch sub-circuit 50 transmits the first initial power supply signal provided by the first initial power supply terminal VGH1 to the first level conversion sub-circuit 10 can be further set based on the ambient temperature, or whether to The first initial power supply signal provided by the initial power supply terminal VGH3 is transmitted to the first level conversion sub-circuit 10 . The same is true for the second level conversion subcircuit 10 . In order to make the temperature lower, it is ensured that the power supply signal that can effectively turn on the transistor in the GOA circuit can be output.
- FIG. 11 shows a schematic structural diagram of yet another level conversion circuit.
- the switch control subcircuit 40 in the level conversion circuit may include: a temperature detection secondary circuit 401 and a switch control secondary circuit 402 .
- the temperature detection secondary circuit 401 may be connected to the switch control secondary circuit 402 .
- the temperature detection secondary circuit 401 may be used to transmit an initial control signal to the switch control secondary circuit 402 based on the detected temperature.
- a switch control secondary circuit 402 may be connected to each of the second switch subcircuits 50 .
- the switch control subcircuit 402 may be used to transmit a second switch control signal to each of the second switch subcircuits 50 based on the initial control signal.
- the switch control sub-circuit 40 may detect the temperature, and flexibly provide the second control signal to the second switch sub-circuit 50 based on the detected temperature.
- FIG. 12 is a schematic structural diagram of still another level conversion circuit provided by an embodiment of the present disclosure.
- the temperature detection secondary circuit 401 may include: a thermistor R0 , a first resistor R1 and a capacitor C1 .
- the switch control secondary circuit 402 may include a current source IS, a second resistor R2 and a third resistor R3.
- One end of the thermistor R0 and one end of the capacitor C1 can both be connected to the first DC power supply terminal VCC, the other end of the thermistor R0 can be connected to the first node P1, and the other end of the capacitor C1 can be connected to the second DC power supply Power supply connection.
- the second DC power terminal shown in FIG. 12 is the ground terminal GND.
- One end of the first resistor R1 may be connected to the first node P1, and the other end of the first resistor R1 may be connected to the second DC power supply terminal VSS.
- the current source IS may be connected to the first node P1 and one end of the second resistor R2, respectively, and the other end of the second resistor R2 may be connected to the second node P2.
- One end of the third resistor R3 may be connected to the second node P2, the other end of the third resistor R3 may be connected to the second DC power supply terminal VSS, and the second node P2 may be connected to each of the second switch sub-circuits 50.
- the thermistor R0 may be a positive temperature sensitive resistor with a lower resistance value as the temperature is lower.
- the switch control sub-circuit shown in FIG. 12 it can be seen that, assuming that the level of the first DC power supply terminal VCC is marked as Vcc, the resistance value of the thermistor R0 is marked as r0, the resistance value of the first resistor R1 is marked as r1, and the second resistance value is marked as r1.
- the resistance value of the resistor R2 is identified as r2. Then it can be determined that the level of the first node P1 can satisfy:
- the flexible control of the levels of the first node P1 and the second node P2 can be realized by selecting the appropriate thermistor R0 and the first resistor R1.
- r0/r1 shown in FIG. 13 and the curve with temperature
- r0 can be made to satisfy: r0 ⁇ 50*r1 to 20*r1.
- r0 can be made to satisfy: r0 ⁇ r1/10.
- the abscissa represents the temperature in degrees Celsius (° C.)
- the ordinate represents the value of r0/r1.
- a higher level first initial power supply signal can be provided to the level conversion sub-circuit at low temperatures.
- a lower level first initial power supply signal can be provided to the level conversion sub-circuit.
- the level of the second node P2 can be flexibly adjusted through the temperature detection secondary circuit 401 to adjust the level of the second switch control signal. It is realized that different second switches K2 in each second switch sub-circuit 50 are controlled to be turned on at different temperatures.
- the level of the first initial power supply signal VGH1 is lower than that of the first initial power supply signal VGH3 and the level of the first initial power supply signal VGH2 is lower than that of the first initial power supply signal VGH4 as described in the above embodiment.
- the second switch K2 connected to the first initial power signal VGH1 and the first initial power signal VGH2 is turned on when the second switch control signal of the low level is turned on, and is connected to the first initial power signal VGH3 and the first initial power signal VGH4.
- the second switch K2 is turned on when the second switch control signal is at a high level.
- the temperature detection secondary circuit 401 can control the level of the second node P2 to be high, and when the temperature is high or normal temperature, the temperature detection secondary circuit 401 can control the level of the second node P2 to be low. flat. Therefore, at low temperature, the level of the first initial power supply signal transmitted to the level conversion sub-circuit can be made higher than the level of the first initial power supply signal transmitted to the level conversion sub-circuit at high temperature and normal temperature. big. As an example, Table 2 shows the output relationship table at different temperatures:
- each level conversion sub-circuit 10 can transmit the first power supply signals VGH3_O and VGH4_O of higher level to the output signal terminal.
- each level conversion sub-circuit 10 can transmit the first power supply signals VGH1_O and VGH2_O of lower level to the output signal terminal.
- the level conversion circuit 01 described in the embodiments of the present disclosure may be a circuit fabricated on a flexible or printed circuit board. Moreover, the level conversion circuit 01 will not affect the wiring space of the GOA circuit, and will not increase the frame width of the product. Moreover, the level conversion circuit provided by the embodiments of the present disclosure can not only provide signals of different high levels and signals of different low levels to different signal terminals connected to the GOA circuit. Furthermore, it is also possible to flexibly adjust the level of the signal output to the GOA circuit based on the ambient temperature. In this way, the problem of poor product reliability can be effectively improved.
- the level conversion circuit provided by the embodiments of the present disclosure can be applied to GOA circuit products of thin film transistors (thin film transistors, TFTs) of different materials.
- TFTs of oxide materials and low temperature poly-silicon (LTPS) materials have strong versatility.
- the embodiments of the present disclosure provide a level conversion circuit
- the level conversion circuit includes at least one first switch sub-circuit and at least two level conversion sub-circuits.
- each first switch subcircuit can control each level conversion subcircuit to transmit the first power supply signal or the second power supply signal to the gate driving circuit, and the power of the first power supply signal provided by each level conversion subcircuit is If the level is different, the level of the second power supply signal provided is different. Therefore, it is possible to provide the first power supply signal and the second power supply signal of different levels for different signal terminals connected to the gate driving circuit, thereby improving product reliability and better display effect of the display panel.
- FIG. 14 is a schematic structural diagram of a driving circuit of a display panel provided by an embodiment of the present disclosure.
- the driving circuit of the display panel may include: a gate driving circuit 00 , and a level conversion circuit 01 as shown in any one of FIGS. 1 to 12 .
- the gate driving circuit 00 may be a circuit fabricated on an array substrate of a display panel.
- the level conversion circuit 01 may be a circuit fabricated on a flexible or printed circuit board.
- the level conversion circuit 01 may be connected to the gate driving circuit 00 , and the level conversion circuit 01 may be used to provide a driving signal to the gate driving circuit 00 .
- the gate driving circuit 00 can be used to operate under the driving of the driving signal.
- the level conversion circuit 01 may be connected to each signal terminal of the gate driving circuit 00 through an output signal terminal.
- the material of the transistor included in the gate driving circuit may be a metal oxide semiconductor material.
- the metal oxide semiconductor material may be indium gallium zinc oxide (IGZO), or other materials whose carrier mobility can be changed, such as indium gallium tin oxide (indium gallium tin oxide, IGTO), indium gallium zinc tin oxide (IGZTO), Ln-indium zinc oxide (Ln-indium zinc oxide, Ln-IZO), etc.
- IGZO indium gallium zinc oxide
- the IGZO material can make the mobility of the transistor higher, the on-current Ion larger, and the off-current Ioff smaller. In this way, product reliability can be further improved.
- the use of metal oxide semiconductors can also lay the foundation for high refresh rates of display panels.
- FIG. 15 is a schematic structural diagram of a driving circuit of a display panel provided by an embodiment of the present disclosure.
- the display device may include: a display panel 100 , and a drive circuit 200 of the display panel as shown in FIG. 14 .
- the drive circuit 200 of the display panel may be connected to the display panel 100, and the drive circuit 200 of the display panel may be used to drive the display panel 100 to display.
- the display device may be any product or component with a display function, such as an organic light-emitting diode display device, a liquid crystal display device, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, or a navigator.
- a display function such as an organic light-emitting diode display device, a liquid crystal display device, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, or a navigator.
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Abstract
一种电平转换电路、显示面板的驱动电路及显示装置,属于显示技术领域。该电平转换电路包括至少一个第一开关子电路(20)和至少两个电平转换子电路(10)。其中,每个第一开关子电路(20)可以控制每个电平转换子电路(10)向栅极驱动电路传输第一电源信号或第二电源信号,且各个电平转换子电路(10)所提供的第一电源信号的电平不同,提供的第二电源信号的电平不同。由此,可以实现为栅极驱动电路所连接的不同信号端提供不同电平的第一电源信号和第二电源信号,进而可以改善产品信赖性,显示面板的显示效果较好。
Description
本公开要求于2020年11月27日提交的申请号为202011367804.7、发明名称为“电平转换电路、显示面板的驱动电路及显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本公开中。
本公开涉及显示技术领域,特别涉及一种电平转换电路、显示面板的驱动电路及显示装置。
阵列基板行驱动(gate driver on array,GOA)技术是将栅极驱动电路集成于阵列基板上的一种技术,采用GOA技术集成的电路也称为GOA电路。
相关技术中,GOA电路可以分别与多个信号端(如,时钟信号端和交流电源端)连接,该多个信号端又可以与电平转换电路连接。电平转换电路可以向每个信号端提供信号,GOA电路可以在来自各个信号端的信号的驱动下工作。且,电平转换电路提供给各个信号端的高电平或低电平均相同。
但是,相关技术中的GOA电路的信赖性有待提高。
发明内容
本公开提供了一种电平转换电路、显示面板的驱动电路及显示装置。所述技术方案至少包含如下内容:
一方面,提供了一种电平转换电路,所述电平转换电路包括:
至少两个电平转换子电路;
至少一个第一开关子电路,每个所述第一开关子电路分别与多个输入控制端中的至少一个输入控制端和至少一个所述电平转换子电路连接;每个所述第一开关子电路用于响应于第一开关控制信号,将所连接的每个所述输入控制端提供的输入控制信号提供至所连接的所述电平转换子电路;
每个所述电平转换子电路还分别与至少一个第一电源端、至少一个第二电 源端以及多个输出信号端中的至少一个所述输出信号端连接,每个所述输出信号端还用于与栅极驱动电路连接;每个所述电平转换子电路用于响应于接收到的所述输入控制信号,向所连接的每个所述输出信号端传输一个所述第一电源端提供的第一电源信号,或,传输一个所述第二电源端提供的第二电源信号;
其中,所述至少两个电平转换子电路中,各个所述电平转换子电路所连接的所述第一电源端提供的第一电源信号的电平不同,各个所述电平转换子电路所连接的所述第二电源端提供的第二电源信号的电平不同。
在一些实施方式中,每个所述第一开关子电路包括:多个第一开关;
每个所述第一开关的控制端用于接收所述第一开关控制信号,每个所述第一开关的第一端与一个所述输入控制端连接,每个所述第一开关的第二端与一个所述电平转换子电路连接。
在一些实施方式中,每个所述第一开关子电路包括的所述第一开关的数量与所述多个输入控制端的数量相同,各所述第一开关和各所述输入控制端一一对应连接。
在一些实施方式中,所述电平转换电路包括:多个所述第一开关子电路;
每个所述第一开关子电路分别与所述多个输入控制端和一个所述电平转换子电路连接,且每个所述电平转换子电路与所述多个输出信号端连接。
在一些实施方式中,每个所述电平转换子电路分别与多个第一电源端和一个第二电源端连接;所述电平转换电路还包括:开关控制子电路和至少两个第二开关子电路,且所述电平转换电路包括的所述第二开关子电路的数量与所述电平转换子电路的数量相同;
所述开关控制子电路与每个所述第二开关子电路连接,所述开关控制子电路用于向每个所述第二开关子电路传输第二开关控制信号;
每个所述第二开关子电路还分别与多个第一初始电源端和所述多个第一电源端连接,所述多个第一初始电源端和所述多个第一电源端一一对应;每个所述第二开关子电路用于响应于所述第二开关控制信号,将一个所述第一初始电源端提供的第一初始电源信号传输至对应的一个所述第一电源端;
其中,所述多个第一初始电源端中,各个所述第一初始电源端提供的第一初始电源信号的电平不同。
在一些实施方式中,所述开关控制子电路包括:温度检测次级电路和开关 控制次级电路;
所述温度检测次级电路与所述开关控制次级电路连接,所述温度检测次级电路用于基于检测到的温度向所述开关控制次级电路传输初始控制信号;
所述开关控制次级电路与每个所述第二开关子电路连接,所述开关控制次级电路用于基于所述初始控制信号,向每个所述第二开关子电路传输第二开关控制信号。
在一些实施方式中,所述温度检测次级电路包括:热敏电阻、第一电阻和电容;所述开关控制次级电路包括:电流源、第二电阻和第三电阻;
所述热敏电阻的一端和所述电容的一端均与第一直流电源端连接,所述热敏电阻的另一端与第一节点连接,所述电容的另一端与第二直流电源端连接;
所述第一电阻的一端与所述第一节点连接,所述第一电阻的另一端与所述第二直流电源端连接;
所述电流源分别与所述第一节点和所述第二电阻的一端连接,所述第二电阻的另一端与第二节点连接;
所述第三电阻的一端与所述第二节点连接,所述第三电阻的另一端与所述第二直流电源端连接,且所述第二节点与每个所述第二开关子电路连接。
在一些实施方式中,每个所述第二开关子电路包括:多个第二开关;
每个所述第二开关的控制端与所述开关控制子电路连接,每个所述第二开关的第一端与一个所述第一初始电源端连接,每个所述第二开关的第二端与一个所述第一电源端连接。
在一些实施方式中,每个所述电平转换子电路与两个所述第一电源端连接;每个所述第二开关子电路与两个所述第一初始电源端连接;且每个所述第二开关子电路包括:两个所述第二开关。
在一些实施方式中,所述电平转换电路还包括:至少两个放大子电路,且所述电平转换电路包括的所述放大子电路的数量与所述电平转换子电路的数量相同;
每个所述放大子电路的输入端与两个所述第一初始电源端中的一个所述第一初始电源端连接,每个所述放大子电路的输出端与两个所述第一初始电源端中的另一个所述第一初始电源端连接;每个所述放大子电路用于将一个所述第一初始电源端提供的第一初始电源信号放大后,传输至另一个所述第一初始电 源端。
在一些实施方式中,每个所述放大子电路包括:放大器、第四电阻和第五电阻;
所述放大器的正向输入端与一个所述第一初始电源端连接,所述放大器的负向输入端分别与所述第四电阻的一端和所述第五电阻的一端连接,所述放大器的输出端与另一个所述第一初始电源端连接;
所述第四电阻的另一端与第二直流电源端连接;
所述第五电阻的另一端与所述放大器的输出端连接。
在一些实施方式中,所述电平转换电路还包括:反相子电路;
所述反相子电路分别与所述多个输入控制端和每个所述第一开关子电路连接,所述反相子电路用于将每个所述输入控制端提供的输入控制信号反相后,传输至每个所述第一开关子电路。
在一些实施方式中,所述反相子电路包括:多个非门;
每个所述非门的输入端与一个所述输入控制端连接,每个所述非门的输出端与每个所述第一开关子电路包括的一个第一开关的第一端连接。
在一些实施方式中,所述电平转换电路包括:两个所述电平转换子电路。
在一些实施方式中,所述电平转换电路包括:两个所述第一开关子电路。
在一些实施方式中,每个所述电平转换子电路包括:第一晶体管和第二晶体管;
所述第一晶体管的栅极与所述第一开关子电路连接,所述第一晶体管的第一极与至少一个所述第一电源端连接,所述第一晶体管的第二极与至少一个所述输出信号端连接;
所述第二晶体管的栅极与所述第一开关子电路连接,所述第二晶体管的第一极与至少一个所述第二电源端连接,所述第二晶体管的第二极与至少一个所述输出信号端连接。
另一方面,提供了一种显示面板的驱动电路,所述显示面板的驱动电路包括:栅极驱动电路,以及如上述方面所述的电平转换电路;
其中,所述电平转换电路与所述栅极驱动电路连接,所述电平转换电路用于向所述栅极驱动电路提供驱动信号,所述栅极驱动电路用于在所述驱动信号的驱动下工作。
在一些实施方式中,所述栅极驱动电路包括的晶体管的材料为金属氧化物半导体材料。
又一方面,提供了一种显示装置,所述显示装置包括:显示面板,以及如上述方面所述的显示面板的驱动电路;
其中,所述显示面板的驱动电路与所述显示面板连接,所述显示面板的驱动电路用于驱动所述显示面板显示。
为了更清楚地说明本公开实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本公开的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是相关技术中一种电平转换电路结构示意图;
图2是本公开实施例提供的一种电平转换电路的结构示意图;
图3是本公开实施例提供的另一种电平转换电路的结构示意图;
图4是本公开实施例提供的又一种电平转换电路的结构示意图;
图5是本公开实施例提供的再一种电平转换电路的结构示意图;
图6是本公开实施例提供的再一种电平转换电路的结构示意图;
图7是本公开实施例提供的再一种电平转换电路的部分结构示意图;
图8是本公开实施例提供的再一种电平转换电路的部分结构示意图;
图9是本公开实施例提供的再一种电平转换电路的部分结构示意图;
图10是本公开实施例提供再一种电平转换电路的部分结构示意图;
图11是本公开实施例提供再一种电平转换电路的部分结构示意图;
图12是本公开实施例提供再一种电平转换电路的部分结构示意图;
图13是本公开实施例提供的一种电阻比值随温度变化曲线示意图;
图14是本公开实施例提供的一种显示面板的驱动电路的结构示意图;
图15是本公开实施例提供的一种显示装置的结构示意图。
为使本公开实施例的发明构思的目的、技术方案和优点更加清楚,下面将 结合附图和一些实施例对本公开实施例保护的发明构思做详细描述。
图1是相关技术中一种电平转换电路的结构图。如图1所示,该电平转换电路的一端与输入端INPUT连接,另一端与输出端OUTPUT连接,OUTPUT可以再连接至GOA电路的各个信号端。且,电平转换电路向OUTPUT传输的高电平信号的电平仅为VGH,低电平信号的电平仅为VGL。在温度大于常温的高温和温度小于常温的低温下测试时发现:GOA电路在该电平转换电路提供的信号的驱动下驱动显示面板时,显示面板易出现显示异常(abnormal display,AD)这一不良现象,由此导致产品(即,显示装置)的信赖性较差。
为解决上述技术问题,本公开实施例提供了一种新的电平转换电路为GOA电路的各个信号端提供信号。经测试发现,采用该电平转换电路为GOA电路提供信号,可以有效解决相关技术中显示面板在高温和低温下出现的AD现象,如此可以确定,采用该电平转换电路的产品信赖性较好。
图2是本公开实施例提供的一种电平转换电路的结构示意图。如图2所示,该电平转换电路可以包括:至少两个电平转换子电路10和至少一个第一开关子电路20。
其中,每个第一开关子电路20可以分别与多个输入控制端中的至少一个输入控制端,以及至少一个电平转换子电路10连接。每个第一开关子电路20可以用于响应于第一开关控制信号,将所连接的每个输入控制端提供的输入控制信号提供至所连接的电平转换子电路10。
例如,参考图2,其示出的电平转换电路共包括:两个电平转换子电路10和两个第一开关子电路20,且每个第一开关子电路20均与多个输入控制端INPUT_1至INPUT_N,以及一个电平转换子电路10连接,N为大于1的正整数。每个第一开关子电路20可以在接收到的第一开关控制信号的电平为有效电平时,将所连接的每个输入控制端提供的输入控制信号提供至所连接的电平转换子电路10。如此,可以通过灵活设置第一开关控制信号,调整各个电平转换子电路10所接收到的输入控制信号。
在一些实施方式中,该第一开关控制信号可以由电源集成管理电路(power management integrated circuit,PMIC)提供。即,每个第一开关子电路20还可以与PMIC连接,并接收PMIC传输的第一开关控制信号。
每个电平转换子电路10还可以分别与至少一个第一电源端,至少一个第二 电源端,以及多个输出信号端中的至少一个输出信号端连接。每个输出信号端还可以用于与栅极驱动电路(即GOA电路)连接。每个电平转换子电路10可以用于响应于接收到的输入控制信号,向所连接的每个输出信号端传输一个第一电源端提供的第一电源信号,或,传输一个第二电源端提供的第二电源信号。
在一些实施方式中,在本公开实施例中,输出信号端的数量与输入控制端的数量可以相同,且一一对应。即,如图2所示,该电平转换电路可以包括N个输入控制端INPUT_1至INPUT_N,以及与该N个输入控制端INPUT_1至INPUT_N一一对应的N个输出信号端OUTPUT_1至OUTPUT_N。此外,各个电平转换子电路10所连接的第一电源端提供的第一电源信号的电平可以不同,各个电平转换子电路10所连接的第二电源端提供的第二电源信号的电平可以不同。
例如,继续参考图2,其示出的两个电平转换子电路10中,一个电平转换子电路10(以下实施例简称第一个电平转换子电路10)分别与一个第一电源端VGH1_O、一个第二电源端VGL1_O以及多个输出信号端OUTPUT_1至OUTPUT_N连接。另一个电平转换子电路10(以下实施例简称第二个电平转换子电路10)分别与一个第一电源端VGH2_O、一个第二电源端VGL2_O以及多个输出信号端OUTPUT_1至OUTPUT_N连接。第一电源端VGH1_O提供的第一电源信号的电平与第一电源端VGH2_O提供的第一电源信号的电平不同,第二电源端VGL1_O提供的第二电源信号的电平与第二电源端VGL2_O提供的第二电源信号的电平不同。
并且,每个电平转换子电路10可以在接收到的输入控制信号的电平为第一电平时,向所连接的每个输出信号端传输所连接的一个第一电源端提供的第一电源信号。以及可以在接收到的输入控制信号的电平为第二电平时,向所连接的每个输出信号端传输所连接的一个第二电源端提供的第二电源信号。例如,对于第一个电平转换子电路10而言,该第一电平转换子电路10可以在接收到的输入控制信号的电平为第一电平时,向各个输出信号端传输第一电源端VGH1_O提供的第一电源信号,以及可以在接收到的输入控制信号的电平为第二电平时,向各个输出信号端传输第二电源端VGL1_O提供的第二电源信号。对于第二个电平转换子电路10同理,在此不再赘述。
其中,第一电平和第二电平中,一个电平可以为高电平,一个电平可以为 低电平,且该两个电平均可以为有效电平。第一电源信号和第二电源信号中,一个电源信号的电平可以为高电平,另一个电源信号的电平可以为低电平。由此不仅可以实现既向GOA电路提供低电平信号,又向GOA电路提供高电平信号,而且可以实现向GOA电路提供不同高电平的第一电源信号,以及提供不同低电平的第二电源信号。
需要说明的是,本公开实施例记载的电平转换电路的每个输出信号端可以用于连接至GOA电路的各个不同的信号端。如,时钟信号端CLK,开启信号端STV,复位信号端RST或者交流电源端V1。如此,基于上述实施例记载可知,采用该电平转换电路,可以实现为GOA电路所连接的不同信号端提供不同高电平的信号或低电平的信号。经测试,通过为GOA电路所连接的不同信号端提供不同高电平的信号,以及不同低电平的信号,可以有效解决显示面板在高温和低温下出现的AD现象,进而可靠改善了产品信赖性,确保了显示效果较好。
综上所述,本公开实施例提供了一种电平转换电路,该电平转换电路包括至少一个第一开关子电路和至少两个电平转换子电路。其中,每个第一开关子电路可以控制每个电平转换子电路向栅极驱动电路传输第一电源信号或第二电源信号,且各个电平转换子电路所提供的第一电源信号的电平不同,提供的第二电源信号的电平不同。由此,可以实现为栅极驱动电路所连接的不同信号端提供不同电平的第一电源信号和第二电源信号,进而可以改善产品信赖性,显示面板的显示效果较好。
在一些实施方式中,图3是本公开实施例提供的另一种电平转换电路的结构示意图。如图3所示,每个第一开关子电路20可以包括:多个第一开关K1。
其中,每个第一开关K1的控制端可以用于接收第一开关控制信号,每个第一开关K1的第一端可以与一个输入控制端连接,每个第一开关K1的第二端可以与一个电平转换子电路10连接。
例如,参考图3,其示出的每个第一开关子电路20的各个第一开关K1的第一端分别与输入控制端INPUT1_1至INPUT_N连接。一个第一开关子电路20中各个第一开关K1的第二端均连接至第一个电平转换子电路10,另一个第一开关子电路20中各个第一开关K1的第二端均连接至第二个电平转换子电路10。
并且,基于图3所示第一开关子电路20的结构可以确定,在本公开实施例中,每个第一开关子电路20的工作原理为:对于每个第一开关K1,若该第一 开关K1的控制端接收到的第一开关控制信号的电平为有效电平,则该第一开关K1的第一端和第二端之间导通。相应的,该第一开关K1的第一端所连接的输入控制端提供的输入控制信号,即可以经该第一开关K1进一步传输至该第一开关K1的第二端所连接的电平转换子电路10。若该第一开关K1的控制端接收到的第一开关控制信号的电平为无效电平,则该第一开关K1的第一端和第二端之间断开连接,该第一开关K1的第一端所连接的输入控制端提供的输入控制信号无法进一步传输至第二端所连接的电平转换子电路10。
例如,对于连接至输入控制端INPUT_1和第一个电平转换子电路10的第一开关K1,在该第一开关K1的控制端接收到有效电平的第一开关控制信号时,该第一开关K1的第一端和第二端导通。此时,输入控制端INPUT_1提供的输入控制信号可以经该第一开关K1传输至该第一个电平转换子电路10。
需要说明的是,结合图2或图3所述电平转换电路可知,为避免两个电平转换子电路10向同一个输出信号端传输不同电平的同一电源信号,可预先设定各个电平转换子电路10跟随(follow)不同第一开关子电路20工作,即设定各个电平转换子电路10响应不同第一开关子电路20传输的信号工作。或者,可以控制向不同第一开关子电路20中,连接至同一输入控制端的第一开关K1提供的第一开关控制信号的电平不同。
在一些实施方式中,再结合图3所示结构,在本公开实施例中,每个第一开关子电路20包括的第一开关K1的数量与多个输入控制端的数量可以相同。如此,可以在确保将各个输入控制端提供的输入控制信号可靠传输至电平转换子电路10的前提下,避免因设置较多第一开关,导致电路面积较大,花费较多等问题。当然,第一开关K1的数量也可以大于输入控制端的数量。
在一些实施方式中,图4是本公开实施例提供的又一种电平转换电路的结构示意图。如图4所示,电平转换电路还可以包括:反相子电路30。
其中,反相子电路30可以分别与多个输入控制端INPUT_1至INPUT_N,以及每个第一开关子电路20连接。
在一些实施方式中,如图4所示,反相子电路30可以与每个第一开关子电路20中各个第一开关K1的第一端连接。该反相子电路30可以用于将每个输入控制端提供的输入控制信号反相后,传输至每个第一开关子电路20。
例如,反相子电路30可以将第一电平的输入控制信号反相为第二电平后, 传输至每个第一开关子电路20。同理,反相子电路30可以将第二电平的输入控制信号反相为第一电平后,传输至每个第一开关子电路20。如此,可以确保信号传输的稳定性,使得最终传输至输出信号端的信号的电平与输入控制端提供的输入控制信号的电平保持一致。
在一些实施方式中,图5是本公开实施例提供的再一种电平转换电路的结构示意图。如图5所示,反相子电路30可以包括:多个非门301。
每个非门301的输入端可以与一个输入控制端连接,每个非门301的输出端可以与每个第一开关子电路20包括的一个第一开关K1的第一端连接。
在一些实施方式中,为确保对每个输入控制端提供的输入控制信号的反相控制,反相子电路30包括的非门301的数量,与输入控制端的数量可以相同。当然,非门301的数量也可以小于或大于输入控制端的数量,本公开实施例对此不作限定。
在一些实施方式中,申请提供的每个电平转换子电路10可以分别与多个第一电源端和一个第二电源端连接。例如,参考图5和图6所示的电平转换电路,其示出的第一个电平转换子电路10可以分别与两个第一电源端VGH1_O和VGH3_O,以及一个第二电源端VGL1_O连接。第二个电平转换子电路10可以分别与两个第一电源端VGH2_O和VGH4_O,以及一个第二电源端VGL2_O连接。下述实施例均以图6所示电平转换电路结构进行说明。
继续参考图6,每个电平转换子电路10均可以包括:第一晶体管Q1和第二晶体管Q2。
第一晶体管Q1的栅极可以与第一开关子电路20连接,第一晶体管Q1的第一极可以与至少一个第一电源端连接,第一晶体管Q1的第二极可以与至少一个输出信号端连接。
第二晶体管Q2的栅极可以与第一开关子电路20连接,第二晶体管Q2的第一极可以与至少一个第二电源端连接,第二晶体管Q2的第二极可以与至少一个输出信号端连接。
例如,结合图6可以看出,各个第一晶体管Q1的栅极均可以与第一开关K1的第二端连接,第一个电平转换子电路10中,第一晶体管Q1的第一极可以与两个第一电源端VGH1_O和VGH3_O连接,第二晶体管Q2的第一极可以与一个第二电源端VGL1_O连接,且第一晶体管Q1的第二极和第二晶体管Q2的 第二极均与多个输出信号端OUTPUT_1至OUTPUT_N连接。第二个电平转换子电路10中,第一晶体管Q1的第一极可以与两个第一电源端VGH2_O和VGH4_O连接,第二晶体管Q2的第一极可以与一个第二电源端VGL2_O连接,且第一晶体管Q1的第二极和第二晶体管Q2的第二极均与多个输出信号端OUTPUT_1至OUTPUT_N连接。
需要说明的是,每个电平转换子电路10中第一晶体管Q1和第二晶体管Q2的类型可以不同。如,一个晶体管可以为N型晶体管,另一个晶体管可以为P型晶体管。对于N型晶体管而言,有效电平可以为高电平,对于P型晶体管而言,有效电平可以为低电平。进而,可以确定电平转换子电路10的工作原理为:
假设第一晶体管Q1为N型晶体管,第二晶体管Q2为P型晶体管。则对于第一个电平转换子电路10而言,在接收到的输入控制信号的电平为高电平时,其所包括的第一晶体管Q1可以导通,第二晶体管Q2可以截止。两个第一电源端VGH1_O和VGH3_O中任一第一电源端提供的第一电源信号能够经第一晶体管Q1被传输至输出信号端。在接收到的输入控制信号的电平为低电平时,其所包括的第一晶体管Q1可以截止,第二晶体管Q2可以导通。第二电源端VGL1_O提供的第二电源信号能够经第二晶体管Q2被传输至输出信号端。第二个电平转换子电路10同理,在此不再赘述。
基于以上实施例记载,为有效改善信赖性问题,可以对GOA电路所连接的不同信号端提供的信号的电平进行组合测试,并根据测试结果灵活向各个第一开关子电路20提供不同电平的第一开关控制信号,使得最终传输至各个信号端的信号的电平能够确保产品信赖性较好。
示例的,以图4所示电平转换电路,“K1_1”表示与第一个电平转换子电路10所连接的第一开关子电路20中的第一开关K1,“K1_2”表示与第二个电平转换子电路10所连接的第一开关子电路20中的第一开关K1,“0”表示有效电平,“1”表示无效电平,“×”表示未传输,“√”表示传输为例。下述表1示出了一种确定出的信号真值表:
表1
K1_1/K1_2 | VGH1_O/VGL1_O | VGH2_O/VGL2_O | |
INPUT_1 | 0/1 | × | √ |
INPUT_2 | 0/1 | × | √ |
INPUT_3 | 0/1 | × | √ |
… | … | … | … |
INPUT_N | 1/0 | √ | × |
参考表1可以看出,向第一个电平转换子电路10所连接的第一开关子电路20中,与输入控制端INPUT_1至INPUT_3所连接的各个第一开关K1_1提供的第一开关控制信号的电平为无效电平,与输入控制端INPUT_N所连接的第一开关K1_1提供的第一开关控制信号的电平为有效电平。如此,第一个电平转换子电路1能够基于输入控制端INPUT_N提供的输入控制信号,向所连接输出信号端传输第一电源端VGH1_O提供的第一电源信号,或,传输第二电源端VGL1_O提供的第二电源信号。
同理,参考表1可以看出,向第二个电平转换子电路10所连接的第一开关子电路20中,与输入控制端INPUT_1至INPUT_3所连接的各个第一开关K1_2提供的第一开关控制信号的电平为有效电平,与输入控制端INPUT_N所连接的第一开关K1_2提供的第一开关控制信号的电平为无效电平。如此,第二个电平转换子电路1能够基于输入控制端INPUT_1至INPUT_3提供的输入控制信号,向所连接的输出信号端传输第一电源端VGH2_O提供的第一电源信号,或,传输第二电源端VGL2_O提供的第二电源信号。
在得到表1所示真值表后,即可以按照上述表1,通过PMIC向各个第一开关K1提供第一开关控制信号。此外,表1仅是示意性示出一种在一些实施方式中组合,在使用时,可以基于不同GOA电路的结构或是材料,确定出改善信赖性效果较好的组合。本公开实施例对此不做限定。
在一些实施方式中,在每个电平转换子电路10与多个第一电源端连接时,为确保向输出信号端可靠输出一个第一电源端提供的第一电源信号。结合图6所示结构,图7示出了再一种电平转换电路。如图7所示,该电平转换电路还可以包括:开关控制子电路40和至少两个第二开关子电路50。且第二开关子电路50的数量与电平转换子电路10的数量相同。例如,图7共示出两个第一开关子电路50。
其中,开关控制子电路40可以与每个第二开关子电路50连接。开关控制子电路40可以用于向每个第二开关子电路50传输第二开关控制信号。
每个第二开关子电路50还可以分别与多个第一初始电源端和多个第一电源 端连接,多个第一初始电源端和多个第一电源端一一对应。即每个第二开关子电路50连接的第一初始电源端的数量与每个电平转换子电路10连接的第一电源端的数量相同。每个第二开关子电路可以用于响应于第二开关控制信号,将一个第一初始电源端提供的第一初始电源信号传输至对应的一个第一电源端。
其中,多个第一初始电源端中,各个第一初始电源端提供的第一初始电源信号的电平可以不同。如此,可以使得一个电平转换子电路10能够向输出信号端传输不同电平的第一电源信号。
例如,结合图6和图7,由于每个电平转换子电路10均与两个第一电源端连接。则相应的,每个第二开关子电路50可以分别与两个第一初始电源端连接。其中,其示出的一个第二开关子电路50与第一初始电源端VGH1和VGH3连接,VGH1可以与VGH1_O对应,VGH3可以与VGH3_O对应。另一个第二开关子电路50与第一初始电源端VGH2和VGH4连接,VGH2可以与VGH2_O对应,VGH4可以与VGH4_O对应。每个第二开关子电路50可以在所接收到的第二开关控制信号的电平为有效电平时,将其所连接的一个第一初始电源端提供的第一初始电源信号传输至对应的一个第一电源端。
在一些实施方式中,图8是本公开实施例提供的再一种电平转换电路的结构示意图。如图8所示,每个第二开关子电路50可以包括:多个第二开关K2。
其中,每个第二开关K2的控制端可以与开关控制子电路40连接,每个第二开关K2的第一端可以与一个第一初始电源端连接,每个第二开关K2的第二端可以与一个第一电源端连接。
如此,在开关控制子电路40提供给任一第二开关K2的第二开关控制信号的电平为有效电平时,该第二开关K2的第一端与第二端可以导通。进而,该第二开关K2的第一端所连接的第一初始电源端提供的第一初始电源信号可以经该第二开关,传输至该第二开关K2的第二端所连接的第一电源端。
需要说明的是,结合图8所示结构,为使得每个第二开关子电路50能够可靠传输一个初始电源端提供的初始电源信号,每个第二开关子电路50中的两个第二开关K2的类型可以不同。即,一个第二开关K2可以响应于低电平的第二控制信号导通,一个第二开关K2可以响应于高电平的第二控制信号导通。
在一些实施方式中,结合图7和图8所示结构,假设每个第二开关子电路50共连接两个第一初始电源端。则参考图9,电平转换电路还可以包括:至少 两个放大子电路60,且电平转换电路包括的放大子电路60的数量与电平转换子电路10的数量可以相同。例如,图9共示出两个放大子电路60。
其中,每个放大子电路60的输入端可以与两个第一初始电源端中的一个第一初始电源端连接,每个放大子电路60的输出端可以与两个第一初始电源端中的另一个第一初始电源端连接。每个放大子电路60可以用于将一个第一初始电源端提供的第一初始电源信号放大后,传输至另一个第一初始电源端。
如,参考图9,其示出两个放大子电路60。其中,一个放大子电路60的输入端与第一初始电源端VGH1连接,输出端与第一初始电源端VGH3连接。该放大子电路60可以将第一初始电源端VGH1提供的第一电源信号放大后传输至第一初始电源端VGH3。相应的,第一个电平转换子电路10所连接的第一电源端VGH3_O的电平即可以大于VGH1_O的电平。另一个放大子电路60的输入端与第一初始电源端VGH2连接,输出端与第一初始电源端VGH4连接。该放大子电路60可以将第一初始电源端VGH2提供的第一电源信号放大后传输至第一初始电源端VGH4。相应的,第二个电平转换子电路10所连接的第一电源端VGH4_O的电平即可以大于VGH2_O的电平。
以与第一初始电源端VGH1和第一初始电源端VGH3连接的放大子电路60为例,图10示出了一种放大子电路的结构示意图。如图10所示,每个放大子电路60可以包括:放大器A1、第四电阻R4和第五电阻R5。
其中,放大器A1的正向输入端可以与一个第一初始电源端(如,VGH1)连接,放大器A1的负向输入端可以分别与第四电阻R4的一端和第五电阻R5的一端连接,放大器A1的输出端可以与另一个第一初始电源端(如,VGH3)连接。
第四电阻R4的另一端可以与第二直流电源端VSS连接,第五电阻R5的另一端可以与放大器A1的输出端连接。在一些实施方式中,第二直流电源端VSS可以为地端。
以图10所示放大子电路60为例,基于放大器A1的工作原理可知,VGH3可以满足:VGH3=VGH1(1+R5/R4)。如此,可以通过灵活设置第四电阻R4的阻值和第五电阻R5的阻值,得到所需电平的第一初始电源信号。
此外,由于GOA电路中的晶体管的导通电压呈现的是负温度特性,即在低温下,需要更高的电压才能保证晶体管的有效开启。故,为进一步确保产品信 赖性较好,在本公开实施例中,可以进一步基于环境温度控制向电平转换子电路传输的第一初始电源信号。即,结合图10,可以进一步基于环境温度设定第二开关子电路50是将第一初始电源端VGH1提供的第一初始电源信号传输至第一个电平转换子电路10,还是将第一初始电源端VGH3提供的第一初始电源信号传输至第一个电平转换子电路10。第二个电平转换子电路10同理。以使得温度较低时,确保能够输出使得GOA电路中晶体管有效开启的电源信号。
在一些实施方式中,为实现上述功能,图11示出了再一种电平转换电路的结构示意图。如图11所示,电平转换电路中的开关控制子电路40可以包括:温度检测次级电路401和开关控制次级电路402。
其中,温度检测次级电路401可以与开关控制次级电路402连接。温度检测次级电路401可以用于基于检测到的温度向开关控制次级电路402传输初始控制信号。
开关控制次级电路402可以与每个第二开关子电路50连接。开关控制次级电路402可以用于基于初始控制信号,向每个第二开关子电路50传输第二开关控制信号。
即,开关控制子电路40可以检测温度,并基于检测到的温度灵活向第二开关子电路50提供第二控制信号。
在一些实施方式中,图12是本公开实施例提供的再一种电平转换电路的结构示意图。如图12所示,温度检测次级电路401可以包括:热敏电阻R0、第一电阻R1和电容C1。开关控制次级电路402可以包括:电流源IS、第二电阻R2和第三电阻R3。
其中,热敏电阻R0的一端和电容C1的一端均可以与第一直流电源端VCC连接,热敏电阻R0的另一端可以与第一节点P1连接,电容C1的另一端可以与第二直流电源端连接。在一些实施方式中,图12示出的第二直流电源端为地端GND。
第一电阻R1的一端可以与第一节点P1连接,第一电阻R1的另一端可以与第二直流电源端VSS连接。
电流源IS可以分别与第一节点P1和第二电阻R2的一端连接,第二电阻R2的另一端可以与第二节点P2连接。
第三电阻R3的一端可以与第二节点P2连接,第三电阻R3的另一端可以与 第二直流电源端VSS连接,且第二节点P2可以与每个第二开关子电路50连接。
在一些实施方式中,热敏电阻R0可以为温度越低,阻值越小的正温敏电阻。结合图12所示开关控制子电路可知,假设第一直流电源端VCC的电平标识为Vcc,热敏电阻R0的阻值标识为r0,第一电阻R1的阻值标识为r1,第二电阻R2的阻值标识为r2。则可以确定第一节点P1的电平能够满足:
Vp1=Vcc*r1/(r0+r1)=Vcc/[1+(r0/r1)]。
基于上述关系式可知,可以通过选择合适的热敏电阻R0和第一电阻R1,实现对第一节点P1和第二节点P2的电平的灵活控制。例如,结合图13所示r0/r1与随温度变化曲线示意图确定:在常温和高温下,可以使得r0满足:r0≈50*r1至20*r1。在低温下,可以使得r0满足:r0≈r1/10。图13中,横坐标表示温度,单位为摄氏度(℃),纵坐标表示r0/r1的值。
结合图12所示结构以及高低温环境的影响,为确保在低温下GOA电路的晶体管有效开启,则低温时,可以向电平转换子电路提供较高电平的第一初始电源信号。高温或常温时,可以向电平转换子电路提供较低电平的第一初始电源信号。为了达到该技术效果,可以通过温度检测次级电路401灵活调整第二节点P2的电平高低,以调整第二开关控制信号的电平。实现在不同温度下,控制每个第二开关子电路50中不同的第二开关K2导通。
例如,假设如上述实施例记载,第一初始电源信号VGH1的电平小于第一初始电源信号VGH3的电平,第一初始电源信号VGH2的电平小于第一初始电源信号VGH4的电平。连接至第一初始电源信号VGH1和第一初始电源信号VGH2的第二开关K2在低电平的第二开关控制信号时导通,连接至第一初始电源信号VGH3和第一初始电源信号VGH4的第二开关K2在高电平的第二开关控制信号时导通。则可以在低温时,通过温度检测次级电路401控制第二节点P2的电平为高电平,在高温或常温时,通过温度检测次级电路401控制第二节点P2的电平为低电平即可。从而,即可以使得在低温时,传输至电平转换子电路的第一初始电源信号的电平,相对于在高温和常温时传输至电平转换子电路的第一初始电源信号的电平较大。示例的,表2示出了不同温度下,输出关系表:
表2
其中,L是指低电平,H是指高电平。参考上述表1可以看出,在低温时,每个电平转换子电路10均可以向输出信号端传输较高电平的第一电源信号VGH3_O和VGH4_O。在高温时,每个电平转换子电路10均可以向输出信号端传输较低电平的第一电源信号VGH1_O和VGH2_O。
在一些实施方式中,本公开实施例提供的该电平转换电路的设置,本公开实施例中记载的电平转换电路01可以是制作在柔性或印刷电路板上的电路。且该电平转换电路01不会影响GOA电路的布线空间,且不会增加产品的边框宽度。并且,由于本公开实施例提供的电平转换电路不仅可以向GOA电路所连接的不同信号端提供不同高电平的信号,以及不同低电平的信号。且还可以基于环境温度,灵活调整向GOA电路输出的信号的电平。如此,可以有效改善产品信赖性较差的问题。再者,本公开实施例提供的电平转换电路可以适用于不同材料薄膜晶体管(thin film transistor,TFT)的GOA电路产品。如,氧化物材料和低温多晶硅材料(low temperature poly-silicon,LTPS)的TFT,通用性较强。
综上所述,本公开实施例提供了一种电平转换电路,该电平转换电路包括至少一个第一开关子电路和至少两个电平转换子电路。其中,每个第一开关子电路可以控制每个电平转换子电路向栅极驱动电路传输第一电源信号或第二电源信号,且各个电平转换子电路所提供的第一电源信号的电平不同,提供的第二电源信号的电平不同。由此,可以实现为栅极驱动电路所连接的不同信号端提供不同电平的第一电源信号和第二电源信号,进而可以改善产品信赖性,显示面板的显示效果较好。
图14是本公开实施例提供的一种显示面板的驱动电路结构示意图。如图14所示,该显示面板的驱动电路可以包括:栅极驱动电路00,以及如图1至图12任一所示的电平转换电路01。
在一些实施方式中,栅极驱动电路00可以为制作在显示面板的阵列(array) 基板上的电路。该电平转换电路01可以为制作在柔性或印刷电路板上的电路。
其中,电平转换电路01可以与栅极驱动电路00连接,电平转换电路01可以用于向栅极驱动电路00提供驱动信号。栅极驱动电路00可以用于在该驱动信号的驱动下工作。在一些实施方式中,结合上述附图,电平转换电路01可以通过输出信号端与栅极驱动电路00的各个信号端连接。
在一些实施方式中,栅极驱动电路包括的晶体管的材料可以为金属氧化物半导体材料。
示例性的,该金属氧化物半导体材料可以为铟镓锌氧化物(indium gallium zinc oxide,IGZO),或载流子迁移率可更改的其他材料,如铟镓锡氧化物(indium gallium tin oxide,IGTO)、铟镓锌锡氧化物(indium gallium zinc tin oxide,IGZTO)、Ln-铟镓锌氧化物(Ln-indium zinc oxide,Ln-IZO)等。IGZO材料相对于硅(Si)材料而言,可以使得晶体管的迁移率较高,导通电流Ion较大,截止电流Ioff较小。如此,可以进一步改善产品信赖性。此外,使用金属氧化物半导体还可以为显示面板的高刷新率奠定基础。
图15是本公开实施例提供的一种显示面板的驱动电路结构示意图。如图15所示,该显示装置可以包括:显示面板100,以及如图14所示的显示面板的驱动电路200。
其中,显示面板的驱动电路200可以与显示面板100连接,显示面板的驱动电路200可以用于驱动显示面板100进行显示。
在一些实施方式中,该显示装置可以为:有机发光二极管显示装置、液晶显示装置、手机、平板电脑、电视机、显示器、笔记本电脑或导航仪等任何具有显示功能的产品或部件。
应当理解,本公开实施例中说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,例如能够根据本公开实施例图示或描述中给出那些以外的顺序实施。
以上所述仅为本公开的可选实施例,并不用以限制本公开,凡在本公开的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本公开的保护范围之内。
Claims (20)
- 一种电平转换电路,其中,所述电平转换电路包括:至少两个电平转换子电路;至少一个第一开关子电路,每个所述第一开关子电路分别与多个输入控制端中的至少一个输入控制端和至少一个所述电平转换子电路连接;每个所述第一开关子电路用于响应于第一开关控制信号,将所连接的每个所述输入控制端提供的输入控制信号提供至所连接的所述电平转换子电路;每个所述电平转换子电路还分别与至少一个第一电源端、至少一个第二电源端以及多个输出信号端中的至少一个所述输出信号端连接,每个所述输出信号端还用于与栅极驱动电路连接;每个所述电平转换子电路用于响应于接收到的所述输入控制信号,向所连接的每个所述输出信号端传输一个所述第一电源端提供的第一电源信号,或,传输一个所述第二电源端提供的第二电源信号;其中,所述至少两个电平转换子电路中,各个所述电平转换子电路所连接的所述第一电源端提供的第一电源信号的电平不同,各个所述电平转换子电路所连接的所述第二电源端提供的第二电源信号的电平不同。
- 根据权利要求1所述的电平转换电路,其中,每个所述第一开关子电路包括:多个第一开关;每个所述第一开关的控制端用于接收所述第一开关控制信号,每个所述第一开关的第一端与一个所述输入控制端连接,每个所述第一开关的第二端与一个所述电平转换子电路连接。
- 根据权利要求2所述的电平转换电路,其中,每个所述第一开关子电路包括的所述第一开关的数量与所述多个输入控制端的数量相同,各所述第一开关和各所述输入控制端一一对应连接。
- 根据权利要求1至3任一所述的电平转换电路,其中,所述电平转换电路包括:多个所述第一开关子电路;每个所述第一开关子电路分别与所述多个输入控制端和一个所述电平转换 子电路连接,且每个所述电平转换子电路与所述多个输出信号端连接。
- 根据权利要求1至4任一所述的电平转换电路,其中,每个所述电平转换子电路分别与多个第一电源端和一个第二电源端连接;所述电平转换电路还包括:开关控制子电路和至少两个第二开关子电路,且所述电平转换电路包括的所述第二开关子电路的数量与所述电平转换子电路的数量相同;所述开关控制子电路与每个所述第二开关子电路连接,所述开关控制子电路用于向每个所述第二开关子电路传输第二开关控制信号;每个所述第二开关子电路还分别与多个第一初始电源端和所述多个第一电源端连接,所述多个第一初始电源端和所述多个第一电源端一一对应;每个所述第二开关子电路用于响应于所述第二开关控制信号,将一个所述第一初始电源端提供的第一初始电源信号传输至对应的一个所述第一电源端;其中,所述多个第一初始电源端中,各个所述第一初始电源端提供的第一初始电源信号的电平不同。
- 根据权利要求5所述的电平转换电路,其中,所述开关控制子电路包括:温度检测次级电路和开关控制次级电路;所述温度检测次级电路与所述开关控制次级电路连接,所述温度检测次级电路用于基于检测到的温度向所述开关控制次级电路传输初始控制信号;所述开关控制次级电路与每个所述第二开关子电路连接,所述开关控制次级电路用于基于所述初始控制信号,向每个所述第二开关子电路传输第二开关控制信号。
- 根据权利要求6所述的电平转换电路,其中,所述温度检测次级电路包括:热敏电阻、第一电阻和电容;所述开关控制次级电路包括:电流源、第二电阻和第三电阻;所述热敏电阻的一端和所述电容的一端均与第一直流电源端连接,所述热敏电阻的另一端与第一节点连接,所述电容的另一端与第二直流电源端连接;所述第一电阻的一端与所述第一节点连接,所述第一电阻的另一端与所述第二直流电源端连接;所述电流源分别与所述第一节点和所述第二电阻的一端连接,所述第二电阻的另一端与第二节点连接;所述第三电阻的一端与所述第二节点连接,所述第三电阻的另一端与所述第二直流电源端连接,且所述第二节点与每个所述第二开关子电路连接。
- 根据权利要求5所述的电平转换电路,其中,每个所述第二开关子电路包括:多个第二开关;每个所述第二开关的控制端与所述开关控制子电路连接,每个所述第二开关的第一端与一个所述第一初始电源端连接,每个所述第二开关的第二端与一个所述第一电源端连接。
- 根据权利要求8所述的电平转换电路,其中,每个所述电平转换子电路与两个所述第一电源端连接;每个所述第二开关子电路与两个所述第一初始电源端连接;且每个所述第二开关子电路包括:两个所述第二开关。
- 根据权利要求9所述的电平转换电路,其中,所述电平转换电路还包括:至少两个放大子电路,且所述电平转换电路包括的所述放大子电路的数量与所述电平转换子电路的数量相同;每个所述放大子电路的输入端与两个所述第一初始电源端中的一个所述第一初始电源端连接,每个所述放大子电路的输出端与两个所述第一初始电源端中的另一个所述第一初始电源端连接;每个所述放大子电路用于将一个所述第一初始电源端提供的第一初始电源信号放大后,传输至另一个所述第一初始电源端。
- 根据权利要求10所述的电平转换电路,其中,每个所述放大子电路包括:放大器、第四电阻和第五电阻;所述放大器的正向输入端与一个所述第一初始电源端连接,所述放大器的负向输入端分别与所述第四电阻的一端和所述第五电阻的一端连接,所述放大器的输出端与另一个所述第一初始电源端连接;所述第四电阻的另一端与第二直流电源端连接;所述第五电阻的另一端与所述放大器的输出端连接。
- 根据权利要求1至11任一所述的电平转换电路,其中,所述电平转换电路还包括:反相子电路;所述反相子电路分别与所述多个输入控制端和每个所述第一开关子电路连接,所述反相子电路用于将每个所述输入控制端提供的输入控制信号反相后,传输至每个所述第一开关子电路。
- 根据权利要求12所述的电平转换电路,其中,所述反相子电路包括:多个非门;每个所述非门的输入端与一个所述输入控制端连接,每个所述非门的输出端与每个所述第一开关子电路包括的一个第一开关的第一端连接。
- 根据权利要求1至13任一所述的电平转换电路,其中,所述电平转换电路包括:两个所述电平转换子电路。
- 根据权利要求14所述的电平转换电路,其中,所述电平转换电路包括:两个所述第一开关子电路。
- 根据权利要求1至15任一所述的电平转换电路,其中,每个所述电平转换子电路包括:第一晶体管和第二晶体管;所述第一晶体管的栅极与所述第一开关子电路连接,所述第一晶体管的第一极与至少一个所述第一电源端连接,所述第一晶体管的第二极与至少一个所述输出信号端连接;所述第二晶体管的栅极与所述第一开关子电路连接,所述第二晶体管的第一极与至少一个所述第二电源端连接,所述第二晶体管的第二极与至少一个所述输出信号端连接。
- 根据权利要求11所述的电平转换电路,其中,所述电平转换电路包括:多个所述第一开关子电路;每个所述第一开关子电路分别与所述多个输入控制 端和一个所述电平转换子电路连接,且每个所述电平转换子电路与所述多个输出信号端连接;所述开关控制子电路包括:温度检测次级电路和开关控制次级电路;所述温度检测次级电路与所述开关控制次级电路连接,所述温度检测次级电路用于基于检测到的温度向所述开关控制次级电路传输初始控制信号;所述开关控制电路与每个所述第二开关子电路连接,所述开关控制次级电路用于基于所述初始控制信号,向每个所述第二开关子电路传输第二开关控制信号;所述温度检测次级电路包括:热敏电阻、第一电阻和电容;所述开关控制次级电路包括:电流源、第二电阻和第三电阻;所述热敏电阻的一端和所述电容的一端均与第一直流电源端连接,所述热敏电阻的另一端与第一节点连接,所述电容的另一端与第二直流电源端连接;所述第一电阻的一端与所述第一节点连接,所述第一电阻的另一端与所述第二直流电源端连接;所述电流源分别与所述第一节点和所述第二电阻的一端连接,所述第二电阻的另一端与第二节点连接;所述第三电阻的一端与所述第二节点连接,所述第三电阻的另一端与所述第二直流电源端连接,且所述第二节点与每个所述第二开关子电路连接;所述电平转换电路还包括:反相子电路;所述反相子电路分别与所述多个输入控制端和每个所述第一开关子电路连接,所述反相子电路用于将每个所述输入控制端提供的输入控制信号反相后,传输至每个所述第一开关子电路;所述反相子电路包括:多个非门;每个所述非门的输入端与一个所述输入控制端连接,每个所述非门的输出端与每个所述第一开关子电路包括的一个第一开关的第一端连接;所述电平转换电路包括:两个所述电平转换子电路和两个所述第一开关子电路;每个所述电平转换子电路包括:第一晶体管和第二晶体管;所述第一晶体管的栅极与所述第一开关子电路连接,所述第一晶体管的第一极与至少一个所述第一电源端连接,所述第一晶体管的第二极与至少一个所述输出信号端连接;所述第二晶体管的栅极与所述第一开关子电路连接,所述第二晶体管的第一极与至少一个所述第二电源端连接,所述第二晶体管的第二极与至少一个所述输出信号端连接。
- 一种显示面板的驱动电路,其中,所述显示面板的驱动电路包括:栅极驱动电路,以及如权利要求1至17任一所述的电平转换电路;其中,所述电平转换电路与所述栅极驱动电路连接,所述电平转换电路用于向所述栅极驱动电路提供驱动信号,所述栅极驱动电路用于在所述驱动信号的驱动下工作。
- 根据权利要求18所述的显示面板的驱动电路,其中,所述栅极驱动电路包括的晶体管的材料为金属氧化物半导体材料。
- 一种显示装置,其中,所述显示装置包括:显示面板,以及如权利要求18或19所述的显示面板的驱动电路;其中,所述显示面板的驱动电路与所述显示面板连接,所述显示面板的驱动电路用于驱动所述显示面板显示。
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- 2021-10-12 WO PCT/CN2021/123312 patent/WO2022111089A1/zh active Application Filing
- 2021-10-12 US US17/907,754 patent/US11749160B2/en active Active
- 2021-10-12 DE DE112021002849.9T patent/DE112021002849T5/de active Pending
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US11749160B2 (en) | 2023-09-05 |
US20230106665A1 (en) | 2023-04-06 |
CN114566110A (zh) | 2022-05-31 |
DE112021002849T5 (de) | 2023-03-16 |
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